From 46d113259ae27564824a7a3ad90fa896f68802e0 Mon Sep 17 00:00:00 2001
From: EspoTek <admin@espotek.com>
Date: Tue, 20 Dec 2016 10:52:21 +1100
Subject: [PATCH] Fixed Logic Analyzer CH2

---
 AVR Code/.vs/USB_BULK_TEST/v14/.atsuo         |  Bin 201728 -> 211456 bytes
 .../USB_BULK_TEST/Debug/USB_BULK_TEST.elf     |  Bin 363944 -> 364012 bytes
 .../USB_BULK_TEST/Debug/USB_BULK_TEST.hex     | 1373 +--
 .../USB_BULK_TEST/Debug/USB_BULK_TEST.lss     | 9669 +++++++++--------
 .../USB_BULK_TEST/Debug/USB_BULK_TEST.map     |  460 +-
 .../USB_BULK_TEST/Debug/USB_BULK_TEST.srec    | 1373 +--
 .../src/ASF/common/services/usb/udc/udc.o     |  Bin 322520 -> 322496 bytes
 AVR Code/USB_BULK_TEST/Debug/src/main.o       |  Bin 294108 -> 294084 bytes
 AVR Code/USB_BULK_TEST/Debug/src/tiny_adc.o   |  Bin 291768 -> 291928 bytes
 AVR Code/USB_BULK_TEST/Debug/src/tiny_dig.o   |  Bin 277544 -> 277520 bytes
 AVR Code/USB_BULK_TEST/Debug/src/tiny_dma.o   |  Bin 314064 -> 314040 bytes
 AVR Code/USB_BULK_TEST/Debug/src/tiny_timer.o |  Bin 298392 -> 298392 bytes
 AVR Code/USB_BULK_TEST/Debug/src/tiny_uart.o  |  Bin 283380 -> 283380 bytes
 .../USB_BULK_TEST/Release/USB_BULK_TEST.elf   |  Bin 22748 -> 22892 bytes
 .../USB_BULK_TEST/Release/USB_BULK_TEST.hex   | 1254 +--
 .../USB_BULK_TEST/Release/USB_BULK_TEST.lss   | 8518 +++++++--------
 .../USB_BULK_TEST/Release/USB_BULK_TEST.map   |  652 +-
 .../USB_BULK_TEST/Release/USB_BULK_TEST.srec  | 1254 +--
 AVR Code/USB_BULK_TEST/Release/src/main.o     |  Bin 5776 -> 5804 bytes
 AVR Code/USB_BULK_TEST/Release/src/tiny_dma.o |  Bin 7964 -> 8368 bytes
 .../USB_BULK_TEST/Release/src/tiny_timer.o    |  Bin 1524 -> 1544 bytes
 .../USB_BULK_TEST/Release/src/tiny_uart.o     |  Bin 1168 -> 1160 bytes
 AVR Code/USB_BULK_TEST/src/globals.h          |    2 +-
 AVR Code/USB_BULK_TEST/src/main.c             |   15 +-
 AVR Code/USB_BULK_TEST/src/tiny_dma.c         |  111 +-
 AVR Code/USB_BULK_TEST/src/tiny_timer.c       |    5 +-
 AVR Code/USB_BULK_TEST/src/tiny_uart.c        |   18 +-
 Desktop Interface/Labrador.pro.user           |    2 +-
 Desktop Interface/Thumbs.db                   |  Bin 3072 -> 4096 bytes
 29 files changed, 12405 insertions(+), 12301 deletions(-)

diff --git a/AVR Code/.vs/USB_BULK_TEST/v14/.atsuo b/AVR Code/.vs/USB_BULK_TEST/v14/.atsuo
index f1b748b5dec6e262c4eaf710ac65af7ad11f8493..83dc9145d4ddc39fbcbd0956a4c5f4d0e383fcfb 100644
GIT binary patch
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diff --git a/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.elf b/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.elf
index f055d06dfd9e0e7f7ac8715164761fbe321754e0..638ec1989cf3aaee3ea4f5f6f8b8b4a2744b3347 100644
GIT binary patch
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diff --git a/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.hex b/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.hex
index 4ae456d3..079d3f74 100644
--- a/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.hex	
+++ b/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.hex	
@@ -1,10 +1,10 @@
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+:1000100048C1000046C1000006C600003CC7000001
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@@ -18,7 +18,7 @@
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 :00000001FF
diff --git a/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.lss b/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.lss
index fc1e4d7e..64f9288c 100644
--- a/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.lss	
+++ b/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.lss	
@@ -3,33 +3,33 @@ USB_BULK_TEST.elf:     file format elf32-avr
 
 Sections:
 Idx Name          Size      VMA       LMA       File off  Algn
-  0 .text         00002c86  00000000  00000000  00000094  2**1
+  0 .text         00002c9c  00000000  00000000  00000094  2**1
                   CONTENTS, ALLOC, LOAD, READONLY, CODE
-  1 .data         000000b2  00802000  00002c86  00002d1c  2**2
+  1 .data         000000b2  00802000  00002c9c  00002d30  2**2
                   CONTENTS, ALLOC, LOAD, DATA
-  2 .bss          00000b9a  008020b2  008020b2  00002dce  2**2
+  2 .bss          00000b9a  008020b2  008020b2  00002de2  2**2
                   ALLOC
-  3 .comment      00000030  00000000  00000000  00002dce  2**0
+  3 .comment      00000030  00000000  00000000  00002de2  2**0
                   CONTENTS, READONLY
-  4 .note.gnu.avr.deviceinfo 00000040  00000000  00000000  00002e00  2**2
+  4 .note.gnu.avr.deviceinfo 00000040  00000000  00000000  00002e14  2**2
                   CONTENTS, READONLY
-  5 .debug_aranges 000004c0  00000000  00000000  00002e40  2**3
+  5 .debug_aranges 000004c0  00000000  00000000  00002e58  2**3
                   CONTENTS, READONLY, DEBUGGING
-  6 .debug_info   0000a48c  00000000  00000000  00003300  2**0
+  6 .debug_info   0000a48c  00000000  00000000  00003318  2**0
                   CONTENTS, READONLY, DEBUGGING
-  7 .debug_abbrev 00001b50  00000000  00000000  0000d78c  2**0
+  7 .debug_abbrev 00001b50  00000000  00000000  0000d7a4  2**0
                   CONTENTS, READONLY, DEBUGGING
-  8 .debug_line   00008af8  00000000  00000000  0000f2dc  2**0
+  8 .debug_line   00008b18  00000000  00000000  0000f2f4  2**0
                   CONTENTS, READONLY, DEBUGGING
-  9 .debug_frame  00000ab4  00000000  00000000  00017dd4  2**2
+  9 .debug_frame  00000ab4  00000000  00000000  00017e0c  2**2
                   CONTENTS, READONLY, DEBUGGING
- 10 .debug_str    0002f65a  00000000  00000000  00018888  2**0
+ 10 .debug_str    0002f654  00000000  00000000  000188c0  2**0
                   CONTENTS, READONLY, DEBUGGING
- 11 .debug_loc    0000235f  00000000  00000000  00047ee2  2**0
+ 11 .debug_loc    00002378  00000000  00000000  00047f14  2**0
                   CONTENTS, READONLY, DEBUGGING
- 12 .debug_ranges 000003f0  00000000  00000000  0004a248  2**3
+ 12 .debug_ranges 000003f0  00000000  00000000  0004a290  2**3
                   CONTENTS, READONLY, DEBUGGING
- 13 .debug_macro  0000b8df  00000000  00000000  0004a638  2**0
+ 13 .debug_macro  0000b8d9  00000000  00000000  0004a680  2**0
                   CONTENTS, READONLY, DEBUGGING
 
 Disassembly of section .text:
@@ -47,13 +47,13 @@ Disassembly of section .text:
       12:	00 00       	nop
       14:	46 c1       	rjmp	.+652    	; 0x2a2 <__bad_interrupt>
       16:	00 00       	nop
-      18:	00 c6       	rjmp	.+3072   	; 0xc1a <__vector_6>
+      18:	06 c6       	rjmp	.+3084   	; 0xc26 <__vector_6>
       1a:	00 00       	nop
-      1c:	36 c7       	rjmp	.+3692   	; 0xe8a <__vector_7>
+      1c:	3c c7       	rjmp	.+3704   	; 0xe96 <__vector_7>
       1e:	00 00       	nop
       20:	40 c1       	rjmp	.+640    	; 0x2a2 <__bad_interrupt>
       22:	00 00       	nop
-      24:	a1 c7       	rjmp	.+3906   	; 0xf68 <__vector_9>
+      24:	a7 c7       	rjmp	.+3918   	; 0xf74 <__vector_9>
       26:	00 00       	nop
       28:	3c c1       	rjmp	.+632    	; 0x2a2 <__bad_interrupt>
       2a:	00 00       	nop
@@ -83,7 +83,7 @@ Disassembly of section .text:
       5a:	00 00       	nop
       5c:	22 c1       	rjmp	.+580    	; 0x2a2 <__bad_interrupt>
       5e:	00 00       	nop
-      60:	0c 94 d2 08 	jmp	0x11a4	; 0x11a4 <__vector_24>
+      60:	0c 94 dd 08 	jmp	0x11ba	; 0x11ba <__vector_24>
       64:	1e c1       	rjmp	.+572    	; 0x2a2 <__bad_interrupt>
       66:	00 00       	nop
       68:	1c c1       	rjmp	.+568    	; 0x2a2 <__bad_interrupt>
@@ -200,7 +200,7 @@ Disassembly of section .text:
      146:	00 00       	nop
      148:	ac c0       	rjmp	.+344    	; 0x2a2 <__bad_interrupt>
      14a:	00 00       	nop
-     14c:	8d c7       	rjmp	.+3866   	; 0x1068 <__vector_83>
+     14c:	93 c7       	rjmp	.+3878   	; 0x1074 <__vector_83>
      14e:	00 00       	nop
      150:	a8 c0       	rjmp	.+336    	; 0x2a2 <__bad_interrupt>
      152:	00 00       	nop
@@ -284,8 +284,8 @@ Disassembly of section .text:
      1ee:	00 00       	nop
      1f0:	58 c0       	rjmp	.+176    	; 0x2a2 <__bad_interrupt>
      1f2:	00 00       	nop
-     1f4:	0c 94 7a 14 	jmp	0x28f4	; 0x28f4 <__vector_125>
-     1f8:	0c 94 34 15 	jmp	0x2a68	; 0x2a68 <__vector_126>
+     1f4:	0c 94 85 14 	jmp	0x290a	; 0x290a <__vector_125>
+     1f8:	0c 94 3f 15 	jmp	0x2a7e	; 0x2a7e <__vector_126>
      1fc:	ce 01       	movw	r24, r28
      1fe:	d0 01       	movw	r26, r0
      200:	d2 01       	movw	r26, r4
@@ -294,53 +294,53 @@ Disassembly of section .text:
      206:	db 01       	movw	r26, r22
      208:	d8 01       	movw	r26, r16
      20a:	da 01       	movw	r26, r20
-     20c:	2b 06       	cpc	r2, r27
-     20e:	52 06       	cpc	r5, r18
-     210:	79 06       	cpc	r7, r25
-     212:	a0 06       	cpc	r10, r16
-     214:	c7 06       	cpc	r12, r23
-     216:	37 07       	cpc	r19, r23
-     218:	ee 06       	cpc	r14, r30
-     21a:	13 07       	cpc	r17, r19
-     21c:	59 0b       	sbc	r21, r25
-     21e:	5b 0b       	sbc	r21, r27
-     220:	99 0b       	sbc	r25, r25
-     222:	d8 0b       	sbc	r29, r24
-     224:	e1 0b       	sbc	r30, r17
-     226:	e6 0b       	sbc	r30, r22
-     228:	3b 0c       	add	r3, r11
-     22a:	40 0c       	add	r4, r0
-     22c:	87 0b       	sbc	r24, r23
-     22e:	8a 0b       	sbc	r24, r26
-     230:	8d 0b       	sbc	r24, r29
-     232:	8f 0b       	sbc	r24, r31
-     234:	91 0b       	sbc	r25, r17
-     236:	93 0b       	sbc	r25, r19
-     238:	95 0b       	sbc	r25, r21
-     23a:	97 0b       	sbc	r25, r23
-     23c:	c5 0b       	sbc	r28, r21
-     23e:	c8 0b       	sbc	r28, r24
-     240:	cb 0b       	sbc	r28, r27
-     242:	ce 0b       	sbc	r28, r30
-     244:	d0 0b       	sbc	r29, r16
-     246:	d2 0b       	sbc	r29, r18
-     248:	d4 0b       	sbc	r29, r20
-     24a:	d6 0b       	sbc	r29, r22
-     24c:	f2 0b       	sbc	r31, r18
-     24e:	fd 0b       	sbc	r31, r29
-     250:	08 0c       	add	r0, r8
-     252:	17 0c       	add	r1, r7
-     254:	1a 0c       	add	r1, r10
-     256:	1c 0c       	add	r1, r12
-     258:	26 0c       	add	r2, r6
-     25a:	30 0c       	add	r3, r0
-     25c:	b8 0f       	add	r27, r24
-     25e:	bb 0f       	add	r27, r27
-     260:	be 0f       	add	r27, r30
-     262:	c1 0f       	add	r28, r17
-     264:	c4 0f       	add	r28, r20
-     266:	c7 0f       	add	r28, r23
-     268:	ca 0f       	add	r28, r26
+     20c:	31 06       	cpc	r3, r17
+     20e:	58 06       	cpc	r5, r24
+     210:	7f 06       	cpc	r7, r31
+     212:	a6 06       	cpc	r10, r22
+     214:	cd 06       	cpc	r12, r29
+     216:	3d 07       	cpc	r19, r29
+     218:	f4 06       	cpc	r15, r20
+     21a:	19 07       	cpc	r17, r25
+     21c:	64 0b       	sbc	r22, r20
+     21e:	66 0b       	sbc	r22, r22
+     220:	a4 0b       	sbc	r26, r20
+     222:	e3 0b       	sbc	r30, r19
+     224:	ec 0b       	sbc	r30, r28
+     226:	f1 0b       	sbc	r31, r17
+     228:	46 0c       	add	r4, r6
+     22a:	4b 0c       	add	r4, r11
+     22c:	92 0b       	sbc	r25, r18
+     22e:	95 0b       	sbc	r25, r21
+     230:	98 0b       	sbc	r25, r24
+     232:	9a 0b       	sbc	r25, r26
+     234:	9c 0b       	sbc	r25, r28
+     236:	9e 0b       	sbc	r25, r30
+     238:	a0 0b       	sbc	r26, r16
+     23a:	a2 0b       	sbc	r26, r18
+     23c:	d0 0b       	sbc	r29, r16
+     23e:	d3 0b       	sbc	r29, r19
+     240:	d6 0b       	sbc	r29, r22
+     242:	d9 0b       	sbc	r29, r25
+     244:	db 0b       	sbc	r29, r27
+     246:	dd 0b       	sbc	r29, r29
+     248:	df 0b       	sbc	r29, r31
+     24a:	e1 0b       	sbc	r30, r17
+     24c:	fd 0b       	sbc	r31, r29
+     24e:	08 0c       	add	r0, r8
+     250:	13 0c       	add	r1, r3
+     252:	22 0c       	add	r2, r2
+     254:	25 0c       	add	r2, r5
+     256:	27 0c       	add	r2, r7
+     258:	31 0c       	add	r3, r1
+     25a:	3b 0c       	add	r3, r11
+     25c:	c3 0f       	add	r28, r19
+     25e:	c6 0f       	add	r28, r22
+     260:	c9 0f       	add	r28, r25
+     262:	cc 0f       	add	r28, r28
+     264:	cf 0f       	add	r28, r31
+     266:	d2 0f       	add	r29, r18
+     268:	d5 0f       	add	r29, r21
 
 0000026a <__ctors_end>:
      26a:	11 24       	eor	r1, r1
@@ -354,7 +354,7 @@ Disassembly of section .text:
      276:	10 e2       	ldi	r17, 0x20	; 32
      278:	a0 e0       	ldi	r26, 0x00	; 0
      27a:	b0 e2       	ldi	r27, 0x20	; 32
-     27c:	e6 e8       	ldi	r30, 0x86	; 134
+     27c:	ec e9       	ldi	r30, 0x9C	; 156
      27e:	fc e2       	ldi	r31, 0x2C	; 44
      280:	02 c0       	rjmp	.+4      	; 0x286 <__do_copy_data+0x10>
      282:	05 90       	lpm	r0, Z+
@@ -377,7 +377,7 @@ Disassembly of section .text:
      298:	b2 07       	cpc	r27, r18
      29a:	e1 f7       	brne	.-8      	; 0x294 <.do_clear_bss_loop>
      29c:	41 d0       	rcall	.+130    	; 0x320 <main>
-     29e:	0c 94 41 16 	jmp	0x2c82	; 0x2c82 <_exit>
+     29e:	0c 94 4c 16 	jmp	0x2c98	; 0x2c98 <_exit>
 
 000002a2 <__bad_interrupt>:
      2a2:	ae ce       	rjmp	.-676    	; 0x0 <__vectors>
@@ -428,7 +428,7 @@ void iso_callback(udd_ep_status_t status, iram_size_t nb_transfered, udd_ep_id_t
      2cc:	70 e0       	ldi	r23, 0x00	; 0
      2ce:	86 59       	subi	r24, 0x96	; 150
      2d0:	99 4d       	sbci	r25, 0xD9	; 217
-     2d2:	0c 94 ca 09 	jmp	0x1394	; 0x1394 <udi_vendor_iso_in_run>
+     2d2:	0c 94 d5 09 	jmp	0x13aa	; 0x13aa <udi_vendor_iso_in_run>
      2d6:	08 95       	ret
 
 000002d8 <iso_callback2>:
@@ -452,7 +452,7 @@ void iso_callback2(udd_ep_status_t status, iram_size_t nb_transfered, udd_ep_id_
      2f0:	70 e0       	ldi	r23, 0x00	; 0
      2f2:	8c 59       	subi	r24, 0x9C	; 156
      2f4:	98 4d       	sbci	r25, 0xD8	; 216
-     2f6:	0c 94 d6 09 	jmp	0x13ac	; 0x13ac <udi_vendor_iso_in_run2>
+     2f6:	0c 94 e1 09 	jmp	0x13c2	; 0x13c2 <udi_vendor_iso_in_run2>
      2fa:	08 95       	ret
 
 000002fc <iso_callback3>:
@@ -476,7 +476,7 @@ void iso_callback3(udd_ep_status_t status, iram_size_t nb_transfered, udd_ep_id_
      314:	70 e0       	ldi	r23, 0x00	; 0
      316:	82 5a       	subi	r24, 0xA2	; 162
      318:	97 4d       	sbci	r25, 0xD7	; 215
-     31a:	0c 94 e2 09 	jmp	0x13c4	; 0x13c4 <udi_vendor_iso_in_run3>
+     31a:	0c 94 ed 09 	jmp	0x13da	; 0x13da <udi_vendor_iso_in_run3>
      31e:	08 95       	ret
 
 00000320 <main>:
@@ -491,30 +491,30 @@ int main(void){
 	cpu_irq_enable();
      326:	78 94       	sei
 	sysclk_init();
-     328:	48 d7       	rcall	.+3728   	; 0x11ba <sysclk_init>
+     328:	53 d7       	rcall	.+3750   	; 0x11d0 <sysclk_init>
 	board_init();
      32a:	c3 df       	rcall	.-122    	; 0x2b2 <board_init>
 	udc_start();
-     32c:	0e 94 d9 0a 	call	0x15b2	; 0x15b2 <udc_start>
+     32c:	0e 94 e4 0a 	call	0x15c8	; 0x15c8 <udc_start>
 	tiny_dac_setup();
-     330:	d4 d0       	rcall	.+424    	; 0x4da <tiny_dac_setup>
+     330:	da d0       	rcall	.+436    	; 0x4e6 <tiny_dac_setup>
 	tiny_dma_setup();
-     332:	f7 d0       	rcall	.+494    	; 0x522 <tiny_dma_setup>
+     332:	fd d0       	rcall	.+506    	; 0x52e <tiny_dma_setup>
 	tiny_adc_setup(0, 0);
      334:	60 e0       	ldi	r22, 0x00	; 0
      336:	80 e0       	ldi	r24, 0x00	; 0
-     338:	93 d0       	rcall	.+294    	; 0x460 <tiny_adc_setup>
+     338:	99 d0       	rcall	.+306    	; 0x46c <tiny_adc_setup>
 	tiny_adc_pid_setup();
-     33a:	7f d0       	rcall	.+254    	; 0x43a <tiny_adc_pid_setup>
+     33a:	85 d0       	rcall	.+266    	; 0x446 <tiny_adc_pid_setup>
 	tiny_adc_ch1setup(12);
      33c:	8c e0       	ldi	r24, 0x0C	; 12
-     33e:	73 d0       	rcall	.+230    	; 0x426 <tiny_adc_ch1setup>
+     33e:	79 d0       	rcall	.+242    	; 0x432 <tiny_adc_ch1setup>
 	tiny_timer_setup();
-     340:	58 d6       	rcall	.+3248   	; 0xff2 <tiny_timer_setup>
+     340:	5e d6       	rcall	.+3260   	; 0xffe <tiny_timer_setup>
 	tiny_uart_setup();
-     342:	09 d7       	rcall	.+3602   	; 0x1156 <tiny_uart_setup>
+     342:	12 d7       	rcall	.+3620   	; 0x1168 <tiny_uart_setup>
 	tiny_spi_setup();
-     344:	20 d7       	rcall	.+3648   	; 0x1186 <tiny_spi_setup>
+     344:	2b d7       	rcall	.+3670   	; 0x119c <tiny_spi_setup>
 	tiny_dig_setup();
      346:	ae df       	rcall	.-164    	; 0x2a4 <tiny_dig_setup>
      348:	50 91 56 22 	lds	r21, 0x2256	; 0x802256 <debug_counter>
@@ -593,40 +593,40 @@ void main_sof_action(void)
      392:	fc 01       	movw	r30, r24
      394:	e2 50       	subi	r30, 0x02	; 2
      396:	ff 4f       	sbci	r31, 0xFF	; 255
-     398:	0c 94 32 16 	jmp	0x2c64	; 0x2c64 <__tablejump2__>
+     398:	0c 94 3d 16 	jmp	0x2c7a	; 0x2c7a <__tablejump2__>
 		case 0:
 			tiny_dma_loop_mode_0();
-     39c:	4e d1       	rcall	.+668    	; 0x63a <tiny_dma_loop_mode_0>
+     39c:	54 d1       	rcall	.+680    	; 0x646 <tiny_dma_loop_mode_0>
 			break;
      39e:	0b c0       	rjmp	.+22     	; 0x3b6 <main_sof_action+0x32>
 		case 1:
 			tiny_dma_loop_mode_1();
-     3a0:	c5 d1       	rcall	.+906    	; 0x72c <tiny_dma_loop_mode_1>
+     3a0:	cb d1       	rcall	.+918    	; 0x738 <tiny_dma_loop_mode_1>
 			break;
      3a2:	09 c0       	rjmp	.+18     	; 0x3b6 <main_sof_action+0x32>
 		case 2:
 			tiny_dma_loop_mode_2();
-     3a4:	37 d2       	rcall	.+1134   	; 0x814 <tiny_dma_loop_mode_2>
+     3a4:	3d d2       	rcall	.+1146   	; 0x820 <tiny_dma_loop_mode_2>
 			break;
      3a6:	07 c0       	rjmp	.+14     	; 0x3b6 <main_sof_action+0x32>
 		case 3:
 			tiny_dma_loop_mode_3();
-     3a8:	b2 d2       	rcall	.+1380   	; 0x90e <tiny_dma_loop_mode_3>
+     3a8:	b8 d2       	rcall	.+1392   	; 0x91a <tiny_dma_loop_mode_3>
 			break;
      3aa:	05 c0       	rjmp	.+10     	; 0x3b6 <main_sof_action+0x32>
 		case 4:
 			tiny_dma_loop_mode_4();
-     3ac:	27 d3       	rcall	.+1614   	; 0x9fc <tiny_dma_loop_mode_4>
+     3ac:	2d d3       	rcall	.+1626   	; 0xa08 <tiny_dma_loop_mode_4>
 			break;
      3ae:	03 c0       	rjmp	.+6      	; 0x3b6 <main_sof_action+0x32>
 		case 6:
 			tiny_dma_loop_mode_6();
-     3b0:	d0 d3       	rcall	.+1952   	; 0xb52 <tiny_dma_loop_mode_6>
+     3b0:	d6 d3       	rcall	.+1964   	; 0xb5e <tiny_dma_loop_mode_6>
 			break;
      3b2:	01 c0       	rjmp	.+2      	; 0x3b6 <main_sof_action+0x32>
 		case 7:
 			tiny_dma_loop_mode_7();
-     3b4:	31 d4       	rcall	.+2146   	; 0xc18 <tiny_dma_loop_mode_7>
+     3b4:	37 d4       	rcall	.+2158   	; 0xc24 <tiny_dma_loop_mode_7>
 		break;
 		default:
 			break;
@@ -655,7 +655,7 @@ bool main_vendor_enable(void)
      3d2:	72 e0       	ldi	r23, 0x02	; 2
      3d4:	8a e6       	ldi	r24, 0x6A	; 106
      3d6:	96 e2       	ldi	r25, 0x26	; 38
-     3d8:	dd d7       	rcall	.+4026   	; 0x1394 <udi_vendor_iso_in_run>
+     3d8:	e8 d7       	rcall	.+4048   	; 0x13aa <udi_vendor_iso_in_run>
 	udi_vendor_iso_in_run2((uint8_t *)&isoBuf[250], PACKET_SIZE, iso_callback2);
      3da:	4c e6       	ldi	r20, 0x6C	; 108
      3dc:	51 e0       	ldi	r21, 0x01	; 1
@@ -663,7 +663,7 @@ bool main_vendor_enable(void)
      3e0:	72 e0       	ldi	r23, 0x02	; 2
      3e2:	84 e6       	ldi	r24, 0x64	; 100
      3e4:	97 e2       	ldi	r25, 0x27	; 39
-     3e6:	e2 d7       	rcall	.+4036   	; 0x13ac <udi_vendor_iso_in_run2>
+     3e6:	ed d7       	rcall	.+4058   	; 0x13c2 <udi_vendor_iso_in_run2>
 	udi_vendor_iso_in_run3((uint8_t *)&isoBuf[500], PACKET_SIZE, iso_callback3);
      3e8:	4e e7       	ldi	r20, 0x7E	; 126
      3ea:	51 e0       	ldi	r21, 0x01	; 1
@@ -671,7 +671,7 @@ bool main_vendor_enable(void)
      3ee:	72 e0       	ldi	r23, 0x02	; 2
      3f0:	8e e5       	ldi	r24, 0x5E	; 94
      3f2:	98 e2       	ldi	r25, 0x28	; 40
-     3f4:	e7 d7       	rcall	.+4046   	; 0x13c4 <udi_vendor_iso_in_run3>
+     3f4:	f2 d7       	rcall	.+4068   	; 0x13da <udi_vendor_iso_in_run3>
 	return true;
 }
      3f6:	81 e0       	ldi	r24, 0x01	; 1
@@ -721,2732 +721,2703 @@ void tiny_adc_ch0setup(unsigned char gain_mask){
      414:	90 a3       	std	Z+32, r25	; 0x20
 	#ifdef VERO
 			ADCA.CH0.MUXCTRL = ADC_CH_MUXPOS_PIN0_gc | ((gain_mask&0x80) ? ADC_CH_MUXNEG_PIN6_gc :  ADC_CH_MUXNEG_PIN4_gc);
-     416:	88 1f       	adc	r24, r24
-     418:	88 27       	eor	r24, r24
-     41a:	88 1f       	adc	r24, r24
-     41c:	88 0f       	add	r24, r24
-     41e:	81 a3       	std	Z+33, r24	; 0x21
 	#else
 			ADCA.CH0.MUXCTRL = ((gain_mask&0x80) ? ADC_CH_MUXPOS_PIN2_gc :  ADC_CH_MUXPOS_PIN0_gc) | ((gain_mask&0x80) ? ADC_CH_MUXNEG_PIN6_gc :  ADC_CH_MUXNEG_PIN4_gc);
+     416:	88 23       	and	r24, r24
+     418:	1c f4       	brge	.+6      	; 0x420 <tiny_adc_ch0setup+0x18>
+     41a:	90 e1       	ldi	r25, 0x10	; 16
+     41c:	82 e0       	ldi	r24, 0x02	; 2
+     41e:	02 c0       	rjmp	.+4      	; 0x424 <tiny_adc_ch0setup+0x1c>
+     420:	90 e0       	ldi	r25, 0x00	; 0
+     422:	80 e0       	ldi	r24, 0x00	; 0
+     424:	89 2b       	or	r24, r25
+     426:	e0 e0       	ldi	r30, 0x00	; 0
+     428:	f2 e0       	ldi	r31, 0x02	; 2
+     42a:	81 a3       	std	Z+33, r24	; 0x21
 	#endif
 	ADCA.CH0.INTCTRL = ADC_CH_INTLVL_OFF_gc;
-     420:	12 a2       	std	Z+34, r1	; 0x22
+     42c:	12 a2       	std	Z+34, r1	; 0x22
 	ADCA.CH0.SCAN = 0x00;  //Disable scanning
-     422:	16 a2       	std	Z+38, r1	; 0x26
-     424:	08 95       	ret
+     42e:	16 a2       	std	Z+38, r1	; 0x26
+     430:	08 95       	ret
 
-00000426 <tiny_adc_ch1setup>:
+00000432 <tiny_adc_ch1setup>:
 }
 
 void tiny_adc_ch1setup(unsigned char gain_mask){
 	ADCA.CH2.CTRL = 0x00; //Reset
-     426:	e0 e0       	ldi	r30, 0x00	; 0
-     428:	f2 e0       	ldi	r31, 0x02	; 2
-     42a:	10 aa       	std	Z+48, r1	; 0x30
+     432:	e0 e0       	ldi	r30, 0x00	; 0
+     434:	f2 e0       	ldi	r31, 0x02	; 2
+     436:	10 aa       	std	Z+48, r1	; 0x30
 	ADCA.CH2.CTRL = ADC_CH_START_bm | gain_mask | ADC_CH_INPUTMODE_DIFFWGAIN_gc;
-     42c:	83 68       	ori	r24, 0x83	; 131
-     42e:	80 ab       	std	Z+48, r24	; 0x30
+     438:	83 68       	ori	r24, 0x83	; 131
+     43a:	80 ab       	std	Z+48, r24	; 0x30
 	ADCA.CH2.MUXCTRL = ADC_CH_MUXPOS_PIN2_gc | ADC_CH_MUXNEG_PIN4_gc;
-     430:	80 e1       	ldi	r24, 0x10	; 16
-     432:	81 ab       	std	Z+49, r24	; 0x31
+     43c:	80 e1       	ldi	r24, 0x10	; 16
+     43e:	81 ab       	std	Z+49, r24	; 0x31
 	ADCA.CH2.INTCTRL = ADC_CH_INTLVL_OFF_gc;
-     434:	12 aa       	std	Z+50, r1	; 0x32
+     440:	12 aa       	std	Z+50, r1	; 0x32
 	ADCA.CH2.SCAN = 0x00;  //Disable scanning
-     436:	16 aa       	std	Z+54, r1	; 0x36
-     438:	08 95       	ret
+     442:	16 aa       	std	Z+54, r1	; 0x36
+     444:	08 95       	ret
 
-0000043a <tiny_adc_pid_setup>:
+00000446 <tiny_adc_pid_setup>:
 }
 
 void tiny_adc_pid_setup(void){
 	ADCA.CH1.CTRL = 0x00; //Reset
-     43a:	e0 e0       	ldi	r30, 0x00	; 0
-     43c:	f2 e0       	ldi	r31, 0x02	; 2
-     43e:	10 a6       	std	Z+40, r1	; 0x28
+     446:	e0 e0       	ldi	r30, 0x00	; 0
+     448:	f2 e0       	ldi	r31, 0x02	; 2
+     44a:	10 a6       	std	Z+40, r1	; 0x28
 	ADCA.CH1.CTRL = ADC_CH_START_bm | ADC_CH_GAIN_1X_gc | ADC_CH_INPUTMODE_DIFFWGAIN_gc;
-     440:	83 e8       	ldi	r24, 0x83	; 131
-     442:	80 a7       	std	Z+40, r24	; 0x28
+     44c:	83 e8       	ldi	r24, 0x83	; 131
+     44e:	80 a7       	std	Z+40, r24	; 0x28
 	ADCA.CH1.MUXCTRL = ADC_CH_MUXPOS_PIN5_gc | 0b00000111;
-     444:	8f e2       	ldi	r24, 0x2F	; 47
-     446:	81 a7       	std	Z+41, r24	; 0x29
+     450:	8f e2       	ldi	r24, 0x2F	; 47
+     452:	81 a7       	std	Z+41, r24	; 0x29
 	ADCA.CH1.INTCTRL = ADC_CH_INTLVL_OFF_gc;
-     448:	12 a6       	std	Z+42, r1	; 0x2a
+     454:	12 a6       	std	Z+42, r1	; 0x2a
 	ADCA.CH1.SCAN = 0x00;  //Disable scanning
-     44a:	16 a6       	std	Z+46, r1	; 0x2e
-     44c:	08 95       	ret
+     456:	16 a6       	std	Z+46, r1	; 0x2e
+     458:	08 95       	ret
 
-0000044e <ReadCalibrationByte>:
+0000045a <ReadCalibrationByte>:
 //FROM: http://www.avrfreaks.net/forum/xmega-production-signature-row
 uint8_t ReadCalibrationByte(uint8_t index){
 	uint8_t result;
 
 	/* Load the NVM Command register to read the calibration row. */
 	NVM_CMD = NVM_CMD_READ_CALIB_ROW_gc;
-     44e:	aa ec       	ldi	r26, 0xCA	; 202
-     450:	b1 e0       	ldi	r27, 0x01	; 1
-     452:	92 e0       	ldi	r25, 0x02	; 2
-     454:	9c 93       	st	X, r25
+     45a:	aa ec       	ldi	r26, 0xCA	; 202
+     45c:	b1 e0       	ldi	r27, 0x01	; 1
+     45e:	92 e0       	ldi	r25, 0x02	; 2
+     460:	9c 93       	st	X, r25
 	result = pgm_read_byte(index);
-     456:	e8 2f       	mov	r30, r24
-     458:	f0 e0       	ldi	r31, 0x00	; 0
-     45a:	84 91       	lpm	r24, Z
+     462:	e8 2f       	mov	r30, r24
+     464:	f0 e0       	ldi	r31, 0x00	; 0
+     466:	84 91       	lpm	r24, Z
 
 	/* Clean up NVM Command register. */
 	NVM_CMD = NVM_CMD_NO_OPERATION_gc;
-     45c:	1c 92       	st	X, r1
+     468:	1c 92       	st	X, r1
 
 	return( result );
-     45e:	08 95       	ret
+     46a:	08 95       	ret
 
-00000460 <tiny_adc_setup>:
+0000046c <tiny_adc_setup>:
 // These 2 files need to be included in order to read
 // the production calibration values from EEPROM
 #include <avr/pgmspace.h>
 #include <stddef.h>
 
 void tiny_adc_setup(unsigned char ch2_enable, unsigned char seven_fiddy_ksps){
-     460:	cf 93       	push	r28
-     462:	df 93       	push	r29
+     46c:	cf 93       	push	r28
+     46e:	df 93       	push	r29
 	PR.PRPA &=0b11111101;
-     464:	e0 e7       	ldi	r30, 0x70	; 112
-     466:	f0 e0       	ldi	r31, 0x00	; 0
-     468:	91 81       	ldd	r25, Z+1	; 0x01
-     46a:	9d 7f       	andi	r25, 0xFD	; 253
-     46c:	91 83       	std	Z+1, r25	; 0x01
+     470:	e0 e7       	ldi	r30, 0x70	; 112
+     472:	f0 e0       	ldi	r31, 0x00	; 0
+     474:	91 81       	ldd	r25, Z+1	; 0x01
+     476:	9d 7f       	andi	r25, 0xFD	; 253
+     478:	91 83       	std	Z+1, r25	; 0x01
 	
 	ADCA.CTRLA = 0x00; //Turn off
-     46e:	10 92 00 02 	sts	0x0200, r1	; 0x800200 <__TEXT_REGION_LENGTH__+0x700200>
+     47a:	10 92 00 02 	sts	0x0200, r1	; 0x800200 <__TEXT_REGION_LENGTH__+0x700200>
 	ADCA.CTRLB = ADC_FREERUN_bm | (seven_fiddy_ksps == 2 ? ADC_RESOLUTION_LEFT12BIT_gc : ADC_RESOLUTION_8BIT_gc) | ADC_CONMODE_bm ;
-     472:	62 30       	cpi	r22, 0x02	; 2
-     474:	31 f1       	breq	.+76     	; 0x4c2 <tiny_adc_setup+0x62>
-     476:	e0 e0       	ldi	r30, 0x00	; 0
-     478:	f2 e0       	ldi	r31, 0x02	; 2
-     47a:	9c e1       	ldi	r25, 0x1C	; 28
-     47c:	91 83       	std	Z+1, r25	; 0x01
+     47e:	62 30       	cpi	r22, 0x02	; 2
+     480:	31 f1       	breq	.+76     	; 0x4ce <tiny_adc_setup+0x62>
+     482:	e0 e0       	ldi	r30, 0x00	; 0
+     484:	f2 e0       	ldi	r31, 0x02	; 2
+     486:	9c e1       	ldi	r25, 0x1C	; 28
+     488:	91 83       	std	Z+1, r25	; 0x01
 	ADCA.REFCTRL = ADC_REFSEL_INTVCC2_gc;
-     47e:	90 e4       	ldi	r25, 0x40	; 64
-     480:	92 83       	std	Z+2, r25	; 0x02
+     48a:	90 e4       	ldi	r25, 0x40	; 64
+     48c:	92 83       	std	Z+2, r25	; 0x02
 	ADCA.EVCTRL = ch2_enable ? ADC_SWEEP_0123_gc : ADC_SWEEP_01_gc;  //Non-zero causes issues with interrupts!  ;.;		
-     482:	81 11       	cpse	r24, r1
-     484:	02 c0       	rjmp	.+4      	; 0x48a <tiny_adc_setup+0x2a>
-     486:	80 e4       	ldi	r24, 0x40	; 64
-     488:	01 c0       	rjmp	.+2      	; 0x48c <tiny_adc_setup+0x2c>
-     48a:	80 ec       	ldi	r24, 0xC0	; 192
-     48c:	80 93 03 02 	sts	0x0203, r24	; 0x800203 <__TEXT_REGION_LENGTH__+0x700203>
+     48e:	81 11       	cpse	r24, r1
+     490:	02 c0       	rjmp	.+4      	; 0x496 <tiny_adc_setup+0x2a>
+     492:	80 e4       	ldi	r24, 0x40	; 64
+     494:	01 c0       	rjmp	.+2      	; 0x498 <tiny_adc_setup+0x2c>
+     496:	80 ec       	ldi	r24, 0xC0	; 192
+     498:	80 93 03 02 	sts	0x0203, r24	; 0x800203 <__TEXT_REGION_LENGTH__+0x700203>
 	
 	ADCA.PRESCALER = seven_fiddy_ksps == 1 ? ADC_PRESCALER_DIV16_gc : ADC_PRESCALER_DIV32_gc;  //ADC Clock = Sysclock/128
-     490:	61 30       	cpi	r22, 0x01	; 1
-     492:	11 f0       	breq	.+4      	; 0x498 <tiny_adc_setup+0x38>
-     494:	83 e0       	ldi	r24, 0x03	; 3
-     496:	01 c0       	rjmp	.+2      	; 0x49a <tiny_adc_setup+0x3a>
-     498:	82 e0       	ldi	r24, 0x02	; 2
-     49a:	c0 e0       	ldi	r28, 0x00	; 0
-     49c:	d2 e0       	ldi	r29, 0x02	; 2
-     49e:	8c 83       	std	Y+4, r24	; 0x04
+     49c:	61 30       	cpi	r22, 0x01	; 1
+     49e:	11 f0       	breq	.+4      	; 0x4a4 <tiny_adc_setup+0x38>
+     4a0:	83 e0       	ldi	r24, 0x03	; 3
+     4a2:	01 c0       	rjmp	.+2      	; 0x4a6 <tiny_adc_setup+0x3a>
+     4a4:	82 e0       	ldi	r24, 0x02	; 2
+     4a6:	c0 e0       	ldi	r28, 0x00	; 0
+     4a8:	d2 e0       	ldi	r29, 0x02	; 2
+     4aa:	8c 83       	std	Y+4, r24	; 0x04
 	ADCA.CALL = ReadCalibrationByte(offsetof(NVM_PROD_SIGNATURES_t, ADCACAL0));	//Load calibration bytes from production row.
-     4a0:	80 e2       	ldi	r24, 0x20	; 32
-     4a2:	d5 df       	rcall	.-86     	; 0x44e <ReadCalibrationByte>
-     4a4:	8c 87       	std	Y+12, r24	; 0x0c
+     4ac:	80 e2       	ldi	r24, 0x20	; 32
+     4ae:	d5 df       	rcall	.-86     	; 0x45a <ReadCalibrationByte>
+     4b0:	8c 87       	std	Y+12, r24	; 0x0c
 	ADCA.CALH = ReadCalibrationByte(offsetof(NVM_PROD_SIGNATURES_t, ADCACAL1));	//Load calibration bytes from production row.
-     4a6:	81 e2       	ldi	r24, 0x21	; 33
-     4a8:	d2 df       	rcall	.-92     	; 0x44e <ReadCalibrationByte>
-     4aa:	8d 87       	std	Y+13, r24	; 0x0d
+     4b2:	81 e2       	ldi	r24, 0x21	; 33
+     4b4:	d2 df       	rcall	.-92     	; 0x45a <ReadCalibrationByte>
+     4b6:	8d 87       	std	Y+13, r24	; 0x0d
 	ADCA.CMP = 0x0000;		//No compare used
-     4ac:	18 8e       	std	Y+24, r1	; 0x18
-     4ae:	19 8e       	std	Y+25, r1	; 0x19
+     4b8:	18 8e       	std	Y+24, r1	; 0x18
+     4ba:	19 8e       	std	Y+25, r1	; 0x19
 
 	ADCA.CTRLA = ADC_ENABLE_bm;
-     4b0:	81 e0       	ldi	r24, 0x01	; 1
-     4b2:	88 83       	st	Y, r24
+     4bc:	81 e0       	ldi	r24, 0x01	; 1
+     4be:	88 83       	st	Y, r24
 	
 	tiny_adc_pid_setup();
-     4b4:	c2 df       	rcall	.-124    	; 0x43a <tiny_adc_pid_setup>
-     4b6:	0e c0       	rjmp	.+28     	; 0x4d4 <tiny_adc_setup+0x74>
+     4c0:	c2 df       	rcall	.-124    	; 0x446 <tiny_adc_pid_setup>
+     4c2:	0e c0       	rjmp	.+28     	; 0x4e0 <tiny_adc_setup+0x74>
 	PR.PRPA &=0b11111101;
 	
 	ADCA.CTRLA = 0x00; //Turn off
 	ADCA.CTRLB = ADC_FREERUN_bm | (seven_fiddy_ksps == 2 ? ADC_RESOLUTION_LEFT12BIT_gc : ADC_RESOLUTION_8BIT_gc) | ADC_CONMODE_bm ;
 	ADCA.REFCTRL = ADC_REFSEL_INTVCC2_gc;
 	ADCA.EVCTRL = ch2_enable ? ADC_SWEEP_0123_gc : ADC_SWEEP_01_gc;  //Non-zero causes issues with interrupts!  ;.;		
-     4b8:	80 ec       	ldi	r24, 0xC0	; 192
-     4ba:	80 93 03 02 	sts	0x0203, r24	; 0x800203 <__TEXT_REGION_LENGTH__+0x700203>
+     4c4:	80 ec       	ldi	r24, 0xC0	; 192
+     4c6:	80 93 03 02 	sts	0x0203, r24	; 0x800203 <__TEXT_REGION_LENGTH__+0x700203>
 	
 	ADCA.PRESCALER = seven_fiddy_ksps == 1 ? ADC_PRESCALER_DIV16_gc : ADC_PRESCALER_DIV32_gc;  //ADC Clock = Sysclock/128
-     4be:	83 e0       	ldi	r24, 0x03	; 3
-     4c0:	ec cf       	rjmp	.-40     	; 0x49a <tiny_adc_setup+0x3a>
+     4ca:	83 e0       	ldi	r24, 0x03	; 3
+     4cc:	ec cf       	rjmp	.-40     	; 0x4a6 <tiny_adc_setup+0x3a>
 
 void tiny_adc_setup(unsigned char ch2_enable, unsigned char seven_fiddy_ksps){
 	PR.PRPA &=0b11111101;
 	
 	ADCA.CTRLA = 0x00; //Turn off
 	ADCA.CTRLB = ADC_FREERUN_bm | (seven_fiddy_ksps == 2 ? ADC_RESOLUTION_LEFT12BIT_gc : ADC_RESOLUTION_8BIT_gc) | ADC_CONMODE_bm ;
-     4c2:	e0 e0       	ldi	r30, 0x00	; 0
-     4c4:	f2 e0       	ldi	r31, 0x02	; 2
-     4c6:	9e e1       	ldi	r25, 0x1E	; 30
-     4c8:	91 83       	std	Z+1, r25	; 0x01
+     4ce:	e0 e0       	ldi	r30, 0x00	; 0
+     4d0:	f2 e0       	ldi	r31, 0x02	; 2
+     4d2:	9e e1       	ldi	r25, 0x1E	; 30
+     4d4:	91 83       	std	Z+1, r25	; 0x01
 	ADCA.REFCTRL = ADC_REFSEL_INTVCC2_gc;
-     4ca:	90 e4       	ldi	r25, 0x40	; 64
-     4cc:	92 83       	std	Z+2, r25	; 0x02
+     4d6:	90 e4       	ldi	r25, 0x40	; 64
+     4d8:	92 83       	std	Z+2, r25	; 0x02
 	ADCA.EVCTRL = ch2_enable ? ADC_SWEEP_0123_gc : ADC_SWEEP_01_gc;  //Non-zero causes issues with interrupts!  ;.;		
-     4ce:	81 11       	cpse	r24, r1
-     4d0:	f3 cf       	rjmp	.-26     	; 0x4b8 <tiny_adc_setup+0x58>
-     4d2:	d9 cf       	rjmp	.-78     	; 0x486 <tiny_adc_setup+0x26>
+     4da:	81 11       	cpse	r24, r1
+     4dc:	f3 cf       	rjmp	.-26     	; 0x4c4 <tiny_adc_setup+0x58>
+     4de:	d9 cf       	rjmp	.-78     	; 0x492 <tiny_adc_setup+0x26>
 	ADCA.CTRLA = ADC_ENABLE_bm;
 	
 	tiny_adc_pid_setup();
 		
 	return;
 }
-     4d4:	df 91       	pop	r29
-     4d6:	cf 91       	pop	r28
-     4d8:	08 95       	ret
+     4e0:	df 91       	pop	r29
+     4e2:	cf 91       	pop	r28
+     4e4:	08 95       	ret
 
-000004da <tiny_dac_setup>:
+000004e6 <tiny_dac_setup>:
 #include "tiny_adc.h"
 
 #include <avr/pgmspace.h>
 #include <stddef.h>
 
 void tiny_dac_setup(void){
-     4da:	cf 93       	push	r28
-     4dc:	df 93       	push	r29
+     4e6:	cf 93       	push	r28
+     4e8:	df 93       	push	r29
 	
 	//Turn on in PR
 	PR.PRPB &=0b11111011;
-     4de:	e0 e7       	ldi	r30, 0x70	; 112
-     4e0:	f0 e0       	ldi	r31, 0x00	; 0
-     4e2:	82 81       	ldd	r24, Z+2	; 0x02
-     4e4:	8b 7f       	andi	r24, 0xFB	; 251
-     4e6:	82 83       	std	Z+2, r24	; 0x02
+     4ea:	e0 e7       	ldi	r30, 0x70	; 112
+     4ec:	f0 e0       	ldi	r31, 0x00	; 0
+     4ee:	82 81       	ldd	r24, Z+2	; 0x02
+     4f0:	8b 7f       	andi	r24, 0xFB	; 251
+     4f2:	82 83       	std	Z+2, r24	; 0x02
 	
 	DACB.CTRLA = DAC_CH1EN_bm | DAC_CH0EN_bm | DAC_ENABLE_bm;
-     4e8:	c0 e2       	ldi	r28, 0x20	; 32
-     4ea:	d3 e0       	ldi	r29, 0x03	; 3
-     4ec:	8d e0       	ldi	r24, 0x0D	; 13
-     4ee:	88 83       	st	Y, r24
+     4f4:	c0 e2       	ldi	r28, 0x20	; 32
+     4f6:	d3 e0       	ldi	r29, 0x03	; 3
+     4f8:	8d e0       	ldi	r24, 0x0D	; 13
+     4fa:	88 83       	st	Y, r24
 	DACB.CTRLB = DAC_CHSEL_DUAL_gc;
-     4f0:	80 e4       	ldi	r24, 0x40	; 64
-     4f2:	89 83       	std	Y+1, r24	; 0x01
+     4fc:	80 e4       	ldi	r24, 0x40	; 64
+     4fe:	89 83       	std	Y+1, r24	; 0x01
 	DACB.CTRLC = DAC_REFSEL_AVCC_gc | DAC_LEFTADJ_bm;
-     4f4:	89 e0       	ldi	r24, 0x09	; 9
-     4f6:	8a 83       	std	Y+2, r24	; 0x02
+     500:	89 e0       	ldi	r24, 0x09	; 9
+     502:	8a 83       	std	Y+2, r24	; 0x02
 	//EVCTRL unset
 	//DACB.CH0DATAH = 127;//contains (8-bit) sample, assuming left adjust!
 	
 	//TODO: Calibrate
 	DACB.CH0GAINCAL = ReadCalibrationByte(offsetof(NVM_PROD_SIGNATURES_t, DACB0GAINCAL));	//Load calibration bytes from production row.
-     4f8:	83 e3       	ldi	r24, 0x33	; 51
-     4fa:	a9 df       	rcall	.-174    	; 0x44e <ReadCalibrationByte>
-     4fc:	88 87       	std	Y+8, r24	; 0x08
+     504:	83 e3       	ldi	r24, 0x33	; 51
+     506:	a9 df       	rcall	.-174    	; 0x45a <ReadCalibrationByte>
+     508:	88 87       	std	Y+8, r24	; 0x08
 	DACB.CH0OFFSETCAL = ReadCalibrationByte(offsetof(NVM_PROD_SIGNATURES_t, DACB0OFFCAL));	//Load calibration bytes from production row.
-     4fe:	82 e3       	ldi	r24, 0x32	; 50
-     500:	a6 df       	rcall	.-180    	; 0x44e <ReadCalibrationByte>
-     502:	89 87       	std	Y+9, r24	; 0x09
+     50a:	82 e3       	ldi	r24, 0x32	; 50
+     50c:	a6 df       	rcall	.-180    	; 0x45a <ReadCalibrationByte>
+     50e:	89 87       	std	Y+9, r24	; 0x09
 
 	DACB.CH1GAINCAL = ReadCalibrationByte(offsetof(NVM_PROD_SIGNATURES_t, DACB1GAINCAL));	//Load calibration bytes from production row.
-     504:	87 e3       	ldi	r24, 0x37	; 55
-     506:	a3 df       	rcall	.-186    	; 0x44e <ReadCalibrationByte>
-     508:	8a 87       	std	Y+10, r24	; 0x0a
+     510:	87 e3       	ldi	r24, 0x37	; 55
+     512:	a3 df       	rcall	.-186    	; 0x45a <ReadCalibrationByte>
+     514:	8a 87       	std	Y+10, r24	; 0x0a
 	DACB.CH1OFFSETCAL = ReadCalibrationByte(offsetof(NVM_PROD_SIGNATURES_t, DACB1OFFCAL));	//Load calibration bytes from production row.
-     50a:	86 e3       	ldi	r24, 0x36	; 54
-     50c:	a0 df       	rcall	.-192    	; 0x44e <ReadCalibrationByte>
-     50e:	8b 87       	std	Y+11, r24	; 0x0b
+     516:	86 e3       	ldi	r24, 0x36	; 54
+     518:	a0 df       	rcall	.-192    	; 0x45a <ReadCalibrationByte>
+     51a:	8b 87       	std	Y+11, r24	; 0x0b
 
 	//Set up for triple mode!
 	PORTB.DIR |= 0x03;
-     510:	e0 e2       	ldi	r30, 0x20	; 32
-     512:	f6 e0       	ldi	r31, 0x06	; 6
-     514:	80 81       	ld	r24, Z
-     516:	83 60       	ori	r24, 0x03	; 3
-     518:	80 83       	st	Z, r24
+     51c:	e0 e2       	ldi	r30, 0x20	; 32
+     51e:	f6 e0       	ldi	r31, 0x06	; 6
+     520:	80 81       	ld	r24, Z
+     522:	83 60       	ori	r24, 0x03	; 3
+     524:	80 83       	st	Z, r24
 	PORTB.OUT = 0x00;
-     51a:	14 82       	std	Z+4, r1	; 0x04
+     526:	14 82       	std	Z+4, r1	; 0x04
 	
 	
 
-     51c:	df 91       	pop	r29
-     51e:	cf 91       	pop	r28
-     520:	08 95       	ret
+     528:	df 91       	pop	r29
+     52a:	cf 91       	pop	r28
+     52c:	08 95       	ret
 
-00000522 <tiny_dma_setup>:
+0000052e <tiny_dma_setup>:
 #include "globals.h"
 
 
 void tiny_dma_setup(void){
 	//Turn on DMA
 	PR.PRGEN &=0b111111110; //Turn on DMA clk
-     522:	e0 e7       	ldi	r30, 0x70	; 112
-     524:	f0 e0       	ldi	r31, 0x00	; 0
-     526:	80 81       	ld	r24, Z
-     528:	8e 7f       	andi	r24, 0xFE	; 254
-     52a:	80 83       	st	Z, r24
+     52e:	e0 e7       	ldi	r30, 0x70	; 112
+     530:	f0 e0       	ldi	r31, 0x00	; 0
+     532:	80 81       	ld	r24, Z
+     534:	8e 7f       	andi	r24, 0xFE	; 254
+     536:	80 83       	st	Z, r24
 	DMA.CTRL = DMA_ENABLE_bm | DMA_PRIMODE_RR0123_gc;
-     52c:	80 e8       	ldi	r24, 0x80	; 128
-     52e:	80 93 00 01 	sts	0x0100, r24	; 0x800100 <__TEXT_REGION_LENGTH__+0x700100>
-     532:	08 95       	ret
+     538:	80 e8       	ldi	r24, 0x80	; 128
+     53a:	80 93 00 01 	sts	0x0100, r24	; 0x800100 <__TEXT_REGION_LENGTH__+0x700100>
+     53e:	08 95       	ret
 
-00000534 <tiny_dma_flush>:
+00000540 <tiny_dma_flush>:
 }
 void tiny_dma_flush(void){
 	DMA.CH0.CTRLA = 0x00;
-     534:	e0 e0       	ldi	r30, 0x00	; 0
-     536:	f1 e0       	ldi	r31, 0x01	; 1
-     538:	10 8a       	std	Z+16, r1	; 0x10
+     540:	e0 e0       	ldi	r30, 0x00	; 0
+     542:	f1 e0       	ldi	r31, 0x01	; 1
+     544:	10 8a       	std	Z+16, r1	; 0x10
 	DMA.CH0.CTRLA = DMA_CH_RESET_bm;
-     53a:	80 e4       	ldi	r24, 0x40	; 64
-     53c:	80 8b       	std	Z+16, r24	; 0x10
+     546:	80 e4       	ldi	r24, 0x40	; 64
+     548:	80 8b       	std	Z+16, r24	; 0x10
 
 	DMA.CH1.CTRLA = 0x00;
-     53e:	10 a2       	std	Z+32, r1	; 0x20
+     54a:	10 a2       	std	Z+32, r1	; 0x20
 	DMA.CH1.CTRLA = DMA_CH_RESET_bm;
-     540:	80 a3       	std	Z+32, r24	; 0x20
+     54c:	80 a3       	std	Z+32, r24	; 0x20
 	
 	DMA.CH2.CTRLA = 0x00;
-     542:	10 aa       	std	Z+48, r1	; 0x30
+     54e:	10 aa       	std	Z+48, r1	; 0x30
 	DMA.CH2.CTRLA = DMA_CH_RESET_bm;
-     544:	80 ab       	std	Z+48, r24	; 0x30
+     550:	80 ab       	std	Z+48, r24	; 0x30
 	
 	DMA.CH3.CTRLA = 0x00;
-     546:	e0 e4       	ldi	r30, 0x40	; 64
-     548:	f1 e0       	ldi	r31, 0x01	; 1
-     54a:	10 82       	st	Z, r1
+     552:	e0 e4       	ldi	r30, 0x40	; 64
+     554:	f1 e0       	ldi	r31, 0x01	; 1
+     556:	10 82       	st	Z, r1
 	DMA.CH3.CTRLA = DMA_CH_RESET_bm;
-     54c:	80 83       	st	Z, r24
+     558:	80 83       	st	Z, r24
 	
 	b1_state = 0;
-     54e:	10 92 b5 20 	sts	0x20B5, r1	; 0x8020b5 <b1_state>
-     552:	08 95       	ret
+     55a:	10 92 b5 20 	sts	0x20B5, r1	; 0x8020b5 <b1_state>
+     55e:	08 95       	ret
 
-00000554 <tiny_dma_set_mode_0>:
+00000560 <tiny_dma_set_mode_0>:
 }
 void tiny_dma_set_mode_0(void){
 	
 	global_mode = 0;
-     554:	10 92 00 20 	sts	0x2000, r1	; 0x802000 <__data_start>
+     560:	10 92 00 20 	sts	0x2000, r1	; 0x802000 <__data_start>
 	
 	tiny_dma_flush();
-     558:	ed df       	rcall	.-38     	; 0x534 <tiny_dma_flush>
+     564:	ed df       	rcall	.-38     	; 0x540 <tiny_dma_flush>
 	
 	DMA.CH2.REPCNT = 0; //Repeat forever!
-     55a:	e0 e0       	ldi	r30, 0x00	; 0
-     55c:	f1 e0       	ldi	r31, 0x01	; 1
-     55e:	16 aa       	std	Z+54, r1	; 0x36
+     566:	e0 e0       	ldi	r30, 0x00	; 0
+     568:	f1 e0       	ldi	r31, 0x01	; 1
+     56a:	16 aa       	std	Z+54, r1	; 0x36
 	DMA.CH2.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm | DMA_CH_REPEAT_bm;
-     560:	94 e2       	ldi	r25, 0x24	; 36
-     562:	90 ab       	std	Z+48, r25	; 0x30
+     56c:	94 e2       	ldi	r25, 0x24	; 36
+     56e:	90 ab       	std	Z+48, r25	; 0x30
 	DMA.CH2.CTRLB = 0x00; //No interrupt for DacBuf!!
-     564:	11 aa       	std	Z+49, r1	; 0x31
+     570:	11 aa       	std	Z+49, r1	; 0x31
 	DMA.CH2.ADDRCTRL = DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc | DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc;   //Dest reloads after each burst, with byte incrementing.  Src reloads at end of block, also incrementing address.
-     566:	49 e5       	ldi	r20, 0x59	; 89
-     568:	42 ab       	std	Z+50, r20	; 0x32
+     572:	49 e5       	ldi	r20, 0x59	; 89
+     574:	42 ab       	std	Z+50, r20	; 0x32
 	DMA.CH2.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH1_gc;	//Triggered from TCC0 when it hits PER
-     56a:	32 e0       	ldi	r19, 0x02	; 2
-     56c:	33 ab       	std	Z+51, r19	; 0x33
+     576:	32 e0       	ldi	r19, 0x02	; 2
+     578:	33 ab       	std	Z+51, r19	; 0x33
 	DMA.CH2.TRFCNT = auxDacBufLen;
-     56e:	60 91 02 20 	lds	r22, 0x2002	; 0x802002 <auxDacBufLen>
-     572:	70 91 03 20 	lds	r23, 0x2003	; 0x802003 <auxDacBufLen+0x1>
-     576:	64 ab       	std	Z+52, r22	; 0x34
-     578:	75 ab       	std	Z+53, r23	; 0x35
+     57a:	60 91 02 20 	lds	r22, 0x2002	; 0x802002 <auxDacBufLen>
+     57e:	70 91 03 20 	lds	r23, 0x2003	; 0x802003 <auxDacBufLen+0x1>
+     582:	64 ab       	std	Z+52, r22	; 0x34
+     584:	75 ab       	std	Z+53, r23	; 0x35
 
 	DMA.CH2.SRCADDR0 = (( (uint16_t) &dacBuf_CH2[0]) >> 0) & 0xFF; //Source address is dacbuf
-     57a:	6a e6       	ldi	r22, 0x6A	; 106
-     57c:	74 e2       	ldi	r23, 0x24	; 36
-     57e:	60 af       	std	Z+56, r22	; 0x38
+     586:	6a e6       	ldi	r22, 0x6A	; 106
+     588:	74 e2       	ldi	r23, 0x24	; 36
+     58a:	60 af       	std	Z+56, r22	; 0x38
 	DMA.CH2.SRCADDR1 = (( (uint16_t) &dacBuf_CH2[0]) >> 8) & 0xFF;
-     580:	71 af       	std	Z+57, r23	; 0x39
+     58c:	71 af       	std	Z+57, r23	; 0x39
 	DMA.CH2.SRCADDR2 = 0x00;
-     582:	12 ae       	std	Z+58, r1	; 0x3a
+     58e:	12 ae       	std	Z+58, r1	; 0x3a
 	
 	DMA.CH2.DESTADDR0 = (( (uint16_t) &DACB.CH1DATAH) >> 0) & 0xFF;  //Dest address is high byte of DAC register
-     584:	8b e3       	ldi	r24, 0x3B	; 59
-     586:	84 af       	std	Z+60, r24	; 0x3c
+     590:	8b e3       	ldi	r24, 0x3B	; 59
+     592:	84 af       	std	Z+60, r24	; 0x3c
 	DMA.CH2.DESTADDR1 = (( (uint16_t) &DACB.CH1DATAH) >> 8) & 0xFF;
-     588:	83 e0       	ldi	r24, 0x03	; 3
-     58a:	80 93 3d 01 	sts	0x013D, r24	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
+     594:	83 e0       	ldi	r24, 0x03	; 3
+     596:	80 93 3d 01 	sts	0x013D, r24	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
 	DMA.CH2.DESTADDR2 = 0x00;
-     58e:	10 92 3e 01 	sts	0x013E, r1	; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e>
+     59a:	10 92 3e 01 	sts	0x013E, r1	; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e>
 	
 	//Must enable last for REPCNT won't work!
 	DMA.CH2.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
-     592:	20 a9       	ldd	r18, Z+48	; 0x30
-     594:	20 68       	ori	r18, 0x80	; 128
-     596:	20 ab       	std	Z+48, r18	; 0x30
+     59e:	20 a9       	ldd	r18, Z+48	; 0x30
+     5a0:	20 68       	ori	r18, 0x80	; 128
+     5a2:	20 ab       	std	Z+48, r18	; 0x30
 		
 	DMA.CH3.REPCNT = 0; //Repeat forever!
-     598:	10 92 46 01 	sts	0x0146, r1	; 0x800146 <__TEXT_REGION_LENGTH__+0x700146>
+     5a4:	10 92 46 01 	sts	0x0146, r1	; 0x800146 <__TEXT_REGION_LENGTH__+0x700146>
 	DMA.CH3.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm | DMA_CH_REPEAT_bm;
-     59c:	a0 e4       	ldi	r26, 0x40	; 64
-     59e:	b1 e0       	ldi	r27, 0x01	; 1
-     5a0:	9c 93       	st	X, r25
+     5a8:	a0 e4       	ldi	r26, 0x40	; 64
+     5aa:	b1 e0       	ldi	r27, 0x01	; 1
+     5ac:	9c 93       	st	X, r25
 	DMA.CH3.CTRLB = 0x00; //Hi interrupt on block complete
-     5a2:	10 92 41 01 	sts	0x0141, r1	; 0x800141 <__TEXT_REGION_LENGTH__+0x700141>
+     5ae:	10 92 41 01 	sts	0x0141, r1	; 0x800141 <__TEXT_REGION_LENGTH__+0x700141>
 	DMA.CH3.ADDRCTRL = DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc | DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc;   //Dest reloads after each burst, with byte incrementing.  Src reloads at end of block, also incrementing address.
-     5a6:	40 93 42 01 	sts	0x0142, r20	; 0x800142 <__TEXT_REGION_LENGTH__+0x700142>
+     5b2:	40 93 42 01 	sts	0x0142, r20	; 0x800142 <__TEXT_REGION_LENGTH__+0x700142>
 	DMA.CH3.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH2_gc;	//Triggered from TCC0 when it hits PER
-     5aa:	80 93 43 01 	sts	0x0143, r24	; 0x800143 <__TEXT_REGION_LENGTH__+0x700143>
+     5b6:	80 93 43 01 	sts	0x0143, r24	; 0x800143 <__TEXT_REGION_LENGTH__+0x700143>
 	DMA.CH3.TRFCNT = dacBuf_len;
-     5ae:	40 91 04 20 	lds	r20, 0x2004	; 0x802004 <dacBuf_len>
-     5b2:	50 91 05 20 	lds	r21, 0x2005	; 0x802005 <dacBuf_len+0x1>
-     5b6:	40 93 44 01 	sts	0x0144, r20	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
-     5ba:	50 93 45 01 	sts	0x0145, r21	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
+     5ba:	40 91 04 20 	lds	r20, 0x2004	; 0x802004 <dacBuf_len>
+     5be:	50 91 05 20 	lds	r21, 0x2005	; 0x802005 <dacBuf_len+0x1>
+     5c2:	40 93 44 01 	sts	0x0144, r20	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
+     5c6:	50 93 45 01 	sts	0x0145, r21	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
 
 	DMA.CH3.SRCADDR0 = (( (uint16_t) &dacBuf_CH1[0]) >> 0) & 0xFF; //Source address is dacbuf
-     5be:	4a e5       	ldi	r20, 0x5A	; 90
-     5c0:	52 e2       	ldi	r21, 0x22	; 34
-     5c2:	40 93 48 01 	sts	0x0148, r20	; 0x800148 <__TEXT_REGION_LENGTH__+0x700148>
+     5ca:	4a e5       	ldi	r20, 0x5A	; 90
+     5cc:	52 e2       	ldi	r21, 0x22	; 34
+     5ce:	40 93 48 01 	sts	0x0148, r20	; 0x800148 <__TEXT_REGION_LENGTH__+0x700148>
 	DMA.CH3.SRCADDR1 = (( (uint16_t) &dacBuf_CH1[0]) >> 8) & 0xFF;
-     5c6:	50 93 49 01 	sts	0x0149, r21	; 0x800149 <__TEXT_REGION_LENGTH__+0x700149>
+     5d2:	50 93 49 01 	sts	0x0149, r21	; 0x800149 <__TEXT_REGION_LENGTH__+0x700149>
 	DMA.CH3.SRCADDR2 = 0x00;
-     5ca:	10 92 4a 01 	sts	0x014A, r1	; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a>
+     5d6:	10 92 4a 01 	sts	0x014A, r1	; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a>
 	
 	DMA.CH3.DESTADDR0 = (( (uint16_t) &DACB.CH0DATAH) >> 0) & 0xFF;  //Dest address is high byte of DAC register
-     5ce:	29 e3       	ldi	r18, 0x39	; 57
-     5d0:	20 93 4c 01 	sts	0x014C, r18	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
+     5da:	29 e3       	ldi	r18, 0x39	; 57
+     5dc:	20 93 4c 01 	sts	0x014C, r18	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
 	DMA.CH3.DESTADDR1 = (( (uint16_t) &DACB.CH0DATAH) >> 8) & 0xFF;
-     5d4:	80 93 4d 01 	sts	0x014D, r24	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
+     5e0:	80 93 4d 01 	sts	0x014D, r24	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
 	DMA.CH3.DESTADDR2 = 0x00;
-     5d8:	10 92 4e 01 	sts	0x014E, r1	; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e>
+     5e4:	10 92 4e 01 	sts	0x014E, r1	; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e>
 	
 	//Must enable last for REPCNT won't work!
 	DMA.CH3.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!	
-     5dc:	2c 91       	ld	r18, X
-     5de:	20 68       	ori	r18, 0x80	; 128
-     5e0:	2c 93       	st	X, r18
+     5e8:	2c 91       	ld	r18, X
+     5ea:	20 68       	ori	r18, 0x80	; 128
+     5ec:	2c 93       	st	X, r18
 	
 	DMA.CH0.CTRLA = 0x00;
-     5e2:	10 8a       	std	Z+16, r1	; 0x10
+     5ee:	10 8a       	std	Z+16, r1	; 0x10
 	DMA.CH0.CTRLA = DMA_CH_RESET_bm;
-     5e4:	20 e4       	ldi	r18, 0x40	; 64
-     5e6:	20 8b       	std	Z+16, r18	; 0x10
+     5f0:	20 e4       	ldi	r18, 0x40	; 64
+     5f2:	20 8b       	std	Z+16, r18	; 0x10
 		
 	DMA.CH0.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm; //Do not repeat!
-     5e8:	24 e0       	ldi	r18, 0x04	; 4
-     5ea:	20 8b       	std	Z+16, r18	; 0x10
+     5f4:	24 e0       	ldi	r18, 0x04	; 4
+     5f6:	20 8b       	std	Z+16, r18	; 0x10
 	DMA.CH0.CTRLB = 0x03; //Hi interrupt!
-     5ec:	81 8b       	std	Z+17, r24	; 0x11
+     5f8:	81 8b       	std	Z+17, r24	; 0x11
 	DMA.CH0.ADDRCTRL = DMA_CH_SRCRELOAD_BURST_gc | DMA_CH_SRCDIR_INC_gc | DMA_CH_DESTDIR_INC_gc;   //Source reloads after each burst, with byte incrementing.  Dest does not reload, but does increment address.
-     5ee:	81 e9       	ldi	r24, 0x91	; 145
-     5f0:	82 8b       	std	Z+18, r24	; 0x12
+     5fa:	81 e9       	ldi	r24, 0x91	; 145
+     5fc:	82 8b       	std	Z+18, r24	; 0x12
 	DMA.CH0.TRIGSRC = DMA_CH_TRIGSRC_ADCA_CH0_gc;	//Triggered from ADCA channel 0
-     5f2:	80 e1       	ldi	r24, 0x10	; 16
-     5f4:	83 8b       	std	Z+19, r24	; 0x13
+     5fe:	80 e1       	ldi	r24, 0x10	; 16
+     600:	83 8b       	std	Z+19, r24	; 0x13
 	DMA.CH0.TRFCNT = HALFPACKET_SIZE;
-     5f6:	47 e7       	ldi	r20, 0x77	; 119
-     5f8:	51 e0       	ldi	r21, 0x01	; 1
-     5fa:	44 8b       	std	Z+20, r20	; 0x14
-     5fc:	55 8b       	std	Z+21, r21	; 0x15
+     602:	47 e7       	ldi	r20, 0x77	; 119
+     604:	51 e0       	ldi	r21, 0x01	; 1
+     606:	44 8b       	std	Z+20, r20	; 0x14
+     608:	55 8b       	std	Z+21, r21	; 0x15
 		
 	DMA.CH0.SRCADDR0 = (( (uint16_t) &ADCA.CH0.RESL) >> 0) & 0xFF; //Source address is ADC
-     5fe:	90 8f       	std	Z+24, r25	; 0x18
+     60a:	90 8f       	std	Z+24, r25	; 0x18
 	DMA.CH0.SRCADDR1 = (( (uint16_t) &ADCA.CH0.RESL) >> 8) & 0xFF;
-     600:	31 8f       	std	Z+25, r19	; 0x19
+     60c:	31 8f       	std	Z+25, r19	; 0x19
 	DMA.CH0.SRCADDR2 = 0x00;
-     602:	12 8e       	std	Z+26, r1	; 0x1a
+     60e:	12 8e       	std	Z+26, r1	; 0x1a
 		
 	DMA.CH0.DESTADDR0 = (( (uint16_t) &isoBuf[b1_state * PACKET_SIZE]) >> 0) & 0xFF;  //Dest address is isoBuf
-     604:	40 91 b5 20 	lds	r20, 0x20B5	; 0x8020b5 <b1_state>
-     608:	2e ee       	ldi	r18, 0xEE	; 238
-     60a:	32 e0       	ldi	r19, 0x02	; 2
-     60c:	42 9f       	mul	r20, r18
-     60e:	c0 01       	movw	r24, r0
-     610:	43 9f       	mul	r20, r19
-     612:	90 0d       	add	r25, r0
-     614:	11 24       	eor	r1, r1
-     616:	86 59       	subi	r24, 0x96	; 150
-     618:	99 4d       	sbci	r25, 0xD9	; 217
-     61a:	84 8f       	std	Z+28, r24	; 0x1c
+     610:	40 91 b5 20 	lds	r20, 0x20B5	; 0x8020b5 <b1_state>
+     614:	2e ee       	ldi	r18, 0xEE	; 238
+     616:	32 e0       	ldi	r19, 0x02	; 2
+     618:	42 9f       	mul	r20, r18
+     61a:	c0 01       	movw	r24, r0
+     61c:	43 9f       	mul	r20, r19
+     61e:	90 0d       	add	r25, r0
+     620:	11 24       	eor	r1, r1
+     622:	86 59       	subi	r24, 0x96	; 150
+     624:	99 4d       	sbci	r25, 0xD9	; 217
+     626:	84 8f       	std	Z+28, r24	; 0x1c
 	DMA.CH0.DESTADDR1 = (( (uint16_t) &isoBuf[b1_state * PACKET_SIZE]) >> 8) & 0xFF;
-     61c:	40 91 b5 20 	lds	r20, 0x20B5	; 0x8020b5 <b1_state>
-     620:	42 9f       	mul	r20, r18
-     622:	c0 01       	movw	r24, r0
-     624:	43 9f       	mul	r20, r19
-     626:	90 0d       	add	r25, r0
-     628:	11 24       	eor	r1, r1
-     62a:	86 59       	subi	r24, 0x96	; 150
-     62c:	99 4d       	sbci	r25, 0xD9	; 217
-     62e:	95 8f       	std	Z+29, r25	; 0x1d
+     628:	40 91 b5 20 	lds	r20, 0x20B5	; 0x8020b5 <b1_state>
+     62c:	42 9f       	mul	r20, r18
+     62e:	c0 01       	movw	r24, r0
+     630:	43 9f       	mul	r20, r19
+     632:	90 0d       	add	r25, r0
+     634:	11 24       	eor	r1, r1
+     636:	86 59       	subi	r24, 0x96	; 150
+     638:	99 4d       	sbci	r25, 0xD9	; 217
+     63a:	95 8f       	std	Z+29, r25	; 0x1d
 	DMA.CH0.DESTADDR2 = 0x00;
-     630:	16 8e       	std	Z+30, r1	; 0x1e
+     63c:	16 8e       	std	Z+30, r1	; 0x1e
 		
 	//Must enable last for REPCNT won't work!
 	DMA.CH0.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
-     632:	80 89       	ldd	r24, Z+16	; 0x10
-     634:	80 68       	ori	r24, 0x80	; 128
-     636:	80 8b       	std	Z+16, r24	; 0x10
-     638:	08 95       	ret
+     63e:	80 89       	ldd	r24, Z+16	; 0x10
+     640:	80 68       	ori	r24, 0x80	; 128
+     642:	80 8b       	std	Z+16, r24	; 0x10
+     644:	08 95       	ret
 
-0000063a <tiny_dma_loop_mode_0>:
+00000646 <tiny_dma_loop_mode_0>:
 }
 
 void tiny_dma_loop_mode_0(void){
-     63a:	08 95       	ret
+     646:	08 95       	ret
 
-0000063c <tiny_dma_set_mode_1>:
+00000648 <tiny_dma_set_mode_1>:
 	return;
 }
 
 void tiny_dma_set_mode_1(void){
-     63c:	cf 93       	push	r28
-     63e:	df 93       	push	r29
+     648:	cf 93       	push	r28
+     64a:	df 93       	push	r29
 	
 	global_mode = 1;
-     640:	81 e0       	ldi	r24, 0x01	; 1
-     642:	80 93 00 20 	sts	0x2000, r24	; 0x802000 <__data_start>
+     64c:	81 e0       	ldi	r24, 0x01	; 1
+     64e:	80 93 00 20 	sts	0x2000, r24	; 0x802000 <__data_start>
 	
 	tiny_dma_flush();
-     646:	76 df       	rcall	.-276    	; 0x534 <tiny_dma_flush>
+     652:	76 df       	rcall	.-276    	; 0x540 <tiny_dma_flush>
 	
 	//AUX channel (to keep it tx, therefore always rx)
 	DMA.CH2.CTRLA = 0x00;
-     648:	e0 e0       	ldi	r30, 0x00	; 0
-     64a:	f1 e0       	ldi	r31, 0x01	; 1
-     64c:	10 aa       	std	Z+48, r1	; 0x30
+     654:	e0 e0       	ldi	r30, 0x00	; 0
+     656:	f1 e0       	ldi	r31, 0x01	; 1
+     658:	10 aa       	std	Z+48, r1	; 0x30
 	DMA.CH2.CTRLA = DMA_CH_RESET_bm;
-     64e:	80 e4       	ldi	r24, 0x40	; 64
-     650:	80 ab       	std	Z+48, r24	; 0x30
+     65a:	80 e4       	ldi	r24, 0x40	; 64
+     65c:	80 ab       	std	Z+48, r24	; 0x30
 		
 	DMA.CH2.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm; //Do not repeat!
-     652:	94 e0       	ldi	r25, 0x04	; 4
-     654:	90 ab       	std	Z+48, r25	; 0x30
+     65e:	94 e0       	ldi	r25, 0x04	; 4
+     660:	90 ab       	std	Z+48, r25	; 0x30
 	DMA.CH2.CTRLB = 0x00;  //No int
-     656:	11 aa       	std	Z+49, r1	; 0x31
+     662:	11 aa       	std	Z+49, r1	; 0x31
 	DMA.CH2.ADDRCTRL = DMA_CH_SRCDIR_FIXED_gc | DMA_CH_DESTDIR_FIXED_gc;   //Source and address fixed.
-     658:	12 aa       	std	Z+50, r1	; 0x32
+     664:	12 aa       	std	Z+50, r1	; 0x32
 	DMA.CH2.TRIGSRC = DMA_CH_TRIGSRC_USARTC0_RXC_gc;
-     65a:	5b e4       	ldi	r21, 0x4B	; 75
-     65c:	53 ab       	std	Z+51, r21	; 0x33
+     666:	5b e4       	ldi	r21, 0x4B	; 75
+     668:	53 ab       	std	Z+51, r21	; 0x33
 	DMA.CH2.TRFCNT = 0;
-     65e:	14 aa       	std	Z+52, r1	; 0x34
-     660:	15 aa       	std	Z+53, r1	; 0x35
+     66a:	14 aa       	std	Z+52, r1	; 0x34
+     66c:	15 aa       	std	Z+53, r1	; 0x35
 	DMA.CH2.REPCNT = 0;
-     662:	16 aa       	std	Z+54, r1	; 0x36
+     66e:	16 aa       	std	Z+54, r1	; 0x36
 		
 	DMA.CH2.SRCADDR0 = (( (uint16_t) &dummy) >> 0) & 0xFF;
-     664:	21 e0       	ldi	r18, 0x01	; 1
-     666:	30 e2       	ldi	r19, 0x20	; 32
-     668:	20 af       	std	Z+56, r18	; 0x38
+     670:	21 e0       	ldi	r18, 0x01	; 1
+     672:	30 e2       	ldi	r19, 0x20	; 32
+     674:	20 af       	std	Z+56, r18	; 0x38
 	DMA.CH2.SRCADDR1 = (( (uint16_t) &dummy) >> 8) & 0xFF;
-     66a:	31 af       	std	Z+57, r19	; 0x39
+     676:	31 af       	std	Z+57, r19	; 0x39
 	DMA.CH2.SRCADDR2 = 0x00;
-     66c:	12 ae       	std	Z+58, r1	; 0x3a
+     678:	12 ae       	std	Z+58, r1	; 0x3a
 		
 	DMA.CH2.DESTADDR0 = (( (uint16_t) &USARTC0.DATA) >> 0) & 0xFF;
-     66e:	40 ea       	ldi	r20, 0xA0	; 160
-     670:	44 af       	std	Z+60, r20	; 0x3c
+     67a:	40 ea       	ldi	r20, 0xA0	; 160
+     67c:	44 af       	std	Z+60, r20	; 0x3c
 	DMA.CH2.DESTADDR1 = (( (uint16_t) &USARTC0.DATA) >> 8) & 0xFF;
-     672:	38 e0       	ldi	r19, 0x08	; 8
-     674:	30 93 3d 01 	sts	0x013D, r19	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
+     67e:	38 e0       	ldi	r19, 0x08	; 8
+     680:	30 93 3d 01 	sts	0x013D, r19	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
 	DMA.CH2.DESTADDR2 = 0x00;
-     678:	10 92 3e 01 	sts	0x013E, r1	; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e>
+     684:	10 92 3e 01 	sts	0x013E, r1	; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e>
 		
 	//Must enable last for REPCNT won't work!
 	DMA.CH2.CTRLA |= DMA_CH_REPEAT_bm | DMA_CH_ENABLE_bm;  //Enable!
-     67c:	80 a9       	ldd	r24, Z+48	; 0x30
-     67e:	80 6a       	ori	r24, 0xA0	; 160
-     680:	80 ab       	std	Z+48, r24	; 0x30
+     688:	80 a9       	ldd	r24, Z+48	; 0x30
+     68a:	80 6a       	ori	r24, 0xA0	; 160
+     68c:	80 ab       	std	Z+48, r24	; 0x30
 		
 	USARTC0.DATA = 0x55;
-     682:	85 e5       	ldi	r24, 0x55	; 85
-     684:	80 93 a0 08 	sts	0x08A0, r24	; 0x8008a0 <__TEXT_REGION_LENGTH__+0x7008a0>
+     68e:	85 e5       	ldi	r24, 0x55	; 85
+     690:	80 93 a0 08 	sts	0x08A0, r24	; 0x8008a0 <__TEXT_REGION_LENGTH__+0x7008a0>
 
 	
 	DMA.CH3.REPCNT = 0; //Repeat forever!
-     688:	10 92 46 01 	sts	0x0146, r1	; 0x800146 <__TEXT_REGION_LENGTH__+0x700146>
+     694:	10 92 46 01 	sts	0x0146, r1	; 0x800146 <__TEXT_REGION_LENGTH__+0x700146>
 	DMA.CH3.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm | DMA_CH_REPEAT_bm;
-     68c:	a0 e4       	ldi	r26, 0x40	; 64
-     68e:	b1 e0       	ldi	r27, 0x01	; 1
-     690:	c4 e2       	ldi	r28, 0x24	; 36
-     692:	cc 93       	st	X, r28
+     698:	a0 e4       	ldi	r26, 0x40	; 64
+     69a:	b1 e0       	ldi	r27, 0x01	; 1
+     69c:	c4 e2       	ldi	r28, 0x24	; 36
+     69e:	cc 93       	st	X, r28
 	DMA.CH3.CTRLB = 0x00; //No interrupt for DacBuf!!
-     694:	10 92 41 01 	sts	0x0141, r1	; 0x800141 <__TEXT_REGION_LENGTH__+0x700141>
+     6a0:	10 92 41 01 	sts	0x0141, r1	; 0x800141 <__TEXT_REGION_LENGTH__+0x700141>
 	DMA.CH3.ADDRCTRL = DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc | DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc;   //Dest reloads after each burst, with byte incrementing.  Src reloads at end of block, also incrementing address.
-     698:	89 e5       	ldi	r24, 0x59	; 89
-     69a:	80 93 42 01 	sts	0x0142, r24	; 0x800142 <__TEXT_REGION_LENGTH__+0x700142>
+     6a4:	89 e5       	ldi	r24, 0x59	; 89
+     6a6:	80 93 42 01 	sts	0x0142, r24	; 0x800142 <__TEXT_REGION_LENGTH__+0x700142>
 	DMA.CH3.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH1_gc;	//Triggered from TCC0 when it hits PER
-     69e:	82 e0       	ldi	r24, 0x02	; 2
-     6a0:	80 93 43 01 	sts	0x0143, r24	; 0x800143 <__TEXT_REGION_LENGTH__+0x700143>
+     6aa:	82 e0       	ldi	r24, 0x02	; 2
+     6ac:	80 93 43 01 	sts	0x0143, r24	; 0x800143 <__TEXT_REGION_LENGTH__+0x700143>
 	DMA.CH3.TRFCNT = auxDacBufLen;
-     6a4:	60 91 02 20 	lds	r22, 0x2002	; 0x802002 <auxDacBufLen>
-     6a8:	70 91 03 20 	lds	r23, 0x2003	; 0x802003 <auxDacBufLen+0x1>
-     6ac:	60 93 44 01 	sts	0x0144, r22	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
-     6b0:	70 93 45 01 	sts	0x0145, r23	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
+     6b0:	60 91 02 20 	lds	r22, 0x2002	; 0x802002 <auxDacBufLen>
+     6b4:	70 91 03 20 	lds	r23, 0x2003	; 0x802003 <auxDacBufLen+0x1>
+     6b8:	60 93 44 01 	sts	0x0144, r22	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
+     6bc:	70 93 45 01 	sts	0x0145, r23	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
 
 	DMA.CH3.SRCADDR0 = (( (uint16_t) &dacBuf_CH2[0]) >> 0) & 0xFF; //Source address is dacbuf
-     6b4:	6a e6       	ldi	r22, 0x6A	; 106
-     6b6:	74 e2       	ldi	r23, 0x24	; 36
-     6b8:	60 93 48 01 	sts	0x0148, r22	; 0x800148 <__TEXT_REGION_LENGTH__+0x700148>
+     6c0:	6a e6       	ldi	r22, 0x6A	; 106
+     6c2:	74 e2       	ldi	r23, 0x24	; 36
+     6c4:	60 93 48 01 	sts	0x0148, r22	; 0x800148 <__TEXT_REGION_LENGTH__+0x700148>
 	DMA.CH3.SRCADDR1 = (( (uint16_t) &dacBuf_CH2[0]) >> 8) & 0xFF;
-     6bc:	70 93 49 01 	sts	0x0149, r23	; 0x800149 <__TEXT_REGION_LENGTH__+0x700149>
+     6c8:	70 93 49 01 	sts	0x0149, r23	; 0x800149 <__TEXT_REGION_LENGTH__+0x700149>
 	DMA.CH3.SRCADDR2 = 0x00;
-     6c0:	10 92 4a 01 	sts	0x014A, r1	; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a>
+     6cc:	10 92 4a 01 	sts	0x014A, r1	; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a>
 	
 	DMA.CH3.DESTADDR0 = (( (uint16_t) &DACB.CH1DATAH) >> 0) & 0xFF;  //Dest address is high byte of DAC register
-     6c4:	2b e3       	ldi	r18, 0x3B	; 59
-     6c6:	20 93 4c 01 	sts	0x014C, r18	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
+     6d0:	2b e3       	ldi	r18, 0x3B	; 59
+     6d2:	20 93 4c 01 	sts	0x014C, r18	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
 	DMA.CH3.DESTADDR1 = (( (uint16_t) &DACB.CH1DATAH) >> 8) & 0xFF;
-     6ca:	63 e0       	ldi	r22, 0x03	; 3
-     6cc:	60 93 4d 01 	sts	0x014D, r22	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
+     6d6:	63 e0       	ldi	r22, 0x03	; 3
+     6d8:	60 93 4d 01 	sts	0x014D, r22	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
 	DMA.CH3.DESTADDR2 = 0x00;
-     6d0:	10 92 4e 01 	sts	0x014E, r1	; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e>
+     6dc:	10 92 4e 01 	sts	0x014E, r1	; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e>
 	
 	//Must enable last for REPCNT won't work!
 	DMA.CH3.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
-     6d4:	2c 91       	ld	r18, X
-     6d6:	20 68       	ori	r18, 0x80	; 128
-     6d8:	2c 93       	st	X, r18
+     6e0:	2c 91       	ld	r18, X
+     6e2:	20 68       	ori	r18, 0x80	; 128
+     6e4:	2c 93       	st	X, r18
 		
 	DMA.CH0.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm; //Do not repeat!
-     6da:	90 8b       	std	Z+16, r25	; 0x10
+     6e6:	90 8b       	std	Z+16, r25	; 0x10
 	DMA.CH0.CTRLB = 0x03; //Hi interrupt!
-     6dc:	61 8b       	std	Z+17, r22	; 0x11
+     6e8:	61 8b       	std	Z+17, r22	; 0x11
 	DMA.CH0.ADDRCTRL = DMA_CH_SRCRELOAD_BURST_gc | DMA_CH_SRCDIR_INC_gc | DMA_CH_DESTDIR_INC_gc;   //Source reloads after each burst, with byte incrementing.  Dest does not reload, but does increment address.
-     6de:	a1 e9       	ldi	r26, 0x91	; 145
-     6e0:	a2 8b       	std	Z+18, r26	; 0x12
+     6ea:	a1 e9       	ldi	r26, 0x91	; 145
+     6ec:	a2 8b       	std	Z+18, r26	; 0x12
 	DMA.CH0.TRIGSRC = DMA_CH_TRIGSRC_ADCA_CH0_gc;	//Triggered from ADCA channel 0
-     6e2:	20 e1       	ldi	r18, 0x10	; 16
-     6e4:	23 8b       	std	Z+19, r18	; 0x13
+     6ee:	20 e1       	ldi	r18, 0x10	; 16
+     6f0:	23 8b       	std	Z+19, r18	; 0x13
 	DMA.CH0.TRFCNT = HALFPACKET_SIZE;
-     6e6:	67 e7       	ldi	r22, 0x77	; 119
-     6e8:	71 e0       	ldi	r23, 0x01	; 1
-     6ea:	64 8b       	std	Z+20, r22	; 0x14
-     6ec:	75 8b       	std	Z+21, r23	; 0x15
+     6f2:	67 e7       	ldi	r22, 0x77	; 119
+     6f4:	71 e0       	ldi	r23, 0x01	; 1
+     6f6:	64 8b       	std	Z+20, r22	; 0x14
+     6f8:	75 8b       	std	Z+21, r23	; 0x15
 		
 	DMA.CH0.SRCADDR0 = (( (uint16_t) &ADCA.CH0.RESL) >> 0) & 0xFF; //Source address is ADC
-     6ee:	c0 8f       	std	Z+24, r28	; 0x18
+     6fa:	c0 8f       	std	Z+24, r28	; 0x18
 	DMA.CH0.SRCADDR1 = (( (uint16_t) &ADCA.CH0.RESL) >> 8) & 0xFF;
-     6f0:	81 8f       	std	Z+25, r24	; 0x19
+     6fc:	81 8f       	std	Z+25, r24	; 0x19
 	DMA.CH0.SRCADDR2 = 0x00;
-     6f2:	12 8e       	std	Z+26, r1	; 0x1a
+     6fe:	12 8e       	std	Z+26, r1	; 0x1a
 		
 	DMA.CH0.DESTADDR0 = (( (uint16_t) &isoBuf[0]) >> 0) & 0xFF;  //Dest address is isoBuf
-     6f4:	ca e6       	ldi	r28, 0x6A	; 106
-     6f6:	d6 e2       	ldi	r29, 0x26	; 38
-     6f8:	c4 8f       	std	Z+28, r28	; 0x1c
+     700:	ca e6       	ldi	r28, 0x6A	; 106
+     702:	d6 e2       	ldi	r29, 0x26	; 38
+     704:	c4 8f       	std	Z+28, r28	; 0x1c
 	DMA.CH0.DESTADDR1 = (( (uint16_t) &isoBuf[0]) >> 8) & 0xFF;
-     6fa:	d5 8f       	std	Z+29, r29	; 0x1d
+     706:	d5 8f       	std	Z+29, r29	; 0x1d
 	DMA.CH0.DESTADDR2 = 0x00;
-     6fc:	16 8e       	std	Z+30, r1	; 0x1e
+     708:	16 8e       	std	Z+30, r1	; 0x1e
 		
 	//Must enable last for REPCNT won't work!
 	DMA.CH0.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
-     6fe:	20 89       	ldd	r18, Z+16	; 0x10
-     700:	20 68       	ori	r18, 0x80	; 128
-     702:	20 8b       	std	Z+16, r18	; 0x10
+     70a:	20 89       	ldd	r18, Z+16	; 0x10
+     70c:	20 68       	ori	r18, 0x80	; 128
+     70e:	20 8b       	std	Z+16, r18	; 0x10
 		
 	DMA.CH1.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm; //Do not repeat!
-     704:	90 a3       	std	Z+32, r25	; 0x20
+     710:	90 a3       	std	Z+32, r25	; 0x20
 	DMA.CH1.CTRLB = 0x02; //Hi interrupt
-     706:	81 a3       	std	Z+33, r24	; 0x21
+     712:	81 a3       	std	Z+33, r24	; 0x21
 	DMA.CH1.ADDRCTRL = DMA_CH_SRCRELOAD_BURST_gc | DMA_CH_SRCDIR_INC_gc | DMA_CH_DESTDIR_INC_gc;   //Source reloads after each burst, with byte incrementing.  Dest does not reload, but does increment address.
-     708:	a2 a3       	std	Z+34, r26	; 0x22
+     714:	a2 a3       	std	Z+34, r26	; 0x22
 	DMA.CH1.TRIGSRC = DMA_CH_TRIGSRC_USARTC0_RXC_gc;
-     70a:	53 a3       	std	Z+35, r21	; 0x23
+     716:	53 a3       	std	Z+35, r21	; 0x23
 	DMA.CH1.TRFCNT = HALFPACKET_SIZE;
-     70c:	64 a3       	std	Z+36, r22	; 0x24
-     70e:	75 a3       	std	Z+37, r23	; 0x25
+     718:	64 a3       	std	Z+36, r22	; 0x24
+     71a:	75 a3       	std	Z+37, r23	; 0x25
 		
 	DMA.CH1.SRCADDR0 = (( (uint16_t) &USARTC0.DATA) >> 0) & 0xFF;
-     710:	40 a7       	std	Z+40, r20	; 0x28
+     71c:	40 a7       	std	Z+40, r20	; 0x28
 	DMA.CH1.SRCADDR1 = (( (uint16_t) &USARTC0.DATA) >> 8) & 0xFF;
-     712:	31 a7       	std	Z+41, r19	; 0x29
+     71e:	31 a7       	std	Z+41, r19	; 0x29
 	DMA.CH1.SRCADDR2 = 0x00;
-     714:	12 a6       	std	Z+42, r1	; 0x2a
+     720:	12 a6       	std	Z+42, r1	; 0x2a
 		
 	DMA.CH1.DESTADDR0 = (( (uint16_t) &isoBuf[HALFPACKET_SIZE]) >> 0) & 0xFF;  //Dest address is isoBuf
-     716:	81 ee       	ldi	r24, 0xE1	; 225
-     718:	97 e2       	ldi	r25, 0x27	; 39
-     71a:	84 a7       	std	Z+44, r24	; 0x2c
+     722:	81 ee       	ldi	r24, 0xE1	; 225
+     724:	97 e2       	ldi	r25, 0x27	; 39
+     726:	84 a7       	std	Z+44, r24	; 0x2c
 	DMA.CH1.DESTADDR1 = (( (uint16_t) &isoBuf[HALFPACKET_SIZE]) >> 8) & 0xFF;
-     71c:	95 a7       	std	Z+45, r25	; 0x2d
+     728:	95 a7       	std	Z+45, r25	; 0x2d
 	DMA.CH1.DESTADDR2 = 0x00;
-     71e:	16 a6       	std	Z+46, r1	; 0x2e
+     72a:	16 a6       	std	Z+46, r1	; 0x2e
 		
 	//Must enable last for REPCNT won't work!
 	DMA.CH1.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
-     720:	80 a1       	ldd	r24, Z+32	; 0x20
-     722:	80 68       	ori	r24, 0x80	; 128
-     724:	80 a3       	std	Z+32, r24	; 0x20
+     72c:	80 a1       	ldd	r24, Z+32	; 0x20
+     72e:	80 68       	ori	r24, 0x80	; 128
+     730:	80 a3       	std	Z+32, r24	; 0x20
 }
-     726:	df 91       	pop	r29
-     728:	cf 91       	pop	r28
-     72a:	08 95       	ret
+     732:	df 91       	pop	r29
+     734:	cf 91       	pop	r28
+     736:	08 95       	ret
 
-0000072c <tiny_dma_loop_mode_1>:
+00000738 <tiny_dma_loop_mode_1>:
 
 void tiny_dma_loop_mode_1(void){
-     72c:	08 95       	ret
+     738:	08 95       	ret
 
-0000072e <tiny_dma_set_mode_2>:
+0000073a <tiny_dma_set_mode_2>:
 	return;
 }
 
 void tiny_dma_set_mode_2(void){
-     72e:	cf 93       	push	r28
+     73a:	cf 93       	push	r28
 	
 	global_mode = 2;
-     730:	c2 e0       	ldi	r28, 0x02	; 2
-     732:	c0 93 00 20 	sts	0x2000, r28	; 0x802000 <__data_start>
+     73c:	c2 e0       	ldi	r28, 0x02	; 2
+     73e:	c0 93 00 20 	sts	0x2000, r28	; 0x802000 <__data_start>
 	
 	tiny_dma_flush();
-     736:	fe de       	rcall	.-516    	; 0x534 <tiny_dma_flush>
+     742:	fe de       	rcall	.-516    	; 0x540 <tiny_dma_flush>
 	
 	DMA.CH2.REPCNT = 0; //Repeat forever!
-     738:	e0 e0       	ldi	r30, 0x00	; 0
-     73a:	f1 e0       	ldi	r31, 0x01	; 1
-     73c:	16 aa       	std	Z+54, r1	; 0x36
+     744:	e0 e0       	ldi	r30, 0x00	; 0
+     746:	f1 e0       	ldi	r31, 0x01	; 1
+     748:	16 aa       	std	Z+54, r1	; 0x36
 	DMA.CH2.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm | DMA_CH_REPEAT_bm;
-     73e:	94 e2       	ldi	r25, 0x24	; 36
-     740:	90 ab       	std	Z+48, r25	; 0x30
+     74a:	94 e2       	ldi	r25, 0x24	; 36
+     74c:	90 ab       	std	Z+48, r25	; 0x30
 	DMA.CH2.CTRLB = 0x00; //Hi interrupt on block complete
-     742:	11 aa       	std	Z+49, r1	; 0x31
+     74e:	11 aa       	std	Z+49, r1	; 0x31
 	DMA.CH2.ADDRCTRL = DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc | DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc;   //Dest reloads after each burst, with byte incrementing.  Src reloads at end of block, also incrementing address.
-     744:	39 e5       	ldi	r19, 0x59	; 89
-     746:	32 ab       	std	Z+50, r19	; 0x32
+     750:	39 e5       	ldi	r19, 0x59	; 89
+     752:	32 ab       	std	Z+50, r19	; 0x32
 	DMA.CH2.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH2_gc;	//Triggered from TCC0 when it hits PER
-     748:	83 e0       	ldi	r24, 0x03	; 3
-     74a:	83 ab       	std	Z+51, r24	; 0x33
+     754:	83 e0       	ldi	r24, 0x03	; 3
+     756:	83 ab       	std	Z+51, r24	; 0x33
 	DMA.CH2.TRFCNT = dacBuf_len;
-     74c:	40 91 04 20 	lds	r20, 0x2004	; 0x802004 <dacBuf_len>
-     750:	50 91 05 20 	lds	r21, 0x2005	; 0x802005 <dacBuf_len+0x1>
-     754:	44 ab       	std	Z+52, r20	; 0x34
-     756:	55 ab       	std	Z+53, r21	; 0x35
+     758:	40 91 04 20 	lds	r20, 0x2004	; 0x802004 <dacBuf_len>
+     75c:	50 91 05 20 	lds	r21, 0x2005	; 0x802005 <dacBuf_len+0x1>
+     760:	44 ab       	std	Z+52, r20	; 0x34
+     762:	55 ab       	std	Z+53, r21	; 0x35
 
 	DMA.CH2.SRCADDR0 = (( (uint16_t) &dacBuf_CH1[0]) >> 0) & 0xFF; //Source address is dacbuf
-     758:	4a e5       	ldi	r20, 0x5A	; 90
-     75a:	52 e2       	ldi	r21, 0x22	; 34
-     75c:	40 af       	std	Z+56, r20	; 0x38
+     764:	4a e5       	ldi	r20, 0x5A	; 90
+     766:	52 e2       	ldi	r21, 0x22	; 34
+     768:	40 af       	std	Z+56, r20	; 0x38
 	DMA.CH2.SRCADDR1 = (( (uint16_t) &dacBuf_CH1[0]) >> 8) & 0xFF;
-     75e:	51 af       	std	Z+57, r21	; 0x39
+     76a:	51 af       	std	Z+57, r21	; 0x39
 	DMA.CH2.SRCADDR2 = 0x00;
-     760:	12 ae       	std	Z+58, r1	; 0x3a
+     76c:	12 ae       	std	Z+58, r1	; 0x3a
 		
 	DMA.CH2.DESTADDR0 = (( (uint16_t) &DACB.CH0DATAH) >> 0) & 0xFF;  //Dest address is high byte of DAC register
-     762:	29 e3       	ldi	r18, 0x39	; 57
-     764:	24 af       	std	Z+60, r18	; 0x3c
+     76e:	29 e3       	ldi	r18, 0x39	; 57
+     770:	24 af       	std	Z+60, r18	; 0x3c
 	DMA.CH2.DESTADDR1 = (( (uint16_t) &DACB.CH0DATAH) >> 8) & 0xFF;
-     766:	80 93 3d 01 	sts	0x013D, r24	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
+     772:	80 93 3d 01 	sts	0x013D, r24	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
 	DMA.CH2.DESTADDR2 = 0x00;
-     76a:	10 92 3e 01 	sts	0x013E, r1	; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e>
+     776:	10 92 3e 01 	sts	0x013E, r1	; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e>
 		
 	//Must enable last for REPCNT won't work!
 	DMA.CH2.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
-     76e:	20 a9       	ldd	r18, Z+48	; 0x30
-     770:	20 68       	ori	r18, 0x80	; 128
-     772:	20 ab       	std	Z+48, r18	; 0x30
+     77a:	20 a9       	ldd	r18, Z+48	; 0x30
+     77c:	20 68       	ori	r18, 0x80	; 128
+     77e:	20 ab       	std	Z+48, r18	; 0x30
 
 	
 	DMA.CH3.REPCNT = 0; //Repeat forever!
-     774:	10 92 46 01 	sts	0x0146, r1	; 0x800146 <__TEXT_REGION_LENGTH__+0x700146>
+     780:	10 92 46 01 	sts	0x0146, r1	; 0x800146 <__TEXT_REGION_LENGTH__+0x700146>
 	DMA.CH3.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm | DMA_CH_REPEAT_bm;
-     778:	a0 e4       	ldi	r26, 0x40	; 64
-     77a:	b1 e0       	ldi	r27, 0x01	; 1
-     77c:	9c 93       	st	X, r25
+     784:	a0 e4       	ldi	r26, 0x40	; 64
+     786:	b1 e0       	ldi	r27, 0x01	; 1
+     788:	9c 93       	st	X, r25
 	DMA.CH3.CTRLB = 0x00; //No interrupt for DacBuf!!
-     77e:	10 92 41 01 	sts	0x0141, r1	; 0x800141 <__TEXT_REGION_LENGTH__+0x700141>
+     78a:	10 92 41 01 	sts	0x0141, r1	; 0x800141 <__TEXT_REGION_LENGTH__+0x700141>
 	DMA.CH3.ADDRCTRL = DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc | DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc;   //Dest reloads after each burst, with byte incrementing.  Src reloads at end of block, also incrementing address.
-     782:	30 93 42 01 	sts	0x0142, r19	; 0x800142 <__TEXT_REGION_LENGTH__+0x700142>
+     78e:	30 93 42 01 	sts	0x0142, r19	; 0x800142 <__TEXT_REGION_LENGTH__+0x700142>
 	DMA.CH3.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH1_gc;	//Triggered from TCC0 when it hits PER
-     786:	c0 93 43 01 	sts	0x0143, r28	; 0x800143 <__TEXT_REGION_LENGTH__+0x700143>
+     792:	c0 93 43 01 	sts	0x0143, r28	; 0x800143 <__TEXT_REGION_LENGTH__+0x700143>
 	DMA.CH3.TRFCNT = auxDacBufLen;
-     78a:	20 91 02 20 	lds	r18, 0x2002	; 0x802002 <auxDacBufLen>
-     78e:	30 91 03 20 	lds	r19, 0x2003	; 0x802003 <auxDacBufLen+0x1>
-     792:	20 93 44 01 	sts	0x0144, r18	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
-     796:	30 93 45 01 	sts	0x0145, r19	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
+     796:	20 91 02 20 	lds	r18, 0x2002	; 0x802002 <auxDacBufLen>
+     79a:	30 91 03 20 	lds	r19, 0x2003	; 0x802003 <auxDacBufLen+0x1>
+     79e:	20 93 44 01 	sts	0x0144, r18	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
+     7a2:	30 93 45 01 	sts	0x0145, r19	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
 
 	DMA.CH3.SRCADDR0 = (( (uint16_t) &dacBuf_CH2[0]) >> 0) & 0xFF; //Source address is dacbuf
-     79a:	2a e6       	ldi	r18, 0x6A	; 106
-     79c:	34 e2       	ldi	r19, 0x24	; 36
-     79e:	20 93 48 01 	sts	0x0148, r18	; 0x800148 <__TEXT_REGION_LENGTH__+0x700148>
+     7a6:	2a e6       	ldi	r18, 0x6A	; 106
+     7a8:	34 e2       	ldi	r19, 0x24	; 36
+     7aa:	20 93 48 01 	sts	0x0148, r18	; 0x800148 <__TEXT_REGION_LENGTH__+0x700148>
 	DMA.CH3.SRCADDR1 = (( (uint16_t) &dacBuf_CH2[0]) >> 8) & 0xFF;
-     7a2:	30 93 49 01 	sts	0x0149, r19	; 0x800149 <__TEXT_REGION_LENGTH__+0x700149>
+     7ae:	30 93 49 01 	sts	0x0149, r19	; 0x800149 <__TEXT_REGION_LENGTH__+0x700149>
 	DMA.CH3.SRCADDR2 = 0x00;
-     7a6:	10 92 4a 01 	sts	0x014A, r1	; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a>
+     7b2:	10 92 4a 01 	sts	0x014A, r1	; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a>
 	
 	DMA.CH3.DESTADDR0 = (( (uint16_t) &DACB.CH1DATAH) >> 0) & 0xFF;  //Dest address is high byte of DAC register
-     7aa:	2b e3       	ldi	r18, 0x3B	; 59
-     7ac:	20 93 4c 01 	sts	0x014C, r18	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
+     7b6:	2b e3       	ldi	r18, 0x3B	; 59
+     7b8:	20 93 4c 01 	sts	0x014C, r18	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
 	DMA.CH3.DESTADDR1 = (( (uint16_t) &DACB.CH1DATAH) >> 8) & 0xFF;
-     7b0:	80 93 4d 01 	sts	0x014D, r24	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
+     7bc:	80 93 4d 01 	sts	0x014D, r24	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
 	DMA.CH3.DESTADDR2 = 0x00;
-     7b4:	10 92 4e 01 	sts	0x014E, r1	; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e>
+     7c0:	10 92 4e 01 	sts	0x014E, r1	; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e>
 	
 	//Must enable last for REPCNT won't work!
 	DMA.CH3.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
-     7b8:	2c 91       	ld	r18, X
-     7ba:	20 68       	ori	r18, 0x80	; 128
-     7bc:	2c 93       	st	X, r18
+     7c4:	2c 91       	ld	r18, X
+     7c6:	20 68       	ori	r18, 0x80	; 128
+     7c8:	2c 93       	st	X, r18
 		
 	DMA.CH0.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm; //Do not repeat!
-     7be:	54 e0       	ldi	r21, 0x04	; 4
-     7c0:	50 8b       	std	Z+16, r21	; 0x10
+     7ca:	54 e0       	ldi	r21, 0x04	; 4
+     7cc:	50 8b       	std	Z+16, r21	; 0x10
 	DMA.CH0.CTRLB = 0x03; //No interrupt!
-     7c2:	81 8b       	std	Z+17, r24	; 0x11
+     7ce:	81 8b       	std	Z+17, r24	; 0x11
 	DMA.CH0.ADDRCTRL = DMA_CH_SRCRELOAD_BURST_gc | DMA_CH_SRCDIR_INC_gc | DMA_CH_DESTDIR_INC_gc;   //Source reloads after each burst, with byte incrementing.  Dest does not reload, but does increment address.
-     7c4:	41 e9       	ldi	r20, 0x91	; 145
-     7c6:	42 8b       	std	Z+18, r20	; 0x12
+     7d0:	41 e9       	ldi	r20, 0x91	; 145
+     7d2:	42 8b       	std	Z+18, r20	; 0x12
 	DMA.CH0.TRIGSRC = DMA_CH_TRIGSRC_ADCA_CH0_gc;	//Triggered from ADCA channel 0
-     7c8:	80 e1       	ldi	r24, 0x10	; 16
-     7ca:	83 8b       	std	Z+19, r24	; 0x13
+     7d4:	80 e1       	ldi	r24, 0x10	; 16
+     7d6:	83 8b       	std	Z+19, r24	; 0x13
 	DMA.CH0.TRFCNT = HALFPACKET_SIZE;
-     7cc:	27 e7       	ldi	r18, 0x77	; 119
-     7ce:	31 e0       	ldi	r19, 0x01	; 1
-     7d0:	24 8b       	std	Z+20, r18	; 0x14
-     7d2:	35 8b       	std	Z+21, r19	; 0x15
+     7d8:	27 e7       	ldi	r18, 0x77	; 119
+     7da:	31 e0       	ldi	r19, 0x01	; 1
+     7dc:	24 8b       	std	Z+20, r18	; 0x14
+     7de:	35 8b       	std	Z+21, r19	; 0x15
 		
 	DMA.CH0.SRCADDR0 = (( (uint16_t) &ADCA.CH0.RESL) >> 0) & 0xFF; //Source address is ADC
-     7d4:	90 8f       	std	Z+24, r25	; 0x18
+     7e0:	90 8f       	std	Z+24, r25	; 0x18
 	DMA.CH0.SRCADDR1 = (( (uint16_t) &ADCA.CH0.RESL) >> 8) & 0xFF;
-     7d6:	c1 8f       	std	Z+25, r28	; 0x19
+     7e2:	c1 8f       	std	Z+25, r28	; 0x19
 	DMA.CH0.SRCADDR2 = 0x00;
-     7d8:	12 8e       	std	Z+26, r1	; 0x1a
+     7e4:	12 8e       	std	Z+26, r1	; 0x1a
 		
 	DMA.CH0.DESTADDR0 = (( (uint16_t) &isoBuf[0]) >> 0) & 0xFF;  //Dest address is isoBuf
-     7da:	8a e6       	ldi	r24, 0x6A	; 106
-     7dc:	96 e2       	ldi	r25, 0x26	; 38
-     7de:	84 8f       	std	Z+28, r24	; 0x1c
+     7e6:	8a e6       	ldi	r24, 0x6A	; 106
+     7e8:	96 e2       	ldi	r25, 0x26	; 38
+     7ea:	84 8f       	std	Z+28, r24	; 0x1c
 	DMA.CH0.DESTADDR1 = (( (uint16_t) &isoBuf[0]) >> 8) & 0xFF;
-     7e0:	95 8f       	std	Z+29, r25	; 0x1d
+     7ec:	95 8f       	std	Z+29, r25	; 0x1d
 	DMA.CH0.DESTADDR2 = 0x00;
-     7e2:	16 8e       	std	Z+30, r1	; 0x1e
+     7ee:	16 8e       	std	Z+30, r1	; 0x1e
 		
 	//Must enable last for REPCNT won't work!
 	DMA.CH0.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
-     7e4:	80 89       	ldd	r24, Z+16	; 0x10
-     7e6:	80 68       	ori	r24, 0x80	; 128
-     7e8:	80 8b       	std	Z+16, r24	; 0x10
+     7f0:	80 89       	ldd	r24, Z+16	; 0x10
+     7f2:	80 68       	ori	r24, 0x80	; 128
+     7f4:	80 8b       	std	Z+16, r24	; 0x10
 			
 	DMA.CH1.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm; //Do not repeat!
-     7ea:	50 a3       	std	Z+32, r21	; 0x20
+     7f6:	50 a3       	std	Z+32, r21	; 0x20
 	DMA.CH1.CTRLB = 0x02; //No interrupt!
-     7ec:	c1 a3       	std	Z+33, r28	; 0x21
+     7f8:	c1 a3       	std	Z+33, r28	; 0x21
 	DMA.CH1.ADDRCTRL = DMA_CH_SRCRELOAD_BURST_gc | DMA_CH_SRCDIR_INC_gc | DMA_CH_DESTDIR_INC_gc;   //Source reloads after each burst, with byte incrementing.  Dest does not reload, but does increment address.
-     7ee:	42 a3       	std	Z+34, r20	; 0x22
+     7fa:	42 a3       	std	Z+34, r20	; 0x22
 	DMA.CH1.TRIGSRC = DMA_CH_TRIGSRC_ADCA_CH2_gc;	//Triggered from ADCA channel 0
-     7f0:	82 e1       	ldi	r24, 0x12	; 18
-     7f2:	83 a3       	std	Z+35, r24	; 0x23
+     7fc:	82 e1       	ldi	r24, 0x12	; 18
+     7fe:	83 a3       	std	Z+35, r24	; 0x23
 	DMA.CH1.TRFCNT = HALFPACKET_SIZE;
-     7f4:	24 a3       	std	Z+36, r18	; 0x24
-     7f6:	35 a3       	std	Z+37, r19	; 0x25
+     800:	24 a3       	std	Z+36, r18	; 0x24
+     802:	35 a3       	std	Z+37, r19	; 0x25
 		
 	DMA.CH1.SRCADDR0 = (( (uint16_t) &ADCA.CH2.RESL) >> 0) & 0xFF; //Source address is ADC
-     7f8:	84 e3       	ldi	r24, 0x34	; 52
-     7fa:	80 a7       	std	Z+40, r24	; 0x28
+     804:	84 e3       	ldi	r24, 0x34	; 52
+     806:	80 a7       	std	Z+40, r24	; 0x28
 	DMA.CH1.SRCADDR1 = (( (uint16_t) &ADCA.CH2.RESL) >> 8) & 0xFF;
-     7fc:	c1 a7       	std	Z+41, r28	; 0x29
+     808:	c1 a7       	std	Z+41, r28	; 0x29
 	DMA.CH1.SRCADDR2 = 0x00;
-     7fe:	12 a6       	std	Z+42, r1	; 0x2a
+     80a:	12 a6       	std	Z+42, r1	; 0x2a
 		
 	DMA.CH1.DESTADDR0 = (( (uint16_t) &isoBuf[HALFPACKET_SIZE]) >> 0) & 0xFF;  //Dest address is isoBuf
-     800:	81 ee       	ldi	r24, 0xE1	; 225
-     802:	97 e2       	ldi	r25, 0x27	; 39
-     804:	84 a7       	std	Z+44, r24	; 0x2c
+     80c:	81 ee       	ldi	r24, 0xE1	; 225
+     80e:	97 e2       	ldi	r25, 0x27	; 39
+     810:	84 a7       	std	Z+44, r24	; 0x2c
 	DMA.CH1.DESTADDR1 = (( (uint16_t) &isoBuf[HALFPACKET_SIZE]) >> 8) & 0xFF;
-     806:	95 a7       	std	Z+45, r25	; 0x2d
+     812:	95 a7       	std	Z+45, r25	; 0x2d
 	DMA.CH1.DESTADDR2 = 0x00;
-     808:	16 a6       	std	Z+46, r1	; 0x2e
+     814:	16 a6       	std	Z+46, r1	; 0x2e
 		
 	//Must enable last for REPCNT won't work!
 	DMA.CH1.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!	
-     80a:	80 a1       	ldd	r24, Z+32	; 0x20
-     80c:	80 68       	ori	r24, 0x80	; 128
-     80e:	80 a3       	std	Z+32, r24	; 0x20
+     816:	80 a1       	ldd	r24, Z+32	; 0x20
+     818:	80 68       	ori	r24, 0x80	; 128
+     81a:	80 a3       	std	Z+32, r24	; 0x20
 }
-     810:	cf 91       	pop	r28
-     812:	08 95       	ret
+     81c:	cf 91       	pop	r28
+     81e:	08 95       	ret
 
-00000814 <tiny_dma_loop_mode_2>:
+00000820 <tiny_dma_loop_mode_2>:
 
 void tiny_dma_loop_mode_2(void){
-     814:	08 95       	ret
+     820:	08 95       	ret
 
-00000816 <tiny_dma_set_mode_3>:
+00000822 <tiny_dma_set_mode_3>:
 	return;
 }
 
 
 
 void tiny_dma_set_mode_3(void){
-     816:	cf 93       	push	r28
+     822:	cf 93       	push	r28
 	
 	global_mode = 3;
-     818:	c3 e0       	ldi	r28, 0x03	; 3
-     81a:	c0 93 00 20 	sts	0x2000, r28	; 0x802000 <__data_start>
+     824:	c3 e0       	ldi	r28, 0x03	; 3
+     826:	c0 93 00 20 	sts	0x2000, r28	; 0x802000 <__data_start>
 		
 	tiny_dma_flush();	
-     81e:	8a de       	rcall	.-748    	; 0x534 <tiny_dma_flush>
+     82a:	8a de       	rcall	.-748    	; 0x540 <tiny_dma_flush>
 	
 	//AUX channel (to keep it tx, therefore always rx)
 	DMA.CH1.CTRLA = 0x00;
-     820:	e0 e0       	ldi	r30, 0x00	; 0
-     822:	f1 e0       	ldi	r31, 0x01	; 1
-     824:	10 a2       	std	Z+32, r1	; 0x20
+     82c:	e0 e0       	ldi	r30, 0x00	; 0
+     82e:	f1 e0       	ldi	r31, 0x01	; 1
+     830:	10 a2       	std	Z+32, r1	; 0x20
 	DMA.CH1.CTRLA = DMA_CH_RESET_bm;
-     826:	50 e4       	ldi	r21, 0x40	; 64
-     828:	50 a3       	std	Z+32, r21	; 0x20
+     832:	50 e4       	ldi	r21, 0x40	; 64
+     834:	50 a3       	std	Z+32, r21	; 0x20
 	
 	DMA.CH1.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm; //Do not repeat!
-     82a:	44 e0       	ldi	r20, 0x04	; 4
-     82c:	40 a3       	std	Z+32, r20	; 0x20
+     836:	44 e0       	ldi	r20, 0x04	; 4
+     838:	40 a3       	std	Z+32, r20	; 0x20
 	DMA.CH1.CTRLB = 0x00;  //No int
-     82e:	11 a2       	std	Z+33, r1	; 0x21
+     83a:	11 a2       	std	Z+33, r1	; 0x21
 	DMA.CH1.ADDRCTRL = DMA_CH_SRCDIR_FIXED_gc | DMA_CH_DESTDIR_FIXED_gc;   //Source and address fixed.
-     830:	12 a2       	std	Z+34, r1	; 0x22
+     83c:	12 a2       	std	Z+34, r1	; 0x22
 	DMA.CH1.TRIGSRC = DMA_CH_TRIGSRC_USARTC0_RXC_gc;
-     832:	3b e4       	ldi	r19, 0x4B	; 75
-     834:	33 a3       	std	Z+35, r19	; 0x23
+     83e:	3b e4       	ldi	r19, 0x4B	; 75
+     840:	33 a3       	std	Z+35, r19	; 0x23
 	DMA.CH1.TRFCNT = 0;
-     836:	14 a2       	std	Z+36, r1	; 0x24
-     838:	15 a2       	std	Z+37, r1	; 0x25
+     842:	14 a2       	std	Z+36, r1	; 0x24
+     844:	15 a2       	std	Z+37, r1	; 0x25
 	DMA.CH1.REPCNT = 0;
-     83a:	16 a2       	std	Z+38, r1	; 0x26
+     846:	16 a2       	std	Z+38, r1	; 0x26
 	
 	DMA.CH1.SRCADDR0 = (( (uint16_t) &dummy) >> 0) & 0xFF;
-     83c:	81 e0       	ldi	r24, 0x01	; 1
-     83e:	90 e2       	ldi	r25, 0x20	; 32
-     840:	80 a7       	std	Z+40, r24	; 0x28
+     848:	81 e0       	ldi	r24, 0x01	; 1
+     84a:	90 e2       	ldi	r25, 0x20	; 32
+     84c:	80 a7       	std	Z+40, r24	; 0x28
 	DMA.CH1.SRCADDR1 = (( (uint16_t) &dummy) >> 8) & 0xFF;
-     842:	91 a7       	std	Z+41, r25	; 0x29
+     84e:	91 a7       	std	Z+41, r25	; 0x29
 	DMA.CH1.SRCADDR2 = 0x00;
-     844:	12 a6       	std	Z+42, r1	; 0x2a
+     850:	12 a6       	std	Z+42, r1	; 0x2a
 	
 	DMA.CH1.DESTADDR0 = (( (uint16_t) &USARTC0.DATA) >> 0) & 0xFF;
-     846:	20 ea       	ldi	r18, 0xA0	; 160
-     848:	24 a7       	std	Z+44, r18	; 0x2c
+     852:	20 ea       	ldi	r18, 0xA0	; 160
+     854:	24 a7       	std	Z+44, r18	; 0x2c
 	DMA.CH1.DESTADDR1 = (( (uint16_t) &USARTC0.DATA) >> 8) & 0xFF;
-     84a:	98 e0       	ldi	r25, 0x08	; 8
-     84c:	95 a7       	std	Z+45, r25	; 0x2d
+     856:	98 e0       	ldi	r25, 0x08	; 8
+     858:	95 a7       	std	Z+45, r25	; 0x2d
 	DMA.CH1.DESTADDR2 = 0x00;
-     84e:	16 a6       	std	Z+46, r1	; 0x2e
+     85a:	16 a6       	std	Z+46, r1	; 0x2e
 	
 	//Must enable last for REPCNT won't work!
 	DMA.CH1.CTRLA |= DMA_CH_REPEAT_bm | DMA_CH_ENABLE_bm;  //Enable!
-     850:	80 a1       	ldd	r24, Z+32	; 0x20
-     852:	80 6a       	ori	r24, 0xA0	; 160
-     854:	80 a3       	std	Z+32, r24	; 0x20
+     85c:	80 a1       	ldd	r24, Z+32	; 0x20
+     85e:	80 6a       	ori	r24, 0xA0	; 160
+     860:	80 a3       	std	Z+32, r24	; 0x20
 	
 	USARTC0.DATA = 0x55;
-     856:	85 e5       	ldi	r24, 0x55	; 85
-     858:	80 93 a0 08 	sts	0x08A0, r24	; 0x8008a0 <__TEXT_REGION_LENGTH__+0x7008a0>
+     862:	85 e5       	ldi	r24, 0x55	; 85
+     864:	80 93 a0 08 	sts	0x08A0, r24	; 0x8008a0 <__TEXT_REGION_LENGTH__+0x7008a0>
 	
 	DMA.CH2.REPCNT = 0; //Repeat forever!
-     85c:	16 aa       	std	Z+54, r1	; 0x36
+     868:	16 aa       	std	Z+54, r1	; 0x36
 	DMA.CH2.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm | DMA_CH_REPEAT_bm;
-     85e:	74 e2       	ldi	r23, 0x24	; 36
-     860:	70 ab       	std	Z+48, r23	; 0x30
+     86a:	74 e2       	ldi	r23, 0x24	; 36
+     86c:	70 ab       	std	Z+48, r23	; 0x30
 	DMA.CH2.CTRLB = 0x00; //No interrupt for DacBuf!!
-     862:	11 aa       	std	Z+49, r1	; 0x31
+     86e:	11 aa       	std	Z+49, r1	; 0x31
 	DMA.CH2.ADDRCTRL = DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc | DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc;   //Dest reloads after each burst, with byte incrementing.  Src reloads at end of block, also incrementing address.
-     864:	69 e5       	ldi	r22, 0x59	; 89
-     866:	62 ab       	std	Z+50, r22	; 0x32
+     870:	69 e5       	ldi	r22, 0x59	; 89
+     872:	62 ab       	std	Z+50, r22	; 0x32
 	DMA.CH2.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH1_gc;	//Triggered from TCC0 when it hits PER
-     868:	82 e0       	ldi	r24, 0x02	; 2
-     86a:	83 ab       	std	Z+51, r24	; 0x33
+     874:	82 e0       	ldi	r24, 0x02	; 2
+     876:	83 ab       	std	Z+51, r24	; 0x33
 	DMA.CH2.TRFCNT = auxDacBufLen;
-     86c:	a0 91 02 20 	lds	r26, 0x2002	; 0x802002 <auxDacBufLen>
-     870:	b0 91 03 20 	lds	r27, 0x2003	; 0x802003 <auxDacBufLen+0x1>
-     874:	a4 ab       	std	Z+52, r26	; 0x34
-     876:	b5 ab       	std	Z+53, r27	; 0x35
+     878:	a0 91 02 20 	lds	r26, 0x2002	; 0x802002 <auxDacBufLen>
+     87c:	b0 91 03 20 	lds	r27, 0x2003	; 0x802003 <auxDacBufLen+0x1>
+     880:	a4 ab       	std	Z+52, r26	; 0x34
+     882:	b5 ab       	std	Z+53, r27	; 0x35
 
 	DMA.CH2.SRCADDR0 = (( (uint16_t) &dacBuf_CH2[0]) >> 0) & 0xFF; //Source address is dacbuf
-     878:	aa e6       	ldi	r26, 0x6A	; 106
-     87a:	b4 e2       	ldi	r27, 0x24	; 36
-     87c:	a0 af       	std	Z+56, r26	; 0x38
+     884:	aa e6       	ldi	r26, 0x6A	; 106
+     886:	b4 e2       	ldi	r27, 0x24	; 36
+     888:	a0 af       	std	Z+56, r26	; 0x38
 	DMA.CH2.SRCADDR1 = (( (uint16_t) &dacBuf_CH2[0]) >> 8) & 0xFF;
-     87e:	b1 af       	std	Z+57, r27	; 0x39
+     88a:	b1 af       	std	Z+57, r27	; 0x39
 	DMA.CH2.SRCADDR2 = 0x00;
-     880:	12 ae       	std	Z+58, r1	; 0x3a
+     88c:	12 ae       	std	Z+58, r1	; 0x3a
 	
 	DMA.CH2.DESTADDR0 = (( (uint16_t) &DACB.CH1DATAH) >> 0) & 0xFF;  //Dest address is high byte of DAC register
-     882:	8b e3       	ldi	r24, 0x3B	; 59
-     884:	84 af       	std	Z+60, r24	; 0x3c
+     88e:	8b e3       	ldi	r24, 0x3B	; 59
+     890:	84 af       	std	Z+60, r24	; 0x3c
 	DMA.CH2.DESTADDR1 = (( (uint16_t) &DACB.CH1DATAH) >> 8) & 0xFF;
-     886:	c0 93 3d 01 	sts	0x013D, r28	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
+     892:	c0 93 3d 01 	sts	0x013D, r28	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
 	DMA.CH2.DESTADDR2 = 0x00;
-     88a:	10 92 3e 01 	sts	0x013E, r1	; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e>
+     896:	10 92 3e 01 	sts	0x013E, r1	; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e>
 	
 	//Must enable last for REPCNT won't work!
 	DMA.CH2.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
-     88e:	80 a9       	ldd	r24, Z+48	; 0x30
-     890:	80 68       	ori	r24, 0x80	; 128
-     892:	80 ab       	std	Z+48, r24	; 0x30
+     89a:	80 a9       	ldd	r24, Z+48	; 0x30
+     89c:	80 68       	ori	r24, 0x80	; 128
+     89e:	80 ab       	std	Z+48, r24	; 0x30
 	
 	DMA.CH3.REPCNT = 0; //Repeat forever!
-     894:	10 92 46 01 	sts	0x0146, r1	; 0x800146 <__TEXT_REGION_LENGTH__+0x700146>
+     8a0:	10 92 46 01 	sts	0x0146, r1	; 0x800146 <__TEXT_REGION_LENGTH__+0x700146>
 	DMA.CH3.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm | DMA_CH_REPEAT_bm;
-     898:	a0 e4       	ldi	r26, 0x40	; 64
-     89a:	b1 e0       	ldi	r27, 0x01	; 1
-     89c:	7c 93       	st	X, r23
+     8a4:	a0 e4       	ldi	r26, 0x40	; 64
+     8a6:	b1 e0       	ldi	r27, 0x01	; 1
+     8a8:	7c 93       	st	X, r23
 	DMA.CH3.CTRLB = 0x00; //Hi interrupt on block complete
-     89e:	10 92 41 01 	sts	0x0141, r1	; 0x800141 <__TEXT_REGION_LENGTH__+0x700141>
+     8aa:	10 92 41 01 	sts	0x0141, r1	; 0x800141 <__TEXT_REGION_LENGTH__+0x700141>
 	DMA.CH3.ADDRCTRL = DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc | DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc;   //Dest reloads after each burst, with byte incrementing.  Src reloads at end of block, also incrementing address.
-     8a2:	60 93 42 01 	sts	0x0142, r22	; 0x800142 <__TEXT_REGION_LENGTH__+0x700142>
+     8ae:	60 93 42 01 	sts	0x0142, r22	; 0x800142 <__TEXT_REGION_LENGTH__+0x700142>
 	DMA.CH3.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH2_gc;	//Triggered from TCC0 when it hits PER
-     8a6:	c0 93 43 01 	sts	0x0143, r28	; 0x800143 <__TEXT_REGION_LENGTH__+0x700143>
+     8b2:	c0 93 43 01 	sts	0x0143, r28	; 0x800143 <__TEXT_REGION_LENGTH__+0x700143>
 	DMA.CH3.TRFCNT = dacBuf_len;
-     8aa:	60 91 04 20 	lds	r22, 0x2004	; 0x802004 <dacBuf_len>
-     8ae:	70 91 05 20 	lds	r23, 0x2005	; 0x802005 <dacBuf_len+0x1>
-     8b2:	60 93 44 01 	sts	0x0144, r22	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
-     8b6:	70 93 45 01 	sts	0x0145, r23	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
+     8b6:	60 91 04 20 	lds	r22, 0x2004	; 0x802004 <dacBuf_len>
+     8ba:	70 91 05 20 	lds	r23, 0x2005	; 0x802005 <dacBuf_len+0x1>
+     8be:	60 93 44 01 	sts	0x0144, r22	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
+     8c2:	70 93 45 01 	sts	0x0145, r23	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
 
 	DMA.CH3.SRCADDR0 = (( (uint16_t) &dacBuf_CH1[0]) >> 0) & 0xFF; //Source address is dacbuf
-     8ba:	6a e5       	ldi	r22, 0x5A	; 90
-     8bc:	72 e2       	ldi	r23, 0x22	; 34
-     8be:	60 93 48 01 	sts	0x0148, r22	; 0x800148 <__TEXT_REGION_LENGTH__+0x700148>
+     8c6:	6a e5       	ldi	r22, 0x5A	; 90
+     8c8:	72 e2       	ldi	r23, 0x22	; 34
+     8ca:	60 93 48 01 	sts	0x0148, r22	; 0x800148 <__TEXT_REGION_LENGTH__+0x700148>
 	DMA.CH3.SRCADDR1 = (( (uint16_t) &dacBuf_CH1[0]) >> 8) & 0xFF;
-     8c2:	70 93 49 01 	sts	0x0149, r23	; 0x800149 <__TEXT_REGION_LENGTH__+0x700149>
+     8ce:	70 93 49 01 	sts	0x0149, r23	; 0x800149 <__TEXT_REGION_LENGTH__+0x700149>
 	DMA.CH3.SRCADDR2 = 0x00;
-     8c6:	10 92 4a 01 	sts	0x014A, r1	; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a>
+     8d2:	10 92 4a 01 	sts	0x014A, r1	; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a>
 	
 	DMA.CH3.DESTADDR0 = (( (uint16_t) &DACB.CH0DATAH) >> 0) & 0xFF;  //Dest address is high byte of DAC register
-     8ca:	89 e3       	ldi	r24, 0x39	; 57
-     8cc:	80 93 4c 01 	sts	0x014C, r24	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
+     8d6:	89 e3       	ldi	r24, 0x39	; 57
+     8d8:	80 93 4c 01 	sts	0x014C, r24	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
 	DMA.CH3.DESTADDR1 = (( (uint16_t) &DACB.CH0DATAH) >> 8) & 0xFF;
-     8d0:	c0 93 4d 01 	sts	0x014D, r28	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
+     8dc:	c0 93 4d 01 	sts	0x014D, r28	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
 	DMA.CH3.DESTADDR2 = 0x00;
-     8d4:	10 92 4e 01 	sts	0x014E, r1	; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e>
+     8e0:	10 92 4e 01 	sts	0x014E, r1	; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e>
 	
 	//Must enable last for REPCNT won't work!
 	DMA.CH3.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
-     8d8:	8c 91       	ld	r24, X
-     8da:	80 68       	ori	r24, 0x80	; 128
-     8dc:	8c 93       	st	X, r24
+     8e4:	8c 91       	ld	r24, X
+     8e6:	80 68       	ori	r24, 0x80	; 128
+     8e8:	8c 93       	st	X, r24
 	
 	//Actual data being transferred
 	DMA.CH0.CTRLA = 0x00;
-     8de:	10 8a       	std	Z+16, r1	; 0x10
+     8ea:	10 8a       	std	Z+16, r1	; 0x10
 	DMA.CH0.CTRLA = DMA_CH_RESET_bm;
-     8e0:	50 8b       	std	Z+16, r21	; 0x10
+     8ec:	50 8b       	std	Z+16, r21	; 0x10
 		
 	DMA.CH0.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm; //Do not repeat!
-     8e2:	40 8b       	std	Z+16, r20	; 0x10
+     8ee:	40 8b       	std	Z+16, r20	; 0x10
 	DMA.CH0.CTRLB = 0x03; //Hi interrupt
-     8e4:	c1 8b       	std	Z+17, r28	; 0x11
+     8f0:	c1 8b       	std	Z+17, r28	; 0x11
 	DMA.CH0.ADDRCTRL = DMA_CH_SRCRELOAD_BURST_gc | DMA_CH_SRCDIR_INC_gc | DMA_CH_DESTDIR_INC_gc;   //Source reloads after each burst, with byte incrementing.  Dest does not reload, but does increment address.
-     8e6:	81 e9       	ldi	r24, 0x91	; 145
-     8e8:	82 8b       	std	Z+18, r24	; 0x12
+     8f2:	81 e9       	ldi	r24, 0x91	; 145
+     8f4:	82 8b       	std	Z+18, r24	; 0x12
 	DMA.CH0.TRIGSRC = DMA_CH_TRIGSRC_USARTC0_RXC_gc;
-     8ea:	33 8b       	std	Z+19, r19	; 0x13
+     8f6:	33 8b       	std	Z+19, r19	; 0x13
 	DMA.CH0.TRFCNT = HALFPACKET_SIZE;
-     8ec:	47 e7       	ldi	r20, 0x77	; 119
-     8ee:	51 e0       	ldi	r21, 0x01	; 1
-     8f0:	44 8b       	std	Z+20, r20	; 0x14
-     8f2:	55 8b       	std	Z+21, r21	; 0x15
+     8f8:	47 e7       	ldi	r20, 0x77	; 119
+     8fa:	51 e0       	ldi	r21, 0x01	; 1
+     8fc:	44 8b       	std	Z+20, r20	; 0x14
+     8fe:	55 8b       	std	Z+21, r21	; 0x15
 		
 	DMA.CH0.SRCADDR0 = (( (uint16_t) &USARTC0.DATA) >> 0) & 0xFF; //Source address is ADC
-     8f4:	20 8f       	std	Z+24, r18	; 0x18
+     900:	20 8f       	std	Z+24, r18	; 0x18
 	DMA.CH0.SRCADDR1 = (( (uint16_t) &USARTC0.DATA) >> 8) & 0xFF;
-     8f6:	91 8f       	std	Z+25, r25	; 0x19
+     902:	91 8f       	std	Z+25, r25	; 0x19
 	DMA.CH0.SRCADDR2 = 0x00;
-     8f8:	12 8e       	std	Z+26, r1	; 0x1a
+     904:	12 8e       	std	Z+26, r1	; 0x1a
 		
 	DMA.CH0.DESTADDR0 = (( (uint16_t) &isoBuf[0]) >> 0) & 0xFF;  //Dest address is isoBuf
-     8fa:	8a e6       	ldi	r24, 0x6A	; 106
-     8fc:	96 e2       	ldi	r25, 0x26	; 38
-     8fe:	84 8f       	std	Z+28, r24	; 0x1c
+     906:	8a e6       	ldi	r24, 0x6A	; 106
+     908:	96 e2       	ldi	r25, 0x26	; 38
+     90a:	84 8f       	std	Z+28, r24	; 0x1c
 	DMA.CH0.DESTADDR1 = (( (uint16_t) &isoBuf[0]) >> 8) & 0xFF;
-     900:	95 8f       	std	Z+29, r25	; 0x1d
+     90c:	95 8f       	std	Z+29, r25	; 0x1d
 	DMA.CH0.DESTADDR2 = 0x00;
-     902:	16 8e       	std	Z+30, r1	; 0x1e
+     90e:	16 8e       	std	Z+30, r1	; 0x1e
 		
 	//Must enable last for REPCNT won't work!
 	DMA.CH0.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
-     904:	80 89       	ldd	r24, Z+16	; 0x10
-     906:	80 68       	ori	r24, 0x80	; 128
-     908:	80 8b       	std	Z+16, r24	; 0x10
+     910:	80 89       	ldd	r24, Z+16	; 0x10
+     912:	80 68       	ori	r24, 0x80	; 128
+     914:	80 8b       	std	Z+16, r24	; 0x10
 
 
 }
-     90a:	cf 91       	pop	r28
-     90c:	08 95       	ret
+     916:	cf 91       	pop	r28
+     918:	08 95       	ret
 
-0000090e <tiny_dma_loop_mode_3>:
+0000091a <tiny_dma_loop_mode_3>:
 
 void tiny_dma_loop_mode_3(void){
-     90e:	08 95       	ret
+     91a:	08 95       	ret
 
-00000910 <tiny_dma_set_mode_4>:
+0000091c <tiny_dma_set_mode_4>:
 	return;
 }
 
 void tiny_dma_set_mode_4(void){
-     910:	cf 93       	push	r28
+     91c:	cf 93       	push	r28
 	
 	global_mode = 4;
-     912:	c4 e0       	ldi	r28, 0x04	; 4
-     914:	c0 93 00 20 	sts	0x2000, r28	; 0x802000 <__data_start>
+     91e:	c4 e0       	ldi	r28, 0x04	; 4
+     920:	c0 93 00 20 	sts	0x2000, r28	; 0x802000 <__data_start>
 	
 	tiny_dma_flush();
-     918:	0d de       	rcall	.-998    	; 0x534 <tiny_dma_flush>
+     924:	0d de       	rcall	.-998    	; 0x540 <tiny_dma_flush>
 	
 	//AUX channel (to keep it tx, therefore always rx)
 	DMA.CH1.CTRLA = 0x00;
-     91a:	e0 e0       	ldi	r30, 0x00	; 0
-     91c:	f1 e0       	ldi	r31, 0x01	; 1
-     91e:	10 a2       	std	Z+32, r1	; 0x20
+     926:	e0 e0       	ldi	r30, 0x00	; 0
+     928:	f1 e0       	ldi	r31, 0x01	; 1
+     92a:	10 a2       	std	Z+32, r1	; 0x20
 	DMA.CH1.CTRLA = DMA_CH_RESET_bm;
-     920:	20 e4       	ldi	r18, 0x40	; 64
-     922:	20 a3       	std	Z+32, r18	; 0x20
+     92c:	20 e4       	ldi	r18, 0x40	; 64
+     92e:	20 a3       	std	Z+32, r18	; 0x20
 	
 	DMA.CH1.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm; //Do not repeat!
-     924:	c0 a3       	std	Z+32, r28	; 0x20
+     930:	c0 a3       	std	Z+32, r28	; 0x20
 	DMA.CH1.CTRLB = 0x00;  //No int
-     926:	11 a2       	std	Z+33, r1	; 0x21
+     932:	11 a2       	std	Z+33, r1	; 0x21
 	DMA.CH1.ADDRCTRL = DMA_CH_SRCDIR_FIXED_gc | DMA_CH_DESTDIR_FIXED_gc;   //Source and address fixed.
-     928:	12 a2       	std	Z+34, r1	; 0x22
+     934:	12 a2       	std	Z+34, r1	; 0x22
 	DMA.CH1.TRIGSRC = DMA_CH_TRIGSRC_USARTC0_RXC_gc;
-     92a:	4b e4       	ldi	r20, 0x4B	; 75
-     92c:	43 a3       	std	Z+35, r20	; 0x23
+     936:	4b e4       	ldi	r20, 0x4B	; 75
+     938:	43 a3       	std	Z+35, r20	; 0x23
 	DMA.CH1.TRFCNT = 0;
-     92e:	14 a2       	std	Z+36, r1	; 0x24
-     930:	15 a2       	std	Z+37, r1	; 0x25
+     93a:	14 a2       	std	Z+36, r1	; 0x24
+     93c:	15 a2       	std	Z+37, r1	; 0x25
 	DMA.CH1.REPCNT = 0;
-     932:	16 a2       	std	Z+38, r1	; 0x26
+     93e:	16 a2       	std	Z+38, r1	; 0x26
 	
 	DMA.CH1.SRCADDR0 = (( (uint16_t) &dummy) >> 0) & 0xFF;
-     934:	81 e0       	ldi	r24, 0x01	; 1
-     936:	90 e2       	ldi	r25, 0x20	; 32
-     938:	80 a7       	std	Z+40, r24	; 0x28
+     940:	81 e0       	ldi	r24, 0x01	; 1
+     942:	90 e2       	ldi	r25, 0x20	; 32
+     944:	80 a7       	std	Z+40, r24	; 0x28
 	DMA.CH1.SRCADDR1 = (( (uint16_t) &dummy) >> 8) & 0xFF;
-     93a:	91 a7       	std	Z+41, r25	; 0x29
+     946:	91 a7       	std	Z+41, r25	; 0x29
 	DMA.CH1.SRCADDR2 = 0x00;
-     93c:	12 a6       	std	Z+42, r1	; 0x2a
+     948:	12 a6       	std	Z+42, r1	; 0x2a
 	
 	DMA.CH1.DESTADDR0 = (( (uint16_t) &USARTC0.DATA) >> 0) & 0xFF;
-     93e:	70 ea       	ldi	r23, 0xA0	; 160
-     940:	74 a7       	std	Z+44, r23	; 0x2c
+     94a:	70 ea       	ldi	r23, 0xA0	; 160
+     94c:	74 a7       	std	Z+44, r23	; 0x2c
 	DMA.CH1.DESTADDR1 = (( (uint16_t) &USARTC0.DATA) >> 8) & 0xFF;
-     942:	88 e0       	ldi	r24, 0x08	; 8
-     944:	85 a7       	std	Z+45, r24	; 0x2d
+     94e:	88 e0       	ldi	r24, 0x08	; 8
+     950:	85 a7       	std	Z+45, r24	; 0x2d
 	DMA.CH1.DESTADDR2 = 0x00;
-     946:	16 a6       	std	Z+46, r1	; 0x2e
+     952:	16 a6       	std	Z+46, r1	; 0x2e
 	
 	//Must enable last for REPCNT won't work!
 	DMA.CH1.CTRLA |= DMA_CH_REPEAT_bm | DMA_CH_ENABLE_bm;  //Enable!
-     948:	90 a1       	ldd	r25, Z+32	; 0x20
-     94a:	90 6a       	ori	r25, 0xA0	; 160
-     94c:	90 a3       	std	Z+32, r25	; 0x20
+     954:	90 a1       	ldd	r25, Z+32	; 0x20
+     956:	90 6a       	ori	r25, 0xA0	; 160
+     958:	90 a3       	std	Z+32, r25	; 0x20
 		
 	DMA.CH2.REPCNT = 0; //Repeat forever!
-     94e:	16 aa       	std	Z+54, r1	; 0x36
+     95a:	16 aa       	std	Z+54, r1	; 0x36
 	DMA.CH2.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm | DMA_CH_REPEAT_bm;
-     950:	94 e2       	ldi	r25, 0x24	; 36
-     952:	90 ab       	std	Z+48, r25	; 0x30
+     95c:	94 e2       	ldi	r25, 0x24	; 36
+     95e:	90 ab       	std	Z+48, r25	; 0x30
 	DMA.CH2.CTRLB = 0x00; //No interrupt for DacBuf!!
-     954:	11 aa       	std	Z+49, r1	; 0x31
+     960:	11 aa       	std	Z+49, r1	; 0x31
 	DMA.CH2.ADDRCTRL = DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc | DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc;   //Dest reloads after each burst, with byte incrementing.  Src reloads at end of block, also incrementing address.
-     956:	99 e5       	ldi	r25, 0x59	; 89
-     958:	92 ab       	std	Z+50, r25	; 0x32
+     962:	99 e5       	ldi	r25, 0x59	; 89
+     964:	92 ab       	std	Z+50, r25	; 0x32
 	DMA.CH2.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH1_gc;	//Triggered from TCC0 when it hits PER
-     95a:	92 e0       	ldi	r25, 0x02	; 2
-     95c:	93 ab       	std	Z+51, r25	; 0x33
+     966:	92 e0       	ldi	r25, 0x02	; 2
+     968:	93 ab       	std	Z+51, r25	; 0x33
 	DMA.CH2.TRFCNT = auxDacBufLen;
-     95e:	a0 91 02 20 	lds	r26, 0x2002	; 0x802002 <auxDacBufLen>
-     962:	b0 91 03 20 	lds	r27, 0x2003	; 0x802003 <auxDacBufLen+0x1>
-     966:	a4 ab       	std	Z+52, r26	; 0x34
-     968:	b5 ab       	std	Z+53, r27	; 0x35
+     96a:	a0 91 02 20 	lds	r26, 0x2002	; 0x802002 <auxDacBufLen>
+     96e:	b0 91 03 20 	lds	r27, 0x2003	; 0x802003 <auxDacBufLen+0x1>
+     972:	a4 ab       	std	Z+52, r26	; 0x34
+     974:	b5 ab       	std	Z+53, r27	; 0x35
 
 	DMA.CH2.SRCADDR0 = (( (uint16_t) &dacBuf_CH2[0]) >> 0) & 0xFF; //Source address is dacbuf
-     96a:	aa e6       	ldi	r26, 0x6A	; 106
-     96c:	b4 e2       	ldi	r27, 0x24	; 36
-     96e:	a0 af       	std	Z+56, r26	; 0x38
+     976:	aa e6       	ldi	r26, 0x6A	; 106
+     978:	b4 e2       	ldi	r27, 0x24	; 36
+     97a:	a0 af       	std	Z+56, r26	; 0x38
 	DMA.CH2.SRCADDR1 = (( (uint16_t) &dacBuf_CH2[0]) >> 8) & 0xFF;
-     970:	b1 af       	std	Z+57, r27	; 0x39
+     97c:	b1 af       	std	Z+57, r27	; 0x39
 	DMA.CH2.SRCADDR2 = 0x00;
-     972:	12 ae       	std	Z+58, r1	; 0x3a
+     97e:	12 ae       	std	Z+58, r1	; 0x3a
 	
 	DMA.CH2.DESTADDR0 = (( (uint16_t) &DACB.CH1DATAH) >> 0) & 0xFF;  //Dest address is high byte of DAC register
-     974:	9b e3       	ldi	r25, 0x3B	; 59
-     976:	94 af       	std	Z+60, r25	; 0x3c
+     980:	9b e3       	ldi	r25, 0x3B	; 59
+     982:	94 af       	std	Z+60, r25	; 0x3c
 	DMA.CH2.DESTADDR1 = (( (uint16_t) &DACB.CH1DATAH) >> 8) & 0xFF;
-     978:	93 e0       	ldi	r25, 0x03	; 3
-     97a:	90 93 3d 01 	sts	0x013D, r25	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
+     984:	93 e0       	ldi	r25, 0x03	; 3
+     986:	90 93 3d 01 	sts	0x013D, r25	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
 	DMA.CH2.DESTADDR2 = 0x00;
-     97e:	10 92 3e 01 	sts	0x013E, r1	; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e>
+     98a:	10 92 3e 01 	sts	0x013E, r1	; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e>
 	
 	//Must enable last for REPCNT won't work!
 	DMA.CH2.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
-     982:	30 a9       	ldd	r19, Z+48	; 0x30
-     984:	30 68       	ori	r19, 0x80	; 128
-     986:	30 ab       	std	Z+48, r19	; 0x30
+     98e:	30 a9       	ldd	r19, Z+48	; 0x30
+     990:	30 68       	ori	r19, 0x80	; 128
+     992:	30 ab       	std	Z+48, r19	; 0x30
 	
 	//Actual data being transferred
 	DMA.CH0.CTRLA = 0x00;
-     988:	10 8a       	std	Z+16, r1	; 0x10
+     994:	10 8a       	std	Z+16, r1	; 0x10
 	DMA.CH0.CTRLA = DMA_CH_RESET_bm;
-     98a:	20 8b       	std	Z+16, r18	; 0x10
+     996:	20 8b       	std	Z+16, r18	; 0x10
 		
 	DMA.CH0.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm; //Do not repeat!
-     98c:	c0 8b       	std	Z+16, r28	; 0x10
+     998:	c0 8b       	std	Z+16, r28	; 0x10
 	DMA.CH0.CTRLB = 0x03; //No interrupt
-     98e:	91 8b       	std	Z+17, r25	; 0x11
+     99a:	91 8b       	std	Z+17, r25	; 0x11
 	DMA.CH0.ADDRCTRL = DMA_CH_SRCRELOAD_BURST_gc | DMA_CH_SRCDIR_INC_gc | DMA_CH_DESTDIR_INC_gc;   //Source reloads after each burst, with byte incrementing.  Dest does not reload, but does increment address.
-     990:	61 e9       	ldi	r22, 0x91	; 145
-     992:	62 8b       	std	Z+18, r22	; 0x12
+     99c:	61 e9       	ldi	r22, 0x91	; 145
+     99e:	62 8b       	std	Z+18, r22	; 0x12
 	DMA.CH0.TRIGSRC = DMA_CH_TRIGSRC_USARTC0_RXC_gc;
-     994:	43 8b       	std	Z+19, r20	; 0x13
+     9a0:	43 8b       	std	Z+19, r20	; 0x13
 	DMA.CH0.TRFCNT = HALFPACKET_SIZE;
-     996:	47 e7       	ldi	r20, 0x77	; 119
-     998:	51 e0       	ldi	r21, 0x01	; 1
-     99a:	44 8b       	std	Z+20, r20	; 0x14
-     99c:	55 8b       	std	Z+21, r21	; 0x15
+     9a2:	47 e7       	ldi	r20, 0x77	; 119
+     9a4:	51 e0       	ldi	r21, 0x01	; 1
+     9a6:	44 8b       	std	Z+20, r20	; 0x14
+     9a8:	55 8b       	std	Z+21, r21	; 0x15
 		
 	DMA.CH0.SRCADDR0 = (( (uint16_t) &USARTC0.DATA) >> 0) & 0xFF; //Source address is ADC
-     99e:	70 8f       	std	Z+24, r23	; 0x18
+     9aa:	70 8f       	std	Z+24, r23	; 0x18
 	DMA.CH0.SRCADDR1 = (( (uint16_t) &USARTC0.DATA) >> 8) & 0xFF;
-     9a0:	81 8f       	std	Z+25, r24	; 0x19
+     9ac:	81 8f       	std	Z+25, r24	; 0x19
 	DMA.CH0.SRCADDR2 = 0x00;
-     9a2:	12 8e       	std	Z+26, r1	; 0x1a
+     9ae:	12 8e       	std	Z+26, r1	; 0x1a
 		
 	DMA.CH0.DESTADDR0 = (( (uint16_t) &isoBuf[0]) >> 0) & 0xFF;  //Dest address is isoBuf
-     9a4:	aa e6       	ldi	r26, 0x6A	; 106
-     9a6:	b6 e2       	ldi	r27, 0x26	; 38
-     9a8:	a4 8f       	std	Z+28, r26	; 0x1c
+     9b0:	aa e6       	ldi	r26, 0x6A	; 106
+     9b2:	b6 e2       	ldi	r27, 0x26	; 38
+     9b4:	a4 8f       	std	Z+28, r26	; 0x1c
 	DMA.CH0.DESTADDR1 = (( (uint16_t) &isoBuf[0]) >> 8) & 0xFF;
-     9aa:	b5 8f       	std	Z+29, r27	; 0x1d
+     9b6:	b5 8f       	std	Z+29, r27	; 0x1d
 	DMA.CH0.DESTADDR2 = 0x00;
-     9ac:	16 8e       	std	Z+30, r1	; 0x1e
+     9b8:	16 8e       	std	Z+30, r1	; 0x1e
 		
 	//Must enable last for REPCNT won't work!
 	DMA.CH0.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
-     9ae:	30 89       	ldd	r19, Z+16	; 0x10
-     9b0:	30 68       	ori	r19, 0x80	; 128
-     9b2:	30 8b       	std	Z+16, r19	; 0x10
+     9ba:	30 89       	ldd	r19, Z+16	; 0x10
+     9bc:	30 68       	ori	r19, 0x80	; 128
+     9be:	30 8b       	std	Z+16, r19	; 0x10
 		
 	//Actual data being transferred
 	DMA.CH3.CTRLA = 0x00;
-     9b4:	e0 e4       	ldi	r30, 0x40	; 64
-     9b6:	f1 e0       	ldi	r31, 0x01	; 1
-     9b8:	10 82       	st	Z, r1
+     9c0:	e0 e4       	ldi	r30, 0x40	; 64
+     9c2:	f1 e0       	ldi	r31, 0x01	; 1
+     9c4:	10 82       	st	Z, r1
 	DMA.CH3.CTRLA = DMA_CH_RESET_bm;
-     9ba:	20 83       	st	Z, r18
+     9c6:	20 83       	st	Z, r18
 		
 	DMA.CH3.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm; //Do not repeat!
-     9bc:	c0 83       	st	Z, r28
+     9c8:	c0 83       	st	Z, r28
 	DMA.CH3.CTRLB = 0x03; //No interrupt
-     9be:	90 93 41 01 	sts	0x0141, r25	; 0x800141 <__TEXT_REGION_LENGTH__+0x700141>
+     9ca:	90 93 41 01 	sts	0x0141, r25	; 0x800141 <__TEXT_REGION_LENGTH__+0x700141>
 	DMA.CH3.ADDRCTRL = DMA_CH_SRCRELOAD_BURST_gc | DMA_CH_SRCDIR_INC_gc | DMA_CH_DESTDIR_INC_gc;   //Source reloads after each burst, with byte incrementing.  Dest does not reload, but does increment address.
-     9c2:	60 93 42 01 	sts	0x0142, r22	; 0x800142 <__TEXT_REGION_LENGTH__+0x700142>
+     9ce:	60 93 42 01 	sts	0x0142, r22	; 0x800142 <__TEXT_REGION_LENGTH__+0x700142>
 	DMA.CH3.TRIGSRC = DMA_CH_TRIGSRC_SPIC_gc;
-     9c6:	9a e4       	ldi	r25, 0x4A	; 74
-     9c8:	90 93 43 01 	sts	0x0143, r25	; 0x800143 <__TEXT_REGION_LENGTH__+0x700143>
+     9d2:	9a e4       	ldi	r25, 0x4A	; 74
+     9d4:	90 93 43 01 	sts	0x0143, r25	; 0x800143 <__TEXT_REGION_LENGTH__+0x700143>
 	DMA.CH3.TRFCNT = HALFPACKET_SIZE;
-     9cc:	40 93 44 01 	sts	0x0144, r20	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
-     9d0:	50 93 45 01 	sts	0x0145, r21	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
+     9d8:	40 93 44 01 	sts	0x0144, r20	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
+     9dc:	50 93 45 01 	sts	0x0145, r21	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
 		
 	DMA.CH3.SRCADDR0 = (( (uint16_t) &SPIC.DATA) >> 0) & 0xFF; //Source address is ADC
-     9d4:	93 ec       	ldi	r25, 0xC3	; 195
-     9d6:	90 93 48 01 	sts	0x0148, r25	; 0x800148 <__TEXT_REGION_LENGTH__+0x700148>
+     9e0:	93 ec       	ldi	r25, 0xC3	; 195
+     9e2:	90 93 48 01 	sts	0x0148, r25	; 0x800148 <__TEXT_REGION_LENGTH__+0x700148>
 	DMA.CH3.SRCADDR1 = (( (uint16_t) &SPIC.DATA) >> 8) & 0xFF;
-     9da:	80 93 49 01 	sts	0x0149, r24	; 0x800149 <__TEXT_REGION_LENGTH__+0x700149>
+     9e6:	80 93 49 01 	sts	0x0149, r24	; 0x800149 <__TEXT_REGION_LENGTH__+0x700149>
 	DMA.CH3.SRCADDR2 = 0x00;
-     9de:	10 92 4a 01 	sts	0x014A, r1	; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a>
+     9ea:	10 92 4a 01 	sts	0x014A, r1	; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a>
 		
 	DMA.CH3.DESTADDR0 = (( (uint16_t) &isoBuf[HALFPACKET_SIZE]) >> 0) & 0xFF;  //Dest address is isoBuf
-     9e2:	81 ee       	ldi	r24, 0xE1	; 225
-     9e4:	97 e2       	ldi	r25, 0x27	; 39
-     9e6:	80 93 4c 01 	sts	0x014C, r24	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
+     9ee:	81 ee       	ldi	r24, 0xE1	; 225
+     9f0:	97 e2       	ldi	r25, 0x27	; 39
+     9f2:	80 93 4c 01 	sts	0x014C, r24	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
 	DMA.CH3.DESTADDR1 = (( (uint16_t) &isoBuf[HALFPACKET_SIZE]) >> 8) & 0xFF;
-     9ea:	90 93 4d 01 	sts	0x014D, r25	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
+     9f6:	90 93 4d 01 	sts	0x014D, r25	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
 	DMA.CH3.DESTADDR2 = 0x00;
-     9ee:	10 92 4e 01 	sts	0x014E, r1	; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e>
+     9fa:	10 92 4e 01 	sts	0x014E, r1	; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e>
 		
 	//Must enable last for REPCNT won't work!
 	DMA.CH3.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
-     9f2:	80 81       	ld	r24, Z
-     9f4:	80 68       	ori	r24, 0x80	; 128
-     9f6:	80 83       	st	Z, r24
+     9fe:	80 81       	ld	r24, Z
+     a00:	80 68       	ori	r24, 0x80	; 128
+     a02:	80 83       	st	Z, r24
 }
-     9f8:	cf 91       	pop	r28
-     9fa:	08 95       	ret
+     a04:	cf 91       	pop	r28
+     a06:	08 95       	ret
 
-000009fc <tiny_dma_loop_mode_4>:
+00000a08 <tiny_dma_loop_mode_4>:
 
 void tiny_dma_loop_mode_4(void){
-     9fc:	08 95       	ret
+     a08:	08 95       	ret
 
-000009fe <tiny_dma_set_mode_5>:
+00000a0a <tiny_dma_set_mode_5>:
 	return;
 }	
 	
 void tiny_dma_set_mode_5(void){
 	global_mode = 5;
-     9fe:	85 e0       	ldi	r24, 0x05	; 5
-     a00:	80 93 00 20 	sts	0x2000, r24	; 0x802000 <__data_start>
+     a0a:	85 e0       	ldi	r24, 0x05	; 5
+     a0c:	80 93 00 20 	sts	0x2000, r24	; 0x802000 <__data_start>
 		
 	tiny_dma_flush();
-     a04:	97 dd       	rcall	.-1234   	; 0x534 <tiny_dma_flush>
+     a10:	97 dd       	rcall	.-1234   	; 0x540 <tiny_dma_flush>
 	
 	DMA.CH2.REPCNT = 0; //Repeat forever!
-     a06:	e0 e0       	ldi	r30, 0x00	; 0
-     a08:	f1 e0       	ldi	r31, 0x01	; 1
-     a0a:	16 aa       	std	Z+54, r1	; 0x36
+     a12:	e0 e0       	ldi	r30, 0x00	; 0
+     a14:	f1 e0       	ldi	r31, 0x01	; 1
+     a16:	16 aa       	std	Z+54, r1	; 0x36
 	DMA.CH2.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm | DMA_CH_REPEAT_bm;
-     a0c:	34 e2       	ldi	r19, 0x24	; 36
-     a0e:	30 ab       	std	Z+48, r19	; 0x30
+     a18:	34 e2       	ldi	r19, 0x24	; 36
+     a1a:	30 ab       	std	Z+48, r19	; 0x30
 	DMA.CH2.CTRLB = 0x00; //Hi interrupt on block complete
-     a10:	11 aa       	std	Z+49, r1	; 0x31
+     a1c:	11 aa       	std	Z+49, r1	; 0x31
 	DMA.CH2.ADDRCTRL = DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc | DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc;   //Dest reloads after each burst, with byte incrementing.  Src reloads at end of block, also incrementing address.
-     a12:	29 e5       	ldi	r18, 0x59	; 89
-     a14:	22 ab       	std	Z+50, r18	; 0x32
+     a1e:	29 e5       	ldi	r18, 0x59	; 89
+     a20:	22 ab       	std	Z+50, r18	; 0x32
 	DMA.CH2.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH2_gc;	//Triggered from TCC0 when it hits PER
-     a16:	83 e0       	ldi	r24, 0x03	; 3
-     a18:	83 ab       	std	Z+51, r24	; 0x33
+     a22:	83 e0       	ldi	r24, 0x03	; 3
+     a24:	83 ab       	std	Z+51, r24	; 0x33
 	DMA.CH2.TRFCNT = dacBuf_len;
-     a1a:	40 91 04 20 	lds	r20, 0x2004	; 0x802004 <dacBuf_len>
-     a1e:	50 91 05 20 	lds	r21, 0x2005	; 0x802005 <dacBuf_len+0x1>
-     a22:	44 ab       	std	Z+52, r20	; 0x34
-     a24:	55 ab       	std	Z+53, r21	; 0x35
+     a26:	40 91 04 20 	lds	r20, 0x2004	; 0x802004 <dacBuf_len>
+     a2a:	50 91 05 20 	lds	r21, 0x2005	; 0x802005 <dacBuf_len+0x1>
+     a2e:	44 ab       	std	Z+52, r20	; 0x34
+     a30:	55 ab       	std	Z+53, r21	; 0x35
 
 	DMA.CH2.SRCADDR0 = (( (uint16_t) &dacBuf_CH1[0]) >> 0) & 0xFF; //Source address is dacbuf
-     a26:	4a e5       	ldi	r20, 0x5A	; 90
-     a28:	52 e2       	ldi	r21, 0x22	; 34
-     a2a:	40 af       	std	Z+56, r20	; 0x38
+     a32:	4a e5       	ldi	r20, 0x5A	; 90
+     a34:	52 e2       	ldi	r21, 0x22	; 34
+     a36:	40 af       	std	Z+56, r20	; 0x38
 	DMA.CH2.SRCADDR1 = (( (uint16_t) &dacBuf_CH1[0]) >> 8) & 0xFF;
-     a2c:	51 af       	std	Z+57, r21	; 0x39
+     a38:	51 af       	std	Z+57, r21	; 0x39
 	DMA.CH2.SRCADDR2 = 0x00;
-     a2e:	12 ae       	std	Z+58, r1	; 0x3a
+     a3a:	12 ae       	std	Z+58, r1	; 0x3a
 	
 	DMA.CH2.DESTADDR0 = (( (uint16_t) &DACB.CH0DATAH) >> 0) & 0xFF;  //Dest address is high byte of DAC register
-     a30:	99 e3       	ldi	r25, 0x39	; 57
-     a32:	94 af       	std	Z+60, r25	; 0x3c
+     a3c:	99 e3       	ldi	r25, 0x39	; 57
+     a3e:	94 af       	std	Z+60, r25	; 0x3c
 	DMA.CH2.DESTADDR1 = (( (uint16_t) &DACB.CH0DATAH) >> 8) & 0xFF;
-     a34:	80 93 3d 01 	sts	0x013D, r24	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
+     a40:	80 93 3d 01 	sts	0x013D, r24	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
 	DMA.CH2.DESTADDR2 = 0x00;
-     a38:	10 92 3e 01 	sts	0x013E, r1	; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e>
+     a44:	10 92 3e 01 	sts	0x013E, r1	; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e>
 	
 	//Must enable last for REPCNT won't work!
 	DMA.CH2.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
-     a3c:	90 a9       	ldd	r25, Z+48	; 0x30
-     a3e:	90 68       	ori	r25, 0x80	; 128
-     a40:	90 ab       	std	Z+48, r25	; 0x30
+     a48:	90 a9       	ldd	r25, Z+48	; 0x30
+     a4a:	90 68       	ori	r25, 0x80	; 128
+     a4c:	90 ab       	std	Z+48, r25	; 0x30
 		
 	DMA.CH3.REPCNT = 0; //Repeat forever!
-     a42:	10 92 46 01 	sts	0x0146, r1	; 0x800146 <__TEXT_REGION_LENGTH__+0x700146>
+     a4e:	10 92 46 01 	sts	0x0146, r1	; 0x800146 <__TEXT_REGION_LENGTH__+0x700146>
 	DMA.CH3.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm | DMA_CH_REPEAT_bm;
-     a46:	e0 e4       	ldi	r30, 0x40	; 64
-     a48:	f1 e0       	ldi	r31, 0x01	; 1
-     a4a:	30 83       	st	Z, r19
+     a52:	e0 e4       	ldi	r30, 0x40	; 64
+     a54:	f1 e0       	ldi	r31, 0x01	; 1
+     a56:	30 83       	st	Z, r19
 	DMA.CH3.CTRLB = 0x00; //No interrupt for DacBuf!!
-     a4c:	10 92 41 01 	sts	0x0141, r1	; 0x800141 <__TEXT_REGION_LENGTH__+0x700141>
+     a58:	10 92 41 01 	sts	0x0141, r1	; 0x800141 <__TEXT_REGION_LENGTH__+0x700141>
 	DMA.CH3.ADDRCTRL = DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc | DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc;   //Dest reloads after each burst, with byte incrementing.  Src reloads at end of block, also incrementing address.
-     a50:	20 93 42 01 	sts	0x0142, r18	; 0x800142 <__TEXT_REGION_LENGTH__+0x700142>
+     a5c:	20 93 42 01 	sts	0x0142, r18	; 0x800142 <__TEXT_REGION_LENGTH__+0x700142>
 	DMA.CH3.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH2_gc;	//Triggered from TCC0 when it hits PER
-     a54:	80 93 43 01 	sts	0x0143, r24	; 0x800143 <__TEXT_REGION_LENGTH__+0x700143>
+     a60:	80 93 43 01 	sts	0x0143, r24	; 0x800143 <__TEXT_REGION_LENGTH__+0x700143>
 	DMA.CH3.TRFCNT = dacBuf_len;
-     a58:	20 91 04 20 	lds	r18, 0x2004	; 0x802004 <dacBuf_len>
-     a5c:	30 91 05 20 	lds	r19, 0x2005	; 0x802005 <dacBuf_len+0x1>
-     a60:	20 93 44 01 	sts	0x0144, r18	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
-     a64:	30 93 45 01 	sts	0x0145, r19	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
+     a64:	20 91 04 20 	lds	r18, 0x2004	; 0x802004 <dacBuf_len>
+     a68:	30 91 05 20 	lds	r19, 0x2005	; 0x802005 <dacBuf_len+0x1>
+     a6c:	20 93 44 01 	sts	0x0144, r18	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
+     a70:	30 93 45 01 	sts	0x0145, r19	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
 
 	DMA.CH3.SRCADDR0 = (( (uint16_t) &dacBuf_CH2[0]) >> 0) & 0xFF; //Source address is dacbuf
-     a68:	2a e6       	ldi	r18, 0x6A	; 106
-     a6a:	34 e2       	ldi	r19, 0x24	; 36
-     a6c:	20 93 48 01 	sts	0x0148, r18	; 0x800148 <__TEXT_REGION_LENGTH__+0x700148>
+     a74:	2a e6       	ldi	r18, 0x6A	; 106
+     a76:	34 e2       	ldi	r19, 0x24	; 36
+     a78:	20 93 48 01 	sts	0x0148, r18	; 0x800148 <__TEXT_REGION_LENGTH__+0x700148>
 	DMA.CH3.SRCADDR1 = (( (uint16_t) &dacBuf_CH2[0]) >> 8) & 0xFF;
-     a70:	30 93 49 01 	sts	0x0149, r19	; 0x800149 <__TEXT_REGION_LENGTH__+0x700149>
+     a7c:	30 93 49 01 	sts	0x0149, r19	; 0x800149 <__TEXT_REGION_LENGTH__+0x700149>
 	DMA.CH3.SRCADDR2 = 0x00;
-     a74:	10 92 4a 01 	sts	0x014A, r1	; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a>
+     a80:	10 92 4a 01 	sts	0x014A, r1	; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a>
 		
 	DMA.CH3.DESTADDR0 = (( (uint16_t) &DACB.CH1DATAH) >> 0) & 0xFF;  //Dest address is high byte of DAC register
-     a78:	9b e3       	ldi	r25, 0x3B	; 59
-     a7a:	90 93 4c 01 	sts	0x014C, r25	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
+     a84:	9b e3       	ldi	r25, 0x3B	; 59
+     a86:	90 93 4c 01 	sts	0x014C, r25	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
 	DMA.CH3.DESTADDR1 = (( (uint16_t) &DACB.CH1DATAH) >> 8) & 0xFF;
-     a7e:	80 93 4d 01 	sts	0x014D, r24	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
+     a8a:	80 93 4d 01 	sts	0x014D, r24	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
 	DMA.CH3.DESTADDR2 = 0x00;
-     a82:	10 92 4e 01 	sts	0x014E, r1	; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e>
+     a8e:	10 92 4e 01 	sts	0x014E, r1	; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e>
 		
 	//Must enable last for REPCNT won't work!
 	DMA.CH3.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
-     a86:	80 81       	ld	r24, Z
-     a88:	80 68       	ori	r24, 0x80	; 128
-     a8a:	80 83       	st	Z, r24
-     a8c:	08 95       	ret
+     a92:	80 81       	ld	r24, Z
+     a94:	80 68       	ori	r24, 0x80	; 128
+     a96:	80 83       	st	Z, r24
+     a98:	08 95       	ret
 
-00000a8e <tiny_dma_set_mode_6>:
+00000a9a <tiny_dma_set_mode_6>:
 }
 
 void tiny_dma_set_mode_6(void){
 	
 	global_mode = 6;
-     a8e:	86 e0       	ldi	r24, 0x06	; 6
-     a90:	80 93 00 20 	sts	0x2000, r24	; 0x802000 <__data_start>
+     a9a:	86 e0       	ldi	r24, 0x06	; 6
+     a9c:	80 93 00 20 	sts	0x2000, r24	; 0x802000 <__data_start>
 	
 	tiny_dma_flush();
-     a94:	4f dd       	rcall	.-1378   	; 0x534 <tiny_dma_flush>
+     aa0:	4f dd       	rcall	.-1378   	; 0x540 <tiny_dma_flush>
 	
 	DMA.CH2.REPCNT = 0; //Repeat forever!
-     a96:	e0 e0       	ldi	r30, 0x00	; 0
-     a98:	f1 e0       	ldi	r31, 0x01	; 1
-     a9a:	16 aa       	std	Z+54, r1	; 0x36
+     aa2:	e0 e0       	ldi	r30, 0x00	; 0
+     aa4:	f1 e0       	ldi	r31, 0x01	; 1
+     aa6:	16 aa       	std	Z+54, r1	; 0x36
 	DMA.CH2.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm | DMA_CH_REPEAT_bm;
-     a9c:	94 e2       	ldi	r25, 0x24	; 36
-     a9e:	90 ab       	std	Z+48, r25	; 0x30
+     aa8:	94 e2       	ldi	r25, 0x24	; 36
+     aaa:	90 ab       	std	Z+48, r25	; 0x30
 	DMA.CH2.CTRLB = 0x00; //Hi interrupt on block complete
-     aa0:	11 aa       	std	Z+49, r1	; 0x31
+     aac:	11 aa       	std	Z+49, r1	; 0x31
 	DMA.CH2.ADDRCTRL = DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc | DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc;   //Dest reloads after each burst, with byte incrementing.  Src reloads at end of block, also incrementing address.
-     aa2:	39 e5       	ldi	r19, 0x59	; 89
-     aa4:	32 ab       	std	Z+50, r19	; 0x32
+     aae:	39 e5       	ldi	r19, 0x59	; 89
+     ab0:	32 ab       	std	Z+50, r19	; 0x32
 	DMA.CH2.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH2_gc;	//Triggered from TCC0 when it hits PER
-     aa6:	83 e0       	ldi	r24, 0x03	; 3
-     aa8:	83 ab       	std	Z+51, r24	; 0x33
+     ab2:	83 e0       	ldi	r24, 0x03	; 3
+     ab4:	83 ab       	std	Z+51, r24	; 0x33
 	DMA.CH2.TRFCNT = dacBuf_len;
-     aaa:	40 91 04 20 	lds	r20, 0x2004	; 0x802004 <dacBuf_len>
-     aae:	50 91 05 20 	lds	r21, 0x2005	; 0x802005 <dacBuf_len+0x1>
-     ab2:	44 ab       	std	Z+52, r20	; 0x34
-     ab4:	55 ab       	std	Z+53, r21	; 0x35
+     ab6:	40 91 04 20 	lds	r20, 0x2004	; 0x802004 <dacBuf_len>
+     aba:	50 91 05 20 	lds	r21, 0x2005	; 0x802005 <dacBuf_len+0x1>
+     abe:	44 ab       	std	Z+52, r20	; 0x34
+     ac0:	55 ab       	std	Z+53, r21	; 0x35
 
 	DMA.CH2.SRCADDR0 = (( (uint16_t) &dacBuf_CH1[0]) >> 0) & 0xFF; //Source address is dacbuf
-     ab6:	4a e5       	ldi	r20, 0x5A	; 90
-     ab8:	52 e2       	ldi	r21, 0x22	; 34
-     aba:	40 af       	std	Z+56, r20	; 0x38
+     ac2:	4a e5       	ldi	r20, 0x5A	; 90
+     ac4:	52 e2       	ldi	r21, 0x22	; 34
+     ac6:	40 af       	std	Z+56, r20	; 0x38
 	DMA.CH2.SRCADDR1 = (( (uint16_t) &dacBuf_CH1[0]) >> 8) & 0xFF;
-     abc:	51 af       	std	Z+57, r21	; 0x39
+     ac8:	51 af       	std	Z+57, r21	; 0x39
 	DMA.CH2.SRCADDR2 = 0x00;
-     abe:	12 ae       	std	Z+58, r1	; 0x3a
+     aca:	12 ae       	std	Z+58, r1	; 0x3a
 	
 	DMA.CH2.DESTADDR0 = (( (uint16_t) &DACB.CH0DATAH) >> 0) & 0xFF;  //Dest address is high byte of DAC register
-     ac0:	29 e3       	ldi	r18, 0x39	; 57
-     ac2:	24 af       	std	Z+60, r18	; 0x3c
+     acc:	29 e3       	ldi	r18, 0x39	; 57
+     ace:	24 af       	std	Z+60, r18	; 0x3c
 	DMA.CH2.DESTADDR1 = (( (uint16_t) &DACB.CH0DATAH) >> 8) & 0xFF;
-     ac4:	80 93 3d 01 	sts	0x013D, r24	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
+     ad0:	80 93 3d 01 	sts	0x013D, r24	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
 	DMA.CH2.DESTADDR2 = 0x00;
-     ac8:	10 92 3e 01 	sts	0x013E, r1	; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e>
+     ad4:	10 92 3e 01 	sts	0x013E, r1	; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e>
 	
 	//Must enable last for REPCNT won't work!
 	DMA.CH2.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
-     acc:	20 a9       	ldd	r18, Z+48	; 0x30
-     ace:	20 68       	ori	r18, 0x80	; 128
-     ad0:	20 ab       	std	Z+48, r18	; 0x30
+     ad8:	20 a9       	ldd	r18, Z+48	; 0x30
+     ada:	20 68       	ori	r18, 0x80	; 128
+     adc:	20 ab       	std	Z+48, r18	; 0x30
 	
 	DMA.CH3.REPCNT = 0; //Repeat forever!
-     ad2:	10 92 46 01 	sts	0x0146, r1	; 0x800146 <__TEXT_REGION_LENGTH__+0x700146>
+     ade:	10 92 46 01 	sts	0x0146, r1	; 0x800146 <__TEXT_REGION_LENGTH__+0x700146>
 	DMA.CH3.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm | DMA_CH_REPEAT_bm;
-     ad6:	a0 e4       	ldi	r26, 0x40	; 64
-     ad8:	b1 e0       	ldi	r27, 0x01	; 1
-     ada:	9c 93       	st	X, r25
+     ae2:	a0 e4       	ldi	r26, 0x40	; 64
+     ae4:	b1 e0       	ldi	r27, 0x01	; 1
+     ae6:	9c 93       	st	X, r25
 	DMA.CH3.CTRLB = 0x00; //No interrupt for DacBuf!!
-     adc:	10 92 41 01 	sts	0x0141, r1	; 0x800141 <__TEXT_REGION_LENGTH__+0x700141>
+     ae8:	10 92 41 01 	sts	0x0141, r1	; 0x800141 <__TEXT_REGION_LENGTH__+0x700141>
 	DMA.CH3.ADDRCTRL = DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc | DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc;   //Dest reloads after each burst, with byte incrementing.  Src reloads at end of block, also incrementing address.
-     ae0:	30 93 42 01 	sts	0x0142, r19	; 0x800142 <__TEXT_REGION_LENGTH__+0x700142>
+     aec:	30 93 42 01 	sts	0x0142, r19	; 0x800142 <__TEXT_REGION_LENGTH__+0x700142>
 	DMA.CH3.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH1_gc;	//Triggered from TCC0 when it hits PER
-     ae4:	32 e0       	ldi	r19, 0x02	; 2
-     ae6:	30 93 43 01 	sts	0x0143, r19	; 0x800143 <__TEXT_REGION_LENGTH__+0x700143>
+     af0:	32 e0       	ldi	r19, 0x02	; 2
+     af2:	30 93 43 01 	sts	0x0143, r19	; 0x800143 <__TEXT_REGION_LENGTH__+0x700143>
 	DMA.CH3.TRFCNT = auxDacBufLen;
-     aea:	40 91 02 20 	lds	r20, 0x2002	; 0x802002 <auxDacBufLen>
-     aee:	50 91 03 20 	lds	r21, 0x2003	; 0x802003 <auxDacBufLen+0x1>
-     af2:	40 93 44 01 	sts	0x0144, r20	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
-     af6:	50 93 45 01 	sts	0x0145, r21	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
+     af6:	40 91 02 20 	lds	r20, 0x2002	; 0x802002 <auxDacBufLen>
+     afa:	50 91 03 20 	lds	r21, 0x2003	; 0x802003 <auxDacBufLen+0x1>
+     afe:	40 93 44 01 	sts	0x0144, r20	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
+     b02:	50 93 45 01 	sts	0x0145, r21	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
 
 	DMA.CH3.SRCADDR0 = (( (uint16_t) &dacBuf_CH2[0]) >> 0) & 0xFF; //Source address is dacbuf
-     afa:	4a e6       	ldi	r20, 0x6A	; 106
-     afc:	54 e2       	ldi	r21, 0x24	; 36
-     afe:	40 93 48 01 	sts	0x0148, r20	; 0x800148 <__TEXT_REGION_LENGTH__+0x700148>
+     b06:	4a e6       	ldi	r20, 0x6A	; 106
+     b08:	54 e2       	ldi	r21, 0x24	; 36
+     b0a:	40 93 48 01 	sts	0x0148, r20	; 0x800148 <__TEXT_REGION_LENGTH__+0x700148>
 	DMA.CH3.SRCADDR1 = (( (uint16_t) &dacBuf_CH2[0]) >> 8) & 0xFF;
-     b02:	50 93 49 01 	sts	0x0149, r21	; 0x800149 <__TEXT_REGION_LENGTH__+0x700149>
+     b0e:	50 93 49 01 	sts	0x0149, r21	; 0x800149 <__TEXT_REGION_LENGTH__+0x700149>
 	DMA.CH3.SRCADDR2 = 0x00;
-     b06:	10 92 4a 01 	sts	0x014A, r1	; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a>
+     b12:	10 92 4a 01 	sts	0x014A, r1	; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a>
 	
 	DMA.CH3.DESTADDR0 = (( (uint16_t) &DACB.CH1DATAH) >> 0) & 0xFF;  //Dest address is high byte of DAC register
-     b0a:	2b e3       	ldi	r18, 0x3B	; 59
-     b0c:	20 93 4c 01 	sts	0x014C, r18	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
+     b16:	2b e3       	ldi	r18, 0x3B	; 59
+     b18:	20 93 4c 01 	sts	0x014C, r18	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
 	DMA.CH3.DESTADDR1 = (( (uint16_t) &DACB.CH1DATAH) >> 8) & 0xFF;
-     b10:	80 93 4d 01 	sts	0x014D, r24	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
+     b1c:	80 93 4d 01 	sts	0x014D, r24	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
 	DMA.CH3.DESTADDR2 = 0x00;
-     b14:	10 92 4e 01 	sts	0x014E, r1	; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e>
+     b20:	10 92 4e 01 	sts	0x014E, r1	; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e>
 	
 	//Must enable last for REPCNT won't work!
 	DMA.CH3.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
-     b18:	2c 91       	ld	r18, X
-     b1a:	20 68       	ori	r18, 0x80	; 128
-     b1c:	2c 93       	st	X, r18
+     b24:	2c 91       	ld	r18, X
+     b26:	20 68       	ori	r18, 0x80	; 128
+     b28:	2c 93       	st	X, r18
 	
 	DMA.CH0.CTRLA = 0x00;
-     b1e:	10 8a       	std	Z+16, r1	; 0x10
+     b2a:	10 8a       	std	Z+16, r1	; 0x10
 	DMA.CH0.CTRLA = DMA_CH_RESET_bm;
-     b20:	20 e4       	ldi	r18, 0x40	; 64
-     b22:	20 8b       	std	Z+16, r18	; 0x10
+     b2c:	20 e4       	ldi	r18, 0x40	; 64
+     b2e:	20 8b       	std	Z+16, r18	; 0x10
 		
 	DMA.CH0.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm; //Do not repeat!
-     b24:	24 e0       	ldi	r18, 0x04	; 4
-     b26:	20 8b       	std	Z+16, r18	; 0x10
+     b30:	24 e0       	ldi	r18, 0x04	; 4
+     b32:	20 8b       	std	Z+16, r18	; 0x10
 	DMA.CH0.CTRLB = 0x03; //Hi interrupt!
-     b28:	81 8b       	std	Z+17, r24	; 0x11
+     b34:	81 8b       	std	Z+17, r24	; 0x11
 	DMA.CH0.ADDRCTRL = DMA_CH_SRCRELOAD_BURST_gc | DMA_CH_SRCDIR_INC_gc | DMA_CH_DESTDIR_INC_gc;   //Source reloads after each burst, with byte incrementing.  Dest does not reload, but does increment address.
-     b2a:	81 e9       	ldi	r24, 0x91	; 145
-     b2c:	82 8b       	std	Z+18, r24	; 0x12
+     b36:	81 e9       	ldi	r24, 0x91	; 145
+     b38:	82 8b       	std	Z+18, r24	; 0x12
 	DMA.CH0.TRIGSRC = DMA_CH_TRIGSRC_ADCA_CH0_gc;	//Triggered from ADCA channel 0
-     b2e:	80 e1       	ldi	r24, 0x10	; 16
-     b30:	83 8b       	std	Z+19, r24	; 0x13
+     b3a:	80 e1       	ldi	r24, 0x10	; 16
+     b3c:	83 8b       	std	Z+19, r24	; 0x13
 	DMA.CH0.TRFCNT = PACKET_SIZE;
-     b32:	4e ee       	ldi	r20, 0xEE	; 238
-     b34:	52 e0       	ldi	r21, 0x02	; 2
-     b36:	44 8b       	std	Z+20, r20	; 0x14
-     b38:	55 8b       	std	Z+21, r21	; 0x15
+     b3e:	4e ee       	ldi	r20, 0xEE	; 238
+     b40:	52 e0       	ldi	r21, 0x02	; 2
+     b42:	44 8b       	std	Z+20, r20	; 0x14
+     b44:	55 8b       	std	Z+21, r21	; 0x15
 		
 	DMA.CH0.SRCADDR0 = (( (uint16_t) &ADCA.CH0.RESL) >> 0) & 0xFF; //Source address is ADC
-     b3a:	90 8f       	std	Z+24, r25	; 0x18
+     b46:	90 8f       	std	Z+24, r25	; 0x18
 	DMA.CH0.SRCADDR1 = (( (uint16_t) &ADCA.CH0.RESL) >> 8) & 0xFF;
-     b3c:	31 8f       	std	Z+25, r19	; 0x19
+     b48:	31 8f       	std	Z+25, r19	; 0x19
 	DMA.CH0.SRCADDR2 = 0x00;
-     b3e:	12 8e       	std	Z+26, r1	; 0x1a
+     b4a:	12 8e       	std	Z+26, r1	; 0x1a
 		
 	DMA.CH0.DESTADDR0 = (( (uint16_t) &isoBuf[0]) >> 0) & 0xFF;  //Dest address is isoBuf
-     b40:	8a e6       	ldi	r24, 0x6A	; 106
-     b42:	96 e2       	ldi	r25, 0x26	; 38
-     b44:	84 8f       	std	Z+28, r24	; 0x1c
+     b4c:	8a e6       	ldi	r24, 0x6A	; 106
+     b4e:	96 e2       	ldi	r25, 0x26	; 38
+     b50:	84 8f       	std	Z+28, r24	; 0x1c
 	DMA.CH0.DESTADDR1 = (( (uint16_t) &isoBuf[0]) >> 8) & 0xFF;
-     b46:	95 8f       	std	Z+29, r25	; 0x1d
+     b52:	95 8f       	std	Z+29, r25	; 0x1d
 	DMA.CH0.DESTADDR2 = 0x00;
-     b48:	16 8e       	std	Z+30, r1	; 0x1e
+     b54:	16 8e       	std	Z+30, r1	; 0x1e
 		
 	//Must enable last for REPCNT won't work!
 	DMA.CH0.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
-     b4a:	80 89       	ldd	r24, Z+16	; 0x10
-     b4c:	80 68       	ori	r24, 0x80	; 128
-     b4e:	80 8b       	std	Z+16, r24	; 0x10
-     b50:	08 95       	ret
+     b56:	80 89       	ldd	r24, Z+16	; 0x10
+     b58:	80 68       	ori	r24, 0x80	; 128
+     b5a:	80 8b       	std	Z+16, r24	; 0x10
+     b5c:	08 95       	ret
 
-00000b52 <tiny_dma_loop_mode_6>:
+00000b5e <tiny_dma_loop_mode_6>:
 	
 }
 
 void tiny_dma_loop_mode_6(void){
-     b52:	08 95       	ret
+     b5e:	08 95       	ret
 
-00000b54 <tiny_dma_set_mode_7>:
+00000b60 <tiny_dma_set_mode_7>:
 	return;
 }
 
 void tiny_dma_set_mode_7(void){
 		
 		global_mode = 7;
-     b54:	87 e0       	ldi	r24, 0x07	; 7
-     b56:	80 93 00 20 	sts	0x2000, r24	; 0x802000 <__data_start>
+     b60:	87 e0       	ldi	r24, 0x07	; 7
+     b62:	80 93 00 20 	sts	0x2000, r24	; 0x802000 <__data_start>
 		
 		tiny_dma_flush();
-     b5a:	ec dc       	rcall	.-1576   	; 0x534 <tiny_dma_flush>
+     b66:	ec dc       	rcall	.-1576   	; 0x540 <tiny_dma_flush>
 		
 		DMA.CH2.REPCNT = 0; //Repeat forever!
-     b5c:	e0 e0       	ldi	r30, 0x00	; 0
-     b5e:	f1 e0       	ldi	r31, 0x01	; 1
-     b60:	16 aa       	std	Z+54, r1	; 0x36
+     b68:	e0 e0       	ldi	r30, 0x00	; 0
+     b6a:	f1 e0       	ldi	r31, 0x01	; 1
+     b6c:	16 aa       	std	Z+54, r1	; 0x36
 		DMA.CH2.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm | DMA_CH_REPEAT_bm;
-     b62:	94 e2       	ldi	r25, 0x24	; 36
-     b64:	90 ab       	std	Z+48, r25	; 0x30
+     b6e:	94 e2       	ldi	r25, 0x24	; 36
+     b70:	90 ab       	std	Z+48, r25	; 0x30
 		DMA.CH2.CTRLB = 0x00; //Hi interrupt on block complete
-     b66:	11 aa       	std	Z+49, r1	; 0x31
+     b72:	11 aa       	std	Z+49, r1	; 0x31
 		DMA.CH2.ADDRCTRL = DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc | DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc;   //Dest reloads after each burst, with byte incrementing.  Src reloads at end of block, also incrementing address.
-     b68:	39 e5       	ldi	r19, 0x59	; 89
-     b6a:	32 ab       	std	Z+50, r19	; 0x32
+     b74:	39 e5       	ldi	r19, 0x59	; 89
+     b76:	32 ab       	std	Z+50, r19	; 0x32
 		DMA.CH2.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH2_gc;	//Triggered from TCC0 when it hits PER
-     b6c:	83 e0       	ldi	r24, 0x03	; 3
-     b6e:	83 ab       	std	Z+51, r24	; 0x33
+     b78:	83 e0       	ldi	r24, 0x03	; 3
+     b7a:	83 ab       	std	Z+51, r24	; 0x33
 		DMA.CH2.TRFCNT = dacBuf_len;
-     b70:	40 91 04 20 	lds	r20, 0x2004	; 0x802004 <dacBuf_len>
-     b74:	50 91 05 20 	lds	r21, 0x2005	; 0x802005 <dacBuf_len+0x1>
-     b78:	44 ab       	std	Z+52, r20	; 0x34
-     b7a:	55 ab       	std	Z+53, r21	; 0x35
+     b7c:	40 91 04 20 	lds	r20, 0x2004	; 0x802004 <dacBuf_len>
+     b80:	50 91 05 20 	lds	r21, 0x2005	; 0x802005 <dacBuf_len+0x1>
+     b84:	44 ab       	std	Z+52, r20	; 0x34
+     b86:	55 ab       	std	Z+53, r21	; 0x35
 
 		DMA.CH2.SRCADDR0 = (( (uint16_t) &dacBuf_CH1[0]) >> 0) & 0xFF; //Source address is dacbuf
-     b7c:	4a e5       	ldi	r20, 0x5A	; 90
-     b7e:	52 e2       	ldi	r21, 0x22	; 34
-     b80:	40 af       	std	Z+56, r20	; 0x38
+     b88:	4a e5       	ldi	r20, 0x5A	; 90
+     b8a:	52 e2       	ldi	r21, 0x22	; 34
+     b8c:	40 af       	std	Z+56, r20	; 0x38
 		DMA.CH2.SRCADDR1 = (( (uint16_t) &dacBuf_CH1[0]) >> 8) & 0xFF;
-     b82:	51 af       	std	Z+57, r21	; 0x39
+     b8e:	51 af       	std	Z+57, r21	; 0x39
 		DMA.CH2.SRCADDR2 = 0x00;
-     b84:	12 ae       	std	Z+58, r1	; 0x3a
+     b90:	12 ae       	std	Z+58, r1	; 0x3a
 			
 		DMA.CH2.DESTADDR0 = (( (uint16_t) &DACB.CH0DATAH) >> 0) & 0xFF;  //Dest address is high byte of DAC register
-     b86:	29 e3       	ldi	r18, 0x39	; 57
-     b88:	24 af       	std	Z+60, r18	; 0x3c
+     b92:	29 e3       	ldi	r18, 0x39	; 57
+     b94:	24 af       	std	Z+60, r18	; 0x3c
 		DMA.CH2.DESTADDR1 = (( (uint16_t) &DACB.CH0DATAH) >> 8) & 0xFF;
-     b8a:	80 93 3d 01 	sts	0x013D, r24	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
+     b96:	80 93 3d 01 	sts	0x013D, r24	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
 		DMA.CH2.DESTADDR2 = 0x00;
-     b8e:	10 92 3e 01 	sts	0x013E, r1	; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e>
+     b9a:	10 92 3e 01 	sts	0x013E, r1	; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e>
 			
 		//Must enable last for REPCNT won't work!
 		DMA.CH2.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
-     b92:	20 a9       	ldd	r18, Z+48	; 0x30
-     b94:	20 68       	ori	r18, 0x80	; 128
-     b96:	20 ab       	std	Z+48, r18	; 0x30
+     b9e:	20 a9       	ldd	r18, Z+48	; 0x30
+     ba0:	20 68       	ori	r18, 0x80	; 128
+     ba2:	20 ab       	std	Z+48, r18	; 0x30
 		
 		DMA.CH3.REPCNT = 0; //Repeat forever!
-     b98:	10 92 46 01 	sts	0x0146, r1	; 0x800146 <__TEXT_REGION_LENGTH__+0x700146>
+     ba4:	10 92 46 01 	sts	0x0146, r1	; 0x800146 <__TEXT_REGION_LENGTH__+0x700146>
 		DMA.CH3.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm | DMA_CH_REPEAT_bm;
-     b9c:	a0 e4       	ldi	r26, 0x40	; 64
-     b9e:	b1 e0       	ldi	r27, 0x01	; 1
-     ba0:	9c 93       	st	X, r25
+     ba8:	a0 e4       	ldi	r26, 0x40	; 64
+     baa:	b1 e0       	ldi	r27, 0x01	; 1
+     bac:	9c 93       	st	X, r25
 		DMA.CH3.CTRLB = 0x00; //No interrupt for DacBuf!!
-     ba2:	10 92 41 01 	sts	0x0141, r1	; 0x800141 <__TEXT_REGION_LENGTH__+0x700141>
+     bae:	10 92 41 01 	sts	0x0141, r1	; 0x800141 <__TEXT_REGION_LENGTH__+0x700141>
 		DMA.CH3.ADDRCTRL = DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc | DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc;   //Dest reloads after each burst, with byte incrementing.  Src reloads at end of block, also incrementing address.
-     ba6:	30 93 42 01 	sts	0x0142, r19	; 0x800142 <__TEXT_REGION_LENGTH__+0x700142>
+     bb2:	30 93 42 01 	sts	0x0142, r19	; 0x800142 <__TEXT_REGION_LENGTH__+0x700142>
 		DMA.CH3.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH1_gc;	//Triggered from TCC0 when it hits PER
-     baa:	32 e0       	ldi	r19, 0x02	; 2
-     bac:	30 93 43 01 	sts	0x0143, r19	; 0x800143 <__TEXT_REGION_LENGTH__+0x700143>
+     bb6:	32 e0       	ldi	r19, 0x02	; 2
+     bb8:	30 93 43 01 	sts	0x0143, r19	; 0x800143 <__TEXT_REGION_LENGTH__+0x700143>
 		DMA.CH3.TRFCNT = auxDacBufLen;
-     bb0:	40 91 02 20 	lds	r20, 0x2002	; 0x802002 <auxDacBufLen>
-     bb4:	50 91 03 20 	lds	r21, 0x2003	; 0x802003 <auxDacBufLen+0x1>
-     bb8:	40 93 44 01 	sts	0x0144, r20	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
-     bbc:	50 93 45 01 	sts	0x0145, r21	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
+     bbc:	40 91 02 20 	lds	r20, 0x2002	; 0x802002 <auxDacBufLen>
+     bc0:	50 91 03 20 	lds	r21, 0x2003	; 0x802003 <auxDacBufLen+0x1>
+     bc4:	40 93 44 01 	sts	0x0144, r20	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
+     bc8:	50 93 45 01 	sts	0x0145, r21	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
 
 		DMA.CH3.SRCADDR0 = (( (uint16_t) &dacBuf_CH2[0]) >> 0) & 0xFF; //Source address is dacbuf
-     bc0:	4a e6       	ldi	r20, 0x6A	; 106
-     bc2:	54 e2       	ldi	r21, 0x24	; 36
-     bc4:	40 93 48 01 	sts	0x0148, r20	; 0x800148 <__TEXT_REGION_LENGTH__+0x700148>
+     bcc:	4a e6       	ldi	r20, 0x6A	; 106
+     bce:	54 e2       	ldi	r21, 0x24	; 36
+     bd0:	40 93 48 01 	sts	0x0148, r20	; 0x800148 <__TEXT_REGION_LENGTH__+0x700148>
 		DMA.CH3.SRCADDR1 = (( (uint16_t) &dacBuf_CH2[0]) >> 8) & 0xFF;
-     bc8:	50 93 49 01 	sts	0x0149, r21	; 0x800149 <__TEXT_REGION_LENGTH__+0x700149>
+     bd4:	50 93 49 01 	sts	0x0149, r21	; 0x800149 <__TEXT_REGION_LENGTH__+0x700149>
 		DMA.CH3.SRCADDR2 = 0x00;
-     bcc:	10 92 4a 01 	sts	0x014A, r1	; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a>
+     bd8:	10 92 4a 01 	sts	0x014A, r1	; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a>
 		
 		DMA.CH3.DESTADDR0 = (( (uint16_t) &DACB.CH1DATAH) >> 0) & 0xFF;  //Dest address is high byte of DAC register
-     bd0:	2b e3       	ldi	r18, 0x3B	; 59
-     bd2:	20 93 4c 01 	sts	0x014C, r18	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
+     bdc:	2b e3       	ldi	r18, 0x3B	; 59
+     bde:	20 93 4c 01 	sts	0x014C, r18	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
 		DMA.CH3.DESTADDR1 = (( (uint16_t) &DACB.CH1DATAH) >> 8) & 0xFF;
-     bd6:	80 93 4d 01 	sts	0x014D, r24	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
+     be2:	80 93 4d 01 	sts	0x014D, r24	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
 		DMA.CH3.DESTADDR2 = 0x00;
-     bda:	10 92 4e 01 	sts	0x014E, r1	; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e>
+     be6:	10 92 4e 01 	sts	0x014E, r1	; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e>
 		
 		//Must enable last for REPCNT won't work!
 		DMA.CH3.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!	
-     bde:	2c 91       	ld	r18, X
-     be0:	20 68       	ori	r18, 0x80	; 128
-     be2:	2c 93       	st	X, r18
+     bea:	2c 91       	ld	r18, X
+     bec:	20 68       	ori	r18, 0x80	; 128
+     bee:	2c 93       	st	X, r18
 		
 		DMA.CH0.CTRLA = 0x00;
-     be4:	10 8a       	std	Z+16, r1	; 0x10
+     bf0:	10 8a       	std	Z+16, r1	; 0x10
 		DMA.CH0.CTRLA = DMA_CH_RESET_bm;
-     be6:	20 e4       	ldi	r18, 0x40	; 64
-     be8:	20 8b       	std	Z+16, r18	; 0x10
+     bf2:	20 e4       	ldi	r18, 0x40	; 64
+     bf4:	20 8b       	std	Z+16, r18	; 0x10
 				
 		DMA.CH0.CTRLA = DMA_CH_BURSTLEN_2BYTE_gc | DMA_CH_SINGLE_bm; //Do not repeat!
-     bea:	25 e0       	ldi	r18, 0x05	; 5
-     bec:	20 8b       	std	Z+16, r18	; 0x10
+     bf6:	25 e0       	ldi	r18, 0x05	; 5
+     bf8:	20 8b       	std	Z+16, r18	; 0x10
 		DMA.CH0.CTRLB = 0x03; //No interrupt!
-     bee:	81 8b       	std	Z+17, r24	; 0x11
+     bfa:	81 8b       	std	Z+17, r24	; 0x11
 		DMA.CH0.ADDRCTRL = DMA_CH_SRCRELOAD_BURST_gc | DMA_CH_SRCDIR_INC_gc | DMA_CH_DESTDIR_INC_gc;   //Source reloads after each burst, with byte incrementing.  Dest does not reload, but does increment address.
-     bf0:	81 e9       	ldi	r24, 0x91	; 145
-     bf2:	82 8b       	std	Z+18, r24	; 0x12
+     bfc:	81 e9       	ldi	r24, 0x91	; 145
+     bfe:	82 8b       	std	Z+18, r24	; 0x12
 		DMA.CH0.TRIGSRC = DMA_CH_TRIGSRC_ADCA_CH0_gc;	//Triggered from ADCA channel 0
-     bf4:	80 e1       	ldi	r24, 0x10	; 16
-     bf6:	83 8b       	std	Z+19, r24	; 0x13
+     c00:	80 e1       	ldi	r24, 0x10	; 16
+     c02:	83 8b       	std	Z+19, r24	; 0x13
 		DMA.CH0.TRFCNT = PACKET_SIZE;
-     bf8:	4e ee       	ldi	r20, 0xEE	; 238
-     bfa:	52 e0       	ldi	r21, 0x02	; 2
-     bfc:	44 8b       	std	Z+20, r20	; 0x14
-     bfe:	55 8b       	std	Z+21, r21	; 0x15
+     c04:	4e ee       	ldi	r20, 0xEE	; 238
+     c06:	52 e0       	ldi	r21, 0x02	; 2
+     c08:	44 8b       	std	Z+20, r20	; 0x14
+     c0a:	55 8b       	std	Z+21, r21	; 0x15
 				
 		DMA.CH0.SRCADDR0 = (( (uint16_t) &ADCA.CH0.RESL) >> 0) & 0xFF; //Source address is ADC
-     c00:	90 8f       	std	Z+24, r25	; 0x18
+     c0c:	90 8f       	std	Z+24, r25	; 0x18
 		DMA.CH0.SRCADDR1 = (( (uint16_t) &ADCA.CH0.RESL) >> 8) & 0xFF;
-     c02:	31 8f       	std	Z+25, r19	; 0x19
+     c0e:	31 8f       	std	Z+25, r19	; 0x19
 		DMA.CH0.SRCADDR2 = 0x00;
-     c04:	12 8e       	std	Z+26, r1	; 0x1a
+     c10:	12 8e       	std	Z+26, r1	; 0x1a
 				
 		DMA.CH0.DESTADDR0 = (( (uint16_t) &isoBuf[0]) >> 0) & 0xFF;  //Dest address is isoBuf
-     c06:	8a e6       	ldi	r24, 0x6A	; 106
-     c08:	96 e2       	ldi	r25, 0x26	; 38
-     c0a:	84 8f       	std	Z+28, r24	; 0x1c
+     c12:	8a e6       	ldi	r24, 0x6A	; 106
+     c14:	96 e2       	ldi	r25, 0x26	; 38
+     c16:	84 8f       	std	Z+28, r24	; 0x1c
 		DMA.CH0.DESTADDR1 = (( (uint16_t) &isoBuf[0]) >> 8) & 0xFF;
-     c0c:	95 8f       	std	Z+29, r25	; 0x1d
+     c18:	95 8f       	std	Z+29, r25	; 0x1d
 		DMA.CH0.DESTADDR2 = 0x00;
-     c0e:	16 8e       	std	Z+30, r1	; 0x1e
+     c1a:	16 8e       	std	Z+30, r1	; 0x1e
 				
 		//Must enable last for REPCNT won't work!
 		DMA.CH0.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!	
-     c10:	80 89       	ldd	r24, Z+16	; 0x10
-     c12:	80 68       	ori	r24, 0x80	; 128
-     c14:	80 8b       	std	Z+16, r24	; 0x10
-     c16:	08 95       	ret
+     c1c:	80 89       	ldd	r24, Z+16	; 0x10
+     c1e:	80 68       	ori	r24, 0x80	; 128
+     c20:	80 8b       	std	Z+16, r24	; 0x10
+     c22:	08 95       	ret
 
-00000c18 <tiny_dma_loop_mode_7>:
+00000c24 <tiny_dma_loop_mode_7>:
 }
 
 void tiny_dma_loop_mode_7(void){
-     c18:	08 95       	ret
+     c24:	08 95       	ret
 
-00000c1a <__vector_6>:
+00000c26 <__vector_6>:
 }
 
 ISR(DMA_CH0_vect){
-     c1a:	1f 92       	push	r1
-     c1c:	0f 92       	push	r0
-     c1e:	0f b6       	in	r0, 0x3f	; 63
-     c20:	0f 92       	push	r0
-     c22:	11 24       	eor	r1, r1
-     c24:	2f 93       	push	r18
-     c26:	3f 93       	push	r19
-     c28:	4f 93       	push	r20
-     c2a:	8f 93       	push	r24
-     c2c:	9f 93       	push	r25
-     c2e:	af 93       	push	r26
-     c30:	bf 93       	push	r27
-     c32:	ef 93       	push	r30
-     c34:	ff 93       	push	r31
+     c26:	1f 92       	push	r1
+     c28:	0f 92       	push	r0
+     c2a:	0f b6       	in	r0, 0x3f	; 63
+     c2c:	0f 92       	push	r0
+     c2e:	11 24       	eor	r1, r1
+     c30:	2f 93       	push	r18
+     c32:	3f 93       	push	r19
+     c34:	4f 93       	push	r20
+     c36:	8f 93       	push	r24
+     c38:	9f 93       	push	r25
+     c3a:	af 93       	push	r26
+     c3c:	bf 93       	push	r27
+     c3e:	ef 93       	push	r30
+     c40:	ff 93       	push	r31
 		DMA.INTFLAGS = 0x01;
-     c36:	81 e0       	ldi	r24, 0x01	; 1
-     c38:	80 93 03 01 	sts	0x0103, r24	; 0x800103 <__TEXT_REGION_LENGTH__+0x700103>
+     c42:	81 e0       	ldi	r24, 0x01	; 1
+     c44:	80 93 03 01 	sts	0x0103, r24	; 0x800103 <__TEXT_REGION_LENGTH__+0x700103>
 		switch(global_mode){
-     c3c:	e0 91 00 20 	lds	r30, 0x2000	; 0x802000 <__data_start>
-     c40:	8e 2f       	mov	r24, r30
-     c42:	90 e0       	ldi	r25, 0x00	; 0
-     c44:	88 30       	cpi	r24, 0x08	; 8
-     c46:	91 05       	cpc	r25, r1
-     c48:	08 f0       	brcs	.+2      	; 0xc4c <__vector_6+0x32>
-     c4a:	11 c1       	rjmp	.+546    	; 0xe6e <__vector_6+0x254>
-     c4c:	fc 01       	movw	r30, r24
-     c4e:	ea 5f       	subi	r30, 0xFA	; 250
-     c50:	fe 4f       	sbci	r31, 0xFE	; 254
-     c52:	0c 94 32 16 	jmp	0x2c64	; 0x2c64 <__tablejump2__>
+     c48:	e0 91 00 20 	lds	r30, 0x2000	; 0x802000 <__data_start>
+     c4c:	8e 2f       	mov	r24, r30
+     c4e:	90 e0       	ldi	r25, 0x00	; 0
+     c50:	88 30       	cpi	r24, 0x08	; 8
+     c52:	91 05       	cpc	r25, r1
+     c54:	08 f0       	brcs	.+2      	; 0xc58 <__vector_6+0x32>
+     c56:	11 c1       	rjmp	.+546    	; 0xe7a <__vector_6+0x254>
+     c58:	fc 01       	movw	r30, r24
+     c5a:	ea 5f       	subi	r30, 0xFA	; 250
+     c5c:	fe 4f       	sbci	r31, 0xFE	; 254
+     c5e:	0c 94 3d 16 	jmp	0x2c7a	; 0x2c7a <__tablejump2__>
 			case 0:
 				DMA.CH0.TRFCNT = HALFPACKET_SIZE;
-     c56:	e0 e0       	ldi	r30, 0x00	; 0
-     c58:	f1 e0       	ldi	r31, 0x01	; 1
-     c5a:	87 e7       	ldi	r24, 0x77	; 119
-     c5c:	91 e0       	ldi	r25, 0x01	; 1
-     c5e:	84 8b       	std	Z+20, r24	; 0x14
-     c60:	95 8b       	std	Z+21, r25	; 0x15
+     c62:	e0 e0       	ldi	r30, 0x00	; 0
+     c64:	f1 e0       	ldi	r31, 0x01	; 1
+     c66:	87 e7       	ldi	r24, 0x77	; 119
+     c68:	91 e0       	ldi	r25, 0x01	; 1
+     c6a:	84 8b       	std	Z+20, r24	; 0x14
+     c6c:	95 8b       	std	Z+21, r25	; 0x15
 				DMA.CH0.DESTADDR0 = (( (uint16_t) &isoBuf[b1_state * PACKET_SIZE]) >> 0) & 0xFF;  //Dest address is isoBuf
-     c62:	40 91 b5 20 	lds	r20, 0x20B5	; 0x8020b5 <b1_state>
-     c66:	2e ee       	ldi	r18, 0xEE	; 238
-     c68:	32 e0       	ldi	r19, 0x02	; 2
-     c6a:	42 9f       	mul	r20, r18
-     c6c:	c0 01       	movw	r24, r0
-     c6e:	43 9f       	mul	r20, r19
-     c70:	90 0d       	add	r25, r0
-     c72:	11 24       	eor	r1, r1
-     c74:	86 59       	subi	r24, 0x96	; 150
-     c76:	99 4d       	sbci	r25, 0xD9	; 217
-     c78:	84 8f       	std	Z+28, r24	; 0x1c
+     c6e:	40 91 b5 20 	lds	r20, 0x20B5	; 0x8020b5 <b1_state>
+     c72:	2e ee       	ldi	r18, 0xEE	; 238
+     c74:	32 e0       	ldi	r19, 0x02	; 2
+     c76:	42 9f       	mul	r20, r18
+     c78:	c0 01       	movw	r24, r0
+     c7a:	43 9f       	mul	r20, r19
+     c7c:	90 0d       	add	r25, r0
+     c7e:	11 24       	eor	r1, r1
+     c80:	86 59       	subi	r24, 0x96	; 150
+     c82:	99 4d       	sbci	r25, 0xD9	; 217
+     c84:	84 8f       	std	Z+28, r24	; 0x1c
 				DMA.CH0.DESTADDR1 = (( (uint16_t) &isoBuf[b1_state * PACKET_SIZE]) >> 8) & 0xFF;
-     c7a:	40 91 b5 20 	lds	r20, 0x20B5	; 0x8020b5 <b1_state>
-     c7e:	42 9f       	mul	r20, r18
-     c80:	c0 01       	movw	r24, r0
-     c82:	43 9f       	mul	r20, r19
-     c84:	90 0d       	add	r25, r0
-     c86:	11 24       	eor	r1, r1
-     c88:	86 59       	subi	r24, 0x96	; 150
-     c8a:	99 4d       	sbci	r25, 0xD9	; 217
-     c8c:	95 8f       	std	Z+29, r25	; 0x1d
+     c86:	40 91 b5 20 	lds	r20, 0x20B5	; 0x8020b5 <b1_state>
+     c8a:	42 9f       	mul	r20, r18
+     c8c:	c0 01       	movw	r24, r0
+     c8e:	43 9f       	mul	r20, r19
+     c90:	90 0d       	add	r25, r0
+     c92:	11 24       	eor	r1, r1
+     c94:	86 59       	subi	r24, 0x96	; 150
+     c96:	99 4d       	sbci	r25, 0xD9	; 217
+     c98:	95 8f       	std	Z+29, r25	; 0x1d
 				//Must enable last for REPCNT won't work!
 				DMA.CH0.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
-     c8e:	80 89       	ldd	r24, Z+16	; 0x10
-     c90:	80 68       	ori	r24, 0x80	; 128
-     c92:	80 8b       	std	Z+16, r24	; 0x10
+     c9a:	80 89       	ldd	r24, Z+16	; 0x10
+     c9c:	80 68       	ori	r24, 0x80	; 128
+     c9e:	80 8b       	std	Z+16, r24	; 0x10
 				b1_state = !b1_state;
-     c94:	90 91 b5 20 	lds	r25, 0x20B5	; 0x8020b5 <b1_state>
-     c98:	81 e0       	ldi	r24, 0x01	; 1
-     c9a:	91 11       	cpse	r25, r1
-     c9c:	80 e0       	ldi	r24, 0x00	; 0
-     c9e:	80 93 b5 20 	sts	0x20B5, r24	; 0x8020b5 <b1_state>
+     ca0:	90 91 b5 20 	lds	r25, 0x20B5	; 0x8020b5 <b1_state>
+     ca4:	81 e0       	ldi	r24, 0x01	; 1
+     ca6:	91 11       	cpse	r25, r1
+     ca8:	80 e0       	ldi	r24, 0x00	; 0
+     caa:	80 93 b5 20 	sts	0x20B5, r24	; 0x8020b5 <b1_state>
 			break;
-     ca2:	e5 c0       	rjmp	.+458    	; 0xe6e <__vector_6+0x254>
+     cae:	e5 c0       	rjmp	.+458    	; 0xe7a <__vector_6+0x254>
 			case 1:
 				DMA.CH0.TRFCNT = HALFPACKET_SIZE;
-     ca4:	e0 e0       	ldi	r30, 0x00	; 0
-     ca6:	f1 e0       	ldi	r31, 0x01	; 1
-     ca8:	87 e7       	ldi	r24, 0x77	; 119
-     caa:	91 e0       	ldi	r25, 0x01	; 1
-     cac:	84 8b       	std	Z+20, r24	; 0x14
-     cae:	95 8b       	std	Z+21, r25	; 0x15
+     cb0:	e0 e0       	ldi	r30, 0x00	; 0
+     cb2:	f1 e0       	ldi	r31, 0x01	; 1
+     cb4:	87 e7       	ldi	r24, 0x77	; 119
+     cb6:	91 e0       	ldi	r25, 0x01	; 1
+     cb8:	84 8b       	std	Z+20, r24	; 0x14
+     cba:	95 8b       	std	Z+21, r25	; 0x15
 				DMA.CH0.DESTADDR0 = (( (uint16_t) &isoBuf[b1_state * PACKET_SIZE]) >> 0) & 0xFF;  //Dest address is isoBuf
-     cb0:	40 91 b5 20 	lds	r20, 0x20B5	; 0x8020b5 <b1_state>
-     cb4:	2e ee       	ldi	r18, 0xEE	; 238
-     cb6:	32 e0       	ldi	r19, 0x02	; 2
-     cb8:	42 9f       	mul	r20, r18
-     cba:	c0 01       	movw	r24, r0
-     cbc:	43 9f       	mul	r20, r19
-     cbe:	90 0d       	add	r25, r0
-     cc0:	11 24       	eor	r1, r1
-     cc2:	86 59       	subi	r24, 0x96	; 150
-     cc4:	99 4d       	sbci	r25, 0xD9	; 217
-     cc6:	84 8f       	std	Z+28, r24	; 0x1c
+     cbc:	40 91 b5 20 	lds	r20, 0x20B5	; 0x8020b5 <b1_state>
+     cc0:	2e ee       	ldi	r18, 0xEE	; 238
+     cc2:	32 e0       	ldi	r19, 0x02	; 2
+     cc4:	42 9f       	mul	r20, r18
+     cc6:	c0 01       	movw	r24, r0
+     cc8:	43 9f       	mul	r20, r19
+     cca:	90 0d       	add	r25, r0
+     ccc:	11 24       	eor	r1, r1
+     cce:	86 59       	subi	r24, 0x96	; 150
+     cd0:	99 4d       	sbci	r25, 0xD9	; 217
+     cd2:	84 8f       	std	Z+28, r24	; 0x1c
 				DMA.CH0.DESTADDR1 = (( (uint16_t) &isoBuf[b1_state * PACKET_SIZE]) >> 8) & 0xFF;
-     cc8:	40 91 b5 20 	lds	r20, 0x20B5	; 0x8020b5 <b1_state>
-     ccc:	42 9f       	mul	r20, r18
-     cce:	c0 01       	movw	r24, r0
-     cd0:	43 9f       	mul	r20, r19
-     cd2:	90 0d       	add	r25, r0
-     cd4:	11 24       	eor	r1, r1
-     cd6:	86 59       	subi	r24, 0x96	; 150
-     cd8:	99 4d       	sbci	r25, 0xD9	; 217
-     cda:	95 8f       	std	Z+29, r25	; 0x1d
+     cd4:	40 91 b5 20 	lds	r20, 0x20B5	; 0x8020b5 <b1_state>
+     cd8:	42 9f       	mul	r20, r18
+     cda:	c0 01       	movw	r24, r0
+     cdc:	43 9f       	mul	r20, r19
+     cde:	90 0d       	add	r25, r0
+     ce0:	11 24       	eor	r1, r1
+     ce2:	86 59       	subi	r24, 0x96	; 150
+     ce4:	99 4d       	sbci	r25, 0xD9	; 217
+     ce6:	95 8f       	std	Z+29, r25	; 0x1d
 				//Must enable last for REPCNT won't work!
 				DMA.CH0.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
-     cdc:	80 89       	ldd	r24, Z+16	; 0x10
-     cde:	80 68       	ori	r24, 0x80	; 128
-     ce0:	80 8b       	std	Z+16, r24	; 0x10
+     ce8:	80 89       	ldd	r24, Z+16	; 0x10
+     cea:	80 68       	ori	r24, 0x80	; 128
+     cec:	80 8b       	std	Z+16, r24	; 0x10
 				b1_state = !b1_state;
-     ce2:	90 91 b5 20 	lds	r25, 0x20B5	; 0x8020b5 <b1_state>
-     ce6:	81 e0       	ldi	r24, 0x01	; 1
-     ce8:	91 11       	cpse	r25, r1
-     cea:	80 e0       	ldi	r24, 0x00	; 0
-     cec:	80 93 b5 20 	sts	0x20B5, r24	; 0x8020b5 <b1_state>
+     cee:	90 91 b5 20 	lds	r25, 0x20B5	; 0x8020b5 <b1_state>
+     cf2:	81 e0       	ldi	r24, 0x01	; 1
+     cf4:	91 11       	cpse	r25, r1
+     cf6:	80 e0       	ldi	r24, 0x00	; 0
+     cf8:	80 93 b5 20 	sts	0x20B5, r24	; 0x8020b5 <b1_state>
 			break;
-     cf0:	be c0       	rjmp	.+380    	; 0xe6e <__vector_6+0x254>
+     cfc:	be c0       	rjmp	.+380    	; 0xe7a <__vector_6+0x254>
 			case 2:
 				DMA.CH0.TRFCNT = HALFPACKET_SIZE;
-     cf2:	e0 e0       	ldi	r30, 0x00	; 0
-     cf4:	f1 e0       	ldi	r31, 0x01	; 1
-     cf6:	87 e7       	ldi	r24, 0x77	; 119
-     cf8:	91 e0       	ldi	r25, 0x01	; 1
-     cfa:	84 8b       	std	Z+20, r24	; 0x14
-     cfc:	95 8b       	std	Z+21, r25	; 0x15
+     cfe:	e0 e0       	ldi	r30, 0x00	; 0
+     d00:	f1 e0       	ldi	r31, 0x01	; 1
+     d02:	87 e7       	ldi	r24, 0x77	; 119
+     d04:	91 e0       	ldi	r25, 0x01	; 1
+     d06:	84 8b       	std	Z+20, r24	; 0x14
+     d08:	95 8b       	std	Z+21, r25	; 0x15
 				DMA.CH0.DESTADDR0 = (( (uint16_t) &isoBuf[b1_state * PACKET_SIZE]) >> 0) & 0xFF;  //Dest address is isoBuf
-     cfe:	40 91 b5 20 	lds	r20, 0x20B5	; 0x8020b5 <b1_state>
-     d02:	2e ee       	ldi	r18, 0xEE	; 238
-     d04:	32 e0       	ldi	r19, 0x02	; 2
-     d06:	42 9f       	mul	r20, r18
-     d08:	c0 01       	movw	r24, r0
-     d0a:	43 9f       	mul	r20, r19
-     d0c:	90 0d       	add	r25, r0
-     d0e:	11 24       	eor	r1, r1
-     d10:	86 59       	subi	r24, 0x96	; 150
-     d12:	99 4d       	sbci	r25, 0xD9	; 217
-     d14:	84 8f       	std	Z+28, r24	; 0x1c
+     d0a:	40 91 b5 20 	lds	r20, 0x20B5	; 0x8020b5 <b1_state>
+     d0e:	2e ee       	ldi	r18, 0xEE	; 238
+     d10:	32 e0       	ldi	r19, 0x02	; 2
+     d12:	42 9f       	mul	r20, r18
+     d14:	c0 01       	movw	r24, r0
+     d16:	43 9f       	mul	r20, r19
+     d18:	90 0d       	add	r25, r0
+     d1a:	11 24       	eor	r1, r1
+     d1c:	86 59       	subi	r24, 0x96	; 150
+     d1e:	99 4d       	sbci	r25, 0xD9	; 217
+     d20:	84 8f       	std	Z+28, r24	; 0x1c
 				DMA.CH0.DESTADDR1 = (( (uint16_t) &isoBuf[b1_state * PACKET_SIZE]) >> 8) & 0xFF;
-     d16:	40 91 b5 20 	lds	r20, 0x20B5	; 0x8020b5 <b1_state>
-     d1a:	42 9f       	mul	r20, r18
-     d1c:	c0 01       	movw	r24, r0
-     d1e:	43 9f       	mul	r20, r19
-     d20:	90 0d       	add	r25, r0
-     d22:	11 24       	eor	r1, r1
-     d24:	86 59       	subi	r24, 0x96	; 150
-     d26:	99 4d       	sbci	r25, 0xD9	; 217
-     d28:	95 8f       	std	Z+29, r25	; 0x1d
+     d22:	40 91 b5 20 	lds	r20, 0x20B5	; 0x8020b5 <b1_state>
+     d26:	42 9f       	mul	r20, r18
+     d28:	c0 01       	movw	r24, r0
+     d2a:	43 9f       	mul	r20, r19
+     d2c:	90 0d       	add	r25, r0
+     d2e:	11 24       	eor	r1, r1
+     d30:	86 59       	subi	r24, 0x96	; 150
+     d32:	99 4d       	sbci	r25, 0xD9	; 217
+     d34:	95 8f       	std	Z+29, r25	; 0x1d
 				//Must enable last for REPCNT won't work!
 				DMA.CH0.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
-     d2a:	80 89       	ldd	r24, Z+16	; 0x10
-     d2c:	80 68       	ori	r24, 0x80	; 128
-     d2e:	80 8b       	std	Z+16, r24	; 0x10
+     d36:	80 89       	ldd	r24, Z+16	; 0x10
+     d38:	80 68       	ori	r24, 0x80	; 128
+     d3a:	80 8b       	std	Z+16, r24	; 0x10
 				b1_state = !b1_state;
-     d30:	90 91 b5 20 	lds	r25, 0x20B5	; 0x8020b5 <b1_state>
-     d34:	81 e0       	ldi	r24, 0x01	; 1
-     d36:	91 11       	cpse	r25, r1
-     d38:	80 e0       	ldi	r24, 0x00	; 0
-     d3a:	80 93 b5 20 	sts	0x20B5, r24	; 0x8020b5 <b1_state>
+     d3c:	90 91 b5 20 	lds	r25, 0x20B5	; 0x8020b5 <b1_state>
+     d40:	81 e0       	ldi	r24, 0x01	; 1
+     d42:	91 11       	cpse	r25, r1
+     d44:	80 e0       	ldi	r24, 0x00	; 0
+     d46:	80 93 b5 20 	sts	0x20B5, r24	; 0x8020b5 <b1_state>
 			break;
-     d3e:	97 c0       	rjmp	.+302    	; 0xe6e <__vector_6+0x254>
+     d4a:	97 c0       	rjmp	.+302    	; 0xe7a <__vector_6+0x254>
 			case 3:
 				DMA.CH0.TRFCNT = HALFPACKET_SIZE;
-     d40:	e0 e0       	ldi	r30, 0x00	; 0
-     d42:	f1 e0       	ldi	r31, 0x01	; 1
-     d44:	87 e7       	ldi	r24, 0x77	; 119
-     d46:	91 e0       	ldi	r25, 0x01	; 1
-     d48:	84 8b       	std	Z+20, r24	; 0x14
-     d4a:	95 8b       	std	Z+21, r25	; 0x15
+     d4c:	e0 e0       	ldi	r30, 0x00	; 0
+     d4e:	f1 e0       	ldi	r31, 0x01	; 1
+     d50:	87 e7       	ldi	r24, 0x77	; 119
+     d52:	91 e0       	ldi	r25, 0x01	; 1
+     d54:	84 8b       	std	Z+20, r24	; 0x14
+     d56:	95 8b       	std	Z+21, r25	; 0x15
 				DMA.CH0.DESTADDR0 = (( (uint16_t) &isoBuf[b1_state * PACKET_SIZE]) >> 0) & 0xFF;  //Dest address is isoBuf
-     d4c:	40 91 b5 20 	lds	r20, 0x20B5	; 0x8020b5 <b1_state>
-     d50:	2e ee       	ldi	r18, 0xEE	; 238
-     d52:	32 e0       	ldi	r19, 0x02	; 2
-     d54:	42 9f       	mul	r20, r18
-     d56:	c0 01       	movw	r24, r0
-     d58:	43 9f       	mul	r20, r19
-     d5a:	90 0d       	add	r25, r0
-     d5c:	11 24       	eor	r1, r1
-     d5e:	86 59       	subi	r24, 0x96	; 150
-     d60:	99 4d       	sbci	r25, 0xD9	; 217
-     d62:	84 8f       	std	Z+28, r24	; 0x1c
+     d58:	40 91 b5 20 	lds	r20, 0x20B5	; 0x8020b5 <b1_state>
+     d5c:	2e ee       	ldi	r18, 0xEE	; 238
+     d5e:	32 e0       	ldi	r19, 0x02	; 2
+     d60:	42 9f       	mul	r20, r18
+     d62:	c0 01       	movw	r24, r0
+     d64:	43 9f       	mul	r20, r19
+     d66:	90 0d       	add	r25, r0
+     d68:	11 24       	eor	r1, r1
+     d6a:	86 59       	subi	r24, 0x96	; 150
+     d6c:	99 4d       	sbci	r25, 0xD9	; 217
+     d6e:	84 8f       	std	Z+28, r24	; 0x1c
 				DMA.CH0.DESTADDR1 = (( (uint16_t) &isoBuf[b1_state * PACKET_SIZE]) >> 8) & 0xFF;
-     d64:	40 91 b5 20 	lds	r20, 0x20B5	; 0x8020b5 <b1_state>
-     d68:	42 9f       	mul	r20, r18
-     d6a:	c0 01       	movw	r24, r0
-     d6c:	43 9f       	mul	r20, r19
-     d6e:	90 0d       	add	r25, r0
-     d70:	11 24       	eor	r1, r1
-     d72:	86 59       	subi	r24, 0x96	; 150
-     d74:	99 4d       	sbci	r25, 0xD9	; 217
-     d76:	95 8f       	std	Z+29, r25	; 0x1d
+     d70:	40 91 b5 20 	lds	r20, 0x20B5	; 0x8020b5 <b1_state>
+     d74:	42 9f       	mul	r20, r18
+     d76:	c0 01       	movw	r24, r0
+     d78:	43 9f       	mul	r20, r19
+     d7a:	90 0d       	add	r25, r0
+     d7c:	11 24       	eor	r1, r1
+     d7e:	86 59       	subi	r24, 0x96	; 150
+     d80:	99 4d       	sbci	r25, 0xD9	; 217
+     d82:	95 8f       	std	Z+29, r25	; 0x1d
 				//Must enable last for REPCNT won't work!
 				DMA.CH0.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
-     d78:	80 89       	ldd	r24, Z+16	; 0x10
-     d7a:	80 68       	ori	r24, 0x80	; 128
-     d7c:	80 8b       	std	Z+16, r24	; 0x10
+     d84:	80 89       	ldd	r24, Z+16	; 0x10
+     d86:	80 68       	ori	r24, 0x80	; 128
+     d88:	80 8b       	std	Z+16, r24	; 0x10
 				b1_state = !b1_state;
-     d7e:	90 91 b5 20 	lds	r25, 0x20B5	; 0x8020b5 <b1_state>
-     d82:	81 e0       	ldi	r24, 0x01	; 1
-     d84:	91 11       	cpse	r25, r1
-     d86:	80 e0       	ldi	r24, 0x00	; 0
-     d88:	80 93 b5 20 	sts	0x20B5, r24	; 0x8020b5 <b1_state>
+     d8a:	90 91 b5 20 	lds	r25, 0x20B5	; 0x8020b5 <b1_state>
+     d8e:	81 e0       	ldi	r24, 0x01	; 1
+     d90:	91 11       	cpse	r25, r1
+     d92:	80 e0       	ldi	r24, 0x00	; 0
+     d94:	80 93 b5 20 	sts	0x20B5, r24	; 0x8020b5 <b1_state>
 			break;
-     d8c:	70 c0       	rjmp	.+224    	; 0xe6e <__vector_6+0x254>
+     d98:	70 c0       	rjmp	.+224    	; 0xe7a <__vector_6+0x254>
 			case 4:
 				DMA.CH0.TRFCNT = HALFPACKET_SIZE;
-     d8e:	e0 e0       	ldi	r30, 0x00	; 0
-     d90:	f1 e0       	ldi	r31, 0x01	; 1
-     d92:	87 e7       	ldi	r24, 0x77	; 119
-     d94:	91 e0       	ldi	r25, 0x01	; 1
-     d96:	84 8b       	std	Z+20, r24	; 0x14
-     d98:	95 8b       	std	Z+21, r25	; 0x15
+     d9a:	e0 e0       	ldi	r30, 0x00	; 0
+     d9c:	f1 e0       	ldi	r31, 0x01	; 1
+     d9e:	87 e7       	ldi	r24, 0x77	; 119
+     da0:	91 e0       	ldi	r25, 0x01	; 1
+     da2:	84 8b       	std	Z+20, r24	; 0x14
+     da4:	95 8b       	std	Z+21, r25	; 0x15
 				DMA.CH0.DESTADDR0 = (( (uint16_t) &isoBuf[b1_state * PACKET_SIZE]) >> 0) & 0xFF;  //Dest address is isoBuf
-     d9a:	40 91 b5 20 	lds	r20, 0x20B5	; 0x8020b5 <b1_state>
-     d9e:	2e ee       	ldi	r18, 0xEE	; 238
-     da0:	32 e0       	ldi	r19, 0x02	; 2
-     da2:	42 9f       	mul	r20, r18
-     da4:	c0 01       	movw	r24, r0
-     da6:	43 9f       	mul	r20, r19
-     da8:	90 0d       	add	r25, r0
-     daa:	11 24       	eor	r1, r1
-     dac:	86 59       	subi	r24, 0x96	; 150
-     dae:	99 4d       	sbci	r25, 0xD9	; 217
-     db0:	84 8f       	std	Z+28, r24	; 0x1c
+     da6:	40 91 b5 20 	lds	r20, 0x20B5	; 0x8020b5 <b1_state>
+     daa:	2e ee       	ldi	r18, 0xEE	; 238
+     dac:	32 e0       	ldi	r19, 0x02	; 2
+     dae:	42 9f       	mul	r20, r18
+     db0:	c0 01       	movw	r24, r0
+     db2:	43 9f       	mul	r20, r19
+     db4:	90 0d       	add	r25, r0
+     db6:	11 24       	eor	r1, r1
+     db8:	86 59       	subi	r24, 0x96	; 150
+     dba:	99 4d       	sbci	r25, 0xD9	; 217
+     dbc:	84 8f       	std	Z+28, r24	; 0x1c
 				DMA.CH0.DESTADDR1 = (( (uint16_t) &isoBuf[b1_state * PACKET_SIZE]) >> 8) & 0xFF;
-     db2:	40 91 b5 20 	lds	r20, 0x20B5	; 0x8020b5 <b1_state>
-     db6:	42 9f       	mul	r20, r18
-     db8:	c0 01       	movw	r24, r0
-     dba:	43 9f       	mul	r20, r19
-     dbc:	90 0d       	add	r25, r0
-     dbe:	11 24       	eor	r1, r1
-     dc0:	86 59       	subi	r24, 0x96	; 150
-     dc2:	99 4d       	sbci	r25, 0xD9	; 217
-     dc4:	95 8f       	std	Z+29, r25	; 0x1d
+     dbe:	40 91 b5 20 	lds	r20, 0x20B5	; 0x8020b5 <b1_state>
+     dc2:	42 9f       	mul	r20, r18
+     dc4:	c0 01       	movw	r24, r0
+     dc6:	43 9f       	mul	r20, r19
+     dc8:	90 0d       	add	r25, r0
+     dca:	11 24       	eor	r1, r1
+     dcc:	86 59       	subi	r24, 0x96	; 150
+     dce:	99 4d       	sbci	r25, 0xD9	; 217
+     dd0:	95 8f       	std	Z+29, r25	; 0x1d
 				//Must enable last for REPCNT won't work!
 				DMA.CH0.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
-     dc6:	80 89       	ldd	r24, Z+16	; 0x10
-     dc8:	80 68       	ori	r24, 0x80	; 128
-     dca:	80 8b       	std	Z+16, r24	; 0x10
+     dd2:	80 89       	ldd	r24, Z+16	; 0x10
+     dd4:	80 68       	ori	r24, 0x80	; 128
+     dd6:	80 8b       	std	Z+16, r24	; 0x10
 				b1_state = !b1_state;
-     dcc:	90 91 b5 20 	lds	r25, 0x20B5	; 0x8020b5 <b1_state>
-     dd0:	81 e0       	ldi	r24, 0x01	; 1
-     dd2:	91 11       	cpse	r25, r1
-     dd4:	80 e0       	ldi	r24, 0x00	; 0
-     dd6:	80 93 b5 20 	sts	0x20B5, r24	; 0x8020b5 <b1_state>
+     dd8:	90 91 b5 20 	lds	r25, 0x20B5	; 0x8020b5 <b1_state>
+     ddc:	81 e0       	ldi	r24, 0x01	; 1
+     dde:	91 11       	cpse	r25, r1
+     de0:	80 e0       	ldi	r24, 0x00	; 0
+     de2:	80 93 b5 20 	sts	0x20B5, r24	; 0x8020b5 <b1_state>
 			break;
-     dda:	49 c0       	rjmp	.+146    	; 0xe6e <__vector_6+0x254>
+     de6:	49 c0       	rjmp	.+146    	; 0xe7a <__vector_6+0x254>
 			case 6:
 				DMA.CH0.TRFCNT = PACKET_SIZE;
-     ddc:	e0 e0       	ldi	r30, 0x00	; 0
-     dde:	f1 e0       	ldi	r31, 0x01	; 1
-     de0:	2e ee       	ldi	r18, 0xEE	; 238
-     de2:	32 e0       	ldi	r19, 0x02	; 2
-     de4:	24 8b       	std	Z+20, r18	; 0x14
-     de6:	35 8b       	std	Z+21, r19	; 0x15
+     de8:	e0 e0       	ldi	r30, 0x00	; 0
+     dea:	f1 e0       	ldi	r31, 0x01	; 1
+     dec:	2e ee       	ldi	r18, 0xEE	; 238
+     dee:	32 e0       	ldi	r19, 0x02	; 2
+     df0:	24 8b       	std	Z+20, r18	; 0x14
+     df2:	35 8b       	std	Z+21, r19	; 0x15
 				DMA.CH0.DESTADDR0 = (( (uint16_t) &isoBuf[b1_state * PACKET_SIZE]) >> 0) & 0xFF;  //Dest address is isoBuf
-     de8:	40 91 b5 20 	lds	r20, 0x20B5	; 0x8020b5 <b1_state>
-     dec:	42 9f       	mul	r20, r18
-     dee:	c0 01       	movw	r24, r0
-     df0:	43 9f       	mul	r20, r19
-     df2:	90 0d       	add	r25, r0
-     df4:	11 24       	eor	r1, r1
-     df6:	86 59       	subi	r24, 0x96	; 150
-     df8:	99 4d       	sbci	r25, 0xD9	; 217
-     dfa:	84 8f       	std	Z+28, r24	; 0x1c
+     df4:	40 91 b5 20 	lds	r20, 0x20B5	; 0x8020b5 <b1_state>
+     df8:	42 9f       	mul	r20, r18
+     dfa:	c0 01       	movw	r24, r0
+     dfc:	43 9f       	mul	r20, r19
+     dfe:	90 0d       	add	r25, r0
+     e00:	11 24       	eor	r1, r1
+     e02:	86 59       	subi	r24, 0x96	; 150
+     e04:	99 4d       	sbci	r25, 0xD9	; 217
+     e06:	84 8f       	std	Z+28, r24	; 0x1c
 				DMA.CH0.DESTADDR1 = (( (uint16_t) &isoBuf[b1_state * PACKET_SIZE]) >> 8) & 0xFF;
-     dfc:	40 91 b5 20 	lds	r20, 0x20B5	; 0x8020b5 <b1_state>
-     e00:	42 9f       	mul	r20, r18
-     e02:	c0 01       	movw	r24, r0
-     e04:	43 9f       	mul	r20, r19
-     e06:	90 0d       	add	r25, r0
-     e08:	11 24       	eor	r1, r1
-     e0a:	86 59       	subi	r24, 0x96	; 150
-     e0c:	99 4d       	sbci	r25, 0xD9	; 217
-     e0e:	95 8f       	std	Z+29, r25	; 0x1d
+     e08:	40 91 b5 20 	lds	r20, 0x20B5	; 0x8020b5 <b1_state>
+     e0c:	42 9f       	mul	r20, r18
+     e0e:	c0 01       	movw	r24, r0
+     e10:	43 9f       	mul	r20, r19
+     e12:	90 0d       	add	r25, r0
+     e14:	11 24       	eor	r1, r1
+     e16:	86 59       	subi	r24, 0x96	; 150
+     e18:	99 4d       	sbci	r25, 0xD9	; 217
+     e1a:	95 8f       	std	Z+29, r25	; 0x1d
 				//Must enable last for REPCNT won't work!
 				DMA.CH0.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
-     e10:	80 89       	ldd	r24, Z+16	; 0x10
-     e12:	80 68       	ori	r24, 0x80	; 128
-     e14:	80 8b       	std	Z+16, r24	; 0x10
+     e1c:	80 89       	ldd	r24, Z+16	; 0x10
+     e1e:	80 68       	ori	r24, 0x80	; 128
+     e20:	80 8b       	std	Z+16, r24	; 0x10
 				b1_state = !b1_state;
-     e16:	90 91 b5 20 	lds	r25, 0x20B5	; 0x8020b5 <b1_state>
-     e1a:	81 e0       	ldi	r24, 0x01	; 1
-     e1c:	91 11       	cpse	r25, r1
-     e1e:	80 e0       	ldi	r24, 0x00	; 0
-     e20:	80 93 b5 20 	sts	0x20B5, r24	; 0x8020b5 <b1_state>
+     e22:	90 91 b5 20 	lds	r25, 0x20B5	; 0x8020b5 <b1_state>
+     e26:	81 e0       	ldi	r24, 0x01	; 1
+     e28:	91 11       	cpse	r25, r1
+     e2a:	80 e0       	ldi	r24, 0x00	; 0
+     e2c:	80 93 b5 20 	sts	0x20B5, r24	; 0x8020b5 <b1_state>
 			break;
-     e24:	24 c0       	rjmp	.+72     	; 0xe6e <__vector_6+0x254>
+     e30:	24 c0       	rjmp	.+72     	; 0xe7a <__vector_6+0x254>
 			case 7:
 				DMA.CH0.TRFCNT = PACKET_SIZE;
-     e26:	e0 e0       	ldi	r30, 0x00	; 0
-     e28:	f1 e0       	ldi	r31, 0x01	; 1
-     e2a:	2e ee       	ldi	r18, 0xEE	; 238
-     e2c:	32 e0       	ldi	r19, 0x02	; 2
-     e2e:	24 8b       	std	Z+20, r18	; 0x14
-     e30:	35 8b       	std	Z+21, r19	; 0x15
+     e32:	e0 e0       	ldi	r30, 0x00	; 0
+     e34:	f1 e0       	ldi	r31, 0x01	; 1
+     e36:	2e ee       	ldi	r18, 0xEE	; 238
+     e38:	32 e0       	ldi	r19, 0x02	; 2
+     e3a:	24 8b       	std	Z+20, r18	; 0x14
+     e3c:	35 8b       	std	Z+21, r19	; 0x15
 				DMA.CH0.DESTADDR0 = (( (uint16_t) &isoBuf[b1_state * PACKET_SIZE]) >> 0) & 0xFF;  //Dest address is isoBuf
-     e32:	40 91 b5 20 	lds	r20, 0x20B5	; 0x8020b5 <b1_state>
-     e36:	42 9f       	mul	r20, r18
-     e38:	c0 01       	movw	r24, r0
-     e3a:	43 9f       	mul	r20, r19
-     e3c:	90 0d       	add	r25, r0
-     e3e:	11 24       	eor	r1, r1
-     e40:	86 59       	subi	r24, 0x96	; 150
-     e42:	99 4d       	sbci	r25, 0xD9	; 217
-     e44:	84 8f       	std	Z+28, r24	; 0x1c
+     e3e:	40 91 b5 20 	lds	r20, 0x20B5	; 0x8020b5 <b1_state>
+     e42:	42 9f       	mul	r20, r18
+     e44:	c0 01       	movw	r24, r0
+     e46:	43 9f       	mul	r20, r19
+     e48:	90 0d       	add	r25, r0
+     e4a:	11 24       	eor	r1, r1
+     e4c:	86 59       	subi	r24, 0x96	; 150
+     e4e:	99 4d       	sbci	r25, 0xD9	; 217
+     e50:	84 8f       	std	Z+28, r24	; 0x1c
 				DMA.CH0.DESTADDR1 = (( (uint16_t) &isoBuf[b1_state * PACKET_SIZE]) >> 8) & 0xFF;
-     e46:	40 91 b5 20 	lds	r20, 0x20B5	; 0x8020b5 <b1_state>
-     e4a:	42 9f       	mul	r20, r18
-     e4c:	c0 01       	movw	r24, r0
-     e4e:	43 9f       	mul	r20, r19
-     e50:	90 0d       	add	r25, r0
-     e52:	11 24       	eor	r1, r1
-     e54:	86 59       	subi	r24, 0x96	; 150
-     e56:	99 4d       	sbci	r25, 0xD9	; 217
-     e58:	95 8f       	std	Z+29, r25	; 0x1d
+     e52:	40 91 b5 20 	lds	r20, 0x20B5	; 0x8020b5 <b1_state>
+     e56:	42 9f       	mul	r20, r18
+     e58:	c0 01       	movw	r24, r0
+     e5a:	43 9f       	mul	r20, r19
+     e5c:	90 0d       	add	r25, r0
+     e5e:	11 24       	eor	r1, r1
+     e60:	86 59       	subi	r24, 0x96	; 150
+     e62:	99 4d       	sbci	r25, 0xD9	; 217
+     e64:	95 8f       	std	Z+29, r25	; 0x1d
 				//Must enable last for REPCNT won't work!
 				DMA.CH0.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
-     e5a:	80 89       	ldd	r24, Z+16	; 0x10
-     e5c:	80 68       	ori	r24, 0x80	; 128
-     e5e:	80 8b       	std	Z+16, r24	; 0x10
+     e66:	80 89       	ldd	r24, Z+16	; 0x10
+     e68:	80 68       	ori	r24, 0x80	; 128
+     e6a:	80 8b       	std	Z+16, r24	; 0x10
 				b1_state = !b1_state;
-     e60:	90 91 b5 20 	lds	r25, 0x20B5	; 0x8020b5 <b1_state>
-     e64:	81 e0       	ldi	r24, 0x01	; 1
-     e66:	91 11       	cpse	r25, r1
-     e68:	80 e0       	ldi	r24, 0x00	; 0
-     e6a:	80 93 b5 20 	sts	0x20B5, r24	; 0x8020b5 <b1_state>
+     e6c:	90 91 b5 20 	lds	r25, 0x20B5	; 0x8020b5 <b1_state>
+     e70:	81 e0       	ldi	r24, 0x01	; 1
+     e72:	91 11       	cpse	r25, r1
+     e74:	80 e0       	ldi	r24, 0x00	; 0
+     e76:	80 93 b5 20 	sts	0x20B5, r24	; 0x8020b5 <b1_state>
 			break;
 			default:
 			////////////////////////////////////////
 			break;
 		}
 }
-     e6e:	ff 91       	pop	r31
-     e70:	ef 91       	pop	r30
-     e72:	bf 91       	pop	r27
-     e74:	af 91       	pop	r26
-     e76:	9f 91       	pop	r25
-     e78:	8f 91       	pop	r24
-     e7a:	4f 91       	pop	r20
-     e7c:	3f 91       	pop	r19
-     e7e:	2f 91       	pop	r18
-     e80:	0f 90       	pop	r0
-     e82:	0f be       	out	0x3f, r0	; 63
-     e84:	0f 90       	pop	r0
-     e86:	1f 90       	pop	r1
-     e88:	18 95       	reti
+     e7a:	ff 91       	pop	r31
+     e7c:	ef 91       	pop	r30
+     e7e:	bf 91       	pop	r27
+     e80:	af 91       	pop	r26
+     e82:	9f 91       	pop	r25
+     e84:	8f 91       	pop	r24
+     e86:	4f 91       	pop	r20
+     e88:	3f 91       	pop	r19
+     e8a:	2f 91       	pop	r18
+     e8c:	0f 90       	pop	r0
+     e8e:	0f be       	out	0x3f, r0	; 63
+     e90:	0f 90       	pop	r0
+     e92:	1f 90       	pop	r1
+     e94:	18 95       	reti
 
-00000e8a <__vector_7>:
+00000e96 <__vector_7>:
 
 ISR(DMA_CH1_vect){
-     e8a:	1f 92       	push	r1
-     e8c:	0f 92       	push	r0
-     e8e:	0f b6       	in	r0, 0x3f	; 63
-     e90:	0f 92       	push	r0
-     e92:	11 24       	eor	r1, r1
-     e94:	2f 93       	push	r18
-     e96:	3f 93       	push	r19
-     e98:	4f 93       	push	r20
-     e9a:	8f 93       	push	r24
-     e9c:	9f 93       	push	r25
-     e9e:	ef 93       	push	r30
-     ea0:	ff 93       	push	r31
+     e96:	1f 92       	push	r1
+     e98:	0f 92       	push	r0
+     e9a:	0f b6       	in	r0, 0x3f	; 63
+     e9c:	0f 92       	push	r0
+     e9e:	11 24       	eor	r1, r1
+     ea0:	2f 93       	push	r18
+     ea2:	3f 93       	push	r19
+     ea4:	4f 93       	push	r20
+     ea6:	8f 93       	push	r24
+     ea8:	9f 93       	push	r25
+     eaa:	ef 93       	push	r30
+     eac:	ff 93       	push	r31
 		DMA.INTFLAGS = 0x02;
-     ea2:	82 e0       	ldi	r24, 0x02	; 2
-     ea4:	80 93 03 01 	sts	0x0103, r24	; 0x800103 <__TEXT_REGION_LENGTH__+0x700103>
+     eae:	82 e0       	ldi	r24, 0x02	; 2
+     eb0:	80 93 03 01 	sts	0x0103, r24	; 0x800103 <__TEXT_REGION_LENGTH__+0x700103>
 		switch(global_mode){
-     ea8:	80 91 00 20 	lds	r24, 0x2000	; 0x802000 <__data_start>
-     eac:	81 30       	cpi	r24, 0x01	; 1
-     eae:	19 f0       	breq	.+6      	; 0xeb6 <__vector_7+0x2c>
-     eb0:	82 30       	cpi	r24, 0x02	; 2
-     eb2:	41 f1       	breq	.+80     	; 0xf04 <__vector_7+0x7a>
-     eb4:	4d c0       	rjmp	.+154    	; 0xf50 <__vector_7+0xc6>
+     eb4:	80 91 00 20 	lds	r24, 0x2000	; 0x802000 <__data_start>
+     eb8:	81 30       	cpi	r24, 0x01	; 1
+     eba:	19 f0       	breq	.+6      	; 0xec2 <__vector_7+0x2c>
+     ebc:	82 30       	cpi	r24, 0x02	; 2
+     ebe:	41 f1       	breq	.+80     	; 0xf10 <__vector_7+0x7a>
+     ec0:	4d c0       	rjmp	.+154    	; 0xf5c <__vector_7+0xc6>
 			case 0:
 			////////////////////////////////////////
 			break;
 			case 1:
 				DMA.CH1.TRFCNT = HALFPACKET_SIZE;
-     eb6:	e0 e0       	ldi	r30, 0x00	; 0
-     eb8:	f1 e0       	ldi	r31, 0x01	; 1
-     eba:	87 e7       	ldi	r24, 0x77	; 119
-     ebc:	91 e0       	ldi	r25, 0x01	; 1
-     ebe:	84 a3       	std	Z+36, r24	; 0x24
-     ec0:	95 a3       	std	Z+37, r25	; 0x25
+     ec2:	e0 e0       	ldi	r30, 0x00	; 0
+     ec4:	f1 e0       	ldi	r31, 0x01	; 1
+     ec6:	87 e7       	ldi	r24, 0x77	; 119
+     ec8:	91 e0       	ldi	r25, 0x01	; 1
+     eca:	84 a3       	std	Z+36, r24	; 0x24
+     ecc:	95 a3       	std	Z+37, r25	; 0x25
 				DMA.CH1.DESTADDR0 = (( (uint16_t) &isoBuf[b2_state * PACKET_SIZE + HALFPACKET_SIZE]) >> 0) & 0xFF;  //Dest address is isoBuf
-     ec2:	40 91 b4 20 	lds	r20, 0x20B4	; 0x8020b4 <b2_state>
-     ec6:	2e ee       	ldi	r18, 0xEE	; 238
-     ec8:	32 e0       	ldi	r19, 0x02	; 2
-     eca:	42 9f       	mul	r20, r18
-     ecc:	c0 01       	movw	r24, r0
-     ece:	43 9f       	mul	r20, r19
-     ed0:	90 0d       	add	r25, r0
-     ed2:	11 24       	eor	r1, r1
-     ed4:	8f 51       	subi	r24, 0x1F	; 31
-     ed6:	98 4d       	sbci	r25, 0xD8	; 216
-     ed8:	84 a7       	std	Z+44, r24	; 0x2c
+     ece:	40 91 b4 20 	lds	r20, 0x20B4	; 0x8020b4 <b2_state>
+     ed2:	2e ee       	ldi	r18, 0xEE	; 238
+     ed4:	32 e0       	ldi	r19, 0x02	; 2
+     ed6:	42 9f       	mul	r20, r18
+     ed8:	c0 01       	movw	r24, r0
+     eda:	43 9f       	mul	r20, r19
+     edc:	90 0d       	add	r25, r0
+     ede:	11 24       	eor	r1, r1
+     ee0:	8f 51       	subi	r24, 0x1F	; 31
+     ee2:	98 4d       	sbci	r25, 0xD8	; 216
+     ee4:	84 a7       	std	Z+44, r24	; 0x2c
 				DMA.CH1.DESTADDR1 = (( (uint16_t) &isoBuf[b2_state * PACKET_SIZE + HALFPACKET_SIZE]) >> 8) & 0xFF;
-     eda:	40 91 b4 20 	lds	r20, 0x20B4	; 0x8020b4 <b2_state>
-     ede:	42 9f       	mul	r20, r18
-     ee0:	c0 01       	movw	r24, r0
-     ee2:	43 9f       	mul	r20, r19
-     ee4:	90 0d       	add	r25, r0
-     ee6:	11 24       	eor	r1, r1
-     ee8:	8f 51       	subi	r24, 0x1F	; 31
-     eea:	98 4d       	sbci	r25, 0xD8	; 216
-     eec:	95 a7       	std	Z+45, r25	; 0x2d
+     ee6:	40 91 b4 20 	lds	r20, 0x20B4	; 0x8020b4 <b2_state>
+     eea:	42 9f       	mul	r20, r18
+     eec:	c0 01       	movw	r24, r0
+     eee:	43 9f       	mul	r20, r19
+     ef0:	90 0d       	add	r25, r0
+     ef2:	11 24       	eor	r1, r1
+     ef4:	8f 51       	subi	r24, 0x1F	; 31
+     ef6:	98 4d       	sbci	r25, 0xD8	; 216
+     ef8:	95 a7       	std	Z+45, r25	; 0x2d
 				//Must enable last for REPCNT won't work!
 				DMA.CH1.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
-     eee:	80 a1       	ldd	r24, Z+32	; 0x20
-     ef0:	80 68       	ori	r24, 0x80	; 128
-     ef2:	80 a3       	std	Z+32, r24	; 0x20
+     efa:	80 a1       	ldd	r24, Z+32	; 0x20
+     efc:	80 68       	ori	r24, 0x80	; 128
+     efe:	80 a3       	std	Z+32, r24	; 0x20
 				b2_state = !b2_state;
-     ef4:	90 91 b4 20 	lds	r25, 0x20B4	; 0x8020b4 <b2_state>
-     ef8:	81 e0       	ldi	r24, 0x01	; 1
-     efa:	91 11       	cpse	r25, r1
-     efc:	80 e0       	ldi	r24, 0x00	; 0
-     efe:	80 93 b4 20 	sts	0x20B4, r24	; 0x8020b4 <b2_state>
+     f00:	90 91 b4 20 	lds	r25, 0x20B4	; 0x8020b4 <b2_state>
+     f04:	81 e0       	ldi	r24, 0x01	; 1
+     f06:	91 11       	cpse	r25, r1
+     f08:	80 e0       	ldi	r24, 0x00	; 0
+     f0a:	80 93 b4 20 	sts	0x20B4, r24	; 0x8020b4 <b2_state>
 			break;
-     f02:	26 c0       	rjmp	.+76     	; 0xf50 <__vector_7+0xc6>
+     f0e:	26 c0       	rjmp	.+76     	; 0xf5c <__vector_7+0xc6>
 			case 2:
 				DMA.CH1.TRFCNT = HALFPACKET_SIZE;
-     f04:	e0 e0       	ldi	r30, 0x00	; 0
-     f06:	f1 e0       	ldi	r31, 0x01	; 1
-     f08:	87 e7       	ldi	r24, 0x77	; 119
-     f0a:	91 e0       	ldi	r25, 0x01	; 1
-     f0c:	84 a3       	std	Z+36, r24	; 0x24
-     f0e:	95 a3       	std	Z+37, r25	; 0x25
+     f10:	e0 e0       	ldi	r30, 0x00	; 0
+     f12:	f1 e0       	ldi	r31, 0x01	; 1
+     f14:	87 e7       	ldi	r24, 0x77	; 119
+     f16:	91 e0       	ldi	r25, 0x01	; 1
+     f18:	84 a3       	std	Z+36, r24	; 0x24
+     f1a:	95 a3       	std	Z+37, r25	; 0x25
 				DMA.CH1.DESTADDR0 = (( (uint16_t) &isoBuf[b2_state * PACKET_SIZE + HALFPACKET_SIZE]) >> 0) & 0xFF;  //Dest address is isoBuf
-     f10:	40 91 b4 20 	lds	r20, 0x20B4	; 0x8020b4 <b2_state>
-     f14:	2e ee       	ldi	r18, 0xEE	; 238
-     f16:	32 e0       	ldi	r19, 0x02	; 2
-     f18:	42 9f       	mul	r20, r18
-     f1a:	c0 01       	movw	r24, r0
-     f1c:	43 9f       	mul	r20, r19
-     f1e:	90 0d       	add	r25, r0
-     f20:	11 24       	eor	r1, r1
-     f22:	8f 51       	subi	r24, 0x1F	; 31
-     f24:	98 4d       	sbci	r25, 0xD8	; 216
-     f26:	84 a7       	std	Z+44, r24	; 0x2c
+     f1c:	40 91 b4 20 	lds	r20, 0x20B4	; 0x8020b4 <b2_state>
+     f20:	2e ee       	ldi	r18, 0xEE	; 238
+     f22:	32 e0       	ldi	r19, 0x02	; 2
+     f24:	42 9f       	mul	r20, r18
+     f26:	c0 01       	movw	r24, r0
+     f28:	43 9f       	mul	r20, r19
+     f2a:	90 0d       	add	r25, r0
+     f2c:	11 24       	eor	r1, r1
+     f2e:	8f 51       	subi	r24, 0x1F	; 31
+     f30:	98 4d       	sbci	r25, 0xD8	; 216
+     f32:	84 a7       	std	Z+44, r24	; 0x2c
 				DMA.CH1.DESTADDR1 = (( (uint16_t) &isoBuf[b2_state * PACKET_SIZE + HALFPACKET_SIZE]) >> 8) & 0xFF;
-     f28:	40 91 b4 20 	lds	r20, 0x20B4	; 0x8020b4 <b2_state>
-     f2c:	42 9f       	mul	r20, r18
-     f2e:	c0 01       	movw	r24, r0
-     f30:	43 9f       	mul	r20, r19
-     f32:	90 0d       	add	r25, r0
-     f34:	11 24       	eor	r1, r1
-     f36:	8f 51       	subi	r24, 0x1F	; 31
-     f38:	98 4d       	sbci	r25, 0xD8	; 216
-     f3a:	95 a7       	std	Z+45, r25	; 0x2d
+     f34:	40 91 b4 20 	lds	r20, 0x20B4	; 0x8020b4 <b2_state>
+     f38:	42 9f       	mul	r20, r18
+     f3a:	c0 01       	movw	r24, r0
+     f3c:	43 9f       	mul	r20, r19
+     f3e:	90 0d       	add	r25, r0
+     f40:	11 24       	eor	r1, r1
+     f42:	8f 51       	subi	r24, 0x1F	; 31
+     f44:	98 4d       	sbci	r25, 0xD8	; 216
+     f46:	95 a7       	std	Z+45, r25	; 0x2d
 				//Must enable last for REPCNT won't work!
 				DMA.CH1.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
-     f3c:	80 a1       	ldd	r24, Z+32	; 0x20
-     f3e:	80 68       	ori	r24, 0x80	; 128
-     f40:	80 a3       	std	Z+32, r24	; 0x20
+     f48:	80 a1       	ldd	r24, Z+32	; 0x20
+     f4a:	80 68       	ori	r24, 0x80	; 128
+     f4c:	80 a3       	std	Z+32, r24	; 0x20
 				b2_state = !b2_state;
-     f42:	90 91 b4 20 	lds	r25, 0x20B4	; 0x8020b4 <b2_state>
-     f46:	81 e0       	ldi	r24, 0x01	; 1
-     f48:	91 11       	cpse	r25, r1
-     f4a:	80 e0       	ldi	r24, 0x00	; 0
-     f4c:	80 93 b4 20 	sts	0x20B4, r24	; 0x8020b4 <b2_state>
+     f4e:	90 91 b4 20 	lds	r25, 0x20B4	; 0x8020b4 <b2_state>
+     f52:	81 e0       	ldi	r24, 0x01	; 1
+     f54:	91 11       	cpse	r25, r1
+     f56:	80 e0       	ldi	r24, 0x00	; 0
+     f58:	80 93 b4 20 	sts	0x20B4, r24	; 0x8020b4 <b2_state>
 			break;
 			default:
 			////////////////////////////////////////
 			break;
 		}
 }
-     f50:	ff 91       	pop	r31
-     f52:	ef 91       	pop	r30
-     f54:	9f 91       	pop	r25
-     f56:	8f 91       	pop	r24
-     f58:	4f 91       	pop	r20
-     f5a:	3f 91       	pop	r19
-     f5c:	2f 91       	pop	r18
-     f5e:	0f 90       	pop	r0
-     f60:	0f be       	out	0x3f, r0	; 63
-     f62:	0f 90       	pop	r0
-     f64:	1f 90       	pop	r1
-     f66:	18 95       	reti
+     f5c:	ff 91       	pop	r31
+     f5e:	ef 91       	pop	r30
+     f60:	9f 91       	pop	r25
+     f62:	8f 91       	pop	r24
+     f64:	4f 91       	pop	r20
+     f66:	3f 91       	pop	r19
+     f68:	2f 91       	pop	r18
+     f6a:	0f 90       	pop	r0
+     f6c:	0f be       	out	0x3f, r0	; 63
+     f6e:	0f 90       	pop	r0
+     f70:	1f 90       	pop	r1
+     f72:	18 95       	reti
 
-00000f68 <__vector_9>:
+00000f74 <__vector_9>:
 
 ISR(DMA_CH3_vect){
-     f68:	1f 92       	push	r1
-     f6a:	0f 92       	push	r0
-     f6c:	0f b6       	in	r0, 0x3f	; 63
-     f6e:	0f 92       	push	r0
-     f70:	11 24       	eor	r1, r1
-     f72:	2f 93       	push	r18
-     f74:	3f 93       	push	r19
-     f76:	4f 93       	push	r20
-     f78:	8f 93       	push	r24
-     f7a:	9f 93       	push	r25
-     f7c:	ef 93       	push	r30
-     f7e:	ff 93       	push	r31
+     f74:	1f 92       	push	r1
+     f76:	0f 92       	push	r0
+     f78:	0f b6       	in	r0, 0x3f	; 63
+     f7a:	0f 92       	push	r0
+     f7c:	11 24       	eor	r1, r1
+     f7e:	2f 93       	push	r18
+     f80:	3f 93       	push	r19
+     f82:	4f 93       	push	r20
+     f84:	8f 93       	push	r24
+     f86:	9f 93       	push	r25
+     f88:	ef 93       	push	r30
+     f8a:	ff 93       	push	r31
 	DMA.INTFLAGS = 0x08;
-     f80:	88 e0       	ldi	r24, 0x08	; 8
-     f82:	80 93 03 01 	sts	0x0103, r24	; 0x800103 <__TEXT_REGION_LENGTH__+0x700103>
+     f8c:	88 e0       	ldi	r24, 0x08	; 8
+     f8e:	80 93 03 01 	sts	0x0103, r24	; 0x800103 <__TEXT_REGION_LENGTH__+0x700103>
 	DMA.CH3.TRFCNT = HALFPACKET_SIZE;
-     f86:	87 e7       	ldi	r24, 0x77	; 119
-     f88:	91 e0       	ldi	r25, 0x01	; 1
-     f8a:	80 93 44 01 	sts	0x0144, r24	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
-     f8e:	90 93 45 01 	sts	0x0145, r25	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
+     f92:	87 e7       	ldi	r24, 0x77	; 119
+     f94:	91 e0       	ldi	r25, 0x01	; 1
+     f96:	80 93 44 01 	sts	0x0144, r24	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
+     f9a:	90 93 45 01 	sts	0x0145, r25	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
 	DMA.CH3.DESTADDR0 = (( (uint16_t) &isoBuf[b2_state*PACKET_SIZE+HALFPACKET_SIZE]) >> 0) & 0xFF;  //Dest address is isoBuf
-     f92:	40 91 b4 20 	lds	r20, 0x20B4	; 0x8020b4 <b2_state>
-     f96:	2e ee       	ldi	r18, 0xEE	; 238
-     f98:	32 e0       	ldi	r19, 0x02	; 2
-     f9a:	42 9f       	mul	r20, r18
-     f9c:	c0 01       	movw	r24, r0
-     f9e:	43 9f       	mul	r20, r19
-     fa0:	90 0d       	add	r25, r0
-     fa2:	11 24       	eor	r1, r1
-     fa4:	8f 51       	subi	r24, 0x1F	; 31
-     fa6:	98 4d       	sbci	r25, 0xD8	; 216
-     fa8:	80 93 4c 01 	sts	0x014C, r24	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
+     f9e:	40 91 b4 20 	lds	r20, 0x20B4	; 0x8020b4 <b2_state>
+     fa2:	2e ee       	ldi	r18, 0xEE	; 238
+     fa4:	32 e0       	ldi	r19, 0x02	; 2
+     fa6:	42 9f       	mul	r20, r18
+     fa8:	c0 01       	movw	r24, r0
+     faa:	43 9f       	mul	r20, r19
+     fac:	90 0d       	add	r25, r0
+     fae:	11 24       	eor	r1, r1
+     fb0:	8f 51       	subi	r24, 0x1F	; 31
+     fb2:	98 4d       	sbci	r25, 0xD8	; 216
+     fb4:	80 93 4c 01 	sts	0x014C, r24	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
 	DMA.CH3.DESTADDR1 = (( (uint16_t) &isoBuf[b2_state*PACKET_SIZE+HALFPACKET_SIZE]) >> 8) & 0xFF;
-     fac:	40 91 b4 20 	lds	r20, 0x20B4	; 0x8020b4 <b2_state>
-     fb0:	42 9f       	mul	r20, r18
-     fb2:	c0 01       	movw	r24, r0
-     fb4:	43 9f       	mul	r20, r19
-     fb6:	90 0d       	add	r25, r0
-     fb8:	11 24       	eor	r1, r1
-     fba:	8f 51       	subi	r24, 0x1F	; 31
-     fbc:	98 4d       	sbci	r25, 0xD8	; 216
-     fbe:	90 93 4d 01 	sts	0x014D, r25	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
+     fb8:	40 91 b4 20 	lds	r20, 0x20B4	; 0x8020b4 <b2_state>
+     fbc:	42 9f       	mul	r20, r18
+     fbe:	c0 01       	movw	r24, r0
+     fc0:	43 9f       	mul	r20, r19
+     fc2:	90 0d       	add	r25, r0
+     fc4:	11 24       	eor	r1, r1
+     fc6:	8f 51       	subi	r24, 0x1F	; 31
+     fc8:	98 4d       	sbci	r25, 0xD8	; 216
+     fca:	90 93 4d 01 	sts	0x014D, r25	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
 	//Must enable last for REPCNT won't work!
 	DMA.CH3.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
-     fc2:	e0 e4       	ldi	r30, 0x40	; 64
-     fc4:	f1 e0       	ldi	r31, 0x01	; 1
-     fc6:	80 81       	ld	r24, Z
-     fc8:	80 68       	ori	r24, 0x80	; 128
-     fca:	80 83       	st	Z, r24
+     fce:	e0 e4       	ldi	r30, 0x40	; 64
+     fd0:	f1 e0       	ldi	r31, 0x01	; 1
+     fd2:	80 81       	ld	r24, Z
+     fd4:	80 68       	ori	r24, 0x80	; 128
+     fd6:	80 83       	st	Z, r24
 	b2_state = !b2_state;
-     fcc:	90 91 b4 20 	lds	r25, 0x20B4	; 0x8020b4 <b2_state>
-     fd0:	81 e0       	ldi	r24, 0x01	; 1
-     fd2:	91 11       	cpse	r25, r1
-     fd4:	80 e0       	ldi	r24, 0x00	; 0
-     fd6:	80 93 b4 20 	sts	0x20B4, r24	; 0x8020b4 <b2_state>
+     fd8:	90 91 b4 20 	lds	r25, 0x20B4	; 0x8020b4 <b2_state>
+     fdc:	81 e0       	ldi	r24, 0x01	; 1
+     fde:	91 11       	cpse	r25, r1
+     fe0:	80 e0       	ldi	r24, 0x00	; 0
+     fe2:	80 93 b4 20 	sts	0x20B4, r24	; 0x8020b4 <b2_state>
 }
-     fda:	ff 91       	pop	r31
-     fdc:	ef 91       	pop	r30
-     fde:	9f 91       	pop	r25
-     fe0:	8f 91       	pop	r24
-     fe2:	4f 91       	pop	r20
-     fe4:	3f 91       	pop	r19
-     fe6:	2f 91       	pop	r18
-     fe8:	0f 90       	pop	r0
-     fea:	0f be       	out	0x3f, r0	; 63
-     fec:	0f 90       	pop	r0
-     fee:	1f 90       	pop	r1
-     ff0:	18 95       	reti
+     fe6:	ff 91       	pop	r31
+     fe8:	ef 91       	pop	r30
+     fea:	9f 91       	pop	r25
+     fec:	8f 91       	pop	r24
+     fee:	4f 91       	pop	r20
+     ff0:	3f 91       	pop	r19
+     ff2:	2f 91       	pop	r18
+     ff4:	0f 90       	pop	r0
+     ff6:	0f be       	out	0x3f, r0	; 63
+     ff8:	0f 90       	pop	r0
+     ffa:	1f 90       	pop	r1
+     ffc:	18 95       	reti
 
-00000ff2 <tiny_timer_setup>:
+00000ffe <tiny_timer_setup>:
 #define PSU_PER 3000
 #define jump 6
 
 void tiny_timer_setup(void){
 	//Turn everything on!
 		PR.PRPC &= 0b11111100; //Enable TCC0, TCC1
-     ff2:	e0 e7       	ldi	r30, 0x70	; 112
-     ff4:	f0 e0       	ldi	r31, 0x00	; 0
-     ff6:	83 81       	ldd	r24, Z+3	; 0x03
-     ff8:	8c 7f       	andi	r24, 0xFC	; 252
-     ffa:	83 83       	std	Z+3, r24	; 0x03
+     ffe:	e0 e7       	ldi	r30, 0x70	; 112
+    1000:	f0 e0       	ldi	r31, 0x00	; 0
+    1002:	83 81       	ldd	r24, Z+3	; 0x03
+    1004:	8c 7f       	andi	r24, 0xFC	; 252
+    1006:	83 83       	std	Z+3, r24	; 0x03
 		PR.PRPD &= 0b11111100; //Enable TCD0, TCD1
-     ffc:	84 81       	ldd	r24, Z+4	; 0x04
-     ffe:	8c 7f       	andi	r24, 0xFC	; 252
-    1000:	84 83       	std	Z+4, r24	; 0x04
+    1008:	84 81       	ldd	r24, Z+4	; 0x04
+    100a:	8c 7f       	andi	r24, 0xFC	; 252
+    100c:	84 83       	std	Z+4, r24	; 0x04
 		PR.PRGEN &= 0b11111101; //Enable EVSYS
-    1002:	80 81       	ld	r24, Z
-    1004:	8d 7f       	andi	r24, 0xFD	; 253
-    1006:	80 83       	st	Z, r24
+    100e:	80 81       	ld	r24, Z
+    1010:	8d 7f       	andi	r24, 0xFD	; 253
+    1012:	80 83       	st	Z, r24
 	
 	//Set up EVSYS
 		EVSYS.CH2MUX = TCDAC_OVF;
-    1008:	e0 e8       	ldi	r30, 0x80	; 128
-    100a:	f1 e0       	ldi	r31, 0x01	; 1
-    100c:	80 ec       	ldi	r24, 0xC0	; 192
-    100e:	82 83       	std	Z+2, r24	; 0x02
+    1014:	e0 e8       	ldi	r30, 0x80	; 128
+    1016:	f1 e0       	ldi	r31, 0x01	; 1
+    1018:	80 ec       	ldi	r24, 0xC0	; 192
+    101a:	82 83       	std	Z+2, r24	; 0x02
 		EVSYS.CH2CTRL = 0x00; //No filtering or Quadrature stuff
-    1010:	12 86       	std	Z+10, r1	; 0x0a
+    101c:	12 86       	std	Z+10, r1	; 0x0a
 		
 		EVSYS.CH1MUX = TCDAC_AUX_OVF;
-    1012:	88 ec       	ldi	r24, 0xC8	; 200
-    1014:	81 83       	std	Z+1, r24	; 0x01
+    101e:	88 ec       	ldi	r24, 0xC8	; 200
+    1020:	81 83       	std	Z+1, r24	; 0x01
 		EVSYS.CH1CTRL = 0x00; //No filtering or Quadrature stuff
-    1016:	11 86       	std	Z+9, r1	; 0x09
+    1022:	11 86       	std	Z+9, r1	; 0x09
 			
 	//Waveform (50Hz sin wave)
 		TC_DAC.CTRLA = 0x04; //Some clk setting - not 100% sure since it was SW generated
-    1018:	e0 e0       	ldi	r30, 0x00	; 0
-    101a:	f8 e0       	ldi	r31, 0x08	; 8
-    101c:	34 e0       	ldi	r19, 0x04	; 4
-    101e:	30 83       	st	Z, r19
+    1024:	e0 e0       	ldi	r30, 0x00	; 0
+    1026:	f8 e0       	ldi	r31, 0x08	; 8
+    1028:	34 e0       	ldi	r19, 0x04	; 4
+    102a:	30 83       	st	Z, r19
 		TC_DAC.CTRLB = TC_WGMODE_SINGLESLOPE_gc;  //No enable is set
-    1020:	23 e0       	ldi	r18, 0x03	; 3
-    1022:	21 83       	std	Z+1, r18	; 0x01
+    102c:	23 e0       	ldi	r18, 0x03	; 3
+    102e:	21 83       	std	Z+1, r18	; 0x01
 		TC_DAC.CTRLE = TC_BYTEM_NORMAL_gc;
-    1024:	14 82       	std	Z+4, r1	; 0x04
+    1030:	14 82       	std	Z+4, r1	; 0x04
 		TC_DAC.PER = 469;
-    1026:	85 ed       	ldi	r24, 0xD5	; 213
-    1028:	91 e0       	ldi	r25, 0x01	; 1
-    102a:	86 a3       	std	Z+38, r24	; 0x26
-    102c:	97 a3       	std	Z+39, r25	; 0x27
+    1032:	85 ed       	ldi	r24, 0xD5	; 213
+    1034:	91 e0       	ldi	r25, 0x01	; 1
+    1036:	86 a3       	std	Z+38, r24	; 0x26
+    1038:	97 a3       	std	Z+39, r25	; 0x27
 		TC_DAC.INTCTRLA = 0x00;
-    102e:	16 82       	std	Z+6, r1	; 0x06
+    103a:	16 82       	std	Z+6, r1	; 0x06
 	//Aux channel (blank 50Hz)
 		TC_AUXDAC.CTRLA = 0x04; //Some clk setting - not 100% sure since it was SW generated
-    1030:	e0 e4       	ldi	r30, 0x40	; 64
-    1032:	f8 e0       	ldi	r31, 0x08	; 8
-    1034:	30 83       	st	Z, r19
+    103c:	e0 e4       	ldi	r30, 0x40	; 64
+    103e:	f8 e0       	ldi	r31, 0x08	; 8
+    1040:	30 83       	st	Z, r19
 		TC_AUXDAC.CTRLB = TC_WGMODE_SINGLESLOPE_gc;  //No enable is set
-    1036:	21 83       	std	Z+1, r18	; 0x01
+    1042:	21 83       	std	Z+1, r18	; 0x01
 		TC_AUXDAC.CTRLE = TC_BYTEM_NORMAL_gc;
-    1038:	14 82       	std	Z+4, r1	; 0x04
+    1044:	14 82       	std	Z+4, r1	; 0x04
 		TC_AUXDAC.PER = 469;
-    103a:	86 a3       	std	Z+38, r24	; 0x26
-    103c:	97 a3       	std	Z+39, r25	; 0x27
+    1046:	86 a3       	std	Z+38, r24	; 0x26
+    1048:	97 a3       	std	Z+39, r25	; 0x27
 		TC_AUXDAC.INTCTRLA = 0x00;
-    103e:	16 82       	std	Z+6, r1	; 0x06
+    104a:	16 82       	std	Z+6, r1	; 0x06
 	
 	//PSU 
 		PORTD.DIR |= 0b00010000;
-    1040:	e0 e6       	ldi	r30, 0x60	; 96
-    1042:	f6 e0       	ldi	r31, 0x06	; 6
-    1044:	80 81       	ld	r24, Z
-    1046:	80 61       	ori	r24, 0x10	; 16
-    1048:	80 83       	st	Z, r24
+    104c:	e0 e6       	ldi	r30, 0x60	; 96
+    104e:	f6 e0       	ldi	r31, 0x06	; 6
+    1050:	80 81       	ld	r24, Z
+    1052:	80 61       	ori	r24, 0x10	; 16
+    1054:	80 83       	st	Z, r24
 		TC_PSU.CTRLB = 0x10 | TC_WGMODE_SINGLESLOPE_gc;  //CCAEN is set
-    104a:	e0 e4       	ldi	r30, 0x40	; 64
-    104c:	f9 e0       	ldi	r31, 0x09	; 9
-    104e:	83 e1       	ldi	r24, 0x13	; 19
-    1050:	81 83       	std	Z+1, r24	; 0x01
+    1056:	e0 e4       	ldi	r30, 0x40	; 64
+    1058:	f9 e0       	ldi	r31, 0x09	; 9
+    105a:	83 e1       	ldi	r24, 0x13	; 19
+    105c:	81 83       	std	Z+1, r24	; 0x01
 		TC_PSU.CTRLE = TC_BYTEM_NORMAL_gc;
-    1052:	14 82       	std	Z+4, r1	; 0x04
+    105e:	14 82       	std	Z+4, r1	; 0x04
 		TC_PSU.INTCTRLA = TC_OVFINTLVL_LO_gc;
-    1054:	81 e0       	ldi	r24, 0x01	; 1
-    1056:	86 83       	std	Z+6, r24	; 0x06
+    1060:	81 e0       	ldi	r24, 0x01	; 1
+    1062:	86 83       	std	Z+6, r24	; 0x06
 		TC_PSU.PER = PSU_PER;  // Max value of CNT
-    1058:	28 eb       	ldi	r18, 0xB8	; 184
-    105a:	3b e0       	ldi	r19, 0x0B	; 11
-    105c:	26 a3       	std	Z+38, r18	; 0x26
-    105e:	37 a3       	std	Z+39, r19	; 0x27
+    1064:	28 eb       	ldi	r18, 0xB8	; 184
+    1066:	3b e0       	ldi	r19, 0x0B	; 11
+    1068:	26 a3       	std	Z+38, r18	; 0x26
+    106a:	37 a3       	std	Z+39, r19	; 0x27
 		TC_PSU.CCA = 0; //Initial Duty cycle of 0%
-    1060:	10 a6       	std	Z+40, r1	; 0x28
-    1062:	11 a6       	std	Z+41, r1	; 0x29
+    106c:	10 a6       	std	Z+40, r1	; 0x28
+    106e:	11 a6       	std	Z+41, r1	; 0x29
 		TC_PSU.CTRLA = TC_CLKSEL_DIV1_gc;
-    1064:	80 83       	st	Z, r24
-    1066:	08 95       	ret
+    1070:	80 83       	st	Z, r24
+    1072:	08 95       	ret
 
-00001068 <__vector_83>:
+00001074 <__vector_83>:
 		TCC1.PER = 1800;  // Max value of CNT
 		TCC1.CTRLA = TC_CLKSEL_DIV1_gc;
 		*/
 }
 
 ISR(TC_PSU_OVF){
-    1068:	1f 92       	push	r1
-    106a:	0f 92       	push	r0
-    106c:	0f b6       	in	r0, 0x3f	; 63
-    106e:	0f 92       	push	r0
-    1070:	11 24       	eor	r1, r1
-    1072:	2f 93       	push	r18
-    1074:	3f 93       	push	r19
-    1076:	4f 93       	push	r20
-    1078:	5f 93       	push	r21
-    107a:	8f 93       	push	r24
-    107c:	9f 93       	push	r25
-    107e:	ef 93       	push	r30
-    1080:	ff 93       	push	r31
-    1082:	cf 93       	push	r28
-    1084:	df 93       	push	r29
-    1086:	1f 92       	push	r1
-    1088:	cd b7       	in	r28, 0x3d	; 61
-    108a:	de b7       	in	r29, 0x3e	; 62
+    1074:	1f 92       	push	r1
+    1076:	0f 92       	push	r0
+    1078:	0f b6       	in	r0, 0x3f	; 63
+    107a:	0f 92       	push	r0
+    107c:	11 24       	eor	r1, r1
+    107e:	2f 93       	push	r18
+    1080:	3f 93       	push	r19
+    1082:	4f 93       	push	r20
+    1084:	5f 93       	push	r21
+    1086:	8f 93       	push	r24
+    1088:	9f 93       	push	r25
+    108a:	ef 93       	push	r30
+    108c:	ff 93       	push	r31
+    108e:	cf 93       	push	r28
+    1090:	df 93       	push	r29
+    1092:	1f 92       	push	r1
+    1094:	cd b7       	in	r28, 0x3d	; 61
+    1096:	de b7       	in	r29, 0x3e	; 62
 	char tempvar;
 	char err;
 	volatile char nothing;
+	TC_PSU.INTFLAGS = 0xff;
+    1098:	8f ef       	ldi	r24, 0xFF	; 255
+    109a:	80 93 4c 09 	sts	0x094C, r24	; 0x80094c <__TEXT_REGION_LENGTH__+0x70094c>
 	if (global_mode == 7){
-    108c:	80 91 00 20 	lds	r24, 0x2000	; 0x802000 <__data_start>
-    1090:	87 30       	cpi	r24, 0x07	; 7
-    1092:	31 f4       	brne	.+12     	; 0x10a0 <__vector_83+0x38>
+    109e:	80 91 00 20 	lds	r24, 0x2000	; 0x802000 <__data_start>
+    10a2:	87 30       	cpi	r24, 0x07	; 7
+    10a4:	31 f4       	brne	.+12     	; 0x10b2 <__vector_83+0x3e>
 		nothing = ADCA.CH1.RESL;
-    1094:	e0 e0       	ldi	r30, 0x00	; 0
-    1096:	f2 e0       	ldi	r31, 0x02	; 2
-    1098:	84 a5       	ldd	r24, Z+44	; 0x2c
-    109a:	89 83       	std	Y+1, r24	; 0x01
+    10a6:	e0 e0       	ldi	r30, 0x00	; 0
+    10a8:	f2 e0       	ldi	r31, 0x02	; 2
+    10aa:	84 a5       	ldd	r24, Z+44	; 0x2c
+    10ac:	89 83       	std	Y+1, r24	; 0x01
 		tempvar = ADCA.CH1.RESH;
-    109c:	95 a5       	ldd	r25, Z+45	; 0x2d
-    109e:	02 c0       	rjmp	.+4      	; 0x10a4 <__vector_83+0x3c>
+    10ae:	95 a5       	ldd	r25, Z+45	; 0x2d
+    10b0:	02 c0       	rjmp	.+4      	; 0x10b6 <__vector_83+0x42>
 	}
 	else{
 		tempvar = ADCA.CH1.RESL;
-    10a0:	90 91 2c 02 	lds	r25, 0x022C	; 0x80022c <__TEXT_REGION_LENGTH__+0x70022c>
+    10b2:	90 91 2c 02 	lds	r25, 0x022C	; 0x80022c <__TEXT_REGION_LENGTH__+0x70022c>
 	}
 	//tempvar = (global_mode == 7 ? (char) ADCA.CH1.RESH : (char) ADCA.CH1.RESL);
 	//test_byte = tempvar;
 
 	err = (char) (PSU_target - tempvar);
-    10a4:	80 91 b2 20 	lds	r24, 0x20B2	; 0x8020b2 <__data_end>
-    10a8:	89 1b       	sub	r24, r25
+    10b6:	80 91 b2 20 	lds	r24, 0x20B2	; 0x8020b2 <__data_end>
+    10ba:	89 1b       	sub	r24, r25
 	if ((err > 1) & ((unsigned short) TC_PSU.CCA < PSU_PER - jump) ){
-    10aa:	20 91 68 09 	lds	r18, 0x0968	; 0x800968 <__TEXT_REGION_LENGTH__+0x700968>
-    10ae:	30 91 69 09 	lds	r19, 0x0969	; 0x800969 <__TEXT_REGION_LENGTH__+0x700969>
-    10b2:	91 e0       	ldi	r25, 0x01	; 1
-    10b4:	82 30       	cpi	r24, 0x02	; 2
-    10b6:	0c f4       	brge	.+2      	; 0x10ba <__vector_83+0x52>
-    10b8:	90 e0       	ldi	r25, 0x00	; 0
-    10ba:	99 23       	and	r25, r25
-    10bc:	c9 f0       	breq	.+50     	; 0x10f0 <__vector_83+0x88>
-    10be:	91 e0       	ldi	r25, 0x01	; 1
-    10c0:	22 3b       	cpi	r18, 0xB2	; 178
-    10c2:	3b 40       	sbci	r19, 0x0B	; 11
-    10c4:	08 f0       	brcs	.+2      	; 0x10c8 <__vector_83+0x60>
-    10c6:	90 e0       	ldi	r25, 0x00	; 0
-    10c8:	99 23       	and	r25, r25
-    10ca:	91 f0       	breq	.+36     	; 0x10f0 <__vector_83+0x88>
+    10bc:	20 91 68 09 	lds	r18, 0x0968	; 0x800968 <__TEXT_REGION_LENGTH__+0x700968>
+    10c0:	30 91 69 09 	lds	r19, 0x0969	; 0x800969 <__TEXT_REGION_LENGTH__+0x700969>
+    10c4:	91 e0       	ldi	r25, 0x01	; 1
+    10c6:	82 30       	cpi	r24, 0x02	; 2
+    10c8:	0c f4       	brge	.+2      	; 0x10cc <__vector_83+0x58>
+    10ca:	90 e0       	ldi	r25, 0x00	; 0
+    10cc:	99 23       	and	r25, r25
+    10ce:	c9 f0       	breq	.+50     	; 0x1102 <__vector_83+0x8e>
+    10d0:	91 e0       	ldi	r25, 0x01	; 1
+    10d2:	22 3b       	cpi	r18, 0xB2	; 178
+    10d4:	3b 40       	sbci	r19, 0x0B	; 11
+    10d6:	08 f0       	brcs	.+2      	; 0x10da <__vector_83+0x66>
+    10d8:	90 e0       	ldi	r25, 0x00	; 0
+    10da:	99 23       	and	r25, r25
+    10dc:	91 f0       	breq	.+36     	; 0x1102 <__vector_83+0x8e>
 		TC_PSU.CCABUF = TC_PSU.CCA + ((err > 8) ? jump : 1);
-    10cc:	20 91 68 09 	lds	r18, 0x0968	; 0x800968 <__TEXT_REGION_LENGTH__+0x700968>
-    10d0:	30 91 69 09 	lds	r19, 0x0969	; 0x800969 <__TEXT_REGION_LENGTH__+0x700969>
-    10d4:	89 30       	cpi	r24, 0x09	; 9
-    10d6:	1c f4       	brge	.+6      	; 0x10de <__vector_83+0x76>
-    10d8:	81 e0       	ldi	r24, 0x01	; 1
-    10da:	90 e0       	ldi	r25, 0x00	; 0
-    10dc:	02 c0       	rjmp	.+4      	; 0x10e2 <__vector_83+0x7a>
-    10de:	86 e0       	ldi	r24, 0x06	; 6
-    10e0:	90 e0       	ldi	r25, 0x00	; 0
-    10e2:	82 0f       	add	r24, r18
-    10e4:	93 1f       	adc	r25, r19
-    10e6:	80 93 78 09 	sts	0x0978, r24	; 0x800978 <__TEXT_REGION_LENGTH__+0x700978>
-    10ea:	90 93 79 09 	sts	0x0979, r25	; 0x800979 <__TEXT_REGION_LENGTH__+0x700979>
-    10ee:	23 c0       	rjmp	.+70     	; 0x1136 <__vector_83+0xce>
+    10de:	20 91 68 09 	lds	r18, 0x0968	; 0x800968 <__TEXT_REGION_LENGTH__+0x700968>
+    10e2:	30 91 69 09 	lds	r19, 0x0969	; 0x800969 <__TEXT_REGION_LENGTH__+0x700969>
+    10e6:	89 30       	cpi	r24, 0x09	; 9
+    10e8:	1c f4       	brge	.+6      	; 0x10f0 <__vector_83+0x7c>
+    10ea:	81 e0       	ldi	r24, 0x01	; 1
+    10ec:	90 e0       	ldi	r25, 0x00	; 0
+    10ee:	02 c0       	rjmp	.+4      	; 0x10f4 <__vector_83+0x80>
+    10f0:	86 e0       	ldi	r24, 0x06	; 6
+    10f2:	90 e0       	ldi	r25, 0x00	; 0
+    10f4:	82 0f       	add	r24, r18
+    10f6:	93 1f       	adc	r25, r19
+    10f8:	80 93 78 09 	sts	0x0978, r24	; 0x800978 <__TEXT_REGION_LENGTH__+0x700978>
+    10fc:	90 93 79 09 	sts	0x0979, r25	; 0x800979 <__TEXT_REGION_LENGTH__+0x700979>
+    1100:	23 c0       	rjmp	.+70     	; 0x1148 <__vector_83+0xd4>
 	}
 	else if ((err < -1) & ((unsigned short) TC_PSU.CCA > jump)){
-    10f0:	20 91 68 09 	lds	r18, 0x0968	; 0x800968 <__TEXT_REGION_LENGTH__+0x700968>
-    10f4:	30 91 69 09 	lds	r19, 0x0969	; 0x800969 <__TEXT_REGION_LENGTH__+0x700969>
-    10f8:	91 e0       	ldi	r25, 0x01	; 1
-    10fa:	8f 3f       	cpi	r24, 0xFF	; 255
-    10fc:	0c f0       	brlt	.+2      	; 0x1100 <__vector_83+0x98>
-    10fe:	90 e0       	ldi	r25, 0x00	; 0
-    1100:	99 23       	and	r25, r25
-    1102:	c9 f0       	breq	.+50     	; 0x1136 <__vector_83+0xce>
-    1104:	91 e0       	ldi	r25, 0x01	; 1
-    1106:	27 30       	cpi	r18, 0x07	; 7
-    1108:	31 05       	cpc	r19, r1
-    110a:	08 f4       	brcc	.+2      	; 0x110e <__vector_83+0xa6>
-    110c:	90 e0       	ldi	r25, 0x00	; 0
-    110e:	99 23       	and	r25, r25
-    1110:	91 f0       	breq	.+36     	; 0x1136 <__vector_83+0xce>
+    1102:	20 91 68 09 	lds	r18, 0x0968	; 0x800968 <__TEXT_REGION_LENGTH__+0x700968>
+    1106:	30 91 69 09 	lds	r19, 0x0969	; 0x800969 <__TEXT_REGION_LENGTH__+0x700969>
+    110a:	91 e0       	ldi	r25, 0x01	; 1
+    110c:	8f 3f       	cpi	r24, 0xFF	; 255
+    110e:	0c f0       	brlt	.+2      	; 0x1112 <__vector_83+0x9e>
+    1110:	90 e0       	ldi	r25, 0x00	; 0
+    1112:	99 23       	and	r25, r25
+    1114:	c9 f0       	breq	.+50     	; 0x1148 <__vector_83+0xd4>
+    1116:	91 e0       	ldi	r25, 0x01	; 1
+    1118:	27 30       	cpi	r18, 0x07	; 7
+    111a:	31 05       	cpc	r19, r1
+    111c:	08 f4       	brcc	.+2      	; 0x1120 <__vector_83+0xac>
+    111e:	90 e0       	ldi	r25, 0x00	; 0
+    1120:	99 23       	and	r25, r25
+    1122:	91 f0       	breq	.+36     	; 0x1148 <__vector_83+0xd4>
 		TC_PSU.CCABUF = TC_PSU.CCA - ((err < -8) ? jump : 1);
-    1112:	20 91 68 09 	lds	r18, 0x0968	; 0x800968 <__TEXT_REGION_LENGTH__+0x700968>
-    1116:	30 91 69 09 	lds	r19, 0x0969	; 0x800969 <__TEXT_REGION_LENGTH__+0x700969>
-    111a:	88 3f       	cpi	r24, 0xF8	; 248
-    111c:	1c f0       	brlt	.+6      	; 0x1124 <__vector_83+0xbc>
-    111e:	81 e0       	ldi	r24, 0x01	; 1
-    1120:	90 e0       	ldi	r25, 0x00	; 0
-    1122:	02 c0       	rjmp	.+4      	; 0x1128 <__vector_83+0xc0>
-    1124:	86 e0       	ldi	r24, 0x06	; 6
-    1126:	90 e0       	ldi	r25, 0x00	; 0
-    1128:	a9 01       	movw	r20, r18
-    112a:	48 1b       	sub	r20, r24
-    112c:	59 0b       	sbc	r21, r25
-    112e:	40 93 78 09 	sts	0x0978, r20	; 0x800978 <__TEXT_REGION_LENGTH__+0x700978>
-    1132:	50 93 79 09 	sts	0x0979, r21	; 0x800979 <__TEXT_REGION_LENGTH__+0x700979>
+    1124:	20 91 68 09 	lds	r18, 0x0968	; 0x800968 <__TEXT_REGION_LENGTH__+0x700968>
+    1128:	30 91 69 09 	lds	r19, 0x0969	; 0x800969 <__TEXT_REGION_LENGTH__+0x700969>
+    112c:	88 3f       	cpi	r24, 0xF8	; 248
+    112e:	1c f0       	brlt	.+6      	; 0x1136 <__vector_83+0xc2>
+    1130:	81 e0       	ldi	r24, 0x01	; 1
+    1132:	90 e0       	ldi	r25, 0x00	; 0
+    1134:	02 c0       	rjmp	.+4      	; 0x113a <__vector_83+0xc6>
+    1136:	86 e0       	ldi	r24, 0x06	; 6
+    1138:	90 e0       	ldi	r25, 0x00	; 0
+    113a:	a9 01       	movw	r20, r18
+    113c:	48 1b       	sub	r20, r24
+    113e:	59 0b       	sbc	r21, r25
+    1140:	40 93 78 09 	sts	0x0978, r20	; 0x800978 <__TEXT_REGION_LENGTH__+0x700978>
+    1144:	50 93 79 09 	sts	0x0979, r21	; 0x800979 <__TEXT_REGION_LENGTH__+0x700979>
 	}
-    1136:	0f 90       	pop	r0
-    1138:	df 91       	pop	r29
-    113a:	cf 91       	pop	r28
-    113c:	ff 91       	pop	r31
-    113e:	ef 91       	pop	r30
-    1140:	9f 91       	pop	r25
-    1142:	8f 91       	pop	r24
-    1144:	5f 91       	pop	r21
-    1146:	4f 91       	pop	r20
-    1148:	3f 91       	pop	r19
-    114a:	2f 91       	pop	r18
-    114c:	0f 90       	pop	r0
-    114e:	0f be       	out	0x3f, r0	; 63
-    1150:	0f 90       	pop	r0
-    1152:	1f 90       	pop	r1
-    1154:	18 95       	reti
+    1148:	0f 90       	pop	r0
+    114a:	df 91       	pop	r29
+    114c:	cf 91       	pop	r28
+    114e:	ff 91       	pop	r31
+    1150:	ef 91       	pop	r30
+    1152:	9f 91       	pop	r25
+    1154:	8f 91       	pop	r24
+    1156:	5f 91       	pop	r21
+    1158:	4f 91       	pop	r20
+    115a:	3f 91       	pop	r19
+    115c:	2f 91       	pop	r18
+    115e:	0f 90       	pop	r0
+    1160:	0f be       	out	0x3f, r0	; 63
+    1162:	0f 90       	pop	r0
+    1164:	1f 90       	pop	r1
+    1166:	18 95       	reti
 
-00001156 <tiny_uart_setup>:
+00001168 <tiny_uart_setup>:
 #include "tiny_uart.h"
 #include "globals.h"
 
 
 void tiny_uart_setup(void){
 	PR.PRPC &= 0b11101111;
-    1156:	e0 e7       	ldi	r30, 0x70	; 112
-    1158:	f0 e0       	ldi	r31, 0x00	; 0
-    115a:	83 81       	ldd	r24, Z+3	; 0x03
-    115c:	8f 7e       	andi	r24, 0xEF	; 239
-    115e:	83 83       	std	Z+3, r24	; 0x03
+    1168:	e0 e7       	ldi	r30, 0x70	; 112
+    116a:	f0 e0       	ldi	r31, 0x00	; 0
+    116c:	83 81       	ldd	r24, Z+3	; 0x03
+    116e:	8f 7e       	andi	r24, 0xEF	; 239
+    1170:	83 83       	std	Z+3, r24	; 0x03
 	//PR.PRPE &= 0b11111110;  ???
 	
 	PORTC.DIR |= 0b01001010;
-    1160:	e0 e4       	ldi	r30, 0x40	; 64
-    1162:	f6 e0       	ldi	r31, 0x06	; 6
-    1164:	80 81       	ld	r24, Z
-    1166:	8a 64       	ori	r24, 0x4A	; 74
-    1168:	80 83       	st	Z, r24
+    1172:	e0 e4       	ldi	r30, 0x40	; 64
+    1174:	f6 e0       	ldi	r31, 0x06	; 6
+    1176:	80 81       	ld	r24, Z
+    1178:	8a 64       	ori	r24, 0x4A	; 74
+    117a:	80 83       	st	Z, r24
 	PORTC.OUT = 0xff;
-    116a:	8f ef       	ldi	r24, 0xFF	; 255
-    116c:	84 83       	std	Z+4, r24	; 0x04
+    117c:	8f ef       	ldi	r24, 0xFF	; 255
+    117e:	84 83       	std	Z+4, r24	; 0x04
 	PORTC.PIN2CTRL = PORT_INVEN_bm | PORT_OPC_PULLUP_gc;
-    116e:	88 e5       	ldi	r24, 0x58	; 88
-    1170:	82 8b       	std	Z+18, r24	; 0x12
+    1180:	88 e5       	ldi	r24, 0x58	; 88
+    1182:	82 8b       	std	Z+18, r24	; 0x12
 	//PORTC.REMAP = 0x10; //Remap USART to [7:4]
 	#ifndef VERO
 		PORTC.REMAP = 0x20; //Swap MOSI and SCK - for small boards only!!!
+    1184:	80 e2       	ldi	r24, 0x20	; 32
+    1186:	86 87       	std	Z+14, r24	; 0x0e
 	#endif
 	
 	USARTC0.CTRLC = USART_CMODE_MSPI_gc | 0b00000100; //LSB received first, UPCHA disabled
-    1172:	e0 ea       	ldi	r30, 0xA0	; 160
-    1174:	f8 e0       	ldi	r31, 0x08	; 8
-    1176:	84 ec       	ldi	r24, 0xC4	; 196
-    1178:	85 83       	std	Z+5, r24	; 0x05
+    1188:	e0 ea       	ldi	r30, 0xA0	; 160
+    118a:	f8 e0       	ldi	r31, 0x08	; 8
+    118c:	84 ec       	ldi	r24, 0xC4	; 196
+    118e:	85 83       	std	Z+5, r24	; 0x05
 	USARTC0.BAUDCTRLA = 3;  	//BSEL = fper/(2fbaud) -1;  24/(2*3) - 1 = 3
-    117a:	83 e0       	ldi	r24, 0x03	; 3
-    117c:	86 83       	std	Z+6, r24	; 0x06
+    1190:	83 e0       	ldi	r24, 0x03	; 3
+    1192:	86 83       	std	Z+6, r24	; 0x06
 	USARTC0.BAUDCTRLB = 0x00;//USART_BSCALE0_bm;
-    117e:	17 82       	std	Z+7, r1	; 0x07
+    1194:	17 82       	std	Z+7, r1	; 0x07
 	USARTC0.CTRLB = USART_RXEN_bm | USART_TXEN_bm;
-    1180:	88 e1       	ldi	r24, 0x18	; 24
-    1182:	84 83       	std	Z+4, r24	; 0x04
-    1184:	08 95       	ret
+    1196:	88 e1       	ldi	r24, 0x18	; 24
+    1198:	84 83       	std	Z+4, r24	; 0x04
+    119a:	08 95       	ret
 
-00001186 <tiny_spi_setup>:
+0000119c <tiny_spi_setup>:
 }
 
 
 void tiny_spi_setup(void){
 	//Power Reduction disable
 	PR.PRPC &= 0b11110111;
-    1186:	e0 e7       	ldi	r30, 0x70	; 112
-    1188:	f0 e0       	ldi	r31, 0x00	; 0
-    118a:	83 81       	ldd	r24, Z+3	; 0x03
-    118c:	87 7f       	andi	r24, 0xF7	; 247
-    118e:	83 83       	std	Z+3, r24	; 0x03
+    119c:	e0 e7       	ldi	r30, 0x70	; 112
+    119e:	f0 e0       	ldi	r31, 0x00	; 0
+    11a0:	83 81       	ldd	r24, Z+3	; 0x03
+    11a2:	87 7f       	andi	r24, 0xF7	; 247
+    11a4:	83 83       	std	Z+3, r24	; 0x03
 	
 	//SPI enable
 	SPIC.CTRL = SPI_ENABLE_bm;  //Slave mode
-    1190:	e0 ec       	ldi	r30, 0xC0	; 192
-    1192:	f8 e0       	ldi	r31, 0x08	; 8
-    1194:	80 e4       	ldi	r24, 0x40	; 64
-    1196:	80 83       	st	Z, r24
+    11a6:	e0 ec       	ldi	r30, 0xC0	; 192
+    11a8:	f8 e0       	ldi	r31, 0x08	; 8
+    11aa:	80 e4       	ldi	r24, 0x40	; 64
+    11ac:	80 83       	st	Z, r24
 	SPIC.INTCTRL = SPI_INTLVL_HI_gc;
-    1198:	83 e0       	ldi	r24, 0x03	; 3
-    119a:	81 83       	std	Z+1, r24	; 0x01
+    11ae:	83 e0       	ldi	r24, 0x03	; 3
+    11b0:	81 83       	std	Z+1, r24	; 0x01
 	#ifdef VERO
 		PORTC.PIN5CTRL = PORT_INVEN_bm | PORT_OPC_PULLUP_gc;
-    119c:	88 e5       	ldi	r24, 0x58	; 88
-    119e:	80 93 55 06 	sts	0x0655, r24	; 0x800655 <__TEXT_REGION_LENGTH__+0x700655>
-    11a2:	08 95       	ret
+	#else
+		PORTC.PIN7CTRL = PORT_INVEN_bm | PORT_OPC_PULLUP_gc;  //Pin5 if not swapped		
+    11b2:	88 e5       	ldi	r24, 0x58	; 88
+    11b4:	80 93 57 06 	sts	0x0657, r24	; 0x800657 <__TEXT_REGION_LENGTH__+0x700657>
+    11b8:	08 95       	ret
 
-000011a4 <__vector_24>:
+000011ba <__vector_24>:
 	#endif
 		
 	return;
 }
 
 ISR(SPIC_INT_vect){
-    11a4:	1f 92       	push	r1
-    11a6:	0f 92       	push	r0
-    11a8:	0f b6       	in	r0, 0x3f	; 63
-    11aa:	0f 92       	push	r0
-    11ac:	11 24       	eor	r1, r1
+    11ba:	1f 92       	push	r1
+    11bc:	0f 92       	push	r0
+    11be:	0f b6       	in	r0, 0x3f	; 63
+    11c0:	0f 92       	push	r0
+    11c2:	11 24       	eor	r1, r1
 	asm("nop");
-    11ae:	00 00       	nop
+    11c4:	00 00       	nop
 }
-    11b0:	0f 90       	pop	r0
-    11b2:	0f be       	out	0x3f, r0	; 63
-    11b4:	0f 90       	pop	r0
-    11b6:	1f 90       	pop	r1
-    11b8:	18 95       	reti
+    11c6:	0f 90       	pop	r0
+    11c8:	0f be       	out	0x3f, r0	; 63
+    11ca:	0f 90       	pop	r0
+    11cc:	1f 90       	pop	r1
+    11ce:	18 95       	reti
 
-000011ba <sysclk_init>:
+000011d0 <sysclk_init>:
 }
 
 static inline void cpu_irq_restore(irqflags_t flags)
 {
 	barrier();
 	SREG = flags;
-    11ba:	0f 93       	push	r16
-    11bc:	1f 93       	push	r17
-    11be:	cf 93       	push	r28
-    11c0:	df 93       	push	r29
-    11c2:	00 d0       	rcall	.+0      	; 0x11c4 <sysclk_init+0xa>
-    11c4:	00 d0       	rcall	.+0      	; 0x11c6 <sysclk_init+0xc>
-    11c6:	cd b7       	in	r28, 0x3d	; 61
-    11c8:	de b7       	in	r29, 0x3e	; 62
-    11ca:	8f ef       	ldi	r24, 0xFF	; 255
-    11cc:	80 93 70 00 	sts	0x0070, r24	; 0x800070 <__TEXT_REGION_LENGTH__+0x700070>
-    11d0:	80 93 71 00 	sts	0x0071, r24	; 0x800071 <__TEXT_REGION_LENGTH__+0x700071>
-    11d4:	80 93 72 00 	sts	0x0072, r24	; 0x800072 <__TEXT_REGION_LENGTH__+0x700072>
-    11d8:	80 93 73 00 	sts	0x0073, r24	; 0x800073 <__TEXT_REGION_LENGTH__+0x700073>
-    11dc:	80 93 74 00 	sts	0x0074, r24	; 0x800074 <__TEXT_REGION_LENGTH__+0x700074>
-    11e0:	80 93 75 00 	sts	0x0075, r24	; 0x800075 <__TEXT_REGION_LENGTH__+0x700075>
-    11e4:	80 93 76 00 	sts	0x0076, r24	; 0x800076 <__TEXT_REGION_LENGTH__+0x700076>
-    11e8:	64 e0       	ldi	r22, 0x04	; 4
-    11ea:	81 e4       	ldi	r24, 0x41	; 65
-    11ec:	90 e0       	ldi	r25, 0x00	; 0
-    11ee:	c2 d5       	rcall	.+2948   	; 0x1d74 <ccp_write_io>
-    11f0:	6c e1       	ldi	r22, 0x1C	; 28
-    11f2:	70 e0       	ldi	r23, 0x00	; 0
-    11f4:	82 e0       	ldi	r24, 0x02	; 2
-    11f6:	c4 d5       	rcall	.+2952   	; 0x1d80 <nvm_read_byte>
-    11f8:	8a 83       	std	Y+2, r24	; 0x02
-    11fa:	6d e1       	ldi	r22, 0x1D	; 29
-    11fc:	70 e0       	ldi	r23, 0x00	; 0
-    11fe:	82 e0       	ldi	r24, 0x02	; 2
-    1200:	bf d5       	rcall	.+2942   	; 0x1d80 <nvm_read_byte>
-    1202:	89 83       	std	Y+1, r24	; 0x01
-    1204:	89 81       	ldd	r24, Y+1	; 0x01
-    1206:	9a 81       	ldd	r25, Y+2	; 0x02
-    1208:	01 96       	adiw	r24, 0x01	; 1
-    120a:	21 f4       	brne	.+8      	; 0x1214 <sysclk_init+0x5a>
-    120c:	80 e4       	ldi	r24, 0x40	; 64
-    120e:	93 e2       	ldi	r25, 0x23	; 35
-    1210:	89 83       	std	Y+1, r24	; 0x01
-    1212:	9a 83       	std	Y+2, r25	; 0x02
-    1214:	89 81       	ldd	r24, Y+1	; 0x01
-    1216:	9a 81       	ldd	r25, Y+2	; 0x02
-    1218:	8b 83       	std	Y+3, r24	; 0x03
-    121a:	9c 83       	std	Y+4, r25	; 0x04
-    121c:	e0 e6       	ldi	r30, 0x60	; 96
-    121e:	f0 e0       	ldi	r31, 0x00	; 0
-    1220:	82 83       	std	Z+2, r24	; 0x02
-    1222:	8c 81       	ldd	r24, Y+4	; 0x04
-    1224:	83 83       	std	Z+3, r24	; 0x03
-    1226:	9f b7       	in	r25, 0x3f	; 63
-    1228:	f8 94       	cli
-    122a:	e0 e5       	ldi	r30, 0x50	; 80
-    122c:	f0 e0       	ldi	r31, 0x00	; 0
-    122e:	80 81       	ld	r24, Z
-    1230:	82 60       	ori	r24, 0x02	; 2
-    1232:	80 83       	st	Z, r24
-    1234:	9f bf       	out	0x3f, r25	; 63
-    1236:	81 81       	ldd	r24, Z+1	; 0x01
-    1238:	81 ff       	sbrs	r24, 1
-    123a:	fd cf       	rjmp	.-6      	; 0x1236 <sysclk_init+0x7c>
+    11d0:	0f 93       	push	r16
+    11d2:	1f 93       	push	r17
+    11d4:	cf 93       	push	r28
+    11d6:	df 93       	push	r29
+    11d8:	00 d0       	rcall	.+0      	; 0x11da <sysclk_init+0xa>
+    11da:	00 d0       	rcall	.+0      	; 0x11dc <sysclk_init+0xc>
+    11dc:	cd b7       	in	r28, 0x3d	; 61
+    11de:	de b7       	in	r29, 0x3e	; 62
+    11e0:	8f ef       	ldi	r24, 0xFF	; 255
+    11e2:	80 93 70 00 	sts	0x0070, r24	; 0x800070 <__TEXT_REGION_LENGTH__+0x700070>
+    11e6:	80 93 71 00 	sts	0x0071, r24	; 0x800071 <__TEXT_REGION_LENGTH__+0x700071>
+    11ea:	80 93 72 00 	sts	0x0072, r24	; 0x800072 <__TEXT_REGION_LENGTH__+0x700072>
+    11ee:	80 93 73 00 	sts	0x0073, r24	; 0x800073 <__TEXT_REGION_LENGTH__+0x700073>
+    11f2:	80 93 74 00 	sts	0x0074, r24	; 0x800074 <__TEXT_REGION_LENGTH__+0x700074>
+    11f6:	80 93 75 00 	sts	0x0075, r24	; 0x800075 <__TEXT_REGION_LENGTH__+0x700075>
+    11fa:	80 93 76 00 	sts	0x0076, r24	; 0x800076 <__TEXT_REGION_LENGTH__+0x700076>
+    11fe:	64 e0       	ldi	r22, 0x04	; 4
+    1200:	81 e4       	ldi	r24, 0x41	; 65
+    1202:	90 e0       	ldi	r25, 0x00	; 0
+    1204:	c2 d5       	rcall	.+2948   	; 0x1d8a <ccp_write_io>
+    1206:	6c e1       	ldi	r22, 0x1C	; 28
+    1208:	70 e0       	ldi	r23, 0x00	; 0
+    120a:	82 e0       	ldi	r24, 0x02	; 2
+    120c:	c4 d5       	rcall	.+2952   	; 0x1d96 <nvm_read_byte>
+    120e:	8a 83       	std	Y+2, r24	; 0x02
+    1210:	6d e1       	ldi	r22, 0x1D	; 29
+    1212:	70 e0       	ldi	r23, 0x00	; 0
+    1214:	82 e0       	ldi	r24, 0x02	; 2
+    1216:	bf d5       	rcall	.+2942   	; 0x1d96 <nvm_read_byte>
+    1218:	89 83       	std	Y+1, r24	; 0x01
+    121a:	89 81       	ldd	r24, Y+1	; 0x01
+    121c:	9a 81       	ldd	r25, Y+2	; 0x02
+    121e:	01 96       	adiw	r24, 0x01	; 1
+    1220:	21 f4       	brne	.+8      	; 0x122a <sysclk_init+0x5a>
+    1222:	80 e4       	ldi	r24, 0x40	; 64
+    1224:	93 e2       	ldi	r25, 0x23	; 35
+    1226:	89 83       	std	Y+1, r24	; 0x01
+    1228:	9a 83       	std	Y+2, r25	; 0x02
+    122a:	89 81       	ldd	r24, Y+1	; 0x01
+    122c:	9a 81       	ldd	r25, Y+2	; 0x02
+    122e:	8b 83       	std	Y+3, r24	; 0x03
+    1230:	9c 83       	std	Y+4, r25	; 0x04
+    1232:	e0 e6       	ldi	r30, 0x60	; 96
+    1234:	f0 e0       	ldi	r31, 0x00	; 0
+    1236:	82 83       	std	Z+2, r24	; 0x02
+    1238:	8c 81       	ldd	r24, Y+4	; 0x04
+    123a:	83 83       	std	Z+3, r24	; 0x03
     123c:	9f b7       	in	r25, 0x3f	; 63
     123e:	f8 94       	cli
-    1240:	00 e5       	ldi	r16, 0x50	; 80
-    1242:	10 e0       	ldi	r17, 0x00	; 0
-    1244:	d8 01       	movw	r26, r16
-    1246:	16 96       	adiw	r26, 0x06	; 6
-    1248:	8c 91       	ld	r24, X
-    124a:	16 97       	sbiw	r26, 0x06	; 6
-    124c:	89 7f       	andi	r24, 0xF9	; 249
-    124e:	16 96       	adiw	r26, 0x06	; 6
-    1250:	8c 93       	st	X, r24
-    1252:	16 97       	sbiw	r26, 0x06	; 6
-    1254:	e0 e6       	ldi	r30, 0x60	; 96
-    1256:	f0 e0       	ldi	r31, 0x00	; 0
-    1258:	80 e8       	ldi	r24, 0x80	; 128
-    125a:	85 83       	std	Z+5, r24	; 0x05
-    125c:	8b eb       	ldi	r24, 0xBB	; 187
-    125e:	86 83       	std	Z+6, r24	; 0x06
-    1260:	16 96       	adiw	r26, 0x06	; 6
-    1262:	8c 91       	ld	r24, X
-    1264:	16 97       	sbiw	r26, 0x06	; 6
-    1266:	84 60       	ori	r24, 0x04	; 4
-    1268:	16 96       	adiw	r26, 0x06	; 6
-    126a:	8c 93       	st	X, r24
-    126c:	80 81       	ld	r24, Z
-    126e:	81 60       	ori	r24, 0x01	; 1
-    1270:	80 83       	st	Z, r24
-    1272:	9f bf       	out	0x3f, r25	; 63
-    1274:	61 e0       	ldi	r22, 0x01	; 1
-    1276:	80 e4       	ldi	r24, 0x40	; 64
-    1278:	90 e0       	ldi	r25, 0x00	; 0
-    127a:	7c d5       	rcall	.+2808   	; 0x1d74 <ccp_write_io>
-    127c:	9f b7       	in	r25, 0x3f	; 63
-    127e:	f8 94       	cli
-    1280:	f8 01       	movw	r30, r16
+    1240:	e0 e5       	ldi	r30, 0x50	; 80
+    1242:	f0 e0       	ldi	r31, 0x00	; 0
+    1244:	80 81       	ld	r24, Z
+    1246:	82 60       	ori	r24, 0x02	; 2
+    1248:	80 83       	st	Z, r24
+    124a:	9f bf       	out	0x3f, r25	; 63
+    124c:	81 81       	ldd	r24, Z+1	; 0x01
+    124e:	81 ff       	sbrs	r24, 1
+    1250:	fd cf       	rjmp	.-6      	; 0x124c <sysclk_init+0x7c>
+    1252:	9f b7       	in	r25, 0x3f	; 63
+    1254:	f8 94       	cli
+    1256:	00 e5       	ldi	r16, 0x50	; 80
+    1258:	10 e0       	ldi	r17, 0x00	; 0
+    125a:	d8 01       	movw	r26, r16
+    125c:	16 96       	adiw	r26, 0x06	; 6
+    125e:	8c 91       	ld	r24, X
+    1260:	16 97       	sbiw	r26, 0x06	; 6
+    1262:	89 7f       	andi	r24, 0xF9	; 249
+    1264:	16 96       	adiw	r26, 0x06	; 6
+    1266:	8c 93       	st	X, r24
+    1268:	16 97       	sbiw	r26, 0x06	; 6
+    126a:	e0 e6       	ldi	r30, 0x60	; 96
+    126c:	f0 e0       	ldi	r31, 0x00	; 0
+    126e:	80 e8       	ldi	r24, 0x80	; 128
+    1270:	85 83       	std	Z+5, r24	; 0x05
+    1272:	8b eb       	ldi	r24, 0xBB	; 187
+    1274:	86 83       	std	Z+6, r24	; 0x06
+    1276:	16 96       	adiw	r26, 0x06	; 6
+    1278:	8c 91       	ld	r24, X
+    127a:	16 97       	sbiw	r26, 0x06	; 6
+    127c:	84 60       	ori	r24, 0x04	; 4
+    127e:	16 96       	adiw	r26, 0x06	; 6
+    1280:	8c 93       	st	X, r24
     1282:	80 81       	ld	r24, Z
-    1284:	8e 7f       	andi	r24, 0xFE	; 254
+    1284:	81 60       	ori	r24, 0x01	; 1
     1286:	80 83       	st	Z, r24
     1288:	9f bf       	out	0x3f, r25	; 63
-    128a:	24 96       	adiw	r28, 0x04	; 4
-    128c:	cd bf       	out	0x3d, r28	; 61
-    128e:	de bf       	out	0x3e, r29	; 62
-    1290:	df 91       	pop	r29
-    1292:	cf 91       	pop	r28
-    1294:	1f 91       	pop	r17
-    1296:	0f 91       	pop	r16
-    1298:	08 95       	ret
+    128a:	61 e0       	ldi	r22, 0x01	; 1
+    128c:	80 e4       	ldi	r24, 0x40	; 64
+    128e:	90 e0       	ldi	r25, 0x00	; 0
+    1290:	7c d5       	rcall	.+2808   	; 0x1d8a <ccp_write_io>
+    1292:	9f b7       	in	r25, 0x3f	; 63
+    1294:	f8 94       	cli
+    1296:	f8 01       	movw	r30, r16
+    1298:	80 81       	ld	r24, Z
+    129a:	8e 7f       	andi	r24, 0xFE	; 254
+    129c:	80 83       	st	Z, r24
+    129e:	9f bf       	out	0x3f, r25	; 63
+    12a0:	24 96       	adiw	r28, 0x04	; 4
+    12a2:	cd bf       	out	0x3d, r28	; 61
+    12a4:	de bf       	out	0x3e, r29	; 62
+    12a6:	df 91       	pop	r29
+    12a8:	cf 91       	pop	r28
+    12aa:	1f 91       	pop	r17
+    12ac:	0f 91       	pop	r16
+    12ae:	08 95       	ret
 
-0000129a <sysclk_enable_module>:
-    129a:	9f b7       	in	r25, 0x3f	; 63
-    129c:	f8 94       	cli
-    129e:	e8 2f       	mov	r30, r24
-    12a0:	f0 e0       	ldi	r31, 0x00	; 0
-    12a2:	e0 59       	subi	r30, 0x90	; 144
-    12a4:	ff 4f       	sbci	r31, 0xFF	; 255
-    12a6:	60 95       	com	r22
-    12a8:	80 81       	ld	r24, Z
-    12aa:	68 23       	and	r22, r24
-    12ac:	60 83       	st	Z, r22
-    12ae:	9f bf       	out	0x3f, r25	; 63
-    12b0:	08 95       	ret
+000012b0 <sysclk_enable_module>:
+    12b0:	9f b7       	in	r25, 0x3f	; 63
+    12b2:	f8 94       	cli
+    12b4:	e8 2f       	mov	r30, r24
+    12b6:	f0 e0       	ldi	r31, 0x00	; 0
+    12b8:	e0 59       	subi	r30, 0x90	; 144
+    12ba:	ff 4f       	sbci	r31, 0xFF	; 255
+    12bc:	60 95       	com	r22
+    12be:	80 81       	ld	r24, Z
+    12c0:	68 23       	and	r22, r24
+    12c2:	60 83       	st	Z, r22
+    12c4:	9f bf       	out	0x3f, r25	; 63
+    12c6:	08 95       	ret
 
-000012b2 <sysclk_enable_usb>:
+000012c8 <sysclk_enable_usb>:
 
 	/*
 	 * Enable or disable prescaler depending on if the USB frequency is 6
 	 * MHz or 48 MHz. Only 6 MHz USB frequency requires prescaling.
 	 */
 	if (frequency == 6) {
-    12b2:	86 30       	cpi	r24, 0x06	; 6
-    12b4:	11 f0       	breq	.+4      	; 0x12ba <sysclk_enable_usb+0x8>
+    12c8:	86 30       	cpi	r24, 0x06	; 6
+    12ca:	11 f0       	breq	.+4      	; 0x12d0 <sysclk_enable_usb+0x8>
 		prescaler = CLK_USBPSDIV_8_gc;
 	}
 	else {
 		prescaler = 0;
-    12b6:	60 e0       	ldi	r22, 0x00	; 0
-    12b8:	01 c0       	rjmp	.+2      	; 0x12bc <sysclk_enable_usb+0xa>
+    12cc:	60 e0       	ldi	r22, 0x00	; 0
+    12ce:	01 c0       	rjmp	.+2      	; 0x12d2 <sysclk_enable_usb+0xa>
 	/*
 	 * Enable or disable prescaler depending on if the USB frequency is 6
 	 * MHz or 48 MHz. Only 6 MHz USB frequency requires prescaling.
 	 */
 	if (frequency == 6) {
 		prescaler = CLK_USBPSDIV_8_gc;
-    12ba:	68 e1       	ldi	r22, 0x18	; 24
+    12d0:	68 e1       	ldi	r22, 0x18	; 24
 
 static inline bool osc_is_ready(uint8_t id)
 {
 	Assert(id != OSC_ID_USBSOF);
 
 	return OSC.STATUS & id;
-    12bc:	80 91 51 00 	lds	r24, 0x0051	; 0x800051 <__TEXT_REGION_LENGTH__+0x700051>
+    12d2:	80 91 51 00 	lds	r24, 0x0051	; 0x800051 <__TEXT_REGION_LENGTH__+0x700051>
 	/*
 	 * Switch to the system clock selected by the user.
 	 */
 	switch (CONFIG_USBCLK_SOURCE) {
 	case USBCLK_SRC_RCOSC:
 		if (!osc_is_ready(OSC_ID_RC32MHZ)) {
-    12c0:	81 fd       	sbrc	r24, 1
-    12c2:	26 c0       	rjmp	.+76     	; 0x1310 <sysclk_enable_usb+0x5e>
-
-typedef uint8_t irqflags_t;
-
-static inline irqflags_t cpu_irq_save(void)
-{
-	irqflags_t flags = SREG;
-    12c4:	9f b7       	in	r25, 0x3f	; 63
-	cpu_irq_disable();
-    12c6:	f8 94       	cli
-	irqflags_t flags;
-
-	Assert(id != OSC_ID_USBSOF);
-
-	flags = cpu_irq_save();
-	OSC.CTRL |= id;
-    12c8:	e0 e5       	ldi	r30, 0x50	; 80
-    12ca:	f0 e0       	ldi	r31, 0x00	; 0
-    12cc:	80 81       	ld	r24, Z
-    12ce:	82 60       	ori	r24, 0x02	; 2
-    12d0:	80 83       	st	Z, r24
-}
-
-static inline void cpu_irq_restore(irqflags_t flags)
-{
-	barrier();
-	SREG = flags;
-    12d2:	9f bf       	out	0x3f, r25	; 63
-
-static inline bool osc_is_ready(uint8_t id)
-{
-	Assert(id != OSC_ID_USBSOF);
-
-	return OSC.STATUS & id;
-    12d4:	81 81       	ldd	r24, Z+1	; 0x01
- *
- * \param id A number identifying the oscillator to wait for.
- */
-static inline void osc_wait_ready(uint8_t id)
-{
-	while (!osc_is_ready(id)) {
-    12d6:	81 ff       	sbrs	r24, 1
-    12d8:	fd cf       	rjmp	.-6      	; 0x12d4 <sysclk_enable_usb+0x22>
+    12d6:	81 fd       	sbrc	r24, 1
+    12d8:	26 c0       	rjmp	.+76     	; 0x1326 <sysclk_enable_usb+0x5e>
 
 typedef uint8_t irqflags_t;
 
@@ -3456,3458 +3427,3489 @@ static inline irqflags_t cpu_irq_save(void)
     12da:	9f b7       	in	r25, 0x3f	; 63
 	cpu_irq_disable();
     12dc:	f8 94       	cli
-# if !XMEGA_E
-				|| (ref_id == OSC_ID_USBSOF)
-#endif
-				);
+	irqflags_t flags;
 
-		OSC.DFLLCTRL &= ~(OSC_RC32MCREF_gm);
-    12de:	a0 e5       	ldi	r26, 0x50	; 80
-    12e0:	b0 e0       	ldi	r27, 0x00	; 0
-    12e2:	16 96       	adiw	r26, 0x06	; 6
-    12e4:	8c 91       	ld	r24, X
-    12e6:	16 97       	sbiw	r26, 0x06	; 6
-    12e8:	89 7f       	andi	r24, 0xF9	; 249
-    12ea:	16 96       	adiw	r26, 0x06	; 6
-    12ec:	8c 93       	st	X, r24
-    12ee:	16 97       	sbiw	r26, 0x06	; 6
-		else if (ref_id == OSC_ID_USBSOF) {
-			/*
-			 * Calibrate 32MRC at 48MHz using USB SOF
-			 * 48MHz / 1kHz = 0xBB80
-			 */
-			DFLLRC32M.COMP1 = 0x80;
-    12f0:	e0 e6       	ldi	r30, 0x60	; 96
-    12f2:	f0 e0       	ldi	r31, 0x00	; 0
-    12f4:	80 e8       	ldi	r24, 0x80	; 128
-    12f6:	85 83       	std	Z+5, r24	; 0x05
-			DFLLRC32M.COMP2 = 0xBB;
-    12f8:	8b eb       	ldi	r24, 0xBB	; 187
-    12fa:	86 83       	std	Z+6, r24	; 0x06
-			OSC.DFLLCTRL |= OSC_RC32MCREF_USBSOF_gc;
-    12fc:	16 96       	adiw	r26, 0x06	; 6
-    12fe:	8c 91       	ld	r24, X
-    1300:	16 97       	sbiw	r26, 0x06	; 6
-    1302:	84 60       	ori	r24, 0x04	; 4
-    1304:	16 96       	adiw	r26, 0x06	; 6
-    1306:	8c 93       	st	X, r24
-			OSC.DFLLCTRL &= ~(OSC_RC32MCREF_bm);
-# endif
-		}
-#endif
+	Assert(id != OSC_ID_USBSOF);
 
-		DFLLRC32M.CTRL |= DFLL_ENABLE_bm;
-    1308:	80 81       	ld	r24, Z
-    130a:	81 60       	ori	r24, 0x01	; 1
-    130c:	80 83       	st	Z, r24
+	flags = cpu_irq_save();
+	OSC.CTRL |= id;
+    12de:	e0 e5       	ldi	r30, 0x50	; 80
+    12e0:	f0 e0       	ldi	r31, 0x00	; 0
+    12e2:	80 81       	ld	r24, Z
+    12e4:	82 60       	ori	r24, 0x02	; 2
+    12e6:	80 83       	st	Z, r24
 }
 
 static inline void cpu_irq_restore(irqflags_t flags)
 {
 	barrier();
 	SREG = flags;
-    130e:	9f bf       	out	0x3f, r25	; 63
+    12e8:	9f bf       	out	0x3f, r25	; 63
+
+static inline bool osc_is_ready(uint8_t id)
+{
+	Assert(id != OSC_ID_USBSOF);
+
+	return OSC.STATUS & id;
+    12ea:	81 81       	ldd	r24, Z+1	; 0x01
+ *
+ * \param id A number identifying the oscillator to wait for.
+ */
+static inline void osc_wait_ready(uint8_t id)
+{
+	while (!osc_is_ready(id)) {
+    12ec:	81 ff       	sbrs	r24, 1
+    12ee:	fd cf       	rjmp	.-6      	; 0x12ea <sysclk_enable_usb+0x22>
+
+typedef uint8_t irqflags_t;
+
+static inline irqflags_t cpu_irq_save(void)
+{
+	irqflags_t flags = SREG;
+    12f0:	9f b7       	in	r25, 0x3f	; 63
+	cpu_irq_disable();
+    12f2:	f8 94       	cli
+# if !XMEGA_E
+				|| (ref_id == OSC_ID_USBSOF)
+#endif
+				);
+
+		OSC.DFLLCTRL &= ~(OSC_RC32MCREF_gm);
+    12f4:	a0 e5       	ldi	r26, 0x50	; 80
+    12f6:	b0 e0       	ldi	r27, 0x00	; 0
+    12f8:	16 96       	adiw	r26, 0x06	; 6
+    12fa:	8c 91       	ld	r24, X
+    12fc:	16 97       	sbiw	r26, 0x06	; 6
+    12fe:	89 7f       	andi	r24, 0xF9	; 249
+    1300:	16 96       	adiw	r26, 0x06	; 6
+    1302:	8c 93       	st	X, r24
+    1304:	16 97       	sbiw	r26, 0x06	; 6
+		else if (ref_id == OSC_ID_USBSOF) {
+			/*
+			 * Calibrate 32MRC at 48MHz using USB SOF
+			 * 48MHz / 1kHz = 0xBB80
+			 */
+			DFLLRC32M.COMP1 = 0x80;
+    1306:	e0 e6       	ldi	r30, 0x60	; 96
+    1308:	f0 e0       	ldi	r31, 0x00	; 0
+    130a:	80 e8       	ldi	r24, 0x80	; 128
+    130c:	85 83       	std	Z+5, r24	; 0x05
+			DFLLRC32M.COMP2 = 0xBB;
+    130e:	8b eb       	ldi	r24, 0xBB	; 187
+    1310:	86 83       	std	Z+6, r24	; 0x06
+			OSC.DFLLCTRL |= OSC_RC32MCREF_USBSOF_gc;
+    1312:	16 96       	adiw	r26, 0x06	; 6
+    1314:	8c 91       	ld	r24, X
+    1316:	16 97       	sbiw	r26, 0x06	; 6
+    1318:	84 60       	ori	r24, 0x04	; 4
+    131a:	16 96       	adiw	r26, 0x06	; 6
+    131c:	8c 93       	st	X, r24
+			OSC.DFLLCTRL &= ~(OSC_RC32MCREF_bm);
+# endif
+		}
+#endif
+
+		DFLLRC32M.CTRL |= DFLL_ENABLE_bm;
+    131e:	80 81       	ld	r24, Z
+    1320:	81 60       	ori	r24, 0x01	; 1
+    1322:	80 83       	st	Z, r24
+}
+
+static inline void cpu_irq_restore(irqflags_t flags)
+{
+	barrier();
+	SREG = flags;
+    1324:	9f bf       	out	0x3f, r25	; 63
 			}
 			osc_enable_autocalibration(OSC_ID_RC32MHZ,
 					CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC);
 #endif
 		}
 		ccp_write_io((uint8_t *)&CLK.USBCTRL, (prescaler)
-    1310:	63 60       	ori	r22, 0x03	; 3
-    1312:	84 e4       	ldi	r24, 0x44	; 68
-    1314:	90 e0       	ldi	r25, 0x00	; 0
-    1316:	2e d5       	rcall	.+2652   	; 0x1d74 <ccp_write_io>
+    1326:	63 60       	ori	r22, 0x03	; 3
+    1328:	84 e4       	ldi	r24, 0x44	; 68
+    132a:	90 e0       	ldi	r25, 0x00	; 0
+    132c:	2e d5       	rcall	.+2652   	; 0x1d8a <ccp_write_io>
 	default:
 		Assert(false);
 		break;
 	}
 
 	sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_USB);
-    1318:	60 e4       	ldi	r22, 0x40	; 64
-    131a:	80 e0       	ldi	r24, 0x00	; 0
-    131c:	be cf       	rjmp	.-132    	; 0x129a <sysclk_enable_module>
-    131e:	08 95       	ret
+    132e:	60 e4       	ldi	r22, 0x40	; 64
+    1330:	80 e0       	ldi	r24, 0x00	; 0
+    1332:	be cf       	rjmp	.-132    	; 0x12b0 <sysclk_enable_module>
+    1334:	08 95       	ret
 
-00001320 <udi_vendor_getsetting>:
+00001336 <udi_vendor_getsetting>:
 }
 
 uint8_t udi_vendor_getsetting(void)
 {
 	return udi_vendor_alternate_setting;
 }
-    1320:	80 91 b7 20 	lds	r24, 0x20B7	; 0x8020b7 <udi_vendor_alternate_setting>
-    1324:	08 95       	ret
+    1336:	80 91 b7 20 	lds	r24, 0x20B7	; 0x8020b7 <udi_vendor_alternate_setting>
+    133a:	08 95       	ret
 
-00001326 <udi_vendor_enable>:
+0000133c <udi_vendor_enable>:
  * \name Internal routines
  */
 //@{
 bool udi_vendor_enable(void)
 {
 	udi_vendor_alternate_setting = udc_get_interface_desc()->bAlternateSetting;
-    1326:	40 d1       	rcall	.+640    	; 0x15a8 <udc_get_interface_desc>
-    1328:	fc 01       	movw	r30, r24
-    132a:	83 81       	ldd	r24, Z+3	; 0x03
-    132c:	80 93 b7 20 	sts	0x20B7, r24	; 0x8020b7 <udi_vendor_alternate_setting>
+    133c:	40 d1       	rcall	.+640    	; 0x15be <udc_get_interface_desc>
+    133e:	fc 01       	movw	r30, r24
+    1340:	83 81       	ldd	r24, Z+3	; 0x03
+    1342:	80 93 b7 20 	sts	0x20B7, r24	; 0x8020b7 <udi_vendor_alternate_setting>
 	if (0 == udi_vendor_alternate_setting) {
-    1330:	81 11       	cpse	r24, r1
-    1332:	02 c0       	rjmp	.+4      	; 0x1338 <udi_vendor_enable+0x12>
+    1346:	81 11       	cpse	r24, r1
+    1348:	02 c0       	rjmp	.+4      	; 0x134e <udi_vendor_enable+0x12>
 		// Call application callback
 		// to notify that interface is enabled
 		if (!UDI_VENDOR_ENABLE_EXT()) {
-    1334:	48 c8       	rjmp	.-3952   	; 0x3c6 <main_vendor_enable>
-    1336:	08 95       	ret
+    134a:	3d c8       	rjmp	.-3974   	; 0x3c6 <main_vendor_enable>
+    134c:	08 95       	ret
 			return false;
 		}
 	}
 	return true;
-    1338:	81 e0       	ldi	r24, 0x01	; 1
+    134e:	81 e0       	ldi	r24, 0x01	; 1
 }
-    133a:	08 95       	ret
+    1350:	08 95       	ret
 
-0000133c <udi_vendor_disable>:
+00001352 <udi_vendor_disable>:
 
 
 void udi_vendor_disable(void)
 {
 	if (1 == udi_vendor_alternate_setting) {
-    133c:	80 91 b7 20 	lds	r24, 0x20B7	; 0x8020b7 <udi_vendor_alternate_setting>
-    1340:	81 30       	cpi	r24, 0x01	; 1
-    1342:	09 f4       	brne	.+2      	; 0x1346 <udi_vendor_disable+0xa>
+    1352:	80 91 b7 20 	lds	r24, 0x20B7	; 0x8020b7 <udi_vendor_alternate_setting>
+    1356:	81 30       	cpi	r24, 0x01	; 1
+    1358:	09 f4       	brne	.+2      	; 0x135c <udi_vendor_disable+0xa>
 		UDI_VENDOR_DISABLE_EXT();
-    1344:	5a c8       	rjmp	.-3916   	; 0x3fa <main_vendor_disable>
-    1346:	08 95       	ret
+    135a:	4f c8       	rjmp	.-3938   	; 0x3fa <main_vendor_disable>
+    135c:	08 95       	ret
 
-00001348 <udi_vendor_setup>:
+0000135e <udi_vendor_setup>:
 }
 
 
 bool udi_vendor_setup(void)
 {
 	if (Udd_setup_is_in()) {
-    1348:	80 91 5a 24 	lds	r24, 0x245A	; 0x80245a <udd_g_ctrlreq>
-    134c:	88 23       	and	r24, r24
-    134e:	4c f4       	brge	.+18     	; 0x1362 <udi_vendor_setup+0x1a>
+    135e:	80 91 5a 24 	lds	r24, 0x245A	; 0x80245a <udd_g_ctrlreq>
+    1362:	88 23       	and	r24, r24
+    1364:	4c f4       	brge	.+18     	; 0x1378 <udi_vendor_setup+0x1a>
 		if ((Udd_setup_type() == USB_REQ_TYPE_VENDOR)
-    1350:	80 76       	andi	r24, 0x60	; 96
-    1352:	80 34       	cpi	r24, 0x40	; 64
-    1354:	a9 f4       	brne	.+42     	; 0x1380 <udi_vendor_setup+0x38>
+    1366:	80 76       	andi	r24, 0x60	; 96
+    1368:	80 34       	cpi	r24, 0x40	; 64
+    136a:	a9 f4       	brne	.+42     	; 0x1396 <udi_vendor_setup+0x38>
 				&& (udd_g_ctrlreq.req.bRequest == 0)) {
-    1356:	80 91 5b 24 	lds	r24, 0x245B	; 0x80245b <udd_g_ctrlreq+0x1>
-    135a:	81 11       	cpse	r24, r1
-    135c:	13 c0       	rjmp	.+38     	; 0x1384 <udi_vendor_setup+0x3c>
+    136c:	80 91 5b 24 	lds	r24, 0x245B	; 0x80245b <udd_g_ctrlreq+0x1>
+    1370:	81 11       	cpse	r24, r1
+    1372:	13 c0       	rjmp	.+38     	; 0x139a <udi_vendor_setup+0x3c>
 			return UDI_VENDOR_SETUP_IN_RECEIVED();
-    135e:	52 c8       	rjmp	.-3932   	; 0x404 <main_setup_in_received>
-    1360:	08 95       	ret
+    1374:	47 c8       	rjmp	.-3954   	; 0x404 <main_setup_in_received>
+    1376:	08 95       	ret
 		}
 	}
 	if (Udd_setup_is_out()) {
 		if ((Udd_setup_type() == USB_REQ_TYPE_VENDOR)
-    1362:	80 76       	andi	r24, 0x60	; 96
-    1364:	80 34       	cpi	r24, 0x40	; 64
-    1366:	81 f4       	brne	.+32     	; 0x1388 <udi_vendor_setup+0x40>
+    1378:	80 76       	andi	r24, 0x60	; 96
+    137a:	80 34       	cpi	r24, 0x40	; 64
+    137c:	81 f4       	brne	.+32     	; 0x139e <udi_vendor_setup+0x40>
 				&& (udd_g_ctrlreq.req.bRequest == 0)
-    1368:	80 91 5b 24 	lds	r24, 0x245B	; 0x80245b <udd_g_ctrlreq+0x1>
-    136c:	81 11       	cpse	r24, r1
-    136e:	0e c0       	rjmp	.+28     	; 0x138c <udi_vendor_setup+0x44>
+    137e:	80 91 5b 24 	lds	r24, 0x245B	; 0x80245b <udd_g_ctrlreq+0x1>
+    1382:	81 11       	cpse	r24, r1
+    1384:	0e c0       	rjmp	.+28     	; 0x13a2 <udi_vendor_setup+0x44>
 				&& (0 != udd_g_ctrlreq.req.wLength)) {
-    1370:	80 91 60 24 	lds	r24, 0x2460	; 0x802460 <udd_g_ctrlreq+0x6>
-    1374:	90 91 61 24 	lds	r25, 0x2461	; 0x802461 <udd_g_ctrlreq+0x7>
-    1378:	89 2b       	or	r24, r25
-    137a:	51 f0       	breq	.+20     	; 0x1390 <udi_vendor_setup+0x48>
+    1386:	80 91 60 24 	lds	r24, 0x2460	; 0x802460 <udd_g_ctrlreq+0x6>
+    138a:	90 91 61 24 	lds	r25, 0x2461	; 0x802461 <udd_g_ctrlreq+0x7>
+    138e:	89 2b       	or	r24, r25
+    1390:	51 f0       	breq	.+20     	; 0x13a6 <udi_vendor_setup+0x48>
 			return UDI_VENDOR_SETUP_OUT_RECEIVED();
-    137c:	41 c8       	rjmp	.-3966   	; 0x400 <main_setup_out_received>
-    137e:	08 95       	ret
+    1392:	36 c8       	rjmp	.-3988   	; 0x400 <main_setup_out_received>
+    1394:	08 95       	ret
 		}
 	}
 	return false; // Not supported request
-    1380:	80 e0       	ldi	r24, 0x00	; 0
-    1382:	08 95       	ret
-    1384:	80 e0       	ldi	r24, 0x00	; 0
-    1386:	08 95       	ret
-    1388:	80 e0       	ldi	r24, 0x00	; 0
-    138a:	08 95       	ret
-    138c:	80 e0       	ldi	r24, 0x00	; 0
-    138e:	08 95       	ret
-    1390:	80 e0       	ldi	r24, 0x00	; 0
+    1396:	80 e0       	ldi	r24, 0x00	; 0
+    1398:	08 95       	ret
+    139a:	80 e0       	ldi	r24, 0x00	; 0
+    139c:	08 95       	ret
+    139e:	80 e0       	ldi	r24, 0x00	; 0
+    13a0:	08 95       	ret
+    13a2:	80 e0       	ldi	r24, 0x00	; 0
+    13a4:	08 95       	ret
+    13a6:	80 e0       	ldi	r24, 0x00	; 0
 }
-    1392:	08 95       	ret
+    13a8:	08 95       	ret
 
-00001394 <udi_vendor_iso_in_run>:
+000013aa <udi_vendor_iso_in_run>:
  *
  * \return \c 1 if function was successfully done, otherwise \c 0.
  */
 bool udi_vendor_iso_in_run(uint8_t * buf, iram_size_t buf_size,
 		udd_callback_trans_t callback)
 {
-    1394:	0f 93       	push	r16
-    1396:	1f 93       	push	r17
-    1398:	9b 01       	movw	r18, r22
+    13aa:	0f 93       	push	r16
+    13ac:	1f 93       	push	r17
+    13ae:	9b 01       	movw	r18, r22
 	return udd_ep_run(UDI_VENDOR_EP_ISO_IN,
-    139a:	8a 01       	movw	r16, r20
-    139c:	ac 01       	movw	r20, r24
-    139e:	60 e0       	ldi	r22, 0x00	; 0
-    13a0:	81 e8       	ldi	r24, 0x81	; 129
-    13a2:	0e 94 2e 13 	call	0x265c	; 0x265c <udd_ep_run>
+    13b0:	8a 01       	movw	r16, r20
+    13b2:	ac 01       	movw	r20, r24
+    13b4:	60 e0       	ldi	r22, 0x00	; 0
+    13b6:	81 e8       	ldi	r24, 0x81	; 129
+    13b8:	0e 94 39 13 	call	0x2672	; 0x2672 <udd_ep_run>
 			false,
 			buf,
 			buf_size,
 			callback);
 }
-    13a6:	1f 91       	pop	r17
-    13a8:	0f 91       	pop	r16
-    13aa:	08 95       	ret
+    13bc:	1f 91       	pop	r17
+    13be:	0f 91       	pop	r16
+    13c0:	08 95       	ret
 
-000013ac <udi_vendor_iso_in_run2>:
+000013c2 <udi_vendor_iso_in_run2>:
 
 bool udi_vendor_iso_in_run2(uint8_t * buf, iram_size_t buf_size,
 udd_callback_trans_t callback)
 {
-    13ac:	0f 93       	push	r16
-    13ae:	1f 93       	push	r17
-    13b0:	9b 01       	movw	r18, r22
+    13c2:	0f 93       	push	r16
+    13c4:	1f 93       	push	r17
+    13c6:	9b 01       	movw	r18, r22
 	return udd_ep_run(UDI_VENDOR_EP_ISO_IN + 1,
-    13b2:	8a 01       	movw	r16, r20
-    13b4:	ac 01       	movw	r20, r24
-    13b6:	60 e0       	ldi	r22, 0x00	; 0
-    13b8:	82 e8       	ldi	r24, 0x82	; 130
-    13ba:	0e 94 2e 13 	call	0x265c	; 0x265c <udd_ep_run>
+    13c8:	8a 01       	movw	r16, r20
+    13ca:	ac 01       	movw	r20, r24
+    13cc:	60 e0       	ldi	r22, 0x00	; 0
+    13ce:	82 e8       	ldi	r24, 0x82	; 130
+    13d0:	0e 94 39 13 	call	0x2672	; 0x2672 <udd_ep_run>
 	false,
 	buf,
 	buf_size,
 	callback);
 }
-    13be:	1f 91       	pop	r17
-    13c0:	0f 91       	pop	r16
-    13c2:	08 95       	ret
+    13d4:	1f 91       	pop	r17
+    13d6:	0f 91       	pop	r16
+    13d8:	08 95       	ret
 
-000013c4 <udi_vendor_iso_in_run3>:
+000013da <udi_vendor_iso_in_run3>:
 
 bool udi_vendor_iso_in_run3(uint8_t * buf, iram_size_t buf_size,
 udd_callback_trans_t callback)
 {
-    13c4:	0f 93       	push	r16
-    13c6:	1f 93       	push	r17
-    13c8:	9b 01       	movw	r18, r22
+    13da:	0f 93       	push	r16
+    13dc:	1f 93       	push	r17
+    13de:	9b 01       	movw	r18, r22
 	return udd_ep_run(UDI_VENDOR_EP_ISO_IN + 2,
-    13ca:	8a 01       	movw	r16, r20
-    13cc:	ac 01       	movw	r20, r24
-    13ce:	60 e0       	ldi	r22, 0x00	; 0
-    13d0:	83 e8       	ldi	r24, 0x83	; 131
-    13d2:	0e 94 2e 13 	call	0x265c	; 0x265c <udd_ep_run>
+    13e0:	8a 01       	movw	r16, r20
+    13e2:	ac 01       	movw	r20, r24
+    13e4:	60 e0       	ldi	r22, 0x00	; 0
+    13e6:	83 e8       	ldi	r24, 0x83	; 131
+    13e8:	0e 94 39 13 	call	0x2672	; 0x2672 <udd_ep_run>
 	false,
 	buf,
 	buf_size,
 	callback);
 }
-    13d6:	1f 91       	pop	r17
-    13d8:	0f 91       	pop	r16
-    13da:	08 95       	ret
+    13ec:	1f 91       	pop	r17
+    13ee:	0f 91       	pop	r16
+    13f0:	08 95       	ret
 
-000013dc <udc_next_desc_in_iface>:
+000013f2 <udc_next_desc_in_iface>:
 /*! \brief Stop the USB Device stack
  */
 void udc_stop(void)
 {
 	udd_disable();
 	udc_reset();
-    13dc:	e0 91 bc 20 	lds	r30, 0x20BC	; 0x8020bc <udc_ptr_conf>
-    13e0:	f0 91 bd 20 	lds	r31, 0x20BD	; 0x8020bd <udc_ptr_conf+0x1>
-    13e4:	01 90       	ld	r0, Z+
-    13e6:	f0 81       	ld	r31, Z
-    13e8:	e0 2d       	mov	r30, r0
-    13ea:	22 81       	ldd	r18, Z+2	; 0x02
-    13ec:	33 81       	ldd	r19, Z+3	; 0x03
-    13ee:	2e 0f       	add	r18, r30
-    13f0:	3f 1f       	adc	r19, r31
-    13f2:	fc 01       	movw	r30, r24
-    13f4:	40 81       	ld	r20, Z
-    13f6:	e4 0f       	add	r30, r20
-    13f8:	f1 1d       	adc	r31, r1
-    13fa:	e2 17       	cp	r30, r18
-    13fc:	f3 07       	cpc	r31, r19
-    13fe:	b8 f4       	brcc	.+46     	; 0x142e <udc_next_desc_in_iface+0x52>
-    1400:	81 81       	ldd	r24, Z+1	; 0x01
-    1402:	84 30       	cpi	r24, 0x04	; 4
-    1404:	b9 f0       	breq	.+46     	; 0x1434 <udc_next_desc_in_iface+0x58>
-    1406:	86 13       	cpse	r24, r22
-    1408:	09 c0       	rjmp	.+18     	; 0x141c <udc_next_desc_in_iface+0x40>
-    140a:	05 c0       	rjmp	.+10     	; 0x1416 <udc_next_desc_in_iface+0x3a>
-    140c:	81 81       	ldd	r24, Z+1	; 0x01
-    140e:	84 30       	cpi	r24, 0x04	; 4
-    1410:	a1 f0       	breq	.+40     	; 0x143a <udc_next_desc_in_iface+0x5e>
-    1412:	86 13       	cpse	r24, r22
-    1414:	03 c0       	rjmp	.+6      	; 0x141c <udc_next_desc_in_iface+0x40>
-    1416:	8e 2f       	mov	r24, r30
-    1418:	9f 2f       	mov	r25, r31
-    141a:	08 95       	ret
-    141c:	80 81       	ld	r24, Z
-    141e:	e8 0f       	add	r30, r24
-    1420:	f1 1d       	adc	r31, r1
-    1422:	e2 17       	cp	r30, r18
-    1424:	f3 07       	cpc	r31, r19
-    1426:	90 f3       	brcs	.-28     	; 0x140c <udc_next_desc_in_iface+0x30>
-    1428:	80 e0       	ldi	r24, 0x00	; 0
-    142a:	90 e0       	ldi	r25, 0x00	; 0
-    142c:	08 95       	ret
-    142e:	80 e0       	ldi	r24, 0x00	; 0
-    1430:	90 e0       	ldi	r25, 0x00	; 0
-    1432:	08 95       	ret
-    1434:	80 e0       	ldi	r24, 0x00	; 0
-    1436:	90 e0       	ldi	r25, 0x00	; 0
-    1438:	08 95       	ret
-    143a:	80 e0       	ldi	r24, 0x00	; 0
-    143c:	90 e0       	ldi	r25, 0x00	; 0
-    143e:	08 95       	ret
+    13f2:	e0 91 bc 20 	lds	r30, 0x20BC	; 0x8020bc <udc_ptr_conf>
+    13f6:	f0 91 bd 20 	lds	r31, 0x20BD	; 0x8020bd <udc_ptr_conf+0x1>
+    13fa:	01 90       	ld	r0, Z+
+    13fc:	f0 81       	ld	r31, Z
+    13fe:	e0 2d       	mov	r30, r0
+    1400:	22 81       	ldd	r18, Z+2	; 0x02
+    1402:	33 81       	ldd	r19, Z+3	; 0x03
+    1404:	2e 0f       	add	r18, r30
+    1406:	3f 1f       	adc	r19, r31
+    1408:	fc 01       	movw	r30, r24
+    140a:	40 81       	ld	r20, Z
+    140c:	e4 0f       	add	r30, r20
+    140e:	f1 1d       	adc	r31, r1
+    1410:	e2 17       	cp	r30, r18
+    1412:	f3 07       	cpc	r31, r19
+    1414:	b8 f4       	brcc	.+46     	; 0x1444 <udc_next_desc_in_iface+0x52>
+    1416:	81 81       	ldd	r24, Z+1	; 0x01
+    1418:	84 30       	cpi	r24, 0x04	; 4
+    141a:	b9 f0       	breq	.+46     	; 0x144a <udc_next_desc_in_iface+0x58>
+    141c:	86 13       	cpse	r24, r22
+    141e:	09 c0       	rjmp	.+18     	; 0x1432 <udc_next_desc_in_iface+0x40>
+    1420:	05 c0       	rjmp	.+10     	; 0x142c <udc_next_desc_in_iface+0x3a>
+    1422:	81 81       	ldd	r24, Z+1	; 0x01
+    1424:	84 30       	cpi	r24, 0x04	; 4
+    1426:	a1 f0       	breq	.+40     	; 0x1450 <udc_next_desc_in_iface+0x5e>
+    1428:	86 13       	cpse	r24, r22
+    142a:	03 c0       	rjmp	.+6      	; 0x1432 <udc_next_desc_in_iface+0x40>
+    142c:	8e 2f       	mov	r24, r30
+    142e:	9f 2f       	mov	r25, r31
+    1430:	08 95       	ret
+    1432:	80 81       	ld	r24, Z
+    1434:	e8 0f       	add	r30, r24
+    1436:	f1 1d       	adc	r31, r1
+    1438:	e2 17       	cp	r30, r18
+    143a:	f3 07       	cpc	r31, r19
+    143c:	90 f3       	brcs	.-28     	; 0x1422 <udc_next_desc_in_iface+0x30>
+    143e:	80 e0       	ldi	r24, 0x00	; 0
+    1440:	90 e0       	ldi	r25, 0x00	; 0
+    1442:	08 95       	ret
+    1444:	80 e0       	ldi	r24, 0x00	; 0
+    1446:	90 e0       	ldi	r25, 0x00	; 0
+    1448:	08 95       	ret
+    144a:	80 e0       	ldi	r24, 0x00	; 0
+    144c:	90 e0       	ldi	r25, 0x00	; 0
+    144e:	08 95       	ret
+    1450:	80 e0       	ldi	r24, 0x00	; 0
+    1452:	90 e0       	ldi	r25, 0x00	; 0
+    1454:	08 95       	ret
 
-00001440 <udc_valid_address>:
-    1440:	80 91 5c 24 	lds	r24, 0x245C	; 0x80245c <udd_g_ctrlreq+0x2>
-    1444:	8f 77       	andi	r24, 0x7F	; 127
-    1446:	0c 94 5c 12 	jmp	0x24b8	; 0x24b8 <udd_set_address>
-    144a:	08 95       	ret
+00001456 <udc_valid_address>:
+    1456:	80 91 5c 24 	lds	r24, 0x245C	; 0x80245c <udd_g_ctrlreq+0x2>
+    145a:	8f 77       	andi	r24, 0x7F	; 127
+    145c:	0c 94 67 12 	jmp	0x24ce	; 0x24ce <udd_set_address>
+    1460:	08 95       	ret
 
-0000144c <udc_update_iface_desc>:
-    144c:	90 91 be 20 	lds	r25, 0x20BE	; 0x8020be <udc_num_configuration>
-    1450:	99 23       	and	r25, r25
-    1452:	81 f1       	breq	.+96     	; 0x14b4 <udc_update_iface_desc+0x68>
-    1454:	e0 91 bc 20 	lds	r30, 0x20BC	; 0x8020bc <udc_ptr_conf>
-    1458:	f0 91 bd 20 	lds	r31, 0x20BD	; 0x8020bd <udc_ptr_conf+0x1>
-    145c:	01 90       	ld	r0, Z+
-    145e:	f0 81       	ld	r31, Z
-    1460:	e0 2d       	mov	r30, r0
-    1462:	94 81       	ldd	r25, Z+4	; 0x04
-    1464:	89 17       	cp	r24, r25
-    1466:	40 f5       	brcc	.+80     	; 0x14b8 <udc_update_iface_desc+0x6c>
-    1468:	e0 93 ba 20 	sts	0x20BA, r30	; 0x8020ba <udc_ptr_iface>
-    146c:	f0 93 bb 20 	sts	0x20BB, r31	; 0x8020bb <udc_ptr_iface+0x1>
-    1470:	22 81       	ldd	r18, Z+2	; 0x02
-    1472:	33 81       	ldd	r19, Z+3	; 0x03
-    1474:	2e 0f       	add	r18, r30
-    1476:	3f 1f       	adc	r19, r31
-    1478:	e2 17       	cp	r30, r18
-    147a:	f3 07       	cpc	r31, r19
-    147c:	f8 f4       	brcc	.+62     	; 0x14bc <udc_update_iface_desc+0x70>
-    147e:	91 81       	ldd	r25, Z+1	; 0x01
-    1480:	94 30       	cpi	r25, 0x04	; 4
-    1482:	61 f4       	brne	.+24     	; 0x149c <udc_update_iface_desc+0x50>
-    1484:	92 81       	ldd	r25, Z+2	; 0x02
-    1486:	98 13       	cpse	r25, r24
-    1488:	09 c0       	rjmp	.+18     	; 0x149c <udc_update_iface_desc+0x50>
-    148a:	93 81       	ldd	r25, Z+3	; 0x03
-    148c:	96 13       	cpse	r25, r22
-    148e:	06 c0       	rjmp	.+12     	; 0x149c <udc_update_iface_desc+0x50>
-    1490:	e0 93 ba 20 	sts	0x20BA, r30	; 0x8020ba <udc_ptr_iface>
-    1494:	f0 93 bb 20 	sts	0x20BB, r31	; 0x8020bb <udc_ptr_iface+0x1>
-    1498:	81 e0       	ldi	r24, 0x01	; 1
-    149a:	08 95       	ret
-    149c:	90 81       	ld	r25, Z
-    149e:	e9 0f       	add	r30, r25
-    14a0:	f1 1d       	adc	r31, r1
-    14a2:	e2 17       	cp	r30, r18
-    14a4:	f3 07       	cpc	r31, r19
-    14a6:	58 f3       	brcs	.-42     	; 0x147e <udc_update_iface_desc+0x32>
-    14a8:	e0 93 ba 20 	sts	0x20BA, r30	; 0x8020ba <udc_ptr_iface>
-    14ac:	f0 93 bb 20 	sts	0x20BB, r31	; 0x8020bb <udc_ptr_iface+0x1>
-    14b0:	80 e0       	ldi	r24, 0x00	; 0
-    14b2:	08 95       	ret
-    14b4:	80 e0       	ldi	r24, 0x00	; 0
-    14b6:	08 95       	ret
-    14b8:	80 e0       	ldi	r24, 0x00	; 0
-    14ba:	08 95       	ret
-    14bc:	80 e0       	ldi	r24, 0x00	; 0
-    14be:	08 95       	ret
+00001462 <udc_update_iface_desc>:
+    1462:	90 91 be 20 	lds	r25, 0x20BE	; 0x8020be <udc_num_configuration>
+    1466:	99 23       	and	r25, r25
+    1468:	81 f1       	breq	.+96     	; 0x14ca <udc_update_iface_desc+0x68>
+    146a:	e0 91 bc 20 	lds	r30, 0x20BC	; 0x8020bc <udc_ptr_conf>
+    146e:	f0 91 bd 20 	lds	r31, 0x20BD	; 0x8020bd <udc_ptr_conf+0x1>
+    1472:	01 90       	ld	r0, Z+
+    1474:	f0 81       	ld	r31, Z
+    1476:	e0 2d       	mov	r30, r0
+    1478:	94 81       	ldd	r25, Z+4	; 0x04
+    147a:	89 17       	cp	r24, r25
+    147c:	40 f5       	brcc	.+80     	; 0x14ce <udc_update_iface_desc+0x6c>
+    147e:	e0 93 ba 20 	sts	0x20BA, r30	; 0x8020ba <udc_ptr_iface>
+    1482:	f0 93 bb 20 	sts	0x20BB, r31	; 0x8020bb <udc_ptr_iface+0x1>
+    1486:	22 81       	ldd	r18, Z+2	; 0x02
+    1488:	33 81       	ldd	r19, Z+3	; 0x03
+    148a:	2e 0f       	add	r18, r30
+    148c:	3f 1f       	adc	r19, r31
+    148e:	e2 17       	cp	r30, r18
+    1490:	f3 07       	cpc	r31, r19
+    1492:	f8 f4       	brcc	.+62     	; 0x14d2 <udc_update_iface_desc+0x70>
+    1494:	91 81       	ldd	r25, Z+1	; 0x01
+    1496:	94 30       	cpi	r25, 0x04	; 4
+    1498:	61 f4       	brne	.+24     	; 0x14b2 <udc_update_iface_desc+0x50>
+    149a:	92 81       	ldd	r25, Z+2	; 0x02
+    149c:	98 13       	cpse	r25, r24
+    149e:	09 c0       	rjmp	.+18     	; 0x14b2 <udc_update_iface_desc+0x50>
+    14a0:	93 81       	ldd	r25, Z+3	; 0x03
+    14a2:	96 13       	cpse	r25, r22
+    14a4:	06 c0       	rjmp	.+12     	; 0x14b2 <udc_update_iface_desc+0x50>
+    14a6:	e0 93 ba 20 	sts	0x20BA, r30	; 0x8020ba <udc_ptr_iface>
+    14aa:	f0 93 bb 20 	sts	0x20BB, r31	; 0x8020bb <udc_ptr_iface+0x1>
+    14ae:	81 e0       	ldi	r24, 0x01	; 1
+    14b0:	08 95       	ret
+    14b2:	90 81       	ld	r25, Z
+    14b4:	e9 0f       	add	r30, r25
+    14b6:	f1 1d       	adc	r31, r1
+    14b8:	e2 17       	cp	r30, r18
+    14ba:	f3 07       	cpc	r31, r19
+    14bc:	58 f3       	brcs	.-42     	; 0x1494 <udc_update_iface_desc+0x32>
+    14be:	e0 93 ba 20 	sts	0x20BA, r30	; 0x8020ba <udc_ptr_iface>
+    14c2:	f0 93 bb 20 	sts	0x20BB, r31	; 0x8020bb <udc_ptr_iface+0x1>
+    14c6:	80 e0       	ldi	r24, 0x00	; 0
+    14c8:	08 95       	ret
+    14ca:	80 e0       	ldi	r24, 0x00	; 0
+    14cc:	08 95       	ret
+    14ce:	80 e0       	ldi	r24, 0x00	; 0
+    14d0:	08 95       	ret
+    14d2:	80 e0       	ldi	r24, 0x00	; 0
+    14d4:	08 95       	ret
 
-000014c0 <udc_iface_disable>:
-    14c0:	ef 92       	push	r14
-    14c2:	ff 92       	push	r15
-    14c4:	1f 93       	push	r17
-    14c6:	cf 93       	push	r28
-    14c8:	df 93       	push	r29
-    14ca:	c8 2f       	mov	r28, r24
-    14cc:	60 e0       	ldi	r22, 0x00	; 0
-    14ce:	be df       	rcall	.-132    	; 0x144c <udc_update_iface_desc>
-    14d0:	18 2f       	mov	r17, r24
-    14d2:	88 23       	and	r24, r24
-    14d4:	81 f1       	breq	.+96     	; 0x1536 <udc_iface_disable+0x76>
-    14d6:	a0 91 bc 20 	lds	r26, 0x20BC	; 0x8020bc <udc_ptr_conf>
-    14da:	b0 91 bd 20 	lds	r27, 0x20BD	; 0x8020bd <udc_ptr_conf+0x1>
-    14de:	ec 2f       	mov	r30, r28
-    14e0:	f0 e0       	ldi	r31, 0x00	; 0
-    14e2:	ee 0f       	add	r30, r30
-    14e4:	ff 1f       	adc	r31, r31
-    14e6:	12 96       	adiw	r26, 0x02	; 2
-    14e8:	8d 91       	ld	r24, X+
-    14ea:	9c 91       	ld	r25, X
-    14ec:	13 97       	sbiw	r26, 0x03	; 3
-    14ee:	e8 0f       	add	r30, r24
-    14f0:	f9 1f       	adc	r31, r25
-    14f2:	e0 80       	ld	r14, Z
-    14f4:	f1 80       	ldd	r15, Z+1	; 0x01
-    14f6:	d7 01       	movw	r26, r14
-    14f8:	16 96       	adiw	r26, 0x06	; 6
-    14fa:	ed 91       	ld	r30, X+
-    14fc:	fc 91       	ld	r31, X
-    14fe:	17 97       	sbiw	r26, 0x07	; 7
-    1500:	09 95       	icall
-    1502:	68 2f       	mov	r22, r24
-    1504:	8c 2f       	mov	r24, r28
-    1506:	a2 df       	rcall	.-188    	; 0x144c <udc_update_iface_desc>
-    1508:	18 2f       	mov	r17, r24
-    150a:	88 23       	and	r24, r24
-    150c:	a1 f0       	breq	.+40     	; 0x1536 <udc_iface_disable+0x76>
-    150e:	c0 91 ba 20 	lds	r28, 0x20BA	; 0x8020ba <udc_ptr_iface>
-    1512:	d0 91 bb 20 	lds	r29, 0x20BB	; 0x8020bb <udc_ptr_iface+0x1>
-    1516:	65 e0       	ldi	r22, 0x05	; 5
-    1518:	ce 01       	movw	r24, r28
-    151a:	60 df       	rcall	.-320    	; 0x13dc <udc_next_desc_in_iface>
-    151c:	ec 01       	movw	r28, r24
-    151e:	89 2b       	or	r24, r25
-    1520:	21 f0       	breq	.+8      	; 0x152a <udc_iface_disable+0x6a>
-    1522:	8a 81       	ldd	r24, Y+2	; 0x02
-    1524:	0e 94 31 14 	call	0x2862	; 0x2862 <udd_ep_free>
-    1528:	f6 cf       	rjmp	.-20     	; 0x1516 <udc_iface_disable+0x56>
-    152a:	d7 01       	movw	r26, r14
-    152c:	12 96       	adiw	r26, 0x02	; 2
-    152e:	ed 91       	ld	r30, X+
-    1530:	fc 91       	ld	r31, X
-    1532:	13 97       	sbiw	r26, 0x03	; 3
-    1534:	09 95       	icall
-    1536:	81 2f       	mov	r24, r17
-    1538:	df 91       	pop	r29
-    153a:	cf 91       	pop	r28
-    153c:	1f 91       	pop	r17
-    153e:	ff 90       	pop	r15
-    1540:	ef 90       	pop	r14
-    1542:	08 95       	ret
+000014d6 <udc_iface_disable>:
+    14d6:	ef 92       	push	r14
+    14d8:	ff 92       	push	r15
+    14da:	1f 93       	push	r17
+    14dc:	cf 93       	push	r28
+    14de:	df 93       	push	r29
+    14e0:	c8 2f       	mov	r28, r24
+    14e2:	60 e0       	ldi	r22, 0x00	; 0
+    14e4:	be df       	rcall	.-132    	; 0x1462 <udc_update_iface_desc>
+    14e6:	18 2f       	mov	r17, r24
+    14e8:	88 23       	and	r24, r24
+    14ea:	81 f1       	breq	.+96     	; 0x154c <udc_iface_disable+0x76>
+    14ec:	a0 91 bc 20 	lds	r26, 0x20BC	; 0x8020bc <udc_ptr_conf>
+    14f0:	b0 91 bd 20 	lds	r27, 0x20BD	; 0x8020bd <udc_ptr_conf+0x1>
+    14f4:	ec 2f       	mov	r30, r28
+    14f6:	f0 e0       	ldi	r31, 0x00	; 0
+    14f8:	ee 0f       	add	r30, r30
+    14fa:	ff 1f       	adc	r31, r31
+    14fc:	12 96       	adiw	r26, 0x02	; 2
+    14fe:	8d 91       	ld	r24, X+
+    1500:	9c 91       	ld	r25, X
+    1502:	13 97       	sbiw	r26, 0x03	; 3
+    1504:	e8 0f       	add	r30, r24
+    1506:	f9 1f       	adc	r31, r25
+    1508:	e0 80       	ld	r14, Z
+    150a:	f1 80       	ldd	r15, Z+1	; 0x01
+    150c:	d7 01       	movw	r26, r14
+    150e:	16 96       	adiw	r26, 0x06	; 6
+    1510:	ed 91       	ld	r30, X+
+    1512:	fc 91       	ld	r31, X
+    1514:	17 97       	sbiw	r26, 0x07	; 7
+    1516:	09 95       	icall
+    1518:	68 2f       	mov	r22, r24
+    151a:	8c 2f       	mov	r24, r28
+    151c:	a2 df       	rcall	.-188    	; 0x1462 <udc_update_iface_desc>
+    151e:	18 2f       	mov	r17, r24
+    1520:	88 23       	and	r24, r24
+    1522:	a1 f0       	breq	.+40     	; 0x154c <udc_iface_disable+0x76>
+    1524:	c0 91 ba 20 	lds	r28, 0x20BA	; 0x8020ba <udc_ptr_iface>
+    1528:	d0 91 bb 20 	lds	r29, 0x20BB	; 0x8020bb <udc_ptr_iface+0x1>
+    152c:	65 e0       	ldi	r22, 0x05	; 5
+    152e:	ce 01       	movw	r24, r28
+    1530:	60 df       	rcall	.-320    	; 0x13f2 <udc_next_desc_in_iface>
+    1532:	ec 01       	movw	r28, r24
+    1534:	89 2b       	or	r24, r25
+    1536:	21 f0       	breq	.+8      	; 0x1540 <udc_iface_disable+0x6a>
+    1538:	8a 81       	ldd	r24, Y+2	; 0x02
+    153a:	0e 94 3c 14 	call	0x2878	; 0x2878 <udd_ep_free>
+    153e:	f6 cf       	rjmp	.-20     	; 0x152c <udc_iface_disable+0x56>
+    1540:	d7 01       	movw	r26, r14
+    1542:	12 96       	adiw	r26, 0x02	; 2
+    1544:	ed 91       	ld	r30, X+
+    1546:	fc 91       	ld	r31, X
+    1548:	13 97       	sbiw	r26, 0x03	; 3
+    154a:	09 95       	icall
+    154c:	81 2f       	mov	r24, r17
+    154e:	df 91       	pop	r29
+    1550:	cf 91       	pop	r28
+    1552:	1f 91       	pop	r17
+    1554:	ff 90       	pop	r15
+    1556:	ef 90       	pop	r14
+    1558:	08 95       	ret
 
-00001544 <udc_iface_enable>:
-    1544:	1f 93       	push	r17
-    1546:	cf 93       	push	r28
-    1548:	df 93       	push	r29
-    154a:	18 2f       	mov	r17, r24
-    154c:	7f df       	rcall	.-258    	; 0x144c <udc_update_iface_desc>
-    154e:	88 23       	and	r24, r24
-    1550:	39 f1       	breq	.+78     	; 0x15a0 <udc_iface_enable+0x5c>
-    1552:	c0 91 ba 20 	lds	r28, 0x20BA	; 0x8020ba <udc_ptr_iface>
-    1556:	d0 91 bb 20 	lds	r29, 0x20BB	; 0x8020bb <udc_ptr_iface+0x1>
-    155a:	65 e0       	ldi	r22, 0x05	; 5
-    155c:	ce 01       	movw	r24, r28
-    155e:	3e df       	rcall	.-388    	; 0x13dc <udc_next_desc_in_iface>
-    1560:	ec 01       	movw	r28, r24
-    1562:	89 2b       	or	r24, r25
-    1564:	41 f0       	breq	.+16     	; 0x1576 <udc_iface_enable+0x32>
-    1566:	4c 81       	ldd	r20, Y+4	; 0x04
-    1568:	5d 81       	ldd	r21, Y+5	; 0x05
-    156a:	6b 81       	ldd	r22, Y+3	; 0x03
-    156c:	8a 81       	ldd	r24, Y+2	; 0x02
-    156e:	b1 d7       	rcall	.+3938   	; 0x24d2 <udd_ep_alloc>
-    1570:	81 11       	cpse	r24, r1
-    1572:	f3 cf       	rjmp	.-26     	; 0x155a <udc_iface_enable+0x16>
-    1574:	15 c0       	rjmp	.+42     	; 0x15a0 <udc_iface_enable+0x5c>
-    1576:	a0 91 bc 20 	lds	r26, 0x20BC	; 0x8020bc <udc_ptr_conf>
-    157a:	b0 91 bd 20 	lds	r27, 0x20BD	; 0x8020bd <udc_ptr_conf+0x1>
-    157e:	e1 2f       	mov	r30, r17
-    1580:	f0 e0       	ldi	r31, 0x00	; 0
-    1582:	ee 0f       	add	r30, r30
-    1584:	ff 1f       	adc	r31, r31
-    1586:	12 96       	adiw	r26, 0x02	; 2
-    1588:	8d 91       	ld	r24, X+
-    158a:	9c 91       	ld	r25, X
-    158c:	13 97       	sbiw	r26, 0x03	; 3
-    158e:	e8 0f       	add	r30, r24
-    1590:	f9 1f       	adc	r31, r25
-    1592:	01 90       	ld	r0, Z+
-    1594:	f0 81       	ld	r31, Z
-    1596:	e0 2d       	mov	r30, r0
-    1598:	01 90       	ld	r0, Z+
-    159a:	f0 81       	ld	r31, Z
-    159c:	e0 2d       	mov	r30, r0
-    159e:	09 95       	icall
-    15a0:	df 91       	pop	r29
-    15a2:	cf 91       	pop	r28
-    15a4:	1f 91       	pop	r17
-    15a6:	08 95       	ret
+0000155a <udc_iface_enable>:
+    155a:	1f 93       	push	r17
+    155c:	cf 93       	push	r28
+    155e:	df 93       	push	r29
+    1560:	18 2f       	mov	r17, r24
+    1562:	7f df       	rcall	.-258    	; 0x1462 <udc_update_iface_desc>
+    1564:	88 23       	and	r24, r24
+    1566:	39 f1       	breq	.+78     	; 0x15b6 <udc_iface_enable+0x5c>
+    1568:	c0 91 ba 20 	lds	r28, 0x20BA	; 0x8020ba <udc_ptr_iface>
+    156c:	d0 91 bb 20 	lds	r29, 0x20BB	; 0x8020bb <udc_ptr_iface+0x1>
+    1570:	65 e0       	ldi	r22, 0x05	; 5
+    1572:	ce 01       	movw	r24, r28
+    1574:	3e df       	rcall	.-388    	; 0x13f2 <udc_next_desc_in_iface>
+    1576:	ec 01       	movw	r28, r24
+    1578:	89 2b       	or	r24, r25
+    157a:	41 f0       	breq	.+16     	; 0x158c <udc_iface_enable+0x32>
+    157c:	4c 81       	ldd	r20, Y+4	; 0x04
+    157e:	5d 81       	ldd	r21, Y+5	; 0x05
+    1580:	6b 81       	ldd	r22, Y+3	; 0x03
+    1582:	8a 81       	ldd	r24, Y+2	; 0x02
+    1584:	b1 d7       	rcall	.+3938   	; 0x24e8 <udd_ep_alloc>
+    1586:	81 11       	cpse	r24, r1
+    1588:	f3 cf       	rjmp	.-26     	; 0x1570 <udc_iface_enable+0x16>
+    158a:	15 c0       	rjmp	.+42     	; 0x15b6 <udc_iface_enable+0x5c>
+    158c:	a0 91 bc 20 	lds	r26, 0x20BC	; 0x8020bc <udc_ptr_conf>
+    1590:	b0 91 bd 20 	lds	r27, 0x20BD	; 0x8020bd <udc_ptr_conf+0x1>
+    1594:	e1 2f       	mov	r30, r17
+    1596:	f0 e0       	ldi	r31, 0x00	; 0
+    1598:	ee 0f       	add	r30, r30
+    159a:	ff 1f       	adc	r31, r31
+    159c:	12 96       	adiw	r26, 0x02	; 2
+    159e:	8d 91       	ld	r24, X+
+    15a0:	9c 91       	ld	r25, X
+    15a2:	13 97       	sbiw	r26, 0x03	; 3
+    15a4:	e8 0f       	add	r30, r24
+    15a6:	f9 1f       	adc	r31, r25
+    15a8:	01 90       	ld	r0, Z+
+    15aa:	f0 81       	ld	r31, Z
+    15ac:	e0 2d       	mov	r30, r0
+    15ae:	01 90       	ld	r0, Z+
+    15b0:	f0 81       	ld	r31, Z
+    15b2:	e0 2d       	mov	r30, r0
+    15b4:	09 95       	icall
+    15b6:	df 91       	pop	r29
+    15b8:	cf 91       	pop	r28
+    15ba:	1f 91       	pop	r17
+    15bc:	08 95       	ret
 
-000015a8 <udc_get_interface_desc>:
-    15a8:	80 91 ba 20 	lds	r24, 0x20BA	; 0x8020ba <udc_ptr_iface>
-    15ac:	90 91 bb 20 	lds	r25, 0x20BB	; 0x8020bb <udc_ptr_iface+0x1>
-    15b0:	08 95       	ret
+000015be <udc_get_interface_desc>:
+    15be:	80 91 ba 20 	lds	r24, 0x20BA	; 0x8020ba <udc_ptr_iface>
+    15c2:	90 91 bb 20 	lds	r25, 0x20BB	; 0x8020bb <udc_ptr_iface+0x1>
+    15c6:	08 95       	ret
 
-000015b2 <udc_start>:
-    15b2:	fd c6       	rjmp	.+3578   	; 0x23ae <udd_enable>
-    15b4:	08 95       	ret
+000015c8 <udc_start>:
+    15c8:	fd c6       	rjmp	.+3578   	; 0x23c4 <udd_enable>
+    15ca:	08 95       	ret
 
-000015b6 <udc_reset>:
-    15b6:	cf 93       	push	r28
-    15b8:	80 91 be 20 	lds	r24, 0x20BE	; 0x8020be <udc_num_configuration>
-    15bc:	88 23       	and	r24, r24
-    15be:	c1 f0       	breq	.+48     	; 0x15f0 <udc_reset+0x3a>
-    15c0:	e0 91 bc 20 	lds	r30, 0x20BC	; 0x8020bc <udc_ptr_conf>
-    15c4:	f0 91 bd 20 	lds	r31, 0x20BD	; 0x8020bd <udc_ptr_conf+0x1>
-    15c8:	01 90       	ld	r0, Z+
-    15ca:	f0 81       	ld	r31, Z
-    15cc:	e0 2d       	mov	r30, r0
-    15ce:	84 81       	ldd	r24, Z+4	; 0x04
-    15d0:	88 23       	and	r24, r24
-    15d2:	71 f0       	breq	.+28     	; 0x15f0 <udc_reset+0x3a>
-    15d4:	c0 e0       	ldi	r28, 0x00	; 0
-    15d6:	8c 2f       	mov	r24, r28
-    15d8:	73 df       	rcall	.-282    	; 0x14c0 <udc_iface_disable>
-    15da:	cf 5f       	subi	r28, 0xFF	; 255
-    15dc:	e0 91 bc 20 	lds	r30, 0x20BC	; 0x8020bc <udc_ptr_conf>
-    15e0:	f0 91 bd 20 	lds	r31, 0x20BD	; 0x8020bd <udc_ptr_conf+0x1>
-    15e4:	01 90       	ld	r0, Z+
-    15e6:	f0 81       	ld	r31, Z
-    15e8:	e0 2d       	mov	r30, r0
-    15ea:	84 81       	ldd	r24, Z+4	; 0x04
-    15ec:	c8 17       	cp	r28, r24
-    15ee:	98 f3       	brcs	.-26     	; 0x15d6 <udc_reset+0x20>
-    15f0:	10 92 be 20 	sts	0x20BE, r1	; 0x8020be <udc_num_configuration>
-    15f4:	10 92 c2 20 	sts	0x20C2, r1	; 0x8020c2 <udc_device_status>
-    15f8:	10 92 c3 20 	sts	0x20C3, r1	; 0x8020c3 <udc_device_status+0x1>
-    15fc:	cf 91       	pop	r28
-    15fe:	08 95       	ret
+000015cc <udc_reset>:
+    15cc:	cf 93       	push	r28
+    15ce:	80 91 be 20 	lds	r24, 0x20BE	; 0x8020be <udc_num_configuration>
+    15d2:	88 23       	and	r24, r24
+    15d4:	c1 f0       	breq	.+48     	; 0x1606 <udc_reset+0x3a>
+    15d6:	e0 91 bc 20 	lds	r30, 0x20BC	; 0x8020bc <udc_ptr_conf>
+    15da:	f0 91 bd 20 	lds	r31, 0x20BD	; 0x8020bd <udc_ptr_conf+0x1>
+    15de:	01 90       	ld	r0, Z+
+    15e0:	f0 81       	ld	r31, Z
+    15e2:	e0 2d       	mov	r30, r0
+    15e4:	84 81       	ldd	r24, Z+4	; 0x04
+    15e6:	88 23       	and	r24, r24
+    15e8:	71 f0       	breq	.+28     	; 0x1606 <udc_reset+0x3a>
+    15ea:	c0 e0       	ldi	r28, 0x00	; 0
+    15ec:	8c 2f       	mov	r24, r28
+    15ee:	73 df       	rcall	.-282    	; 0x14d6 <udc_iface_disable>
+    15f0:	cf 5f       	subi	r28, 0xFF	; 255
+    15f2:	e0 91 bc 20 	lds	r30, 0x20BC	; 0x8020bc <udc_ptr_conf>
+    15f6:	f0 91 bd 20 	lds	r31, 0x20BD	; 0x8020bd <udc_ptr_conf+0x1>
+    15fa:	01 90       	ld	r0, Z+
+    15fc:	f0 81       	ld	r31, Z
+    15fe:	e0 2d       	mov	r30, r0
+    1600:	84 81       	ldd	r24, Z+4	; 0x04
+    1602:	c8 17       	cp	r28, r24
+    1604:	98 f3       	brcs	.-26     	; 0x15ec <udc_reset+0x20>
+    1606:	10 92 be 20 	sts	0x20BE, r1	; 0x8020be <udc_num_configuration>
+    160a:	10 92 c2 20 	sts	0x20C2, r1	; 0x8020c2 <udc_device_status>
+    160e:	10 92 c3 20 	sts	0x20C3, r1	; 0x8020c3 <udc_device_status+0x1>
+    1612:	cf 91       	pop	r28
+    1614:	08 95       	ret
 
-00001600 <udc_sof_notify>:
+00001616 <udc_sof_notify>:
 			CPU_TO_LE16(USB_DEV_STATUS_BUS_POWERED);
 #endif
 }
 
 void udc_sof_notify(void)
 {
-    1600:	cf 93       	push	r28
+    1616:	cf 93       	push	r28
 	uint8_t iface_num;
 
 	if (udc_num_configuration) {
-    1602:	80 91 be 20 	lds	r24, 0x20BE	; 0x8020be <udc_num_configuration>
-    1606:	88 23       	and	r24, r24
-    1608:	49 f1       	breq	.+82     	; 0x165c <udc_sof_notify+0x5c>
+    1618:	80 91 be 20 	lds	r24, 0x20BE	; 0x8020be <udc_num_configuration>
+    161c:	88 23       	and	r24, r24
+    161e:	49 f1       	breq	.+82     	; 0x1672 <udc_sof_notify+0x5c>
 		for (iface_num = 0;
 				iface_num < udc_ptr_conf->desc->bNumInterfaces;
-    160a:	a0 91 bc 20 	lds	r26, 0x20BC	; 0x8020bc <udc_ptr_conf>
-    160e:	b0 91 bd 20 	lds	r27, 0x20BD	; 0x8020bd <udc_ptr_conf+0x1>
-    1612:	ed 91       	ld	r30, X+
-    1614:	fc 91       	ld	r31, X
-    1616:	11 97       	sbiw	r26, 0x01	; 1
+    1620:	a0 91 bc 20 	lds	r26, 0x20BC	; 0x8020bc <udc_ptr_conf>
+    1624:	b0 91 bd 20 	lds	r27, 0x20BD	; 0x8020bd <udc_ptr_conf+0x1>
+    1628:	ed 91       	ld	r30, X+
+    162a:	fc 91       	ld	r31, X
+    162c:	11 97       	sbiw	r26, 0x01	; 1
 void udc_sof_notify(void)
 {
 	uint8_t iface_num;
 
 	if (udc_num_configuration) {
 		for (iface_num = 0;
-    1618:	84 81       	ldd	r24, Z+4	; 0x04
-    161a:	88 23       	and	r24, r24
-    161c:	f9 f0       	breq	.+62     	; 0x165c <udc_sof_notify+0x5c>
-    161e:	c0 e0       	ldi	r28, 0x00	; 0
+    162e:	84 81       	ldd	r24, Z+4	; 0x04
+    1630:	88 23       	and	r24, r24
+    1632:	f9 f0       	breq	.+62     	; 0x1672 <udc_sof_notify+0x5c>
+    1634:	c0 e0       	ldi	r28, 0x00	; 0
 				iface_num < udc_ptr_conf->desc->bNumInterfaces;
 				iface_num++) {
 			if (udc_ptr_conf->udi_apis[iface_num]->sof_notify != NULL) {
-    1620:	ec 2f       	mov	r30, r28
-    1622:	f0 e0       	ldi	r31, 0x00	; 0
-    1624:	ee 0f       	add	r30, r30
-    1626:	ff 1f       	adc	r31, r31
-    1628:	12 96       	adiw	r26, 0x02	; 2
-    162a:	8d 91       	ld	r24, X+
-    162c:	9c 91       	ld	r25, X
-    162e:	13 97       	sbiw	r26, 0x03	; 3
-    1630:	e8 0f       	add	r30, r24
-    1632:	f9 1f       	adc	r31, r25
-    1634:	01 90       	ld	r0, Z+
-    1636:	f0 81       	ld	r31, Z
-    1638:	e0 2d       	mov	r30, r0
-    163a:	00 84       	ldd	r0, Z+8	; 0x08
-    163c:	f1 85       	ldd	r31, Z+9	; 0x09
-    163e:	e0 2d       	mov	r30, r0
-    1640:	30 97       	sbiw	r30, 0x00	; 0
-    1642:	09 f0       	breq	.+2      	; 0x1646 <udc_sof_notify+0x46>
+    1636:	ec 2f       	mov	r30, r28
+    1638:	f0 e0       	ldi	r31, 0x00	; 0
+    163a:	ee 0f       	add	r30, r30
+    163c:	ff 1f       	adc	r31, r31
+    163e:	12 96       	adiw	r26, 0x02	; 2
+    1640:	8d 91       	ld	r24, X+
+    1642:	9c 91       	ld	r25, X
+    1644:	13 97       	sbiw	r26, 0x03	; 3
+    1646:	e8 0f       	add	r30, r24
+    1648:	f9 1f       	adc	r31, r25
+    164a:	01 90       	ld	r0, Z+
+    164c:	f0 81       	ld	r31, Z
+    164e:	e0 2d       	mov	r30, r0
+    1650:	00 84       	ldd	r0, Z+8	; 0x08
+    1652:	f1 85       	ldd	r31, Z+9	; 0x09
+    1654:	e0 2d       	mov	r30, r0
+    1656:	30 97       	sbiw	r30, 0x00	; 0
+    1658:	09 f0       	breq	.+2      	; 0x165c <udc_sof_notify+0x46>
 				udc_ptr_conf->udi_apis[iface_num]->sof_notify();
-    1644:	09 95       	icall
+    165a:	09 95       	icall
 	uint8_t iface_num;
 
 	if (udc_num_configuration) {
 		for (iface_num = 0;
 				iface_num < udc_ptr_conf->desc->bNumInterfaces;
 				iface_num++) {
-    1646:	cf 5f       	subi	r28, 0xFF	; 255
+    165c:	cf 5f       	subi	r28, 0xFF	; 255
 {
 	uint8_t iface_num;
 
 	if (udc_num_configuration) {
 		for (iface_num = 0;
 				iface_num < udc_ptr_conf->desc->bNumInterfaces;
-    1648:	a0 91 bc 20 	lds	r26, 0x20BC	; 0x8020bc <udc_ptr_conf>
-    164c:	b0 91 bd 20 	lds	r27, 0x20BD	; 0x8020bd <udc_ptr_conf+0x1>
-    1650:	ed 91       	ld	r30, X+
-    1652:	fc 91       	ld	r31, X
-    1654:	11 97       	sbiw	r26, 0x01	; 1
+    165e:	a0 91 bc 20 	lds	r26, 0x20BC	; 0x8020bc <udc_ptr_conf>
+    1662:	b0 91 bd 20 	lds	r27, 0x20BD	; 0x8020bd <udc_ptr_conf+0x1>
+    1666:	ed 91       	ld	r30, X+
+    1668:	fc 91       	ld	r31, X
+    166a:	11 97       	sbiw	r26, 0x01	; 1
 void udc_sof_notify(void)
 {
 	uint8_t iface_num;
 
 	if (udc_num_configuration) {
 		for (iface_num = 0;
-    1656:	84 81       	ldd	r24, Z+4	; 0x04
-    1658:	c8 17       	cp	r28, r24
-    165a:	10 f3       	brcs	.-60     	; 0x1620 <udc_sof_notify+0x20>
+    166c:	84 81       	ldd	r24, Z+4	; 0x04
+    166e:	c8 17       	cp	r28, r24
+    1670:	10 f3       	brcs	.-60     	; 0x1636 <udc_sof_notify+0x20>
 			if (udc_ptr_conf->udi_apis[iface_num]->sof_notify != NULL) {
 				udc_ptr_conf->udi_apis[iface_num]->sof_notify();
 			}
 		}
 	}
 }
-    165c:	cf 91       	pop	r28
-    165e:	08 95       	ret
+    1672:	cf 91       	pop	r28
+    1674:	08 95       	ret
 
-00001660 <udc_process_setup>:
+00001676 <udc_process_setup>:
  * sent to a specific application callback.
  *
  * \return true if the request is supported, else the request is stalled by UDD
  */
 bool udc_process_setup(void)
 {
-    1660:	0f 93       	push	r16
-    1662:	1f 93       	push	r17
-    1664:	cf 93       	push	r28
-    1666:	df 93       	push	r29
+    1676:	0f 93       	push	r16
+    1678:	1f 93       	push	r17
+    167a:	cf 93       	push	r28
+    167c:	df 93       	push	r29
 	// By default no data (receive/send) and no callbacks registered
 	udd_g_ctrlreq.payload_size = 0;
-    1668:	ea e5       	ldi	r30, 0x5A	; 90
-    166a:	f4 e2       	ldi	r31, 0x24	; 36
-    166c:	12 86       	std	Z+10, r1	; 0x0a
-    166e:	13 86       	std	Z+11, r1	; 0x0b
+    167e:	ea e5       	ldi	r30, 0x5A	; 90
+    1680:	f4 e2       	ldi	r31, 0x24	; 36
+    1682:	12 86       	std	Z+10, r1	; 0x0a
+    1684:	13 86       	std	Z+11, r1	; 0x0b
 	udd_g_ctrlreq.callback = NULL;
-    1670:	14 86       	std	Z+12, r1	; 0x0c
-    1672:	15 86       	std	Z+13, r1	; 0x0d
+    1686:	14 86       	std	Z+12, r1	; 0x0c
+    1688:	15 86       	std	Z+13, r1	; 0x0d
 	udd_g_ctrlreq.over_under_run = NULL;
-    1674:	16 86       	std	Z+14, r1	; 0x0e
-    1676:	17 86       	std	Z+15, r1	; 0x0f
+    168a:	16 86       	std	Z+14, r1	; 0x0e
+    168c:	17 86       	std	Z+15, r1	; 0x0f
 
 	if (Udd_setup_is_in()) {
-    1678:	80 81       	ld	r24, Z
-    167a:	88 23       	and	r24, r24
-    167c:	3c f4       	brge	.+14     	; 0x168c <udc_process_setup+0x2c>
+    168e:	80 81       	ld	r24, Z
+    1690:	88 23       	and	r24, r24
+    1692:	3c f4       	brge	.+14     	; 0x16a2 <udc_process_setup+0x2c>
 		if (udd_g_ctrlreq.req.wLength == 0) {
-    167e:	20 91 60 24 	lds	r18, 0x2460	; 0x802460 <udd_g_ctrlreq+0x6>
-    1682:	30 91 61 24 	lds	r19, 0x2461	; 0x802461 <udd_g_ctrlreq+0x7>
-    1686:	23 2b       	or	r18, r19
-    1688:	09 f4       	brne	.+2      	; 0x168c <udc_process_setup+0x2c>
-    168a:	68 c3       	rjmp	.+1744   	; 0x1d5c <udc_process_setup+0x6fc>
+    1694:	20 91 60 24 	lds	r18, 0x2460	; 0x802460 <udd_g_ctrlreq+0x6>
+    1698:	30 91 61 24 	lds	r19, 0x2461	; 0x802461 <udd_g_ctrlreq+0x7>
+    169c:	23 2b       	or	r18, r19
+    169e:	09 f4       	brne	.+2      	; 0x16a2 <udc_process_setup+0x2c>
+    16a0:	68 c3       	rjmp	.+1744   	; 0x1d72 <udc_process_setup+0x6fc>
 			return false; // Error from USB host
 		}
 	}
 	
 	if (Udd_setup_type() == USB_REQ_TYPE_VENDOR){
-    168c:	80 76       	andi	r24, 0x60	; 96
-    168e:	80 34       	cpi	r24, 0x40	; 64
-    1690:	09 f0       	breq	.+2      	; 0x1694 <udc_process_setup+0x34>
-    1692:	06 c1       	rjmp	.+524    	; 0x18a0 <udc_process_setup+0x240>
+    16a2:	80 76       	andi	r24, 0x60	; 96
+    16a4:	80 34       	cpi	r24, 0x40	; 64
+    16a6:	09 f0       	breq	.+2      	; 0x16aa <udc_process_setup+0x34>
+    16a8:	06 c1       	rjmp	.+524    	; 0x18b6 <udc_process_setup+0x240>
 	}
 	return false;
 }
 
 static bool udc_reqvend(void){
 	switch (udd_g_ctrlreq.req.bRequest){
-    1694:	e0 91 5b 24 	lds	r30, 0x245B	; 0x80245b <udd_g_ctrlreq+0x1>
-    1698:	8e 2f       	mov	r24, r30
-    169a:	90 e0       	ldi	r25, 0x00	; 0
-    169c:	fc 01       	movw	r30, r24
-    169e:	e0 5a       	subi	r30, 0xA0	; 160
-    16a0:	f1 09       	sbc	r31, r1
-    16a2:	e8 30       	cpi	r30, 0x08	; 8
-    16a4:	f1 05       	cpc	r31, r1
-    16a6:	08 f0       	brcs	.+2      	; 0x16aa <udc_process_setup+0x4a>
-    16a8:	f2 c0       	rjmp	.+484    	; 0x188e <udc_process_setup+0x22e>
-    16aa:	e2 5f       	subi	r30, 0xF2	; 242
-    16ac:	fe 4f       	sbci	r31, 0xFE	; 254
-    16ae:	0c 94 32 16 	jmp	0x2c64	; 0x2c64 <__tablejump2__>
+    16aa:	e0 91 5b 24 	lds	r30, 0x245B	; 0x80245b <udd_g_ctrlreq+0x1>
+    16ae:	8e 2f       	mov	r24, r30
+    16b0:	90 e0       	ldi	r25, 0x00	; 0
+    16b2:	fc 01       	movw	r30, r24
+    16b4:	e0 5a       	subi	r30, 0xA0	; 160
+    16b6:	f1 09       	sbc	r31, r1
+    16b8:	e8 30       	cpi	r30, 0x08	; 8
+    16ba:	f1 05       	cpc	r31, r1
+    16bc:	08 f0       	brcs	.+2      	; 0x16c0 <udc_process_setup+0x4a>
+    16be:	f2 c0       	rjmp	.+484    	; 0x18a4 <udc_process_setup+0x22e>
+    16c0:	e2 5f       	subi	r30, 0xF2	; 242
+    16c2:	fe 4f       	sbci	r31, 0xFE	; 254
+    16c4:	0c 94 3d 16 	jmp	0x2c7a	; 0x2c7a <__tablejump2__>
 		case 0xa0: //Break!  (Debug command)
 			asm("nop");
-    16b2:	00 00       	nop
-    16b4:	57 c3       	rjmp	.+1710   	; 0x1d64 <udc_process_setup+0x704>
+    16c8:	00 00       	nop
+    16ca:	57 c3       	rjmp	.+1710   	; 0x1d7a <udc_process_setup+0x704>
 			return 1;
 		case 0xa1: //Receive waveform for signal gen
 			TC_DAC.CTRLA = 0x00;
-    16b6:	e0 e0       	ldi	r30, 0x00	; 0
-    16b8:	f8 e0       	ldi	r31, 0x08	; 8
-    16ba:	10 82       	st	Z, r1
+    16cc:	e0 e0       	ldi	r30, 0x00	; 0
+    16ce:	f8 e0       	ldi	r31, 0x08	; 8
+    16d0:	10 82       	st	Z, r1
 			TC_DAC.PERBUF = udd_g_ctrlreq.req.wValue;
-    16bc:	ca e5       	ldi	r28, 0x5A	; 90
-    16be:	d4 e2       	ldi	r29, 0x24	; 36
-    16c0:	8a 81       	ldd	r24, Y+2	; 0x02
-    16c2:	9b 81       	ldd	r25, Y+3	; 0x03
-    16c4:	86 ab       	std	Z+54, r24	; 0x36
-    16c6:	97 ab       	std	Z+55, r25	; 0x37
+    16d2:	ca e5       	ldi	r28, 0x5A	; 90
+    16d4:	d4 e2       	ldi	r29, 0x24	; 36
+    16d6:	8a 81       	ldd	r24, Y+2	; 0x02
+    16d8:	9b 81       	ldd	r25, Y+3	; 0x03
+    16da:	86 ab       	std	Z+54, r24	; 0x36
+    16dc:	97 ab       	std	Z+55, r25	; 0x37
 			TC_DAC.CTRLA = (unsigned char) udd_g_ctrlreq.req.wIndex & 0x0F;
-    16c8:	8c 81       	ldd	r24, Y+4	; 0x04
-    16ca:	8f 70       	andi	r24, 0x0F	; 15
-    16cc:	80 83       	st	Z, r24
+    16de:	8c 81       	ldd	r24, Y+4	; 0x04
+    16e0:	8f 70       	andi	r24, 0x0F	; 15
+    16e2:	80 83       	st	Z, r24
 			udd_set_setup_payload(dacBuf_CH1, udd_g_ctrlreq.req.wLength);
-    16ce:	6e 81       	ldd	r22, Y+6	; 0x06
-    16d0:	7f 81       	ldd	r23, Y+7	; 0x07
-    16d2:	8a e5       	ldi	r24, 0x5A	; 90
-    16d4:	92 e2       	ldi	r25, 0x22	; 34
-    16d6:	f6 d6       	rcall	.+3564   	; 0x24c4 <udd_set_setup_payload>
+    16e4:	6e 81       	ldd	r22, Y+6	; 0x06
+    16e6:	7f 81       	ldd	r23, Y+7	; 0x07
+    16e8:	8a e5       	ldi	r24, 0x5A	; 90
+    16ea:	92 e2       	ldi	r25, 0x22	; 34
+    16ec:	f6 d6       	rcall	.+3564   	; 0x24da <udd_set_setup_payload>
 			if(dacBuf_len != udd_g_ctrlreq.req.wLength){
-    16d8:	8e 81       	ldd	r24, Y+6	; 0x06
-    16da:	9f 81       	ldd	r25, Y+7	; 0x07
-    16dc:	20 91 04 20 	lds	r18, 0x2004	; 0x802004 <dacBuf_len>
-    16e0:	30 91 05 20 	lds	r19, 0x2005	; 0x802005 <dacBuf_len+0x1>
-    16e4:	82 17       	cp	r24, r18
-    16e6:	93 07       	cpc	r25, r19
-    16e8:	09 f4       	brne	.+2      	; 0x16ec <udc_process_setup+0x8c>
-    16ea:	3c c3       	rjmp	.+1656   	; 0x1d64 <udc_process_setup+0x704>
+    16ee:	8e 81       	ldd	r24, Y+6	; 0x06
+    16f0:	9f 81       	ldd	r25, Y+7	; 0x07
+    16f2:	20 91 04 20 	lds	r18, 0x2004	; 0x802004 <dacBuf_len>
+    16f6:	30 91 05 20 	lds	r19, 0x2005	; 0x802005 <dacBuf_len+0x1>
+    16fa:	82 17       	cp	r24, r18
+    16fc:	93 07       	cpc	r25, r19
+    16fe:	09 f4       	brne	.+2      	; 0x1702 <udc_process_setup+0x8c>
+    1700:	3c c3       	rjmp	.+1656   	; 0x1d7a <udc_process_setup+0x704>
 				dacBuf_len = udd_g_ctrlreq.req.wLength;
-    16ec:	80 93 04 20 	sts	0x2004, r24	; 0x802004 <dacBuf_len>
-    16f0:	90 93 05 20 	sts	0x2005, r25	; 0x802005 <dacBuf_len+0x1>
+    1702:	80 93 04 20 	sts	0x2004, r24	; 0x802004 <dacBuf_len>
+    1706:	90 93 05 20 	sts	0x2005, r25	; 0x802005 <dacBuf_len+0x1>
 				switch(global_mode){
-    16f4:	e0 91 00 20 	lds	r30, 0x2000	; 0x802000 <__data_start>
-    16f8:	8e 2f       	mov	r24, r30
-    16fa:	90 e0       	ldi	r25, 0x00	; 0
-    16fc:	88 30       	cpi	r24, 0x08	; 8
-    16fe:	91 05       	cpc	r25, r1
-    1700:	08 f0       	brcs	.+2      	; 0x1704 <udc_process_setup+0xa4>
-    1702:	c7 c0       	rjmp	.+398    	; 0x1892 <udc_process_setup+0x232>
-    1704:	fc 01       	movw	r30, r24
-    1706:	ea 5e       	subi	r30, 0xEA	; 234
-    1708:	fe 4f       	sbci	r31, 0xFE	; 254
-    170a:	0c 94 32 16 	jmp	0x2c64	; 0x2c64 <__tablejump2__>
+    170a:	e0 91 00 20 	lds	r30, 0x2000	; 0x802000 <__data_start>
+    170e:	8e 2f       	mov	r24, r30
+    1710:	90 e0       	ldi	r25, 0x00	; 0
+    1712:	88 30       	cpi	r24, 0x08	; 8
+    1714:	91 05       	cpc	r25, r1
+    1716:	08 f0       	brcs	.+2      	; 0x171a <udc_process_setup+0xa4>
+    1718:	c7 c0       	rjmp	.+398    	; 0x18a8 <udc_process_setup+0x232>
+    171a:	fc 01       	movw	r30, r24
+    171c:	ea 5e       	subi	r30, 0xEA	; 234
+    171e:	fe 4f       	sbci	r31, 0xFE	; 254
+    1720:	0c 94 3d 16 	jmp	0x2c7a	; 0x2c7a <__tablejump2__>
 					case 0:
 					tiny_dma_set_mode_0();
-    170e:	0e 94 aa 02 	call	0x554	; 0x554 <tiny_dma_set_mode_0>
-    1712:	28 c3       	rjmp	.+1616   	; 0x1d64 <udc_process_setup+0x704>
+    1724:	0e 94 b0 02 	call	0x560	; 0x560 <tiny_dma_set_mode_0>
+    1728:	28 c3       	rjmp	.+1616   	; 0x1d7a <udc_process_setup+0x704>
 					break;
 					case 1:
 					tiny_dma_set_mode_1();
-    1714:	0e 94 1e 03 	call	0x63c	; 0x63c <tiny_dma_set_mode_1>
-    1718:	25 c3       	rjmp	.+1610   	; 0x1d64 <udc_process_setup+0x704>
+    172a:	0e 94 24 03 	call	0x648	; 0x648 <tiny_dma_set_mode_1>
+    172e:	25 c3       	rjmp	.+1610   	; 0x1d7a <udc_process_setup+0x704>
 					break;
 					case 2:
 					tiny_dma_set_mode_2();
-    171a:	09 d8       	rcall	.-4078   	; 0x72e <tiny_dma_set_mode_2>
-    171c:	23 c3       	rjmp	.+1606   	; 0x1d64 <udc_process_setup+0x704>
+    1730:	04 d8       	rcall	.-4088   	; 0x73a <tiny_dma_set_mode_2>
+    1732:	23 c3       	rjmp	.+1606   	; 0x1d7a <udc_process_setup+0x704>
 					break;
 					case 3:
 					tiny_dma_set_mode_3();
-    171e:	7b d8       	rcall	.-3850   	; 0x816 <tiny_dma_set_mode_3>
-    1720:	21 c3       	rjmp	.+1602   	; 0x1d64 <udc_process_setup+0x704>
+    1734:	76 d8       	rcall	.-3860   	; 0x822 <tiny_dma_set_mode_3>
+    1736:	21 c3       	rjmp	.+1602   	; 0x1d7a <udc_process_setup+0x704>
 					break;
 					case 4:
 					tiny_dma_set_mode_4();
-    1722:	f6 d8       	rcall	.-3604   	; 0x910 <tiny_dma_set_mode_4>
-    1724:	1f c3       	rjmp	.+1598   	; 0x1d64 <udc_process_setup+0x704>
+    1738:	f1 d8       	rcall	.-3614   	; 0x91c <tiny_dma_set_mode_4>
+    173a:	1f c3       	rjmp	.+1598   	; 0x1d7a <udc_process_setup+0x704>
 					break;
 					case 5:
 					tiny_dma_set_mode_5();
-    1726:	6b d9       	rcall	.-3370   	; 0x9fe <tiny_dma_set_mode_5>
-    1728:	1d c3       	rjmp	.+1594   	; 0x1d64 <udc_process_setup+0x704>
+    173c:	66 d9       	rcall	.-3380   	; 0xa0a <tiny_dma_set_mode_5>
+    173e:	1d c3       	rjmp	.+1594   	; 0x1d7a <udc_process_setup+0x704>
 					break;
 					case 6:
 					tiny_dma_set_mode_6();
-    172a:	b1 d9       	rcall	.-3230   	; 0xa8e <tiny_dma_set_mode_6>
-    172c:	1b c3       	rjmp	.+1590   	; 0x1d64 <udc_process_setup+0x704>
+    1740:	ac d9       	rcall	.-3240   	; 0xa9a <tiny_dma_set_mode_6>
+    1742:	1b c3       	rjmp	.+1590   	; 0x1d7a <udc_process_setup+0x704>
 					break;
 					case 7:
 					tiny_dma_set_mode_7();
-    172e:	12 da       	rcall	.-3036   	; 0xb54 <tiny_dma_set_mode_7>
-    1730:	19 c3       	rjmp	.+1586   	; 0x1d64 <udc_process_setup+0x704>
+    1744:	0d da       	rcall	.-3046   	; 0xb60 <tiny_dma_set_mode_7>
+    1746:	19 c3       	rjmp	.+1586   	; 0x1d7a <udc_process_setup+0x704>
 					break;
 				}
 			}
 			return 1;
 		case 0xa2: //CH2 waveform
 			TC_AUXDAC.CTRLA = 0x00;
-    1732:	e0 e4       	ldi	r30, 0x40	; 64
-    1734:	f8 e0       	ldi	r31, 0x08	; 8
-    1736:	10 82       	st	Z, r1
+    1748:	e0 e4       	ldi	r30, 0x40	; 64
+    174a:	f8 e0       	ldi	r31, 0x08	; 8
+    174c:	10 82       	st	Z, r1
 			TC_AUXDAC.PERBUF = udd_g_ctrlreq.req.wValue;
-    1738:	ca e5       	ldi	r28, 0x5A	; 90
-    173a:	d4 e2       	ldi	r29, 0x24	; 36
-    173c:	8a 81       	ldd	r24, Y+2	; 0x02
-    173e:	9b 81       	ldd	r25, Y+3	; 0x03
-    1740:	86 ab       	std	Z+54, r24	; 0x36
-    1742:	97 ab       	std	Z+55, r25	; 0x37
+    174e:	ca e5       	ldi	r28, 0x5A	; 90
+    1750:	d4 e2       	ldi	r29, 0x24	; 36
+    1752:	8a 81       	ldd	r24, Y+2	; 0x02
+    1754:	9b 81       	ldd	r25, Y+3	; 0x03
+    1756:	86 ab       	std	Z+54, r24	; 0x36
+    1758:	97 ab       	std	Z+55, r25	; 0x37
 			TC_AUXDAC.CTRLA = (unsigned char) udd_g_ctrlreq.req.wIndex & 0x0F;
-    1744:	8c 81       	ldd	r24, Y+4	; 0x04
-    1746:	8f 70       	andi	r24, 0x0F	; 15
-    1748:	80 83       	st	Z, r24
+    175a:	8c 81       	ldd	r24, Y+4	; 0x04
+    175c:	8f 70       	andi	r24, 0x0F	; 15
+    175e:	80 83       	st	Z, r24
 			udd_set_setup_payload(dacBuf_CH2, udd_g_ctrlreq.req.wLength);
-    174a:	6e 81       	ldd	r22, Y+6	; 0x06
-    174c:	7f 81       	ldd	r23, Y+7	; 0x07
-    174e:	8a e6       	ldi	r24, 0x6A	; 106
-    1750:	94 e2       	ldi	r25, 0x24	; 36
-    1752:	b8 d6       	rcall	.+3440   	; 0x24c4 <udd_set_setup_payload>
+    1760:	6e 81       	ldd	r22, Y+6	; 0x06
+    1762:	7f 81       	ldd	r23, Y+7	; 0x07
+    1764:	8a e6       	ldi	r24, 0x6A	; 106
+    1766:	94 e2       	ldi	r25, 0x24	; 36
+    1768:	b8 d6       	rcall	.+3440   	; 0x24da <udd_set_setup_payload>
 			if(auxDacBufLen != udd_g_ctrlreq.req.wLength){
-    1754:	8e 81       	ldd	r24, Y+6	; 0x06
-    1756:	9f 81       	ldd	r25, Y+7	; 0x07
-    1758:	20 91 02 20 	lds	r18, 0x2002	; 0x802002 <auxDacBufLen>
-    175c:	30 91 03 20 	lds	r19, 0x2003	; 0x802003 <auxDacBufLen+0x1>
-    1760:	82 17       	cp	r24, r18
-    1762:	93 07       	cpc	r25, r19
-    1764:	09 f4       	brne	.+2      	; 0x1768 <udc_process_setup+0x108>
-    1766:	fe c2       	rjmp	.+1532   	; 0x1d64 <udc_process_setup+0x704>
+    176a:	8e 81       	ldd	r24, Y+6	; 0x06
+    176c:	9f 81       	ldd	r25, Y+7	; 0x07
+    176e:	20 91 02 20 	lds	r18, 0x2002	; 0x802002 <auxDacBufLen>
+    1772:	30 91 03 20 	lds	r19, 0x2003	; 0x802003 <auxDacBufLen+0x1>
+    1776:	82 17       	cp	r24, r18
+    1778:	93 07       	cpc	r25, r19
+    177a:	09 f4       	brne	.+2      	; 0x177e <udc_process_setup+0x108>
+    177c:	fe c2       	rjmp	.+1532   	; 0x1d7a <udc_process_setup+0x704>
 				auxDacBufLen = udd_g_ctrlreq.req.wLength;
-    1768:	80 93 02 20 	sts	0x2002, r24	; 0x802002 <auxDacBufLen>
-    176c:	90 93 03 20 	sts	0x2003, r25	; 0x802003 <auxDacBufLen+0x1>
+    177e:	80 93 02 20 	sts	0x2002, r24	; 0x802002 <auxDacBufLen>
+    1782:	90 93 03 20 	sts	0x2003, r25	; 0x802003 <auxDacBufLen+0x1>
 				switch(global_mode){
-    1770:	e0 91 00 20 	lds	r30, 0x2000	; 0x802000 <__data_start>
-    1774:	8e 2f       	mov	r24, r30
-    1776:	90 e0       	ldi	r25, 0x00	; 0
-    1778:	88 30       	cpi	r24, 0x08	; 8
-    177a:	91 05       	cpc	r25, r1
-    177c:	08 f0       	brcs	.+2      	; 0x1780 <udc_process_setup+0x120>
-    177e:	8b c0       	rjmp	.+278    	; 0x1896 <udc_process_setup+0x236>
-    1780:	fc 01       	movw	r30, r24
-    1782:	e2 5e       	subi	r30, 0xE2	; 226
-    1784:	fe 4f       	sbci	r31, 0xFE	; 254
-    1786:	0c 94 32 16 	jmp	0x2c64	; 0x2c64 <__tablejump2__>
+    1786:	e0 91 00 20 	lds	r30, 0x2000	; 0x802000 <__data_start>
+    178a:	8e 2f       	mov	r24, r30
+    178c:	90 e0       	ldi	r25, 0x00	; 0
+    178e:	88 30       	cpi	r24, 0x08	; 8
+    1790:	91 05       	cpc	r25, r1
+    1792:	08 f0       	brcs	.+2      	; 0x1796 <udc_process_setup+0x120>
+    1794:	8b c0       	rjmp	.+278    	; 0x18ac <udc_process_setup+0x236>
+    1796:	fc 01       	movw	r30, r24
+    1798:	e2 5e       	subi	r30, 0xE2	; 226
+    179a:	fe 4f       	sbci	r31, 0xFE	; 254
+    179c:	0c 94 3d 16 	jmp	0x2c7a	; 0x2c7a <__tablejump2__>
 					case 0:
 					tiny_dma_set_mode_0();
-    178a:	0e 94 aa 02 	call	0x554	; 0x554 <tiny_dma_set_mode_0>
-    178e:	ea c2       	rjmp	.+1492   	; 0x1d64 <udc_process_setup+0x704>
+    17a0:	0e 94 b0 02 	call	0x560	; 0x560 <tiny_dma_set_mode_0>
+    17a4:	ea c2       	rjmp	.+1492   	; 0x1d7a <udc_process_setup+0x704>
 					break;
 					case 1:
 					tiny_dma_set_mode_1();
-    1790:	0e 94 1e 03 	call	0x63c	; 0x63c <tiny_dma_set_mode_1>
-    1794:	e7 c2       	rjmp	.+1486   	; 0x1d64 <udc_process_setup+0x704>
+    17a6:	0e 94 24 03 	call	0x648	; 0x648 <tiny_dma_set_mode_1>
+    17aa:	e7 c2       	rjmp	.+1486   	; 0x1d7a <udc_process_setup+0x704>
 					break;
 					case 2:
 					tiny_dma_set_mode_2();
-    1796:	0e 94 97 03 	call	0x72e	; 0x72e <tiny_dma_set_mode_2>
-    179a:	e4 c2       	rjmp	.+1480   	; 0x1d64 <udc_process_setup+0x704>
+    17ac:	0e 94 9d 03 	call	0x73a	; 0x73a <tiny_dma_set_mode_2>
+    17b0:	e4 c2       	rjmp	.+1480   	; 0x1d7a <udc_process_setup+0x704>
 					break;
 					case 3:
 					tiny_dma_set_mode_3();
-    179c:	3c d8       	rcall	.-3976   	; 0x816 <tiny_dma_set_mode_3>
-    179e:	e2 c2       	rjmp	.+1476   	; 0x1d64 <udc_process_setup+0x704>
+    17b2:	37 d8       	rcall	.-3986   	; 0x822 <tiny_dma_set_mode_3>
+    17b4:	e2 c2       	rjmp	.+1476   	; 0x1d7a <udc_process_setup+0x704>
 					break;
 					case 4:
 					tiny_dma_set_mode_4();
-    17a0:	b7 d8       	rcall	.-3730   	; 0x910 <tiny_dma_set_mode_4>
-    17a2:	e0 c2       	rjmp	.+1472   	; 0x1d64 <udc_process_setup+0x704>
+    17b6:	b2 d8       	rcall	.-3740   	; 0x91c <tiny_dma_set_mode_4>
+    17b8:	e0 c2       	rjmp	.+1472   	; 0x1d7a <udc_process_setup+0x704>
 					break;
 					case 5:
 					tiny_dma_set_mode_5();
-    17a4:	2c d9       	rcall	.-3496   	; 0x9fe <tiny_dma_set_mode_5>
-    17a6:	de c2       	rjmp	.+1468   	; 0x1d64 <udc_process_setup+0x704>
+    17ba:	27 d9       	rcall	.-3506   	; 0xa0a <tiny_dma_set_mode_5>
+    17bc:	de c2       	rjmp	.+1468   	; 0x1d7a <udc_process_setup+0x704>
 					break;
 					case 6:
 					tiny_dma_set_mode_6();
-    17a8:	72 d9       	rcall	.-3356   	; 0xa8e <tiny_dma_set_mode_6>
-    17aa:	dc c2       	rjmp	.+1464   	; 0x1d64 <udc_process_setup+0x704>
+    17be:	6d d9       	rcall	.-3366   	; 0xa9a <tiny_dma_set_mode_6>
+    17c0:	dc c2       	rjmp	.+1464   	; 0x1d7a <udc_process_setup+0x704>
 					break;
 					case 7:
 					tiny_dma_set_mode_7();
-    17ac:	d3 d9       	rcall	.-3162   	; 0xb54 <tiny_dma_set_mode_7>
-    17ae:	da c2       	rjmp	.+1460   	; 0x1d64 <udc_process_setup+0x704>
+    17c2:	ce d9       	rcall	.-3172   	; 0xb60 <tiny_dma_set_mode_7>
+    17c4:	da c2       	rjmp	.+1460   	; 0x1d7a <udc_process_setup+0x704>
 					break;
 				}
 			}
 			return 1;
 		case 0xa3: //PSU voltage control
 			TC_PSU.CCA = 0;
-    17b0:	10 92 68 09 	sts	0x0968, r1	; 0x800968 <__TEXT_REGION_LENGTH__+0x700968>
-    17b4:	10 92 69 09 	sts	0x0969, r1	; 0x800969 <__TEXT_REGION_LENGTH__+0x700969>
+    17c6:	10 92 68 09 	sts	0x0968, r1	; 0x800968 <__TEXT_REGION_LENGTH__+0x700968>
+    17ca:	10 92 69 09 	sts	0x0969, r1	; 0x800969 <__TEXT_REGION_LENGTH__+0x700969>
 			PSU_target = udd_g_ctrlreq.req.wValue;
-    17b8:	80 91 5c 24 	lds	r24, 0x245C	; 0x80245c <udd_g_ctrlreq+0x2>
-    17bc:	80 93 b2 20 	sts	0x20B2, r24	; 0x8020b2 <__data_end>
-    17c0:	d1 c2       	rjmp	.+1442   	; 0x1d64 <udc_process_setup+0x704>
+    17ce:	80 91 5c 24 	lds	r24, 0x245C	; 0x80245c <udd_g_ctrlreq+0x2>
+    17d2:	80 93 b2 20 	sts	0x20B2, r24	; 0x8020b2 <__data_end>
+    17d6:	d1 c2       	rjmp	.+1442   	; 0x1d7a <udc_process_setup+0x704>
 			return 1;
 		case 0xa4: //Triple mode
 			PORTB.OUT = udd_g_ctrlreq.req.wValue;
-    17c2:	80 91 5c 24 	lds	r24, 0x245C	; 0x80245c <udd_g_ctrlreq+0x2>
-    17c6:	80 93 24 06 	sts	0x0624, r24	; 0x800624 <__TEXT_REGION_LENGTH__+0x700624>
-    17ca:	cc c2       	rjmp	.+1432   	; 0x1d64 <udc_process_setup+0x704>
+    17d8:	80 91 5c 24 	lds	r24, 0x245C	; 0x80245c <udd_g_ctrlreq+0x2>
+    17dc:	80 93 24 06 	sts	0x0624, r24	; 0x800624 <__TEXT_REGION_LENGTH__+0x700624>
+    17e0:	cc c2       	rjmp	.+1432   	; 0x1d7a <udc_process_setup+0x704>
 			return 1;			
 		case 0xa5: //Control Gain and Scope modes
 			switch(udd_g_ctrlreq.req.wValue){
-    17cc:	e0 91 5c 24 	lds	r30, 0x245C	; 0x80245c <udd_g_ctrlreq+0x2>
-    17d0:	f0 91 5d 24 	lds	r31, 0x245D	; 0x80245d <udd_g_ctrlreq+0x3>
-    17d4:	e8 30       	cpi	r30, 0x08	; 8
-    17d6:	f1 05       	cpc	r31, r1
-    17d8:	08 f0       	brcs	.+2      	; 0x17dc <udc_process_setup+0x17c>
-    17da:	5f c0       	rjmp	.+190    	; 0x189a <udc_process_setup+0x23a>
-    17dc:	ea 5d       	subi	r30, 0xDA	; 218
-    17de:	fe 4f       	sbci	r31, 0xFE	; 254
-    17e0:	0c 94 32 16 	jmp	0x2c64	; 0x2c64 <__tablejump2__>
+    17e2:	e0 91 5c 24 	lds	r30, 0x245C	; 0x80245c <udd_g_ctrlreq+0x2>
+    17e6:	f0 91 5d 24 	lds	r31, 0x245D	; 0x80245d <udd_g_ctrlreq+0x3>
+    17ea:	e8 30       	cpi	r30, 0x08	; 8
+    17ec:	f1 05       	cpc	r31, r1
+    17ee:	08 f0       	brcs	.+2      	; 0x17f2 <udc_process_setup+0x17c>
+    17f0:	5f c0       	rjmp	.+190    	; 0x18b0 <udc_process_setup+0x23a>
+    17f2:	ea 5d       	subi	r30, 0xDA	; 218
+    17f4:	fe 4f       	sbci	r31, 0xFE	; 254
+    17f6:	0c 94 3d 16 	jmp	0x2c7a	; 0x2c7a <__tablejump2__>
 				case 0:  //Mode 0
 					tiny_adc_setup(0, 0);
-    17e4:	60 e0       	ldi	r22, 0x00	; 0
-    17e6:	80 e0       	ldi	r24, 0x00	; 0
-    17e8:	0e 94 30 02 	call	0x460	; 0x460 <tiny_adc_setup>
-					tiny_adc_ch0setup(udd_g_ctrlreq.req.wIndex);
-    17ec:	80 91 5e 24 	lds	r24, 0x245E	; 0x80245e <udd_g_ctrlreq+0x4>
-    17f0:	0e 94 04 02 	call	0x408	; 0x408 <tiny_adc_ch0setup>
-					tiny_dma_set_mode_0();
-    17f4:	0e 94 aa 02 	call	0x554	; 0x554 <tiny_dma_set_mode_0>
-    17f8:	b5 c2       	rjmp	.+1386   	; 0x1d64 <udc_process_setup+0x704>
-					break;
-				case 1:  //Mode 1
-					tiny_adc_setup(0, 0);
     17fa:	60 e0       	ldi	r22, 0x00	; 0
     17fc:	80 e0       	ldi	r24, 0x00	; 0
-    17fe:	0e 94 30 02 	call	0x460	; 0x460 <tiny_adc_setup>
+    17fe:	0e 94 36 02 	call	0x46c	; 0x46c <tiny_adc_setup>
 					tiny_adc_ch0setup(udd_g_ctrlreq.req.wIndex);
     1802:	80 91 5e 24 	lds	r24, 0x245E	; 0x80245e <udd_g_ctrlreq+0x4>
     1806:	0e 94 04 02 	call	0x408	; 0x408 <tiny_adc_ch0setup>
+					tiny_dma_set_mode_0();
+    180a:	0e 94 b0 02 	call	0x560	; 0x560 <tiny_dma_set_mode_0>
+    180e:	b5 c2       	rjmp	.+1386   	; 0x1d7a <udc_process_setup+0x704>
+					break;
+				case 1:  //Mode 1
+					tiny_adc_setup(0, 0);
+    1810:	60 e0       	ldi	r22, 0x00	; 0
+    1812:	80 e0       	ldi	r24, 0x00	; 0
+    1814:	0e 94 36 02 	call	0x46c	; 0x46c <tiny_adc_setup>
+					tiny_adc_ch0setup(udd_g_ctrlreq.req.wIndex);
+    1818:	80 91 5e 24 	lds	r24, 0x245E	; 0x80245e <udd_g_ctrlreq+0x4>
+    181c:	0e 94 04 02 	call	0x408	; 0x408 <tiny_adc_ch0setup>
 					tiny_dma_set_mode_1();
-    180a:	0e 94 1e 03 	call	0x63c	; 0x63c <tiny_dma_set_mode_1>
-    180e:	aa c2       	rjmp	.+1364   	; 0x1d64 <udc_process_setup+0x704>
+    1820:	0e 94 24 03 	call	0x648	; 0x648 <tiny_dma_set_mode_1>
+    1824:	aa c2       	rjmp	.+1364   	; 0x1d7a <udc_process_setup+0x704>
 					break;
 				case 2:  //Mode 2
 					tiny_adc_setup(1, 1);
-    1810:	61 e0       	ldi	r22, 0x01	; 1
-    1812:	81 e0       	ldi	r24, 0x01	; 1
-    1814:	0e 94 30 02 	call	0x460	; 0x460 <tiny_adc_setup>
+    1826:	61 e0       	ldi	r22, 0x01	; 1
+    1828:	81 e0       	ldi	r24, 0x01	; 1
+    182a:	0e 94 36 02 	call	0x46c	; 0x46c <tiny_adc_setup>
 					tiny_adc_ch0setup(udd_g_ctrlreq.req.wIndex);
-    1818:	ca e5       	ldi	r28, 0x5A	; 90
-    181a:	d4 e2       	ldi	r29, 0x24	; 36
-    181c:	8c 81       	ldd	r24, Y+4	; 0x04
-    181e:	0e 94 04 02 	call	0x408	; 0x408 <tiny_adc_ch0setup>
+    182e:	ca e5       	ldi	r28, 0x5A	; 90
+    1830:	d4 e2       	ldi	r29, 0x24	; 36
+    1832:	8c 81       	ldd	r24, Y+4	; 0x04
+    1834:	0e 94 04 02 	call	0x408	; 0x408 <tiny_adc_ch0setup>
 					tiny_adc_ch1setup(udd_g_ctrlreq.req.wIndex>>8);
-    1822:	8d 81       	ldd	r24, Y+5	; 0x05
-    1824:	0e 94 13 02 	call	0x426	; 0x426 <tiny_adc_ch1setup>
+    1838:	8d 81       	ldd	r24, Y+5	; 0x05
+    183a:	0e 94 19 02 	call	0x432	; 0x432 <tiny_adc_ch1setup>
 					tiny_dma_set_mode_2();
-    1828:	0e 94 97 03 	call	0x72e	; 0x72e <tiny_dma_set_mode_2>
-    182c:	9b c2       	rjmp	.+1334   	; 0x1d64 <udc_process_setup+0x704>
+    183e:	0e 94 9d 03 	call	0x73a	; 0x73a <tiny_dma_set_mode_2>
+    1842:	9b c2       	rjmp	.+1334   	; 0x1d7a <udc_process_setup+0x704>
 					break;
 				case 3:  //Mode 3
 					tiny_dma_set_mode_3();
-    182e:	0e 94 0b 04 	call	0x816	; 0x816 <tiny_dma_set_mode_3>
-    1832:	98 c2       	rjmp	.+1328   	; 0x1d64 <udc_process_setup+0x704>
+    1844:	0e 94 11 04 	call	0x822	; 0x822 <tiny_dma_set_mode_3>
+    1848:	98 c2       	rjmp	.+1328   	; 0x1d7a <udc_process_setup+0x704>
 					break;
 				case 4:  //Mode 4
 					tiny_dma_set_mode_4();
-    1834:	6d d8       	rcall	.-3878   	; 0x910 <tiny_dma_set_mode_4>
-    1836:	96 c2       	rjmp	.+1324   	; 0x1d64 <udc_process_setup+0x704>
+    184a:	68 d8       	rcall	.-3888   	; 0x91c <tiny_dma_set_mode_4>
+    184c:	96 c2       	rjmp	.+1324   	; 0x1d7a <udc_process_setup+0x704>
 					break;
 				case 5:  //Mode 5
 					tiny_adc_setup(0, 0);
-    1838:	60 e0       	ldi	r22, 0x00	; 0
-    183a:	80 e0       	ldi	r24, 0x00	; 0
-    183c:	0e 94 30 02 	call	0x460	; 0x460 <tiny_adc_setup>
+    184e:	60 e0       	ldi	r22, 0x00	; 0
+    1850:	80 e0       	ldi	r24, 0x00	; 0
+    1852:	0e 94 36 02 	call	0x46c	; 0x46c <tiny_adc_setup>
 					tiny_adc_ch0setup(udd_g_ctrlreq.req.wIndex);
-    1840:	80 91 5e 24 	lds	r24, 0x245E	; 0x80245e <udd_g_ctrlreq+0x4>
-    1844:	0e 94 04 02 	call	0x408	; 0x408 <tiny_adc_ch0setup>
+    1856:	80 91 5e 24 	lds	r24, 0x245E	; 0x80245e <udd_g_ctrlreq+0x4>
+    185a:	0e 94 04 02 	call	0x408	; 0x408 <tiny_adc_ch0setup>
 					tiny_dma_set_mode_5();
-    1848:	da d8       	rcall	.-3660   	; 0x9fe <tiny_dma_set_mode_5>
-    184a:	8c c2       	rjmp	.+1304   	; 0x1d64 <udc_process_setup+0x704>
+    185e:	d5 d8       	rcall	.-3670   	; 0xa0a <tiny_dma_set_mode_5>
+    1860:	8c c2       	rjmp	.+1304   	; 0x1d7a <udc_process_setup+0x704>
 					break;
 				case 6:  //Mode 6
 					tiny_adc_setup(0, 1);
-    184c:	61 e0       	ldi	r22, 0x01	; 1
-    184e:	80 e0       	ldi	r24, 0x00	; 0
-    1850:	0e 94 30 02 	call	0x460	; 0x460 <tiny_adc_setup>
+    1862:	61 e0       	ldi	r22, 0x01	; 1
+    1864:	80 e0       	ldi	r24, 0x00	; 0
+    1866:	0e 94 36 02 	call	0x46c	; 0x46c <tiny_adc_setup>
 					tiny_adc_ch0setup(udd_g_ctrlreq.req.wIndex);
-    1854:	80 91 5e 24 	lds	r24, 0x245E	; 0x80245e <udd_g_ctrlreq+0x4>
-    1858:	0e 94 04 02 	call	0x408	; 0x408 <tiny_adc_ch0setup>
+    186a:	80 91 5e 24 	lds	r24, 0x245E	; 0x80245e <udd_g_ctrlreq+0x4>
+    186e:	0e 94 04 02 	call	0x408	; 0x408 <tiny_adc_ch0setup>
 					tiny_dma_set_mode_6();
-    185c:	18 d9       	rcall	.-3536   	; 0xa8e <tiny_dma_set_mode_6>
-    185e:	82 c2       	rjmp	.+1284   	; 0x1d64 <udc_process_setup+0x704>
+    1872:	13 d9       	rcall	.-3546   	; 0xa9a <tiny_dma_set_mode_6>
+    1874:	82 c2       	rjmp	.+1284   	; 0x1d7a <udc_process_setup+0x704>
 					break;		
 				case 7:  //Mode 7
 					tiny_adc_setup(0, 2);
-    1860:	62 e0       	ldi	r22, 0x02	; 2
-    1862:	80 e0       	ldi	r24, 0x00	; 0
-    1864:	0e 94 30 02 	call	0x460	; 0x460 <tiny_adc_setup>
+    1876:	62 e0       	ldi	r22, 0x02	; 2
+    1878:	80 e0       	ldi	r24, 0x00	; 0
+    187a:	0e 94 36 02 	call	0x46c	; 0x46c <tiny_adc_setup>
 					tiny_adc_ch0setup(udd_g_ctrlreq.req.wIndex | 0x80);
-    1868:	80 91 5e 24 	lds	r24, 0x245E	; 0x80245e <udd_g_ctrlreq+0x4>
-    186c:	80 68       	ori	r24, 0x80	; 128
-    186e:	0e 94 04 02 	call	0x408	; 0x408 <tiny_adc_ch0setup>
+    187e:	80 91 5e 24 	lds	r24, 0x245E	; 0x80245e <udd_g_ctrlreq+0x4>
+    1882:	80 68       	ori	r24, 0x80	; 128
+    1884:	0e 94 04 02 	call	0x408	; 0x408 <tiny_adc_ch0setup>
 					tiny_dma_set_mode_7();
-    1872:	70 d9       	rcall	.-3360   	; 0xb54 <tiny_dma_set_mode_7>
-    1874:	77 c2       	rjmp	.+1262   	; 0x1d64 <udc_process_setup+0x704>
+    1888:	6b d9       	rcall	.-3370   	; 0xb60 <tiny_dma_set_mode_7>
+    188a:	77 c2       	rjmp	.+1262   	; 0x1d7a <udc_process_setup+0x704>
 				default:
 					return 0;
 			}
 			return 1;
 		case 0xa6:  //Digital out???
 			PORTE.OUT = udd_g_ctrlreq.req.wValue;
-    1876:	80 91 5c 24 	lds	r24, 0x245C	; 0x80245c <udd_g_ctrlreq+0x2>
-    187a:	80 93 84 06 	sts	0x0684, r24	; 0x800684 <__TEXT_REGION_LENGTH__+0x700684>
-    187e:	72 c2       	rjmp	.+1252   	; 0x1d64 <udc_process_setup+0x704>
+    188c:	80 91 5c 24 	lds	r24, 0x245C	; 0x80245c <udd_g_ctrlreq+0x2>
+    1890:	80 93 84 06 	sts	0x0684, r24	; 0x800684 <__TEXT_REGION_LENGTH__+0x700684>
+    1894:	72 c2       	rjmp	.+1252   	; 0x1d7a <udc_process_setup+0x704>
 		case 0xa7:  //Soft Reset
 		
 		//Code here from SprinterSB
 		//http://www.avrfreaks.net/comment/872674
 		//I don't understand it, but it seems to do the job
 			    __asm volatile ("cli"                 "\n\t"
-    1880:	e9 e7       	ldi	r30, 0x79	; 121
-    1882:	f0 e0       	ldi	r31, 0x00	; 0
-    1884:	91 e0       	ldi	r25, 0x01	; 1
-    1886:	88 ed       	ldi	r24, 0xD8	; 216
-    1888:	f8 94       	cli
-    188a:	84 bf       	out	0x34, r24	; 52
-    188c:	90 83       	st	Z, r25
+    1896:	e9 e7       	ldi	r30, 0x79	; 121
+    1898:	f0 e0       	ldi	r31, 0x00	; 0
+    189a:	91 e0       	ldi	r25, 0x01	; 1
+    189c:	88 ed       	ldi	r24, 0xD8	; 216
+    189e:	f8 94       	cli
+    18a0:	84 bf       	out	0x34, r24	; 52
+    18a2:	90 83       	st	Z, r25
 			    [swrst] "r" ((uint8_t) RST_SWRST_bm),
 			    [rst]   "e" (&RST.CTRL)
 			    : "memory");
 			    __builtin_unreachable();
 		default:
 			return 0;
-    188e:	80 e0       	ldi	r24, 0x00	; 0
-    1890:	05 c0       	rjmp	.+10     	; 0x189c <udc_process_setup+0x23c>
+    18a4:	80 e0       	ldi	r24, 0x00	; 0
+    18a6:	05 c0       	rjmp	.+10     	; 0x18b2 <udc_process_setup+0x23c>
 					case 7:
 					tiny_dma_set_mode_7();
 					break;
 				}
 			}
 			return 1;
-    1892:	81 e0       	ldi	r24, 0x01	; 1
-    1894:	03 c0       	rjmp	.+6      	; 0x189c <udc_process_setup+0x23c>
+    18a8:	81 e0       	ldi	r24, 0x01	; 1
+    18aa:	03 c0       	rjmp	.+6      	; 0x18b2 <udc_process_setup+0x23c>
 					case 7:
 					tiny_dma_set_mode_7();
 					break;
 				}
 			}
 			return 1;
-    1896:	81 e0       	ldi	r24, 0x01	; 1
-    1898:	01 c0       	rjmp	.+2      	; 0x189c <udc_process_setup+0x23c>
+    18ac:	81 e0       	ldi	r24, 0x01	; 1
+    18ae:	01 c0       	rjmp	.+2      	; 0x18b2 <udc_process_setup+0x23c>
 					tiny_adc_setup(0, 2);
 					tiny_adc_ch0setup(udd_g_ctrlreq.req.wIndex | 0x80);
 					tiny_dma_set_mode_7();
 					break;
 				default:
 					return 0;
-    189a:	80 e0       	ldi	r24, 0x00	; 0
+    18b0:	80 e0       	ldi	r24, 0x00	; 0
 			return false; // Error from USB host
 		}
 	}
 	
 	if (Udd_setup_type() == USB_REQ_TYPE_VENDOR){
 		if (udc_reqvend()) {
-    189c:	81 11       	cpse	r24, r1
-    189e:	65 c2       	rjmp	.+1226   	; 0x1d6a <udc_process_setup+0x70a>
+    18b2:	81 11       	cpse	r24, r1
+    18b4:	65 c2       	rjmp	.+1226   	; 0x1d80 <udc_process_setup+0x70a>
 			return true;
 		}
 	}
 
 	// If standard request then try to decode it in UDC
 	if (Udd_setup_type() == USB_REQ_TYPE_STANDARD) {
-    18a0:	80 91 5a 24 	lds	r24, 0x245A	; 0x80245a <udd_g_ctrlreq>
-    18a4:	98 2f       	mov	r25, r24
-    18a6:	90 76       	andi	r25, 0x60	; 96
-    18a8:	09 f0       	breq	.+2      	; 0x18ac <udc_process_setup+0x24c>
-    18aa:	e1 c1       	rjmp	.+962    	; 0x1c6e <udc_process_setup+0x60e>
+    18b6:	80 91 5a 24 	lds	r24, 0x245A	; 0x80245a <udd_g_ctrlreq>
+    18ba:	98 2f       	mov	r25, r24
+    18bc:	90 76       	andi	r25, 0x60	; 96
+    18be:	09 f0       	breq	.+2      	; 0x18c2 <udc_process_setup+0x24c>
+    18c0:	e1 c1       	rjmp	.+962    	; 0x1c84 <udc_process_setup+0x60e>
  *
  * \return true if the request is supported
  */
 static bool udc_reqstd(void)
 {
 	if (Udd_setup_is_in()) {
-    18ac:	88 23       	and	r24, r24
-    18ae:	0c f0       	brlt	.+2      	; 0x18b2 <udc_process_setup+0x252>
-    18b0:	05 c1       	rjmp	.+522    	; 0x1abc <udc_process_setup+0x45c>
+    18c2:	88 23       	and	r24, r24
+    18c4:	0c f0       	brlt	.+2      	; 0x18c8 <udc_process_setup+0x252>
+    18c6:	05 c1       	rjmp	.+522    	; 0x1ad2 <udc_process_setup+0x45c>
 		// GET Standard Requests
 		if (udd_g_ctrlreq.req.wLength == 0) {
-    18b2:	20 91 60 24 	lds	r18, 0x2460	; 0x802460 <udd_g_ctrlreq+0x6>
-    18b6:	30 91 61 24 	lds	r19, 0x2461	; 0x802461 <udd_g_ctrlreq+0x7>
-    18ba:	21 15       	cp	r18, r1
-    18bc:	31 05       	cpc	r19, r1
-    18be:	09 f4       	brne	.+2      	; 0x18c2 <udc_process_setup+0x262>
-    18c0:	d6 c1       	rjmp	.+940    	; 0x1c6e <udc_process_setup+0x60e>
+    18c8:	20 91 60 24 	lds	r18, 0x2460	; 0x802460 <udd_g_ctrlreq+0x6>
+    18cc:	30 91 61 24 	lds	r19, 0x2461	; 0x802461 <udd_g_ctrlreq+0x7>
+    18d0:	21 15       	cp	r18, r1
+    18d2:	31 05       	cpc	r19, r1
+    18d4:	09 f4       	brne	.+2      	; 0x18d8 <udc_process_setup+0x262>
+    18d6:	d6 c1       	rjmp	.+940    	; 0x1c84 <udc_process_setup+0x60e>
 			return false; // Error for USB host
 		}
 
 		if (USB_REQ_RECIP_DEVICE == Udd_setup_recipient()) {
-    18c2:	8f 71       	andi	r24, 0x1F	; 31
-    18c4:	09 f0       	breq	.+2      	; 0x18c8 <udc_process_setup+0x268>
-    18c6:	a3 c0       	rjmp	.+326    	; 0x1a0e <udc_process_setup+0x3ae>
+    18d8:	8f 71       	andi	r24, 0x1F	; 31
+    18da:	09 f0       	breq	.+2      	; 0x18de <udc_process_setup+0x268>
+    18dc:	a3 c0       	rjmp	.+326    	; 0x1a24 <udc_process_setup+0x3ae>
 			// Standard Get Device request
 			switch (udd_g_ctrlreq.req.bRequest) {
-    18c8:	90 91 5b 24 	lds	r25, 0x245B	; 0x80245b <udd_g_ctrlreq+0x1>
-    18cc:	96 30       	cpi	r25, 0x06	; 6
-    18ce:	79 f0       	breq	.+30     	; 0x18ee <udc_process_setup+0x28e>
-    18d0:	98 30       	cpi	r25, 0x08	; 8
-    18d2:	09 f4       	brne	.+2      	; 0x18d6 <udc_process_setup+0x276>
-    18d4:	92 c0       	rjmp	.+292    	; 0x19fa <udc_process_setup+0x39a>
-    18d6:	91 11       	cpse	r25, r1
-    18d8:	9a c0       	rjmp	.+308    	; 0x1a0e <udc_process_setup+0x3ae>
+    18de:	90 91 5b 24 	lds	r25, 0x245B	; 0x80245b <udd_g_ctrlreq+0x1>
+    18e2:	96 30       	cpi	r25, 0x06	; 6
+    18e4:	79 f0       	breq	.+30     	; 0x1904 <udc_process_setup+0x28e>
+    18e6:	98 30       	cpi	r25, 0x08	; 8
+    18e8:	09 f4       	brne	.+2      	; 0x18ec <udc_process_setup+0x276>
+    18ea:	92 c0       	rjmp	.+292    	; 0x1a10 <udc_process_setup+0x39a>
+    18ec:	91 11       	cpse	r25, r1
+    18ee:	9a c0       	rjmp	.+308    	; 0x1a24 <udc_process_setup+0x3ae>
  *
  * \return true if success
  */
 static bool udc_req_std_dev_get_status(void)
 {
 	if (udd_g_ctrlreq.req.wLength != sizeof(udc_device_status)) {
-    18da:	22 30       	cpi	r18, 0x02	; 2
-    18dc:	31 05       	cpc	r19, r1
-    18de:	09 f0       	breq	.+2      	; 0x18e2 <udc_process_setup+0x282>
-    18e0:	c6 c1       	rjmp	.+908    	; 0x1c6e <udc_process_setup+0x60e>
+    18f0:	22 30       	cpi	r18, 0x02	; 2
+    18f2:	31 05       	cpc	r19, r1
+    18f4:	09 f0       	breq	.+2      	; 0x18f8 <udc_process_setup+0x282>
+    18f6:	c6 c1       	rjmp	.+908    	; 0x1c84 <udc_process_setup+0x60e>
 		return false;
 	}
 
 	udd_set_setup_payload( (uint8_t *) & udc_device_status,
-    18e2:	62 e0       	ldi	r22, 0x02	; 2
-    18e4:	70 e0       	ldi	r23, 0x00	; 0
-    18e6:	82 ec       	ldi	r24, 0xC2	; 194
-    18e8:	90 e2       	ldi	r25, 0x20	; 32
-    18ea:	ec d5       	rcall	.+3032   	; 0x24c4 <udd_set_setup_payload>
-    18ec:	3d c2       	rjmp	.+1146   	; 0x1d68 <udc_process_setup+0x708>
+    18f8:	62 e0       	ldi	r22, 0x02	; 2
+    18fa:	70 e0       	ldi	r23, 0x00	; 0
+    18fc:	82 ec       	ldi	r24, 0xC2	; 194
+    18fe:	90 e2       	ldi	r25, 0x20	; 32
+    1900:	ec d5       	rcall	.+3032   	; 0x24da <udd_set_setup_payload>
+    1902:	3d c2       	rjmp	.+1146   	; 0x1d7e <udc_process_setup+0x708>
  */
 static bool udc_req_std_dev_get_descriptor(void)
 {
 	uint8_t conf_num;
 
 	conf_num = udd_g_ctrlreq.req.wValue & 0xff;
-    18ee:	80 91 5c 24 	lds	r24, 0x245C	; 0x80245c <udd_g_ctrlreq+0x2>
-    18f2:	90 91 5d 24 	lds	r25, 0x245D	; 0x80245d <udd_g_ctrlreq+0x3>
+    1904:	80 91 5c 24 	lds	r24, 0x245C	; 0x80245c <udd_g_ctrlreq+0x2>
+    1908:	90 91 5d 24 	lds	r25, 0x245D	; 0x80245d <udd_g_ctrlreq+0x3>
 
 	// Check descriptor ID
 	switch ((uint8_t) (udd_g_ctrlreq.req.wValue >> 8)) {
-    18f6:	29 2f       	mov	r18, r25
-    18f8:	33 27       	eor	r19, r19
-    18fa:	22 30       	cpi	r18, 0x02	; 2
-    18fc:	31 05       	cpc	r19, r1
-    18fe:	a9 f0       	breq	.+42     	; 0x192a <udc_process_setup+0x2ca>
-    1900:	24 f4       	brge	.+8      	; 0x190a <udc_process_setup+0x2aa>
-    1902:	21 30       	cpi	r18, 0x01	; 1
-    1904:	31 05       	cpc	r19, r1
-    1906:	41 f0       	breq	.+16     	; 0x1918 <udc_process_setup+0x2b8>
-    1908:	a9 c1       	rjmp	.+850    	; 0x1c5c <udc_process_setup+0x5fc>
-    190a:	23 30       	cpi	r18, 0x03	; 3
-    190c:	31 05       	cpc	r19, r1
-    190e:	d9 f1       	breq	.+118    	; 0x1986 <udc_process_setup+0x326>
-    1910:	2f 30       	cpi	r18, 0x0F	; 15
+    190c:	29 2f       	mov	r18, r25
+    190e:	33 27       	eor	r19, r19
+    1910:	22 30       	cpi	r18, 0x02	; 2
     1912:	31 05       	cpc	r19, r1
-    1914:	51 f1       	breq	.+84     	; 0x196a <udc_process_setup+0x30a>
-    1916:	a2 c1       	rjmp	.+836    	; 0x1c5c <udc_process_setup+0x5fc>
+    1914:	a9 f0       	breq	.+42     	; 0x1940 <udc_process_setup+0x2ca>
+    1916:	24 f4       	brge	.+8      	; 0x1920 <udc_process_setup+0x2aa>
+    1918:	21 30       	cpi	r18, 0x01	; 1
+    191a:	31 05       	cpc	r19, r1
+    191c:	41 f0       	breq	.+16     	; 0x192e <udc_process_setup+0x2b8>
+    191e:	a9 c1       	rjmp	.+850    	; 0x1c72 <udc_process_setup+0x5fc>
+    1920:	23 30       	cpi	r18, 0x03	; 3
+    1922:	31 05       	cpc	r19, r1
+    1924:	d9 f1       	breq	.+118    	; 0x199c <udc_process_setup+0x326>
+    1926:	2f 30       	cpi	r18, 0x0F	; 15
+    1928:	31 05       	cpc	r19, r1
+    192a:	51 f1       	breq	.+84     	; 0x1980 <udc_process_setup+0x30a>
+    192c:	a2 c1       	rjmp	.+836    	; 0x1c72 <udc_process_setup+0x5fc>
 		} else
 #endif
 		{
 			udd_set_setup_payload(
 				(uint8_t *) udc_config.confdev_lsfs,
 				udc_config.confdev_lsfs->bLength);
-    1918:	80 91 10 20 	lds	r24, 0x2010	; 0x802010 <udc_config>
-    191c:	90 91 11 20 	lds	r25, 0x2011	; 0x802011 <udc_config+0x1>
+    192e:	80 91 10 20 	lds	r24, 0x2010	; 0x802010 <udc_config>
+    1932:	90 91 11 20 	lds	r25, 0x2011	; 0x802011 <udc_config+0x1>
 				(uint8_t *) udc_config.confdev_hs,
 				udc_config.confdev_hs->bLength);
 		} else
 #endif
 		{
 			udd_set_setup_payload(
-    1920:	dc 01       	movw	r26, r24
-    1922:	6c 91       	ld	r22, X
-    1924:	70 e0       	ldi	r23, 0x00	; 0
-    1926:	ce d5       	rcall	.+2972   	; 0x24c4 <udd_set_setup_payload>
-    1928:	59 c0       	rjmp	.+178    	; 0x19dc <udc_process_setup+0x37c>
+    1936:	dc 01       	movw	r26, r24
+    1938:	6c 91       	ld	r22, X
+    193a:	70 e0       	ldi	r23, 0x00	; 0
+    193c:	ce d5       	rcall	.+2972   	; 0x24da <udd_set_setup_payload>
+    193e:	59 c0       	rjmp	.+178    	; 0x19f2 <udc_process_setup+0x37c>
 				le16_to_cpu(udc_config.conf_hs[conf_num].desc->wTotalLength));
 		} else
 #endif
 		{
 			// FS descriptor
 			if (conf_num >= udc_config.confdev_lsfs->
-    192a:	e0 91 10 20 	lds	r30, 0x2010	; 0x802010 <udc_config>
-    192e:	f0 91 11 20 	lds	r31, 0x2011	; 0x802011 <udc_config+0x1>
-    1932:	21 89       	ldd	r18, Z+17	; 0x11
-    1934:	82 17       	cp	r24, r18
-    1936:	08 f0       	brcs	.+2      	; 0x193a <udc_process_setup+0x2da>
-    1938:	9a c1       	rjmp	.+820    	; 0x1c6e <udc_process_setup+0x60e>
+    1940:	e0 91 10 20 	lds	r30, 0x2010	; 0x802010 <udc_config>
+    1944:	f0 91 11 20 	lds	r31, 0x2011	; 0x802011 <udc_config+0x1>
+    1948:	21 89       	ldd	r18, Z+17	; 0x11
+    194a:	82 17       	cp	r24, r18
+    194c:	08 f0       	brcs	.+2      	; 0x1950 <udc_process_setup+0x2da>
+    194e:	9a c1       	rjmp	.+820    	; 0x1c84 <udc_process_setup+0x60e>
 					bNumConfigurations) {
 				return false;
 			}
 			udd_set_setup_payload(
 				(uint8_t *)udc_config.conf_lsfs[conf_num].desc,
 				le16_to_cpu(udc_config.conf_lsfs[conf_num].desc->wTotalLength));
-    193a:	99 27       	eor	r25, r25
-    193c:	88 0f       	add	r24, r24
-    193e:	99 1f       	adc	r25, r25
-    1940:	88 0f       	add	r24, r24
-    1942:	99 1f       	adc	r25, r25
-    1944:	e0 91 12 20 	lds	r30, 0x2012	; 0x802012 <udc_config+0x2>
-    1948:	f0 91 13 20 	lds	r31, 0x2013	; 0x802013 <udc_config+0x3>
-    194c:	e8 0f       	add	r30, r24
-    194e:	f9 1f       	adc	r31, r25
-    1950:	80 81       	ld	r24, Z
-    1952:	91 81       	ldd	r25, Z+1	; 0x01
+    1950:	99 27       	eor	r25, r25
+    1952:	88 0f       	add	r24, r24
+    1954:	99 1f       	adc	r25, r25
+    1956:	88 0f       	add	r24, r24
+    1958:	99 1f       	adc	r25, r25
+    195a:	e0 91 12 20 	lds	r30, 0x2012	; 0x802012 <udc_config+0x2>
+    195e:	f0 91 13 20 	lds	r31, 0x2013	; 0x802013 <udc_config+0x3>
+    1962:	e8 0f       	add	r30, r24
+    1964:	f9 1f       	adc	r31, r25
+    1966:	80 81       	ld	r24, Z
+    1968:	91 81       	ldd	r25, Z+1	; 0x01
 			// FS descriptor
 			if (conf_num >= udc_config.confdev_lsfs->
 					bNumConfigurations) {
 				return false;
 			}
 			udd_set_setup_payload(
-    1954:	fc 01       	movw	r30, r24
-    1956:	62 81       	ldd	r22, Z+2	; 0x02
-    1958:	73 81       	ldd	r23, Z+3	; 0x03
-    195a:	b4 d5       	rcall	.+2920   	; 0x24c4 <udd_set_setup_payload>
+    196a:	fc 01       	movw	r30, r24
+    196c:	62 81       	ldd	r22, Z+2	; 0x02
+    196e:	73 81       	ldd	r23, Z+3	; 0x03
+    1970:	b4 d5       	rcall	.+2920   	; 0x24da <udd_set_setup_payload>
 				(uint8_t *)udc_config.conf_lsfs[conf_num].desc,
 				le16_to_cpu(udc_config.conf_lsfs[conf_num].desc->wTotalLength));
 		}
 		((usb_conf_desc_t *) udd_g_ctrlreq.payload)->bDescriptorType =
-    195c:	e0 91 62 24 	lds	r30, 0x2462	; 0x802462 <udd_g_ctrlreq+0x8>
-    1960:	f0 91 63 24 	lds	r31, 0x2463	; 0x802463 <udd_g_ctrlreq+0x9>
-    1964:	82 e0       	ldi	r24, 0x02	; 2
-    1966:	81 83       	std	Z+1, r24	; 0x01
-    1968:	39 c0       	rjmp	.+114    	; 0x19dc <udc_process_setup+0x37c>
+    1972:	e0 91 62 24 	lds	r30, 0x2462	; 0x802462 <udd_g_ctrlreq+0x8>
+    1976:	f0 91 63 24 	lds	r31, 0x2463	; 0x802463 <udd_g_ctrlreq+0x9>
+    197a:	82 e0       	ldi	r24, 0x02	; 2
+    197c:	81 83       	std	Z+1, r24	; 0x01
+    197e:	39 c0       	rjmp	.+114    	; 0x19f2 <udc_process_setup+0x37c>
 		break;
 #endif
 
 	case USB_DT_BOS:
 		// Device BOS descriptor requested
 		if (udc_config.conf_bos == NULL) {
-    196a:	80 91 14 20 	lds	r24, 0x2014	; 0x802014 <udc_config+0x4>
-    196e:	90 91 15 20 	lds	r25, 0x2015	; 0x802015 <udc_config+0x5>
-    1972:	00 97       	sbiw	r24, 0x00	; 0
-    1974:	09 f4       	brne	.+2      	; 0x1978 <udc_process_setup+0x318>
-    1976:	7b c1       	rjmp	.+758    	; 0x1c6e <udc_process_setup+0x60e>
+    1980:	80 91 14 20 	lds	r24, 0x2014	; 0x802014 <udc_config+0x4>
+    1984:	90 91 15 20 	lds	r25, 0x2015	; 0x802015 <udc_config+0x5>
+    1988:	00 97       	sbiw	r24, 0x00	; 0
+    198a:	09 f4       	brne	.+2      	; 0x198e <udc_process_setup+0x318>
+    198c:	7b c1       	rjmp	.+758    	; 0x1c84 <udc_process_setup+0x60e>
 			return false;
 		}
 		udd_set_setup_payload( (uint8_t *) udc_config.conf_bos,
-    1978:	dc 01       	movw	r26, r24
-    197a:	12 96       	adiw	r26, 0x02	; 2
-    197c:	6d 91       	ld	r22, X+
-    197e:	7c 91       	ld	r23, X
-    1980:	13 97       	sbiw	r26, 0x03	; 3
-    1982:	a0 d5       	rcall	.+2880   	; 0x24c4 <udd_set_setup_payload>
-    1984:	2b c0       	rjmp	.+86     	; 0x19dc <udc_process_setup+0x37c>
+    198e:	dc 01       	movw	r26, r24
+    1990:	12 96       	adiw	r26, 0x02	; 2
+    1992:	6d 91       	ld	r22, X+
+    1994:	7c 91       	ld	r23, X
+    1996:	13 97       	sbiw	r26, 0x03	; 3
+    1998:	a0 d5       	rcall	.+2880   	; 0x24da <udd_set_setup_payload>
+    199a:	2b c0       	rjmp	.+86     	; 0x19f2 <udc_process_setup+0x37c>
 	uint8_t i;
 	const uint8_t *str;
 	uint8_t str_length = 0;
 
 	// Link payload pointer to the string corresponding at request
 	switch (udd_g_ctrlreq.req.wValue & 0xff) {
-    1986:	99 27       	eor	r25, r25
-    1988:	81 30       	cpi	r24, 0x01	; 1
-    198a:	91 05       	cpc	r25, r1
-    198c:	71 f0       	breq	.+28     	; 0x19aa <udc_process_setup+0x34a>
-    198e:	38 f0       	brcs	.+14     	; 0x199e <udc_process_setup+0x33e>
-    1990:	02 97       	sbiw	r24, 0x02	; 2
-    1992:	09 f0       	breq	.+2      	; 0x1996 <udc_process_setup+0x336>
-    1994:	6c c1       	rjmp	.+728    	; 0x1c6e <udc_process_setup+0x60e>
+    199c:	99 27       	eor	r25, r25
+    199e:	81 30       	cpi	r24, 0x01	; 1
+    19a0:	91 05       	cpc	r25, r1
+    19a2:	71 f0       	breq	.+28     	; 0x19c0 <udc_process_setup+0x34a>
+    19a4:	38 f0       	brcs	.+14     	; 0x19b4 <udc_process_setup+0x33e>
+    19a6:	02 97       	sbiw	r24, 0x02	; 2
+    19a8:	09 f0       	breq	.+2      	; 0x19ac <udc_process_setup+0x336>
+    19aa:	6c c1       	rjmp	.+728    	; 0x1c84 <udc_process_setup+0x60e>
 		break;
 #endif
 #ifdef USB_DEVICE_PRODUCT_NAME
 	case 2:
 		str_length = USB_DEVICE_PRODUCT_NAME_SIZE;
 		str = udc_string_product_name;
-    1996:	8a e8       	ldi	r24, 0x8A	; 138
-    1998:	90 e2       	ldi	r25, 0x20	; 32
+    19ac:	8a e8       	ldi	r24, 0x8A	; 138
+    19ae:	90 e2       	ldi	r25, 0x20	; 32
 		str = udc_string_manufacturer_name;
 		break;
 #endif
 #ifdef USB_DEVICE_PRODUCT_NAME
 	case 2:
 		str_length = USB_DEVICE_PRODUCT_NAME_SIZE;
-    199a:	28 e1       	ldi	r18, 0x18	; 24
-    199c:	09 c0       	rjmp	.+18     	; 0x19b0 <udc_process_setup+0x350>
+    19b0:	28 e1       	ldi	r18, 0x18	; 24
+    19b2:	09 c0       	rjmp	.+18     	; 0x19c6 <udc_process_setup+0x350>
 	uint8_t str_length = 0;
 
 	// Link payload pointer to the string corresponding at request
 	switch (udd_g_ctrlreq.req.wValue & 0xff) {
 	case 0:
 		udd_set_setup_payload((uint8_t *) &udc_string_desc_languageid,
-    199e:	64 e0       	ldi	r22, 0x04	; 4
-    19a0:	70 e0       	ldi	r23, 0x00	; 0
-    19a2:	8e ea       	ldi	r24, 0xAE	; 174
-    19a4:	90 e2       	ldi	r25, 0x20	; 32
-    19a6:	8e d5       	rcall	.+2844   	; 0x24c4 <udd_set_setup_payload>
-    19a8:	19 c0       	rjmp	.+50     	; 0x19dc <udc_process_setup+0x37c>
+    19b4:	64 e0       	ldi	r22, 0x04	; 4
+    19b6:	70 e0       	ldi	r23, 0x00	; 0
+    19b8:	8e ea       	ldi	r24, 0xAE	; 174
+    19ba:	90 e2       	ldi	r25, 0x20	; 32
+    19bc:	8e d5       	rcall	.+2844   	; 0x24da <udd_set_setup_payload>
+    19be:	19 c0       	rjmp	.+50     	; 0x19f2 <udc_process_setup+0x37c>
 		break;
 
 #ifdef USB_DEVICE_MANUFACTURE_NAME
 	case 1:
 		str_length = USB_DEVICE_MANUFACTURE_NAME_SIZE;
 		str = udc_string_manufacturer_name;
-    19aa:	83 ea       	ldi	r24, 0xA3	; 163
-    19ac:	90 e2       	ldi	r25, 0x20	; 32
+    19c0:	83 ea       	ldi	r24, 0xA3	; 163
+    19c2:	90 e2       	ldi	r25, 0x20	; 32
 				sizeof(udc_string_desc_languageid));
 		break;
 
 #ifdef USB_DEVICE_MANUFACTURE_NAME
 	case 1:
 		str_length = USB_DEVICE_MANUFACTURE_NAME_SIZE;
-    19ae:	29 e0       	ldi	r18, 0x09	; 9
-    19b0:	38 2f       	mov	r19, r24
-    19b2:	aa e5       	ldi	r26, 0x5A	; 90
-    19b4:	b0 e2       	ldi	r27, 0x20	; 32
+    19c4:	29 e0       	ldi	r18, 0x09	; 9
+    19c6:	38 2f       	mov	r19, r24
+    19c8:	aa e5       	ldi	r26, 0x5A	; 90
+    19ca:	b0 e2       	ldi	r27, 0x20	; 32
 		str = udc_string_manufacturer_name;
 		break;
 #endif
 #ifdef USB_DEVICE_PRODUCT_NAME
 	case 2:
 		str_length = USB_DEVICE_PRODUCT_NAME_SIZE;
-    19b6:	e8 2f       	mov	r30, r24
-    19b8:	f9 2f       	mov	r31, r25
+    19cc:	e8 2f       	mov	r30, r24
+    19ce:	f9 2f       	mov	r31, r25
 		return false;
 	}
 
 	if (str_length) {
 		for(i = 0; i < str_length; i++) {
 			udc_string_desc.string[i] = cpu_to_le16((le16_t)str[i]);
-    19ba:	81 91       	ld	r24, Z+
-    19bc:	90 e0       	ldi	r25, 0x00	; 0
-    19be:	8d 93       	st	X+, r24
-    19c0:	9d 93       	st	X+, r25
-    19c2:	8e 2f       	mov	r24, r30
-    19c4:	83 1b       	sub	r24, r19
+    19d0:	81 91       	ld	r24, Z+
+    19d2:	90 e0       	ldi	r25, 0x00	; 0
+    19d4:	8d 93       	st	X+, r24
+    19d6:	9d 93       	st	X+, r25
+    19d8:	8e 2f       	mov	r24, r30
+    19da:	83 1b       	sub	r24, r19
 #endif
 		return false;
 	}
 
 	if (str_length) {
 		for(i = 0; i < str_length; i++) {
-    19c6:	82 17       	cp	r24, r18
-    19c8:	c0 f3       	brcs	.-16     	; 0x19ba <udc_process_setup+0x35a>
+    19dc:	82 17       	cp	r24, r18
+    19de:	c0 f3       	brcs	.-16     	; 0x19d0 <udc_process_setup+0x35a>
 			udc_string_desc.string[i] = cpu_to_le16((le16_t)str[i]);
 		}
 
 		udc_string_desc.header.bLength = 2 + (str_length) * 2;
-    19ca:	62 2f       	mov	r22, r18
-    19cc:	66 0f       	add	r22, r22
-    19ce:	6e 5f       	subi	r22, 0xFE	; 254
-    19d0:	60 93 58 20 	sts	0x2058, r22	; 0x802058 <udc_string_desc>
+    19e0:	62 2f       	mov	r22, r18
+    19e2:	66 0f       	add	r22, r22
+    19e4:	6e 5f       	subi	r22, 0xFE	; 254
+    19e6:	60 93 58 20 	sts	0x2058, r22	; 0x802058 <udc_string_desc>
 		udd_set_setup_payload(
-    19d4:	70 e0       	ldi	r23, 0x00	; 0
-    19d6:	88 e5       	ldi	r24, 0x58	; 88
-    19d8:	90 e2       	ldi	r25, 0x20	; 32
-    19da:	74 d5       	rcall	.+2792   	; 0x24c4 <udd_set_setup_payload>
+    19ea:	70 e0       	ldi	r23, 0x00	; 0
+    19ec:	88 e5       	ldi	r24, 0x58	; 88
+    19ee:	90 e2       	ldi	r25, 0x20	; 32
+    19f0:	74 d5       	rcall	.+2792   	; 0x24da <udd_set_setup_payload>
 	default:
 		// Unknown descriptor requested
 		return false;
 	}
 	// if the descriptor is larger than length requested, then reduce it
 	if (udd_g_ctrlreq.req.wLength < udd_g_ctrlreq.payload_size) {
-    19dc:	ea e5       	ldi	r30, 0x5A	; 90
-    19de:	f4 e2       	ldi	r31, 0x24	; 36
-    19e0:	86 81       	ldd	r24, Z+6	; 0x06
-    19e2:	97 81       	ldd	r25, Z+7	; 0x07
-    19e4:	22 85       	ldd	r18, Z+10	; 0x0a
-    19e6:	33 85       	ldd	r19, Z+11	; 0x0b
-    19e8:	82 17       	cp	r24, r18
-    19ea:	93 07       	cpc	r25, r19
-    19ec:	08 f0       	brcs	.+2      	; 0x19f0 <udc_process_setup+0x390>
-    19ee:	bc c1       	rjmp	.+888    	; 0x1d68 <udc_process_setup+0x708>
+    19f2:	ea e5       	ldi	r30, 0x5A	; 90
+    19f4:	f4 e2       	ldi	r31, 0x24	; 36
+    19f6:	86 81       	ldd	r24, Z+6	; 0x06
+    19f8:	97 81       	ldd	r25, Z+7	; 0x07
+    19fa:	22 85       	ldd	r18, Z+10	; 0x0a
+    19fc:	33 85       	ldd	r19, Z+11	; 0x0b
+    19fe:	82 17       	cp	r24, r18
+    1a00:	93 07       	cpc	r25, r19
+    1a02:	08 f0       	brcs	.+2      	; 0x1a06 <udc_process_setup+0x390>
+    1a04:	bc c1       	rjmp	.+888    	; 0x1d7e <udc_process_setup+0x708>
 		udd_g_ctrlreq.payload_size = udd_g_ctrlreq.req.wLength;
-    19f0:	80 93 64 24 	sts	0x2464, r24	; 0x802464 <udd_g_ctrlreq+0xa>
-    19f4:	90 93 65 24 	sts	0x2465, r25	; 0x802465 <udd_g_ctrlreq+0xb>
-    19f8:	b7 c1       	rjmp	.+878    	; 0x1d68 <udc_process_setup+0x708>
+    1a06:	80 93 64 24 	sts	0x2464, r24	; 0x802464 <udd_g_ctrlreq+0xa>
+    1a0a:	90 93 65 24 	sts	0x2465, r25	; 0x802465 <udd_g_ctrlreq+0xb>
+    1a0e:	b7 c1       	rjmp	.+878    	; 0x1d7e <udc_process_setup+0x708>
  *
  * \return true if success
  */
 static bool udc_req_std_dev_get_configuration(void)
 {
 	if (udd_g_ctrlreq.req.wLength != 1) {
-    19fa:	21 30       	cpi	r18, 0x01	; 1
-    19fc:	31 05       	cpc	r19, r1
-    19fe:	09 f0       	breq	.+2      	; 0x1a02 <udc_process_setup+0x3a2>
-    1a00:	36 c1       	rjmp	.+620    	; 0x1c6e <udc_process_setup+0x60e>
+    1a10:	21 30       	cpi	r18, 0x01	; 1
+    1a12:	31 05       	cpc	r19, r1
+    1a14:	09 f0       	breq	.+2      	; 0x1a18 <udc_process_setup+0x3a2>
+    1a16:	36 c1       	rjmp	.+620    	; 0x1c84 <udc_process_setup+0x60e>
 		return false;
 	}
 
 	udd_set_setup_payload(&udc_num_configuration,1);
-    1a02:	61 e0       	ldi	r22, 0x01	; 1
-    1a04:	70 e0       	ldi	r23, 0x00	; 0
-    1a06:	8e eb       	ldi	r24, 0xBE	; 190
-    1a08:	90 e2       	ldi	r25, 0x20	; 32
-    1a0a:	5c d5       	rcall	.+2744   	; 0x24c4 <udd_set_setup_payload>
-    1a0c:	ad c1       	rjmp	.+858    	; 0x1d68 <udc_process_setup+0x708>
+    1a18:	61 e0       	ldi	r22, 0x01	; 1
+    1a1a:	70 e0       	ldi	r23, 0x00	; 0
+    1a1c:	8e eb       	ldi	r24, 0xBE	; 190
+    1a1e:	90 e2       	ldi	r25, 0x20	; 32
+    1a20:	5c d5       	rcall	.+2744   	; 0x24da <udd_set_setup_payload>
+    1a22:	ad c1       	rjmp	.+858    	; 0x1d7e <udc_process_setup+0x708>
 			default:
 				break;
 			}
 		}
 
 		if (USB_REQ_RECIP_INTERFACE == Udd_setup_recipient()) {
-    1a0e:	81 30       	cpi	r24, 0x01	; 1
-    1a10:	e1 f5       	brne	.+120    	; 0x1a8a <udc_process_setup+0x42a>
+    1a24:	81 30       	cpi	r24, 0x01	; 1
+    1a26:	e1 f5       	brne	.+120    	; 0x1aa0 <udc_process_setup+0x42a>
 			// Standard Get Interface request
 			switch (udd_g_ctrlreq.req.bRequest) {
-    1a12:	90 91 5b 24 	lds	r25, 0x245B	; 0x80245b <udd_g_ctrlreq+0x1>
-    1a16:	9a 30       	cpi	r25, 0x0A	; 10
-    1a18:	c1 f5       	brne	.+112    	; 0x1a8a <udc_process_setup+0x42a>
+    1a28:	90 91 5b 24 	lds	r25, 0x245B	; 0x80245b <udd_g_ctrlreq+0x1>
+    1a2c:	9a 30       	cpi	r25, 0x0A	; 10
+    1a2e:	c1 f5       	brne	.+112    	; 0x1aa0 <udc_process_setup+0x42a>
 static bool udc_req_std_iface_get_setting(void)
 {
 	uint8_t iface_num;
 	udi_api_t UDC_DESC_STORAGE *udi_api;
 
 	if (udd_g_ctrlreq.req.wLength != 1) {
-    1a1a:	21 30       	cpi	r18, 0x01	; 1
-    1a1c:	31 05       	cpc	r19, r1
-    1a1e:	09 f0       	breq	.+2      	; 0x1a22 <udc_process_setup+0x3c2>
-    1a20:	26 c1       	rjmp	.+588    	; 0x1c6e <udc_process_setup+0x60e>
+    1a30:	21 30       	cpi	r18, 0x01	; 1
+    1a32:	31 05       	cpc	r19, r1
+    1a34:	09 f0       	breq	.+2      	; 0x1a38 <udc_process_setup+0x3c2>
+    1a36:	26 c1       	rjmp	.+588    	; 0x1c84 <udc_process_setup+0x60e>
 		return false; // Error in request
 	}
 	if (!udc_num_configuration) {
-    1a22:	80 91 be 20 	lds	r24, 0x20BE	; 0x8020be <udc_num_configuration>
-    1a26:	88 23       	and	r24, r24
-    1a28:	09 f4       	brne	.+2      	; 0x1a2c <udc_process_setup+0x3cc>
-    1a2a:	21 c1       	rjmp	.+578    	; 0x1c6e <udc_process_setup+0x60e>
+    1a38:	80 91 be 20 	lds	r24, 0x20BE	; 0x8020be <udc_num_configuration>
+    1a3c:	88 23       	and	r24, r24
+    1a3e:	09 f4       	brne	.+2      	; 0x1a42 <udc_process_setup+0x3cc>
+    1a40:	21 c1       	rjmp	.+578    	; 0x1c84 <udc_process_setup+0x60e>
 		return false; // The device is not is configured state yet
 	}
 
 	// Check the interface number included in the request
 	iface_num = udd_g_ctrlreq.req.wIndex & 0xFF;
-    1a2c:	c0 91 5e 24 	lds	r28, 0x245E	; 0x80245e <udd_g_ctrlreq+0x4>
-    1a30:	d0 91 5f 24 	lds	r29, 0x245F	; 0x80245f <udd_g_ctrlreq+0x5>
+    1a42:	c0 91 5e 24 	lds	r28, 0x245E	; 0x80245e <udd_g_ctrlreq+0x4>
+    1a46:	d0 91 5f 24 	lds	r29, 0x245F	; 0x80245f <udd_g_ctrlreq+0x5>
 	if (iface_num >= udc_ptr_conf->desc->bNumInterfaces) {
-    1a34:	00 91 bc 20 	lds	r16, 0x20BC	; 0x8020bc <udc_ptr_conf>
-    1a38:	10 91 bd 20 	lds	r17, 0x20BD	; 0x8020bd <udc_ptr_conf+0x1>
-    1a3c:	d8 01       	movw	r26, r16
-    1a3e:	ed 91       	ld	r30, X+
-    1a40:	fc 91       	ld	r31, X
-    1a42:	84 81       	ldd	r24, Z+4	; 0x04
-    1a44:	c8 17       	cp	r28, r24
-    1a46:	08 f0       	brcs	.+2      	; 0x1a4a <udc_process_setup+0x3ea>
-    1a48:	12 c1       	rjmp	.+548    	; 0x1c6e <udc_process_setup+0x60e>
+    1a4a:	00 91 bc 20 	lds	r16, 0x20BC	; 0x8020bc <udc_ptr_conf>
+    1a4e:	10 91 bd 20 	lds	r17, 0x20BD	; 0x8020bd <udc_ptr_conf+0x1>
+    1a52:	d8 01       	movw	r26, r16
+    1a54:	ed 91       	ld	r30, X+
+    1a56:	fc 91       	ld	r31, X
+    1a58:	84 81       	ldd	r24, Z+4	; 0x04
+    1a5a:	c8 17       	cp	r28, r24
+    1a5c:	08 f0       	brcs	.+2      	; 0x1a60 <udc_process_setup+0x3ea>
+    1a5e:	12 c1       	rjmp	.+548    	; 0x1c84 <udc_process_setup+0x60e>
 		return false;
 	}
 
 	// Select first alternate setting of the interface to update udc_ptr_iface
 	// before call iface->getsetting()
 	if (!udc_update_iface_desc(iface_num, 0)) {
-    1a4a:	60 e0       	ldi	r22, 0x00	; 0
-    1a4c:	8c 2f       	mov	r24, r28
-    1a4e:	fe dc       	rcall	.-1540   	; 0x144c <udc_update_iface_desc>
-    1a50:	88 23       	and	r24, r24
-    1a52:	09 f4       	brne	.+2      	; 0x1a56 <udc_process_setup+0x3f6>
-    1a54:	0c c1       	rjmp	.+536    	; 0x1c6e <udc_process_setup+0x60e>
+    1a60:	60 e0       	ldi	r22, 0x00	; 0
+    1a62:	8c 2f       	mov	r24, r28
+    1a64:	fe dc       	rcall	.-1540   	; 0x1462 <udc_update_iface_desc>
+    1a66:	88 23       	and	r24, r24
+    1a68:	09 f4       	brne	.+2      	; 0x1a6c <udc_process_setup+0x3f6>
+    1a6a:	0c c1       	rjmp	.+536    	; 0x1c84 <udc_process_setup+0x60e>
 		return false;
 	}
 	// Get alternate setting from UDI
 	udi_api = udc_ptr_conf->udi_apis[iface_num];
-    1a56:	ce 01       	movw	r24, r28
-    1a58:	99 27       	eor	r25, r25
-    1a5a:	88 0f       	add	r24, r24
-    1a5c:	99 1f       	adc	r25, r25
-    1a5e:	d8 01       	movw	r26, r16
-    1a60:	12 96       	adiw	r26, 0x02	; 2
-    1a62:	ed 91       	ld	r30, X+
-    1a64:	fc 91       	ld	r31, X
-    1a66:	13 97       	sbiw	r26, 0x03	; 3
-    1a68:	e8 0f       	add	r30, r24
-    1a6a:	f9 1f       	adc	r31, r25
+    1a6c:	ce 01       	movw	r24, r28
+    1a6e:	99 27       	eor	r25, r25
+    1a70:	88 0f       	add	r24, r24
+    1a72:	99 1f       	adc	r25, r25
+    1a74:	d8 01       	movw	r26, r16
+    1a76:	12 96       	adiw	r26, 0x02	; 2
+    1a78:	ed 91       	ld	r30, X+
+    1a7a:	fc 91       	ld	r31, X
+    1a7c:	13 97       	sbiw	r26, 0x03	; 3
+    1a7e:	e8 0f       	add	r30, r24
+    1a80:	f9 1f       	adc	r31, r25
 	udc_iface_setting = udi_api->getsetting();
-    1a6c:	01 90       	ld	r0, Z+
-    1a6e:	f0 81       	ld	r31, Z
-    1a70:	e0 2d       	mov	r30, r0
-    1a72:	86 81       	ldd	r24, Z+6	; 0x06
-    1a74:	97 81       	ldd	r25, Z+7	; 0x07
-    1a76:	fc 01       	movw	r30, r24
-    1a78:	09 95       	icall
-    1a7a:	80 93 c0 20 	sts	0x20C0, r24	; 0x8020c0 <udc_iface_setting>
+    1a82:	01 90       	ld	r0, Z+
+    1a84:	f0 81       	ld	r31, Z
+    1a86:	e0 2d       	mov	r30, r0
+    1a88:	86 81       	ldd	r24, Z+6	; 0x06
+    1a8a:	97 81       	ldd	r25, Z+7	; 0x07
+    1a8c:	fc 01       	movw	r30, r24
+    1a8e:	09 95       	icall
+    1a90:	80 93 c0 20 	sts	0x20C0, r24	; 0x8020c0 <udc_iface_setting>
 
 	// Link value to payload pointer of request
 	udd_set_setup_payload(&udc_iface_setting,1);
-    1a7e:	61 e0       	ldi	r22, 0x01	; 1
-    1a80:	70 e0       	ldi	r23, 0x00	; 0
-    1a82:	80 ec       	ldi	r24, 0xC0	; 192
-    1a84:	90 e2       	ldi	r25, 0x20	; 32
-    1a86:	1e d5       	rcall	.+2620   	; 0x24c4 <udd_set_setup_payload>
-    1a88:	6f c1       	rjmp	.+734    	; 0x1d68 <udc_process_setup+0x708>
+    1a94:	61 e0       	ldi	r22, 0x01	; 1
+    1a96:	70 e0       	ldi	r23, 0x00	; 0
+    1a98:	80 ec       	ldi	r24, 0xC0	; 192
+    1a9a:	90 e2       	ldi	r25, 0x20	; 32
+    1a9c:	1e d5       	rcall	.+2620   	; 0x24da <udd_set_setup_payload>
+    1a9e:	6f c1       	rjmp	.+734    	; 0x1d7e <udc_process_setup+0x708>
 			default:
 				break;
 			}
 		}
 #if (0!=USB_DEVICE_MAX_EP)
 		if (USB_REQ_RECIP_ENDPOINT == Udd_setup_recipient()) {
-    1a8a:	82 30       	cpi	r24, 0x02	; 2
-    1a8c:	09 f0       	breq	.+2      	; 0x1a90 <udc_process_setup+0x430>
-    1a8e:	ef c0       	rjmp	.+478    	; 0x1c6e <udc_process_setup+0x60e>
+    1aa0:	82 30       	cpi	r24, 0x02	; 2
+    1aa2:	09 f0       	breq	.+2      	; 0x1aa6 <udc_process_setup+0x430>
+    1aa4:	ef c0       	rjmp	.+478    	; 0x1c84 <udc_process_setup+0x60e>
 			// Standard Get Endpoint request
 			switch (udd_g_ctrlreq.req.bRequest) {
-    1a90:	80 91 5b 24 	lds	r24, 0x245B	; 0x80245b <udd_g_ctrlreq+0x1>
-    1a94:	81 11       	cpse	r24, r1
-    1a96:	e4 c0       	rjmp	.+456    	; 0x1c60 <udc_process_setup+0x600>
+    1aa6:	80 91 5b 24 	lds	r24, 0x245B	; 0x80245b <udd_g_ctrlreq+0x1>
+    1aaa:	81 11       	cpse	r24, r1
+    1aac:	e4 c0       	rjmp	.+456    	; 0x1c76 <udc_process_setup+0x600>
  */
 static bool udc_req_std_ep_get_status(void)
 {
 	static le16_t udc_ep_status;
 
 	if (udd_g_ctrlreq.req.wLength != sizeof(udc_ep_status)) {
-    1a98:	22 30       	cpi	r18, 0x02	; 2
-    1a9a:	31 05       	cpc	r19, r1
-    1a9c:	09 f0       	breq	.+2      	; 0x1aa0 <udc_process_setup+0x440>
-    1a9e:	e7 c0       	rjmp	.+462    	; 0x1c6e <udc_process_setup+0x60e>
+    1aae:	22 30       	cpi	r18, 0x02	; 2
+    1ab0:	31 05       	cpc	r19, r1
+    1ab2:	09 f0       	breq	.+2      	; 0x1ab6 <udc_process_setup+0x440>
+    1ab4:	e7 c0       	rjmp	.+462    	; 0x1c84 <udc_process_setup+0x60e>
 		return false;
 	}
 
 	udc_ep_status = udd_ep_is_halted(udd_g_ctrlreq.req.
-    1aa0:	80 91 5e 24 	lds	r24, 0x245E	; 0x80245e <udd_g_ctrlreq+0x4>
-    1aa4:	8b d5       	rcall	.+2838   	; 0x25bc <udd_ep_is_halted>
-    1aa6:	90 e0       	ldi	r25, 0x00	; 0
-    1aa8:	80 93 b8 20 	sts	0x20B8, r24	; 0x8020b8 <udc_ep_status.5522>
-    1aac:	90 93 b9 20 	sts	0x20B9, r25	; 0x8020b9 <udc_ep_status.5522+0x1>
+    1ab6:	80 91 5e 24 	lds	r24, 0x245E	; 0x80245e <udd_g_ctrlreq+0x4>
+    1aba:	8b d5       	rcall	.+2838   	; 0x25d2 <udd_ep_is_halted>
+    1abc:	90 e0       	ldi	r25, 0x00	; 0
+    1abe:	80 93 b8 20 	sts	0x20B8, r24	; 0x8020b8 <udc_ep_status.5522>
+    1ac2:	90 93 b9 20 	sts	0x20B9, r25	; 0x8020b9 <udc_ep_status.5522+0x1>
 			wIndex & 0xFF) ? CPU_TO_LE16(USB_EP_STATUS_HALTED) : 0;
 
 	udd_set_setup_payload( (uint8_t *) & udc_ep_status,
-    1ab0:	62 e0       	ldi	r22, 0x02	; 2
-    1ab2:	70 e0       	ldi	r23, 0x00	; 0
-    1ab4:	88 eb       	ldi	r24, 0xB8	; 184
-    1ab6:	90 e2       	ldi	r25, 0x20	; 32
-    1ab8:	05 d5       	rcall	.+2570   	; 0x24c4 <udd_set_setup_payload>
-    1aba:	56 c1       	rjmp	.+684    	; 0x1d68 <udc_process_setup+0x708>
+    1ac6:	62 e0       	ldi	r22, 0x02	; 2
+    1ac8:	70 e0       	ldi	r23, 0x00	; 0
+    1aca:	88 eb       	ldi	r24, 0xB8	; 184
+    1acc:	90 e2       	ldi	r25, 0x20	; 32
+    1ace:	05 d5       	rcall	.+2570   	; 0x24da <udd_set_setup_payload>
+    1ad0:	56 c1       	rjmp	.+684    	; 0x1d7e <udc_process_setup+0x708>
 			}
 		}
 #endif
 	} else {
 		// SET Standard Requests
 		if (USB_REQ_RECIP_DEVICE == Udd_setup_recipient()) {
-    1abc:	8f 71       	andi	r24, 0x1F	; 31
-    1abe:	09 f0       	breq	.+2      	; 0x1ac2 <udc_process_setup+0x462>
-    1ac0:	83 c0       	rjmp	.+262    	; 0x1bc8 <udc_process_setup+0x568>
+    1ad2:	8f 71       	andi	r24, 0x1F	; 31
+    1ad4:	09 f0       	breq	.+2      	; 0x1ad8 <udc_process_setup+0x462>
+    1ad6:	83 c0       	rjmp	.+262    	; 0x1bde <udc_process_setup+0x568>
 			// Standard Set Device request
 			switch (udd_g_ctrlreq.req.bRequest) {
-    1ac2:	90 91 5b 24 	lds	r25, 0x245B	; 0x80245b <udd_g_ctrlreq+0x1>
-    1ac6:	93 30       	cpi	r25, 0x03	; 3
-    1ac8:	09 f4       	brne	.+2      	; 0x1acc <udc_process_setup+0x46c>
-    1aca:	cc c0       	rjmp	.+408    	; 0x1c64 <udc_process_setup+0x604>
-    1acc:	18 f4       	brcc	.+6      	; 0x1ad4 <udc_process_setup+0x474>
-    1ace:	91 30       	cpi	r25, 0x01	; 1
-    1ad0:	a1 f0       	breq	.+40     	; 0x1afa <udc_process_setup+0x49a>
-    1ad2:	7a c0       	rjmp	.+244    	; 0x1bc8 <udc_process_setup+0x568>
-    1ad4:	95 30       	cpi	r25, 0x05	; 5
-    1ad6:	19 f0       	breq	.+6      	; 0x1ade <udc_process_setup+0x47e>
-    1ad8:	99 30       	cpi	r25, 0x09	; 9
-    1ada:	39 f1       	breq	.+78     	; 0x1b2a <udc_process_setup+0x4ca>
-    1adc:	75 c0       	rjmp	.+234    	; 0x1bc8 <udc_process_setup+0x568>
+    1ad8:	90 91 5b 24 	lds	r25, 0x245B	; 0x80245b <udd_g_ctrlreq+0x1>
+    1adc:	93 30       	cpi	r25, 0x03	; 3
+    1ade:	09 f4       	brne	.+2      	; 0x1ae2 <udc_process_setup+0x46c>
+    1ae0:	cc c0       	rjmp	.+408    	; 0x1c7a <udc_process_setup+0x604>
+    1ae2:	18 f4       	brcc	.+6      	; 0x1aea <udc_process_setup+0x474>
+    1ae4:	91 30       	cpi	r25, 0x01	; 1
+    1ae6:	a1 f0       	breq	.+40     	; 0x1b10 <udc_process_setup+0x49a>
+    1ae8:	7a c0       	rjmp	.+244    	; 0x1bde <udc_process_setup+0x568>
+    1aea:	95 30       	cpi	r25, 0x05	; 5
+    1aec:	19 f0       	breq	.+6      	; 0x1af4 <udc_process_setup+0x47e>
+    1aee:	99 30       	cpi	r25, 0x09	; 9
+    1af0:	39 f1       	breq	.+78     	; 0x1b40 <udc_process_setup+0x4ca>
+    1af2:	75 c0       	rjmp	.+234    	; 0x1bde <udc_process_setup+0x568>
  *
  * \return true if success
  */
 static bool udc_req_std_dev_set_address(void)
 {
 	if (udd_g_ctrlreq.req.wLength) {
-    1ade:	80 91 60 24 	lds	r24, 0x2460	; 0x802460 <udd_g_ctrlreq+0x6>
-    1ae2:	90 91 61 24 	lds	r25, 0x2461	; 0x802461 <udd_g_ctrlreq+0x7>
-    1ae6:	89 2b       	or	r24, r25
-    1ae8:	09 f0       	breq	.+2      	; 0x1aec <udc_process_setup+0x48c>
-    1aea:	c1 c0       	rjmp	.+386    	; 0x1c6e <udc_process_setup+0x60e>
+    1af4:	80 91 60 24 	lds	r24, 0x2460	; 0x802460 <udd_g_ctrlreq+0x6>
+    1af8:	90 91 61 24 	lds	r25, 0x2461	; 0x802461 <udd_g_ctrlreq+0x7>
+    1afc:	89 2b       	or	r24, r25
+    1afe:	09 f0       	breq	.+2      	; 0x1b02 <udc_process_setup+0x48c>
+    1b00:	c1 c0       	rjmp	.+386    	; 0x1c84 <udc_process_setup+0x60e>
 		return false;
 	}
 
 	// The address must be changed at the end of setup request after the handshake
 	// then we use a callback to change address
 	udd_g_ctrlreq.callback = udc_valid_address;
-    1aec:	80 e2       	ldi	r24, 0x20	; 32
-    1aee:	9a e0       	ldi	r25, 0x0A	; 10
-    1af0:	80 93 66 24 	sts	0x2466, r24	; 0x802466 <udd_g_ctrlreq+0xc>
-    1af4:	90 93 67 24 	sts	0x2467, r25	; 0x802467 <udd_g_ctrlreq+0xd>
-    1af8:	37 c1       	rjmp	.+622    	; 0x1d68 <udc_process_setup+0x708>
+    1b02:	8b e2       	ldi	r24, 0x2B	; 43
+    1b04:	9a e0       	ldi	r25, 0x0A	; 10
+    1b06:	80 93 66 24 	sts	0x2466, r24	; 0x802466 <udd_g_ctrlreq+0xc>
+    1b0a:	90 93 67 24 	sts	0x2467, r25	; 0x802467 <udd_g_ctrlreq+0xd>
+    1b0e:	37 c1       	rjmp	.+622    	; 0x1d7e <udc_process_setup+0x708>
  *
  * \return true if success
  */
 static bool udc_req_std_dev_clear_feature(void)
 {
 	if (udd_g_ctrlreq.req.wLength) {
-    1afa:	80 91 60 24 	lds	r24, 0x2460	; 0x802460 <udd_g_ctrlreq+0x6>
-    1afe:	90 91 61 24 	lds	r25, 0x2461	; 0x802461 <udd_g_ctrlreq+0x7>
-    1b02:	89 2b       	or	r24, r25
-    1b04:	09 f0       	breq	.+2      	; 0x1b08 <udc_process_setup+0x4a8>
-    1b06:	b3 c0       	rjmp	.+358    	; 0x1c6e <udc_process_setup+0x60e>
+    1b10:	80 91 60 24 	lds	r24, 0x2460	; 0x802460 <udd_g_ctrlreq+0x6>
+    1b14:	90 91 61 24 	lds	r25, 0x2461	; 0x802461 <udd_g_ctrlreq+0x7>
+    1b18:	89 2b       	or	r24, r25
+    1b1a:	09 f0       	breq	.+2      	; 0x1b1e <udc_process_setup+0x4a8>
+    1b1c:	b3 c0       	rjmp	.+358    	; 0x1c84 <udc_process_setup+0x60e>
 		return false;
 	}
 
 	if (udd_g_ctrlreq.req.wValue == USB_DEV_FEATURE_REMOTE_WAKEUP) {
-    1b08:	80 91 5c 24 	lds	r24, 0x245C	; 0x80245c <udd_g_ctrlreq+0x2>
-    1b0c:	90 91 5d 24 	lds	r25, 0x245D	; 0x80245d <udd_g_ctrlreq+0x3>
-    1b10:	01 97       	sbiw	r24, 0x01	; 1
-    1b12:	09 f0       	breq	.+2      	; 0x1b16 <udc_process_setup+0x4b6>
-    1b14:	ac c0       	rjmp	.+344    	; 0x1c6e <udc_process_setup+0x60e>
+    1b1e:	80 91 5c 24 	lds	r24, 0x245C	; 0x80245c <udd_g_ctrlreq+0x2>
+    1b22:	90 91 5d 24 	lds	r25, 0x245D	; 0x80245d <udd_g_ctrlreq+0x3>
+    1b26:	01 97       	sbiw	r24, 0x01	; 1
+    1b28:	09 f0       	breq	.+2      	; 0x1b2c <udc_process_setup+0x4b6>
+    1b2a:	ac c0       	rjmp	.+344    	; 0x1c84 <udc_process_setup+0x60e>
 		udc_device_status &= CPU_TO_LE16(~(uint32_t)USB_DEV_STATUS_REMOTEWAKEUP);
-    1b16:	80 91 c2 20 	lds	r24, 0x20C2	; 0x8020c2 <udc_device_status>
-    1b1a:	90 91 c3 20 	lds	r25, 0x20C3	; 0x8020c3 <udc_device_status+0x1>
-    1b1e:	8d 7f       	andi	r24, 0xFD	; 253
-    1b20:	80 93 c2 20 	sts	0x20C2, r24	; 0x8020c2 <udc_device_status>
-    1b24:	90 93 c3 20 	sts	0x20C3, r25	; 0x8020c3 <udc_device_status+0x1>
-    1b28:	1f c1       	rjmp	.+574    	; 0x1d68 <udc_process_setup+0x708>
+    1b2c:	80 91 c2 20 	lds	r24, 0x20C2	; 0x8020c2 <udc_device_status>
+    1b30:	90 91 c3 20 	lds	r25, 0x20C3	; 0x8020c3 <udc_device_status+0x1>
+    1b34:	8d 7f       	andi	r24, 0xFD	; 253
+    1b36:	80 93 c2 20 	sts	0x20C2, r24	; 0x8020c2 <udc_device_status>
+    1b3a:	90 93 c3 20 	sts	0x20C3, r25	; 0x8020c3 <udc_device_status+0x1>
+    1b3e:	1f c1       	rjmp	.+574    	; 0x1d7e <udc_process_setup+0x708>
 static bool udc_req_std_dev_set_configuration(void)
 {
 	uint8_t iface_num;
 
 	// Check request length
 	if (udd_g_ctrlreq.req.wLength) {
-    1b2a:	80 91 60 24 	lds	r24, 0x2460	; 0x802460 <udd_g_ctrlreq+0x6>
-    1b2e:	90 91 61 24 	lds	r25, 0x2461	; 0x802461 <udd_g_ctrlreq+0x7>
-    1b32:	89 2b       	or	r24, r25
-    1b34:	09 f0       	breq	.+2      	; 0x1b38 <udc_process_setup+0x4d8>
-    1b36:	9b c0       	rjmp	.+310    	; 0x1c6e <udc_process_setup+0x60e>
+    1b40:	80 91 60 24 	lds	r24, 0x2460	; 0x802460 <udd_g_ctrlreq+0x6>
+    1b44:	90 91 61 24 	lds	r25, 0x2461	; 0x802461 <udd_g_ctrlreq+0x7>
+    1b48:	89 2b       	or	r24, r25
+    1b4a:	09 f0       	breq	.+2      	; 0x1b4e <udc_process_setup+0x4d8>
+    1b4c:	9b c0       	rjmp	.+310    	; 0x1c84 <udc_process_setup+0x60e>
 		return false;
 	}
 	// Authorize configuration only if the address is valid
 	if (!udd_getaddress()) {
-    1b38:	c2 d4       	rcall	.+2436   	; 0x24be <udd_getaddress>
-    1b3a:	88 23       	and	r24, r24
-    1b3c:	09 f4       	brne	.+2      	; 0x1b40 <udc_process_setup+0x4e0>
-    1b3e:	97 c0       	rjmp	.+302    	; 0x1c6e <udc_process_setup+0x60e>
+    1b4e:	c2 d4       	rcall	.+2436   	; 0x24d4 <udd_getaddress>
+    1b50:	88 23       	and	r24, r24
+    1b52:	09 f4       	brne	.+2      	; 0x1b56 <udc_process_setup+0x4e0>
+    1b54:	97 c0       	rjmp	.+302    	; 0x1c84 <udc_process_setup+0x60e>
 		}
 	} else
 #endif
 	{
 		// FS descriptor
 		if ((udd_g_ctrlreq.req.wValue & 0xFF) >
-    1b40:	20 91 5c 24 	lds	r18, 0x245C	; 0x80245c <udd_g_ctrlreq+0x2>
-    1b44:	30 91 5d 24 	lds	r19, 0x245D	; 0x80245d <udd_g_ctrlreq+0x3>
-    1b48:	33 27       	eor	r19, r19
+    1b56:	20 91 5c 24 	lds	r18, 0x245C	; 0x80245c <udd_g_ctrlreq+0x2>
+    1b5a:	30 91 5d 24 	lds	r19, 0x245D	; 0x80245d <udd_g_ctrlreq+0x3>
+    1b5e:	33 27       	eor	r19, r19
 				udc_config.confdev_lsfs->bNumConfigurations) {
-    1b4a:	e0 91 10 20 	lds	r30, 0x2010	; 0x802010 <udc_config>
-    1b4e:	f0 91 11 20 	lds	r31, 0x2011	; 0x802011 <udc_config+0x1>
+    1b60:	e0 91 10 20 	lds	r30, 0x2010	; 0x802010 <udc_config>
+    1b64:	f0 91 11 20 	lds	r31, 0x2011	; 0x802011 <udc_config+0x1>
 		}
 	} else
 #endif
 	{
 		// FS descriptor
 		if ((udd_g_ctrlreq.req.wValue & 0xFF) >
-    1b52:	81 89       	ldd	r24, Z+17	; 0x11
-    1b54:	90 e0       	ldi	r25, 0x00	; 0
-    1b56:	82 17       	cp	r24, r18
-    1b58:	93 07       	cpc	r25, r19
-    1b5a:	08 f4       	brcc	.+2      	; 0x1b5e <udc_process_setup+0x4fe>
-    1b5c:	88 c0       	rjmp	.+272    	; 0x1c6e <udc_process_setup+0x60e>
+    1b68:	81 89       	ldd	r24, Z+17	; 0x11
+    1b6a:	90 e0       	ldi	r25, 0x00	; 0
+    1b6c:	82 17       	cp	r24, r18
+    1b6e:	93 07       	cpc	r25, r19
+    1b70:	08 f4       	brcc	.+2      	; 0x1b74 <udc_process_setup+0x4fe>
+    1b72:	88 c0       	rjmp	.+272    	; 0x1c84 <udc_process_setup+0x60e>
 			return false;
 		}
 	}
 
 	// Reset current configuration
 	udc_reset();
-    1b5e:	2b dd       	rcall	.-1450   	; 0x15b6 <udc_reset>
+    1b74:	2b dd       	rcall	.-1450   	; 0x15cc <udc_reset>
 
 	// Enable new configuration
 	udc_num_configuration = udd_g_ctrlreq.req.wValue & 0xFF;
-    1b60:	80 91 5c 24 	lds	r24, 0x245C	; 0x80245c <udd_g_ctrlreq+0x2>
-    1b64:	90 91 5d 24 	lds	r25, 0x245D	; 0x80245d <udd_g_ctrlreq+0x3>
-    1b68:	80 93 be 20 	sts	0x20BE, r24	; 0x8020be <udc_num_configuration>
+    1b76:	80 91 5c 24 	lds	r24, 0x245C	; 0x80245c <udd_g_ctrlreq+0x2>
+    1b7a:	90 91 5d 24 	lds	r25, 0x245D	; 0x80245d <udd_g_ctrlreq+0x3>
+    1b7e:	80 93 be 20 	sts	0x20BE, r24	; 0x8020be <udc_num_configuration>
 	if (udc_num_configuration == 0) {
-    1b6c:	88 23       	and	r24, r24
-    1b6e:	09 f4       	brne	.+2      	; 0x1b72 <udc_process_setup+0x512>
-    1b70:	fb c0       	rjmp	.+502    	; 0x1d68 <udc_process_setup+0x708>
+    1b82:	88 23       	and	r24, r24
+    1b84:	09 f4       	brne	.+2      	; 0x1b88 <udc_process_setup+0x512>
+    1b86:	fb c0       	rjmp	.+502    	; 0x1d7e <udc_process_setup+0x708>
 		udc_ptr_conf = &udc_config.conf_hs[udc_num_configuration - 1];
 	} else
 #endif
 	{
 		// FS descriptor
 		udc_ptr_conf = &udc_config.conf_lsfs[udc_num_configuration - 1];
-    1b72:	99 27       	eor	r25, r25
-    1b74:	81 50       	subi	r24, 0x01	; 1
-    1b76:	90 4c       	sbci	r25, 0xC0	; 192
-    1b78:	88 0f       	add	r24, r24
-    1b7a:	99 1f       	adc	r25, r25
-    1b7c:	88 0f       	add	r24, r24
-    1b7e:	99 1f       	adc	r25, r25
-    1b80:	e0 91 12 20 	lds	r30, 0x2012	; 0x802012 <udc_config+0x2>
-    1b84:	f0 91 13 20 	lds	r31, 0x2013	; 0x802013 <udc_config+0x3>
-    1b88:	e8 0f       	add	r30, r24
-    1b8a:	f9 1f       	adc	r31, r25
-    1b8c:	e0 93 bc 20 	sts	0x20BC, r30	; 0x8020bc <udc_ptr_conf>
-    1b90:	f0 93 bd 20 	sts	0x20BD, r31	; 0x8020bd <udc_ptr_conf+0x1>
+    1b88:	99 27       	eor	r25, r25
+    1b8a:	81 50       	subi	r24, 0x01	; 1
+    1b8c:	90 4c       	sbci	r25, 0xC0	; 192
+    1b8e:	88 0f       	add	r24, r24
+    1b90:	99 1f       	adc	r25, r25
+    1b92:	88 0f       	add	r24, r24
+    1b94:	99 1f       	adc	r25, r25
+    1b96:	e0 91 12 20 	lds	r30, 0x2012	; 0x802012 <udc_config+0x2>
+    1b9a:	f0 91 13 20 	lds	r31, 0x2013	; 0x802013 <udc_config+0x3>
+    1b9e:	e8 0f       	add	r30, r24
+    1ba0:	f9 1f       	adc	r31, r25
+    1ba2:	e0 93 bc 20 	sts	0x20BC, r30	; 0x8020bc <udc_ptr_conf>
+    1ba6:	f0 93 bd 20 	sts	0x20BD, r31	; 0x8020bd <udc_ptr_conf+0x1>
 	}
 	// Enable all interfaces of the selected configuration
 	for (iface_num = 0; iface_num < udc_ptr_conf->desc->bNumInterfaces;
-    1b94:	01 90       	ld	r0, Z+
-    1b96:	f0 81       	ld	r31, Z
-    1b98:	e0 2d       	mov	r30, r0
-    1b9a:	84 81       	ldd	r24, Z+4	; 0x04
-    1b9c:	88 23       	and	r24, r24
-    1b9e:	09 f4       	brne	.+2      	; 0x1ba2 <udc_process_setup+0x542>
-    1ba0:	e3 c0       	rjmp	.+454    	; 0x1d68 <udc_process_setup+0x708>
-    1ba2:	c0 e0       	ldi	r28, 0x00	; 0
+    1baa:	01 90       	ld	r0, Z+
+    1bac:	f0 81       	ld	r31, Z
+    1bae:	e0 2d       	mov	r30, r0
+    1bb0:	84 81       	ldd	r24, Z+4	; 0x04
+    1bb2:	88 23       	and	r24, r24
+    1bb4:	09 f4       	brne	.+2      	; 0x1bb8 <udc_process_setup+0x542>
+    1bb6:	e3 c0       	rjmp	.+454    	; 0x1d7e <udc_process_setup+0x708>
+    1bb8:	c0 e0       	ldi	r28, 0x00	; 0
 			iface_num++) {
 		if (!udc_iface_enable(iface_num, 0)) {
-    1ba4:	60 e0       	ldi	r22, 0x00	; 0
-    1ba6:	8c 2f       	mov	r24, r28
-    1ba8:	cd dc       	rcall	.-1638   	; 0x1544 <udc_iface_enable>
-    1baa:	88 23       	and	r24, r24
-    1bac:	09 f4       	brne	.+2      	; 0x1bb0 <udc_process_setup+0x550>
-    1bae:	5f c0       	rjmp	.+190    	; 0x1c6e <udc_process_setup+0x60e>
+    1bba:	60 e0       	ldi	r22, 0x00	; 0
+    1bbc:	8c 2f       	mov	r24, r28
+    1bbe:	cd dc       	rcall	.-1638   	; 0x155a <udc_iface_enable>
+    1bc0:	88 23       	and	r24, r24
+    1bc2:	09 f4       	brne	.+2      	; 0x1bc6 <udc_process_setup+0x550>
+    1bc4:	5f c0       	rjmp	.+190    	; 0x1c84 <udc_process_setup+0x60e>
 		// FS descriptor
 		udc_ptr_conf = &udc_config.conf_lsfs[udc_num_configuration - 1];
 	}
 	// Enable all interfaces of the selected configuration
 	for (iface_num = 0; iface_num < udc_ptr_conf->desc->bNumInterfaces;
 			iface_num++) {
-    1bb0:	cf 5f       	subi	r28, 0xFF	; 255
+    1bc6:	cf 5f       	subi	r28, 0xFF	; 255
 	{
 		// FS descriptor
 		udc_ptr_conf = &udc_config.conf_lsfs[udc_num_configuration - 1];
 	}
 	// Enable all interfaces of the selected configuration
 	for (iface_num = 0; iface_num < udc_ptr_conf->desc->bNumInterfaces;
-    1bb2:	e0 91 bc 20 	lds	r30, 0x20BC	; 0x8020bc <udc_ptr_conf>
-    1bb6:	f0 91 bd 20 	lds	r31, 0x20BD	; 0x8020bd <udc_ptr_conf+0x1>
-    1bba:	01 90       	ld	r0, Z+
-    1bbc:	f0 81       	ld	r31, Z
-    1bbe:	e0 2d       	mov	r30, r0
-    1bc0:	84 81       	ldd	r24, Z+4	; 0x04
-    1bc2:	c8 17       	cp	r28, r24
-    1bc4:	78 f3       	brcs	.-34     	; 0x1ba4 <udc_process_setup+0x544>
-    1bc6:	d0 c0       	rjmp	.+416    	; 0x1d68 <udc_process_setup+0x708>
+    1bc8:	e0 91 bc 20 	lds	r30, 0x20BC	; 0x8020bc <udc_ptr_conf>
+    1bcc:	f0 91 bd 20 	lds	r31, 0x20BD	; 0x8020bd <udc_ptr_conf+0x1>
+    1bd0:	01 90       	ld	r0, Z+
+    1bd2:	f0 81       	ld	r31, Z
+    1bd4:	e0 2d       	mov	r30, r0
+    1bd6:	84 81       	ldd	r24, Z+4	; 0x04
+    1bd8:	c8 17       	cp	r28, r24
+    1bda:	78 f3       	brcs	.-34     	; 0x1bba <udc_process_setup+0x544>
+    1bdc:	d0 c0       	rjmp	.+416    	; 0x1d7e <udc_process_setup+0x708>
 			default:
 				break;
 			}
 		}
 
 		if (USB_REQ_RECIP_INTERFACE == Udd_setup_recipient()) {
-    1bc8:	81 30       	cpi	r24, 0x01	; 1
-    1bca:	e1 f4       	brne	.+56     	; 0x1c04 <udc_process_setup+0x5a4>
+    1bde:	81 30       	cpi	r24, 0x01	; 1
+    1be0:	e1 f4       	brne	.+56     	; 0x1c1a <udc_process_setup+0x5a4>
 			// Standard Set Interface request
 			switch (udd_g_ctrlreq.req.bRequest) {
-    1bcc:	90 91 5b 24 	lds	r25, 0x245B	; 0x80245b <udd_g_ctrlreq+0x1>
-    1bd0:	9b 30       	cpi	r25, 0x0B	; 11
-    1bd2:	c1 f4       	brne	.+48     	; 0x1c04 <udc_process_setup+0x5a4>
+    1be2:	90 91 5b 24 	lds	r25, 0x245B	; 0x80245b <udd_g_ctrlreq+0x1>
+    1be6:	9b 30       	cpi	r25, 0x0B	; 11
+    1be8:	c1 f4       	brne	.+48     	; 0x1c1a <udc_process_setup+0x5a4>
  */
 static bool udc_req_std_iface_set_setting(void)
 {
 	uint8_t iface_num, setting_num;
 
 	if (udd_g_ctrlreq.req.wLength) {
-    1bd4:	80 91 60 24 	lds	r24, 0x2460	; 0x802460 <udd_g_ctrlreq+0x6>
-    1bd8:	90 91 61 24 	lds	r25, 0x2461	; 0x802461 <udd_g_ctrlreq+0x7>
-    1bdc:	89 2b       	or	r24, r25
-    1bde:	09 f0       	breq	.+2      	; 0x1be2 <udc_process_setup+0x582>
-    1be0:	46 c0       	rjmp	.+140    	; 0x1c6e <udc_process_setup+0x60e>
+    1bea:	80 91 60 24 	lds	r24, 0x2460	; 0x802460 <udd_g_ctrlreq+0x6>
+    1bee:	90 91 61 24 	lds	r25, 0x2461	; 0x802461 <udd_g_ctrlreq+0x7>
+    1bf2:	89 2b       	or	r24, r25
+    1bf4:	09 f0       	breq	.+2      	; 0x1bf8 <udc_process_setup+0x582>
+    1bf6:	46 c0       	rjmp	.+140    	; 0x1c84 <udc_process_setup+0x60e>
 		return false; // Error in request
 	}
 	if (!udc_num_configuration) {
-    1be2:	80 91 be 20 	lds	r24, 0x20BE	; 0x8020be <udc_num_configuration>
-    1be6:	88 23       	and	r24, r24
-    1be8:	09 f4       	brne	.+2      	; 0x1bec <udc_process_setup+0x58c>
-    1bea:	41 c0       	rjmp	.+130    	; 0x1c6e <udc_process_setup+0x60e>
+    1bf8:	80 91 be 20 	lds	r24, 0x20BE	; 0x8020be <udc_num_configuration>
+    1bfc:	88 23       	and	r24, r24
+    1bfe:	09 f4       	brne	.+2      	; 0x1c02 <udc_process_setup+0x58c>
+    1c00:	41 c0       	rjmp	.+130    	; 0x1c84 <udc_process_setup+0x60e>
 		return false; // The device is not is configured state yet
 	}
 
 	iface_num = udd_g_ctrlreq.req.wIndex & 0xFF;
-    1bec:	ea e5       	ldi	r30, 0x5A	; 90
-    1bee:	f4 e2       	ldi	r31, 0x24	; 36
-    1bf0:	c4 81       	ldd	r28, Z+4	; 0x04
+    1c02:	ea e5       	ldi	r30, 0x5A	; 90
+    1c04:	f4 e2       	ldi	r31, 0x24	; 36
+    1c06:	c4 81       	ldd	r28, Z+4	; 0x04
 	setting_num = udd_g_ctrlreq.req.wValue & 0xFF;
-    1bf2:	d2 81       	ldd	r29, Z+2	; 0x02
+    1c08:	d2 81       	ldd	r29, Z+2	; 0x02
 
 	// Disable current setting
 	if (!udc_iface_disable(iface_num)) {
-    1bf4:	8c 2f       	mov	r24, r28
-    1bf6:	64 dc       	rcall	.-1848   	; 0x14c0 <udc_iface_disable>
-    1bf8:	88 23       	and	r24, r24
-    1bfa:	c9 f1       	breq	.+114    	; 0x1c6e <udc_process_setup+0x60e>
+    1c0a:	8c 2f       	mov	r24, r28
+    1c0c:	64 dc       	rcall	.-1848   	; 0x14d6 <udc_iface_disable>
+    1c0e:	88 23       	and	r24, r24
+    1c10:	c9 f1       	breq	.+114    	; 0x1c84 <udc_process_setup+0x60e>
 		return false;
 	}
 
 	// Enable new setting
 	return udc_iface_enable(iface_num, setting_num);
-    1bfc:	6d 2f       	mov	r22, r29
-    1bfe:	8c 2f       	mov	r24, r28
-    1c00:	a1 dc       	rcall	.-1726   	; 0x1544 <udc_iface_enable>
-    1c02:	33 c0       	rjmp	.+102    	; 0x1c6a <udc_process_setup+0x60a>
+    1c12:	6d 2f       	mov	r22, r29
+    1c14:	8c 2f       	mov	r24, r28
+    1c16:	a1 dc       	rcall	.-1726   	; 0x155a <udc_iface_enable>
+    1c18:	33 c0       	rjmp	.+102    	; 0x1c80 <udc_process_setup+0x60a>
 			default:
 				break;
 			}
 		}
 #if (0!=USB_DEVICE_MAX_EP)
 		if (USB_REQ_RECIP_ENDPOINT == Udd_setup_recipient()) {
-    1c04:	82 30       	cpi	r24, 0x02	; 2
-    1c06:	99 f5       	brne	.+102    	; 0x1c6e <udc_process_setup+0x60e>
+    1c1a:	82 30       	cpi	r24, 0x02	; 2
+    1c1c:	99 f5       	brne	.+102    	; 0x1c84 <udc_process_setup+0x60e>
 			// Standard Set Endpoint request
 			switch (udd_g_ctrlreq.req.bRequest) {
-    1c08:	80 91 5b 24 	lds	r24, 0x245B	; 0x80245b <udd_g_ctrlreq+0x1>
-    1c0c:	81 30       	cpi	r24, 0x01	; 1
-    1c0e:	19 f0       	breq	.+6      	; 0x1c16 <udc_process_setup+0x5b6>
-    1c10:	83 30       	cpi	r24, 0x03	; 3
-    1c12:	89 f0       	breq	.+34     	; 0x1c36 <udc_process_setup+0x5d6>
-    1c14:	29 c0       	rjmp	.+82     	; 0x1c68 <udc_process_setup+0x608>
+    1c1e:	80 91 5b 24 	lds	r24, 0x245B	; 0x80245b <udd_g_ctrlreq+0x1>
+    1c22:	81 30       	cpi	r24, 0x01	; 1
+    1c24:	19 f0       	breq	.+6      	; 0x1c2c <udc_process_setup+0x5b6>
+    1c26:	83 30       	cpi	r24, 0x03	; 3
+    1c28:	89 f0       	breq	.+34     	; 0x1c4c <udc_process_setup+0x5d6>
+    1c2a:	29 c0       	rjmp	.+82     	; 0x1c7e <udc_process_setup+0x608>
  *
  * \return true if success
  */
 static bool udc_req_std_ep_clear_feature(void)
 {
 	if (udd_g_ctrlreq.req.wLength) {
-    1c16:	80 91 60 24 	lds	r24, 0x2460	; 0x802460 <udd_g_ctrlreq+0x6>
-    1c1a:	90 91 61 24 	lds	r25, 0x2461	; 0x802461 <udd_g_ctrlreq+0x7>
-    1c1e:	89 2b       	or	r24, r25
-    1c20:	31 f5       	brne	.+76     	; 0x1c6e <udc_process_setup+0x60e>
+    1c2c:	80 91 60 24 	lds	r24, 0x2460	; 0x802460 <udd_g_ctrlreq+0x6>
+    1c30:	90 91 61 24 	lds	r25, 0x2461	; 0x802461 <udd_g_ctrlreq+0x7>
+    1c34:	89 2b       	or	r24, r25
+    1c36:	31 f5       	brne	.+76     	; 0x1c84 <udc_process_setup+0x60e>
 		return false;
 	}
 
 	if (udd_g_ctrlreq.req.wValue == USB_EP_FEATURE_HALT) {
-    1c22:	80 91 5c 24 	lds	r24, 0x245C	; 0x80245c <udd_g_ctrlreq+0x2>
-    1c26:	90 91 5d 24 	lds	r25, 0x245D	; 0x80245d <udd_g_ctrlreq+0x3>
-    1c2a:	89 2b       	or	r24, r25
-    1c2c:	01 f5       	brne	.+64     	; 0x1c6e <udc_process_setup+0x60e>
+    1c38:	80 91 5c 24 	lds	r24, 0x245C	; 0x80245c <udd_g_ctrlreq+0x2>
+    1c3c:	90 91 5d 24 	lds	r25, 0x245D	; 0x80245d <udd_g_ctrlreq+0x3>
+    1c40:	89 2b       	or	r24, r25
+    1c42:	01 f5       	brne	.+64     	; 0x1c84 <udc_process_setup+0x60e>
 		return udd_ep_clear_halt(udd_g_ctrlreq.req.wIndex & 0xFF);
-    1c2e:	80 91 5e 24 	lds	r24, 0x245E	; 0x80245e <udd_g_ctrlreq+0x4>
-    1c32:	df d4       	rcall	.+2494   	; 0x25f2 <udd_ep_clear_halt>
-    1c34:	1a c0       	rjmp	.+52     	; 0x1c6a <udc_process_setup+0x60a>
+    1c44:	80 91 5e 24 	lds	r24, 0x245E	; 0x80245e <udd_g_ctrlreq+0x4>
+    1c48:	df d4       	rcall	.+2494   	; 0x2608 <udd_ep_clear_halt>
+    1c4a:	1a c0       	rjmp	.+52     	; 0x1c80 <udc_process_setup+0x60a>
  * \return true if success
  */
 #if (0!=USB_DEVICE_MAX_EP)
 static bool udc_req_std_ep_set_feature(void)
 {
 	if (udd_g_ctrlreq.req.wLength) {
-    1c36:	80 91 60 24 	lds	r24, 0x2460	; 0x802460 <udd_g_ctrlreq+0x6>
-    1c3a:	90 91 61 24 	lds	r25, 0x2461	; 0x802461 <udd_g_ctrlreq+0x7>
-    1c3e:	89 2b       	or	r24, r25
-    1c40:	b1 f4       	brne	.+44     	; 0x1c6e <udc_process_setup+0x60e>
+    1c4c:	80 91 60 24 	lds	r24, 0x2460	; 0x802460 <udd_g_ctrlreq+0x6>
+    1c50:	90 91 61 24 	lds	r25, 0x2461	; 0x802461 <udd_g_ctrlreq+0x7>
+    1c54:	89 2b       	or	r24, r25
+    1c56:	b1 f4       	brne	.+44     	; 0x1c84 <udc_process_setup+0x60e>
 		return false;
 	}
 	if (udd_g_ctrlreq.req.wValue == USB_EP_FEATURE_HALT) {
-    1c42:	80 91 5c 24 	lds	r24, 0x245C	; 0x80245c <udd_g_ctrlreq+0x2>
-    1c46:	90 91 5d 24 	lds	r25, 0x245D	; 0x80245d <udd_g_ctrlreq+0x3>
-    1c4a:	89 2b       	or	r24, r25
-    1c4c:	81 f4       	brne	.+32     	; 0x1c6e <udc_process_setup+0x60e>
+    1c58:	80 91 5c 24 	lds	r24, 0x245C	; 0x80245c <udd_g_ctrlreq+0x2>
+    1c5c:	90 91 5d 24 	lds	r25, 0x245D	; 0x80245d <udd_g_ctrlreq+0x3>
+    1c60:	89 2b       	or	r24, r25
+    1c62:	81 f4       	brne	.+32     	; 0x1c84 <udc_process_setup+0x60e>
 		udd_ep_abort(udd_g_ctrlreq.req.wIndex & 0xFF);
-    1c4e:	ca e5       	ldi	r28, 0x5A	; 90
-    1c50:	d4 e2       	ldi	r29, 0x24	; 36
-    1c52:	8c 81       	ldd	r24, Y+4	; 0x04
-    1c54:	bd d5       	rcall	.+2938   	; 0x27d0 <udd_ep_abort>
+    1c64:	ca e5       	ldi	r28, 0x5A	; 90
+    1c66:	d4 e2       	ldi	r29, 0x24	; 36
+    1c68:	8c 81       	ldd	r24, Y+4	; 0x04
+    1c6a:	bd d5       	rcall	.+2938   	; 0x27e6 <udd_ep_abort>
 		return udd_ep_set_halt(udd_g_ctrlreq.req.wIndex & 0xFF);
-    1c56:	8c 81       	ldd	r24, Y+4	; 0x04
-    1c58:	20 d6       	rcall	.+3136   	; 0x289a <udd_ep_set_halt>
-    1c5a:	07 c0       	rjmp	.+14     	; 0x1c6a <udc_process_setup+0x60a>
+    1c6c:	8c 81       	ldd	r24, Y+4	; 0x04
+    1c6e:	20 d6       	rcall	.+3136   	; 0x28b0 <udd_ep_set_halt>
+    1c70:	07 c0       	rjmp	.+14     	; 0x1c80 <udc_process_setup+0x60a>
 		}
 		break;
 
 	default:
 		// Unknown descriptor requested
 		return false;
-    1c5c:	80 e0       	ldi	r24, 0x00	; 0
-    1c5e:	05 c0       	rjmp	.+10     	; 0x1c6a <udc_process_setup+0x60a>
+    1c72:	80 e0       	ldi	r24, 0x00	; 0
+    1c74:	05 c0       	rjmp	.+10     	; 0x1c80 <udc_process_setup+0x60a>
 				break;
 			}
 		}
 #endif
 	}
 	return false;
-    1c60:	80 e0       	ldi	r24, 0x00	; 0
-    1c62:	03 c0       	rjmp	.+6      	; 0x1c6a <udc_process_setup+0x60a>
+    1c76:	80 e0       	ldi	r24, 0x00	; 0
+    1c78:	03 c0       	rjmp	.+6      	; 0x1c80 <udc_process_setup+0x60a>
 			case USB_REQ_SET_ADDRESS:
 				return udc_req_std_dev_set_address();
 			case USB_REQ_CLEAR_FEATURE:
 				return udc_req_std_dev_clear_feature();
 			case USB_REQ_SET_FEATURE:
 				return udc_req_std_dev_set_feature();
-    1c64:	80 e0       	ldi	r24, 0x00	; 0
-    1c66:	01 c0       	rjmp	.+2      	; 0x1c6a <udc_process_setup+0x60a>
+    1c7a:	80 e0       	ldi	r24, 0x00	; 0
+    1c7c:	01 c0       	rjmp	.+2      	; 0x1c80 <udc_process_setup+0x60a>
 				break;
 			}
 		}
 #endif
 	}
 	return false;
-    1c68:	80 e0       	ldi	r24, 0x00	; 0
+    1c7e:	80 e0       	ldi	r24, 0x00	; 0
 		}
 	}
 
 	// If standard request then try to decode it in UDC
 	if (Udd_setup_type() == USB_REQ_TYPE_STANDARD) {
 		if (udc_reqstd()) {
-    1c6a:	81 11       	cpse	r24, r1
-    1c6c:	7e c0       	rjmp	.+252    	; 0x1d6a <udc_process_setup+0x70a>
+    1c80:	81 11       	cpse	r24, r1
+    1c82:	7e c0       	rjmp	.+252    	; 0x1d80 <udc_process_setup+0x70a>
 			return true;
 		}
 	}
 
 	// If interface request then try to decode it in UDI
 	if (Udd_setup_recipient() == USB_REQ_RECIP_INTERFACE) {
-    1c6e:	80 91 5a 24 	lds	r24, 0x245A	; 0x80245a <udd_g_ctrlreq>
-    1c72:	8f 71       	andi	r24, 0x1F	; 31
-    1c74:	81 30       	cpi	r24, 0x01	; 1
-    1c76:	71 f5       	brne	.+92     	; 0x1cd4 <udc_process_setup+0x674>
+    1c84:	80 91 5a 24 	lds	r24, 0x245A	; 0x80245a <udd_g_ctrlreq>
+    1c88:	8f 71       	andi	r24, 0x1F	; 31
+    1c8a:	81 30       	cpi	r24, 0x01	; 1
+    1c8c:	71 f5       	brne	.+92     	; 0x1cea <udc_process_setup+0x674>
 static bool udc_req_iface(void)
 {
 	uint8_t iface_num;
 	udi_api_t UDC_DESC_STORAGE *udi_api;
 
 	if (0 == udc_num_configuration) {
-    1c78:	80 91 be 20 	lds	r24, 0x20BE	; 0x8020be <udc_num_configuration>
-    1c7c:	88 23       	and	r24, r24
-    1c7e:	51 f1       	breq	.+84     	; 0x1cd4 <udc_process_setup+0x674>
+    1c8e:	80 91 be 20 	lds	r24, 0x20BE	; 0x8020be <udc_num_configuration>
+    1c92:	88 23       	and	r24, r24
+    1c94:	51 f1       	breq	.+84     	; 0x1cea <udc_process_setup+0x674>
 		return false; // The device is not is configured state yet
 	}
 	// Check interface number
 	iface_num = udd_g_ctrlreq.req.wIndex & 0xFF;
-    1c80:	00 91 5e 24 	lds	r16, 0x245E	; 0x80245e <udd_g_ctrlreq+0x4>
-    1c84:	10 91 5f 24 	lds	r17, 0x245F	; 0x80245f <udd_g_ctrlreq+0x5>
+    1c96:	00 91 5e 24 	lds	r16, 0x245E	; 0x80245e <udd_g_ctrlreq+0x4>
+    1c9a:	10 91 5f 24 	lds	r17, 0x245F	; 0x80245f <udd_g_ctrlreq+0x5>
 	if (iface_num >= udc_ptr_conf->desc->bNumInterfaces) {
-    1c88:	c0 91 bc 20 	lds	r28, 0x20BC	; 0x8020bc <udc_ptr_conf>
-    1c8c:	d0 91 bd 20 	lds	r29, 0x20BD	; 0x8020bd <udc_ptr_conf+0x1>
-    1c90:	e8 81       	ld	r30, Y
-    1c92:	f9 81       	ldd	r31, Y+1	; 0x01
-    1c94:	84 81       	ldd	r24, Z+4	; 0x04
-    1c96:	08 17       	cp	r16, r24
-    1c98:	e8 f4       	brcc	.+58     	; 0x1cd4 <udc_process_setup+0x674>
+    1c9e:	c0 91 bc 20 	lds	r28, 0x20BC	; 0x8020bc <udc_ptr_conf>
+    1ca2:	d0 91 bd 20 	lds	r29, 0x20BD	; 0x8020bd <udc_ptr_conf+0x1>
+    1ca6:	e8 81       	ld	r30, Y
+    1ca8:	f9 81       	ldd	r31, Y+1	; 0x01
+    1caa:	84 81       	ldd	r24, Z+4	; 0x04
+    1cac:	08 17       	cp	r16, r24
+    1cae:	e8 f4       	brcc	.+58     	; 0x1cea <udc_process_setup+0x674>
 	}
 
 	//* To update udc_ptr_iface with the selected interface in request
 	// Select first alternate setting of interface to update udc_ptr_iface
 	// before calling udi_api->getsetting()
 	if (!udc_update_iface_desc(iface_num, 0)) {
-    1c9a:	60 e0       	ldi	r22, 0x00	; 0
-    1c9c:	80 2f       	mov	r24, r16
-    1c9e:	d6 db       	rcall	.-2132   	; 0x144c <udc_update_iface_desc>
-    1ca0:	88 23       	and	r24, r24
-    1ca2:	c1 f0       	breq	.+48     	; 0x1cd4 <udc_process_setup+0x674>
+    1cb0:	60 e0       	ldi	r22, 0x00	; 0
+    1cb2:	80 2f       	mov	r24, r16
+    1cb4:	d6 db       	rcall	.-2132   	; 0x1462 <udc_update_iface_desc>
+    1cb6:	88 23       	and	r24, r24
+    1cb8:	c1 f0       	breq	.+48     	; 0x1cea <udc_process_setup+0x674>
 		return false;
 	}
 	// Select the interface with the current alternate setting
 	udi_api = udc_ptr_conf->udi_apis[iface_num];
-    1ca4:	f8 01       	movw	r30, r16
-    1ca6:	ff 27       	eor	r31, r31
-    1ca8:	cf 01       	movw	r24, r30
-    1caa:	88 0f       	add	r24, r24
-    1cac:	99 1f       	adc	r25, r25
-    1cae:	ea 81       	ldd	r30, Y+2	; 0x02
-    1cb0:	fb 81       	ldd	r31, Y+3	; 0x03
-    1cb2:	e8 0f       	add	r30, r24
-    1cb4:	f9 1f       	adc	r31, r25
-    1cb6:	c0 81       	ld	r28, Z
-    1cb8:	d1 81       	ldd	r29, Z+1	; 0x01
+    1cba:	f8 01       	movw	r30, r16
+    1cbc:	ff 27       	eor	r31, r31
+    1cbe:	cf 01       	movw	r24, r30
+    1cc0:	88 0f       	add	r24, r24
+    1cc2:	99 1f       	adc	r25, r25
+    1cc4:	ea 81       	ldd	r30, Y+2	; 0x02
+    1cc6:	fb 81       	ldd	r31, Y+3	; 0x03
+    1cc8:	e8 0f       	add	r30, r24
+    1cca:	f9 1f       	adc	r31, r25
+    1ccc:	c0 81       	ld	r28, Z
+    1cce:	d1 81       	ldd	r29, Z+1	; 0x01
 	if (!udc_update_iface_desc(iface_num, udi_api->getsetting())) {
-    1cba:	ee 81       	ldd	r30, Y+6	; 0x06
-    1cbc:	ff 81       	ldd	r31, Y+7	; 0x07
-    1cbe:	09 95       	icall
-    1cc0:	68 2f       	mov	r22, r24
-    1cc2:	80 2f       	mov	r24, r16
-    1cc4:	c3 db       	rcall	.-2170   	; 0x144c <udc_update_iface_desc>
-    1cc6:	88 23       	and	r24, r24
-    1cc8:	29 f0       	breq	.+10     	; 0x1cd4 <udc_process_setup+0x674>
+    1cd0:	ee 81       	ldd	r30, Y+6	; 0x06
+    1cd2:	ff 81       	ldd	r31, Y+7	; 0x07
+    1cd4:	09 95       	icall
+    1cd6:	68 2f       	mov	r22, r24
+    1cd8:	80 2f       	mov	r24, r16
+    1cda:	c3 db       	rcall	.-2170   	; 0x1462 <udc_update_iface_desc>
+    1cdc:	88 23       	and	r24, r24
+    1cde:	29 f0       	breq	.+10     	; 0x1cea <udc_process_setup+0x674>
 		return false;
 	}
 
 	// Send the SETUP request to the UDI corresponding to the interface number
 	return udi_api->setup();
-    1cca:	ec 81       	ldd	r30, Y+4	; 0x04
-    1ccc:	fd 81       	ldd	r31, Y+5	; 0x05
-    1cce:	09 95       	icall
+    1ce0:	ec 81       	ldd	r30, Y+4	; 0x04
+    1ce2:	fd 81       	ldd	r31, Y+5	; 0x05
+    1ce4:	09 95       	icall
 		}
 	}
 
 	// If interface request then try to decode it in UDI
 	if (Udd_setup_recipient() == USB_REQ_RECIP_INTERFACE) {
 		if (udc_req_iface()) {
-    1cd0:	81 11       	cpse	r24, r1
-    1cd2:	4b c0       	rjmp	.+150    	; 0x1d6a <udc_process_setup+0x70a>
+    1ce6:	81 11       	cpse	r24, r1
+    1ce8:	4b c0       	rjmp	.+150    	; 0x1d80 <udc_process_setup+0x70a>
 			return true;
 		}
 	}
 
 	// If endpoint request then try to decode it in UDI
 	if (Udd_setup_recipient() == USB_REQ_RECIP_ENDPOINT) {
-    1cd4:	80 91 5a 24 	lds	r24, 0x245A	; 0x80245a <udd_g_ctrlreq>
-    1cd8:	8f 71       	andi	r24, 0x1F	; 31
-    1cda:	82 30       	cpi	r24, 0x02	; 2
-    1cdc:	09 f0       	breq	.+2      	; 0x1ce0 <udc_process_setup+0x680>
-    1cde:	40 c0       	rjmp	.+128    	; 0x1d60 <udc_process_setup+0x700>
+    1cea:	80 91 5a 24 	lds	r24, 0x245A	; 0x80245a <udd_g_ctrlreq>
+    1cee:	8f 71       	andi	r24, 0x1F	; 31
+    1cf0:	82 30       	cpi	r24, 0x02	; 2
+    1cf2:	09 f0       	breq	.+2      	; 0x1cf6 <udc_process_setup+0x680>
+    1cf4:	40 c0       	rjmp	.+128    	; 0x1d76 <udc_process_setup+0x700>
 static bool udc_req_ep(void)
 {
 	uint8_t iface_num;
 	udi_api_t UDC_DESC_STORAGE *udi_api;
 
 	if (0 == udc_num_configuration) {
-    1ce0:	80 91 be 20 	lds	r24, 0x20BE	; 0x8020be <udc_num_configuration>
-    1ce4:	88 23       	and	r24, r24
-    1ce6:	b1 f1       	breq	.+108    	; 0x1d54 <udc_process_setup+0x6f4>
+    1cf6:	80 91 be 20 	lds	r24, 0x20BE	; 0x8020be <udc_num_configuration>
+    1cfa:	88 23       	and	r24, r24
+    1cfc:	b1 f1       	breq	.+108    	; 0x1d6a <udc_process_setup+0x6f4>
 		return false; // The device is not is configured state yet
 	}
 	// Send this request on all enabled interfaces
 	iface_num = udd_g_ctrlreq.req.wIndex & 0xFF;
 	for (iface_num = 0; iface_num < udc_ptr_conf->desc->bNumInterfaces;
-    1ce8:	a0 91 bc 20 	lds	r26, 0x20BC	; 0x8020bc <udc_ptr_conf>
-    1cec:	b0 91 bd 20 	lds	r27, 0x20BD	; 0x8020bd <udc_ptr_conf+0x1>
-    1cf0:	ed 91       	ld	r30, X+
-    1cf2:	fc 91       	ld	r31, X
-    1cf4:	11 97       	sbiw	r26, 0x01	; 1
-    1cf6:	84 81       	ldd	r24, Z+4	; 0x04
-    1cf8:	88 23       	and	r24, r24
-    1cfa:	71 f1       	breq	.+92     	; 0x1d58 <udc_process_setup+0x6f8>
-    1cfc:	c0 e0       	ldi	r28, 0x00	; 0
+    1cfe:	a0 91 bc 20 	lds	r26, 0x20BC	; 0x8020bc <udc_ptr_conf>
+    1d02:	b0 91 bd 20 	lds	r27, 0x20BD	; 0x8020bd <udc_ptr_conf+0x1>
+    1d06:	ed 91       	ld	r30, X+
+    1d08:	fc 91       	ld	r31, X
+    1d0a:	11 97       	sbiw	r26, 0x01	; 1
+    1d0c:	84 81       	ldd	r24, Z+4	; 0x04
+    1d0e:	88 23       	and	r24, r24
+    1d10:	71 f1       	breq	.+92     	; 0x1d6e <udc_process_setup+0x6f8>
+    1d12:	c0 e0       	ldi	r28, 0x00	; 0
 			iface_num++) {
 		// Select the interface with the current alternate setting
 		udi_api = udc_ptr_conf->udi_apis[iface_num];
-    1cfe:	ec 2f       	mov	r30, r28
-    1d00:	f0 e0       	ldi	r31, 0x00	; 0
-    1d02:	ee 0f       	add	r30, r30
-    1d04:	ff 1f       	adc	r31, r31
-    1d06:	12 96       	adiw	r26, 0x02	; 2
-    1d08:	8d 91       	ld	r24, X+
-    1d0a:	9c 91       	ld	r25, X
-    1d0c:	13 97       	sbiw	r26, 0x03	; 3
-    1d0e:	e8 0f       	add	r30, r24
-    1d10:	f9 1f       	adc	r31, r25
-    1d12:	00 81       	ld	r16, Z
-    1d14:	11 81       	ldd	r17, Z+1	; 0x01
+    1d14:	ec 2f       	mov	r30, r28
+    1d16:	f0 e0       	ldi	r31, 0x00	; 0
+    1d18:	ee 0f       	add	r30, r30
+    1d1a:	ff 1f       	adc	r31, r31
+    1d1c:	12 96       	adiw	r26, 0x02	; 2
+    1d1e:	8d 91       	ld	r24, X+
+    1d20:	9c 91       	ld	r25, X
+    1d22:	13 97       	sbiw	r26, 0x03	; 3
+    1d24:	e8 0f       	add	r30, r24
+    1d26:	f9 1f       	adc	r31, r25
+    1d28:	00 81       	ld	r16, Z
+    1d2a:	11 81       	ldd	r17, Z+1	; 0x01
 		if (!udc_update_iface_desc(iface_num, udi_api->getsetting())) {
-    1d16:	d8 01       	movw	r26, r16
-    1d18:	16 96       	adiw	r26, 0x06	; 6
-    1d1a:	ed 91       	ld	r30, X+
-    1d1c:	fc 91       	ld	r31, X
-    1d1e:	17 97       	sbiw	r26, 0x07	; 7
-    1d20:	09 95       	icall
-    1d22:	68 2f       	mov	r22, r24
-    1d24:	8c 2f       	mov	r24, r28
-    1d26:	92 db       	rcall	.-2268   	; 0x144c <udc_update_iface_desc>
-    1d28:	88 23       	and	r24, r24
-    1d2a:	f9 f0       	breq	.+62     	; 0x1d6a <udc_process_setup+0x70a>
+    1d2c:	d8 01       	movw	r26, r16
+    1d2e:	16 96       	adiw	r26, 0x06	; 6
+    1d30:	ed 91       	ld	r30, X+
+    1d32:	fc 91       	ld	r31, X
+    1d34:	17 97       	sbiw	r26, 0x07	; 7
+    1d36:	09 95       	icall
+    1d38:	68 2f       	mov	r22, r24
+    1d3a:	8c 2f       	mov	r24, r28
+    1d3c:	92 db       	rcall	.-2268   	; 0x1462 <udc_update_iface_desc>
+    1d3e:	88 23       	and	r24, r24
+    1d40:	f9 f0       	breq	.+62     	; 0x1d80 <udc_process_setup+0x70a>
 			return false;
 		}
 
 		// Send the SETUP request to the UDI
 		if (udi_api->setup()) {
-    1d2c:	d8 01       	movw	r26, r16
-    1d2e:	14 96       	adiw	r26, 0x04	; 4
-    1d30:	ed 91       	ld	r30, X+
-    1d32:	fc 91       	ld	r31, X
-    1d34:	15 97       	sbiw	r26, 0x05	; 5
-    1d36:	09 95       	icall
-    1d38:	81 11       	cpse	r24, r1
-    1d3a:	17 c0       	rjmp	.+46     	; 0x1d6a <udc_process_setup+0x70a>
+    1d42:	d8 01       	movw	r26, r16
+    1d44:	14 96       	adiw	r26, 0x04	; 4
+    1d46:	ed 91       	ld	r30, X+
+    1d48:	fc 91       	ld	r31, X
+    1d4a:	15 97       	sbiw	r26, 0x05	; 5
+    1d4c:	09 95       	icall
+    1d4e:	81 11       	cpse	r24, r1
+    1d50:	17 c0       	rjmp	.+46     	; 0x1d80 <udc_process_setup+0x70a>
 		return false; // The device is not is configured state yet
 	}
 	// Send this request on all enabled interfaces
 	iface_num = udd_g_ctrlreq.req.wIndex & 0xFF;
 	for (iface_num = 0; iface_num < udc_ptr_conf->desc->bNumInterfaces;
 			iface_num++) {
-    1d3c:	cf 5f       	subi	r28, 0xFF	; 255
+    1d52:	cf 5f       	subi	r28, 0xFF	; 255
 	if (0 == udc_num_configuration) {
 		return false; // The device is not is configured state yet
 	}
 	// Send this request on all enabled interfaces
 	iface_num = udd_g_ctrlreq.req.wIndex & 0xFF;
 	for (iface_num = 0; iface_num < udc_ptr_conf->desc->bNumInterfaces;
-    1d3e:	a0 91 bc 20 	lds	r26, 0x20BC	; 0x8020bc <udc_ptr_conf>
-    1d42:	b0 91 bd 20 	lds	r27, 0x20BD	; 0x8020bd <udc_ptr_conf+0x1>
-    1d46:	ed 91       	ld	r30, X+
-    1d48:	fc 91       	ld	r31, X
-    1d4a:	11 97       	sbiw	r26, 0x01	; 1
-    1d4c:	94 81       	ldd	r25, Z+4	; 0x04
-    1d4e:	c9 17       	cp	r28, r25
-    1d50:	b0 f2       	brcs	.-84     	; 0x1cfe <udc_process_setup+0x69e>
-    1d52:	0b c0       	rjmp	.+22     	; 0x1d6a <udc_process_setup+0x70a>
+    1d54:	a0 91 bc 20 	lds	r26, 0x20BC	; 0x8020bc <udc_ptr_conf>
+    1d58:	b0 91 bd 20 	lds	r27, 0x20BD	; 0x8020bd <udc_ptr_conf+0x1>
+    1d5c:	ed 91       	ld	r30, X+
+    1d5e:	fc 91       	ld	r31, X
+    1d60:	11 97       	sbiw	r26, 0x01	; 1
+    1d62:	94 81       	ldd	r25, Z+4	; 0x04
+    1d64:	c9 17       	cp	r28, r25
+    1d66:	b0 f2       	brcs	.-84     	; 0x1d14 <udc_process_setup+0x69e>
+    1d68:	0b c0       	rjmp	.+22     	; 0x1d80 <udc_process_setup+0x70a>
 {
 	uint8_t iface_num;
 	udi_api_t UDC_DESC_STORAGE *udi_api;
 
 	if (0 == udc_num_configuration) {
 		return false; // The device is not is configured state yet
-    1d54:	80 e0       	ldi	r24, 0x00	; 0
-    1d56:	09 c0       	rjmp	.+18     	; 0x1d6a <udc_process_setup+0x70a>
+    1d6a:	80 e0       	ldi	r24, 0x00	; 0
+    1d6c:	09 c0       	rjmp	.+18     	; 0x1d80 <udc_process_setup+0x70a>
 		// Send the SETUP request to the UDI
 		if (udi_api->setup()) {
 			return true;
 		}
 	}
 	return false;
-    1d58:	80 e0       	ldi	r24, 0x00	; 0
-    1d5a:	07 c0       	rjmp	.+14     	; 0x1d6a <udc_process_setup+0x70a>
+    1d6e:	80 e0       	ldi	r24, 0x00	; 0
+    1d70:	07 c0       	rjmp	.+14     	; 0x1d80 <udc_process_setup+0x70a>
 	udd_g_ctrlreq.callback = NULL;
 	udd_g_ctrlreq.over_under_run = NULL;
 
 	if (Udd_setup_is_in()) {
 		if (udd_g_ctrlreq.req.wLength == 0) {
 			return false; // Error from USB host
-    1d5c:	80 e0       	ldi	r24, 0x00	; 0
-    1d5e:	05 c0       	rjmp	.+10     	; 0x1d6a <udc_process_setup+0x70a>
+    1d72:	80 e0       	ldi	r24, 0x00	; 0
+    1d74:	05 c0       	rjmp	.+10     	; 0x1d80 <udc_process_setup+0x70a>
 	// Here SETUP request unknown by UDC and UDIs
 #ifdef USB_DEVICE_SPECIFIC_REQUEST
 	// Try to decode it in specific callback
 	return USB_DEVICE_SPECIFIC_REQUEST(); // Ex: Vendor request,...
 #else
 	return false;
-    1d60:	80 e0       	ldi	r24, 0x00	; 0
-    1d62:	03 c0       	rjmp	.+6      	; 0x1d6a <udc_process_setup+0x70a>
+    1d76:	80 e0       	ldi	r24, 0x00	; 0
+    1d78:	03 c0       	rjmp	.+6      	; 0x1d80 <udc_process_setup+0x70a>
 		}
 	}
 	
 	if (Udd_setup_type() == USB_REQ_TYPE_VENDOR){
 		if (udc_reqvend()) {
 			return true;
-    1d64:	81 e0       	ldi	r24, 0x01	; 1
-    1d66:	01 c0       	rjmp	.+2      	; 0x1d6a <udc_process_setup+0x70a>
+    1d7a:	81 e0       	ldi	r24, 0x01	; 1
+    1d7c:	01 c0       	rjmp	.+2      	; 0x1d80 <udc_process_setup+0x70a>
 	}
 
 	// If standard request then try to decode it in UDC
 	if (Udd_setup_type() == USB_REQ_TYPE_STANDARD) {
 		if (udc_reqstd()) {
 			return true;
-    1d68:	81 e0       	ldi	r24, 0x01	; 1
+    1d7e:	81 e0       	ldi	r24, 0x01	; 1
 	// Try to decode it in specific callback
 	return USB_DEVICE_SPECIFIC_REQUEST(); // Ex: Vendor request,...
 #else
 	return false;
 #endif
 }
-    1d6a:	df 91       	pop	r29
-    1d6c:	cf 91       	pop	r28
-    1d6e:	1f 91       	pop	r17
-    1d70:	0f 91       	pop	r16
-    1d72:	08 95       	ret
+    1d80:	df 91       	pop	r29
+    1d82:	cf 91       	pop	r28
+    1d84:	1f 91       	pop	r17
+    1d86:	0f 91       	pop	r16
+    1d88:	08 95       	ret
 
-00001d74 <ccp_write_io>:
+00001d8a <ccp_write_io>:
 
 	PUBLIC_FUNCTION(ccp_write_io)
 
 #if defined(__GNUC__)
 
 	out     RAMPZ, r1               // Reset bits 23:16 of Z
-    1d74:	1b be       	out	0x3b, r1	; 59
+    1d8a:	1b be       	out	0x3b, r1	; 59
 	movw    r30, r24                // Load addr into Z
-    1d76:	fc 01       	movw	r30, r24
+    1d8c:	fc 01       	movw	r30, r24
 	ldi     r18, CCP_IOREG          // Load magic CCP value
-    1d78:	28 ed       	ldi	r18, 0xD8	; 216
+    1d8e:	28 ed       	ldi	r18, 0xD8	; 216
 	out     CCP, r18                // Start CCP handshake
-    1d7a:	24 bf       	out	0x34, r18	; 52
+    1d90:	24 bf       	out	0x34, r18	; 52
 	st      Z, r22                  // Write value to I/O register
-    1d7c:	60 83       	st	Z, r22
+    1d92:	60 83       	st	Z, r22
 	ret                             // Return to caller
-    1d7e:	08 95       	ret
+    1d94:	08 95       	ret
 
-00001d80 <nvm_read_byte>:
+00001d96 <nvm_read_byte>:
 #endif
 
 #ifndef __DOXYGEN__
 	PUBLIC_FUNCTION(nvm_read_byte)
 #if defined(__GNUC__)
 	lds r20, NVM_CMD          ; Store NVM command register
-    1d80:	40 91 ca 01 	lds	r20, 0x01CA	; 0x8001ca <__TEXT_REGION_LENGTH__+0x7001ca>
+    1d96:	40 91 ca 01 	lds	r20, 0x01CA	; 0x8001ca <__TEXT_REGION_LENGTH__+0x7001ca>
 	mov ZL, r22               ; Load byte index into low byte of Z.
-    1d84:	e6 2f       	mov	r30, r22
+    1d9a:	e6 2f       	mov	r30, r22
 	mov ZH, r23               ; Load high byte into Z.
-    1d86:	f7 2f       	mov	r31, r23
+    1d9c:	f7 2f       	mov	r31, r23
 	sts NVM_CMD, r24          ; Load prepared command into NVM Command register.
-    1d88:	80 93 ca 01 	sts	0x01CA, r24	; 0x8001ca <__TEXT_REGION_LENGTH__+0x7001ca>
+    1d9e:	80 93 ca 01 	sts	0x01CA, r24	; 0x8001ca <__TEXT_REGION_LENGTH__+0x7001ca>
 	lpm r24, Z                ; Perform an LPM to read out byte
-    1d8c:	84 91       	lpm	r24, Z
+    1da2:	84 91       	lpm	r24, Z
 	sts NVM_CMD, r20          ; Restore NVM command register
-    1d8e:	40 93 ca 01 	sts	0x01CA, r20	; 0x8001ca <__TEXT_REGION_LENGTH__+0x7001ca>
+    1da4:	40 93 ca 01 	sts	0x01CA, r20	; 0x8001ca <__TEXT_REGION_LENGTH__+0x7001ca>
 	sts NVM_CMD, r16          ; Load prepared command into NVM Command register.
 	lpm r16, Z                ; Perform an LPM to read out byte
 	sts NVM_CMD, r20          ; Restore NVM command register
 #endif
 
 	ret
-    1d92:	08 95       	ret
+    1da8:	08 95       	ret
 
-00001d94 <udd_sleep_mode>:
+00001daa <udd_sleep_mode>:
 	} else {
 		// endpoint not halted then call directly callback
 		callback();
 	}
 	return true;
 }
-    1d94:	81 11       	cpse	r24, r1
-    1d96:	22 c0       	rjmp	.+68     	; 0x1ddc <udd_sleep_mode+0x48>
-    1d98:	90 91 54 22 	lds	r25, 0x2254	; 0x802254 <udd_b_idle>
-    1d9c:	99 23       	and	r25, r25
-    1d9e:	d9 f0       	breq	.+54     	; 0x1dd6 <udd_sleep_mode+0x42>
-    1da0:	90 91 47 2c 	lds	r25, 0x2C47	; 0x802c47 <sleepmgr_locks+0x1>
-    1da4:	91 11       	cpse	r25, r1
-    1da6:	01 c0       	rjmp	.+2      	; 0x1daa <udd_sleep_mode+0x16>
-    1da8:	ff cf       	rjmp	.-2      	; 0x1da8 <udd_sleep_mode+0x14>
-    1daa:	2f b7       	in	r18, 0x3f	; 63
-    1dac:	f8 94       	cli
-    1dae:	e6 e4       	ldi	r30, 0x46	; 70
-    1db0:	fc e2       	ldi	r31, 0x2C	; 44
-    1db2:	91 81       	ldd	r25, Z+1	; 0x01
-    1db4:	91 50       	subi	r25, 0x01	; 1
-    1db6:	91 83       	std	Z+1, r25	; 0x01
-    1db8:	2f bf       	out	0x3f, r18	; 63
-    1dba:	0d c0       	rjmp	.+26     	; 0x1dd6 <udd_sleep_mode+0x42>
-    1dbc:	90 91 47 2c 	lds	r25, 0x2C47	; 0x802c47 <sleepmgr_locks+0x1>
-    1dc0:	9f 3f       	cpi	r25, 0xFF	; 255
-    1dc2:	09 f4       	brne	.+2      	; 0x1dc6 <udd_sleep_mode+0x32>
-    1dc4:	ff cf       	rjmp	.-2      	; 0x1dc4 <udd_sleep_mode+0x30>
-    1dc6:	2f b7       	in	r18, 0x3f	; 63
-    1dc8:	f8 94       	cli
-    1dca:	e6 e4       	ldi	r30, 0x46	; 70
-    1dcc:	fc e2       	ldi	r31, 0x2C	; 44
-    1dce:	91 81       	ldd	r25, Z+1	; 0x01
-    1dd0:	9f 5f       	subi	r25, 0xFF	; 255
-    1dd2:	91 83       	std	Z+1, r25	; 0x01
-    1dd4:	2f bf       	out	0x3f, r18	; 63
-    1dd6:	80 93 54 22 	sts	0x2254, r24	; 0x802254 <udd_b_idle>
-    1dda:	08 95       	ret
-    1ddc:	90 91 54 22 	lds	r25, 0x2254	; 0x802254 <udd_b_idle>
-    1de0:	99 23       	and	r25, r25
-    1de2:	61 f3       	breq	.-40     	; 0x1dbc <udd_sleep_mode+0x28>
-    1de4:	f8 cf       	rjmp	.-16     	; 0x1dd6 <udd_sleep_mode+0x42>
+    1daa:	81 11       	cpse	r24, r1
+    1dac:	22 c0       	rjmp	.+68     	; 0x1df2 <udd_sleep_mode+0x48>
+    1dae:	90 91 54 22 	lds	r25, 0x2254	; 0x802254 <udd_b_idle>
+    1db2:	99 23       	and	r25, r25
+    1db4:	d9 f0       	breq	.+54     	; 0x1dec <udd_sleep_mode+0x42>
+    1db6:	90 91 47 2c 	lds	r25, 0x2C47	; 0x802c47 <sleepmgr_locks+0x1>
+    1dba:	91 11       	cpse	r25, r1
+    1dbc:	01 c0       	rjmp	.+2      	; 0x1dc0 <udd_sleep_mode+0x16>
+    1dbe:	ff cf       	rjmp	.-2      	; 0x1dbe <udd_sleep_mode+0x14>
+    1dc0:	2f b7       	in	r18, 0x3f	; 63
+    1dc2:	f8 94       	cli
+    1dc4:	e6 e4       	ldi	r30, 0x46	; 70
+    1dc6:	fc e2       	ldi	r31, 0x2C	; 44
+    1dc8:	91 81       	ldd	r25, Z+1	; 0x01
+    1dca:	91 50       	subi	r25, 0x01	; 1
+    1dcc:	91 83       	std	Z+1, r25	; 0x01
+    1dce:	2f bf       	out	0x3f, r18	; 63
+    1dd0:	0d c0       	rjmp	.+26     	; 0x1dec <udd_sleep_mode+0x42>
+    1dd2:	90 91 47 2c 	lds	r25, 0x2C47	; 0x802c47 <sleepmgr_locks+0x1>
+    1dd6:	9f 3f       	cpi	r25, 0xFF	; 255
+    1dd8:	09 f4       	brne	.+2      	; 0x1ddc <udd_sleep_mode+0x32>
+    1dda:	ff cf       	rjmp	.-2      	; 0x1dda <udd_sleep_mode+0x30>
+    1ddc:	2f b7       	in	r18, 0x3f	; 63
+    1dde:	f8 94       	cli
+    1de0:	e6 e4       	ldi	r30, 0x46	; 70
+    1de2:	fc e2       	ldi	r31, 0x2C	; 44
+    1de4:	91 81       	ldd	r25, Z+1	; 0x01
+    1de6:	9f 5f       	subi	r25, 0xFF	; 255
+    1de8:	91 83       	std	Z+1, r25	; 0x01
+    1dea:	2f bf       	out	0x3f, r18	; 63
+    1dec:	80 93 54 22 	sts	0x2254, r24	; 0x802254 <udd_b_idle>
+    1df0:	08 95       	ret
+    1df2:	90 91 54 22 	lds	r25, 0x2254	; 0x802254 <udd_b_idle>
+    1df6:	99 23       	and	r25, r25
+    1df8:	61 f3       	breq	.-40     	; 0x1dd2 <udd_sleep_mode+0x28>
+    1dfa:	f8 cf       	rjmp	.-16     	; 0x1dec <udd_sleep_mode+0x42>
 
-00001de6 <udd_ctrl_init>:
-    1de6:	0f 93       	push	r16
-    1de8:	e8 ec       	ldi	r30, 0xC8	; 200
-    1dea:	f4 e0       	ldi	r31, 0x04	; 4
-    1dec:	80 81       	ld	r24, Z
-    1dee:	8f 7d       	andi	r24, 0xDF	; 223
-    1df0:	80 83       	st	Z, r24
-    1df2:	80 81       	ld	r24, Z
-    1df4:	8f 7d       	andi	r24, 0xDF	; 223
-    1df6:	80 83       	st	Z, r24
-    1df8:	e8 e1       	ldi	r30, 0x18	; 24
-    1dfa:	f2 e2       	ldi	r31, 0x22	; 34
-    1dfc:	02 e0       	ldi	r16, 0x02	; 2
-    1dfe:	05 93       	las	Z, r16
-    1e00:	10 92 1a 22 	sts	0x221A, r1	; 0x80221a <udd_sram+0x1a>
-    1e04:	10 92 1b 22 	sts	0x221B, r1	; 0x80221b <udd_sram+0x1b>
-    1e08:	00 e2       	ldi	r16, 0x20	; 32
-    1e0a:	06 93       	lac	Z, r16
-    1e0c:	00 e4       	ldi	r16, 0x40	; 64
-    1e0e:	06 93       	lac	Z, r16
-    1e10:	e0 e1       	ldi	r30, 0x10	; 16
-    1e12:	f2 e2       	ldi	r31, 0x22	; 34
-    1e14:	00 e2       	ldi	r16, 0x20	; 32
-    1e16:	06 93       	lac	Z, r16
-    1e18:	00 e4       	ldi	r16, 0x40	; 64
-    1e1a:	06 93       	lac	Z, r16
-    1e1c:	ea e5       	ldi	r30, 0x5A	; 90
-    1e1e:	f4 e2       	ldi	r31, 0x24	; 36
-    1e20:	14 86       	std	Z+12, r1	; 0x0c
-    1e22:	15 86       	std	Z+13, r1	; 0x0d
-    1e24:	16 86       	std	Z+14, r1	; 0x0e
-    1e26:	17 86       	std	Z+15, r1	; 0x0f
-    1e28:	12 86       	std	Z+10, r1	; 0x0a
-    1e2a:	13 86       	std	Z+11, r1	; 0x0b
-    1e2c:	10 92 ff 21 	sts	0x21FF, r1	; 0x8021ff <udd_ep_control_state>
-    1e30:	0f 91       	pop	r16
-    1e32:	08 95       	ret
+00001dfc <udd_ctrl_init>:
+    1dfc:	0f 93       	push	r16
+    1dfe:	e8 ec       	ldi	r30, 0xC8	; 200
+    1e00:	f4 e0       	ldi	r31, 0x04	; 4
+    1e02:	80 81       	ld	r24, Z
+    1e04:	8f 7d       	andi	r24, 0xDF	; 223
+    1e06:	80 83       	st	Z, r24
+    1e08:	80 81       	ld	r24, Z
+    1e0a:	8f 7d       	andi	r24, 0xDF	; 223
+    1e0c:	80 83       	st	Z, r24
+    1e0e:	e8 e1       	ldi	r30, 0x18	; 24
+    1e10:	f2 e2       	ldi	r31, 0x22	; 34
+    1e12:	02 e0       	ldi	r16, 0x02	; 2
+    1e14:	05 93       	las	Z, r16
+    1e16:	10 92 1a 22 	sts	0x221A, r1	; 0x80221a <udd_sram+0x1a>
+    1e1a:	10 92 1b 22 	sts	0x221B, r1	; 0x80221b <udd_sram+0x1b>
+    1e1e:	00 e2       	ldi	r16, 0x20	; 32
+    1e20:	06 93       	lac	Z, r16
+    1e22:	00 e4       	ldi	r16, 0x40	; 64
+    1e24:	06 93       	lac	Z, r16
+    1e26:	e0 e1       	ldi	r30, 0x10	; 16
+    1e28:	f2 e2       	ldi	r31, 0x22	; 34
+    1e2a:	00 e2       	ldi	r16, 0x20	; 32
+    1e2c:	06 93       	lac	Z, r16
+    1e2e:	00 e4       	ldi	r16, 0x40	; 64
+    1e30:	06 93       	lac	Z, r16
+    1e32:	ea e5       	ldi	r30, 0x5A	; 90
+    1e34:	f4 e2       	ldi	r31, 0x24	; 36
+    1e36:	14 86       	std	Z+12, r1	; 0x0c
+    1e38:	15 86       	std	Z+13, r1	; 0x0d
+    1e3a:	16 86       	std	Z+14, r1	; 0x0e
+    1e3c:	17 86       	std	Z+15, r1	; 0x0f
+    1e3e:	12 86       	std	Z+10, r1	; 0x0a
+    1e40:	13 86       	std	Z+11, r1	; 0x0b
+    1e42:	10 92 ff 21 	sts	0x21FF, r1	; 0x8021ff <udd_ep_control_state>
+    1e46:	0f 91       	pop	r16
+    1e48:	08 95       	ret
 
-00001e34 <udd_ctrl_stall_data>:
-    1e34:	0f 93       	push	r16
-    1e36:	85 e0       	ldi	r24, 0x05	; 5
-    1e38:	80 93 ff 21 	sts	0x21FF, r24	; 0x8021ff <udd_ep_control_state>
-    1e3c:	e9 e1       	ldi	r30, 0x19	; 25
-    1e3e:	f2 e2       	ldi	r31, 0x22	; 34
-    1e40:	04 e0       	ldi	r16, 0x04	; 4
-    1e42:	05 93       	las	Z, r16
-    1e44:	e1 e1       	ldi	r30, 0x11	; 17
-    1e46:	f2 e2       	ldi	r31, 0x22	; 34
-    1e48:	04 e0       	ldi	r16, 0x04	; 4
-    1e4a:	05 93       	las	Z, r16
-    1e4c:	0f 91       	pop	r16
-    1e4e:	08 95       	ret
+00001e4a <udd_ctrl_stall_data>:
+    1e4a:	0f 93       	push	r16
+    1e4c:	85 e0       	ldi	r24, 0x05	; 5
+    1e4e:	80 93 ff 21 	sts	0x21FF, r24	; 0x8021ff <udd_ep_control_state>
+    1e52:	e9 e1       	ldi	r30, 0x19	; 25
+    1e54:	f2 e2       	ldi	r31, 0x22	; 34
+    1e56:	04 e0       	ldi	r16, 0x04	; 4
+    1e58:	05 93       	las	Z, r16
+    1e5a:	e1 e1       	ldi	r30, 0x11	; 17
+    1e5c:	f2 e2       	ldi	r31, 0x22	; 34
+    1e5e:	04 e0       	ldi	r16, 0x04	; 4
+    1e60:	05 93       	las	Z, r16
+    1e62:	0f 91       	pop	r16
+    1e64:	08 95       	ret
 
-00001e50 <udd_ctrl_send_zlp_in>:
-    1e50:	0f 93       	push	r16
-    1e52:	83 e0       	ldi	r24, 0x03	; 3
-    1e54:	80 93 ff 21 	sts	0x21FF, r24	; 0x8021ff <udd_ep_control_state>
-    1e58:	10 92 1a 22 	sts	0x221A, r1	; 0x80221a <udd_sram+0x1a>
-    1e5c:	10 92 1b 22 	sts	0x221B, r1	; 0x80221b <udd_sram+0x1b>
-    1e60:	e8 e1       	ldi	r30, 0x18	; 24
-    1e62:	f2 e2       	ldi	r31, 0x22	; 34
-    1e64:	02 e0       	ldi	r16, 0x02	; 2
-    1e66:	06 93       	lac	Z, r16
-    1e68:	0f 91       	pop	r16
-    1e6a:	08 95       	ret
+00001e66 <udd_ctrl_send_zlp_in>:
+    1e66:	0f 93       	push	r16
+    1e68:	83 e0       	ldi	r24, 0x03	; 3
+    1e6a:	80 93 ff 21 	sts	0x21FF, r24	; 0x8021ff <udd_ep_control_state>
+    1e6e:	10 92 1a 22 	sts	0x221A, r1	; 0x80221a <udd_sram+0x1a>
+    1e72:	10 92 1b 22 	sts	0x221B, r1	; 0x80221b <udd_sram+0x1b>
+    1e76:	e8 e1       	ldi	r30, 0x18	; 24
+    1e78:	f2 e2       	ldi	r31, 0x22	; 34
+    1e7a:	02 e0       	ldi	r16, 0x02	; 2
+    1e7c:	06 93       	lac	Z, r16
+    1e7e:	0f 91       	pop	r16
+    1e80:	08 95       	ret
 
-00001e6c <udd_ctrl_endofrequest>:
-    1e6c:	e0 91 66 24 	lds	r30, 0x2466	; 0x802466 <udd_g_ctrlreq+0xc>
-    1e70:	f0 91 67 24 	lds	r31, 0x2467	; 0x802467 <udd_g_ctrlreq+0xd>
-    1e74:	30 97       	sbiw	r30, 0x00	; 0
-    1e76:	09 f0       	breq	.+2      	; 0x1e7a <udd_ctrl_endofrequest+0xe>
-    1e78:	09 95       	icall
-    1e7a:	08 95       	ret
+00001e82 <udd_ctrl_endofrequest>:
+    1e82:	e0 91 66 24 	lds	r30, 0x2466	; 0x802466 <udd_g_ctrlreq+0xc>
+    1e86:	f0 91 67 24 	lds	r31, 0x2467	; 0x802467 <udd_g_ctrlreq+0xd>
+    1e8a:	30 97       	sbiw	r30, 0x00	; 0
+    1e8c:	09 f0       	breq	.+2      	; 0x1e90 <udd_ctrl_endofrequest+0xe>
+    1e8e:	09 95       	icall
+    1e90:	08 95       	ret
 
-00001e7c <udd_ctrl_in_sent>:
-    1e7c:	0f 93       	push	r16
-    1e7e:	cf 93       	push	r28
-    1e80:	df 93       	push	r29
-    1e82:	80 91 ff 21 	lds	r24, 0x21FF	; 0x8021ff <udd_ep_control_state>
-    1e86:	83 30       	cpi	r24, 0x03	; 3
-    1e88:	19 f4       	brne	.+6      	; 0x1e90 <udd_ctrl_in_sent+0x14>
-    1e8a:	f0 df       	rcall	.-32     	; 0x1e6c <udd_ctrl_endofrequest>
-    1e8c:	ac df       	rcall	.-168    	; 0x1de6 <udd_ctrl_init>
-    1e8e:	5e c0       	rjmp	.+188    	; 0x1f4c <udd_ctrl_in_sent+0xd0>
-    1e90:	80 91 fb 21 	lds	r24, 0x21FB	; 0x8021fb <udd_ctrl_payload_nb_trans>
-    1e94:	90 91 fc 21 	lds	r25, 0x21FC	; 0x8021fc <udd_ctrl_payload_nb_trans+0x1>
-    1e98:	c0 91 64 24 	lds	r28, 0x2464	; 0x802464 <udd_g_ctrlreq+0xa>
-    1e9c:	d0 91 65 24 	lds	r29, 0x2465	; 0x802465 <udd_g_ctrlreq+0xb>
-    1ea0:	c8 1b       	sub	r28, r24
-    1ea2:	d9 0b       	sbc	r29, r25
-    1ea4:	71 f5       	brne	.+92     	; 0x1f02 <udd_ctrl_in_sent+0x86>
-    1ea6:	20 91 fd 21 	lds	r18, 0x21FD	; 0x8021fd <udd_ctrl_prev_payload_nb_trans>
-    1eaa:	30 91 fe 21 	lds	r19, 0x21FE	; 0x8021fe <udd_ctrl_prev_payload_nb_trans+0x1>
-    1eae:	82 0f       	add	r24, r18
-    1eb0:	93 1f       	adc	r25, r19
-    1eb2:	80 93 fd 21 	sts	0x21FD, r24	; 0x8021fd <udd_ctrl_prev_payload_nb_trans>
-    1eb6:	90 93 fe 21 	sts	0x21FE, r25	; 0x8021fe <udd_ctrl_prev_payload_nb_trans+0x1>
-    1eba:	20 91 60 24 	lds	r18, 0x2460	; 0x802460 <udd_g_ctrlreq+0x6>
-    1ebe:	30 91 61 24 	lds	r19, 0x2461	; 0x802461 <udd_g_ctrlreq+0x7>
-    1ec2:	82 17       	cp	r24, r18
-    1ec4:	93 07       	cpc	r25, r19
-    1ec6:	21 f0       	breq	.+8      	; 0x1ed0 <udd_ctrl_in_sent+0x54>
-    1ec8:	80 91 c4 20 	lds	r24, 0x20C4	; 0x8020c4 <b_shortpacket.5272>
-    1ecc:	88 23       	and	r24, r24
-    1ece:	41 f0       	breq	.+16     	; 0x1ee0 <udd_ctrl_in_sent+0x64>
-    1ed0:	84 e0       	ldi	r24, 0x04	; 4
-    1ed2:	80 93 ff 21 	sts	0x21FF, r24	; 0x8021ff <udd_ep_control_state>
-    1ed6:	e0 e1       	ldi	r30, 0x10	; 16
-    1ed8:	f2 e2       	ldi	r31, 0x22	; 34
-    1eda:	02 e0       	ldi	r16, 0x02	; 2
-    1edc:	06 93       	lac	Z, r16
-    1ede:	36 c0       	rjmp	.+108    	; 0x1f4c <udd_ctrl_in_sent+0xd0>
-    1ee0:	e0 91 68 24 	lds	r30, 0x2468	; 0x802468 <udd_g_ctrlreq+0xe>
-    1ee4:	f0 91 69 24 	lds	r31, 0x2469	; 0x802469 <udd_g_ctrlreq+0xf>
-    1ee8:	30 97       	sbiw	r30, 0x00	; 0
-    1eea:	99 f0       	breq	.+38     	; 0x1f12 <udd_ctrl_in_sent+0x96>
-    1eec:	09 95       	icall
-    1eee:	88 23       	and	r24, r24
-    1ef0:	81 f0       	breq	.+32     	; 0x1f12 <udd_ctrl_in_sent+0x96>
-    1ef2:	10 92 fb 21 	sts	0x21FB, r1	; 0x8021fb <udd_ctrl_payload_nb_trans>
-    1ef6:	10 92 fc 21 	sts	0x21FC, r1	; 0x8021fc <udd_ctrl_payload_nb_trans+0x1>
-    1efa:	c0 91 64 24 	lds	r28, 0x2464	; 0x802464 <udd_g_ctrlreq+0xa>
-    1efe:	d0 91 65 24 	lds	r29, 0x2465	; 0x802465 <udd_g_ctrlreq+0xb>
-    1f02:	c0 34       	cpi	r28, 0x40	; 64
-    1f04:	d1 05       	cpc	r29, r1
-    1f06:	28 f0       	brcs	.+10     	; 0x1f12 <udd_ctrl_in_sent+0x96>
-    1f08:	10 92 c4 20 	sts	0x20C4, r1	; 0x8020c4 <b_shortpacket.5272>
-    1f0c:	c0 e4       	ldi	r28, 0x40	; 64
-    1f0e:	d0 e0       	ldi	r29, 0x00	; 0
-    1f10:	03 c0       	rjmp	.+6      	; 0x1f18 <udd_ctrl_in_sent+0x9c>
-    1f12:	81 e0       	ldi	r24, 0x01	; 1
-    1f14:	80 93 c4 20 	sts	0x20C4, r24	; 0x8020c4 <b_shortpacket.5272>
-    1f18:	e0 e0       	ldi	r30, 0x00	; 0
-    1f1a:	f2 e2       	ldi	r31, 0x22	; 34
-    1f1c:	c2 8f       	std	Z+26, r28	; 0x1a
-    1f1e:	d3 8f       	std	Z+27, r29	; 0x1b
-    1f20:	80 91 fb 21 	lds	r24, 0x21FB	; 0x8021fb <udd_ctrl_payload_nb_trans>
-    1f24:	90 91 fc 21 	lds	r25, 0x21FC	; 0x8021fc <udd_ctrl_payload_nb_trans+0x1>
-    1f28:	20 91 62 24 	lds	r18, 0x2462	; 0x802462 <udd_g_ctrlreq+0x8>
-    1f2c:	30 91 63 24 	lds	r19, 0x2463	; 0x802463 <udd_g_ctrlreq+0x9>
-    1f30:	28 0f       	add	r18, r24
-    1f32:	39 1f       	adc	r19, r25
-    1f34:	24 8f       	std	Z+28, r18	; 0x1c
-    1f36:	35 8f       	std	Z+29, r19	; 0x1d
-    1f38:	c8 0f       	add	r28, r24
-    1f3a:	d9 1f       	adc	r29, r25
-    1f3c:	c0 93 fb 21 	sts	0x21FB, r28	; 0x8021fb <udd_ctrl_payload_nb_trans>
-    1f40:	d0 93 fc 21 	sts	0x21FC, r29	; 0x8021fc <udd_ctrl_payload_nb_trans+0x1>
-    1f44:	e8 e1       	ldi	r30, 0x18	; 24
-    1f46:	f2 e2       	ldi	r31, 0x22	; 34
-    1f48:	02 e0       	ldi	r16, 0x02	; 2
-    1f4a:	06 93       	lac	Z, r16
-    1f4c:	df 91       	pop	r29
-    1f4e:	cf 91       	pop	r28
-    1f50:	0f 91       	pop	r16
-    1f52:	08 95       	ret
+00001e92 <udd_ctrl_in_sent>:
+    1e92:	0f 93       	push	r16
+    1e94:	cf 93       	push	r28
+    1e96:	df 93       	push	r29
+    1e98:	80 91 ff 21 	lds	r24, 0x21FF	; 0x8021ff <udd_ep_control_state>
+    1e9c:	83 30       	cpi	r24, 0x03	; 3
+    1e9e:	19 f4       	brne	.+6      	; 0x1ea6 <udd_ctrl_in_sent+0x14>
+    1ea0:	f0 df       	rcall	.-32     	; 0x1e82 <udd_ctrl_endofrequest>
+    1ea2:	ac df       	rcall	.-168    	; 0x1dfc <udd_ctrl_init>
+    1ea4:	5e c0       	rjmp	.+188    	; 0x1f62 <udd_ctrl_in_sent+0xd0>
+    1ea6:	80 91 fb 21 	lds	r24, 0x21FB	; 0x8021fb <udd_ctrl_payload_nb_trans>
+    1eaa:	90 91 fc 21 	lds	r25, 0x21FC	; 0x8021fc <udd_ctrl_payload_nb_trans+0x1>
+    1eae:	c0 91 64 24 	lds	r28, 0x2464	; 0x802464 <udd_g_ctrlreq+0xa>
+    1eb2:	d0 91 65 24 	lds	r29, 0x2465	; 0x802465 <udd_g_ctrlreq+0xb>
+    1eb6:	c8 1b       	sub	r28, r24
+    1eb8:	d9 0b       	sbc	r29, r25
+    1eba:	71 f5       	brne	.+92     	; 0x1f18 <udd_ctrl_in_sent+0x86>
+    1ebc:	20 91 fd 21 	lds	r18, 0x21FD	; 0x8021fd <udd_ctrl_prev_payload_nb_trans>
+    1ec0:	30 91 fe 21 	lds	r19, 0x21FE	; 0x8021fe <udd_ctrl_prev_payload_nb_trans+0x1>
+    1ec4:	82 0f       	add	r24, r18
+    1ec6:	93 1f       	adc	r25, r19
+    1ec8:	80 93 fd 21 	sts	0x21FD, r24	; 0x8021fd <udd_ctrl_prev_payload_nb_trans>
+    1ecc:	90 93 fe 21 	sts	0x21FE, r25	; 0x8021fe <udd_ctrl_prev_payload_nb_trans+0x1>
+    1ed0:	20 91 60 24 	lds	r18, 0x2460	; 0x802460 <udd_g_ctrlreq+0x6>
+    1ed4:	30 91 61 24 	lds	r19, 0x2461	; 0x802461 <udd_g_ctrlreq+0x7>
+    1ed8:	82 17       	cp	r24, r18
+    1eda:	93 07       	cpc	r25, r19
+    1edc:	21 f0       	breq	.+8      	; 0x1ee6 <udd_ctrl_in_sent+0x54>
+    1ede:	80 91 c4 20 	lds	r24, 0x20C4	; 0x8020c4 <b_shortpacket.5272>
+    1ee2:	88 23       	and	r24, r24
+    1ee4:	41 f0       	breq	.+16     	; 0x1ef6 <udd_ctrl_in_sent+0x64>
+    1ee6:	84 e0       	ldi	r24, 0x04	; 4
+    1ee8:	80 93 ff 21 	sts	0x21FF, r24	; 0x8021ff <udd_ep_control_state>
+    1eec:	e0 e1       	ldi	r30, 0x10	; 16
+    1eee:	f2 e2       	ldi	r31, 0x22	; 34
+    1ef0:	02 e0       	ldi	r16, 0x02	; 2
+    1ef2:	06 93       	lac	Z, r16
+    1ef4:	36 c0       	rjmp	.+108    	; 0x1f62 <udd_ctrl_in_sent+0xd0>
+    1ef6:	e0 91 68 24 	lds	r30, 0x2468	; 0x802468 <udd_g_ctrlreq+0xe>
+    1efa:	f0 91 69 24 	lds	r31, 0x2469	; 0x802469 <udd_g_ctrlreq+0xf>
+    1efe:	30 97       	sbiw	r30, 0x00	; 0
+    1f00:	99 f0       	breq	.+38     	; 0x1f28 <udd_ctrl_in_sent+0x96>
+    1f02:	09 95       	icall
+    1f04:	88 23       	and	r24, r24
+    1f06:	81 f0       	breq	.+32     	; 0x1f28 <udd_ctrl_in_sent+0x96>
+    1f08:	10 92 fb 21 	sts	0x21FB, r1	; 0x8021fb <udd_ctrl_payload_nb_trans>
+    1f0c:	10 92 fc 21 	sts	0x21FC, r1	; 0x8021fc <udd_ctrl_payload_nb_trans+0x1>
+    1f10:	c0 91 64 24 	lds	r28, 0x2464	; 0x802464 <udd_g_ctrlreq+0xa>
+    1f14:	d0 91 65 24 	lds	r29, 0x2465	; 0x802465 <udd_g_ctrlreq+0xb>
+    1f18:	c0 34       	cpi	r28, 0x40	; 64
+    1f1a:	d1 05       	cpc	r29, r1
+    1f1c:	28 f0       	brcs	.+10     	; 0x1f28 <udd_ctrl_in_sent+0x96>
+    1f1e:	10 92 c4 20 	sts	0x20C4, r1	; 0x8020c4 <b_shortpacket.5272>
+    1f22:	c0 e4       	ldi	r28, 0x40	; 64
+    1f24:	d0 e0       	ldi	r29, 0x00	; 0
+    1f26:	03 c0       	rjmp	.+6      	; 0x1f2e <udd_ctrl_in_sent+0x9c>
+    1f28:	81 e0       	ldi	r24, 0x01	; 1
+    1f2a:	80 93 c4 20 	sts	0x20C4, r24	; 0x8020c4 <b_shortpacket.5272>
+    1f2e:	e0 e0       	ldi	r30, 0x00	; 0
+    1f30:	f2 e2       	ldi	r31, 0x22	; 34
+    1f32:	c2 8f       	std	Z+26, r28	; 0x1a
+    1f34:	d3 8f       	std	Z+27, r29	; 0x1b
+    1f36:	80 91 fb 21 	lds	r24, 0x21FB	; 0x8021fb <udd_ctrl_payload_nb_trans>
+    1f3a:	90 91 fc 21 	lds	r25, 0x21FC	; 0x8021fc <udd_ctrl_payload_nb_trans+0x1>
+    1f3e:	20 91 62 24 	lds	r18, 0x2462	; 0x802462 <udd_g_ctrlreq+0x8>
+    1f42:	30 91 63 24 	lds	r19, 0x2463	; 0x802463 <udd_g_ctrlreq+0x9>
+    1f46:	28 0f       	add	r18, r24
+    1f48:	39 1f       	adc	r19, r25
+    1f4a:	24 8f       	std	Z+28, r18	; 0x1c
+    1f4c:	35 8f       	std	Z+29, r19	; 0x1d
+    1f4e:	c8 0f       	add	r28, r24
+    1f50:	d9 1f       	adc	r29, r25
+    1f52:	c0 93 fb 21 	sts	0x21FB, r28	; 0x8021fb <udd_ctrl_payload_nb_trans>
+    1f56:	d0 93 fc 21 	sts	0x21FC, r29	; 0x8021fc <udd_ctrl_payload_nb_trans+0x1>
+    1f5a:	e8 e1       	ldi	r30, 0x18	; 24
+    1f5c:	f2 e2       	ldi	r31, 0x22	; 34
+    1f5e:	02 e0       	ldi	r16, 0x02	; 2
+    1f60:	06 93       	lac	Z, r16
+    1f62:	df 91       	pop	r29
+    1f64:	cf 91       	pop	r28
+    1f66:	0f 91       	pop	r16
+    1f68:	08 95       	ret
 
-00001f54 <udd_ep_get_size>:
-    1f54:	fc 01       	movw	r30, r24
-    1f56:	81 81       	ldd	r24, Z+1	; 0x01
-    1f58:	e8 2f       	mov	r30, r24
-    1f5a:	e7 70       	andi	r30, 0x07	; 7
-    1f5c:	8e 2f       	mov	r24, r30
-    1f5e:	90 e0       	ldi	r25, 0x00	; 0
-    1f60:	fc 01       	movw	r30, r24
-    1f62:	31 97       	sbiw	r30, 0x01	; 1
-    1f64:	e7 30       	cpi	r30, 0x07	; 7
-    1f66:	f1 05       	cpc	r31, r1
-    1f68:	c0 f4       	brcc	.+48     	; 0x1f9a <udd_ep_get_size+0x46>
-    1f6a:	e2 5d       	subi	r30, 0xD2	; 210
-    1f6c:	fe 4f       	sbci	r31, 0xFE	; 254
-    1f6e:	7a c6       	rjmp	.+3316   	; 0x2c64 <__tablejump2__>
-    1f70:	80 e1       	ldi	r24, 0x10	; 16
-    1f72:	90 e0       	ldi	r25, 0x00	; 0
-    1f74:	08 95       	ret
-    1f76:	80 e2       	ldi	r24, 0x20	; 32
-    1f78:	90 e0       	ldi	r25, 0x00	; 0
-    1f7a:	08 95       	ret
-    1f7c:	80 e4       	ldi	r24, 0x40	; 64
-    1f7e:	90 e0       	ldi	r25, 0x00	; 0
-    1f80:	08 95       	ret
-    1f82:	80 e8       	ldi	r24, 0x80	; 128
-    1f84:	90 e0       	ldi	r25, 0x00	; 0
-    1f86:	08 95       	ret
-    1f88:	80 e0       	ldi	r24, 0x00	; 0
-    1f8a:	91 e0       	ldi	r25, 0x01	; 1
-    1f8c:	08 95       	ret
-    1f8e:	80 e0       	ldi	r24, 0x00	; 0
-    1f90:	92 e0       	ldi	r25, 0x02	; 2
-    1f92:	08 95       	ret
-    1f94:	8f ef       	ldi	r24, 0xFF	; 255
-    1f96:	93 e0       	ldi	r25, 0x03	; 3
-    1f98:	08 95       	ret
-    1f9a:	88 e0       	ldi	r24, 0x08	; 8
-    1f9c:	90 e0       	ldi	r25, 0x00	; 0
-    1f9e:	08 95       	ret
+00001f6a <udd_ep_get_size>:
+    1f6a:	fc 01       	movw	r30, r24
+    1f6c:	81 81       	ldd	r24, Z+1	; 0x01
+    1f6e:	e8 2f       	mov	r30, r24
+    1f70:	e7 70       	andi	r30, 0x07	; 7
+    1f72:	8e 2f       	mov	r24, r30
+    1f74:	90 e0       	ldi	r25, 0x00	; 0
+    1f76:	fc 01       	movw	r30, r24
+    1f78:	31 97       	sbiw	r30, 0x01	; 1
+    1f7a:	e7 30       	cpi	r30, 0x07	; 7
+    1f7c:	f1 05       	cpc	r31, r1
+    1f7e:	c0 f4       	brcc	.+48     	; 0x1fb0 <udd_ep_get_size+0x46>
+    1f80:	e2 5d       	subi	r30, 0xD2	; 210
+    1f82:	fe 4f       	sbci	r31, 0xFE	; 254
+    1f84:	7a c6       	rjmp	.+3316   	; 0x2c7a <__tablejump2__>
+    1f86:	80 e1       	ldi	r24, 0x10	; 16
+    1f88:	90 e0       	ldi	r25, 0x00	; 0
+    1f8a:	08 95       	ret
+    1f8c:	80 e2       	ldi	r24, 0x20	; 32
+    1f8e:	90 e0       	ldi	r25, 0x00	; 0
+    1f90:	08 95       	ret
+    1f92:	80 e4       	ldi	r24, 0x40	; 64
+    1f94:	90 e0       	ldi	r25, 0x00	; 0
+    1f96:	08 95       	ret
+    1f98:	80 e8       	ldi	r24, 0x80	; 128
+    1f9a:	90 e0       	ldi	r25, 0x00	; 0
+    1f9c:	08 95       	ret
+    1f9e:	80 e0       	ldi	r24, 0x00	; 0
+    1fa0:	91 e0       	ldi	r25, 0x01	; 1
+    1fa2:	08 95       	ret
+    1fa4:	80 e0       	ldi	r24, 0x00	; 0
+    1fa6:	92 e0       	ldi	r25, 0x02	; 2
+    1fa8:	08 95       	ret
+    1faa:	8f ef       	ldi	r24, 0xFF	; 255
+    1fac:	93 e0       	ldi	r25, 0x03	; 3
+    1fae:	08 95       	ret
+    1fb0:	88 e0       	ldi	r24, 0x08	; 8
+    1fb2:	90 e0       	ldi	r25, 0x00	; 0
+    1fb4:	08 95       	ret
 
-00001fa0 <udd_ep_get_job>:
-    1fa0:	28 2f       	mov	r18, r24
-    1fa2:	2f 70       	andi	r18, 0x0F	; 15
-    1fa4:	30 e0       	ldi	r19, 0x00	; 0
-    1fa6:	22 0f       	add	r18, r18
-    1fa8:	33 1f       	adc	r19, r19
-    1faa:	08 2e       	mov	r0, r24
-    1fac:	00 0c       	add	r0, r0
-    1fae:	99 0b       	sbc	r25, r25
-    1fb0:	88 27       	eor	r24, r24
-    1fb2:	99 0f       	add	r25, r25
-    1fb4:	88 1f       	adc	r24, r24
-    1fb6:	99 27       	eor	r25, r25
-    1fb8:	82 0f       	add	r24, r18
-    1fba:	93 1f       	adc	r25, r19
-    1fbc:	02 97       	sbiw	r24, 0x02	; 2
-    1fbe:	9c 01       	movw	r18, r24
-    1fc0:	22 0f       	add	r18, r18
-    1fc2:	33 1f       	adc	r19, r19
-    1fc4:	22 0f       	add	r18, r18
-    1fc6:	33 1f       	adc	r19, r19
-    1fc8:	22 0f       	add	r18, r18
-    1fca:	33 1f       	adc	r19, r19
-    1fcc:	82 0f       	add	r24, r18
-    1fce:	93 1f       	adc	r25, r19
-    1fd0:	8b 57       	subi	r24, 0x7B	; 123
-    1fd2:	9e 4d       	sbci	r25, 0xDE	; 222
-    1fd4:	08 95       	ret
+00001fb6 <udd_ep_get_job>:
+    1fb6:	28 2f       	mov	r18, r24
+    1fb8:	2f 70       	andi	r18, 0x0F	; 15
+    1fba:	30 e0       	ldi	r19, 0x00	; 0
+    1fbc:	22 0f       	add	r18, r18
+    1fbe:	33 1f       	adc	r19, r19
+    1fc0:	08 2e       	mov	r0, r24
+    1fc2:	00 0c       	add	r0, r0
+    1fc4:	99 0b       	sbc	r25, r25
+    1fc6:	88 27       	eor	r24, r24
+    1fc8:	99 0f       	add	r25, r25
+    1fca:	88 1f       	adc	r24, r24
+    1fcc:	99 27       	eor	r25, r25
+    1fce:	82 0f       	add	r24, r18
+    1fd0:	93 1f       	adc	r25, r19
+    1fd2:	02 97       	sbiw	r24, 0x02	; 2
+    1fd4:	9c 01       	movw	r18, r24
+    1fd6:	22 0f       	add	r18, r18
+    1fd8:	33 1f       	adc	r19, r19
+    1fda:	22 0f       	add	r18, r18
+    1fdc:	33 1f       	adc	r19, r19
+    1fde:	22 0f       	add	r18, r18
+    1fe0:	33 1f       	adc	r19, r19
+    1fe2:	82 0f       	add	r24, r18
+    1fe4:	93 1f       	adc	r25, r19
+    1fe6:	8b 57       	subi	r24, 0x7B	; 123
+    1fe8:	9e 4d       	sbci	r25, 0xDE	; 222
+    1fea:	08 95       	ret
 
-00001fd6 <udd_ctrl_interrupt_tc_setup>:
-    1fd6:	0f 93       	push	r16
-    1fd8:	cf 93       	push	r28
-    1fda:	80 91 cc 04 	lds	r24, 0x04CC	; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc>
-    1fde:	80 ff       	sbrs	r24, 0
-    1fe0:	62 c0       	rjmp	.+196    	; 0x20a6 <udd_ctrl_interrupt_tc_setup+0xd0>
-    1fe2:	81 e0       	ldi	r24, 0x01	; 1
-    1fe4:	80 93 cc 04 	sts	0x04CC, r24	; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc>
-    1fe8:	e0 e1       	ldi	r30, 0x10	; 16
-    1fea:	f2 e2       	ldi	r31, 0x22	; 34
-    1fec:	00 e8       	ldi	r16, 0x80	; 128
-    1fee:	06 93       	lac	Z, r16
-    1ff0:	e8 e1       	ldi	r30, 0x18	; 24
-    1ff2:	f2 e2       	ldi	r31, 0x22	; 34
-    1ff4:	00 e8       	ldi	r16, 0x80	; 128
-    1ff6:	06 93       	lac	Z, r16
-    1ff8:	80 93 ca 04 	sts	0x04CA, r24	; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca>
-    1ffc:	e0 e1       	ldi	r30, 0x10	; 16
-    1ffe:	f2 e2       	ldi	r31, 0x22	; 34
-    2000:	00 e1       	ldi	r16, 0x10	; 16
-    2002:	06 93       	lac	Z, r16
-    2004:	80 91 ff 21 	lds	r24, 0x21FF	; 0x8021ff <udd_ep_control_state>
-    2008:	88 23       	and	r24, r24
-    200a:	29 f0       	breq	.+10     	; 0x2016 <udd_ctrl_interrupt_tc_setup+0x40>
-    200c:	83 50       	subi	r24, 0x03	; 3
-    200e:	82 30       	cpi	r24, 0x02	; 2
-    2010:	08 f4       	brcc	.+2      	; 0x2014 <udd_ctrl_interrupt_tc_setup+0x3e>
-    2012:	2c df       	rcall	.-424    	; 0x1e6c <udd_ctrl_endofrequest>
-    2014:	e8 de       	rcall	.-560    	; 0x1de6 <udd_ctrl_init>
-    2016:	80 91 12 22 	lds	r24, 0x2212	; 0x802212 <udd_sram+0x12>
-    201a:	90 91 13 22 	lds	r25, 0x2213	; 0x802213 <udd_sram+0x13>
-    201e:	08 97       	sbiw	r24, 0x08	; 8
-    2020:	09 f0       	breq	.+2      	; 0x2024 <udd_ctrl_interrupt_tc_setup+0x4e>
-    2022:	43 c0       	rjmp	.+134    	; 0x20aa <udd_ctrl_interrupt_tc_setup+0xd4>
-    2024:	88 e0       	ldi	r24, 0x08	; 8
-    2026:	eb eb       	ldi	r30, 0xBB	; 187
-    2028:	f1 e2       	ldi	r31, 0x21	; 33
-    202a:	aa e5       	ldi	r26, 0x5A	; 90
-    202c:	b4 e2       	ldi	r27, 0x24	; 36
-    202e:	01 90       	ld	r0, Z+
-    2030:	0d 92       	st	X+, r0
-    2032:	8a 95       	dec	r24
-    2034:	e1 f7       	brne	.-8      	; 0x202e <udd_ctrl_interrupt_tc_setup+0x58>
-    2036:	e8 ec       	ldi	r30, 0xC8	; 200
-    2038:	f4 e0       	ldi	r31, 0x04	; 4
-    203a:	80 81       	ld	r24, Z
-    203c:	80 62       	ori	r24, 0x20	; 32
-    203e:	80 83       	st	Z, r24
-    2040:	80 81       	ld	r24, Z
-    2042:	80 62       	ori	r24, 0x20	; 32
-    2044:	80 83       	st	Z, r24
-    2046:	0c db       	rcall	.-2536   	; 0x1660 <udc_process_setup>
-    2048:	c8 2f       	mov	r28, r24
-    204a:	81 11       	cpse	r24, r1
-    204c:	03 c0       	rjmp	.+6      	; 0x2054 <udd_ctrl_interrupt_tc_setup+0x7e>
-    204e:	f2 de       	rcall	.-540    	; 0x1e34 <udd_ctrl_stall_data>
-    2050:	c1 e0       	ldi	r28, 0x01	; 1
-    2052:	2c c0       	rjmp	.+88     	; 0x20ac <udd_ctrl_interrupt_tc_setup+0xd6>
-    2054:	80 91 5a 24 	lds	r24, 0x245A	; 0x80245a <udd_g_ctrlreq>
-    2058:	88 23       	and	r24, r24
-    205a:	6c f4       	brge	.+26     	; 0x2076 <udd_ctrl_interrupt_tc_setup+0xa0>
-    205c:	10 92 fd 21 	sts	0x21FD, r1	; 0x8021fd <udd_ctrl_prev_payload_nb_trans>
-    2060:	10 92 fe 21 	sts	0x21FE, r1	; 0x8021fe <udd_ctrl_prev_payload_nb_trans+0x1>
-    2064:	10 92 fb 21 	sts	0x21FB, r1	; 0x8021fb <udd_ctrl_payload_nb_trans>
-    2068:	10 92 fc 21 	sts	0x21FC, r1	; 0x8021fc <udd_ctrl_payload_nb_trans+0x1>
-    206c:	82 e0       	ldi	r24, 0x02	; 2
-    206e:	80 93 ff 21 	sts	0x21FF, r24	; 0x8021ff <udd_ep_control_state>
-    2072:	04 df       	rcall	.-504    	; 0x1e7c <udd_ctrl_in_sent>
-    2074:	1b c0       	rjmp	.+54     	; 0x20ac <udd_ctrl_interrupt_tc_setup+0xd6>
-    2076:	80 91 60 24 	lds	r24, 0x2460	; 0x802460 <udd_g_ctrlreq+0x6>
-    207a:	90 91 61 24 	lds	r25, 0x2461	; 0x802461 <udd_g_ctrlreq+0x7>
-    207e:	89 2b       	or	r24, r25
-    2080:	11 f4       	brne	.+4      	; 0x2086 <udd_ctrl_interrupt_tc_setup+0xb0>
-    2082:	e6 de       	rcall	.-564    	; 0x1e50 <udd_ctrl_send_zlp_in>
-    2084:	13 c0       	rjmp	.+38     	; 0x20ac <udd_ctrl_interrupt_tc_setup+0xd6>
-    2086:	10 92 fd 21 	sts	0x21FD, r1	; 0x8021fd <udd_ctrl_prev_payload_nb_trans>
-    208a:	10 92 fe 21 	sts	0x21FE, r1	; 0x8021fe <udd_ctrl_prev_payload_nb_trans+0x1>
-    208e:	10 92 fb 21 	sts	0x21FB, r1	; 0x8021fb <udd_ctrl_payload_nb_trans>
-    2092:	10 92 fc 21 	sts	0x21FC, r1	; 0x8021fc <udd_ctrl_payload_nb_trans+0x1>
-    2096:	81 e0       	ldi	r24, 0x01	; 1
-    2098:	80 93 ff 21 	sts	0x21FF, r24	; 0x8021ff <udd_ep_control_state>
-    209c:	e0 e1       	ldi	r30, 0x10	; 16
-    209e:	f2 e2       	ldi	r31, 0x22	; 34
-    20a0:	02 e0       	ldi	r16, 0x02	; 2
-    20a2:	06 93       	lac	Z, r16
-    20a4:	03 c0       	rjmp	.+6      	; 0x20ac <udd_ctrl_interrupt_tc_setup+0xd6>
-    20a6:	c0 e0       	ldi	r28, 0x00	; 0
-    20a8:	01 c0       	rjmp	.+2      	; 0x20ac <udd_ctrl_interrupt_tc_setup+0xd6>
-    20aa:	c1 e0       	ldi	r28, 0x01	; 1
-    20ac:	8c 2f       	mov	r24, r28
-    20ae:	cf 91       	pop	r28
-    20b0:	0f 91       	pop	r16
-    20b2:	08 95       	ret
+00001fec <udd_ctrl_interrupt_tc_setup>:
+    1fec:	0f 93       	push	r16
+    1fee:	cf 93       	push	r28
+    1ff0:	80 91 cc 04 	lds	r24, 0x04CC	; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc>
+    1ff4:	80 ff       	sbrs	r24, 0
+    1ff6:	62 c0       	rjmp	.+196    	; 0x20bc <udd_ctrl_interrupt_tc_setup+0xd0>
+    1ff8:	81 e0       	ldi	r24, 0x01	; 1
+    1ffa:	80 93 cc 04 	sts	0x04CC, r24	; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc>
+    1ffe:	e0 e1       	ldi	r30, 0x10	; 16
+    2000:	f2 e2       	ldi	r31, 0x22	; 34
+    2002:	00 e8       	ldi	r16, 0x80	; 128
+    2004:	06 93       	lac	Z, r16
+    2006:	e8 e1       	ldi	r30, 0x18	; 24
+    2008:	f2 e2       	ldi	r31, 0x22	; 34
+    200a:	00 e8       	ldi	r16, 0x80	; 128
+    200c:	06 93       	lac	Z, r16
+    200e:	80 93 ca 04 	sts	0x04CA, r24	; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca>
+    2012:	e0 e1       	ldi	r30, 0x10	; 16
+    2014:	f2 e2       	ldi	r31, 0x22	; 34
+    2016:	00 e1       	ldi	r16, 0x10	; 16
+    2018:	06 93       	lac	Z, r16
+    201a:	80 91 ff 21 	lds	r24, 0x21FF	; 0x8021ff <udd_ep_control_state>
+    201e:	88 23       	and	r24, r24
+    2020:	29 f0       	breq	.+10     	; 0x202c <udd_ctrl_interrupt_tc_setup+0x40>
+    2022:	83 50       	subi	r24, 0x03	; 3
+    2024:	82 30       	cpi	r24, 0x02	; 2
+    2026:	08 f4       	brcc	.+2      	; 0x202a <udd_ctrl_interrupt_tc_setup+0x3e>
+    2028:	2c df       	rcall	.-424    	; 0x1e82 <udd_ctrl_endofrequest>
+    202a:	e8 de       	rcall	.-560    	; 0x1dfc <udd_ctrl_init>
+    202c:	80 91 12 22 	lds	r24, 0x2212	; 0x802212 <udd_sram+0x12>
+    2030:	90 91 13 22 	lds	r25, 0x2213	; 0x802213 <udd_sram+0x13>
+    2034:	08 97       	sbiw	r24, 0x08	; 8
+    2036:	09 f0       	breq	.+2      	; 0x203a <udd_ctrl_interrupt_tc_setup+0x4e>
+    2038:	43 c0       	rjmp	.+134    	; 0x20c0 <udd_ctrl_interrupt_tc_setup+0xd4>
+    203a:	88 e0       	ldi	r24, 0x08	; 8
+    203c:	eb eb       	ldi	r30, 0xBB	; 187
+    203e:	f1 e2       	ldi	r31, 0x21	; 33
+    2040:	aa e5       	ldi	r26, 0x5A	; 90
+    2042:	b4 e2       	ldi	r27, 0x24	; 36
+    2044:	01 90       	ld	r0, Z+
+    2046:	0d 92       	st	X+, r0
+    2048:	8a 95       	dec	r24
+    204a:	e1 f7       	brne	.-8      	; 0x2044 <udd_ctrl_interrupt_tc_setup+0x58>
+    204c:	e8 ec       	ldi	r30, 0xC8	; 200
+    204e:	f4 e0       	ldi	r31, 0x04	; 4
+    2050:	80 81       	ld	r24, Z
+    2052:	80 62       	ori	r24, 0x20	; 32
+    2054:	80 83       	st	Z, r24
+    2056:	80 81       	ld	r24, Z
+    2058:	80 62       	ori	r24, 0x20	; 32
+    205a:	80 83       	st	Z, r24
+    205c:	0c db       	rcall	.-2536   	; 0x1676 <udc_process_setup>
+    205e:	c8 2f       	mov	r28, r24
+    2060:	81 11       	cpse	r24, r1
+    2062:	03 c0       	rjmp	.+6      	; 0x206a <udd_ctrl_interrupt_tc_setup+0x7e>
+    2064:	f2 de       	rcall	.-540    	; 0x1e4a <udd_ctrl_stall_data>
+    2066:	c1 e0       	ldi	r28, 0x01	; 1
+    2068:	2c c0       	rjmp	.+88     	; 0x20c2 <udd_ctrl_interrupt_tc_setup+0xd6>
+    206a:	80 91 5a 24 	lds	r24, 0x245A	; 0x80245a <udd_g_ctrlreq>
+    206e:	88 23       	and	r24, r24
+    2070:	6c f4       	brge	.+26     	; 0x208c <udd_ctrl_interrupt_tc_setup+0xa0>
+    2072:	10 92 fd 21 	sts	0x21FD, r1	; 0x8021fd <udd_ctrl_prev_payload_nb_trans>
+    2076:	10 92 fe 21 	sts	0x21FE, r1	; 0x8021fe <udd_ctrl_prev_payload_nb_trans+0x1>
+    207a:	10 92 fb 21 	sts	0x21FB, r1	; 0x8021fb <udd_ctrl_payload_nb_trans>
+    207e:	10 92 fc 21 	sts	0x21FC, r1	; 0x8021fc <udd_ctrl_payload_nb_trans+0x1>
+    2082:	82 e0       	ldi	r24, 0x02	; 2
+    2084:	80 93 ff 21 	sts	0x21FF, r24	; 0x8021ff <udd_ep_control_state>
+    2088:	04 df       	rcall	.-504    	; 0x1e92 <udd_ctrl_in_sent>
+    208a:	1b c0       	rjmp	.+54     	; 0x20c2 <udd_ctrl_interrupt_tc_setup+0xd6>
+    208c:	80 91 60 24 	lds	r24, 0x2460	; 0x802460 <udd_g_ctrlreq+0x6>
+    2090:	90 91 61 24 	lds	r25, 0x2461	; 0x802461 <udd_g_ctrlreq+0x7>
+    2094:	89 2b       	or	r24, r25
+    2096:	11 f4       	brne	.+4      	; 0x209c <udd_ctrl_interrupt_tc_setup+0xb0>
+    2098:	e6 de       	rcall	.-564    	; 0x1e66 <udd_ctrl_send_zlp_in>
+    209a:	13 c0       	rjmp	.+38     	; 0x20c2 <udd_ctrl_interrupt_tc_setup+0xd6>
+    209c:	10 92 fd 21 	sts	0x21FD, r1	; 0x8021fd <udd_ctrl_prev_payload_nb_trans>
+    20a0:	10 92 fe 21 	sts	0x21FE, r1	; 0x8021fe <udd_ctrl_prev_payload_nb_trans+0x1>
+    20a4:	10 92 fb 21 	sts	0x21FB, r1	; 0x8021fb <udd_ctrl_payload_nb_trans>
+    20a8:	10 92 fc 21 	sts	0x21FC, r1	; 0x8021fc <udd_ctrl_payload_nb_trans+0x1>
+    20ac:	81 e0       	ldi	r24, 0x01	; 1
+    20ae:	80 93 ff 21 	sts	0x21FF, r24	; 0x8021ff <udd_ep_control_state>
+    20b2:	e0 e1       	ldi	r30, 0x10	; 16
+    20b4:	f2 e2       	ldi	r31, 0x22	; 34
+    20b6:	02 e0       	ldi	r16, 0x02	; 2
+    20b8:	06 93       	lac	Z, r16
+    20ba:	03 c0       	rjmp	.+6      	; 0x20c2 <udd_ctrl_interrupt_tc_setup+0xd6>
+    20bc:	c0 e0       	ldi	r28, 0x00	; 0
+    20be:	01 c0       	rjmp	.+2      	; 0x20c2 <udd_ctrl_interrupt_tc_setup+0xd6>
+    20c0:	c1 e0       	ldi	r28, 0x01	; 1
+    20c2:	8c 2f       	mov	r24, r28
+    20c4:	cf 91       	pop	r28
+    20c6:	0f 91       	pop	r16
+    20c8:	08 95       	ret
 
-000020b4 <udd_ep_trans_complet>:
-    20b4:	8f 92       	push	r8
-    20b6:	9f 92       	push	r9
-    20b8:	af 92       	push	r10
-    20ba:	bf 92       	push	r11
-    20bc:	df 92       	push	r13
-    20be:	ef 92       	push	r14
-    20c0:	ff 92       	push	r15
-    20c2:	0f 93       	push	r16
-    20c4:	1f 93       	push	r17
-    20c6:	cf 93       	push	r28
-    20c8:	df 93       	push	r29
-    20ca:	d8 2e       	mov	r13, r24
-    20cc:	69 df       	rcall	.-302    	; 0x1fa0 <udd_ep_get_job>
-    20ce:	8c 01       	movw	r16, r24
-    20d0:	bd 2c       	mov	r11, r13
-    20d2:	bb 1c       	adc	r11, r11
-    20d4:	bb 24       	eor	r11, r11
-    20d6:	bb 1c       	adc	r11, r11
-    20d8:	cd 2d       	mov	r28, r13
-    20da:	cf 70       	andi	r28, 0x0F	; 15
-    20dc:	d0 e0       	ldi	r29, 0x00	; 0
-    20de:	cc 0f       	add	r28, r28
-    20e0:	dd 1f       	adc	r29, r29
-    20e2:	cb 0d       	add	r28, r11
-    20e4:	d1 1d       	adc	r29, r1
-    20e6:	ce 01       	movw	r24, r28
-    20e8:	88 0f       	add	r24, r24
-    20ea:	99 1f       	adc	r25, r25
-    20ec:	88 0f       	add	r24, r24
-    20ee:	99 1f       	adc	r25, r25
-    20f0:	88 0f       	add	r24, r24
-    20f2:	99 1f       	adc	r25, r25
-    20f4:	9c 01       	movw	r18, r24
-    20f6:	20 5f       	subi	r18, 0xF0	; 240
-    20f8:	3d 4d       	sbci	r19, 0xDD	; 221
-    20fa:	79 01       	movw	r14, r18
-    20fc:	c9 01       	movw	r24, r18
-    20fe:	2a df       	rcall	.-428    	; 0x1f54 <udd_ep_get_size>
-    2100:	4c 01       	movw	r8, r24
-    2102:	bb 20       	and	r11, r11
-    2104:	09 f4       	brne	.+2      	; 0x2108 <udd_ep_trans_complet+0x54>
-    2106:	70 c0       	rjmp	.+224    	; 0x21e8 <udd_ep_trans_complet+0x134>
-    2108:	fe 01       	movw	r30, r28
-    210a:	ee 0f       	add	r30, r30
-    210c:	ff 1f       	adc	r31, r31
-    210e:	ee 0f       	add	r30, r30
-    2110:	ff 1f       	adc	r31, r31
-    2112:	ee 0f       	add	r30, r30
-    2114:	ff 1f       	adc	r31, r31
-    2116:	e0 50       	subi	r30, 0x00	; 0
-    2118:	fe 4d       	sbci	r31, 0xDE	; 222
-    211a:	26 89       	ldd	r18, Z+22	; 0x16
-    211c:	37 89       	ldd	r19, Z+23	; 0x17
-    211e:	d8 01       	movw	r26, r16
-    2120:	15 96       	adiw	r26, 0x05	; 5
-    2122:	8d 91       	ld	r24, X+
-    2124:	9c 91       	ld	r25, X
-    2126:	16 97       	sbiw	r26, 0x06	; 6
-    2128:	82 0f       	add	r24, r18
-    212a:	93 1f       	adc	r25, r19
-    212c:	15 96       	adiw	r26, 0x05	; 5
-    212e:	8d 93       	st	X+, r24
-    2130:	9c 93       	st	X, r25
-    2132:	16 97       	sbiw	r26, 0x06	; 6
-    2134:	13 96       	adiw	r26, 0x03	; 3
-    2136:	2d 91       	ld	r18, X+
-    2138:	3c 91       	ld	r19, X
-    213a:	14 97       	sbiw	r26, 0x04	; 4
-    213c:	82 17       	cp	r24, r18
-    213e:	93 07       	cpc	r25, r19
-    2140:	09 f4       	brne	.+2      	; 0x2144 <udd_ep_trans_complet+0x90>
-    2142:	3c c0       	rjmp	.+120    	; 0x21bc <udd_ep_trans_complet+0x108>
-    2144:	28 1b       	sub	r18, r24
-    2146:	39 0b       	sbc	r19, r25
-    2148:	21 15       	cp	r18, r1
-    214a:	b4 e0       	ldi	r27, 0x04	; 4
-    214c:	3b 07       	cpc	r19, r27
-    214e:	38 f0       	brcs	.+14     	; 0x215e <udd_ep_trans_complet+0xaa>
-    2150:	2f ef       	ldi	r18, 0xFF	; 255
-    2152:	33 e0       	ldi	r19, 0x03	; 3
-    2154:	c9 01       	movw	r24, r18
-    2156:	b4 01       	movw	r22, r8
-    2158:	71 d5       	rcall	.+2786   	; 0x2c3c <__udivmodhi4>
+000020ca <udd_ep_trans_complet>:
+    20ca:	8f 92       	push	r8
+    20cc:	9f 92       	push	r9
+    20ce:	af 92       	push	r10
+    20d0:	bf 92       	push	r11
+    20d2:	df 92       	push	r13
+    20d4:	ef 92       	push	r14
+    20d6:	ff 92       	push	r15
+    20d8:	0f 93       	push	r16
+    20da:	1f 93       	push	r17
+    20dc:	cf 93       	push	r28
+    20de:	df 93       	push	r29
+    20e0:	d8 2e       	mov	r13, r24
+    20e2:	69 df       	rcall	.-302    	; 0x1fb6 <udd_ep_get_job>
+    20e4:	8c 01       	movw	r16, r24
+    20e6:	bd 2c       	mov	r11, r13
+    20e8:	bb 1c       	adc	r11, r11
+    20ea:	bb 24       	eor	r11, r11
+    20ec:	bb 1c       	adc	r11, r11
+    20ee:	cd 2d       	mov	r28, r13
+    20f0:	cf 70       	andi	r28, 0x0F	; 15
+    20f2:	d0 e0       	ldi	r29, 0x00	; 0
+    20f4:	cc 0f       	add	r28, r28
+    20f6:	dd 1f       	adc	r29, r29
+    20f8:	cb 0d       	add	r28, r11
+    20fa:	d1 1d       	adc	r29, r1
+    20fc:	ce 01       	movw	r24, r28
+    20fe:	88 0f       	add	r24, r24
+    2100:	99 1f       	adc	r25, r25
+    2102:	88 0f       	add	r24, r24
+    2104:	99 1f       	adc	r25, r25
+    2106:	88 0f       	add	r24, r24
+    2108:	99 1f       	adc	r25, r25
+    210a:	9c 01       	movw	r18, r24
+    210c:	20 5f       	subi	r18, 0xF0	; 240
+    210e:	3d 4d       	sbci	r19, 0xDD	; 221
+    2110:	79 01       	movw	r14, r18
+    2112:	c9 01       	movw	r24, r18
+    2114:	2a df       	rcall	.-428    	; 0x1f6a <udd_ep_get_size>
+    2116:	4c 01       	movw	r8, r24
+    2118:	bb 20       	and	r11, r11
+    211a:	09 f4       	brne	.+2      	; 0x211e <udd_ep_trans_complet+0x54>
+    211c:	70 c0       	rjmp	.+224    	; 0x21fe <udd_ep_trans_complet+0x134>
+    211e:	fe 01       	movw	r30, r28
+    2120:	ee 0f       	add	r30, r30
+    2122:	ff 1f       	adc	r31, r31
+    2124:	ee 0f       	add	r30, r30
+    2126:	ff 1f       	adc	r31, r31
+    2128:	ee 0f       	add	r30, r30
+    212a:	ff 1f       	adc	r31, r31
+    212c:	e0 50       	subi	r30, 0x00	; 0
+    212e:	fe 4d       	sbci	r31, 0xDE	; 222
+    2130:	26 89       	ldd	r18, Z+22	; 0x16
+    2132:	37 89       	ldd	r19, Z+23	; 0x17
+    2134:	d8 01       	movw	r26, r16
+    2136:	15 96       	adiw	r26, 0x05	; 5
+    2138:	8d 91       	ld	r24, X+
+    213a:	9c 91       	ld	r25, X
+    213c:	16 97       	sbiw	r26, 0x06	; 6
+    213e:	82 0f       	add	r24, r18
+    2140:	93 1f       	adc	r25, r19
+    2142:	15 96       	adiw	r26, 0x05	; 5
+    2144:	8d 93       	st	X+, r24
+    2146:	9c 93       	st	X, r25
+    2148:	16 97       	sbiw	r26, 0x06	; 6
+    214a:	13 96       	adiw	r26, 0x03	; 3
+    214c:	2d 91       	ld	r18, X+
+    214e:	3c 91       	ld	r19, X
+    2150:	14 97       	sbiw	r26, 0x04	; 4
+    2152:	82 17       	cp	r24, r18
+    2154:	93 07       	cpc	r25, r19
+    2156:	09 f4       	brne	.+2      	; 0x215a <udd_ep_trans_complet+0x90>
+    2158:	3c c0       	rjmp	.+120    	; 0x21d2 <udd_ep_trans_complet+0x108>
     215a:	28 1b       	sub	r18, r24
     215c:	39 0b       	sbc	r19, r25
-    215e:	f8 01       	movw	r30, r16
-    2160:	80 81       	ld	r24, Z
-    2162:	81 ff       	sbrs	r24, 1
-    2164:	09 c0       	rjmp	.+18     	; 0x2178 <udd_ep_trans_complet+0xc4>
-    2166:	c9 01       	movw	r24, r18
-    2168:	b4 01       	movw	r22, r8
-    216a:	68 d5       	rcall	.+2768   	; 0x2c3c <__udivmodhi4>
-    216c:	41 e0       	ldi	r20, 0x01	; 1
-    216e:	89 2b       	or	r24, r25
-    2170:	09 f0       	breq	.+2      	; 0x2174 <udd_ep_trans_complet+0xc0>
-    2172:	40 e0       	ldi	r20, 0x00	; 0
-    2174:	84 2f       	mov	r24, r20
-    2176:	01 c0       	rjmp	.+2      	; 0x217a <udd_ep_trans_complet+0xc6>
-    2178:	80 e0       	ldi	r24, 0x00	; 0
-    217a:	d8 01       	movw	r26, r16
-    217c:	9c 91       	ld	r25, X
-    217e:	80 fb       	bst	r24, 0
-    2180:	91 f9       	bld	r25, 1
-    2182:	9c 93       	st	X, r25
-    2184:	cc 0f       	add	r28, r28
-    2186:	dd 1f       	adc	r29, r29
-    2188:	cc 0f       	add	r28, r28
-    218a:	dd 1f       	adc	r29, r29
-    218c:	cc 0f       	add	r28, r28
-    218e:	dd 1f       	adc	r29, r29
-    2190:	c0 50       	subi	r28, 0x00	; 0
-    2192:	de 4d       	sbci	r29, 0xDE	; 222
-    2194:	1e 8a       	std	Y+22, r1	; 0x16
-    2196:	1f 8a       	std	Y+23, r1	; 0x17
-    2198:	2a 8b       	std	Y+18, r18	; 0x12
-    219a:	3b 8b       	std	Y+19, r19	; 0x13
-    219c:	11 96       	adiw	r26, 0x01	; 1
-    219e:	2d 91       	ld	r18, X+
-    21a0:	3c 91       	ld	r19, X
-    21a2:	12 97       	sbiw	r26, 0x02	; 2
-    21a4:	15 96       	adiw	r26, 0x05	; 5
-    21a6:	8d 91       	ld	r24, X+
-    21a8:	9c 91       	ld	r25, X
-    21aa:	16 97       	sbiw	r26, 0x06	; 6
-    21ac:	82 0f       	add	r24, r18
-    21ae:	93 1f       	adc	r25, r19
-    21b0:	8c 8b       	std	Y+20, r24	; 0x14
-    21b2:	9d 8b       	std	Y+21, r25	; 0x15
-    21b4:	f7 01       	movw	r30, r14
-    21b6:	02 e0       	ldi	r16, 0x02	; 2
-    21b8:	06 93       	lac	Z, r16
-    21ba:	ca c0       	rjmp	.+404    	; 0x2350 <udd_ep_trans_complet+0x29c>
-    21bc:	d8 01       	movw	r26, r16
-    21be:	8c 91       	ld	r24, X
-    21c0:	81 ff       	sbrs	r24, 1
-    21c2:	b3 c0       	rjmp	.+358    	; 0x232a <udd_ep_trans_complet+0x276>
-    21c4:	8d 7f       	andi	r24, 0xFD	; 253
-    21c6:	8c 93       	st	X, r24
-    21c8:	cc 0f       	add	r28, r28
-    21ca:	dd 1f       	adc	r29, r29
-    21cc:	cc 0f       	add	r28, r28
-    21ce:	dd 1f       	adc	r29, r29
-    21d0:	cc 0f       	add	r28, r28
-    21d2:	dd 1f       	adc	r29, r29
-    21d4:	c0 50       	subi	r28, 0x00	; 0
-    21d6:	de 4d       	sbci	r29, 0xDE	; 222
-    21d8:	1e 8a       	std	Y+22, r1	; 0x16
-    21da:	1f 8a       	std	Y+23, r1	; 0x17
-    21dc:	1a 8a       	std	Y+18, r1	; 0x12
-    21de:	1b 8a       	std	Y+19, r1	; 0x13
-    21e0:	f7 01       	movw	r30, r14
-    21e2:	02 e0       	ldi	r16, 0x02	; 2
-    21e4:	06 93       	lac	Z, r16
-    21e6:	b4 c0       	rjmp	.+360    	; 0x2350 <udd_ep_trans_complet+0x29c>
-    21e8:	fe 01       	movw	r30, r28
-    21ea:	ee 0f       	add	r30, r30
-    21ec:	ff 1f       	adc	r31, r31
-    21ee:	ee 0f       	add	r30, r30
-    21f0:	ff 1f       	adc	r31, r31
-    21f2:	ee 0f       	add	r30, r30
-    21f4:	ff 1f       	adc	r31, r31
-    21f6:	e0 50       	subi	r30, 0x00	; 0
-    21f8:	fe 4d       	sbci	r31, 0xDE	; 222
-    21fa:	a2 88       	ldd	r10, Z+18	; 0x12
-    21fc:	b3 88       	ldd	r11, Z+19	; 0x13
-    21fe:	d8 01       	movw	r26, r16
-    2200:	8c 91       	ld	r24, X
-    2202:	82 ff       	sbrs	r24, 2
-    2204:	19 c0       	rjmp	.+50     	; 0x2238 <udd_ep_trans_complet+0x184>
-    2206:	11 96       	adiw	r26, 0x01	; 1
-    2208:	ed 91       	ld	r30, X+
-    220a:	fc 91       	ld	r31, X
-    220c:	12 97       	sbiw	r26, 0x02	; 2
-    220e:	15 96       	adiw	r26, 0x05	; 5
-    2210:	2d 91       	ld	r18, X+
-    2212:	3c 91       	ld	r19, X
-    2214:	16 97       	sbiw	r26, 0x06	; 6
-    2216:	13 96       	adiw	r26, 0x03	; 3
-    2218:	8d 91       	ld	r24, X+
-    221a:	9c 91       	ld	r25, X
-    221c:	14 97       	sbiw	r26, 0x04	; 4
-    221e:	b4 01       	movw	r22, r8
-    2220:	0d d5       	rcall	.+2586   	; 0x2c3c <__udivmodhi4>
-    2222:	b0 e4       	ldi	r27, 0x40	; 64
-    2224:	db 9e       	mul	r13, r27
-    2226:	b0 01       	movw	r22, r0
-    2228:	11 24       	eor	r1, r1
-    222a:	6b 57       	subi	r22, 0x7B	; 123
-    222c:	7f 4d       	sbci	r23, 0xDF	; 223
-    222e:	ac 01       	movw	r20, r24
-    2230:	cf 01       	movw	r24, r30
-    2232:	82 0f       	add	r24, r18
-    2234:	93 1f       	adc	r25, r19
-    2236:	1c d5       	rcall	.+2616   	; 0x2c70 <memcpy>
-    2238:	f8 01       	movw	r30, r16
-    223a:	25 81       	ldd	r18, Z+5	; 0x05
-    223c:	36 81       	ldd	r19, Z+6	; 0x06
-    223e:	2a 0d       	add	r18, r10
-    2240:	3b 1d       	adc	r19, r11
-    2242:	25 83       	std	Z+5, r18	; 0x05
-    2244:	36 83       	std	Z+6, r19	; 0x06
-    2246:	83 81       	ldd	r24, Z+3	; 0x03
-    2248:	94 81       	ldd	r25, Z+4	; 0x04
-    224a:	82 17       	cp	r24, r18
-    224c:	93 07       	cpc	r25, r19
-    224e:	68 f4       	brcc	.+26     	; 0x226a <udd_ep_trans_complet+0x1b6>
-    2250:	85 83       	std	Z+5, r24	; 0x05
-    2252:	96 83       	std	Z+6, r25	; 0x06
-    2254:	cc 0f       	add	r28, r28
-    2256:	dd 1f       	adc	r29, r29
-    2258:	cc 0f       	add	r28, r28
-    225a:	dd 1f       	adc	r29, r29
-    225c:	cc 0f       	add	r28, r28
-    225e:	dd 1f       	adc	r29, r29
-    2260:	c0 50       	subi	r28, 0x00	; 0
-    2262:	de 4d       	sbci	r29, 0xDE	; 222
-    2264:	8e 89       	ldd	r24, Y+22	; 0x16
-    2266:	9f 89       	ldd	r25, Y+23	; 0x17
-    2268:	60 c0       	rjmp	.+192    	; 0x232a <udd_ep_trans_complet+0x276>
-    226a:	fe 01       	movw	r30, r28
-    226c:	ee 0f       	add	r30, r30
-    226e:	ff 1f       	adc	r31, r31
-    2270:	ee 0f       	add	r30, r30
-    2272:	ff 1f       	adc	r31, r31
-    2274:	ee 0f       	add	r30, r30
-    2276:	ff 1f       	adc	r31, r31
-    2278:	e0 50       	subi	r30, 0x00	; 0
-    227a:	fe 4d       	sbci	r31, 0xDE	; 222
-    227c:	46 89       	ldd	r20, Z+22	; 0x16
-    227e:	57 89       	ldd	r21, Z+23	; 0x17
-    2280:	4a 15       	cp	r20, r10
-    2282:	5b 05       	cpc	r21, r11
-    2284:	09 f0       	breq	.+2      	; 0x2288 <udd_ep_trans_complet+0x1d4>
-    2286:	51 c0       	rjmp	.+162    	; 0x232a <udd_ep_trans_complet+0x276>
-    2288:	28 17       	cp	r18, r24
-    228a:	39 07       	cpc	r19, r25
-    228c:	09 f4       	brne	.+2      	; 0x2290 <udd_ep_trans_complet+0x1dc>
-    228e:	4d c0       	rjmp	.+154    	; 0x232a <udd_ep_trans_complet+0x276>
-    2290:	ac 01       	movw	r20, r24
-    2292:	42 1b       	sub	r20, r18
-    2294:	53 0b       	sbc	r21, r19
-    2296:	9a 01       	movw	r18, r20
-    2298:	21 15       	cp	r18, r1
-    229a:	54 e0       	ldi	r21, 0x04	; 4
-    229c:	35 07       	cpc	r19, r21
-    229e:	50 f0       	brcs	.+20     	; 0x22b4 <udd_ep_trans_complet+0x200>
-    22a0:	2f ef       	ldi	r18, 0xFF	; 255
-    22a2:	33 e0       	ldi	r19, 0x03	; 3
-    22a4:	c9 01       	movw	r24, r18
-    22a6:	b4 01       	movw	r22, r8
-    22a8:	c9 d4       	rcall	.+2450   	; 0x2c3c <__udivmodhi4>
-    22aa:	d9 01       	movw	r26, r18
-    22ac:	a8 1b       	sub	r26, r24
-    22ae:	b9 0b       	sbc	r27, r25
-    22b0:	cd 01       	movw	r24, r26
-    22b2:	07 c0       	rjmp	.+14     	; 0x22c2 <udd_ep_trans_complet+0x20e>
-    22b4:	c9 01       	movw	r24, r18
-    22b6:	b4 01       	movw	r22, r8
-    22b8:	c1 d4       	rcall	.+2434   	; 0x2c3c <__udivmodhi4>
-    22ba:	f9 01       	movw	r30, r18
-    22bc:	e8 1b       	sub	r30, r24
-    22be:	f9 0b       	sbc	r31, r25
-    22c0:	cf 01       	movw	r24, r30
-    22c2:	fe 01       	movw	r30, r28
-    22c4:	ee 0f       	add	r30, r30
-    22c6:	ff 1f       	adc	r31, r31
-    22c8:	ee 0f       	add	r30, r30
-    22ca:	ff 1f       	adc	r31, r31
-    22cc:	ee 0f       	add	r30, r30
-    22ce:	ff 1f       	adc	r31, r31
-    22d0:	e0 50       	subi	r30, 0x00	; 0
-    22d2:	fe 4d       	sbci	r31, 0xDE	; 222
-    22d4:	12 8a       	std	Z+18, r1	; 0x12
-    22d6:	13 8a       	std	Z+19, r1	; 0x13
-    22d8:	88 15       	cp	r24, r8
-    22da:	99 05       	cpc	r25, r9
-    22dc:	78 f4       	brcc	.+30     	; 0x22fc <udd_ep_trans_complet+0x248>
-    22de:	d8 01       	movw	r26, r16
-    22e0:	8c 91       	ld	r24, X
-    22e2:	84 60       	ori	r24, 0x04	; 4
-    22e4:	8c 93       	st	X, r24
-    22e6:	b0 e4       	ldi	r27, 0x40	; 64
-    22e8:	db 9e       	mul	r13, r27
-    22ea:	c0 01       	movw	r24, r0
-    22ec:	11 24       	eor	r1, r1
-    22ee:	8b 57       	subi	r24, 0x7B	; 123
-    22f0:	9f 4d       	sbci	r25, 0xDF	; 223
-    22f2:	84 8b       	std	Z+20, r24	; 0x14
-    22f4:	95 8b       	std	Z+21, r25	; 0x15
-    22f6:	86 8a       	std	Z+22, r8	; 0x16
-    22f8:	97 8a       	std	Z+23, r9	; 0x17
-    22fa:	13 c0       	rjmp	.+38     	; 0x2322 <udd_ep_trans_complet+0x26e>
-    22fc:	f8 01       	movw	r30, r16
-    22fe:	41 81       	ldd	r20, Z+1	; 0x01
-    2300:	52 81       	ldd	r21, Z+2	; 0x02
-    2302:	25 81       	ldd	r18, Z+5	; 0x05
-    2304:	36 81       	ldd	r19, Z+6	; 0x06
-    2306:	24 0f       	add	r18, r20
-    2308:	35 1f       	adc	r19, r21
-    230a:	cc 0f       	add	r28, r28
-    230c:	dd 1f       	adc	r29, r29
-    230e:	cc 0f       	add	r28, r28
-    2310:	dd 1f       	adc	r29, r29
-    2312:	cc 0f       	add	r28, r28
-    2314:	dd 1f       	adc	r29, r29
-    2316:	c0 50       	subi	r28, 0x00	; 0
-    2318:	de 4d       	sbci	r29, 0xDE	; 222
-    231a:	2c 8b       	std	Y+20, r18	; 0x14
-    231c:	3d 8b       	std	Y+21, r19	; 0x15
-    231e:	8e 8b       	std	Y+22, r24	; 0x16
-    2320:	9f 8b       	std	Y+23, r25	; 0x17
-    2322:	f7 01       	movw	r30, r14
-    2324:	02 e0       	ldi	r16, 0x02	; 2
-    2326:	06 93       	lac	Z, r16
-    2328:	13 c0       	rjmp	.+38     	; 0x2350 <udd_ep_trans_complet+0x29c>
-    232a:	d8 01       	movw	r26, r16
-    232c:	8c 91       	ld	r24, X
-    232e:	80 ff       	sbrs	r24, 0
-    2330:	0f c0       	rjmp	.+30     	; 0x2350 <udd_ep_trans_complet+0x29c>
-    2332:	8e 7f       	andi	r24, 0xFE	; 254
-    2334:	8c 93       	st	X, r24
-    2336:	17 96       	adiw	r26, 0x07	; 7
-    2338:	ed 91       	ld	r30, X+
-    233a:	fc 91       	ld	r31, X
-    233c:	18 97       	sbiw	r26, 0x08	; 8
-    233e:	30 97       	sbiw	r30, 0x00	; 0
-    2340:	39 f0       	breq	.+14     	; 0x2350 <udd_ep_trans_complet+0x29c>
-    2342:	15 96       	adiw	r26, 0x05	; 5
-    2344:	6d 91       	ld	r22, X+
-    2346:	7c 91       	ld	r23, X
-    2348:	16 97       	sbiw	r26, 0x06	; 6
-    234a:	4d 2d       	mov	r20, r13
-    234c:	80 e0       	ldi	r24, 0x00	; 0
-    234e:	09 95       	icall
-    2350:	df 91       	pop	r29
-    2352:	cf 91       	pop	r28
-    2354:	1f 91       	pop	r17
-    2356:	0f 91       	pop	r16
-    2358:	ff 90       	pop	r15
-    235a:	ef 90       	pop	r14
-    235c:	df 90       	pop	r13
-    235e:	bf 90       	pop	r11
-    2360:	af 90       	pop	r10
-    2362:	9f 90       	pop	r9
-    2364:	8f 90       	pop	r8
-    2366:	08 95       	ret
+    215e:	21 15       	cp	r18, r1
+    2160:	b4 e0       	ldi	r27, 0x04	; 4
+    2162:	3b 07       	cpc	r19, r27
+    2164:	38 f0       	brcs	.+14     	; 0x2174 <udd_ep_trans_complet+0xaa>
+    2166:	2f ef       	ldi	r18, 0xFF	; 255
+    2168:	33 e0       	ldi	r19, 0x03	; 3
+    216a:	c9 01       	movw	r24, r18
+    216c:	b4 01       	movw	r22, r8
+    216e:	71 d5       	rcall	.+2786   	; 0x2c52 <__udivmodhi4>
+    2170:	28 1b       	sub	r18, r24
+    2172:	39 0b       	sbc	r19, r25
+    2174:	f8 01       	movw	r30, r16
+    2176:	80 81       	ld	r24, Z
+    2178:	81 ff       	sbrs	r24, 1
+    217a:	09 c0       	rjmp	.+18     	; 0x218e <udd_ep_trans_complet+0xc4>
+    217c:	c9 01       	movw	r24, r18
+    217e:	b4 01       	movw	r22, r8
+    2180:	68 d5       	rcall	.+2768   	; 0x2c52 <__udivmodhi4>
+    2182:	41 e0       	ldi	r20, 0x01	; 1
+    2184:	89 2b       	or	r24, r25
+    2186:	09 f0       	breq	.+2      	; 0x218a <udd_ep_trans_complet+0xc0>
+    2188:	40 e0       	ldi	r20, 0x00	; 0
+    218a:	84 2f       	mov	r24, r20
+    218c:	01 c0       	rjmp	.+2      	; 0x2190 <udd_ep_trans_complet+0xc6>
+    218e:	80 e0       	ldi	r24, 0x00	; 0
+    2190:	d8 01       	movw	r26, r16
+    2192:	9c 91       	ld	r25, X
+    2194:	80 fb       	bst	r24, 0
+    2196:	91 f9       	bld	r25, 1
+    2198:	9c 93       	st	X, r25
+    219a:	cc 0f       	add	r28, r28
+    219c:	dd 1f       	adc	r29, r29
+    219e:	cc 0f       	add	r28, r28
+    21a0:	dd 1f       	adc	r29, r29
+    21a2:	cc 0f       	add	r28, r28
+    21a4:	dd 1f       	adc	r29, r29
+    21a6:	c0 50       	subi	r28, 0x00	; 0
+    21a8:	de 4d       	sbci	r29, 0xDE	; 222
+    21aa:	1e 8a       	std	Y+22, r1	; 0x16
+    21ac:	1f 8a       	std	Y+23, r1	; 0x17
+    21ae:	2a 8b       	std	Y+18, r18	; 0x12
+    21b0:	3b 8b       	std	Y+19, r19	; 0x13
+    21b2:	11 96       	adiw	r26, 0x01	; 1
+    21b4:	2d 91       	ld	r18, X+
+    21b6:	3c 91       	ld	r19, X
+    21b8:	12 97       	sbiw	r26, 0x02	; 2
+    21ba:	15 96       	adiw	r26, 0x05	; 5
+    21bc:	8d 91       	ld	r24, X+
+    21be:	9c 91       	ld	r25, X
+    21c0:	16 97       	sbiw	r26, 0x06	; 6
+    21c2:	82 0f       	add	r24, r18
+    21c4:	93 1f       	adc	r25, r19
+    21c6:	8c 8b       	std	Y+20, r24	; 0x14
+    21c8:	9d 8b       	std	Y+21, r25	; 0x15
+    21ca:	f7 01       	movw	r30, r14
+    21cc:	02 e0       	ldi	r16, 0x02	; 2
+    21ce:	06 93       	lac	Z, r16
+    21d0:	ca c0       	rjmp	.+404    	; 0x2366 <udd_ep_trans_complet+0x29c>
+    21d2:	d8 01       	movw	r26, r16
+    21d4:	8c 91       	ld	r24, X
+    21d6:	81 ff       	sbrs	r24, 1
+    21d8:	b3 c0       	rjmp	.+358    	; 0x2340 <udd_ep_trans_complet+0x276>
+    21da:	8d 7f       	andi	r24, 0xFD	; 253
+    21dc:	8c 93       	st	X, r24
+    21de:	cc 0f       	add	r28, r28
+    21e0:	dd 1f       	adc	r29, r29
+    21e2:	cc 0f       	add	r28, r28
+    21e4:	dd 1f       	adc	r29, r29
+    21e6:	cc 0f       	add	r28, r28
+    21e8:	dd 1f       	adc	r29, r29
+    21ea:	c0 50       	subi	r28, 0x00	; 0
+    21ec:	de 4d       	sbci	r29, 0xDE	; 222
+    21ee:	1e 8a       	std	Y+22, r1	; 0x16
+    21f0:	1f 8a       	std	Y+23, r1	; 0x17
+    21f2:	1a 8a       	std	Y+18, r1	; 0x12
+    21f4:	1b 8a       	std	Y+19, r1	; 0x13
+    21f6:	f7 01       	movw	r30, r14
+    21f8:	02 e0       	ldi	r16, 0x02	; 2
+    21fa:	06 93       	lac	Z, r16
+    21fc:	b4 c0       	rjmp	.+360    	; 0x2366 <udd_ep_trans_complet+0x29c>
+    21fe:	fe 01       	movw	r30, r28
+    2200:	ee 0f       	add	r30, r30
+    2202:	ff 1f       	adc	r31, r31
+    2204:	ee 0f       	add	r30, r30
+    2206:	ff 1f       	adc	r31, r31
+    2208:	ee 0f       	add	r30, r30
+    220a:	ff 1f       	adc	r31, r31
+    220c:	e0 50       	subi	r30, 0x00	; 0
+    220e:	fe 4d       	sbci	r31, 0xDE	; 222
+    2210:	a2 88       	ldd	r10, Z+18	; 0x12
+    2212:	b3 88       	ldd	r11, Z+19	; 0x13
+    2214:	d8 01       	movw	r26, r16
+    2216:	8c 91       	ld	r24, X
+    2218:	82 ff       	sbrs	r24, 2
+    221a:	19 c0       	rjmp	.+50     	; 0x224e <udd_ep_trans_complet+0x184>
+    221c:	11 96       	adiw	r26, 0x01	; 1
+    221e:	ed 91       	ld	r30, X+
+    2220:	fc 91       	ld	r31, X
+    2222:	12 97       	sbiw	r26, 0x02	; 2
+    2224:	15 96       	adiw	r26, 0x05	; 5
+    2226:	2d 91       	ld	r18, X+
+    2228:	3c 91       	ld	r19, X
+    222a:	16 97       	sbiw	r26, 0x06	; 6
+    222c:	13 96       	adiw	r26, 0x03	; 3
+    222e:	8d 91       	ld	r24, X+
+    2230:	9c 91       	ld	r25, X
+    2232:	14 97       	sbiw	r26, 0x04	; 4
+    2234:	b4 01       	movw	r22, r8
+    2236:	0d d5       	rcall	.+2586   	; 0x2c52 <__udivmodhi4>
+    2238:	b0 e4       	ldi	r27, 0x40	; 64
+    223a:	db 9e       	mul	r13, r27
+    223c:	b0 01       	movw	r22, r0
+    223e:	11 24       	eor	r1, r1
+    2240:	6b 57       	subi	r22, 0x7B	; 123
+    2242:	7f 4d       	sbci	r23, 0xDF	; 223
+    2244:	ac 01       	movw	r20, r24
+    2246:	cf 01       	movw	r24, r30
+    2248:	82 0f       	add	r24, r18
+    224a:	93 1f       	adc	r25, r19
+    224c:	1c d5       	rcall	.+2616   	; 0x2c86 <memcpy>
+    224e:	f8 01       	movw	r30, r16
+    2250:	25 81       	ldd	r18, Z+5	; 0x05
+    2252:	36 81       	ldd	r19, Z+6	; 0x06
+    2254:	2a 0d       	add	r18, r10
+    2256:	3b 1d       	adc	r19, r11
+    2258:	25 83       	std	Z+5, r18	; 0x05
+    225a:	36 83       	std	Z+6, r19	; 0x06
+    225c:	83 81       	ldd	r24, Z+3	; 0x03
+    225e:	94 81       	ldd	r25, Z+4	; 0x04
+    2260:	82 17       	cp	r24, r18
+    2262:	93 07       	cpc	r25, r19
+    2264:	68 f4       	brcc	.+26     	; 0x2280 <udd_ep_trans_complet+0x1b6>
+    2266:	85 83       	std	Z+5, r24	; 0x05
+    2268:	96 83       	std	Z+6, r25	; 0x06
+    226a:	cc 0f       	add	r28, r28
+    226c:	dd 1f       	adc	r29, r29
+    226e:	cc 0f       	add	r28, r28
+    2270:	dd 1f       	adc	r29, r29
+    2272:	cc 0f       	add	r28, r28
+    2274:	dd 1f       	adc	r29, r29
+    2276:	c0 50       	subi	r28, 0x00	; 0
+    2278:	de 4d       	sbci	r29, 0xDE	; 222
+    227a:	8e 89       	ldd	r24, Y+22	; 0x16
+    227c:	9f 89       	ldd	r25, Y+23	; 0x17
+    227e:	60 c0       	rjmp	.+192    	; 0x2340 <udd_ep_trans_complet+0x276>
+    2280:	fe 01       	movw	r30, r28
+    2282:	ee 0f       	add	r30, r30
+    2284:	ff 1f       	adc	r31, r31
+    2286:	ee 0f       	add	r30, r30
+    2288:	ff 1f       	adc	r31, r31
+    228a:	ee 0f       	add	r30, r30
+    228c:	ff 1f       	adc	r31, r31
+    228e:	e0 50       	subi	r30, 0x00	; 0
+    2290:	fe 4d       	sbci	r31, 0xDE	; 222
+    2292:	46 89       	ldd	r20, Z+22	; 0x16
+    2294:	57 89       	ldd	r21, Z+23	; 0x17
+    2296:	4a 15       	cp	r20, r10
+    2298:	5b 05       	cpc	r21, r11
+    229a:	09 f0       	breq	.+2      	; 0x229e <udd_ep_trans_complet+0x1d4>
+    229c:	51 c0       	rjmp	.+162    	; 0x2340 <udd_ep_trans_complet+0x276>
+    229e:	28 17       	cp	r18, r24
+    22a0:	39 07       	cpc	r19, r25
+    22a2:	09 f4       	brne	.+2      	; 0x22a6 <udd_ep_trans_complet+0x1dc>
+    22a4:	4d c0       	rjmp	.+154    	; 0x2340 <udd_ep_trans_complet+0x276>
+    22a6:	ac 01       	movw	r20, r24
+    22a8:	42 1b       	sub	r20, r18
+    22aa:	53 0b       	sbc	r21, r19
+    22ac:	9a 01       	movw	r18, r20
+    22ae:	21 15       	cp	r18, r1
+    22b0:	54 e0       	ldi	r21, 0x04	; 4
+    22b2:	35 07       	cpc	r19, r21
+    22b4:	50 f0       	brcs	.+20     	; 0x22ca <udd_ep_trans_complet+0x200>
+    22b6:	2f ef       	ldi	r18, 0xFF	; 255
+    22b8:	33 e0       	ldi	r19, 0x03	; 3
+    22ba:	c9 01       	movw	r24, r18
+    22bc:	b4 01       	movw	r22, r8
+    22be:	c9 d4       	rcall	.+2450   	; 0x2c52 <__udivmodhi4>
+    22c0:	d9 01       	movw	r26, r18
+    22c2:	a8 1b       	sub	r26, r24
+    22c4:	b9 0b       	sbc	r27, r25
+    22c6:	cd 01       	movw	r24, r26
+    22c8:	07 c0       	rjmp	.+14     	; 0x22d8 <udd_ep_trans_complet+0x20e>
+    22ca:	c9 01       	movw	r24, r18
+    22cc:	b4 01       	movw	r22, r8
+    22ce:	c1 d4       	rcall	.+2434   	; 0x2c52 <__udivmodhi4>
+    22d0:	f9 01       	movw	r30, r18
+    22d2:	e8 1b       	sub	r30, r24
+    22d4:	f9 0b       	sbc	r31, r25
+    22d6:	cf 01       	movw	r24, r30
+    22d8:	fe 01       	movw	r30, r28
+    22da:	ee 0f       	add	r30, r30
+    22dc:	ff 1f       	adc	r31, r31
+    22de:	ee 0f       	add	r30, r30
+    22e0:	ff 1f       	adc	r31, r31
+    22e2:	ee 0f       	add	r30, r30
+    22e4:	ff 1f       	adc	r31, r31
+    22e6:	e0 50       	subi	r30, 0x00	; 0
+    22e8:	fe 4d       	sbci	r31, 0xDE	; 222
+    22ea:	12 8a       	std	Z+18, r1	; 0x12
+    22ec:	13 8a       	std	Z+19, r1	; 0x13
+    22ee:	88 15       	cp	r24, r8
+    22f0:	99 05       	cpc	r25, r9
+    22f2:	78 f4       	brcc	.+30     	; 0x2312 <udd_ep_trans_complet+0x248>
+    22f4:	d8 01       	movw	r26, r16
+    22f6:	8c 91       	ld	r24, X
+    22f8:	84 60       	ori	r24, 0x04	; 4
+    22fa:	8c 93       	st	X, r24
+    22fc:	b0 e4       	ldi	r27, 0x40	; 64
+    22fe:	db 9e       	mul	r13, r27
+    2300:	c0 01       	movw	r24, r0
+    2302:	11 24       	eor	r1, r1
+    2304:	8b 57       	subi	r24, 0x7B	; 123
+    2306:	9f 4d       	sbci	r25, 0xDF	; 223
+    2308:	84 8b       	std	Z+20, r24	; 0x14
+    230a:	95 8b       	std	Z+21, r25	; 0x15
+    230c:	86 8a       	std	Z+22, r8	; 0x16
+    230e:	97 8a       	std	Z+23, r9	; 0x17
+    2310:	13 c0       	rjmp	.+38     	; 0x2338 <udd_ep_trans_complet+0x26e>
+    2312:	f8 01       	movw	r30, r16
+    2314:	41 81       	ldd	r20, Z+1	; 0x01
+    2316:	52 81       	ldd	r21, Z+2	; 0x02
+    2318:	25 81       	ldd	r18, Z+5	; 0x05
+    231a:	36 81       	ldd	r19, Z+6	; 0x06
+    231c:	24 0f       	add	r18, r20
+    231e:	35 1f       	adc	r19, r21
+    2320:	cc 0f       	add	r28, r28
+    2322:	dd 1f       	adc	r29, r29
+    2324:	cc 0f       	add	r28, r28
+    2326:	dd 1f       	adc	r29, r29
+    2328:	cc 0f       	add	r28, r28
+    232a:	dd 1f       	adc	r29, r29
+    232c:	c0 50       	subi	r28, 0x00	; 0
+    232e:	de 4d       	sbci	r29, 0xDE	; 222
+    2330:	2c 8b       	std	Y+20, r18	; 0x14
+    2332:	3d 8b       	std	Y+21, r19	; 0x15
+    2334:	8e 8b       	std	Y+22, r24	; 0x16
+    2336:	9f 8b       	std	Y+23, r25	; 0x17
+    2338:	f7 01       	movw	r30, r14
+    233a:	02 e0       	ldi	r16, 0x02	; 2
+    233c:	06 93       	lac	Z, r16
+    233e:	13 c0       	rjmp	.+38     	; 0x2366 <udd_ep_trans_complet+0x29c>
+    2340:	d8 01       	movw	r26, r16
+    2342:	8c 91       	ld	r24, X
+    2344:	80 ff       	sbrs	r24, 0
+    2346:	0f c0       	rjmp	.+30     	; 0x2366 <udd_ep_trans_complet+0x29c>
+    2348:	8e 7f       	andi	r24, 0xFE	; 254
+    234a:	8c 93       	st	X, r24
+    234c:	17 96       	adiw	r26, 0x07	; 7
+    234e:	ed 91       	ld	r30, X+
+    2350:	fc 91       	ld	r31, X
+    2352:	18 97       	sbiw	r26, 0x08	; 8
+    2354:	30 97       	sbiw	r30, 0x00	; 0
+    2356:	39 f0       	breq	.+14     	; 0x2366 <udd_ep_trans_complet+0x29c>
+    2358:	15 96       	adiw	r26, 0x05	; 5
+    235a:	6d 91       	ld	r22, X+
+    235c:	7c 91       	ld	r23, X
+    235e:	16 97       	sbiw	r26, 0x06	; 6
+    2360:	4d 2d       	mov	r20, r13
+    2362:	80 e0       	ldi	r24, 0x00	; 0
+    2364:	09 95       	icall
+    2366:	df 91       	pop	r29
+    2368:	cf 91       	pop	r28
+    236a:	1f 91       	pop	r17
+    236c:	0f 91       	pop	r16
+    236e:	ff 90       	pop	r15
+    2370:	ef 90       	pop	r14
+    2372:	df 90       	pop	r13
+    2374:	bf 90       	pop	r11
+    2376:	af 90       	pop	r10
+    2378:	9f 90       	pop	r9
+    237a:	8f 90       	pop	r8
+    237c:	08 95       	ret
 
-00002368 <udd_attach>:
-    2368:	cf 93       	push	r28
-    236a:	cf b7       	in	r28, 0x3f	; 63
-    236c:	f8 94       	cli
-    236e:	81 e0       	ldi	r24, 0x01	; 1
-    2370:	11 dd       	rcall	.-1502   	; 0x1d94 <udd_sleep_mode>
-    2372:	ea ec       	ldi	r30, 0xCA	; 202
-    2374:	f4 e0       	ldi	r31, 0x04	; 4
-    2376:	80 e4       	ldi	r24, 0x40	; 64
-    2378:	80 83       	st	Z, r24
-    237a:	80 e2       	ldi	r24, 0x20	; 32
-    237c:	80 83       	st	Z, r24
-    237e:	e1 ec       	ldi	r30, 0xC1	; 193
-    2380:	f4 e0       	ldi	r31, 0x04	; 4
-    2382:	80 81       	ld	r24, Z
-    2384:	81 60       	ori	r24, 0x01	; 1
-    2386:	80 83       	st	Z, r24
-    2388:	a9 ec       	ldi	r26, 0xC9	; 201
-    238a:	b4 e0       	ldi	r27, 0x04	; 4
-    238c:	8c 91       	ld	r24, X
-    238e:	82 60       	ori	r24, 0x02	; 2
-    2390:	8c 93       	st	X, r24
-    2392:	e8 ec       	ldi	r30, 0xC8	; 200
-    2394:	f4 e0       	ldi	r31, 0x04	; 4
-    2396:	80 81       	ld	r24, Z
-    2398:	80 64       	ori	r24, 0x40	; 64
-    239a:	80 83       	st	Z, r24
-    239c:	8c 91       	ld	r24, X
-    239e:	81 60       	ori	r24, 0x01	; 1
-    23a0:	8c 93       	st	X, r24
-    23a2:	80 81       	ld	r24, Z
-    23a4:	80 68       	ori	r24, 0x80	; 128
-    23a6:	80 83       	st	Z, r24
-    23a8:	cf bf       	out	0x3f, r28	; 63
-    23aa:	cf 91       	pop	r28
-    23ac:	08 95       	ret
+0000237e <udd_attach>:
+    237e:	cf 93       	push	r28
+    2380:	cf b7       	in	r28, 0x3f	; 63
+    2382:	f8 94       	cli
+    2384:	81 e0       	ldi	r24, 0x01	; 1
+    2386:	11 dd       	rcall	.-1502   	; 0x1daa <udd_sleep_mode>
+    2388:	ea ec       	ldi	r30, 0xCA	; 202
+    238a:	f4 e0       	ldi	r31, 0x04	; 4
+    238c:	80 e4       	ldi	r24, 0x40	; 64
+    238e:	80 83       	st	Z, r24
+    2390:	80 e2       	ldi	r24, 0x20	; 32
+    2392:	80 83       	st	Z, r24
+    2394:	e1 ec       	ldi	r30, 0xC1	; 193
+    2396:	f4 e0       	ldi	r31, 0x04	; 4
+    2398:	80 81       	ld	r24, Z
+    239a:	81 60       	ori	r24, 0x01	; 1
+    239c:	80 83       	st	Z, r24
+    239e:	a9 ec       	ldi	r26, 0xC9	; 201
+    23a0:	b4 e0       	ldi	r27, 0x04	; 4
+    23a2:	8c 91       	ld	r24, X
+    23a4:	82 60       	ori	r24, 0x02	; 2
+    23a6:	8c 93       	st	X, r24
+    23a8:	e8 ec       	ldi	r30, 0xC8	; 200
+    23aa:	f4 e0       	ldi	r31, 0x04	; 4
+    23ac:	80 81       	ld	r24, Z
+    23ae:	80 64       	ori	r24, 0x40	; 64
+    23b0:	80 83       	st	Z, r24
+    23b2:	8c 91       	ld	r24, X
+    23b4:	81 60       	ori	r24, 0x01	; 1
+    23b6:	8c 93       	st	X, r24
+    23b8:	80 81       	ld	r24, Z
+    23ba:	80 68       	ori	r24, 0x80	; 128
+    23bc:	80 83       	st	Z, r24
+    23be:	cf bf       	out	0x3f, r28	; 63
+    23c0:	cf 91       	pop	r28
+    23c2:	08 95       	ret
 
-000023ae <udd_enable>:
-    23ae:	cf 93       	push	r28
-    23b0:	df 93       	push	r29
-    23b2:	c0 e6       	ldi	r28, 0x60	; 96
-    23b4:	d0 e0       	ldi	r29, 0x00	; 0
-    23b6:	18 82       	st	Y, r1
-    23b8:	80 e3       	ldi	r24, 0x30	; 48
-    23ba:	0e 94 59 09 	call	0x12b2	; 0x12b2 <sysclk_enable_usb>
-    23be:	e0 ec       	ldi	r30, 0xC0	; 192
-    23c0:	f4 e0       	ldi	r31, 0x04	; 4
-    23c2:	80 81       	ld	r24, Z
-    23c4:	80 64       	ori	r24, 0x40	; 64
-    23c6:	80 83       	st	Z, r24
-    23c8:	81 e0       	ldi	r24, 0x01	; 1
-    23ca:	88 83       	st	Y, r24
-    23cc:	cf b7       	in	r28, 0x3f	; 63
-    23ce:	f8 94       	cli
-    23d0:	80 e0       	ldi	r24, 0x00	; 0
-    23d2:	90 e0       	ldi	r25, 0x00	; 0
-    23d4:	fc 01       	movw	r30, r24
-    23d6:	ee 0f       	add	r30, r30
-    23d8:	ff 1f       	adc	r31, r31
-    23da:	ee 0f       	add	r30, r30
-    23dc:	ff 1f       	adc	r31, r31
-    23de:	ee 0f       	add	r30, r30
-    23e0:	ff 1f       	adc	r31, r31
-    23e2:	e0 50       	subi	r30, 0x00	; 0
-    23e4:	fe 4d       	sbci	r31, 0xDE	; 222
-    23e6:	11 8a       	std	Z+17, r1	; 0x11
-    23e8:	01 96       	adiw	r24, 0x01	; 1
-    23ea:	88 30       	cpi	r24, 0x08	; 8
-    23ec:	91 05       	cpc	r25, r1
-    23ee:	91 f7       	brne	.-28     	; 0x23d4 <udd_enable+0x26>
-    23f0:	e5 e8       	ldi	r30, 0x85	; 133
-    23f2:	f1 e2       	ldi	r31, 0x21	; 33
-    23f4:	80 81       	ld	r24, Z
-    23f6:	8e 7f       	andi	r24, 0xFE	; 254
-    23f8:	80 83       	st	Z, r24
-    23fa:	ee e8       	ldi	r30, 0x8E	; 142
-    23fc:	f1 e2       	ldi	r31, 0x21	; 33
-    23fe:	80 81       	ld	r24, Z
-    2400:	8e 7f       	andi	r24, 0xFE	; 254
-    2402:	80 83       	st	Z, r24
-    2404:	e7 e9       	ldi	r30, 0x97	; 151
-    2406:	f1 e2       	ldi	r31, 0x21	; 33
-    2408:	80 81       	ld	r24, Z
-    240a:	8e 7f       	andi	r24, 0xFE	; 254
-    240c:	80 83       	st	Z, r24
-    240e:	e0 ea       	ldi	r30, 0xA0	; 160
-    2410:	f1 e2       	ldi	r31, 0x21	; 33
-    2412:	80 81       	ld	r24, Z
-    2414:	8e 7f       	andi	r24, 0xFE	; 254
-    2416:	80 83       	st	Z, r24
-    2418:	e9 ea       	ldi	r30, 0xA9	; 169
-    241a:	f1 e2       	ldi	r31, 0x21	; 33
-    241c:	80 81       	ld	r24, Z
-    241e:	8e 7f       	andi	r24, 0xFE	; 254
-    2420:	80 83       	st	Z, r24
-    2422:	e2 eb       	ldi	r30, 0xB2	; 178
-    2424:	f1 e2       	ldi	r31, 0x21	; 33
-    2426:	80 81       	ld	r24, Z
-    2428:	8e 7f       	andi	r24, 0xFE	; 254
-    242a:	80 83       	st	Z, r24
-    242c:	6a e1       	ldi	r22, 0x1A	; 26
-    242e:	70 e0       	ldi	r23, 0x00	; 0
-    2430:	82 e0       	ldi	r24, 0x02	; 2
-    2432:	a6 dc       	rcall	.-1716   	; 0x1d80 <nvm_read_byte>
-    2434:	8f 3f       	cpi	r24, 0xFF	; 255
-    2436:	19 f0       	breq	.+6      	; 0x243e <udd_enable+0x90>
-    2438:	80 93 fa 04 	sts	0x04FA, r24	; 0x8004fa <__TEXT_REGION_LENGTH__+0x7004fa>
-    243c:	03 c0       	rjmp	.+6      	; 0x2444 <udd_enable+0x96>
-    243e:	8f e1       	ldi	r24, 0x1F	; 31
-    2440:	80 93 fa 04 	sts	0x04FA, r24	; 0x8004fa <__TEXT_REGION_LENGTH__+0x7004fa>
-    2444:	6b e1       	ldi	r22, 0x1B	; 27
-    2446:	70 e0       	ldi	r23, 0x00	; 0
-    2448:	82 e0       	ldi	r24, 0x02	; 2
-    244a:	9a dc       	rcall	.-1740   	; 0x1d80 <nvm_read_byte>
-    244c:	8f 3f       	cpi	r24, 0xFF	; 255
-    244e:	19 f0       	breq	.+6      	; 0x2456 <udd_enable+0xa8>
-    2450:	80 93 fb 04 	sts	0x04FB, r24	; 0x8004fb <__TEXT_REGION_LENGTH__+0x7004fb>
-    2454:	03 c0       	rjmp	.+6      	; 0x245c <udd_enable+0xae>
-    2456:	8f e1       	ldi	r24, 0x1F	; 31
-    2458:	80 93 fb 04 	sts	0x04FB, r24	; 0x8004fb <__TEXT_REGION_LENGTH__+0x7004fb>
-    245c:	e0 ec       	ldi	r30, 0xC0	; 192
-    245e:	f4 e0       	ldi	r31, 0x04	; 4
-    2460:	80 81       	ld	r24, Z
-    2462:	83 60       	ori	r24, 0x03	; 3
-    2464:	80 83       	st	Z, r24
-    2466:	80 81       	ld	r24, Z
-    2468:	80 68       	ori	r24, 0x80	; 128
-    246a:	80 83       	st	Z, r24
-    246c:	80 81       	ld	r24, Z
-    246e:	80 61       	ori	r24, 0x10	; 16
-    2470:	80 83       	st	Z, r24
-    2472:	80 e1       	ldi	r24, 0x10	; 16
-    2474:	92 e2       	ldi	r25, 0x22	; 34
-    2476:	86 83       	std	Z+6, r24	; 0x06
-    2478:	97 83       	std	Z+7, r25	; 0x07
-    247a:	80 81       	ld	r24, Z
-    247c:	80 62       	ori	r24, 0x20	; 32
-    247e:	80 83       	st	Z, r24
-    2480:	8f ef       	ldi	r24, 0xFF	; 255
-    2482:	80 93 c5 04 	sts	0x04C5, r24	; 0x8004c5 <__TEXT_REGION_LENGTH__+0x7004c5>
-    2486:	e8 ec       	ldi	r30, 0xC8	; 200
-    2488:	f4 e0       	ldi	r31, 0x04	; 4
-    248a:	80 81       	ld	r24, Z
-    248c:	82 60       	ori	r24, 0x02	; 2
-    248e:	80 83       	st	Z, r24
-    2490:	10 92 54 22 	sts	0x2254, r1	; 0x802254 <udd_b_idle>
-    2494:	80 91 4b 2c 	lds	r24, 0x2C4B	; 0x802c4b <sleepmgr_locks+0x5>
-    2498:	8f 3f       	cpi	r24, 0xFF	; 255
-    249a:	09 f4       	brne	.+2      	; 0x249e <udd_enable+0xf0>
-    249c:	ff cf       	rjmp	.-2      	; 0x249c <udd_enable+0xee>
-    249e:	9f b7       	in	r25, 0x3f	; 63
-    24a0:	f8 94       	cli
-    24a2:	e6 e4       	ldi	r30, 0x46	; 70
-    24a4:	fc e2       	ldi	r31, 0x2C	; 44
-    24a6:	85 81       	ldd	r24, Z+5	; 0x05
-    24a8:	8f 5f       	subi	r24, 0xFF	; 255
-    24aa:	85 83       	std	Z+5, r24	; 0x05
-    24ac:	9f bf       	out	0x3f, r25	; 63
-    24ae:	5c df       	rcall	.-328    	; 0x2368 <udd_attach>
-    24b0:	cf bf       	out	0x3f, r28	; 63
-    24b2:	df 91       	pop	r29
-    24b4:	cf 91       	pop	r28
-    24b6:	08 95       	ret
+000023c4 <udd_enable>:
+    23c4:	cf 93       	push	r28
+    23c6:	df 93       	push	r29
+    23c8:	c0 e6       	ldi	r28, 0x60	; 96
+    23ca:	d0 e0       	ldi	r29, 0x00	; 0
+    23cc:	18 82       	st	Y, r1
+    23ce:	80 e3       	ldi	r24, 0x30	; 48
+    23d0:	0e 94 64 09 	call	0x12c8	; 0x12c8 <sysclk_enable_usb>
+    23d4:	e0 ec       	ldi	r30, 0xC0	; 192
+    23d6:	f4 e0       	ldi	r31, 0x04	; 4
+    23d8:	80 81       	ld	r24, Z
+    23da:	80 64       	ori	r24, 0x40	; 64
+    23dc:	80 83       	st	Z, r24
+    23de:	81 e0       	ldi	r24, 0x01	; 1
+    23e0:	88 83       	st	Y, r24
+    23e2:	cf b7       	in	r28, 0x3f	; 63
+    23e4:	f8 94       	cli
+    23e6:	80 e0       	ldi	r24, 0x00	; 0
+    23e8:	90 e0       	ldi	r25, 0x00	; 0
+    23ea:	fc 01       	movw	r30, r24
+    23ec:	ee 0f       	add	r30, r30
+    23ee:	ff 1f       	adc	r31, r31
+    23f0:	ee 0f       	add	r30, r30
+    23f2:	ff 1f       	adc	r31, r31
+    23f4:	ee 0f       	add	r30, r30
+    23f6:	ff 1f       	adc	r31, r31
+    23f8:	e0 50       	subi	r30, 0x00	; 0
+    23fa:	fe 4d       	sbci	r31, 0xDE	; 222
+    23fc:	11 8a       	std	Z+17, r1	; 0x11
+    23fe:	01 96       	adiw	r24, 0x01	; 1
+    2400:	88 30       	cpi	r24, 0x08	; 8
+    2402:	91 05       	cpc	r25, r1
+    2404:	91 f7       	brne	.-28     	; 0x23ea <udd_enable+0x26>
+    2406:	e5 e8       	ldi	r30, 0x85	; 133
+    2408:	f1 e2       	ldi	r31, 0x21	; 33
+    240a:	80 81       	ld	r24, Z
+    240c:	8e 7f       	andi	r24, 0xFE	; 254
+    240e:	80 83       	st	Z, r24
+    2410:	ee e8       	ldi	r30, 0x8E	; 142
+    2412:	f1 e2       	ldi	r31, 0x21	; 33
+    2414:	80 81       	ld	r24, Z
+    2416:	8e 7f       	andi	r24, 0xFE	; 254
+    2418:	80 83       	st	Z, r24
+    241a:	e7 e9       	ldi	r30, 0x97	; 151
+    241c:	f1 e2       	ldi	r31, 0x21	; 33
+    241e:	80 81       	ld	r24, Z
+    2420:	8e 7f       	andi	r24, 0xFE	; 254
+    2422:	80 83       	st	Z, r24
+    2424:	e0 ea       	ldi	r30, 0xA0	; 160
+    2426:	f1 e2       	ldi	r31, 0x21	; 33
+    2428:	80 81       	ld	r24, Z
+    242a:	8e 7f       	andi	r24, 0xFE	; 254
+    242c:	80 83       	st	Z, r24
+    242e:	e9 ea       	ldi	r30, 0xA9	; 169
+    2430:	f1 e2       	ldi	r31, 0x21	; 33
+    2432:	80 81       	ld	r24, Z
+    2434:	8e 7f       	andi	r24, 0xFE	; 254
+    2436:	80 83       	st	Z, r24
+    2438:	e2 eb       	ldi	r30, 0xB2	; 178
+    243a:	f1 e2       	ldi	r31, 0x21	; 33
+    243c:	80 81       	ld	r24, Z
+    243e:	8e 7f       	andi	r24, 0xFE	; 254
+    2440:	80 83       	st	Z, r24
+    2442:	6a e1       	ldi	r22, 0x1A	; 26
+    2444:	70 e0       	ldi	r23, 0x00	; 0
+    2446:	82 e0       	ldi	r24, 0x02	; 2
+    2448:	a6 dc       	rcall	.-1716   	; 0x1d96 <nvm_read_byte>
+    244a:	8f 3f       	cpi	r24, 0xFF	; 255
+    244c:	19 f0       	breq	.+6      	; 0x2454 <udd_enable+0x90>
+    244e:	80 93 fa 04 	sts	0x04FA, r24	; 0x8004fa <__TEXT_REGION_LENGTH__+0x7004fa>
+    2452:	03 c0       	rjmp	.+6      	; 0x245a <udd_enable+0x96>
+    2454:	8f e1       	ldi	r24, 0x1F	; 31
+    2456:	80 93 fa 04 	sts	0x04FA, r24	; 0x8004fa <__TEXT_REGION_LENGTH__+0x7004fa>
+    245a:	6b e1       	ldi	r22, 0x1B	; 27
+    245c:	70 e0       	ldi	r23, 0x00	; 0
+    245e:	82 e0       	ldi	r24, 0x02	; 2
+    2460:	9a dc       	rcall	.-1740   	; 0x1d96 <nvm_read_byte>
+    2462:	8f 3f       	cpi	r24, 0xFF	; 255
+    2464:	19 f0       	breq	.+6      	; 0x246c <udd_enable+0xa8>
+    2466:	80 93 fb 04 	sts	0x04FB, r24	; 0x8004fb <__TEXT_REGION_LENGTH__+0x7004fb>
+    246a:	03 c0       	rjmp	.+6      	; 0x2472 <udd_enable+0xae>
+    246c:	8f e1       	ldi	r24, 0x1F	; 31
+    246e:	80 93 fb 04 	sts	0x04FB, r24	; 0x8004fb <__TEXT_REGION_LENGTH__+0x7004fb>
+    2472:	e0 ec       	ldi	r30, 0xC0	; 192
+    2474:	f4 e0       	ldi	r31, 0x04	; 4
+    2476:	80 81       	ld	r24, Z
+    2478:	83 60       	ori	r24, 0x03	; 3
+    247a:	80 83       	st	Z, r24
+    247c:	80 81       	ld	r24, Z
+    247e:	80 68       	ori	r24, 0x80	; 128
+    2480:	80 83       	st	Z, r24
+    2482:	80 81       	ld	r24, Z
+    2484:	80 61       	ori	r24, 0x10	; 16
+    2486:	80 83       	st	Z, r24
+    2488:	80 e1       	ldi	r24, 0x10	; 16
+    248a:	92 e2       	ldi	r25, 0x22	; 34
+    248c:	86 83       	std	Z+6, r24	; 0x06
+    248e:	97 83       	std	Z+7, r25	; 0x07
+    2490:	80 81       	ld	r24, Z
+    2492:	80 62       	ori	r24, 0x20	; 32
+    2494:	80 83       	st	Z, r24
+    2496:	8f ef       	ldi	r24, 0xFF	; 255
+    2498:	80 93 c5 04 	sts	0x04C5, r24	; 0x8004c5 <__TEXT_REGION_LENGTH__+0x7004c5>
+    249c:	e8 ec       	ldi	r30, 0xC8	; 200
+    249e:	f4 e0       	ldi	r31, 0x04	; 4
+    24a0:	80 81       	ld	r24, Z
+    24a2:	82 60       	ori	r24, 0x02	; 2
+    24a4:	80 83       	st	Z, r24
+    24a6:	10 92 54 22 	sts	0x2254, r1	; 0x802254 <udd_b_idle>
+    24aa:	80 91 4b 2c 	lds	r24, 0x2C4B	; 0x802c4b <sleepmgr_locks+0x5>
+    24ae:	8f 3f       	cpi	r24, 0xFF	; 255
+    24b0:	09 f4       	brne	.+2      	; 0x24b4 <udd_enable+0xf0>
+    24b2:	ff cf       	rjmp	.-2      	; 0x24b2 <udd_enable+0xee>
+    24b4:	9f b7       	in	r25, 0x3f	; 63
+    24b6:	f8 94       	cli
+    24b8:	e6 e4       	ldi	r30, 0x46	; 70
+    24ba:	fc e2       	ldi	r31, 0x2C	; 44
+    24bc:	85 81       	ldd	r24, Z+5	; 0x05
+    24be:	8f 5f       	subi	r24, 0xFF	; 255
+    24c0:	85 83       	std	Z+5, r24	; 0x05
+    24c2:	9f bf       	out	0x3f, r25	; 63
+    24c4:	5c df       	rcall	.-328    	; 0x237e <udd_attach>
+    24c6:	cf bf       	out	0x3f, r28	; 63
+    24c8:	df 91       	pop	r29
+    24ca:	cf 91       	pop	r28
+    24cc:	08 95       	ret
 
-000024b8 <udd_set_address>:
-    24b8:	80 93 c3 04 	sts	0x04C3, r24	; 0x8004c3 <__TEXT_REGION_LENGTH__+0x7004c3>
-    24bc:	08 95       	ret
+000024ce <udd_set_address>:
+    24ce:	80 93 c3 04 	sts	0x04C3, r24	; 0x8004c3 <__TEXT_REGION_LENGTH__+0x7004c3>
+    24d2:	08 95       	ret
 
-000024be <udd_getaddress>:
-    24be:	80 91 c3 04 	lds	r24, 0x04C3	; 0x8004c3 <__TEXT_REGION_LENGTH__+0x7004c3>
-    24c2:	08 95       	ret
+000024d4 <udd_getaddress>:
+    24d4:	80 91 c3 04 	lds	r24, 0x04C3	; 0x8004c3 <__TEXT_REGION_LENGTH__+0x7004c3>
+    24d8:	08 95       	ret
 
-000024c4 <udd_set_setup_payload>:
-    24c4:	ea e5       	ldi	r30, 0x5A	; 90
-    24c6:	f4 e2       	ldi	r31, 0x24	; 36
-    24c8:	80 87       	std	Z+8, r24	; 0x08
-    24ca:	91 87       	std	Z+9, r25	; 0x09
-    24cc:	62 87       	std	Z+10, r22	; 0x0a
-    24ce:	73 87       	std	Z+11, r23	; 0x0b
-    24d0:	08 95       	ret
+000024da <udd_set_setup_payload>:
+    24da:	ea e5       	ldi	r30, 0x5A	; 90
+    24dc:	f4 e2       	ldi	r31, 0x24	; 36
+    24de:	80 87       	std	Z+8, r24	; 0x08
+    24e0:	91 87       	std	Z+9, r25	; 0x09
+    24e2:	62 87       	std	Z+10, r22	; 0x0a
+    24e4:	73 87       	std	Z+11, r23	; 0x0b
+    24e6:	08 95       	ret
 
-000024d2 <udd_ep_alloc>:
-    24d2:	28 2f       	mov	r18, r24
-    24d4:	2f 70       	andi	r18, 0x0F	; 15
-    24d6:	30 e0       	ldi	r19, 0x00	; 0
-    24d8:	22 0f       	add	r18, r18
-    24da:	33 1f       	adc	r19, r19
-    24dc:	08 2e       	mov	r0, r24
-    24de:	00 0c       	add	r0, r0
-    24e0:	99 0b       	sbc	r25, r25
-    24e2:	88 27       	eor	r24, r24
-    24e4:	99 0f       	add	r25, r25
-    24e6:	88 1f       	adc	r24, r24
-    24e8:	99 27       	eor	r25, r25
-    24ea:	82 0f       	add	r24, r18
-    24ec:	93 1f       	adc	r25, r19
-    24ee:	fc 01       	movw	r30, r24
-    24f0:	ee 0f       	add	r30, r30
-    24f2:	ff 1f       	adc	r31, r31
-    24f4:	ee 0f       	add	r30, r30
-    24f6:	ff 1f       	adc	r31, r31
-    24f8:	ee 0f       	add	r30, r30
-    24fa:	ff 1f       	adc	r31, r31
-    24fc:	e0 50       	subi	r30, 0x00	; 0
-    24fe:	fe 4d       	sbci	r31, 0xDE	; 222
-    2500:	21 89       	ldd	r18, Z+17	; 0x11
-    2502:	20 7c       	andi	r18, 0xC0	; 192
-    2504:	09 f0       	breq	.+2      	; 0x2508 <udd_ep_alloc+0x36>
-    2506:	58 c0       	rjmp	.+176    	; 0x25b8 <udd_ep_alloc+0xe6>
-    2508:	63 70       	andi	r22, 0x03	; 3
-    250a:	61 30       	cpi	r22, 0x01	; 1
-    250c:	11 f0       	breq	.+4      	; 0x2512 <udd_ep_alloc+0x40>
-    250e:	18 f4       	brcc	.+6      	; 0x2516 <udd_ep_alloc+0x44>
-    2510:	04 c0       	rjmp	.+8      	; 0x251a <udd_ep_alloc+0x48>
-    2512:	20 ec       	ldi	r18, 0xC0	; 192
-    2514:	03 c0       	rjmp	.+6      	; 0x251c <udd_ep_alloc+0x4a>
-    2516:	20 e8       	ldi	r18, 0x80	; 128
-    2518:	01 c0       	rjmp	.+2      	; 0x251c <udd_ep_alloc+0x4a>
-    251a:	20 e4       	ldi	r18, 0x40	; 64
-    251c:	40 38       	cpi	r20, 0x80	; 128
-    251e:	51 05       	cpc	r21, r1
-    2520:	e9 f0       	breq	.+58     	; 0x255c <udd_ep_alloc+0x8a>
-    2522:	50 f4       	brcc	.+20     	; 0x2538 <udd_ep_alloc+0x66>
-    2524:	40 32       	cpi	r20, 0x20	; 32
-    2526:	51 05       	cpc	r21, r1
-    2528:	a9 f0       	breq	.+42     	; 0x2554 <udd_ep_alloc+0x82>
-    252a:	40 34       	cpi	r20, 0x40	; 64
-    252c:	51 05       	cpc	r21, r1
-    252e:	a1 f0       	breq	.+40     	; 0x2558 <udd_ep_alloc+0x86>
-    2530:	40 31       	cpi	r20, 0x10	; 16
-    2532:	51 05       	cpc	r21, r1
-    2534:	d9 f4       	brne	.+54     	; 0x256c <udd_ep_alloc+0x9a>
-    2536:	0c c0       	rjmp	.+24     	; 0x2550 <udd_ep_alloc+0x7e>
-    2538:	41 15       	cp	r20, r1
-    253a:	32 e0       	ldi	r19, 0x02	; 2
-    253c:	53 07       	cpc	r21, r19
-    253e:	91 f0       	breq	.+36     	; 0x2564 <udd_ep_alloc+0x92>
-    2540:	4f 3f       	cpi	r20, 0xFF	; 255
-    2542:	33 e0       	ldi	r19, 0x03	; 3
-    2544:	53 07       	cpc	r21, r19
-    2546:	81 f0       	breq	.+32     	; 0x2568 <udd_ep_alloc+0x96>
-    2548:	41 15       	cp	r20, r1
-    254a:	51 40       	sbci	r21, 0x01	; 1
-    254c:	79 f4       	brne	.+30     	; 0x256c <udd_ep_alloc+0x9a>
-    254e:	08 c0       	rjmp	.+16     	; 0x2560 <udd_ep_alloc+0x8e>
-    2550:	41 e0       	ldi	r20, 0x01	; 1
-    2552:	0d c0       	rjmp	.+26     	; 0x256e <udd_ep_alloc+0x9c>
-    2554:	42 e0       	ldi	r20, 0x02	; 2
-    2556:	0b c0       	rjmp	.+22     	; 0x256e <udd_ep_alloc+0x9c>
-    2558:	43 e0       	ldi	r20, 0x03	; 3
-    255a:	09 c0       	rjmp	.+18     	; 0x256e <udd_ep_alloc+0x9c>
-    255c:	44 e0       	ldi	r20, 0x04	; 4
-    255e:	07 c0       	rjmp	.+14     	; 0x256e <udd_ep_alloc+0x9c>
-    2560:	45 e0       	ldi	r20, 0x05	; 5
-    2562:	05 c0       	rjmp	.+10     	; 0x256e <udd_ep_alloc+0x9c>
-    2564:	46 e0       	ldi	r20, 0x06	; 6
-    2566:	03 c0       	rjmp	.+6      	; 0x256e <udd_ep_alloc+0x9c>
-    2568:	47 e0       	ldi	r20, 0x07	; 7
-    256a:	01 c0       	rjmp	.+2      	; 0x256e <udd_ep_alloc+0x9c>
-    256c:	40 e0       	ldi	r20, 0x00	; 0
-    256e:	fc 01       	movw	r30, r24
-    2570:	ee 0f       	add	r30, r30
-    2572:	ff 1f       	adc	r31, r31
-    2574:	ee 0f       	add	r30, r30
-    2576:	ff 1f       	adc	r31, r31
-    2578:	ee 0f       	add	r30, r30
-    257a:	ff 1f       	adc	r31, r31
-    257c:	e0 50       	subi	r30, 0x00	; 0
-    257e:	fe 4d       	sbci	r31, 0xDE	; 222
-    2580:	11 8a       	std	Z+17, r1	; 0x11
-    2582:	dc 01       	movw	r26, r24
-    2584:	aa 0f       	add	r26, r26
-    2586:	bb 1f       	adc	r27, r27
-    2588:	aa 0f       	add	r26, r26
-    258a:	bb 1f       	adc	r27, r27
-    258c:	aa 0f       	add	r26, r26
-    258e:	bb 1f       	adc	r27, r27
-    2590:	a0 5f       	subi	r26, 0xF0	; 240
-    2592:	bd 4d       	sbci	r27, 0xDD	; 221
-    2594:	36 e0       	ldi	r19, 0x06	; 6
-    2596:	3c 93       	st	X, r19
-    2598:	24 2b       	or	r18, r20
-    259a:	21 8b       	std	Z+17, r18	; 0x11
-    259c:	88 0f       	add	r24, r24
-    259e:	99 1f       	adc	r25, r25
-    25a0:	88 0f       	add	r24, r24
-    25a2:	99 1f       	adc	r25, r25
-    25a4:	88 0f       	add	r24, r24
-    25a6:	99 1f       	adc	r25, r25
-    25a8:	fc 01       	movw	r30, r24
-    25aa:	e0 50       	subi	r30, 0x00	; 0
-    25ac:	fe 4d       	sbci	r31, 0xDE	; 222
-    25ae:	81 89       	ldd	r24, Z+17	; 0x11
-    25b0:	80 62       	ori	r24, 0x20	; 32
-    25b2:	81 8b       	std	Z+17, r24	; 0x11
-    25b4:	81 e0       	ldi	r24, 0x01	; 1
-    25b6:	08 95       	ret
-    25b8:	80 e0       	ldi	r24, 0x00	; 0
-    25ba:	08 95       	ret
+000024e8 <udd_ep_alloc>:
+    24e8:	28 2f       	mov	r18, r24
+    24ea:	2f 70       	andi	r18, 0x0F	; 15
+    24ec:	30 e0       	ldi	r19, 0x00	; 0
+    24ee:	22 0f       	add	r18, r18
+    24f0:	33 1f       	adc	r19, r19
+    24f2:	08 2e       	mov	r0, r24
+    24f4:	00 0c       	add	r0, r0
+    24f6:	99 0b       	sbc	r25, r25
+    24f8:	88 27       	eor	r24, r24
+    24fa:	99 0f       	add	r25, r25
+    24fc:	88 1f       	adc	r24, r24
+    24fe:	99 27       	eor	r25, r25
+    2500:	82 0f       	add	r24, r18
+    2502:	93 1f       	adc	r25, r19
+    2504:	fc 01       	movw	r30, r24
+    2506:	ee 0f       	add	r30, r30
+    2508:	ff 1f       	adc	r31, r31
+    250a:	ee 0f       	add	r30, r30
+    250c:	ff 1f       	adc	r31, r31
+    250e:	ee 0f       	add	r30, r30
+    2510:	ff 1f       	adc	r31, r31
+    2512:	e0 50       	subi	r30, 0x00	; 0
+    2514:	fe 4d       	sbci	r31, 0xDE	; 222
+    2516:	21 89       	ldd	r18, Z+17	; 0x11
+    2518:	20 7c       	andi	r18, 0xC0	; 192
+    251a:	09 f0       	breq	.+2      	; 0x251e <udd_ep_alloc+0x36>
+    251c:	58 c0       	rjmp	.+176    	; 0x25ce <udd_ep_alloc+0xe6>
+    251e:	63 70       	andi	r22, 0x03	; 3
+    2520:	61 30       	cpi	r22, 0x01	; 1
+    2522:	11 f0       	breq	.+4      	; 0x2528 <udd_ep_alloc+0x40>
+    2524:	18 f4       	brcc	.+6      	; 0x252c <udd_ep_alloc+0x44>
+    2526:	04 c0       	rjmp	.+8      	; 0x2530 <udd_ep_alloc+0x48>
+    2528:	20 ec       	ldi	r18, 0xC0	; 192
+    252a:	03 c0       	rjmp	.+6      	; 0x2532 <udd_ep_alloc+0x4a>
+    252c:	20 e8       	ldi	r18, 0x80	; 128
+    252e:	01 c0       	rjmp	.+2      	; 0x2532 <udd_ep_alloc+0x4a>
+    2530:	20 e4       	ldi	r18, 0x40	; 64
+    2532:	40 38       	cpi	r20, 0x80	; 128
+    2534:	51 05       	cpc	r21, r1
+    2536:	e9 f0       	breq	.+58     	; 0x2572 <udd_ep_alloc+0x8a>
+    2538:	50 f4       	brcc	.+20     	; 0x254e <udd_ep_alloc+0x66>
+    253a:	40 32       	cpi	r20, 0x20	; 32
+    253c:	51 05       	cpc	r21, r1
+    253e:	a9 f0       	breq	.+42     	; 0x256a <udd_ep_alloc+0x82>
+    2540:	40 34       	cpi	r20, 0x40	; 64
+    2542:	51 05       	cpc	r21, r1
+    2544:	a1 f0       	breq	.+40     	; 0x256e <udd_ep_alloc+0x86>
+    2546:	40 31       	cpi	r20, 0x10	; 16
+    2548:	51 05       	cpc	r21, r1
+    254a:	d9 f4       	brne	.+54     	; 0x2582 <udd_ep_alloc+0x9a>
+    254c:	0c c0       	rjmp	.+24     	; 0x2566 <udd_ep_alloc+0x7e>
+    254e:	41 15       	cp	r20, r1
+    2550:	32 e0       	ldi	r19, 0x02	; 2
+    2552:	53 07       	cpc	r21, r19
+    2554:	91 f0       	breq	.+36     	; 0x257a <udd_ep_alloc+0x92>
+    2556:	4f 3f       	cpi	r20, 0xFF	; 255
+    2558:	33 e0       	ldi	r19, 0x03	; 3
+    255a:	53 07       	cpc	r21, r19
+    255c:	81 f0       	breq	.+32     	; 0x257e <udd_ep_alloc+0x96>
+    255e:	41 15       	cp	r20, r1
+    2560:	51 40       	sbci	r21, 0x01	; 1
+    2562:	79 f4       	brne	.+30     	; 0x2582 <udd_ep_alloc+0x9a>
+    2564:	08 c0       	rjmp	.+16     	; 0x2576 <udd_ep_alloc+0x8e>
+    2566:	41 e0       	ldi	r20, 0x01	; 1
+    2568:	0d c0       	rjmp	.+26     	; 0x2584 <udd_ep_alloc+0x9c>
+    256a:	42 e0       	ldi	r20, 0x02	; 2
+    256c:	0b c0       	rjmp	.+22     	; 0x2584 <udd_ep_alloc+0x9c>
+    256e:	43 e0       	ldi	r20, 0x03	; 3
+    2570:	09 c0       	rjmp	.+18     	; 0x2584 <udd_ep_alloc+0x9c>
+    2572:	44 e0       	ldi	r20, 0x04	; 4
+    2574:	07 c0       	rjmp	.+14     	; 0x2584 <udd_ep_alloc+0x9c>
+    2576:	45 e0       	ldi	r20, 0x05	; 5
+    2578:	05 c0       	rjmp	.+10     	; 0x2584 <udd_ep_alloc+0x9c>
+    257a:	46 e0       	ldi	r20, 0x06	; 6
+    257c:	03 c0       	rjmp	.+6      	; 0x2584 <udd_ep_alloc+0x9c>
+    257e:	47 e0       	ldi	r20, 0x07	; 7
+    2580:	01 c0       	rjmp	.+2      	; 0x2584 <udd_ep_alloc+0x9c>
+    2582:	40 e0       	ldi	r20, 0x00	; 0
+    2584:	fc 01       	movw	r30, r24
+    2586:	ee 0f       	add	r30, r30
+    2588:	ff 1f       	adc	r31, r31
+    258a:	ee 0f       	add	r30, r30
+    258c:	ff 1f       	adc	r31, r31
+    258e:	ee 0f       	add	r30, r30
+    2590:	ff 1f       	adc	r31, r31
+    2592:	e0 50       	subi	r30, 0x00	; 0
+    2594:	fe 4d       	sbci	r31, 0xDE	; 222
+    2596:	11 8a       	std	Z+17, r1	; 0x11
+    2598:	dc 01       	movw	r26, r24
+    259a:	aa 0f       	add	r26, r26
+    259c:	bb 1f       	adc	r27, r27
+    259e:	aa 0f       	add	r26, r26
+    25a0:	bb 1f       	adc	r27, r27
+    25a2:	aa 0f       	add	r26, r26
+    25a4:	bb 1f       	adc	r27, r27
+    25a6:	a0 5f       	subi	r26, 0xF0	; 240
+    25a8:	bd 4d       	sbci	r27, 0xDD	; 221
+    25aa:	36 e0       	ldi	r19, 0x06	; 6
+    25ac:	3c 93       	st	X, r19
+    25ae:	24 2b       	or	r18, r20
+    25b0:	21 8b       	std	Z+17, r18	; 0x11
+    25b2:	88 0f       	add	r24, r24
+    25b4:	99 1f       	adc	r25, r25
+    25b6:	88 0f       	add	r24, r24
+    25b8:	99 1f       	adc	r25, r25
+    25ba:	88 0f       	add	r24, r24
+    25bc:	99 1f       	adc	r25, r25
+    25be:	fc 01       	movw	r30, r24
+    25c0:	e0 50       	subi	r30, 0x00	; 0
+    25c2:	fe 4d       	sbci	r31, 0xDE	; 222
+    25c4:	81 89       	ldd	r24, Z+17	; 0x11
+    25c6:	80 62       	ori	r24, 0x20	; 32
+    25c8:	81 8b       	std	Z+17, r24	; 0x11
+    25ca:	81 e0       	ldi	r24, 0x01	; 1
+    25cc:	08 95       	ret
+    25ce:	80 e0       	ldi	r24, 0x00	; 0
+    25d0:	08 95       	ret
 
-000025bc <udd_ep_is_halted>:
-    25bc:	e8 2f       	mov	r30, r24
-    25be:	ef 70       	andi	r30, 0x0F	; 15
-    25c0:	f0 e0       	ldi	r31, 0x00	; 0
-    25c2:	ee 0f       	add	r30, r30
-    25c4:	ff 1f       	adc	r31, r31
-    25c6:	08 2e       	mov	r0, r24
-    25c8:	00 0c       	add	r0, r0
-    25ca:	99 0b       	sbc	r25, r25
-    25cc:	88 27       	eor	r24, r24
-    25ce:	99 0f       	add	r25, r25
-    25d0:	88 1f       	adc	r24, r24
-    25d2:	99 27       	eor	r25, r25
-    25d4:	e8 0f       	add	r30, r24
-    25d6:	f9 1f       	adc	r31, r25
+000025d2 <udd_ep_is_halted>:
+    25d2:	e8 2f       	mov	r30, r24
+    25d4:	ef 70       	andi	r30, 0x0F	; 15
+    25d6:	f0 e0       	ldi	r31, 0x00	; 0
     25d8:	ee 0f       	add	r30, r30
     25da:	ff 1f       	adc	r31, r31
-    25dc:	ee 0f       	add	r30, r30
-    25de:	ff 1f       	adc	r31, r31
-    25e0:	ee 0f       	add	r30, r30
-    25e2:	ff 1f       	adc	r31, r31
-    25e4:	e0 50       	subi	r30, 0x00	; 0
-    25e6:	fe 4d       	sbci	r31, 0xDE	; 222
-    25e8:	81 89       	ldd	r24, Z+17	; 0x11
-    25ea:	82 fb       	bst	r24, 2
-    25ec:	88 27       	eor	r24, r24
-    25ee:	80 f9       	bld	r24, 0
-    25f0:	08 95       	ret
+    25dc:	08 2e       	mov	r0, r24
+    25de:	00 0c       	add	r0, r0
+    25e0:	99 0b       	sbc	r25, r25
+    25e2:	88 27       	eor	r24, r24
+    25e4:	99 0f       	add	r25, r25
+    25e6:	88 1f       	adc	r24, r24
+    25e8:	99 27       	eor	r25, r25
+    25ea:	e8 0f       	add	r30, r24
+    25ec:	f9 1f       	adc	r31, r25
+    25ee:	ee 0f       	add	r30, r30
+    25f0:	ff 1f       	adc	r31, r31
+    25f2:	ee 0f       	add	r30, r30
+    25f4:	ff 1f       	adc	r31, r31
+    25f6:	ee 0f       	add	r30, r30
+    25f8:	ff 1f       	adc	r31, r31
+    25fa:	e0 50       	subi	r30, 0x00	; 0
+    25fc:	fe 4d       	sbci	r31, 0xDE	; 222
+    25fe:	81 89       	ldd	r24, Z+17	; 0x11
+    2600:	82 fb       	bst	r24, 2
+    2602:	88 27       	eor	r24, r24
+    2604:	80 f9       	bld	r24, 0
+    2606:	08 95       	ret
 
-000025f2 <udd_ep_clear_halt>:
-    25f2:	28 2f       	mov	r18, r24
-    25f4:	2f 70       	andi	r18, 0x0F	; 15
-    25f6:	30 e0       	ldi	r19, 0x00	; 0
-    25f8:	a9 01       	movw	r20, r18
-    25fa:	44 0f       	add	r20, r20
-    25fc:	55 1f       	adc	r21, r21
-    25fe:	28 2f       	mov	r18, r24
-    2600:	08 2e       	mov	r0, r24
-    2602:	00 0c       	add	r0, r0
-    2604:	33 0b       	sbc	r19, r19
-    2606:	22 27       	eor	r18, r18
-    2608:	33 0f       	add	r19, r19
-    260a:	22 1f       	adc	r18, r18
-    260c:	33 27       	eor	r19, r19
-    260e:	24 0f       	add	r18, r20
-    2610:	35 1f       	adc	r19, r21
-    2612:	f9 01       	movw	r30, r18
-    2614:	ee 0f       	add	r30, r30
-    2616:	ff 1f       	adc	r31, r31
-    2618:	ee 0f       	add	r30, r30
-    261a:	ff 1f       	adc	r31, r31
-    261c:	ee 0f       	add	r30, r30
-    261e:	ff 1f       	adc	r31, r31
-    2620:	e0 50       	subi	r30, 0x00	; 0
-    2622:	fe 4d       	sbci	r31, 0xDE	; 222
-    2624:	91 89       	ldd	r25, Z+17	; 0x11
-    2626:	92 ff       	sbrs	r25, 2
-    2628:	17 c0       	rjmp	.+46     	; 0x2658 <udd_ep_clear_halt+0x66>
-    262a:	22 0f       	add	r18, r18
-    262c:	33 1f       	adc	r19, r19
-    262e:	22 0f       	add	r18, r18
-    2630:	33 1f       	adc	r19, r19
-    2632:	22 0f       	add	r18, r18
-    2634:	33 1f       	adc	r19, r19
-    2636:	f9 01       	movw	r30, r18
-    2638:	e0 50       	subi	r30, 0x00	; 0
-    263a:	fe 4d       	sbci	r31, 0xDE	; 222
-    263c:	91 89       	ldd	r25, Z+17	; 0x11
-    263e:	9b 7f       	andi	r25, 0xFB	; 251
-    2640:	91 8b       	std	Z+17, r25	; 0x11
-    2642:	ae dc       	rcall	.-1700   	; 0x1fa0 <udd_ep_get_job>
-    2644:	fc 01       	movw	r30, r24
-    2646:	80 81       	ld	r24, Z
-    2648:	80 ff       	sbrs	r24, 0
-    264a:	06 c0       	rjmp	.+12     	; 0x2658 <udd_ep_clear_halt+0x66>
-    264c:	8e 7f       	andi	r24, 0xFE	; 254
-    264e:	80 83       	st	Z, r24
-    2650:	07 80       	ldd	r0, Z+7	; 0x07
-    2652:	f0 85       	ldd	r31, Z+8	; 0x08
-    2654:	e0 2d       	mov	r30, r0
-    2656:	09 95       	icall
-    2658:	81 e0       	ldi	r24, 0x01	; 1
-    265a:	08 95       	ret
+00002608 <udd_ep_clear_halt>:
+    2608:	28 2f       	mov	r18, r24
+    260a:	2f 70       	andi	r18, 0x0F	; 15
+    260c:	30 e0       	ldi	r19, 0x00	; 0
+    260e:	a9 01       	movw	r20, r18
+    2610:	44 0f       	add	r20, r20
+    2612:	55 1f       	adc	r21, r21
+    2614:	28 2f       	mov	r18, r24
+    2616:	08 2e       	mov	r0, r24
+    2618:	00 0c       	add	r0, r0
+    261a:	33 0b       	sbc	r19, r19
+    261c:	22 27       	eor	r18, r18
+    261e:	33 0f       	add	r19, r19
+    2620:	22 1f       	adc	r18, r18
+    2622:	33 27       	eor	r19, r19
+    2624:	24 0f       	add	r18, r20
+    2626:	35 1f       	adc	r19, r21
+    2628:	f9 01       	movw	r30, r18
+    262a:	ee 0f       	add	r30, r30
+    262c:	ff 1f       	adc	r31, r31
+    262e:	ee 0f       	add	r30, r30
+    2630:	ff 1f       	adc	r31, r31
+    2632:	ee 0f       	add	r30, r30
+    2634:	ff 1f       	adc	r31, r31
+    2636:	e0 50       	subi	r30, 0x00	; 0
+    2638:	fe 4d       	sbci	r31, 0xDE	; 222
+    263a:	91 89       	ldd	r25, Z+17	; 0x11
+    263c:	92 ff       	sbrs	r25, 2
+    263e:	17 c0       	rjmp	.+46     	; 0x266e <udd_ep_clear_halt+0x66>
+    2640:	22 0f       	add	r18, r18
+    2642:	33 1f       	adc	r19, r19
+    2644:	22 0f       	add	r18, r18
+    2646:	33 1f       	adc	r19, r19
+    2648:	22 0f       	add	r18, r18
+    264a:	33 1f       	adc	r19, r19
+    264c:	f9 01       	movw	r30, r18
+    264e:	e0 50       	subi	r30, 0x00	; 0
+    2650:	fe 4d       	sbci	r31, 0xDE	; 222
+    2652:	91 89       	ldd	r25, Z+17	; 0x11
+    2654:	9b 7f       	andi	r25, 0xFB	; 251
+    2656:	91 8b       	std	Z+17, r25	; 0x11
+    2658:	ae dc       	rcall	.-1700   	; 0x1fb6 <udd_ep_get_job>
+    265a:	fc 01       	movw	r30, r24
+    265c:	80 81       	ld	r24, Z
+    265e:	80 ff       	sbrs	r24, 0
+    2660:	06 c0       	rjmp	.+12     	; 0x266e <udd_ep_clear_halt+0x66>
+    2662:	8e 7f       	andi	r24, 0xFE	; 254
+    2664:	80 83       	st	Z, r24
+    2666:	07 80       	ldd	r0, Z+7	; 0x07
+    2668:	f0 85       	ldd	r31, Z+8	; 0x08
+    266a:	e0 2d       	mov	r30, r0
+    266c:	09 95       	icall
+    266e:	81 e0       	ldi	r24, 0x01	; 1
+    2670:	08 95       	ret
 
-0000265c <udd_ep_run>:
-    265c:	7f 92       	push	r7
-    265e:	8f 92       	push	r8
-    2660:	9f 92       	push	r9
-    2662:	af 92       	push	r10
-    2664:	bf 92       	push	r11
-    2666:	cf 92       	push	r12
-    2668:	df 92       	push	r13
-    266a:	ef 92       	push	r14
-    266c:	ff 92       	push	r15
-    266e:	0f 93       	push	r16
-    2670:	1f 93       	push	r17
-    2672:	cf 93       	push	r28
-    2674:	df 93       	push	r29
-    2676:	98 2e       	mov	r9, r24
-    2678:	86 2e       	mov	r8, r22
-    267a:	6a 01       	movw	r12, r20
-    267c:	79 01       	movw	r14, r18
-    267e:	90 dc       	rcall	.-1760   	; 0x1fa0 <udd_ep_get_job>
-    2680:	5c 01       	movw	r10, r24
-    2682:	79 2c       	mov	r7, r9
-    2684:	77 1c       	adc	r7, r7
-    2686:	77 24       	eor	r7, r7
-    2688:	77 1c       	adc	r7, r7
-    268a:	c9 2d       	mov	r28, r9
-    268c:	cf 70       	andi	r28, 0x0F	; 15
-    268e:	d0 e0       	ldi	r29, 0x00	; 0
-    2690:	cc 0f       	add	r28, r28
-    2692:	dd 1f       	adc	r29, r29
-    2694:	c7 0d       	add	r28, r7
-    2696:	d1 1d       	adc	r29, r1
-    2698:	fe 01       	movw	r30, r28
-    269a:	ee 0f       	add	r30, r30
-    269c:	ff 1f       	adc	r31, r31
-    269e:	ee 0f       	add	r30, r30
-    26a0:	ff 1f       	adc	r31, r31
-    26a2:	ee 0f       	add	r30, r30
-    26a4:	ff 1f       	adc	r31, r31
-    26a6:	e0 50       	subi	r30, 0x00	; 0
-    26a8:	fe 4d       	sbci	r31, 0xDE	; 222
-    26aa:	81 89       	ldd	r24, Z+17	; 0x11
-    26ac:	80 7c       	andi	r24, 0xC0	; 192
-    26ae:	09 f4       	brne	.+2      	; 0x26b2 <udd_ep_run+0x56>
-    26b0:	7d c0       	rjmp	.+250    	; 0x27ac <udd_ep_run+0x150>
-    26b2:	fe 01       	movw	r30, r28
+00002672 <udd_ep_run>:
+    2672:	7f 92       	push	r7
+    2674:	8f 92       	push	r8
+    2676:	9f 92       	push	r9
+    2678:	af 92       	push	r10
+    267a:	bf 92       	push	r11
+    267c:	cf 92       	push	r12
+    267e:	df 92       	push	r13
+    2680:	ef 92       	push	r14
+    2682:	ff 92       	push	r15
+    2684:	0f 93       	push	r16
+    2686:	1f 93       	push	r17
+    2688:	cf 93       	push	r28
+    268a:	df 93       	push	r29
+    268c:	98 2e       	mov	r9, r24
+    268e:	86 2e       	mov	r8, r22
+    2690:	6a 01       	movw	r12, r20
+    2692:	79 01       	movw	r14, r18
+    2694:	90 dc       	rcall	.-1760   	; 0x1fb6 <udd_ep_get_job>
+    2696:	5c 01       	movw	r10, r24
+    2698:	79 2c       	mov	r7, r9
+    269a:	77 1c       	adc	r7, r7
+    269c:	77 24       	eor	r7, r7
+    269e:	77 1c       	adc	r7, r7
+    26a0:	c9 2d       	mov	r28, r9
+    26a2:	cf 70       	andi	r28, 0x0F	; 15
+    26a4:	d0 e0       	ldi	r29, 0x00	; 0
+    26a6:	cc 0f       	add	r28, r28
+    26a8:	dd 1f       	adc	r29, r29
+    26aa:	c7 0d       	add	r28, r7
+    26ac:	d1 1d       	adc	r29, r1
+    26ae:	fe 01       	movw	r30, r28
+    26b0:	ee 0f       	add	r30, r30
+    26b2:	ff 1f       	adc	r31, r31
     26b4:	ee 0f       	add	r30, r30
     26b6:	ff 1f       	adc	r31, r31
     26b8:	ee 0f       	add	r30, r30
     26ba:	ff 1f       	adc	r31, r31
-    26bc:	ee 0f       	add	r30, r30
-    26be:	ff 1f       	adc	r31, r31
-    26c0:	e0 50       	subi	r30, 0x00	; 0
-    26c2:	fe 4d       	sbci	r31, 0xDE	; 222
-    26c4:	81 89       	ldd	r24, Z+17	; 0x11
-    26c6:	80 7c       	andi	r24, 0xC0	; 192
-    26c8:	80 3c       	cpi	r24, 0xC0	; 192
-    26ca:	61 f0       	breq	.+24     	; 0x26e4 <udd_ep_run+0x88>
-    26cc:	fe 01       	movw	r30, r28
+    26bc:	e0 50       	subi	r30, 0x00	; 0
+    26be:	fe 4d       	sbci	r31, 0xDE	; 222
+    26c0:	81 89       	ldd	r24, Z+17	; 0x11
+    26c2:	80 7c       	andi	r24, 0xC0	; 192
+    26c4:	09 f4       	brne	.+2      	; 0x26c8 <udd_ep_run+0x56>
+    26c6:	7d c0       	rjmp	.+250    	; 0x27c2 <udd_ep_run+0x150>
+    26c8:	fe 01       	movw	r30, r28
+    26ca:	ee 0f       	add	r30, r30
+    26cc:	ff 1f       	adc	r31, r31
     26ce:	ee 0f       	add	r30, r30
     26d0:	ff 1f       	adc	r31, r31
     26d2:	ee 0f       	add	r30, r30
     26d4:	ff 1f       	adc	r31, r31
-    26d6:	ee 0f       	add	r30, r30
-    26d8:	ff 1f       	adc	r31, r31
-    26da:	e0 50       	subi	r30, 0x00	; 0
-    26dc:	fe 4d       	sbci	r31, 0xDE	; 222
-    26de:	81 89       	ldd	r24, Z+17	; 0x11
-    26e0:	82 fd       	sbrc	r24, 2
-    26e2:	66 c0       	rjmp	.+204    	; 0x27b0 <udd_ep_run+0x154>
-    26e4:	8f b7       	in	r24, 0x3f	; 63
-    26e6:	f8 94       	cli
-    26e8:	f5 01       	movw	r30, r10
-    26ea:	90 81       	ld	r25, Z
-    26ec:	90 ff       	sbrs	r25, 0
-    26ee:	03 c0       	rjmp	.+6      	; 0x26f6 <udd_ep_run+0x9a>
-    26f0:	8f bf       	out	0x3f, r24	; 63
-    26f2:	71 2c       	mov	r7, r1
-    26f4:	5e c0       	rjmp	.+188    	; 0x27b2 <udd_ep_run+0x156>
-    26f6:	f5 01       	movw	r30, r10
-    26f8:	90 81       	ld	r25, Z
-    26fa:	91 60       	ori	r25, 0x01	; 1
-    26fc:	90 83       	st	Z, r25
-    26fe:	8f bf       	out	0x3f, r24	; 63
-    2700:	c1 82       	std	Z+1, r12	; 0x01
-    2702:	d2 82       	std	Z+2, r13	; 0x02
-    2704:	e3 82       	std	Z+3, r14	; 0x03
-    2706:	f4 82       	std	Z+4, r15	; 0x04
-    2708:	15 82       	std	Z+5, r1	; 0x05
-    270a:	16 82       	std	Z+6, r1	; 0x06
-    270c:	07 83       	std	Z+7, r16	; 0x07
-    270e:	10 87       	std	Z+8, r17	; 0x08
-    2710:	81 10       	cpse	r8, r1
-    2712:	06 c0       	rjmp	.+12     	; 0x2720 <udd_ep_run+0xc4>
-    2714:	91 e0       	ldi	r25, 0x01	; 1
-    2716:	e1 14       	cp	r14, r1
-    2718:	f1 04       	cpc	r15, r1
-    271a:	19 f0       	breq	.+6      	; 0x2722 <udd_ep_run+0xc6>
-    271c:	90 e0       	ldi	r25, 0x00	; 0
-    271e:	01 c0       	rjmp	.+2      	; 0x2722 <udd_ep_run+0xc6>
-    2720:	91 e0       	ldi	r25, 0x01	; 1
-    2722:	f5 01       	movw	r30, r10
-    2724:	80 81       	ld	r24, Z
-    2726:	90 fb       	bst	r25, 0
-    2728:	81 f9       	bld	r24, 1
-    272a:	8b 7f       	andi	r24, 0xFB	; 251
-    272c:	80 83       	st	Z, r24
-    272e:	77 20       	and	r7, r7
-    2730:	59 f0       	breq	.+22     	; 0x2748 <udd_ep_run+0xec>
-    2732:	cc 0f       	add	r28, r28
-    2734:	dd 1f       	adc	r29, r29
-    2736:	cc 0f       	add	r28, r28
-    2738:	dd 1f       	adc	r29, r29
-    273a:	cc 0f       	add	r28, r28
-    273c:	dd 1f       	adc	r29, r29
-    273e:	c0 50       	subi	r28, 0x00	; 0
-    2740:	de 4d       	sbci	r29, 0xDE	; 222
-    2742:	1e 8a       	std	Y+22, r1	; 0x16
-    2744:	1f 8a       	std	Y+23, r1	; 0x17
-    2746:	2d c0       	rjmp	.+90     	; 0x27a2 <udd_ep_run+0x146>
-    2748:	fe 01       	movw	r30, r28
-    274a:	ee 0f       	add	r30, r30
-    274c:	ff 1f       	adc	r31, r31
-    274e:	ee 0f       	add	r30, r30
-    2750:	ff 1f       	adc	r31, r31
-    2752:	ee 0f       	add	r30, r30
-    2754:	ff 1f       	adc	r31, r31
-    2756:	e0 50       	subi	r30, 0x00	; 0
-    2758:	fe 4d       	sbci	r31, 0xDE	; 222
-    275a:	81 89       	ldd	r24, Z+17	; 0x11
-    275c:	80 7c       	andi	r24, 0xC0	; 192
-    275e:	80 3c       	cpi	r24, 0xC0	; 192
-    2760:	a1 f4       	brne	.+40     	; 0x278a <udd_ep_run+0x12e>
-    2762:	ce 01       	movw	r24, r28
-    2764:	88 0f       	add	r24, r24
-    2766:	99 1f       	adc	r25, r25
-    2768:	88 0f       	add	r24, r24
-    276a:	99 1f       	adc	r25, r25
-    276c:	88 0f       	add	r24, r24
-    276e:	99 1f       	adc	r25, r25
-    2770:	80 5f       	subi	r24, 0xF0	; 240
-    2772:	9d 4d       	sbci	r25, 0xDD	; 221
-    2774:	ef db       	rcall	.-2082   	; 0x1f54 <udd_ep_get_size>
-    2776:	bc 01       	movw	r22, r24
-    2778:	c7 01       	movw	r24, r14
-    277a:	60 d2       	rcall	.+1216   	; 0x2c3c <__udivmodhi4>
-    277c:	89 2b       	or	r24, r25
-    277e:	29 f0       	breq	.+10     	; 0x278a <udd_ep_run+0x12e>
-    2780:	f5 01       	movw	r30, r10
-    2782:	80 81       	ld	r24, Z
-    2784:	8e 7f       	andi	r24, 0xFE	; 254
-    2786:	80 83       	st	Z, r24
-    2788:	14 c0       	rjmp	.+40     	; 0x27b2 <udd_ep_run+0x156>
-    278a:	cc 0f       	add	r28, r28
-    278c:	dd 1f       	adc	r29, r29
-    278e:	cc 0f       	add	r28, r28
-    2790:	dd 1f       	adc	r29, r29
-    2792:	cc 0f       	add	r28, r28
-    2794:	dd 1f       	adc	r29, r29
-    2796:	c0 50       	subi	r28, 0x00	; 0
-    2798:	de 4d       	sbci	r29, 0xDE	; 222
-    279a:	1a 8a       	std	Y+18, r1	; 0x12
-    279c:	1b 8a       	std	Y+19, r1	; 0x13
-    279e:	1e 8a       	std	Y+22, r1	; 0x16
-    27a0:	1f 8a       	std	Y+23, r1	; 0x17
-    27a2:	89 2d       	mov	r24, r9
-    27a4:	87 dc       	rcall	.-1778   	; 0x20b4 <udd_ep_trans_complet>
-    27a6:	77 24       	eor	r7, r7
-    27a8:	73 94       	inc	r7
-    27aa:	03 c0       	rjmp	.+6      	; 0x27b2 <udd_ep_run+0x156>
-    27ac:	71 2c       	mov	r7, r1
-    27ae:	01 c0       	rjmp	.+2      	; 0x27b2 <udd_ep_run+0x156>
-    27b0:	71 2c       	mov	r7, r1
-    27b2:	87 2d       	mov	r24, r7
-    27b4:	df 91       	pop	r29
-    27b6:	cf 91       	pop	r28
-    27b8:	1f 91       	pop	r17
-    27ba:	0f 91       	pop	r16
-    27bc:	ff 90       	pop	r15
-    27be:	ef 90       	pop	r14
-    27c0:	df 90       	pop	r13
-    27c2:	cf 90       	pop	r12
-    27c4:	bf 90       	pop	r11
-    27c6:	af 90       	pop	r10
-    27c8:	9f 90       	pop	r9
-    27ca:	8f 90       	pop	r8
-    27cc:	7f 90       	pop	r7
-    27ce:	08 95       	ret
+    26d6:	e0 50       	subi	r30, 0x00	; 0
+    26d8:	fe 4d       	sbci	r31, 0xDE	; 222
+    26da:	81 89       	ldd	r24, Z+17	; 0x11
+    26dc:	80 7c       	andi	r24, 0xC0	; 192
+    26de:	80 3c       	cpi	r24, 0xC0	; 192
+    26e0:	61 f0       	breq	.+24     	; 0x26fa <udd_ep_run+0x88>
+    26e2:	fe 01       	movw	r30, r28
+    26e4:	ee 0f       	add	r30, r30
+    26e6:	ff 1f       	adc	r31, r31
+    26e8:	ee 0f       	add	r30, r30
+    26ea:	ff 1f       	adc	r31, r31
+    26ec:	ee 0f       	add	r30, r30
+    26ee:	ff 1f       	adc	r31, r31
+    26f0:	e0 50       	subi	r30, 0x00	; 0
+    26f2:	fe 4d       	sbci	r31, 0xDE	; 222
+    26f4:	81 89       	ldd	r24, Z+17	; 0x11
+    26f6:	82 fd       	sbrc	r24, 2
+    26f8:	66 c0       	rjmp	.+204    	; 0x27c6 <udd_ep_run+0x154>
+    26fa:	8f b7       	in	r24, 0x3f	; 63
+    26fc:	f8 94       	cli
+    26fe:	f5 01       	movw	r30, r10
+    2700:	90 81       	ld	r25, Z
+    2702:	90 ff       	sbrs	r25, 0
+    2704:	03 c0       	rjmp	.+6      	; 0x270c <udd_ep_run+0x9a>
+    2706:	8f bf       	out	0x3f, r24	; 63
+    2708:	71 2c       	mov	r7, r1
+    270a:	5e c0       	rjmp	.+188    	; 0x27c8 <udd_ep_run+0x156>
+    270c:	f5 01       	movw	r30, r10
+    270e:	90 81       	ld	r25, Z
+    2710:	91 60       	ori	r25, 0x01	; 1
+    2712:	90 83       	st	Z, r25
+    2714:	8f bf       	out	0x3f, r24	; 63
+    2716:	c1 82       	std	Z+1, r12	; 0x01
+    2718:	d2 82       	std	Z+2, r13	; 0x02
+    271a:	e3 82       	std	Z+3, r14	; 0x03
+    271c:	f4 82       	std	Z+4, r15	; 0x04
+    271e:	15 82       	std	Z+5, r1	; 0x05
+    2720:	16 82       	std	Z+6, r1	; 0x06
+    2722:	07 83       	std	Z+7, r16	; 0x07
+    2724:	10 87       	std	Z+8, r17	; 0x08
+    2726:	81 10       	cpse	r8, r1
+    2728:	06 c0       	rjmp	.+12     	; 0x2736 <udd_ep_run+0xc4>
+    272a:	91 e0       	ldi	r25, 0x01	; 1
+    272c:	e1 14       	cp	r14, r1
+    272e:	f1 04       	cpc	r15, r1
+    2730:	19 f0       	breq	.+6      	; 0x2738 <udd_ep_run+0xc6>
+    2732:	90 e0       	ldi	r25, 0x00	; 0
+    2734:	01 c0       	rjmp	.+2      	; 0x2738 <udd_ep_run+0xc6>
+    2736:	91 e0       	ldi	r25, 0x01	; 1
+    2738:	f5 01       	movw	r30, r10
+    273a:	80 81       	ld	r24, Z
+    273c:	90 fb       	bst	r25, 0
+    273e:	81 f9       	bld	r24, 1
+    2740:	8b 7f       	andi	r24, 0xFB	; 251
+    2742:	80 83       	st	Z, r24
+    2744:	77 20       	and	r7, r7
+    2746:	59 f0       	breq	.+22     	; 0x275e <udd_ep_run+0xec>
+    2748:	cc 0f       	add	r28, r28
+    274a:	dd 1f       	adc	r29, r29
+    274c:	cc 0f       	add	r28, r28
+    274e:	dd 1f       	adc	r29, r29
+    2750:	cc 0f       	add	r28, r28
+    2752:	dd 1f       	adc	r29, r29
+    2754:	c0 50       	subi	r28, 0x00	; 0
+    2756:	de 4d       	sbci	r29, 0xDE	; 222
+    2758:	1e 8a       	std	Y+22, r1	; 0x16
+    275a:	1f 8a       	std	Y+23, r1	; 0x17
+    275c:	2d c0       	rjmp	.+90     	; 0x27b8 <udd_ep_run+0x146>
+    275e:	fe 01       	movw	r30, r28
+    2760:	ee 0f       	add	r30, r30
+    2762:	ff 1f       	adc	r31, r31
+    2764:	ee 0f       	add	r30, r30
+    2766:	ff 1f       	adc	r31, r31
+    2768:	ee 0f       	add	r30, r30
+    276a:	ff 1f       	adc	r31, r31
+    276c:	e0 50       	subi	r30, 0x00	; 0
+    276e:	fe 4d       	sbci	r31, 0xDE	; 222
+    2770:	81 89       	ldd	r24, Z+17	; 0x11
+    2772:	80 7c       	andi	r24, 0xC0	; 192
+    2774:	80 3c       	cpi	r24, 0xC0	; 192
+    2776:	a1 f4       	brne	.+40     	; 0x27a0 <udd_ep_run+0x12e>
+    2778:	ce 01       	movw	r24, r28
+    277a:	88 0f       	add	r24, r24
+    277c:	99 1f       	adc	r25, r25
+    277e:	88 0f       	add	r24, r24
+    2780:	99 1f       	adc	r25, r25
+    2782:	88 0f       	add	r24, r24
+    2784:	99 1f       	adc	r25, r25
+    2786:	80 5f       	subi	r24, 0xF0	; 240
+    2788:	9d 4d       	sbci	r25, 0xDD	; 221
+    278a:	ef db       	rcall	.-2082   	; 0x1f6a <udd_ep_get_size>
+    278c:	bc 01       	movw	r22, r24
+    278e:	c7 01       	movw	r24, r14
+    2790:	60 d2       	rcall	.+1216   	; 0x2c52 <__udivmodhi4>
+    2792:	89 2b       	or	r24, r25
+    2794:	29 f0       	breq	.+10     	; 0x27a0 <udd_ep_run+0x12e>
+    2796:	f5 01       	movw	r30, r10
+    2798:	80 81       	ld	r24, Z
+    279a:	8e 7f       	andi	r24, 0xFE	; 254
+    279c:	80 83       	st	Z, r24
+    279e:	14 c0       	rjmp	.+40     	; 0x27c8 <udd_ep_run+0x156>
+    27a0:	cc 0f       	add	r28, r28
+    27a2:	dd 1f       	adc	r29, r29
+    27a4:	cc 0f       	add	r28, r28
+    27a6:	dd 1f       	adc	r29, r29
+    27a8:	cc 0f       	add	r28, r28
+    27aa:	dd 1f       	adc	r29, r29
+    27ac:	c0 50       	subi	r28, 0x00	; 0
+    27ae:	de 4d       	sbci	r29, 0xDE	; 222
+    27b0:	1a 8a       	std	Y+18, r1	; 0x12
+    27b2:	1b 8a       	std	Y+19, r1	; 0x13
+    27b4:	1e 8a       	std	Y+22, r1	; 0x16
+    27b6:	1f 8a       	std	Y+23, r1	; 0x17
+    27b8:	89 2d       	mov	r24, r9
+    27ba:	87 dc       	rcall	.-1778   	; 0x20ca <udd_ep_trans_complet>
+    27bc:	77 24       	eor	r7, r7
+    27be:	73 94       	inc	r7
+    27c0:	03 c0       	rjmp	.+6      	; 0x27c8 <udd_ep_run+0x156>
+    27c2:	71 2c       	mov	r7, r1
+    27c4:	01 c0       	rjmp	.+2      	; 0x27c8 <udd_ep_run+0x156>
+    27c6:	71 2c       	mov	r7, r1
+    27c8:	87 2d       	mov	r24, r7
+    27ca:	df 91       	pop	r29
+    27cc:	cf 91       	pop	r28
+    27ce:	1f 91       	pop	r17
+    27d0:	0f 91       	pop	r16
+    27d2:	ff 90       	pop	r15
+    27d4:	ef 90       	pop	r14
+    27d6:	df 90       	pop	r13
+    27d8:	cf 90       	pop	r12
+    27da:	bf 90       	pop	r11
+    27dc:	af 90       	pop	r10
+    27de:	9f 90       	pop	r9
+    27e0:	8f 90       	pop	r8
+    27e2:	7f 90       	pop	r7
+    27e4:	08 95       	ret
 
-000027d0 <udd_ep_abort>:
-    27d0:	ff 92       	push	r15
-    27d2:	0f 93       	push	r16
-    27d4:	1f 93       	push	r17
-    27d6:	cf 93       	push	r28
-    27d8:	df 93       	push	r29
-    27da:	18 2f       	mov	r17, r24
-    27dc:	f8 2e       	mov	r15, r24
-    27de:	ff 1c       	adc	r15, r15
-    27e0:	ff 24       	eor	r15, r15
-    27e2:	ff 1c       	adc	r15, r15
-    27e4:	c8 2f       	mov	r28, r24
-    27e6:	cf 70       	andi	r28, 0x0F	; 15
-    27e8:	d0 e0       	ldi	r29, 0x00	; 0
-    27ea:	cc 0f       	add	r28, r28
-    27ec:	dd 1f       	adc	r29, r29
-    27ee:	cf 0d       	add	r28, r15
-    27f0:	d1 1d       	adc	r29, r1
-    27f2:	d6 db       	rcall	.-2132   	; 0x1fa0 <udd_ep_get_job>
-    27f4:	dc 01       	movw	r26, r24
-    27f6:	fe 01       	movw	r30, r28
-    27f8:	ee 0f       	add	r30, r30
-    27fa:	ff 1f       	adc	r31, r31
-    27fc:	ee 0f       	add	r30, r30
-    27fe:	ff 1f       	adc	r31, r31
-    2800:	ee 0f       	add	r30, r30
-    2802:	ff 1f       	adc	r31, r31
-    2804:	e0 5f       	subi	r30, 0xF0	; 240
-    2806:	fd 4d       	sbci	r31, 0xDD	; 221
-    2808:	02 e0       	ldi	r16, 0x02	; 2
-    280a:	05 93       	las	Z, r16
-    280c:	8c 91       	ld	r24, X
-    280e:	80 ff       	sbrs	r24, 0
-    2810:	22 c0       	rjmp	.+68     	; 0x2856 <udd_ep_abort+0x86>
-    2812:	8e 7f       	andi	r24, 0xFE	; 254
-    2814:	8c 93       	st	X, r24
-    2816:	17 96       	adiw	r26, 0x07	; 7
-    2818:	ed 91       	ld	r30, X+
-    281a:	fc 91       	ld	r31, X
-    281c:	18 97       	sbiw	r26, 0x08	; 8
-    281e:	30 97       	sbiw	r30, 0x00	; 0
-    2820:	d1 f0       	breq	.+52     	; 0x2856 <udd_ep_abort+0x86>
-    2822:	ff 20       	and	r15, r15
-    2824:	59 f0       	breq	.+22     	; 0x283c <udd_ep_abort+0x6c>
-    2826:	cc 0f       	add	r28, r28
-    2828:	dd 1f       	adc	r29, r29
-    282a:	cc 0f       	add	r28, r28
-    282c:	dd 1f       	adc	r29, r29
-    282e:	cc 0f       	add	r28, r28
-    2830:	dd 1f       	adc	r29, r29
-    2832:	c0 50       	subi	r28, 0x00	; 0
-    2834:	de 4d       	sbci	r29, 0xDE	; 222
-    2836:	6e 89       	ldd	r22, Y+22	; 0x16
-    2838:	7f 89       	ldd	r23, Y+23	; 0x17
-    283a:	0a c0       	rjmp	.+20     	; 0x2850 <udd_ep_abort+0x80>
+000027e6 <udd_ep_abort>:
+    27e6:	ff 92       	push	r15
+    27e8:	0f 93       	push	r16
+    27ea:	1f 93       	push	r17
+    27ec:	cf 93       	push	r28
+    27ee:	df 93       	push	r29
+    27f0:	18 2f       	mov	r17, r24
+    27f2:	f8 2e       	mov	r15, r24
+    27f4:	ff 1c       	adc	r15, r15
+    27f6:	ff 24       	eor	r15, r15
+    27f8:	ff 1c       	adc	r15, r15
+    27fa:	c8 2f       	mov	r28, r24
+    27fc:	cf 70       	andi	r28, 0x0F	; 15
+    27fe:	d0 e0       	ldi	r29, 0x00	; 0
+    2800:	cc 0f       	add	r28, r28
+    2802:	dd 1f       	adc	r29, r29
+    2804:	cf 0d       	add	r28, r15
+    2806:	d1 1d       	adc	r29, r1
+    2808:	d6 db       	rcall	.-2132   	; 0x1fb6 <udd_ep_get_job>
+    280a:	dc 01       	movw	r26, r24
+    280c:	fe 01       	movw	r30, r28
+    280e:	ee 0f       	add	r30, r30
+    2810:	ff 1f       	adc	r31, r31
+    2812:	ee 0f       	add	r30, r30
+    2814:	ff 1f       	adc	r31, r31
+    2816:	ee 0f       	add	r30, r30
+    2818:	ff 1f       	adc	r31, r31
+    281a:	e0 5f       	subi	r30, 0xF0	; 240
+    281c:	fd 4d       	sbci	r31, 0xDD	; 221
+    281e:	02 e0       	ldi	r16, 0x02	; 2
+    2820:	05 93       	las	Z, r16
+    2822:	8c 91       	ld	r24, X
+    2824:	80 ff       	sbrs	r24, 0
+    2826:	22 c0       	rjmp	.+68     	; 0x286c <udd_ep_abort+0x86>
+    2828:	8e 7f       	andi	r24, 0xFE	; 254
+    282a:	8c 93       	st	X, r24
+    282c:	17 96       	adiw	r26, 0x07	; 7
+    282e:	ed 91       	ld	r30, X+
+    2830:	fc 91       	ld	r31, X
+    2832:	18 97       	sbiw	r26, 0x08	; 8
+    2834:	30 97       	sbiw	r30, 0x00	; 0
+    2836:	d1 f0       	breq	.+52     	; 0x286c <udd_ep_abort+0x86>
+    2838:	ff 20       	and	r15, r15
+    283a:	59 f0       	breq	.+22     	; 0x2852 <udd_ep_abort+0x6c>
     283c:	cc 0f       	add	r28, r28
     283e:	dd 1f       	adc	r29, r29
     2840:	cc 0f       	add	r28, r28
@@ -6916,812 +6918,823 @@ static bool udc_req_ep(void)
     2846:	dd 1f       	adc	r29, r29
     2848:	c0 50       	subi	r28, 0x00	; 0
     284a:	de 4d       	sbci	r29, 0xDE	; 222
-    284c:	6a 89       	ldd	r22, Y+18	; 0x12
-    284e:	7b 89       	ldd	r23, Y+19	; 0x13
-    2850:	41 2f       	mov	r20, r17
-    2852:	81 e0       	ldi	r24, 0x01	; 1
-    2854:	09 95       	icall
-    2856:	df 91       	pop	r29
-    2858:	cf 91       	pop	r28
-    285a:	1f 91       	pop	r17
-    285c:	0f 91       	pop	r16
-    285e:	ff 90       	pop	r15
-    2860:	08 95       	ret
+    284c:	6e 89       	ldd	r22, Y+22	; 0x16
+    284e:	7f 89       	ldd	r23, Y+23	; 0x17
+    2850:	0a c0       	rjmp	.+20     	; 0x2866 <udd_ep_abort+0x80>
+    2852:	cc 0f       	add	r28, r28
+    2854:	dd 1f       	adc	r29, r29
+    2856:	cc 0f       	add	r28, r28
+    2858:	dd 1f       	adc	r29, r29
+    285a:	cc 0f       	add	r28, r28
+    285c:	dd 1f       	adc	r29, r29
+    285e:	c0 50       	subi	r28, 0x00	; 0
+    2860:	de 4d       	sbci	r29, 0xDE	; 222
+    2862:	6a 89       	ldd	r22, Y+18	; 0x12
+    2864:	7b 89       	ldd	r23, Y+19	; 0x13
+    2866:	41 2f       	mov	r20, r17
+    2868:	81 e0       	ldi	r24, 0x01	; 1
+    286a:	09 95       	icall
+    286c:	df 91       	pop	r29
+    286e:	cf 91       	pop	r28
+    2870:	1f 91       	pop	r17
+    2872:	0f 91       	pop	r16
+    2874:	ff 90       	pop	r15
+    2876:	08 95       	ret
 
-00002862 <udd_ep_free>:
-    2862:	cf 93       	push	r28
-    2864:	c8 2f       	mov	r28, r24
-    2866:	b4 df       	rcall	.-152    	; 0x27d0 <udd_ep_abort>
-    2868:	ec 2f       	mov	r30, r28
-    286a:	ef 70       	andi	r30, 0x0F	; 15
-    286c:	f0 e0       	ldi	r31, 0x00	; 0
-    286e:	ee 0f       	add	r30, r30
-    2870:	ff 1f       	adc	r31, r31
-    2872:	8c 2f       	mov	r24, r28
-    2874:	cc 0f       	add	r28, r28
-    2876:	99 0b       	sbc	r25, r25
-    2878:	88 27       	eor	r24, r24
-    287a:	99 0f       	add	r25, r25
-    287c:	88 1f       	adc	r24, r24
-    287e:	99 27       	eor	r25, r25
-    2880:	e8 0f       	add	r30, r24
-    2882:	f9 1f       	adc	r31, r25
+00002878 <udd_ep_free>:
+    2878:	cf 93       	push	r28
+    287a:	c8 2f       	mov	r28, r24
+    287c:	b4 df       	rcall	.-152    	; 0x27e6 <udd_ep_abort>
+    287e:	ec 2f       	mov	r30, r28
+    2880:	ef 70       	andi	r30, 0x0F	; 15
+    2882:	f0 e0       	ldi	r31, 0x00	; 0
     2884:	ee 0f       	add	r30, r30
     2886:	ff 1f       	adc	r31, r31
-    2888:	ee 0f       	add	r30, r30
-    288a:	ff 1f       	adc	r31, r31
-    288c:	ee 0f       	add	r30, r30
-    288e:	ff 1f       	adc	r31, r31
-    2890:	e0 50       	subi	r30, 0x00	; 0
-    2892:	fe 4d       	sbci	r31, 0xDE	; 222
-    2894:	11 8a       	std	Z+17, r1	; 0x11
-    2896:	cf 91       	pop	r28
-    2898:	08 95       	ret
-
-0000289a <udd_ep_set_halt>:
-    289a:	0f 93       	push	r16
-    289c:	e8 2f       	mov	r30, r24
-    289e:	ef 70       	andi	r30, 0x0F	; 15
-    28a0:	f0 e0       	ldi	r31, 0x00	; 0
+    2888:	8c 2f       	mov	r24, r28
+    288a:	cc 0f       	add	r28, r28
+    288c:	99 0b       	sbc	r25, r25
+    288e:	88 27       	eor	r24, r24
+    2890:	99 0f       	add	r25, r25
+    2892:	88 1f       	adc	r24, r24
+    2894:	99 27       	eor	r25, r25
+    2896:	e8 0f       	add	r30, r24
+    2898:	f9 1f       	adc	r31, r25
+    289a:	ee 0f       	add	r30, r30
+    289c:	ff 1f       	adc	r31, r31
+    289e:	ee 0f       	add	r30, r30
+    28a0:	ff 1f       	adc	r31, r31
     28a2:	ee 0f       	add	r30, r30
     28a4:	ff 1f       	adc	r31, r31
-    28a6:	28 2f       	mov	r18, r24
-    28a8:	08 2e       	mov	r0, r24
-    28aa:	00 0c       	add	r0, r0
-    28ac:	33 0b       	sbc	r19, r19
-    28ae:	22 27       	eor	r18, r18
-    28b0:	33 0f       	add	r19, r19
-    28b2:	22 1f       	adc	r18, r18
-    28b4:	33 27       	eor	r19, r19
-    28b6:	e2 0f       	add	r30, r18
-    28b8:	f3 1f       	adc	r31, r19
-    28ba:	df 01       	movw	r26, r30
-    28bc:	aa 0f       	add	r26, r26
-    28be:	bb 1f       	adc	r27, r27
-    28c0:	aa 0f       	add	r26, r26
-    28c2:	bb 1f       	adc	r27, r27
-    28c4:	aa 0f       	add	r26, r26
-    28c6:	bb 1f       	adc	r27, r27
-    28c8:	a0 50       	subi	r26, 0x00	; 0
-    28ca:	be 4d       	sbci	r27, 0xDE	; 222
-    28cc:	51 96       	adiw	r26, 0x11	; 17
-    28ce:	9c 91       	ld	r25, X
-    28d0:	51 97       	sbiw	r26, 0x11	; 17
-    28d2:	94 60       	ori	r25, 0x04	; 4
-    28d4:	51 96       	adiw	r26, 0x11	; 17
-    28d6:	9c 93       	st	X, r25
-    28d8:	ee 0f       	add	r30, r30
-    28da:	ff 1f       	adc	r31, r31
-    28dc:	ee 0f       	add	r30, r30
-    28de:	ff 1f       	adc	r31, r31
-    28e0:	ee 0f       	add	r30, r30
-    28e2:	ff 1f       	adc	r31, r31
-    28e4:	e0 5f       	subi	r30, 0xF0	; 240
-    28e6:	fd 4d       	sbci	r31, 0xDD	; 221
-    28e8:	01 e0       	ldi	r16, 0x01	; 1
-    28ea:	06 93       	lac	Z, r16
-    28ec:	71 df       	rcall	.-286    	; 0x27d0 <udd_ep_abort>
-    28ee:	81 e0       	ldi	r24, 0x01	; 1
-    28f0:	0f 91       	pop	r16
-    28f2:	08 95       	ret
+    28a6:	e0 50       	subi	r30, 0x00	; 0
+    28a8:	fe 4d       	sbci	r31, 0xDE	; 222
+    28aa:	11 8a       	std	Z+17, r1	; 0x11
+    28ac:	cf 91       	pop	r28
+    28ae:	08 95       	ret
 
-000028f4 <__vector_125>:
+000028b0 <udd_ep_set_halt>:
+    28b0:	0f 93       	push	r16
+    28b2:	e8 2f       	mov	r30, r24
+    28b4:	ef 70       	andi	r30, 0x0F	; 15
+    28b6:	f0 e0       	ldi	r31, 0x00	; 0
+    28b8:	ee 0f       	add	r30, r30
+    28ba:	ff 1f       	adc	r31, r31
+    28bc:	28 2f       	mov	r18, r24
+    28be:	08 2e       	mov	r0, r24
+    28c0:	00 0c       	add	r0, r0
+    28c2:	33 0b       	sbc	r19, r19
+    28c4:	22 27       	eor	r18, r18
+    28c6:	33 0f       	add	r19, r19
+    28c8:	22 1f       	adc	r18, r18
+    28ca:	33 27       	eor	r19, r19
+    28cc:	e2 0f       	add	r30, r18
+    28ce:	f3 1f       	adc	r31, r19
+    28d0:	df 01       	movw	r26, r30
+    28d2:	aa 0f       	add	r26, r26
+    28d4:	bb 1f       	adc	r27, r27
+    28d6:	aa 0f       	add	r26, r26
+    28d8:	bb 1f       	adc	r27, r27
+    28da:	aa 0f       	add	r26, r26
+    28dc:	bb 1f       	adc	r27, r27
+    28de:	a0 50       	subi	r26, 0x00	; 0
+    28e0:	be 4d       	sbci	r27, 0xDE	; 222
+    28e2:	51 96       	adiw	r26, 0x11	; 17
+    28e4:	9c 91       	ld	r25, X
+    28e6:	51 97       	sbiw	r26, 0x11	; 17
+    28e8:	94 60       	ori	r25, 0x04	; 4
+    28ea:	51 96       	adiw	r26, 0x11	; 17
+    28ec:	9c 93       	st	X, r25
+    28ee:	ee 0f       	add	r30, r30
+    28f0:	ff 1f       	adc	r31, r31
+    28f2:	ee 0f       	add	r30, r30
+    28f4:	ff 1f       	adc	r31, r31
+    28f6:	ee 0f       	add	r30, r30
+    28f8:	ff 1f       	adc	r31, r31
+    28fa:	e0 5f       	subi	r30, 0xF0	; 240
+    28fc:	fd 4d       	sbci	r31, 0xDD	; 221
+    28fe:	01 e0       	ldi	r16, 0x01	; 1
+    2900:	06 93       	lac	Z, r16
+    2902:	71 df       	rcall	.-286    	; 0x27e6 <udd_ep_abort>
+    2904:	81 e0       	ldi	r24, 0x01	; 1
+    2906:	0f 91       	pop	r16
+    2908:	08 95       	ret
+
+0000290a <__vector_125>:
  * USB bus event interrupt includes :
  * - USB line events SOF, reset, suspend, resume, wakeup
  * - endpoint control errors underflow, overflow, stall
  */
 ISR(USB_BUSEVENT_vect)
 {
-    28f4:	1f 92       	push	r1
-    28f6:	0f 92       	push	r0
-    28f8:	0f b6       	in	r0, 0x3f	; 63
-    28fa:	0f 92       	push	r0
-    28fc:	11 24       	eor	r1, r1
-    28fe:	0f 93       	push	r16
-    2900:	2f 93       	push	r18
-    2902:	3f 93       	push	r19
-    2904:	4f 93       	push	r20
-    2906:	5f 93       	push	r21
-    2908:	6f 93       	push	r22
-    290a:	7f 93       	push	r23
-    290c:	8f 93       	push	r24
-    290e:	9f 93       	push	r25
-    2910:	af 93       	push	r26
-    2912:	bf 93       	push	r27
-    2914:	ef 93       	push	r30
-    2916:	ff 93       	push	r31
+    290a:	1f 92       	push	r1
+    290c:	0f 92       	push	r0
+    290e:	0f b6       	in	r0, 0x3f	; 63
+    2910:	0f 92       	push	r0
+    2912:	11 24       	eor	r1, r1
+    2914:	0f 93       	push	r16
+    2916:	2f 93       	push	r18
+    2918:	3f 93       	push	r19
+    291a:	4f 93       	push	r20
+    291c:	5f 93       	push	r21
+    291e:	6f 93       	push	r22
+    2920:	7f 93       	push	r23
+    2922:	8f 93       	push	r24
+    2924:	9f 93       	push	r25
+    2926:	af 93       	push	r26
+    2928:	bf 93       	push	r27
+    292a:	ef 93       	push	r30
+    292c:	ff 93       	push	r31
 	if (udd_is_start_of_frame_event()) {
-    2918:	80 91 cb 04 	lds	r24, 0x04CB	; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb>
-    291c:	88 23       	and	r24, r24
-    291e:	44 f4       	brge	.+16     	; 0x2930 <__vector_125+0x3c>
+    292e:	80 91 cb 04 	lds	r24, 0x04CB	; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb>
+    2932:	88 23       	and	r24, r24
+    2934:	44 f4       	brge	.+16     	; 0x2946 <__vector_125+0x3c>
 		udd_ack_start_of_frame_event();
-    2920:	80 e8       	ldi	r24, 0x80	; 128
-    2922:	80 93 ca 04 	sts	0x04CA, r24	; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca>
+    2936:	80 e8       	ldi	r24, 0x80	; 128
+    2938:	80 93 ca 04 	sts	0x04CA, r24	; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca>
 		udc_sof_notify();
-    2926:	0e 94 00 0b 	call	0x1600	; 0x1600 <udc_sof_notify>
+    293c:	0e 94 0b 0b 	call	0x1616	; 0x1616 <udc_sof_notify>
 #ifdef UDC_SOF_EVENT
 		UDC_SOF_EVENT();
-    292a:	0e 94 c2 01 	call	0x384	; 0x384 <main_sof_action>
+    2940:	0e 94 c2 01 	call	0x384	; 0x384 <main_sof_action>
 #endif
 		goto udd_interrupt_bus_event_end;
-    292e:	8a c0       	rjmp	.+276    	; 0x2a44 <__vector_125+0x150>
+    2944:	8a c0       	rjmp	.+276    	; 0x2a5a <__vector_125+0x150>
 }
 
 static bool udd_ctrl_interrupt_error(void)
 {
 	// Underflow only managed for control endpoint
 	if (udd_is_underflow_event()) {
-    2930:	80 91 cb 04 	lds	r24, 0x04CB	; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb>
-    2934:	82 ff       	sbrs	r24, 2
-    2936:	20 c0       	rjmp	.+64     	; 0x2978 <__vector_125+0x84>
+    2946:	80 91 cb 04 	lds	r24, 0x04CB	; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb>
+    294a:	82 ff       	sbrs	r24, 2
+    294c:	20 c0       	rjmp	.+64     	; 0x298e <__vector_125+0x84>
 		udd_ack_underflow_event();
-    2938:	84 e0       	ldi	r24, 0x04	; 4
-    293a:	80 93 ca 04 	sts	0x04CA, r24	; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca>
+    294e:	84 e0       	ldi	r24, 0x04	; 4
+    2950:	80 93 ca 04 	sts	0x04CA, r24	; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca>
 		if (udd_control_in_underflow()) {
-    293e:	80 91 18 22 	lds	r24, 0x2218	; 0x802218 <udd_sram+0x18>
-    2942:	86 ff       	sbrs	r24, 6
-    2944:	7f c0       	rjmp	.+254    	; 0x2a44 <__vector_125+0x150>
+    2954:	80 91 18 22 	lds	r24, 0x2218	; 0x802218 <udd_sram+0x18>
+    2958:	86 ff       	sbrs	r24, 6
+    295a:	7f c0       	rjmp	.+254    	; 0x2a5a <__vector_125+0x150>
 	udd_control_out_clear_NACK0();
 }
 
 static void udd_ctrl_underflow(void)
 {
 	if (udd_is_tc_event() || udd_ctrl_interrupt_tc_setup()) {
-    2946:	80 91 cc 04 	lds	r24, 0x04CC	; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc>
-    294a:	81 fd       	sbrc	r24, 1
-    294c:	7b c0       	rjmp	.+246    	; 0x2a44 <__vector_125+0x150>
-    294e:	43 db       	rcall	.-2426   	; 0x1fd6 <udd_ctrl_interrupt_tc_setup>
-    2950:	81 11       	cpse	r24, r1
-    2952:	78 c0       	rjmp	.+240    	; 0x2a44 <__vector_125+0x150>
+    295c:	80 91 cc 04 	lds	r24, 0x04CC	; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc>
+    2960:	81 fd       	sbrc	r24, 1
+    2962:	7b c0       	rjmp	.+246    	; 0x2a5a <__vector_125+0x150>
+    2964:	43 db       	rcall	.-2426   	; 0x1fec <udd_ctrl_interrupt_tc_setup>
+    2966:	81 11       	cpse	r24, r1
+    2968:	78 c0       	rjmp	.+240    	; 0x2a5a <__vector_125+0x150>
 		return; // underflow ignored if a transfer complete has been no processed
 	}
 	if (UDD_EPCTRL_DATA_OUT == udd_ep_control_state) {
-    2954:	80 91 ff 21 	lds	r24, 0x21FF	; 0x8021ff <udd_ep_control_state>
-    2958:	81 30       	cpi	r24, 0x01	; 1
-    295a:	11 f4       	brne	.+4      	; 0x2960 <__vector_125+0x6c>
+    296a:	80 91 ff 21 	lds	r24, 0x21FF	; 0x8021ff <udd_ep_control_state>
+    296e:	81 30       	cpi	r24, 0x01	; 1
+    2970:	11 f4       	brne	.+4      	; 0x2976 <__vector_125+0x6c>
 		// Host want to stop OUT transaction
 		// then stop to wait OUT data phase and wait IN ZLP handshake
 		udd_ctrl_send_zlp_in();
-    295c:	79 da       	rcall	.-2830   	; 0x1e50 <udd_ctrl_send_zlp_in>
-    295e:	72 c0       	rjmp	.+228    	; 0x2a44 <__vector_125+0x150>
+    2972:	79 da       	rcall	.-2830   	; 0x1e66 <udd_ctrl_send_zlp_in>
+    2974:	72 c0       	rjmp	.+228    	; 0x2a5a <__vector_125+0x150>
 	} else if (UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP == udd_ep_control_state) {
-    2960:	84 30       	cpi	r24, 0x04	; 4
-    2962:	09 f0       	breq	.+2      	; 0x2966 <__vector_125+0x72>
-    2964:	6f c0       	rjmp	.+222    	; 0x2a44 <__vector_125+0x150>
+    2976:	84 30       	cpi	r24, 0x04	; 4
+    2978:	09 f0       	breq	.+2      	; 0x297c <__vector_125+0x72>
+    297a:	6f c0       	rjmp	.+222    	; 0x2a5a <__vector_125+0x150>
 		// A OUT handshake is waiting by device,
 		// but host want extra IN data then stall extra IN data and following status stage
 		udd_control_in_enable_stall();
-    2966:	e9 e1       	ldi	r30, 0x19	; 25
-    2968:	f2 e2       	ldi	r31, 0x22	; 34
-    296a:	04 e0       	ldi	r16, 0x04	; 4
-    296c:	05 93       	las	Z, r16
+    297c:	e9 e1       	ldi	r30, 0x19	; 25
+    297e:	f2 e2       	ldi	r31, 0x22	; 34
+    2980:	04 e0       	ldi	r16, 0x04	; 4
+    2982:	05 93       	las	Z, r16
 		udd_control_out_enable_stall();
-    296e:	e1 e1       	ldi	r30, 0x11	; 17
-    2970:	f2 e2       	ldi	r31, 0x22	; 34
-    2972:	04 e0       	ldi	r16, 0x04	; 4
-    2974:	05 93       	las	Z, r16
-    2976:	66 c0       	rjmp	.+204    	; 0x2a44 <__vector_125+0x150>
+    2984:	e1 e1       	ldi	r30, 0x11	; 17
+    2986:	f2 e2       	ldi	r31, 0x22	; 34
+    2988:	04 e0       	ldi	r16, 0x04	; 4
+    298a:	05 93       	las	Z, r16
+    298c:	66 c0       	rjmp	.+204    	; 0x2a5a <__vector_125+0x150>
 			udd_ctrl_underflow();
 		}
 		return true;
 	}
 	// Overflow only managed for control endpoint
 	if (udd_is_overflow_event()) {
-    2978:	80 91 cb 04 	lds	r24, 0x04CB	; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb>
-    297c:	81 ff       	sbrs	r24, 1
-    297e:	5d c0       	rjmp	.+186    	; 0x2a3a <__vector_125+0x146>
+    298e:	80 91 cb 04 	lds	r24, 0x04CB	; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb>
+    2992:	81 ff       	sbrs	r24, 1
+    2994:	5d c0       	rjmp	.+186    	; 0x2a50 <__vector_125+0x146>
 		udd_ack_overflow_event();
-    2980:	82 e0       	ldi	r24, 0x02	; 2
-    2982:	80 93 ca 04 	sts	0x04CA, r24	; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca>
+    2996:	82 e0       	ldi	r24, 0x02	; 2
+    2998:	80 93 ca 04 	sts	0x04CA, r24	; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca>
 		if (udd_control_out_overflow()) {
-    2986:	80 91 10 22 	lds	r24, 0x2210	; 0x802210 <udd_sram+0x10>
-    298a:	86 ff       	sbrs	r24, 6
-    298c:	5b c0       	rjmp	.+182    	; 0x2a44 <__vector_125+0x150>
+    299c:	80 91 10 22 	lds	r24, 0x2210	; 0x802210 <udd_sram+0x10>
+    29a0:	86 ff       	sbrs	r24, 6
+    29a2:	5b c0       	rjmp	.+182    	; 0x2a5a <__vector_125+0x150>
 	}
 }
 
 static void udd_ctrl_overflow(void)
 {
 	if (udd_is_tc_event() || udd_ctrl_interrupt_tc_setup()) {
-    298e:	80 91 cc 04 	lds	r24, 0x04CC	; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc>
-    2992:	81 fd       	sbrc	r24, 1
-    2994:	57 c0       	rjmp	.+174    	; 0x2a44 <__vector_125+0x150>
-    2996:	1f db       	rcall	.-2498   	; 0x1fd6 <udd_ctrl_interrupt_tc_setup>
-    2998:	81 11       	cpse	r24, r1
-    299a:	54 c0       	rjmp	.+168    	; 0x2a44 <__vector_125+0x150>
+    29a4:	80 91 cc 04 	lds	r24, 0x04CC	; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc>
+    29a8:	81 fd       	sbrc	r24, 1
+    29aa:	57 c0       	rjmp	.+174    	; 0x2a5a <__vector_125+0x150>
+    29ac:	1f db       	rcall	.-2498   	; 0x1fec <udd_ctrl_interrupt_tc_setup>
+    29ae:	81 11       	cpse	r24, r1
+    29b0:	54 c0       	rjmp	.+168    	; 0x2a5a <__vector_125+0x150>
 		return; // overflow ignored if a transfer complete has been no processed
 	}
 	if (UDD_EPCTRL_DATA_IN == udd_ep_control_state) {
-    299c:	80 91 ff 21 	lds	r24, 0x21FF	; 0x8021ff <udd_ep_control_state>
-    29a0:	82 30       	cpi	r24, 0x02	; 2
-    29a2:	41 f4       	brne	.+16     	; 0x29b4 <__vector_125+0xc0>
+    29b2:	80 91 ff 21 	lds	r24, 0x21FF	; 0x8021ff <udd_ep_control_state>
+    29b6:	82 30       	cpi	r24, 0x02	; 2
+    29b8:	41 f4       	brne	.+16     	; 0x29ca <__vector_125+0xc0>
 	udd_control_in_clear_NACK0();
 }
 
 static void udd_ctrl_send_zlp_out(void)
 {
 	udd_ep_control_state = UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP;
-    29a4:	84 e0       	ldi	r24, 0x04	; 4
-    29a6:	80 93 ff 21 	sts	0x21FF, r24	; 0x8021ff <udd_ep_control_state>
+    29ba:	84 e0       	ldi	r24, 0x04	; 4
+    29bc:	80 93 ff 21 	sts	0x21FF, r24	; 0x8021ff <udd_ep_control_state>
 	// Valid reception of OUT packet on control endpoint
 	udd_control_out_clear_NACK0();
-    29aa:	e0 e1       	ldi	r30, 0x10	; 16
-    29ac:	f2 e2       	ldi	r31, 0x22	; 34
-    29ae:	02 e0       	ldi	r16, 0x02	; 2
-    29b0:	06 93       	lac	Z, r16
-    29b2:	48 c0       	rjmp	.+144    	; 0x2a44 <__vector_125+0x150>
+    29c0:	e0 e1       	ldi	r30, 0x10	; 16
+    29c2:	f2 e2       	ldi	r31, 0x22	; 34
+    29c4:	02 e0       	ldi	r16, 0x02	; 2
+    29c6:	06 93       	lac	Z, r16
+    29c8:	48 c0       	rjmp	.+144    	; 0x2a5a <__vector_125+0x150>
 	}
 	if (UDD_EPCTRL_DATA_IN == udd_ep_control_state) {
 		// Host want to stop IN transaction
 		// then stop to wait IN data phase and wait OUT ZLP handshake
 		udd_ctrl_send_zlp_out();
 	} else if (UDD_EPCTRL_HANDSHAKE_WAIT_IN_ZLP == udd_ep_control_state) {
-    29b4:	83 30       	cpi	r24, 0x03	; 3
-    29b6:	09 f0       	breq	.+2      	; 0x29ba <__vector_125+0xc6>
-    29b8:	45 c0       	rjmp	.+138    	; 0x2a44 <__vector_125+0x150>
+    29ca:	83 30       	cpi	r24, 0x03	; 3
+    29cc:	09 f0       	breq	.+2      	; 0x29d0 <__vector_125+0xc6>
+    29ce:	45 c0       	rjmp	.+138    	; 0x2a5a <__vector_125+0x150>
 		// A IN handshake is waiting by device,
 		// but host want extra OUT data then stall extra OUT data and following status stage
 		udd_control_in_enable_stall();
-    29ba:	e9 e1       	ldi	r30, 0x19	; 25
-    29bc:	f2 e2       	ldi	r31, 0x22	; 34
-    29be:	04 e0       	ldi	r16, 0x04	; 4
-    29c0:	05 93       	las	Z, r16
+    29d0:	e9 e1       	ldi	r30, 0x19	; 25
+    29d2:	f2 e2       	ldi	r31, 0x22	; 34
+    29d4:	04 e0       	ldi	r16, 0x04	; 4
+    29d6:	05 93       	las	Z, r16
 		udd_control_out_enable_stall();
-    29c2:	e1 e1       	ldi	r30, 0x11	; 17
-    29c4:	f2 e2       	ldi	r31, 0x22	; 34
-    29c6:	04 e0       	ldi	r16, 0x04	; 4
-    29c8:	05 93       	las	Z, r16
-    29ca:	3c c0       	rjmp	.+120    	; 0x2a44 <__vector_125+0x150>
+    29d8:	e1 e1       	ldi	r30, 0x11	; 17
+    29da:	f2 e2       	ldi	r31, 0x22	; 34
+    29dc:	04 e0       	ldi	r16, 0x04	; 4
+    29de:	05 93       	las	Z, r16
+    29e0:	3c c0       	rjmp	.+120    	; 0x2a5a <__vector_125+0x150>
 
 	if (udd_ctrl_interrupt_error()) {
 		goto udd_interrupt_bus_event_end;
 	}
 	if (udd_is_reset_event()) {
 		udd_ack_reset_event();
-    29cc:	80 e1       	ldi	r24, 0x10	; 16
-    29ce:	80 93 ca 04 	sts	0x04CA, r24	; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca>
+    29e2:	80 e1       	ldi	r24, 0x10	; 16
+    29e4:	80 93 ca 04 	sts	0x04CA, r24	; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca>
 #if (0!=USB_DEVICE_MAX_EP)
 		// Abort all endpoint jobs on going
 		uint8_t i;
 		for (i = 1; i < USB_DEVICE_MAX_EP; i++) {
 			udd_ep_abort(i);
-    29d2:	81 e0       	ldi	r24, 0x01	; 1
-    29d4:	fd de       	rcall	.-518    	; 0x27d0 <udd_ep_abort>
+    29e8:	81 e0       	ldi	r24, 0x01	; 1
+    29ea:	fd de       	rcall	.-518    	; 0x27e6 <udd_ep_abort>
 			udd_ep_abort(i | USB_EP_DIR_IN);
-    29d6:	81 e8       	ldi	r24, 0x81	; 129
-    29d8:	fb de       	rcall	.-522    	; 0x27d0 <udd_ep_abort>
+    29ec:	81 e8       	ldi	r24, 0x81	; 129
+    29ee:	fb de       	rcall	.-522    	; 0x27e6 <udd_ep_abort>
 		udd_ack_reset_event();
 #if (0!=USB_DEVICE_MAX_EP)
 		// Abort all endpoint jobs on going
 		uint8_t i;
 		for (i = 1; i < USB_DEVICE_MAX_EP; i++) {
 			udd_ep_abort(i);
-    29da:	82 e0       	ldi	r24, 0x02	; 2
-    29dc:	f9 de       	rcall	.-526    	; 0x27d0 <udd_ep_abort>
+    29f0:	82 e0       	ldi	r24, 0x02	; 2
+    29f2:	f9 de       	rcall	.-526    	; 0x27e6 <udd_ep_abort>
 			udd_ep_abort(i | USB_EP_DIR_IN);
-    29de:	82 e8       	ldi	r24, 0x82	; 130
-    29e0:	f7 de       	rcall	.-530    	; 0x27d0 <udd_ep_abort>
+    29f4:	82 e8       	ldi	r24, 0x82	; 130
+    29f6:	f7 de       	rcall	.-530    	; 0x27e6 <udd_ep_abort>
 		}
 #endif
 		udc_reset();
-    29e2:	0e 94 db 0a 	call	0x15b6	; 0x15b6 <udc_reset>
+    29f8:	0e 94 e6 0a 	call	0x15cc	; 0x15cc <udc_reset>
 
 		// Reset USB address to 0
 		udd_set_device_address(0);
-    29e6:	10 92 c3 04 	sts	0x04C3, r1	; 0x8004c3 <__TEXT_REGION_LENGTH__+0x7004c3>
+    29fc:	10 92 c3 04 	sts	0x04C3, r1	; 0x8004c3 <__TEXT_REGION_LENGTH__+0x7004c3>
 #endif
 	}
 
 	// Enable endpoint
 	ep_ctrl = udd_ep_get_ctrl(ep);
 	udd_endpoint_disable(ep_ctrl);
-    29ea:	e0 e0       	ldi	r30, 0x00	; 0
-    29ec:	f2 e2       	ldi	r31, 0x22	; 34
-    29ee:	11 8a       	std	Z+17, r1	; 0x11
+    2a00:	e0 e0       	ldi	r30, 0x00	; 0
+    2a02:	f2 e2       	ldi	r31, 0x22	; 34
+    2a04:	11 8a       	std	Z+17, r1	; 0x11
 	udd_endpoint_clear_status(ep_ctrl);
-    29f0:	96 e0       	ldi	r25, 0x06	; 6
-    29f2:	90 8b       	std	Z+16, r25	; 0x10
+    2a06:	96 e0       	ldi	r25, 0x06	; 6
+    2a08:	90 8b       	std	Z+16, r25	; 0x10
 	udd_endpoint_set_control(ep_ctrl, (uint8_t) type | (uint8_t) size);
-    29f4:	83 e4       	ldi	r24, 0x43	; 67
-    29f6:	81 8b       	std	Z+17, r24	; 0x11
+    2a0a:	83 e4       	ldi	r24, 0x43	; 67
+    2a0c:	81 8b       	std	Z+17, r24	; 0x11
 #endif
 	}
 
 	// Enable endpoint
 	ep_ctrl = udd_ep_get_ctrl(ep);
 	udd_endpoint_disable(ep_ctrl);
-    29f8:	11 8e       	std	Z+25, r1	; 0x19
+    2a0e:	11 8e       	std	Z+25, r1	; 0x19
 	udd_endpoint_clear_status(ep_ctrl);
-    29fa:	90 8f       	std	Z+24, r25	; 0x18
+    2a10:	90 8f       	std	Z+24, r25	; 0x18
 	udd_endpoint_set_control(ep_ctrl, (uint8_t) type | (uint8_t) size);
-    29fc:	81 8f       	std	Z+25, r24	; 0x19
+    2a12:	81 8f       	std	Z+25, r24	; 0x19
 		udd_set_device_address(0);
 		// Alloc and configure control endpoint
 		udd_ep_init(0, USB_EP_TYPE_CONTROL, USB_DEVICE_EP_CTRL_SIZE);
 		udd_ep_init(0 | USB_EP_DIR_IN, USB_EP_TYPE_CONTROL,
 				USB_DEVICE_EP_CTRL_SIZE);
 		udd_control_out_set_buf(&udd_ctrl_buffer);
-    29fe:	8b eb       	ldi	r24, 0xBB	; 187
-    2a00:	91 e2       	ldi	r25, 0x21	; 33
-    2a02:	84 8b       	std	Z+20, r24	; 0x14
-    2a04:	95 8b       	std	Z+21, r25	; 0x15
+    2a14:	8b eb       	ldi	r24, 0xBB	; 187
+    2a16:	91 e2       	ldi	r25, 0x21	; 33
+    2a18:	84 8b       	std	Z+20, r24	; 0x14
+    2a1a:	95 8b       	std	Z+21, r25	; 0x15
 		// Reset endpoint control management
 		udd_ctrl_init();
-    2a06:	ef d9       	rcall	.-3106   	; 0x1de6 <udd_ctrl_init>
+    2a1c:	ef d9       	rcall	.-3106   	; 0x1dfc <udd_ctrl_init>
 		goto udd_interrupt_bus_event_end;
-    2a08:	1d c0       	rjmp	.+58     	; 0x2a44 <__vector_125+0x150>
+    2a1e:	1d c0       	rjmp	.+58     	; 0x2a5a <__vector_125+0x150>
 	}
 
 	if (udd_is_suspend_event()) {
-    2a0a:	80 91 cb 04 	lds	r24, 0x04CB	; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb>
-    2a0e:	86 ff       	sbrs	r24, 6
-    2a10:	08 c0       	rjmp	.+16     	; 0x2a22 <__vector_125+0x12e>
+    2a20:	80 91 cb 04 	lds	r24, 0x04CB	; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb>
+    2a24:	86 ff       	sbrs	r24, 6
+    2a26:	08 c0       	rjmp	.+16     	; 0x2a38 <__vector_125+0x12e>
 		udd_ack_suspend_event();
-    2a12:	80 e4       	ldi	r24, 0x40	; 64
-    2a14:	80 93 ca 04 	sts	0x04CA, r24	; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca>
+    2a28:	80 e4       	ldi	r24, 0x40	; 64
+    2a2a:	80 93 ca 04 	sts	0x04CA, r24	; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca>
 		udd_sleep_mode(false); // Enter in SUSPEND mode
-    2a18:	80 e0       	ldi	r24, 0x00	; 0
-    2a1a:	bc d9       	rcall	.-3208   	; 0x1d94 <udd_sleep_mode>
+    2a2e:	80 e0       	ldi	r24, 0x00	; 0
+    2a30:	bc d9       	rcall	.-3208   	; 0x1daa <udd_sleep_mode>
 #ifdef UDC_SUSPEND_EVENT
 		UDC_SUSPEND_EVENT();
-    2a1c:	0e 94 c0 01 	call	0x380	; 0x380 <main_suspend_action>
+    2a32:	0e 94 c0 01 	call	0x380	; 0x380 <main_suspend_action>
 #endif
 		goto udd_interrupt_bus_event_end;
-    2a20:	11 c0       	rjmp	.+34     	; 0x2a44 <__vector_125+0x150>
+    2a36:	11 c0       	rjmp	.+34     	; 0x2a5a <__vector_125+0x150>
 	}
 
 	if (udd_is_resume_event()) {
-    2a22:	80 91 cb 04 	lds	r24, 0x04CB	; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb>
-    2a26:	85 ff       	sbrs	r24, 5
-    2a28:	0d c0       	rjmp	.+26     	; 0x2a44 <__vector_125+0x150>
+    2a38:	80 91 cb 04 	lds	r24, 0x04CB	; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb>
+    2a3c:	85 ff       	sbrs	r24, 5
+    2a3e:	0d c0       	rjmp	.+26     	; 0x2a5a <__vector_125+0x150>
 		udd_ack_resume_event();
-    2a2a:	80 e2       	ldi	r24, 0x20	; 32
-    2a2c:	80 93 ca 04 	sts	0x04CA, r24	; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca>
+    2a40:	80 e2       	ldi	r24, 0x20	; 32
+    2a42:	80 93 ca 04 	sts	0x04CA, r24	; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca>
 		udd_sleep_mode(true); // Enter in power reduction mode
-    2a30:	81 e0       	ldi	r24, 0x01	; 1
-    2a32:	b0 d9       	rcall	.-3232   	; 0x1d94 <udd_sleep_mode>
+    2a46:	81 e0       	ldi	r24, 0x01	; 1
+    2a48:	b0 d9       	rcall	.-3232   	; 0x1daa <udd_sleep_mode>
 #ifdef UDC_RESUME_EVENT
 		UDC_RESUME_EVENT();
-    2a34:	0e 94 c1 01 	call	0x382	; 0x382 <main_resume_action>
+    2a4a:	0e 94 c1 01 	call	0x382	; 0x382 <main_resume_action>
 #endif
 		goto udd_interrupt_bus_event_end;
-    2a38:	05 c0       	rjmp	.+10     	; 0x2a44 <__vector_125+0x150>
+    2a4e:	05 c0       	rjmp	.+10     	; 0x2a5a <__vector_125+0x150>
 	}
 
 	if (udd_ctrl_interrupt_error()) {
 		goto udd_interrupt_bus_event_end;
 	}
 	if (udd_is_reset_event()) {
-    2a3a:	80 91 cb 04 	lds	r24, 0x04CB	; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb>
-    2a3e:	84 fd       	sbrc	r24, 4
-    2a40:	c5 cf       	rjmp	.-118    	; 0x29cc <__vector_125+0xd8>
-    2a42:	e3 cf       	rjmp	.-58     	; 0x2a0a <__vector_125+0x116>
+    2a50:	80 91 cb 04 	lds	r24, 0x04CB	; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb>
+    2a54:	84 fd       	sbrc	r24, 4
+    2a56:	c5 cf       	rjmp	.-118    	; 0x29e2 <__vector_125+0xd8>
+    2a58:	e3 cf       	rjmp	.-58     	; 0x2a20 <__vector_125+0x116>
 		goto udd_interrupt_bus_event_end;
 	}
 
 udd_interrupt_bus_event_end:
 	return;
 }
-    2a44:	ff 91       	pop	r31
-    2a46:	ef 91       	pop	r30
-    2a48:	bf 91       	pop	r27
-    2a4a:	af 91       	pop	r26
-    2a4c:	9f 91       	pop	r25
-    2a4e:	8f 91       	pop	r24
-    2a50:	7f 91       	pop	r23
-    2a52:	6f 91       	pop	r22
-    2a54:	5f 91       	pop	r21
-    2a56:	4f 91       	pop	r20
-    2a58:	3f 91       	pop	r19
-    2a5a:	2f 91       	pop	r18
-    2a5c:	0f 91       	pop	r16
-    2a5e:	0f 90       	pop	r0
-    2a60:	0f be       	out	0x3f, r0	; 63
-    2a62:	0f 90       	pop	r0
-    2a64:	1f 90       	pop	r1
-    2a66:	18 95       	reti
+    2a5a:	ff 91       	pop	r31
+    2a5c:	ef 91       	pop	r30
+    2a5e:	bf 91       	pop	r27
+    2a60:	af 91       	pop	r26
+    2a62:	9f 91       	pop	r25
+    2a64:	8f 91       	pop	r24
+    2a66:	7f 91       	pop	r23
+    2a68:	6f 91       	pop	r22
+    2a6a:	5f 91       	pop	r21
+    2a6c:	4f 91       	pop	r20
+    2a6e:	3f 91       	pop	r19
+    2a70:	2f 91       	pop	r18
+    2a72:	0f 91       	pop	r16
+    2a74:	0f 90       	pop	r0
+    2a76:	0f be       	out	0x3f, r0	; 63
+    2a78:	0f 90       	pop	r0
+    2a7a:	1f 90       	pop	r1
+    2a7c:	18 95       	reti
 
-00002a68 <__vector_126>:
+00002a7e <__vector_126>:
  * \brief Function called by USB transfer complete interrupt
  *
  * USB transfer complete interrupt includes events about endpoint transfer on all endpoints.
  */
 ISR(USB_TRNCOMPL_vect)
 {
-    2a68:	1f 92       	push	r1
-    2a6a:	0f 92       	push	r0
-    2a6c:	0f b6       	in	r0, 0x3f	; 63
-    2a6e:	0f 92       	push	r0
-    2a70:	11 24       	eor	r1, r1
-    2a72:	0f 93       	push	r16
-    2a74:	1f 93       	push	r17
-    2a76:	2f 93       	push	r18
-    2a78:	3f 93       	push	r19
-    2a7a:	4f 93       	push	r20
-    2a7c:	5f 93       	push	r21
-    2a7e:	6f 93       	push	r22
-    2a80:	7f 93       	push	r23
-    2a82:	8f 93       	push	r24
-    2a84:	9f 93       	push	r25
-    2a86:	af 93       	push	r26
-    2a88:	bf 93       	push	r27
-    2a8a:	cf 93       	push	r28
-    2a8c:	df 93       	push	r29
-    2a8e:	ef 93       	push	r30
-    2a90:	ff 93       	push	r31
+    2a7e:	1f 92       	push	r1
+    2a80:	0f 92       	push	r0
+    2a82:	0f b6       	in	r0, 0x3f	; 63
+    2a84:	0f 92       	push	r0
+    2a86:	11 24       	eor	r1, r1
+    2a88:	0f 93       	push	r16
+    2a8a:	1f 93       	push	r17
+    2a8c:	2f 93       	push	r18
+    2a8e:	3f 93       	push	r19
+    2a90:	4f 93       	push	r20
+    2a92:	5f 93       	push	r21
+    2a94:	6f 93       	push	r22
+    2a96:	7f 93       	push	r23
+    2a98:	8f 93       	push	r24
+    2a9a:	9f 93       	push	r25
+    2a9c:	af 93       	push	r26
+    2a9e:	bf 93       	push	r27
+    2aa0:	cf 93       	push	r28
+    2aa2:	df 93       	push	r29
+    2aa4:	ef 93       	push	r30
+    2aa6:	ff 93       	push	r31
 	int8_t rp;
 	UDD_EP_t *ep_ctrl;
 	udd_ep_id_t ep;
 #endif
 
 	if (!udd_is_tc_event()) {
-    2a92:	80 91 cc 04 	lds	r24, 0x04CC	; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc>
-    2a96:	81 fd       	sbrc	r24, 1
-    2a98:	03 c0       	rjmp	.+6      	; 0x2aa0 <__vector_126+0x38>
+    2aa8:	80 91 cc 04 	lds	r24, 0x04CC	; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc>
+    2aac:	81 fd       	sbrc	r24, 1
+    2aae:	03 c0       	rjmp	.+6      	; 0x2ab6 <__vector_126+0x38>
 		// If no other transfer complete
 		// then check reception of SETUP packet on control endpoint
 		if (udd_ctrl_interrupt_tc_setup()) {
-    2a9a:	9d da       	rcall	.-2758   	; 0x1fd6 <udd_ctrl_interrupt_tc_setup>
-    2a9c:	81 11       	cpse	r24, r1
-    2a9e:	b9 c0       	rjmp	.+370    	; 0x2c12 <__vector_126+0x1aa>
+    2ab0:	9d da       	rcall	.-2758   	; 0x1fec <udd_ctrl_interrupt_tc_setup>
+    2ab2:	81 11       	cpse	r24, r1
+    2ab4:	b9 c0       	rjmp	.+370    	; 0x2c28 <__vector_126+0x1aa>
 			goto udd_interrupt_tc_end;
 		}
 		Assert(false);
 	}
 	// Check IN/OUT transfer complete on all endpoints
 	udd_ack_tc_event();
-    2aa0:	82 e0       	ldi	r24, 0x02	; 2
-    2aa2:	80 93 cc 04 	sts	0x04CC, r24	; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc>
+    2ab6:	82 e0       	ldi	r24, 0x02	; 2
+    2ab8:	80 93 cc 04 	sts	0x04CC, r24	; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc>
 
 #if (0!=USB_DEVICE_MAX_EP)
 	//** Decode TC FIFO
 	// Compute ep addr
 	rp = udd_get_fifo_rp();
-    2aa6:	80 91 c5 04 	lds	r24, 0x04C5	; 0x8004c5 <__TEXT_REGION_LENGTH__+0x7004c5>
+    2abc:	80 91 c5 04 	lds	r24, 0x04C5	; 0x8004c5 <__TEXT_REGION_LENGTH__+0x7004c5>
 	i_fifo = 2 * (1 + ~rp);
-    2aaa:	81 95       	neg	r24
-    2aac:	88 0f       	add	r24, r24
+    2ac0:	81 95       	neg	r24
+    2ac2:	88 0f       	add	r24, r24
 	ad = ((uint16_t) udd_sram.ep_ctrl) - i_fifo;
-    2aae:	e0 e1       	ldi	r30, 0x10	; 16
-    2ab0:	f2 e2       	ldi	r31, 0x22	; 34
-    2ab2:	e8 1b       	sub	r30, r24
-    2ab4:	f1 09       	sbc	r31, r1
+    2ac4:	e0 e1       	ldi	r30, 0x10	; 16
+    2ac6:	f2 e2       	ldi	r31, 0x22	; 34
+    2ac8:	e8 1b       	sub	r30, r24
+    2aca:	f1 09       	sbc	r31, r1
 	p_ad = (uint16_t *) ad;
 	// Compute ep
 	ep_index = (((uint16_t) * p_ad - ((uint16_t) udd_sram.ep_ctrl)) >> 3);
-    2ab6:	20 81       	ld	r18, Z
-    2ab8:	31 81       	ldd	r19, Z+1	; 0x01
-    2aba:	20 51       	subi	r18, 0x10	; 16
-    2abc:	32 42       	sbci	r19, 0x22	; 34
-    2abe:	36 95       	lsr	r19
-    2ac0:	27 95       	ror	r18
-    2ac2:	36 95       	lsr	r19
-    2ac4:	27 95       	ror	r18
-    2ac6:	36 95       	lsr	r19
-    2ac8:	27 95       	ror	r18
+    2acc:	20 81       	ld	r18, Z
+    2ace:	31 81       	ldd	r19, Z+1	; 0x01
+    2ad0:	20 51       	subi	r18, 0x10	; 16
+    2ad2:	32 42       	sbci	r19, 0x22	; 34
+    2ad4:	36 95       	lsr	r19
+    2ad6:	27 95       	ror	r18
+    2ad8:	36 95       	lsr	r19
+    2ada:	27 95       	ror	r18
+    2adc:	36 95       	lsr	r19
+    2ade:	27 95       	ror	r18
 	ep = (ep_index / 2) + ((ep_index & 1) ? USB_EP_DIR_IN : 0);
-    2aca:	82 2f       	mov	r24, r18
-    2acc:	86 95       	lsr	r24
-    2ace:	20 fd       	sbrc	r18, 0
-    2ad0:	02 c0       	rjmp	.+4      	; 0x2ad6 <__vector_126+0x6e>
-    2ad2:	90 e0       	ldi	r25, 0x00	; 0
-    2ad4:	01 c0       	rjmp	.+2      	; 0x2ad8 <__vector_126+0x70>
-    2ad6:	90 e8       	ldi	r25, 0x80	; 128
-    2ad8:	89 0f       	add	r24, r25
+    2ae0:	82 2f       	mov	r24, r18
+    2ae2:	86 95       	lsr	r24
+    2ae4:	20 fd       	sbrc	r18, 0
+    2ae6:	02 c0       	rjmp	.+4      	; 0x2aec <__vector_126+0x6e>
+    2ae8:	90 e0       	ldi	r25, 0x00	; 0
+    2aea:	01 c0       	rjmp	.+2      	; 0x2aee <__vector_126+0x70>
+    2aec:	90 e8       	ldi	r25, 0x80	; 128
+    2aee:	89 0f       	add	r24, r25
 	udd_endpoint_set_control(ep_ctrl, (uint8_t) type | (uint8_t) size);
 }
 
 static UDD_EP_t *udd_ep_get_ctrl(udd_ep_id_t ep)
 {
 	return &udd_sram.ep_ctrl[(2 * (ep & USB_EP_ADDR_MASK) +
-    2ada:	e8 2f       	mov	r30, r24
-    2adc:	ef 70       	andi	r30, 0x0F	; 15
-    2ade:	f0 e0       	ldi	r31, 0x00	; 0
-    2ae0:	ee 0f       	add	r30, r30
-    2ae2:	ff 1f       	adc	r31, r31
+    2af0:	e8 2f       	mov	r30, r24
+    2af2:	ef 70       	andi	r30, 0x0F	; 15
+    2af4:	f0 e0       	ldi	r31, 0x00	; 0
+    2af6:	ee 0f       	add	r30, r30
+    2af8:	ff 1f       	adc	r31, r31
 			((ep & USB_EP_DIR_IN) ? 1 : 0))];
-    2ae4:	28 2f       	mov	r18, r24
-    2ae6:	08 2e       	mov	r0, r24
-    2ae8:	00 0c       	add	r0, r0
-    2aea:	33 0b       	sbc	r19, r19
-    2aec:	22 27       	eor	r18, r18
-    2aee:	33 0f       	add	r19, r19
-    2af0:	22 1f       	adc	r18, r18
-    2af2:	33 27       	eor	r19, r19
+    2afa:	28 2f       	mov	r18, r24
+    2afc:	08 2e       	mov	r0, r24
+    2afe:	00 0c       	add	r0, r0
+    2b00:	33 0b       	sbc	r19, r19
+    2b02:	22 27       	eor	r18, r18
+    2b04:	33 0f       	add	r19, r19
+    2b06:	22 1f       	adc	r18, r18
+    2b08:	33 27       	eor	r19, r19
 	udd_endpoint_set_control(ep_ctrl, (uint8_t) type | (uint8_t) size);
 }
 
 static UDD_EP_t *udd_ep_get_ctrl(udd_ep_id_t ep)
 {
 	return &udd_sram.ep_ctrl[(2 * (ep & USB_EP_ADDR_MASK) +
-    2af4:	e2 0f       	add	r30, r18
-    2af6:	f3 1f       	adc	r31, r19
+    2b0a:	e2 0f       	add	r30, r18
+    2b0c:	f3 1f       	adc	r31, r19
 	ep = (ep_index / 2) + ((ep_index & 1) ? USB_EP_DIR_IN : 0);
 	Assert(USB_DEVICE_MAX_EP >= (ep & USB_EP_ADDR_MASK));
 
 	// Ack IT TC of endpoint
 	ep_ctrl = udd_ep_get_ctrl(ep);
 	if (!udd_endpoint_transfer_complete(ep_ctrl)) {
-    2af8:	df 01       	movw	r26, r30
-    2afa:	aa 0f       	add	r26, r26
-    2afc:	bb 1f       	adc	r27, r27
-    2afe:	aa 0f       	add	r26, r26
-    2b00:	bb 1f       	adc	r27, r27
-    2b02:	aa 0f       	add	r26, r26
-    2b04:	bb 1f       	adc	r27, r27
-    2b06:	a0 5f       	subi	r26, 0xF0	; 240
-    2b08:	bd 4d       	sbci	r27, 0xDD	; 221
-    2b0a:	9c 91       	ld	r25, X
-    2b0c:	95 ff       	sbrs	r25, 5
-    2b0e:	81 c0       	rjmp	.+258    	; 0x2c12 <__vector_126+0x1aa>
+    2b0e:	df 01       	movw	r26, r30
+    2b10:	aa 0f       	add	r26, r26
+    2b12:	bb 1f       	adc	r27, r27
+    2b14:	aa 0f       	add	r26, r26
+    2b16:	bb 1f       	adc	r27, r27
+    2b18:	aa 0f       	add	r26, r26
+    2b1a:	bb 1f       	adc	r27, r27
+    2b1c:	a0 5f       	subi	r26, 0xF0	; 240
+    2b1e:	bd 4d       	sbci	r27, 0xDD	; 221
+    2b20:	9c 91       	ld	r25, X
+    2b22:	95 ff       	sbrs	r25, 5
+    2b24:	81 c0       	rjmp	.+258    	; 0x2c28 <__vector_126+0x1aa>
 		return; // Error, TC is generated by Multipacket transfer
 	}
 	udd_endpoint_ack_transfer_complete(ep_ctrl);
-    2b10:	fd 01       	movw	r30, r26
-    2b12:	00 e2       	ldi	r16, 0x20	; 32
-    2b14:	06 93       	lac	Z, r16
+    2b26:	fd 01       	movw	r30, r26
+    2b28:	00 e2       	ldi	r16, 0x20	; 32
+    2b2a:	06 93       	lac	Z, r16
 
 	// Check status on control endpoint
 	if (ep == 0) {
-    2b16:	81 11       	cpse	r24, r1
-    2b18:	77 c0       	rjmp	.+238    	; 0x2c08 <__vector_126+0x1a0>
+    2b2c:	81 11       	cpse	r24, r1
+    2b2e:	77 c0       	rjmp	.+238    	; 0x2c1e <__vector_126+0x1a0>
 
 static void udd_ctrl_out_received(void)
 {
 	uint16_t nb_data;
 
 	if (UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP == udd_ep_control_state) {
-    2b1a:	80 91 ff 21 	lds	r24, 0x21FF	; 0x8021ff <udd_ep_control_state>
-    2b1e:	84 30       	cpi	r24, 0x04	; 4
-    2b20:	19 f4       	brne	.+6      	; 0x2b28 <__vector_126+0xc0>
+    2b30:	80 91 ff 21 	lds	r24, 0x21FF	; 0x8021ff <udd_ep_control_state>
+    2b34:	84 30       	cpi	r24, 0x04	; 4
+    2b36:	19 f4       	brne	.+6      	; 0x2b3e <__vector_126+0xc0>
 		// Valid end of setup request
 		udd_ctrl_endofrequest();
-    2b22:	a4 d9       	rcall	.-3256   	; 0x1e6c <udd_ctrl_endofrequest>
+    2b38:	a4 d9       	rcall	.-3256   	; 0x1e82 <udd_ctrl_endofrequest>
 		// Reinitializes control endpoint management
 		udd_ctrl_init();
-    2b24:	60 d9       	rcall	.-3392   	; 0x1de6 <udd_ctrl_init>
-    2b26:	75 c0       	rjmp	.+234    	; 0x2c12 <__vector_126+0x1aa>
+    2b3a:	60 d9       	rcall	.-3392   	; 0x1dfc <udd_ctrl_init>
+    2b3c:	75 c0       	rjmp	.+234    	; 0x2c28 <__vector_126+0x1aa>
 		return;
 	}
 	Assert(udd_ep_control_state == UDD_EPCTRL_DATA_OUT);
 
 	// Read data received during OUT phase
 	nb_data = udd_control_out_get_bytecnt();
-    2b28:	00 91 12 22 	lds	r16, 0x2212	; 0x802212 <udd_sram+0x12>
-    2b2c:	10 91 13 22 	lds	r17, 0x2213	; 0x802213 <udd_sram+0x13>
+    2b3e:	00 91 12 22 	lds	r16, 0x2212	; 0x802212 <udd_sram+0x12>
+    2b42:	10 91 13 22 	lds	r17, 0x2213	; 0x802213 <udd_sram+0x13>
 
 	if (udd_g_ctrlreq.payload_size < (udd_ctrl_payload_nb_trans + nb_data)) {
-    2b30:	80 91 64 24 	lds	r24, 0x2464	; 0x802464 <udd_g_ctrlreq+0xa>
-    2b34:	90 91 65 24 	lds	r25, 0x2465	; 0x802465 <udd_g_ctrlreq+0xb>
-    2b38:	c0 91 fb 21 	lds	r28, 0x21FB	; 0x8021fb <udd_ctrl_payload_nb_trans>
-    2b3c:	d0 91 fc 21 	lds	r29, 0x21FC	; 0x8021fc <udd_ctrl_payload_nb_trans+0x1>
-    2b40:	9e 01       	movw	r18, r28
-    2b42:	20 0f       	add	r18, r16
-    2b44:	31 1f       	adc	r19, r17
-    2b46:	82 17       	cp	r24, r18
-    2b48:	93 07       	cpc	r25, r19
-    2b4a:	18 f4       	brcc	.+6      	; 0x2b52 <__vector_126+0xea>
+    2b46:	80 91 64 24 	lds	r24, 0x2464	; 0x802464 <udd_g_ctrlreq+0xa>
+    2b4a:	90 91 65 24 	lds	r25, 0x2465	; 0x802465 <udd_g_ctrlreq+0xb>
+    2b4e:	c0 91 fb 21 	lds	r28, 0x21FB	; 0x8021fb <udd_ctrl_payload_nb_trans>
+    2b52:	d0 91 fc 21 	lds	r29, 0x21FC	; 0x8021fc <udd_ctrl_payload_nb_trans+0x1>
+    2b56:	9e 01       	movw	r18, r28
+    2b58:	20 0f       	add	r18, r16
+    2b5a:	31 1f       	adc	r19, r17
+    2b5c:	82 17       	cp	r24, r18
+    2b5e:	93 07       	cpc	r25, r19
+    2b60:	18 f4       	brcc	.+6      	; 0x2b68 <__vector_126+0xea>
 		// Payload buffer too small, ignore data remaining
 		nb_data = udd_g_ctrlreq.payload_size - udd_ctrl_payload_nb_trans;
-    2b4c:	8c 01       	movw	r16, r24
-    2b4e:	0c 1b       	sub	r16, r28
-    2b50:	1d 0b       	sbc	r17, r29
+    2b62:	8c 01       	movw	r16, r24
+    2b64:	0c 1b       	sub	r16, r28
+    2b66:	1d 0b       	sbc	r17, r29
 	}
 
 	memcpy((uint8_t *) (udd_g_ctrlreq.payload + udd_ctrl_payload_nb_trans),
-    2b52:	80 91 62 24 	lds	r24, 0x2462	; 0x802462 <udd_g_ctrlreq+0x8>
-    2b56:	90 91 63 24 	lds	r25, 0x2463	; 0x802463 <udd_g_ctrlreq+0x9>
-    2b5a:	a8 01       	movw	r20, r16
-    2b5c:	6b eb       	ldi	r22, 0xBB	; 187
-    2b5e:	71 e2       	ldi	r23, 0x21	; 33
-    2b60:	8c 0f       	add	r24, r28
-    2b62:	9d 1f       	adc	r25, r29
-    2b64:	85 d0       	rcall	.+266    	; 0x2c70 <memcpy>
+    2b68:	80 91 62 24 	lds	r24, 0x2462	; 0x802462 <udd_g_ctrlreq+0x8>
+    2b6c:	90 91 63 24 	lds	r25, 0x2463	; 0x802463 <udd_g_ctrlreq+0x9>
+    2b70:	a8 01       	movw	r20, r16
+    2b72:	6b eb       	ldi	r22, 0xBB	; 187
+    2b74:	71 e2       	ldi	r23, 0x21	; 33
+    2b76:	8c 0f       	add	r24, r28
+    2b78:	9d 1f       	adc	r25, r29
+    2b7a:	85 d0       	rcall	.+266    	; 0x2c86 <memcpy>
 			udd_ctrl_buffer, nb_data);
 	udd_ctrl_payload_nb_trans += nb_data;
-    2b66:	c0 0f       	add	r28, r16
-    2b68:	d1 1f       	adc	r29, r17
-    2b6a:	c0 93 fb 21 	sts	0x21FB, r28	; 0x8021fb <udd_ctrl_payload_nb_trans>
-    2b6e:	d0 93 fc 21 	sts	0x21FC, r29	; 0x8021fc <udd_ctrl_payload_nb_trans+0x1>
+    2b7c:	c0 0f       	add	r28, r16
+    2b7e:	d1 1f       	adc	r29, r17
+    2b80:	c0 93 fb 21 	sts	0x21FB, r28	; 0x8021fb <udd_ctrl_payload_nb_trans>
+    2b84:	d0 93 fc 21 	sts	0x21FC, r29	; 0x8021fc <udd_ctrl_payload_nb_trans+0x1>
 
 	if ((USB_DEVICE_EP_CTRL_SIZE != nb_data) || (udd_g_ctrlreq.req.wLength
-    2b72:	00 34       	cpi	r16, 0x40	; 64
-    2b74:	11 05       	cpc	r17, r1
-    2b76:	69 f4       	brne	.+26     	; 0x2b92 <__vector_126+0x12a>
+    2b88:	00 34       	cpi	r16, 0x40	; 64
+    2b8a:	11 05       	cpc	r17, r1
+    2b8c:	69 f4       	brne	.+26     	; 0x2ba8 <__vector_126+0x12a>
 			<= (udd_ctrl_prev_payload_nb_trans
 			+ udd_ctrl_payload_nb_trans))) {
-    2b78:	80 91 fd 21 	lds	r24, 0x21FD	; 0x8021fd <udd_ctrl_prev_payload_nb_trans>
-    2b7c:	90 91 fe 21 	lds	r25, 0x21FE	; 0x8021fe <udd_ctrl_prev_payload_nb_trans+0x1>
-    2b80:	8c 0f       	add	r24, r28
-    2b82:	9d 1f       	adc	r25, r29
+    2b8e:	80 91 fd 21 	lds	r24, 0x21FD	; 0x8021fd <udd_ctrl_prev_payload_nb_trans>
+    2b92:	90 91 fe 21 	lds	r25, 0x21FE	; 0x8021fe <udd_ctrl_prev_payload_nb_trans+0x1>
+    2b96:	8c 0f       	add	r24, r28
+    2b98:	9d 1f       	adc	r25, r29
 
 	memcpy((uint8_t *) (udd_g_ctrlreq.payload + udd_ctrl_payload_nb_trans),
 			udd_ctrl_buffer, nb_data);
 	udd_ctrl_payload_nb_trans += nb_data;
 
 	if ((USB_DEVICE_EP_CTRL_SIZE != nb_data) || (udd_g_ctrlreq.req.wLength
-    2b84:	20 91 60 24 	lds	r18, 0x2460	; 0x802460 <udd_g_ctrlreq+0x6>
-    2b88:	30 91 61 24 	lds	r19, 0x2461	; 0x802461 <udd_g_ctrlreq+0x7>
-    2b8c:	82 17       	cp	r24, r18
-    2b8e:	93 07       	cpc	r25, r19
-    2b90:	80 f0       	brcs	.+32     	; 0x2bb2 <__vector_126+0x14a>
+    2b9a:	20 91 60 24 	lds	r18, 0x2460	; 0x802460 <udd_g_ctrlreq+0x6>
+    2b9e:	30 91 61 24 	lds	r19, 0x2461	; 0x802461 <udd_g_ctrlreq+0x7>
+    2ba2:	82 17       	cp	r24, r18
+    2ba4:	93 07       	cpc	r25, r19
+    2ba6:	80 f0       	brcs	.+32     	; 0x2bc8 <__vector_126+0x14a>
 		// End of reception because it is a short packet
 		// or all data are transfered
 
 		// Before send ZLP, call intermediate callback
 		// in case of data receive generate a stall
 		udd_g_ctrlreq.payload_size = udd_ctrl_payload_nb_trans;
-    2b92:	ea e5       	ldi	r30, 0x5A	; 90
-    2b94:	f4 e2       	ldi	r31, 0x24	; 36
-    2b96:	c2 87       	std	Z+10, r28	; 0x0a
-    2b98:	d3 87       	std	Z+11, r29	; 0x0b
+    2ba8:	ea e5       	ldi	r30, 0x5A	; 90
+    2baa:	f4 e2       	ldi	r31, 0x24	; 36
+    2bac:	c2 87       	std	Z+10, r28	; 0x0a
+    2bae:	d3 87       	std	Z+11, r29	; 0x0b
 		if (NULL != udd_g_ctrlreq.over_under_run) {
-    2b9a:	06 84       	ldd	r0, Z+14	; 0x0e
-    2b9c:	f7 85       	ldd	r31, Z+15	; 0x0f
-    2b9e:	e0 2d       	mov	r30, r0
-    2ba0:	30 97       	sbiw	r30, 0x00	; 0
-    2ba2:	29 f0       	breq	.+10     	; 0x2bae <__vector_126+0x146>
+    2bb0:	06 84       	ldd	r0, Z+14	; 0x0e
+    2bb2:	f7 85       	ldd	r31, Z+15	; 0x0f
+    2bb4:	e0 2d       	mov	r30, r0
+    2bb6:	30 97       	sbiw	r30, 0x00	; 0
+    2bb8:	29 f0       	breq	.+10     	; 0x2bc4 <__vector_126+0x146>
 			if (!udd_g_ctrlreq.over_under_run()) {
-    2ba4:	09 95       	icall
-    2ba6:	81 11       	cpse	r24, r1
-    2ba8:	02 c0       	rjmp	.+4      	; 0x2bae <__vector_126+0x146>
+    2bba:	09 95       	icall
+    2bbc:	81 11       	cpse	r24, r1
+    2bbe:	02 c0       	rjmp	.+4      	; 0x2bc4 <__vector_126+0x146>
 				// Stall ZLP
 				udd_ctrl_stall_data();
-    2baa:	44 d9       	rcall	.-3448   	; 0x1e34 <udd_ctrl_stall_data>
-    2bac:	32 c0       	rjmp	.+100    	; 0x2c12 <__vector_126+0x1aa>
+    2bc0:	44 d9       	rcall	.-3448   	; 0x1e4a <udd_ctrl_stall_data>
+    2bc2:	32 c0       	rjmp	.+100    	; 0x2c28 <__vector_126+0x1aa>
 				return;
 			}
 		}
 		// Send IN ZLP to ACK setup request
 		udd_ctrl_send_zlp_in();
-    2bae:	50 d9       	rcall	.-3424   	; 0x1e50 <udd_ctrl_send_zlp_in>
-    2bb0:	30 c0       	rjmp	.+96     	; 0x2c12 <__vector_126+0x1aa>
+    2bc4:	50 d9       	rcall	.-3424   	; 0x1e66 <udd_ctrl_send_zlp_in>
+    2bc6:	30 c0       	rjmp	.+96     	; 0x2c28 <__vector_126+0x1aa>
 		return;
 	}
 
 	if (udd_g_ctrlreq.payload_size == udd_ctrl_payload_nb_trans) {
-    2bb2:	80 91 64 24 	lds	r24, 0x2464	; 0x802464 <udd_g_ctrlreq+0xa>
-    2bb6:	90 91 65 24 	lds	r25, 0x2465	; 0x802465 <udd_g_ctrlreq+0xb>
-    2bba:	c8 17       	cp	r28, r24
-    2bbc:	d9 07       	cpc	r29, r25
-    2bbe:	f9 f4       	brne	.+62     	; 0x2bfe <__vector_126+0x196>
+    2bc8:	80 91 64 24 	lds	r24, 0x2464	; 0x802464 <udd_g_ctrlreq+0xa>
+    2bcc:	90 91 65 24 	lds	r25, 0x2465	; 0x802465 <udd_g_ctrlreq+0xb>
+    2bd0:	c8 17       	cp	r28, r24
+    2bd2:	d9 07       	cpc	r29, r25
+    2bd4:	f9 f4       	brne	.+62     	; 0x2c14 <__vector_126+0x196>
 		// Overrun then request a new payload buffer
 		if (!udd_g_ctrlreq.over_under_run) {
-    2bc0:	e0 91 68 24 	lds	r30, 0x2468	; 0x802468 <udd_g_ctrlreq+0xe>
-    2bc4:	f0 91 69 24 	lds	r31, 0x2469	; 0x802469 <udd_g_ctrlreq+0xf>
-    2bc8:	30 97       	sbiw	r30, 0x00	; 0
-    2bca:	11 f4       	brne	.+4      	; 0x2bd0 <__vector_126+0x168>
+    2bd6:	e0 91 68 24 	lds	r30, 0x2468	; 0x802468 <udd_g_ctrlreq+0xe>
+    2bda:	f0 91 69 24 	lds	r31, 0x2469	; 0x802469 <udd_g_ctrlreq+0xf>
+    2bde:	30 97       	sbiw	r30, 0x00	; 0
+    2be0:	11 f4       	brne	.+4      	; 0x2be6 <__vector_126+0x168>
 			// No callback available to request a new payload buffer
 			udd_ctrl_stall_data();
-    2bcc:	33 d9       	rcall	.-3482   	; 0x1e34 <udd_ctrl_stall_data>
-    2bce:	21 c0       	rjmp	.+66     	; 0x2c12 <__vector_126+0x1aa>
+    2be2:	33 d9       	rcall	.-3482   	; 0x1e4a <udd_ctrl_stall_data>
+    2be4:	21 c0       	rjmp	.+66     	; 0x2c28 <__vector_126+0x1aa>
 			return;
 		}
 		if (!udd_g_ctrlreq.over_under_run()) {
-    2bd0:	09 95       	icall
-    2bd2:	81 11       	cpse	r24, r1
-    2bd4:	02 c0       	rjmp	.+4      	; 0x2bda <__vector_126+0x172>
+    2be6:	09 95       	icall
+    2be8:	81 11       	cpse	r24, r1
+    2bea:	02 c0       	rjmp	.+4      	; 0x2bf0 <__vector_126+0x172>
 			// No new payload buffer delivered
 			udd_ctrl_stall_data();
-    2bd6:	2e d9       	rcall	.-3492   	; 0x1e34 <udd_ctrl_stall_data>
-    2bd8:	1c c0       	rjmp	.+56     	; 0x2c12 <__vector_126+0x1aa>
+    2bec:	2e d9       	rcall	.-3492   	; 0x1e4a <udd_ctrl_stall_data>
+    2bee:	1c c0       	rjmp	.+56     	; 0x2c28 <__vector_126+0x1aa>
 			return;
 		}
 		// New payload buffer available
 		// Update number of total data received
 		udd_ctrl_prev_payload_nb_trans += udd_ctrl_payload_nb_trans;
-    2bda:	20 91 fd 21 	lds	r18, 0x21FD	; 0x8021fd <udd_ctrl_prev_payload_nb_trans>
-    2bde:	30 91 fe 21 	lds	r19, 0x21FE	; 0x8021fe <udd_ctrl_prev_payload_nb_trans+0x1>
-    2be2:	80 91 fb 21 	lds	r24, 0x21FB	; 0x8021fb <udd_ctrl_payload_nb_trans>
-    2be6:	90 91 fc 21 	lds	r25, 0x21FC	; 0x8021fc <udd_ctrl_payload_nb_trans+0x1>
-    2bea:	82 0f       	add	r24, r18
-    2bec:	93 1f       	adc	r25, r19
-    2bee:	80 93 fd 21 	sts	0x21FD, r24	; 0x8021fd <udd_ctrl_prev_payload_nb_trans>
-    2bf2:	90 93 fe 21 	sts	0x21FE, r25	; 0x8021fe <udd_ctrl_prev_payload_nb_trans+0x1>
+    2bf0:	20 91 fd 21 	lds	r18, 0x21FD	; 0x8021fd <udd_ctrl_prev_payload_nb_trans>
+    2bf4:	30 91 fe 21 	lds	r19, 0x21FE	; 0x8021fe <udd_ctrl_prev_payload_nb_trans+0x1>
+    2bf8:	80 91 fb 21 	lds	r24, 0x21FB	; 0x8021fb <udd_ctrl_payload_nb_trans>
+    2bfc:	90 91 fc 21 	lds	r25, 0x21FC	; 0x8021fc <udd_ctrl_payload_nb_trans+0x1>
+    2c00:	82 0f       	add	r24, r18
+    2c02:	93 1f       	adc	r25, r19
+    2c04:	80 93 fd 21 	sts	0x21FD, r24	; 0x8021fd <udd_ctrl_prev_payload_nb_trans>
+    2c08:	90 93 fe 21 	sts	0x21FE, r25	; 0x8021fe <udd_ctrl_prev_payload_nb_trans+0x1>
 		// Reinit reception on payload buffer
 		udd_ctrl_payload_nb_trans = 0;
-    2bf6:	10 92 fb 21 	sts	0x21FB, r1	; 0x8021fb <udd_ctrl_payload_nb_trans>
-    2bfa:	10 92 fc 21 	sts	0x21FC, r1	; 0x8021fc <udd_ctrl_payload_nb_trans+0x1>
+    2c0c:	10 92 fb 21 	sts	0x21FB, r1	; 0x8021fb <udd_ctrl_payload_nb_trans>
+    2c10:	10 92 fc 21 	sts	0x21FC, r1	; 0x8021fc <udd_ctrl_payload_nb_trans+0x1>
 	}
 	// Free buffer of OUT control endpoint to authorize next reception
 	udd_control_out_clear_NACK0();
-    2bfe:	e0 e1       	ldi	r30, 0x10	; 16
-    2c00:	f2 e2       	ldi	r31, 0x22	; 34
-    2c02:	02 e0       	ldi	r16, 0x02	; 2
-    2c04:	06 93       	lac	Z, r16
-    2c06:	05 c0       	rjmp	.+10     	; 0x2c12 <__vector_126+0x1aa>
+    2c14:	e0 e1       	ldi	r30, 0x10	; 16
+    2c16:	f2 e2       	ldi	r31, 0x22	; 34
+    2c18:	02 e0       	ldi	r16, 0x02	; 2
+    2c1a:	06 93       	lac	Z, r16
+    2c1c:	05 c0       	rjmp	.+10     	; 0x2c28 <__vector_126+0x1aa>
 	// Check status on control endpoint
 	if (ep == 0) {
 		udd_ctrl_out_received();
 		goto udd_interrupt_tc_end; // Interrupt acked by control endpoint managed
 	}
 	if (ep == (0 | USB_EP_DIR_IN)) {
-    2c08:	80 38       	cpi	r24, 0x80	; 128
-    2c0a:	11 f4       	brne	.+4      	; 0x2c10 <__vector_126+0x1a8>
+    2c1e:	80 38       	cpi	r24, 0x80	; 128
+    2c20:	11 f4       	brne	.+4      	; 0x2c26 <__vector_126+0x1a8>
 		udd_ctrl_in_sent();
-    2c0c:	37 d9       	rcall	.-3474   	; 0x1e7c <udd_ctrl_in_sent>
+    2c22:	37 d9       	rcall	.-3474   	; 0x1e92 <udd_ctrl_in_sent>
 		goto udd_interrupt_tc_end; // Interrupt acked by control endpoint managed
-    2c0e:	01 c0       	rjmp	.+2      	; 0x2c12 <__vector_126+0x1aa>
+    2c24:	01 c0       	rjmp	.+2      	; 0x2c28 <__vector_126+0x1aa>
 	}
 	Assert(udd_ep_is_valid(ep));
 	// Manage end of transfer on endpoint bulk/interrupt/isochronous
 	udd_ep_trans_complet(ep);
-    2c10:	51 da       	rcall	.-2910   	; 0x20b4 <udd_ep_trans_complet>
+    2c26:	51 da       	rcall	.-2910   	; 0x20ca <udd_ep_trans_complet>
 	}
 #endif
 
 udd_interrupt_tc_end:
 	return;
 }
-    2c12:	ff 91       	pop	r31
-    2c14:	ef 91       	pop	r30
-    2c16:	df 91       	pop	r29
-    2c18:	cf 91       	pop	r28
-    2c1a:	bf 91       	pop	r27
-    2c1c:	af 91       	pop	r26
-    2c1e:	9f 91       	pop	r25
-    2c20:	8f 91       	pop	r24
-    2c22:	7f 91       	pop	r23
-    2c24:	6f 91       	pop	r22
-    2c26:	5f 91       	pop	r21
-    2c28:	4f 91       	pop	r20
-    2c2a:	3f 91       	pop	r19
-    2c2c:	2f 91       	pop	r18
-    2c2e:	1f 91       	pop	r17
-    2c30:	0f 91       	pop	r16
-    2c32:	0f 90       	pop	r0
-    2c34:	0f be       	out	0x3f, r0	; 63
-    2c36:	0f 90       	pop	r0
-    2c38:	1f 90       	pop	r1
-    2c3a:	18 95       	reti
+    2c28:	ff 91       	pop	r31
+    2c2a:	ef 91       	pop	r30
+    2c2c:	df 91       	pop	r29
+    2c2e:	cf 91       	pop	r28
+    2c30:	bf 91       	pop	r27
+    2c32:	af 91       	pop	r26
+    2c34:	9f 91       	pop	r25
+    2c36:	8f 91       	pop	r24
+    2c38:	7f 91       	pop	r23
+    2c3a:	6f 91       	pop	r22
+    2c3c:	5f 91       	pop	r21
+    2c3e:	4f 91       	pop	r20
+    2c40:	3f 91       	pop	r19
+    2c42:	2f 91       	pop	r18
+    2c44:	1f 91       	pop	r17
+    2c46:	0f 91       	pop	r16
+    2c48:	0f 90       	pop	r0
+    2c4a:	0f be       	out	0x3f, r0	; 63
+    2c4c:	0f 90       	pop	r0
+    2c4e:	1f 90       	pop	r1
+    2c50:	18 95       	reti
 
-00002c3c <__udivmodhi4>:
-    2c3c:	aa 1b       	sub	r26, r26
-    2c3e:	bb 1b       	sub	r27, r27
-    2c40:	51 e1       	ldi	r21, 0x11	; 17
-    2c42:	07 c0       	rjmp	.+14     	; 0x2c52 <__udivmodhi4_ep>
+00002c52 <__udivmodhi4>:
+    2c52:	aa 1b       	sub	r26, r26
+    2c54:	bb 1b       	sub	r27, r27
+    2c56:	51 e1       	ldi	r21, 0x11	; 17
+    2c58:	07 c0       	rjmp	.+14     	; 0x2c68 <__udivmodhi4_ep>
 
-00002c44 <__udivmodhi4_loop>:
-    2c44:	aa 1f       	adc	r26, r26
-    2c46:	bb 1f       	adc	r27, r27
-    2c48:	a6 17       	cp	r26, r22
-    2c4a:	b7 07       	cpc	r27, r23
-    2c4c:	10 f0       	brcs	.+4      	; 0x2c52 <__udivmodhi4_ep>
-    2c4e:	a6 1b       	sub	r26, r22
-    2c50:	b7 0b       	sbc	r27, r23
+00002c5a <__udivmodhi4_loop>:
+    2c5a:	aa 1f       	adc	r26, r26
+    2c5c:	bb 1f       	adc	r27, r27
+    2c5e:	a6 17       	cp	r26, r22
+    2c60:	b7 07       	cpc	r27, r23
+    2c62:	10 f0       	brcs	.+4      	; 0x2c68 <__udivmodhi4_ep>
+    2c64:	a6 1b       	sub	r26, r22
+    2c66:	b7 0b       	sbc	r27, r23
 
-00002c52 <__udivmodhi4_ep>:
-    2c52:	88 1f       	adc	r24, r24
-    2c54:	99 1f       	adc	r25, r25
-    2c56:	5a 95       	dec	r21
-    2c58:	a9 f7       	brne	.-22     	; 0x2c44 <__udivmodhi4_loop>
-    2c5a:	80 95       	com	r24
-    2c5c:	90 95       	com	r25
-    2c5e:	bc 01       	movw	r22, r24
-    2c60:	cd 01       	movw	r24, r26
-    2c62:	08 95       	ret
+00002c68 <__udivmodhi4_ep>:
+    2c68:	88 1f       	adc	r24, r24
+    2c6a:	99 1f       	adc	r25, r25
+    2c6c:	5a 95       	dec	r21
+    2c6e:	a9 f7       	brne	.-22     	; 0x2c5a <__udivmodhi4_loop>
+    2c70:	80 95       	com	r24
+    2c72:	90 95       	com	r25
+    2c74:	bc 01       	movw	r22, r24
+    2c76:	cd 01       	movw	r24, r26
+    2c78:	08 95       	ret
 
-00002c64 <__tablejump2__>:
-    2c64:	ee 0f       	add	r30, r30
-    2c66:	ff 1f       	adc	r31, r31
-    2c68:	05 90       	lpm	r0, Z+
-    2c6a:	f4 91       	lpm	r31, Z
-    2c6c:	e0 2d       	mov	r30, r0
-    2c6e:	09 94       	ijmp
+00002c7a <__tablejump2__>:
+    2c7a:	ee 0f       	add	r30, r30
+    2c7c:	ff 1f       	adc	r31, r31
+    2c7e:	05 90       	lpm	r0, Z+
+    2c80:	f4 91       	lpm	r31, Z
+    2c82:	e0 2d       	mov	r30, r0
+    2c84:	09 94       	ijmp
 
-00002c70 <memcpy>:
-    2c70:	fb 01       	movw	r30, r22
-    2c72:	dc 01       	movw	r26, r24
-    2c74:	02 c0       	rjmp	.+4      	; 0x2c7a <memcpy+0xa>
-    2c76:	01 90       	ld	r0, Z+
-    2c78:	0d 92       	st	X+, r0
-    2c7a:	41 50       	subi	r20, 0x01	; 1
-    2c7c:	50 40       	sbci	r21, 0x00	; 0
-    2c7e:	d8 f7       	brcc	.-10     	; 0x2c76 <memcpy+0x6>
-    2c80:	08 95       	ret
+00002c86 <memcpy>:
+    2c86:	fb 01       	movw	r30, r22
+    2c88:	dc 01       	movw	r26, r24
+    2c8a:	02 c0       	rjmp	.+4      	; 0x2c90 <memcpy+0xa>
+    2c8c:	01 90       	ld	r0, Z+
+    2c8e:	0d 92       	st	X+, r0
+    2c90:	41 50       	subi	r20, 0x01	; 1
+    2c92:	50 40       	sbci	r21, 0x00	; 0
+    2c94:	d8 f7       	brcc	.-10     	; 0x2c8c <memcpy+0x6>
+    2c96:	08 95       	ret
 
-00002c82 <_exit>:
-    2c82:	f8 94       	cli
+00002c98 <_exit>:
+    2c98:	f8 94       	cli
 
-00002c84 <__stop_program>:
-    2c84:	ff cf       	rjmp	.-2      	; 0x2c84 <__stop_program>
+00002c9a <__stop_program>:
+    2c9a:	ff cf       	rjmp	.-2      	; 0x2c9a <__stop_program>
diff --git a/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.map b/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.map
index 79000bec..ee7f6ee3 100644
--- a/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.map	
+++ b/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.map	
@@ -364,7 +364,7 @@ Discarded input sections
  .debug_macro   0x00000000       0x16 src/main.o
  .debug_macro   0x00000000       0x1c src/main.o
  .debug_macro   0x00000000       0x7b src/main.o
- .debug_macro   0x00000000       0x58 src/main.o
+ .debug_macro   0x00000000       0x52 src/main.o
  .group         0x00000000        0x8 src/tiny_adc.o
  .group         0x00000000        0x8 src/tiny_adc.o
  .group         0x00000000        0x8 src/tiny_adc.o
@@ -474,7 +474,7 @@ Discarded input sections
  .debug_macro   0x00000000       0x16 src/tiny_adc.o
  .debug_macro   0x00000000       0x1c src/tiny_adc.o
  .debug_macro   0x00000000       0x7b src/tiny_adc.o
- .debug_macro   0x00000000       0x58 src/tiny_adc.o
+ .debug_macro   0x00000000       0x52 src/tiny_adc.o
  .group         0x00000000        0x8 src/tiny_dac.o
  .group         0x00000000        0x8 src/tiny_dac.o
  .group         0x00000000        0x8 src/tiny_dac.o
@@ -690,7 +690,7 @@ Discarded input sections
  .debug_macro   0x00000000       0x16 src/tiny_dma.o
  .debug_macro   0x00000000       0x1c src/tiny_dma.o
  .debug_macro   0x00000000       0x7b src/tiny_dma.o
- .debug_macro   0x00000000       0x58 src/tiny_dma.o
+ .debug_macro   0x00000000       0x52 src/tiny_dma.o
  .group         0x00000000        0x8 src/tiny_timer.o
  .group         0x00000000        0x8 src/tiny_timer.o
  .group         0x00000000        0x8 src/tiny_timer.o
@@ -799,7 +799,7 @@ Discarded input sections
  .debug_macro   0x00000000       0x58 src/tiny_timer.o
  .debug_macro   0x00000000       0x10 src/tiny_timer.o
  .debug_macro   0x00000000       0xf2 src/tiny_timer.o
- .debug_macro   0x00000000       0x58 src/tiny_timer.o
+ .debug_macro   0x00000000       0x52 src/tiny_timer.o
  .group         0x00000000        0x8 src/tiny_uart.o
  .group         0x00000000        0x8 src/tiny_uart.o
  .group         0x00000000        0x8 src/tiny_uart.o
@@ -908,7 +908,7 @@ Discarded input sections
  .debug_macro   0x00000000       0x58 src/tiny_uart.o
  .debug_macro   0x00000000       0x10 src/tiny_uart.o
  .debug_macro   0x00000000       0xf2 src/tiny_uart.o
- .debug_macro   0x00000000       0x58 src/tiny_uart.o
+ .debug_macro   0x00000000       0x52 src/tiny_uart.o
  .group         0x00000000        0x8 src/ASF/common/services/usb/class/vendor/device/example/atxmega256a3bu_xmega_a3bu_xplained/ui.o
  .group         0x00000000        0x8 src/ASF/common/services/usb/class/vendor/device/example/atxmega256a3bu_xmega_a3bu_xplained/ui.o
  .group         0x00000000        0x8 src/ASF/common/services/usb/class/vendor/device/example/atxmega256a3bu_xmega_a3bu_xplained/ui.o
@@ -1443,7 +1443,7 @@ Discarded input sections
  .debug_macro   0x00000000       0x16 src/ASF/common/services/usb/udc/udc.o
  .debug_macro   0x00000000       0x1c src/ASF/common/services/usb/udc/udc.o
  .debug_macro   0x00000000       0x7b src/ASF/common/services/usb/udc/udc.o
- .debug_macro   0x00000000       0x58 src/ASF/common/services/usb/udc/udc.o
+ .debug_macro   0x00000000       0x52 src/ASF/common/services/usb/udc/udc.o
  .debug_macro   0x00000000       0x58 src/ASF/common/services/usb/udc/udc.o
  .debug_macro   0x00000000       0x10 src/ASF/common/services/usb/udc/udc.o
  .debug_macro   0x00000000       0xf2 src/ASF/common/services/usb/udc/udc.o
@@ -1926,7 +1926,7 @@ END GROUP
 .rela.plt
  *(.rela.plt)
 
-.text           0x00000000     0x2c86
+.text           0x00000000     0x2c9c
  *(.vectors)
  .vectors       0x00000000      0x1fc C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/XMEGAA_DFP/1.0.39/gcc/dev/atxmega32a4u/avrxmega2/crtatxmega32a4u.o
                 0x00000000                __vector_default
@@ -2154,234 +2154,234 @@ END GROUP
                 0x00000404        0x4 src/main.o
                 0x00000404                main_setup_in_received
  .text.tiny_adc_ch0setup
-                0x00000408       0x1e src/tiny_adc.o
+                0x00000408       0x2a src/tiny_adc.o
                 0x00000408                tiny_adc_ch0setup
  .text.tiny_adc_ch1setup
-                0x00000426       0x14 src/tiny_adc.o
-                0x00000426                tiny_adc_ch1setup
+                0x00000432       0x14 src/tiny_adc.o
+                0x00000432                tiny_adc_ch1setup
  .text.tiny_adc_pid_setup
-                0x0000043a       0x14 src/tiny_adc.o
-                0x0000043a                tiny_adc_pid_setup
+                0x00000446       0x14 src/tiny_adc.o
+                0x00000446                tiny_adc_pid_setup
  .text.ReadCalibrationByte
-                0x0000044e       0x12 src/tiny_adc.o
-                0x0000044e                ReadCalibrationByte
+                0x0000045a       0x12 src/tiny_adc.o
+                0x0000045a                ReadCalibrationByte
  .text.tiny_adc_setup
-                0x00000460       0x7a src/tiny_adc.o
-                0x00000460                tiny_adc_setup
+                0x0000046c       0x7a src/tiny_adc.o
+                0x0000046c                tiny_adc_setup
  .text.tiny_dac_setup
-                0x000004da       0x48 src/tiny_dac.o
-                0x000004da                tiny_dac_setup
+                0x000004e6       0x48 src/tiny_dac.o
+                0x000004e6                tiny_dac_setup
  .text.tiny_dma_setup
-                0x00000522       0x12 src/tiny_dma.o
-                0x00000522                tiny_dma_setup
+                0x0000052e       0x12 src/tiny_dma.o
+                0x0000052e                tiny_dma_setup
  .text.tiny_dma_flush
-                0x00000534       0x20 src/tiny_dma.o
-                0x00000534                tiny_dma_flush
+                0x00000540       0x20 src/tiny_dma.o
+                0x00000540                tiny_dma_flush
  .text.tiny_dma_set_mode_0
-                0x00000554       0xe6 src/tiny_dma.o
-                0x00000554                tiny_dma_set_mode_0
+                0x00000560       0xe6 src/tiny_dma.o
+                0x00000560                tiny_dma_set_mode_0
  .text.tiny_dma_loop_mode_0
-                0x0000063a        0x2 src/tiny_dma.o
-                0x0000063a                tiny_dma_loop_mode_0
+                0x00000646        0x2 src/tiny_dma.o
+                0x00000646                tiny_dma_loop_mode_0
  .text.tiny_dma_set_mode_1
-                0x0000063c       0xf0 src/tiny_dma.o
-                0x0000063c                tiny_dma_set_mode_1
+                0x00000648       0xf0 src/tiny_dma.o
+                0x00000648                tiny_dma_set_mode_1
  .text.tiny_dma_loop_mode_1
-                0x0000072c        0x2 src/tiny_dma.o
-                0x0000072c                tiny_dma_loop_mode_1
+                0x00000738        0x2 src/tiny_dma.o
+                0x00000738                tiny_dma_loop_mode_1
  .text.tiny_dma_set_mode_2
-                0x0000072e       0xe6 src/tiny_dma.o
-                0x0000072e                tiny_dma_set_mode_2
+                0x0000073a       0xe6 src/tiny_dma.o
+                0x0000073a                tiny_dma_set_mode_2
  .text.tiny_dma_loop_mode_2
-                0x00000814        0x2 src/tiny_dma.o
-                0x00000814                tiny_dma_loop_mode_2
+                0x00000820        0x2 src/tiny_dma.o
+                0x00000820                tiny_dma_loop_mode_2
  .text.tiny_dma_set_mode_3
-                0x00000816       0xf8 src/tiny_dma.o
-                0x00000816                tiny_dma_set_mode_3
+                0x00000822       0xf8 src/tiny_dma.o
+                0x00000822                tiny_dma_set_mode_3
  .text.tiny_dma_loop_mode_3
-                0x0000090e        0x2 src/tiny_dma.o
-                0x0000090e                tiny_dma_loop_mode_3
+                0x0000091a        0x2 src/tiny_dma.o
+                0x0000091a                tiny_dma_loop_mode_3
  .text.tiny_dma_set_mode_4
-                0x00000910       0xec src/tiny_dma.o
-                0x00000910                tiny_dma_set_mode_4
+                0x0000091c       0xec src/tiny_dma.o
+                0x0000091c                tiny_dma_set_mode_4
  .text.tiny_dma_loop_mode_4
-                0x000009fc        0x2 src/tiny_dma.o
-                0x000009fc                tiny_dma_loop_mode_4
+                0x00000a08        0x2 src/tiny_dma.o
+                0x00000a08                tiny_dma_loop_mode_4
  .text.tiny_dma_set_mode_5
-                0x000009fe       0x90 src/tiny_dma.o
-                0x000009fe                tiny_dma_set_mode_5
+                0x00000a0a       0x90 src/tiny_dma.o
+                0x00000a0a                tiny_dma_set_mode_5
  .text.tiny_dma_set_mode_6
-                0x00000a8e       0xc4 src/tiny_dma.o
-                0x00000a8e                tiny_dma_set_mode_6
+                0x00000a9a       0xc4 src/tiny_dma.o
+                0x00000a9a                tiny_dma_set_mode_6
  .text.tiny_dma_loop_mode_6
-                0x00000b52        0x2 src/tiny_dma.o
-                0x00000b52                tiny_dma_loop_mode_6
+                0x00000b5e        0x2 src/tiny_dma.o
+                0x00000b5e                tiny_dma_loop_mode_6
  .text.tiny_dma_set_mode_7
-                0x00000b54       0xc4 src/tiny_dma.o
-                0x00000b54                tiny_dma_set_mode_7
+                0x00000b60       0xc4 src/tiny_dma.o
+                0x00000b60                tiny_dma_set_mode_7
  .text.tiny_dma_loop_mode_7
-                0x00000c18        0x2 src/tiny_dma.o
-                0x00000c18                tiny_dma_loop_mode_7
+                0x00000c24        0x2 src/tiny_dma.o
+                0x00000c24                tiny_dma_loop_mode_7
  .text.__vector_6
-                0x00000c1a      0x270 src/tiny_dma.o
-                0x00000c1a                __vector_6
+                0x00000c26      0x270 src/tiny_dma.o
+                0x00000c26                __vector_6
  .text.__vector_7
-                0x00000e8a       0xde src/tiny_dma.o
-                0x00000e8a                __vector_7
+                0x00000e96       0xde src/tiny_dma.o
+                0x00000e96                __vector_7
  .text.__vector_9
-                0x00000f68       0x8a src/tiny_dma.o
-                0x00000f68                __vector_9
+                0x00000f74       0x8a src/tiny_dma.o
+                0x00000f74                __vector_9
  .text.tiny_timer_setup
-                0x00000ff2       0x76 src/tiny_timer.o
-                0x00000ff2                tiny_timer_setup
+                0x00000ffe       0x76 src/tiny_timer.o
+                0x00000ffe                tiny_timer_setup
  .text.__vector_83
-                0x00001068       0xee src/tiny_timer.o
-                0x00001068                __vector_83
+                0x00001074       0xf4 src/tiny_timer.o
+                0x00001074                __vector_83
  .text.tiny_uart_setup
-                0x00001156       0x30 src/tiny_uart.o
-                0x00001156                tiny_uart_setup
+                0x00001168       0x34 src/tiny_uart.o
+                0x00001168                tiny_uart_setup
  .text.tiny_spi_setup
-                0x00001186       0x1e src/tiny_uart.o
-                0x00001186                tiny_spi_setup
+                0x0000119c       0x1e src/tiny_uart.o
+                0x0000119c                tiny_spi_setup
  .text.__vector_24
-                0x000011a4       0x16 src/tiny_uart.o
-                0x000011a4                __vector_24
+                0x000011ba       0x16 src/tiny_uart.o
+                0x000011ba                __vector_24
  .text.sysclk_init
-                0x000011ba       0xe0 src/ASF/common/services/clock/xmega/sysclk.o
-                0x000011ba                sysclk_init
+                0x000011d0       0xe0 src/ASF/common/services/clock/xmega/sysclk.o
+                0x000011d0                sysclk_init
  .text.sysclk_enable_module
-                0x0000129a       0x18 src/ASF/common/services/clock/xmega/sysclk.o
-                0x0000129a                sysclk_enable_module
+                0x000012b0       0x18 src/ASF/common/services/clock/xmega/sysclk.o
+                0x000012b0                sysclk_enable_module
  .text.sysclk_enable_usb
-                0x000012b2       0x6e src/ASF/common/services/clock/xmega/sysclk.o
-                0x000012b2                sysclk_enable_usb
+                0x000012c8       0x6e src/ASF/common/services/clock/xmega/sysclk.o
+                0x000012c8                sysclk_enable_usb
  .text.udi_vendor_getsetting
-                0x00001320        0x6 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
-                0x00001320                udi_vendor_getsetting
+                0x00001336        0x6 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
+                0x00001336                udi_vendor_getsetting
  .text.udi_vendor_enable
-                0x00001326       0x16 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
-                0x00001326                udi_vendor_enable
+                0x0000133c       0x16 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
+                0x0000133c                udi_vendor_enable
  .text.udi_vendor_disable
-                0x0000133c        0xc src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
-                0x0000133c                udi_vendor_disable
+                0x00001352        0xc src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
+                0x00001352                udi_vendor_disable
  .text.udi_vendor_setup
-                0x00001348       0x4c src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
-                0x00001348                udi_vendor_setup
+                0x0000135e       0x4c src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
+                0x0000135e                udi_vendor_setup
  .text.udi_vendor_iso_in_run
-                0x00001394       0x18 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
-                0x00001394                udi_vendor_iso_in_run
+                0x000013aa       0x18 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
+                0x000013aa                udi_vendor_iso_in_run
  .text.udi_vendor_iso_in_run2
-                0x000013ac       0x18 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
-                0x000013ac                udi_vendor_iso_in_run2
+                0x000013c2       0x18 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
+                0x000013c2                udi_vendor_iso_in_run2
  .text.udi_vendor_iso_in_run3
-                0x000013c4       0x18 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
-                0x000013c4                udi_vendor_iso_in_run3
+                0x000013da       0x18 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
+                0x000013da                udi_vendor_iso_in_run3
  .text.udc_next_desc_in_iface
-                0x000013dc       0x64 src/ASF/common/services/usb/udc/udc.o
+                0x000013f2       0x64 src/ASF/common/services/usb/udc/udc.o
  .text.udc_valid_address
-                0x00001440        0xc src/ASF/common/services/usb/udc/udc.o
+                0x00001456        0xc src/ASF/common/services/usb/udc/udc.o
  .text.udc_update_iface_desc
-                0x0000144c       0x74 src/ASF/common/services/usb/udc/udc.o
+                0x00001462       0x74 src/ASF/common/services/usb/udc/udc.o
  .text.udc_iface_disable
-                0x000014c0       0x84 src/ASF/common/services/usb/udc/udc.o
+                0x000014d6       0x84 src/ASF/common/services/usb/udc/udc.o
  .text.udc_iface_enable
-                0x00001544       0x64 src/ASF/common/services/usb/udc/udc.o
+                0x0000155a       0x64 src/ASF/common/services/usb/udc/udc.o
  .text.udc_get_interface_desc
-                0x000015a8        0xa src/ASF/common/services/usb/udc/udc.o
-                0x000015a8                udc_get_interface_desc
+                0x000015be        0xa src/ASF/common/services/usb/udc/udc.o
+                0x000015be                udc_get_interface_desc
  .text.udc_start
-                0x000015b2        0x4 src/ASF/common/services/usb/udc/udc.o
-                0x000015b2                udc_start
+                0x000015c8        0x4 src/ASF/common/services/usb/udc/udc.o
+                0x000015c8                udc_start
  .text.udc_reset
-                0x000015b6       0x4a src/ASF/common/services/usb/udc/udc.o
-                0x000015b6                udc_reset
+                0x000015cc       0x4a src/ASF/common/services/usb/udc/udc.o
+                0x000015cc                udc_reset
  .text.udc_sof_notify
-                0x00001600       0x60 src/ASF/common/services/usb/udc/udc.o
-                0x00001600                udc_sof_notify
+                0x00001616       0x60 src/ASF/common/services/usb/udc/udc.o
+                0x00001616                udc_sof_notify
  .text.udc_process_setup
-                0x00001660      0x714 src/ASF/common/services/usb/udc/udc.o
-                0x00001660                udc_process_setup
+                0x00001676      0x714 src/ASF/common/services/usb/udc/udc.o
+                0x00001676                udc_process_setup
  .text.ccp_write_io
-                0x00001d74        0xc src/ASF/xmega/drivers/cpu/ccp.o
-                0x00001d74                ccp_write_io
+                0x00001d8a        0xc src/ASF/xmega/drivers/cpu/ccp.o
+                0x00001d8a                ccp_write_io
  .text.nvm_read_byte
-                0x00001d80       0x14 src/ASF/xmega/drivers/nvm/nvm_asm.o
-                0x00001d80                nvm_read_byte
+                0x00001d96       0x14 src/ASF/xmega/drivers/nvm/nvm_asm.o
+                0x00001d96                nvm_read_byte
  .text.udd_sleep_mode
-                0x00001d94       0x52 src/ASF/xmega/drivers/usb/usb_device.o
+                0x00001daa       0x52 src/ASF/xmega/drivers/usb/usb_device.o
  .text.udd_ctrl_init
-                0x00001de6       0x4e src/ASF/xmega/drivers/usb/usb_device.o
+                0x00001dfc       0x4e src/ASF/xmega/drivers/usb/usb_device.o
  .text.udd_ctrl_stall_data
-                0x00001e34       0x1c src/ASF/xmega/drivers/usb/usb_device.o
+                0x00001e4a       0x1c src/ASF/xmega/drivers/usb/usb_device.o
  .text.udd_ctrl_send_zlp_in
-                0x00001e50       0x1c src/ASF/xmega/drivers/usb/usb_device.o
+                0x00001e66       0x1c src/ASF/xmega/drivers/usb/usb_device.o
  .text.udd_ctrl_endofrequest
-                0x00001e6c       0x10 src/ASF/xmega/drivers/usb/usb_device.o
+                0x00001e82       0x10 src/ASF/xmega/drivers/usb/usb_device.o
  .text.udd_ctrl_in_sent
-                0x00001e7c       0xd8 src/ASF/xmega/drivers/usb/usb_device.o
+                0x00001e92       0xd8 src/ASF/xmega/drivers/usb/usb_device.o
  .text.udd_ep_get_size
-                0x00001f54       0x4c src/ASF/xmega/drivers/usb/usb_device.o
+                0x00001f6a       0x4c src/ASF/xmega/drivers/usb/usb_device.o
  .text.udd_ep_get_job
-                0x00001fa0       0x36 src/ASF/xmega/drivers/usb/usb_device.o
+                0x00001fb6       0x36 src/ASF/xmega/drivers/usb/usb_device.o
  .text.udd_ctrl_interrupt_tc_setup
-                0x00001fd6       0xde src/ASF/xmega/drivers/usb/usb_device.o
+                0x00001fec       0xde src/ASF/xmega/drivers/usb/usb_device.o
  .text.udd_ep_trans_complet
-                0x000020b4      0x2b4 src/ASF/xmega/drivers/usb/usb_device.o
+                0x000020ca      0x2b4 src/ASF/xmega/drivers/usb/usb_device.o
  .text.udd_attach
-                0x00002368       0x46 src/ASF/xmega/drivers/usb/usb_device.o
-                0x00002368                udd_attach
+                0x0000237e       0x46 src/ASF/xmega/drivers/usb/usb_device.o
+                0x0000237e                udd_attach
  .text.udd_enable
-                0x000023ae      0x10a src/ASF/xmega/drivers/usb/usb_device.o
-                0x000023ae                udd_enable
+                0x000023c4      0x10a src/ASF/xmega/drivers/usb/usb_device.o
+                0x000023c4                udd_enable
  .text.udd_set_address
-                0x000024b8        0x6 src/ASF/xmega/drivers/usb/usb_device.o
-                0x000024b8                udd_set_address
+                0x000024ce        0x6 src/ASF/xmega/drivers/usb/usb_device.o
+                0x000024ce                udd_set_address
  .text.udd_getaddress
-                0x000024be        0x6 src/ASF/xmega/drivers/usb/usb_device.o
-                0x000024be                udd_getaddress
+                0x000024d4        0x6 src/ASF/xmega/drivers/usb/usb_device.o
+                0x000024d4                udd_getaddress
  .text.udd_set_setup_payload
-                0x000024c4        0xe src/ASF/xmega/drivers/usb/usb_device.o
-                0x000024c4                udd_set_setup_payload
+                0x000024da        0xe src/ASF/xmega/drivers/usb/usb_device.o
+                0x000024da                udd_set_setup_payload
  .text.udd_ep_alloc
-                0x000024d2       0xea src/ASF/xmega/drivers/usb/usb_device.o
-                0x000024d2                udd_ep_alloc
+                0x000024e8       0xea src/ASF/xmega/drivers/usb/usb_device.o
+                0x000024e8                udd_ep_alloc
  .text.udd_ep_is_halted
-                0x000025bc       0x36 src/ASF/xmega/drivers/usb/usb_device.o
-                0x000025bc                udd_ep_is_halted
+                0x000025d2       0x36 src/ASF/xmega/drivers/usb/usb_device.o
+                0x000025d2                udd_ep_is_halted
  .text.udd_ep_clear_halt
-                0x000025f2       0x6a src/ASF/xmega/drivers/usb/usb_device.o
-                0x000025f2                udd_ep_clear_halt
+                0x00002608       0x6a src/ASF/xmega/drivers/usb/usb_device.o
+                0x00002608                udd_ep_clear_halt
  .text.udd_ep_run
-                0x0000265c      0x174 src/ASF/xmega/drivers/usb/usb_device.o
-                0x0000265c                udd_ep_run
+                0x00002672      0x174 src/ASF/xmega/drivers/usb/usb_device.o
+                0x00002672                udd_ep_run
  .text.udd_ep_abort
-                0x000027d0       0x92 src/ASF/xmega/drivers/usb/usb_device.o
-                0x000027d0                udd_ep_abort
+                0x000027e6       0x92 src/ASF/xmega/drivers/usb/usb_device.o
+                0x000027e6                udd_ep_abort
  .text.udd_ep_free
-                0x00002862       0x38 src/ASF/xmega/drivers/usb/usb_device.o
-                0x00002862                udd_ep_free
+                0x00002878       0x38 src/ASF/xmega/drivers/usb/usb_device.o
+                0x00002878                udd_ep_free
  .text.udd_ep_set_halt
-                0x0000289a       0x5a src/ASF/xmega/drivers/usb/usb_device.o
-                0x0000289a                udd_ep_set_halt
+                0x000028b0       0x5a src/ASF/xmega/drivers/usb/usb_device.o
+                0x000028b0                udd_ep_set_halt
  .text.__vector_125
-                0x000028f4      0x174 src/ASF/xmega/drivers/usb/usb_device.o
-                0x000028f4                __vector_125
+                0x0000290a      0x174 src/ASF/xmega/drivers/usb/usb_device.o
+                0x0000290a                __vector_125
  .text.__vector_126
-                0x00002a68      0x1d4 src/ASF/xmega/drivers/usb/usb_device.o
-                0x00002a68                __vector_126
+                0x00002a7e      0x1d4 src/ASF/xmega/drivers/usb/usb_device.o
+                0x00002a7e                __vector_126
  .text.libgcc.div
-                0x00002c3c       0x28 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_udivmodhi4.o)
-                0x00002c3c                __udivmodhi4
- .text.libgcc   0x00002c64        0xc c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_tablejump2.o)
-                0x00002c64                __tablejump2__
+                0x00002c52       0x28 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_udivmodhi4.o)
+                0x00002c52                __udivmodhi4
+ .text.libgcc   0x00002c7a        0xc c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_tablejump2.o)
+                0x00002c7a                __tablejump2__
  .text.avr-libc
-                0x00002c70       0x12 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/../../../../avr/lib/avrxmega2\libc.a(memcpy.o)
-                0x00002c70                memcpy
-                0x00002c82                . = ALIGN (0x2)
+                0x00002c86       0x12 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/../../../../avr/lib/avrxmega2\libc.a(memcpy.o)
+                0x00002c86                memcpy
+                0x00002c98                . = ALIGN (0x2)
  *(.fini9)
- .fini9         0x00002c82        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_exit.o)
-                0x00002c82                _exit
-                0x00002c82                exit
+ .fini9         0x00002c98        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_exit.o)
+                0x00002c98                _exit
+                0x00002c98                exit
  *(.fini9)
  *(.fini8)
  *(.fini8)
@@ -2400,11 +2400,11 @@ END GROUP
  *(.fini1)
  *(.fini1)
  *(.fini0)
- .fini0         0x00002c82        0x4 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_exit.o)
+ .fini0         0x00002c98        0x4 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_exit.o)
  *(.fini0)
-                0x00002c86                _etext = .
+                0x00002c9c                _etext = .
 
-.data           0x00802000       0xb2 load address 0x00002c86
+.data           0x00802000       0xb2 load address 0x00002c9c
                 0x00802000                PROVIDE (__data_start, .)
  *(.data)
  *(.data*)
@@ -2512,8 +2512,8 @@ END GROUP
  COMMON         0x00802c46        0x6 src/ASF/common/services/sleepmgr/xmega/sleepmgr.o
                 0x00802c46                sleepmgr_locks
                 0x00802c4c                PROVIDE (__bss_end, .)
-                0x00002c86                __data_load_start = LOADADDR (.data)
-                0x00002d38                __data_load_end = (__data_load_start + SIZEOF (.data))
+                0x00002c9c                __data_load_start = LOADADDR (.data)
+                0x00002d4e                __data_load_end = (__data_load_start + SIZEOF (.data))
 
 .noinit         0x00802c4c        0x0
                 [!provide]                PROVIDE (__noinit_start, .)
@@ -2673,24 +2673,24 @@ END GROUP
  .debug_abbrev  0x0000156a       0x12 src/ASF/xmega/drivers/nvm/nvm_asm.o
  .debug_abbrev  0x0000157c      0x5d4 src/ASF/xmega/drivers/usb/usb_device.o
 
-.debug_line     0x00000000     0x8af8
+.debug_line     0x00000000     0x8b18
  *(.debug_line .debug_line.* .debug_line_end)
  .debug_line    0x00000000      0x7b8 src/tiny_dig.o
  .debug_line    0x000007b8      0x78d src/ASF/common/boards/user_board/init.o
  .debug_line    0x00000f45      0x9b4 src/main.o
- .debug_line    0x000018f9      0x942 src/tiny_adc.o
- .debug_line    0x0000223b      0x806 src/tiny_dac.o
- .debug_line    0x00002a41     0x13f5 src/tiny_dma.o
- .debug_line    0x00003e36      0x8bb src/tiny_timer.o
- .debug_line    0x000046f1      0x839 src/tiny_uart.o
- .debug_line    0x00004f2a      0x738 src/ASF/common/services/clock/xmega/sysclk.o
- .debug_line    0x00005662      0x455 src/ASF/common/services/sleepmgr/xmega/sleepmgr.o
- .debug_line    0x00005ab7      0x625 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
- .debug_line    0x000060dc      0x4f1 src/ASF/common/services/usb/class/vendor/device/udi_vendor_desc.o
- .debug_line    0x000065cd      0xea8 src/ASF/common/services/usb/udc/udc.o
- .debug_line    0x00007475       0x6e src/ASF/xmega/drivers/cpu/ccp.o
- .debug_line    0x000074e3      0x11f src/ASF/xmega/drivers/nvm/nvm_asm.o
- .debug_line    0x00007602     0x14f6 src/ASF/xmega/drivers/usb/usb_device.o
+ .debug_line    0x000018f9      0x956 src/tiny_adc.o
+ .debug_line    0x0000224f      0x806 src/tiny_dac.o
+ .debug_line    0x00002a55     0x13f5 src/tiny_dma.o
+ .debug_line    0x00003e4a      0x8c1 src/tiny_timer.o
+ .debug_line    0x0000470b      0x83f src/tiny_uart.o
+ .debug_line    0x00004f4a      0x738 src/ASF/common/services/clock/xmega/sysclk.o
+ .debug_line    0x00005682      0x455 src/ASF/common/services/sleepmgr/xmega/sleepmgr.o
+ .debug_line    0x00005ad7      0x625 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
+ .debug_line    0x000060fc      0x4f1 src/ASF/common/services/usb/class/vendor/device/udi_vendor_desc.o
+ .debug_line    0x000065ed      0xea8 src/ASF/common/services/usb/udc/udc.o
+ .debug_line    0x00007495       0x6e src/ASF/xmega/drivers/cpu/ccp.o
+ .debug_line    0x00007503      0x11f src/ASF/xmega/drivers/nvm/nvm_asm.o
+ .debug_line    0x00007622     0x14f6 src/ASF/xmega/drivers/usb/usb_device.o
 
 .debug_frame    0x00000000      0xab4
  *(.debug_frame)
@@ -2707,49 +2707,49 @@ END GROUP
  .debug_frame   0x000005c8      0x114 src/ASF/common/services/usb/udc/udc.o
  .debug_frame   0x000006dc      0x3d8 src/ASF/xmega/drivers/usb/usb_device.o
 
-.debug_str      0x00000000    0x2f65a
+.debug_str      0x00000000    0x2f654
  *(.debug_str)
- .debug_str     0x00000000    0x27641 src/tiny_dig.o
-                              0x27cb4 (size before relaxing)
- .debug_str     0x00027641       0x36 src/ASF/common/boards/user_board/init.o
+ .debug_str     0x00000000    0x2763b src/tiny_dig.o
+                              0x27cae (size before relaxing)
+ .debug_str     0x0002763b       0x36 src/ASF/common/boards/user_board/init.o
                               0x27adb (size before relaxing)
- .debug_str     0x00027677      0x9c6 src/main.o
-                              0x28621 (size before relaxing)
- .debug_str     0x0002803d      0xd0f src/tiny_adc.o
-                              0x28e8b (size before relaxing)
- .debug_str     0x00028d4c      0x1a6 src/tiny_dac.o
+ .debug_str     0x00027671      0x9c6 src/main.o
+                              0x2861b (size before relaxing)
+ .debug_str     0x00028037      0xd0f src/tiny_adc.o
+                              0x28e85 (size before relaxing)
+ .debug_str     0x00028d46      0x1a6 src/tiny_dac.o
                               0x282d8 (size before relaxing)
- .debug_str     0x00028ef2      0xcdd src/tiny_dma.o
-                              0x291b4 (size before relaxing)
- .debug_str     0x00029bcf     0x1166 src/tiny_timer.o
-                              0x29582 (size before relaxing)
- .debug_str     0x0002ad35      0x19d src/tiny_uart.o
-                              0x283bb (size before relaxing)
- .debug_str     0x0002aed2      0x41c src/ASF/common/services/clock/xmega/sysclk.o
+ .debug_str     0x00028eec      0xcdd src/tiny_dma.o
+                              0x291ae (size before relaxing)
+ .debug_str     0x00029bc9     0x1166 src/tiny_timer.o
+                              0x2957c (size before relaxing)
+ .debug_str     0x0002ad2f      0x19d src/tiny_uart.o
+                              0x283b5 (size before relaxing)
+ .debug_str     0x0002aecc      0x41c src/ASF/common/services/clock/xmega/sysclk.o
                               0x2598f (size before relaxing)
- .debug_str     0x0002b2ee       0x96 src/ASF/common/services/sleepmgr/xmega/sleepmgr.o
+ .debug_str     0x0002b2e8       0x96 src/ASF/common/services/sleepmgr/xmega/sleepmgr.o
                               0x24246 (size before relaxing)
- .debug_str     0x0002b384      0x19f src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
+ .debug_str     0x0002b37e      0x19f src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
                               0x26737 (size before relaxing)
- .debug_str     0x0002b523      0x3f6 src/ASF/common/services/usb/class/vendor/device/udi_vendor_desc.o
+ .debug_str     0x0002b51d      0x3f6 src/ASF/common/services/usb/class/vendor/device/udi_vendor_desc.o
                               0x2673a (size before relaxing)
- .debug_str     0x0002b919      0x7e5 src/ASF/common/services/usb/udc/udc.o
-                              0x29209 (size before relaxing)
- .debug_str     0x0002c0fe     0x355c src/ASF/xmega/drivers/usb/usb_device.o
+ .debug_str     0x0002b913      0x7e5 src/ASF/common/services/usb/udc/udc.o
+                              0x29203 (size before relaxing)
+ .debug_str     0x0002c0f8     0x355c src/ASF/xmega/drivers/usb/usb_device.o
                               0x2b819 (size before relaxing)
 
-.debug_loc      0x00000000     0x235f
+.debug_loc      0x00000000     0x2378
  *(.debug_loc)
  .debug_loc     0x00000000      0x138 src/main.o
- .debug_loc     0x00000138      0x15d src/tiny_adc.o
- .debug_loc     0x00000295       0x2f src/tiny_dac.o
- .debug_loc     0x000002c4      0x24d src/tiny_dma.o
- .debug_loc     0x00000511      0x11c src/tiny_timer.o
- .debug_loc     0x0000062d       0x2f src/tiny_uart.o
- .debug_loc     0x0000065c      0x320 src/ASF/common/services/clock/xmega/sysclk.o
- .debug_loc     0x0000097c      0x344 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
- .debug_loc     0x00000cc0      0x4d3 src/ASF/common/services/usb/udc/udc.o
- .debug_loc     0x00001193     0x11cc src/ASF/xmega/drivers/usb/usb_device.o
+ .debug_loc     0x00000138      0x176 src/tiny_adc.o
+ .debug_loc     0x000002ae       0x2f src/tiny_dac.o
+ .debug_loc     0x000002dd      0x24d src/tiny_dma.o
+ .debug_loc     0x0000052a      0x11c src/tiny_timer.o
+ .debug_loc     0x00000646       0x2f src/tiny_uart.o
+ .debug_loc     0x00000675      0x320 src/ASF/common/services/clock/xmega/sysclk.o
+ .debug_loc     0x00000995      0x344 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
+ .debug_loc     0x00000cd9      0x4d3 src/ASF/common/services/usb/udc/udc.o
+ .debug_loc     0x000011ac     0x11cc src/ASF/xmega/drivers/usb/usb_device.o
 
 .debug_macinfo
  *(.debug_macinfo)
@@ -2785,7 +2785,7 @@ END GROUP
  .debug_ranges  0x00000290       0x20 src/ASF/xmega/drivers/nvm/nvm_asm.o
  .debug_ranges  0x000002b0      0x140 src/ASF/xmega/drivers/usb/usb_device.o
 
-.debug_macro    0x00000000     0xb8df
+.debug_macro    0x00000000     0xb8d9
  *(.debug_macro)
  .debug_macro   0x00000000      0x311 src/tiny_dig.o
  .debug_macro   0x00000311      0xa5a src/tiny_dig.o
@@ -2837,28 +2837,28 @@ END GROUP
  .debug_macro   0x00008a72       0x16 src/tiny_dig.o
  .debug_macro   0x00008a88       0x1c src/tiny_dig.o
  .debug_macro   0x00008aa4       0x7b src/tiny_dig.o
- .debug_macro   0x00008b1f       0x58 src/tiny_dig.o
- .debug_macro   0x00008b77      0x2fe src/ASF/common/boards/user_board/init.o
- .debug_macro   0x00008e75      0x368 src/main.o
- .debug_macro   0x000091dd       0x58 src/main.o
- .debug_macro   0x00009235       0x10 src/main.o
- .debug_macro   0x00009245       0x97 src/main.o
- .debug_macro   0x000092dc       0xf2 src/main.o
- .debug_macro   0x000093ce       0xaa src/main.o
- .debug_macro   0x00009478       0xef src/main.o
- .debug_macro   0x00009567      0x34e src/tiny_adc.o
- .debug_macro   0x000098b5       0x16 src/tiny_adc.o
- .debug_macro   0x000098cb      0x33c src/tiny_dac.o
- .debug_macro   0x00009c07      0x346 src/tiny_dma.o
- .debug_macro   0x00009f4d      0x343 src/tiny_timer.o
- .debug_macro   0x0000a290      0x337 src/tiny_uart.o
- .debug_macro   0x0000a5c7      0x1e6 src/ASF/common/services/clock/xmega/sysclk.o
- .debug_macro   0x0000a7ad      0x1a3 src/ASF/common/services/sleepmgr/xmega/sleepmgr.o
- .debug_macro   0x0000a950      0x22c src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
- .debug_macro   0x0000ab7c       0x94 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
- .debug_macro   0x0000ac10      0x20c src/ASF/common/services/usb/class/vendor/device/udi_vendor_desc.o
- .debug_macro   0x0000ae1c      0x362 src/ASF/common/services/usb/udc/udc.o
- .debug_macro   0x0000b17e      0x2f7 src/ASF/xmega/drivers/usb/usb_device.o
- .debug_macro   0x0000b475      0x46a src/ASF/xmega/drivers/usb/usb_device.o
+ .debug_macro   0x00008b1f       0x52 src/tiny_dig.o
+ .debug_macro   0x00008b71      0x2fe src/ASF/common/boards/user_board/init.o
+ .debug_macro   0x00008e6f      0x368 src/main.o
+ .debug_macro   0x000091d7       0x58 src/main.o
+ .debug_macro   0x0000922f       0x10 src/main.o
+ .debug_macro   0x0000923f       0x97 src/main.o
+ .debug_macro   0x000092d6       0xf2 src/main.o
+ .debug_macro   0x000093c8       0xaa src/main.o
+ .debug_macro   0x00009472       0xef src/main.o
+ .debug_macro   0x00009561      0x34e src/tiny_adc.o
+ .debug_macro   0x000098af       0x16 src/tiny_adc.o
+ .debug_macro   0x000098c5      0x33c src/tiny_dac.o
+ .debug_macro   0x00009c01      0x346 src/tiny_dma.o
+ .debug_macro   0x00009f47      0x343 src/tiny_timer.o
+ .debug_macro   0x0000a28a      0x337 src/tiny_uart.o
+ .debug_macro   0x0000a5c1      0x1e6 src/ASF/common/services/clock/xmega/sysclk.o
+ .debug_macro   0x0000a7a7      0x1a3 src/ASF/common/services/sleepmgr/xmega/sleepmgr.o
+ .debug_macro   0x0000a94a      0x22c src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
+ .debug_macro   0x0000ab76       0x94 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
+ .debug_macro   0x0000ac0a      0x20c src/ASF/common/services/usb/class/vendor/device/udi_vendor_desc.o
+ .debug_macro   0x0000ae16      0x362 src/ASF/common/services/usb/udc/udc.o
+ .debug_macro   0x0000b178      0x2f7 src/ASF/xmega/drivers/usb/usb_device.o
+ .debug_macro   0x0000b46f      0x46a src/ASF/xmega/drivers/usb/usb_device.o
 OUTPUT(USB_BULK_TEST.elf elf32-avr)
 LOAD linker stubs
diff --git a/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.srec b/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.srec
index b8f1c2ed..ed4fe475 100644
--- a/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.srec	
+++ b/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.srec	
@@ -1,11 +1,11 @@
 S01500005553425F42554C4B5F544553542E73726563F9
 S113000034C100004EC100004CC100004AC10000D0
-S113001048C1000046C1000000C6000036C7000009
-S113002040C10000A1C700003CC100003AC100006B
+S113001048C1000046C1000006C600003CC70000FD
+S113002040C10000A7C700003CC100003AC1000065
 S113003038C1000036C1000034C1000032C10000E4
 S113004030C100002EC100002CC100002AC10000F4
 S113005028C1000026C1000024C1000022C1000004
-S11300600C94D2081EC100001CC100001AC100007B
+S11300600C94DD081EC100001CC100001AC1000070
 S113007018C1000016C1000014C1000012C1000024
 S113008010C100000EC100000CC100000AC1000034
 S113009008C1000006C1000004C1000002C1000044
@@ -19,7 +19,7 @@ S1130100D0C00000CEC00000CCC00000CAC00000B7
 S1130110C8C00000C6C00000C4C00000C2C00000C7
 S1130120C0C00000BEC00000BCC00000BAC00000D7
 S1130130B8C00000B6C00000B4C00000B2C00000E7
-S1130140B0C00000AEC00000ACC000008DC700000D
+S1130140B0C00000AEC00000ACC0000093C7000007
 S1130150A8C00000A6C00000A4C00000A2C0000007
 S1130160A0C000009EC000009CC000009AC0000017
 S113017098C0000096C0000094C0000092C0000027
@@ -30,698 +30,699 @@ S11301B078C0000076C0000074C0000072C0000067
 S11301C070C000006EC000006CC000006AC0000077
 S11301D068C0000066C0000064C0000062C0000087
 S11301E060C000005EC000005CC000005AC0000097
-S11301F058C000000C947A140C943415CE01D0012C
-S1130200D201D401D601DB01D801DA012B06520652
-S11302107906A006C7063707EE061307590B5B0BD2
-S1130220990BD80BE10BE60B3B0C400C870B8A0BAC
-S11302308D0B8F0B910B930B950B970BC50BC80B69
-S1130240CB0BCE0BD00BD20BD40BD60BF20BFD0B7E
-S1130250080C170C1A0C1C0C260C300CB80FBB0F16
-S1130260BE0FC10FC40FC70FCA0F11241FBECFEF9B
-S1130270CDBFDFE2DEBF10E2A0E0B0E2E6E8FCE2E0
+S11301F058C000000C9485140C943F15CE01D00116
+S1130200D201D401D601DB01D801DA013106580646
+S11302107F06A606CD063D07F4061907640B660B98
+S1130220A40BE30BEC0BF10B460C4B0C920B950B54
+S1130230980B9A0B9C0B9E0BA00BA20BD00BD30B11
+S1130240D60BD90BDB0BDD0BDF0BE10BFD0B080C25
+S1130250130C220C250C270C310C3B0CC30FC60FBE
+S1130260C90FCC0FCF0FD20FD50F11241FBECFEF64
+S1130270CDBFDFE2DEBF10E2A0E0B0E2ECE9FCE2D9
 S113028002C005900D92A23BB107D9F72CE2A2EB74
 S1130290B0E201C01D92AC34B207E1F741D00C9436
-S11302A04116AECEE0E8F6E08FE0808385E08483FB
+S11302A04C16AECEE0E8F6E08FE0808385E08483F0
 S11302B0089508954091B3202EEE32E0429FC0018C
 S11302C0439F900D11244AE551E06AEF70E086598E
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diff --git a/AVR Code/USB_BULK_TEST/Debug/src/ASF/common/services/usb/udc/udc.o b/AVR Code/USB_BULK_TEST/Debug/src/ASF/common/services/usb/udc/udc.o
index 398700f7bf136d139ce9931edfbb3a6b59788d76..468ae8352c19934d861d7adf82bb60fa4a5e54f7 100644
GIT binary patch
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diff --git a/AVR Code/USB_BULK_TEST/Debug/src/main.o b/AVR Code/USB_BULK_TEST/Debug/src/main.o
index 9a68f2af93c2b85a0351396d08297357eb4433b5..225398e2ee9f38a7c0c52f61ba0d124ab35717be 100644
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diff --git a/AVR Code/USB_BULK_TEST/Debug/src/tiny_adc.o b/AVR Code/USB_BULK_TEST/Debug/src/tiny_adc.o
index 5e6aa49b3c39d6577ffe171610bc678a4c3c4c0b..f734bc3b0032b49583af378f6bf7095dd09161bb 100644
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diff --git a/AVR Code/USB_BULK_TEST/Debug/src/tiny_dig.o b/AVR Code/USB_BULK_TEST/Debug/src/tiny_dig.o
index 2cc319b9ee7d3efe1e2290276950805c64a1f5a4..85aa6ed8fb41d584f879f7f706d4735ec8d0c575 100644
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diff --git a/AVR Code/USB_BULK_TEST/Debug/src/tiny_dma.o b/AVR Code/USB_BULK_TEST/Debug/src/tiny_dma.o
index 2b0d8381ef5f5ee223bc28720d6f6f2f7587eacb..6b6123715abb26d09fa7452d7d05d16f888d9e46 100644
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diff --git a/AVR Code/USB_BULK_TEST/Debug/src/tiny_timer.o b/AVR Code/USB_BULK_TEST/Debug/src/tiny_timer.o
index e2d55ab7bdce6afbc7d3e726e0c54c4c7de464e0..6f4a0d44ca589e4868a3fce50e2ee610e8792330 100644
GIT binary patch
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diff --git a/AVR Code/USB_BULK_TEST/Debug/src/tiny_uart.o b/AVR Code/USB_BULK_TEST/Debug/src/tiny_uart.o
index 39397554c31f6a4d2d03835f3eedb297ffdc820b..a62a3a62aa3441574f2e4c20cf9d78ceeee332a1 100644
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diff --git a/AVR Code/USB_BULK_TEST/Release/USB_BULK_TEST.elf b/AVR Code/USB_BULK_TEST/Release/USB_BULK_TEST.elf
index 072d93d0e8df848b70bcfc0220023c63cd6c9a0f..9e1057ca6c7da769de24907ee9d8394aace420c0 100644
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diff --git a/AVR Code/USB_BULK_TEST/Release/USB_BULK_TEST.hex b/AVR Code/USB_BULK_TEST/Release/USB_BULK_TEST.hex
index 4d43108c..c114372b 100644
--- a/AVR Code/USB_BULK_TEST/Release/USB_BULK_TEST.hex	
+++ b/AVR Code/USB_BULK_TEST/Release/USB_BULK_TEST.hex	
@@ -1,623 +1,633 @@
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diff --git a/AVR Code/USB_BULK_TEST/Release/USB_BULK_TEST.lss b/AVR Code/USB_BULK_TEST/Release/USB_BULK_TEST.lss
index 491a4fb0..867b60f1 100644
--- a/AVR Code/USB_BULK_TEST/Release/USB_BULK_TEST.lss	
+++ b/AVR Code/USB_BULK_TEST/Release/USB_BULK_TEST.lss	
@@ -3,4517 +3,4563 @@ USB_BULK_TEST.elf:     file format elf32-avr
 
 Sections:
 Idx Name          Size      VMA       LMA       File off  Algn
-  0 .text         00002620  00000000  00000000  00000094  2**1
+  0 .text         000026b4  00000000  00000000  00000094  2**1
                   CONTENTS, ALLOC, LOAD, READONLY, CODE
-  1 .data         000000c0  00802000  00002620  000026b4  2**2
+  1 .data         000000c0  00802000  000026b4  00002748  2**2
                   CONTENTS, ALLOC, LOAD, DATA
-  2 .bss          00000b9c  008020c0  008020c0  00002774  2**2
+  2 .bss          00000b9c  008020c0  008020c0  00002808  2**2
                   ALLOC
-  3 .comment      00000030  00000000  00000000  00002774  2**0
+  3 .comment      00000030  00000000  00000000  00002808  2**0
                   CONTENTS, READONLY
-  4 .note.gnu.avr.deviceinfo 00000040  00000000  00000000  000027a4  2**2
+  4 .note.gnu.avr.deviceinfo 00000040  00000000  00000000  00002838  2**2
                   CONTENTS, READONLY
-  5 .debug_aranges 00000048  00000000  00000000  000027e8  2**3
+  5 .debug_aranges 00000048  00000000  00000000  00002878  2**3
                   CONTENTS, READONLY, DEBUGGING
-  6 .debug_info   00000126  00000000  00000000  00002830  2**0
+  6 .debug_info   00000126  00000000  00000000  000028c0  2**0
                   CONTENTS, READONLY, DEBUGGING
-  7 .debug_abbrev 00000026  00000000  00000000  00002956  2**0
+  7 .debug_abbrev 00000026  00000000  00000000  000029e6  2**0
                   CONTENTS, READONLY, DEBUGGING
-  8 .debug_line   0000018d  00000000  00000000  0000297c  2**0
+  8 .debug_line   0000018d  00000000  00000000  00002a0c  2**0
                   CONTENTS, READONLY, DEBUGGING
-  9 .debug_ranges 00000020  00000000  00000000  00002b10  2**3
+  9 .debug_ranges 00000020  00000000  00000000  00002ba0  2**3
                   CONTENTS, READONLY, DEBUGGING
 
 Disassembly of section .text:
 
 00000000 <__vectors>:
-       0:	1d c1       	rjmp	.+570    	; 0x23c <__ctors_end>
+       0:	25 c1       	rjmp	.+586    	; 0x24c <__ctors_end>
        2:	00 00       	nop
-       4:	37 c1       	rjmp	.+622    	; 0x274 <__bad_interrupt>
+       4:	3f c1       	rjmp	.+638    	; 0x284 <__bad_interrupt>
        6:	00 00       	nop
-       8:	35 c1       	rjmp	.+618    	; 0x274 <__bad_interrupt>
+       8:	3d c1       	rjmp	.+634    	; 0x284 <__bad_interrupt>
        a:	00 00       	nop
-       c:	33 c1       	rjmp	.+614    	; 0x274 <__bad_interrupt>
+       c:	3b c1       	rjmp	.+630    	; 0x284 <__bad_interrupt>
        e:	00 00       	nop
-      10:	31 c1       	rjmp	.+610    	; 0x274 <__bad_interrupt>
+      10:	39 c1       	rjmp	.+626    	; 0x284 <__bad_interrupt>
       12:	00 00       	nop
-      14:	2f c1       	rjmp	.+606    	; 0x274 <__bad_interrupt>
+      14:	37 c1       	rjmp	.+622    	; 0x284 <__bad_interrupt>
       16:	00 00       	nop
-      18:	e8 c5       	rjmp	.+3024   	; 0xbea <__vector_6>
+      18:	d7 c5       	rjmp	.+2990   	; 0xbc8 <__vector_6>
       1a:	00 00       	nop
-      1c:	35 c6       	rjmp	.+3178   	; 0xc88 <__vector_7>
+      1c:	33 c6       	rjmp	.+3174   	; 0xc84 <__vector_7>
       1e:	00 00       	nop
-      20:	29 c1       	rjmp	.+594    	; 0x274 <__bad_interrupt>
+      20:	78 c6       	rjmp	.+3312   	; 0xd12 <__vector_8>
       22:	00 00       	nop
-      24:	78 c6       	rjmp	.+3312   	; 0xd16 <__vector_9>
+      24:	b7 c6       	rjmp	.+3438   	; 0xd94 <__vector_9>
       26:	00 00       	nop
-      28:	25 c1       	rjmp	.+586    	; 0x274 <__bad_interrupt>
+      28:	2d c1       	rjmp	.+602    	; 0x284 <__bad_interrupt>
       2a:	00 00       	nop
-      2c:	23 c1       	rjmp	.+582    	; 0x274 <__bad_interrupt>
+      2c:	2b c1       	rjmp	.+598    	; 0x284 <__bad_interrupt>
       2e:	00 00       	nop
-      30:	21 c1       	rjmp	.+578    	; 0x274 <__bad_interrupt>
+      30:	29 c1       	rjmp	.+594    	; 0x284 <__bad_interrupt>
       32:	00 00       	nop
-      34:	1f c1       	rjmp	.+574    	; 0x274 <__bad_interrupt>
+      34:	27 c1       	rjmp	.+590    	; 0x284 <__bad_interrupt>
       36:	00 00       	nop
-      38:	1d c1       	rjmp	.+570    	; 0x274 <__bad_interrupt>
+      38:	25 c1       	rjmp	.+586    	; 0x284 <__bad_interrupt>
       3a:	00 00       	nop
-      3c:	1b c1       	rjmp	.+566    	; 0x274 <__bad_interrupt>
+      3c:	23 c1       	rjmp	.+582    	; 0x284 <__bad_interrupt>
       3e:	00 00       	nop
-      40:	19 c1       	rjmp	.+562    	; 0x274 <__bad_interrupt>
+      40:	21 c1       	rjmp	.+578    	; 0x284 <__bad_interrupt>
       42:	00 00       	nop
-      44:	17 c1       	rjmp	.+558    	; 0x274 <__bad_interrupt>
+      44:	1f c1       	rjmp	.+574    	; 0x284 <__bad_interrupt>
       46:	00 00       	nop
-      48:	15 c1       	rjmp	.+554    	; 0x274 <__bad_interrupt>
+      48:	1d c1       	rjmp	.+570    	; 0x284 <__bad_interrupt>
       4a:	00 00       	nop
-      4c:	13 c1       	rjmp	.+550    	; 0x274 <__bad_interrupt>
+      4c:	1b c1       	rjmp	.+566    	; 0x284 <__bad_interrupt>
       4e:	00 00       	nop
-      50:	11 c1       	rjmp	.+546    	; 0x274 <__bad_interrupt>
+      50:	19 c1       	rjmp	.+562    	; 0x284 <__bad_interrupt>
       52:	00 00       	nop
-      54:	0f c1       	rjmp	.+542    	; 0x274 <__bad_interrupt>
+      54:	17 c1       	rjmp	.+558    	; 0x284 <__bad_interrupt>
       56:	00 00       	nop
-      58:	0d c1       	rjmp	.+538    	; 0x274 <__bad_interrupt>
+      58:	15 c1       	rjmp	.+554    	; 0x284 <__bad_interrupt>
       5a:	00 00       	nop
-      5c:	0b c1       	rjmp	.+534    	; 0x274 <__bad_interrupt>
+      5c:	13 c1       	rjmp	.+550    	; 0x284 <__bad_interrupt>
       5e:	00 00       	nop
-      60:	5c c7       	rjmp	.+3768   	; 0xf1a <__vector_24>
+      60:	a5 c7       	rjmp	.+3914   	; 0xfac <__vector_24>
       62:	00 00       	nop
-      64:	07 c1       	rjmp	.+526    	; 0x274 <__bad_interrupt>
+      64:	0f c1       	rjmp	.+542    	; 0x284 <__bad_interrupt>
       66:	00 00       	nop
-      68:	05 c1       	rjmp	.+522    	; 0x274 <__bad_interrupt>
+      68:	0d c1       	rjmp	.+538    	; 0x284 <__bad_interrupt>
       6a:	00 00       	nop
-      6c:	03 c1       	rjmp	.+518    	; 0x274 <__bad_interrupt>
+      6c:	0b c1       	rjmp	.+534    	; 0x284 <__bad_interrupt>
       6e:	00 00       	nop
-      70:	01 c1       	rjmp	.+514    	; 0x274 <__bad_interrupt>
+      70:	09 c1       	rjmp	.+530    	; 0x284 <__bad_interrupt>
       72:	00 00       	nop
-      74:	ff c0       	rjmp	.+510    	; 0x274 <__bad_interrupt>
+      74:	07 c1       	rjmp	.+526    	; 0x284 <__bad_interrupt>
       76:	00 00       	nop
-      78:	fd c0       	rjmp	.+506    	; 0x274 <__bad_interrupt>
+      78:	05 c1       	rjmp	.+522    	; 0x284 <__bad_interrupt>
       7a:	00 00       	nop
-      7c:	fb c0       	rjmp	.+502    	; 0x274 <__bad_interrupt>
+      7c:	03 c1       	rjmp	.+518    	; 0x284 <__bad_interrupt>
       7e:	00 00       	nop
-      80:	f9 c0       	rjmp	.+498    	; 0x274 <__bad_interrupt>
+      80:	01 c1       	rjmp	.+514    	; 0x284 <__bad_interrupt>
       82:	00 00       	nop
-      84:	f7 c0       	rjmp	.+494    	; 0x274 <__bad_interrupt>
+      84:	ff c0       	rjmp	.+510    	; 0x284 <__bad_interrupt>
       86:	00 00       	nop
-      88:	f5 c0       	rjmp	.+490    	; 0x274 <__bad_interrupt>
+      88:	fd c0       	rjmp	.+506    	; 0x284 <__bad_interrupt>
       8a:	00 00       	nop
-      8c:	f3 c0       	rjmp	.+486    	; 0x274 <__bad_interrupt>
+      8c:	fb c0       	rjmp	.+502    	; 0x284 <__bad_interrupt>
       8e:	00 00       	nop
-      90:	f1 c0       	rjmp	.+482    	; 0x274 <__bad_interrupt>
+      90:	f9 c0       	rjmp	.+498    	; 0x284 <__bad_interrupt>
       92:	00 00       	nop
-      94:	ef c0       	rjmp	.+478    	; 0x274 <__bad_interrupt>
+      94:	f7 c0       	rjmp	.+494    	; 0x284 <__bad_interrupt>
       96:	00 00       	nop
-      98:	ed c0       	rjmp	.+474    	; 0x274 <__bad_interrupt>
+      98:	f5 c0       	rjmp	.+490    	; 0x284 <__bad_interrupt>
       9a:	00 00       	nop
-      9c:	eb c0       	rjmp	.+470    	; 0x274 <__bad_interrupt>
+      9c:	f3 c0       	rjmp	.+486    	; 0x284 <__bad_interrupt>
       9e:	00 00       	nop
-      a0:	e9 c0       	rjmp	.+466    	; 0x274 <__bad_interrupt>
+      a0:	f1 c0       	rjmp	.+482    	; 0x284 <__bad_interrupt>
       a2:	00 00       	nop
-      a4:	e7 c0       	rjmp	.+462    	; 0x274 <__bad_interrupt>
+      a4:	ef c0       	rjmp	.+478    	; 0x284 <__bad_interrupt>
       a6:	00 00       	nop
-      a8:	e5 c0       	rjmp	.+458    	; 0x274 <__bad_interrupt>
+      a8:	ed c0       	rjmp	.+474    	; 0x284 <__bad_interrupt>
       aa:	00 00       	nop
-      ac:	e3 c0       	rjmp	.+454    	; 0x274 <__bad_interrupt>
+      ac:	eb c0       	rjmp	.+470    	; 0x284 <__bad_interrupt>
       ae:	00 00       	nop
-      b0:	e1 c0       	rjmp	.+450    	; 0x274 <__bad_interrupt>
+      b0:	e9 c0       	rjmp	.+466    	; 0x284 <__bad_interrupt>
       b2:	00 00       	nop
-      b4:	df c0       	rjmp	.+446    	; 0x274 <__bad_interrupt>
+      b4:	e7 c0       	rjmp	.+462    	; 0x284 <__bad_interrupt>
       b6:	00 00       	nop
-      b8:	dd c0       	rjmp	.+442    	; 0x274 <__bad_interrupt>
+      b8:	e5 c0       	rjmp	.+458    	; 0x284 <__bad_interrupt>
       ba:	00 00       	nop
-      bc:	db c0       	rjmp	.+438    	; 0x274 <__bad_interrupt>
+      bc:	e3 c0       	rjmp	.+454    	; 0x284 <__bad_interrupt>
       be:	00 00       	nop
-      c0:	d9 c0       	rjmp	.+434    	; 0x274 <__bad_interrupt>
+      c0:	e1 c0       	rjmp	.+450    	; 0x284 <__bad_interrupt>
       c2:	00 00       	nop
-      c4:	d7 c0       	rjmp	.+430    	; 0x274 <__bad_interrupt>
+      c4:	df c0       	rjmp	.+446    	; 0x284 <__bad_interrupt>
       c6:	00 00       	nop
-      c8:	d5 c0       	rjmp	.+426    	; 0x274 <__bad_interrupt>
+      c8:	dd c0       	rjmp	.+442    	; 0x284 <__bad_interrupt>
       ca:	00 00       	nop
-      cc:	d3 c0       	rjmp	.+422    	; 0x274 <__bad_interrupt>
+      cc:	db c0       	rjmp	.+438    	; 0x284 <__bad_interrupt>
       ce:	00 00       	nop
-      d0:	d1 c0       	rjmp	.+418    	; 0x274 <__bad_interrupt>
+      d0:	d9 c0       	rjmp	.+434    	; 0x284 <__bad_interrupt>
       d2:	00 00       	nop
-      d4:	cf c0       	rjmp	.+414    	; 0x274 <__bad_interrupt>
+      d4:	d7 c0       	rjmp	.+430    	; 0x284 <__bad_interrupt>
       d6:	00 00       	nop
-      d8:	cd c0       	rjmp	.+410    	; 0x274 <__bad_interrupt>
+      d8:	d5 c0       	rjmp	.+426    	; 0x284 <__bad_interrupt>
       da:	00 00       	nop
-      dc:	cb c0       	rjmp	.+406    	; 0x274 <__bad_interrupt>
+      dc:	d3 c0       	rjmp	.+422    	; 0x284 <__bad_interrupt>
       de:	00 00       	nop
-      e0:	c9 c0       	rjmp	.+402    	; 0x274 <__bad_interrupt>
+      e0:	d1 c0       	rjmp	.+418    	; 0x284 <__bad_interrupt>
       e2:	00 00       	nop
-      e4:	c7 c0       	rjmp	.+398    	; 0x274 <__bad_interrupt>
+      e4:	cf c0       	rjmp	.+414    	; 0x284 <__bad_interrupt>
       e6:	00 00       	nop
-      e8:	c5 c0       	rjmp	.+394    	; 0x274 <__bad_interrupt>
+      e8:	cd c0       	rjmp	.+410    	; 0x284 <__bad_interrupt>
       ea:	00 00       	nop
-      ec:	c3 c0       	rjmp	.+390    	; 0x274 <__bad_interrupt>
+      ec:	cb c0       	rjmp	.+406    	; 0x284 <__bad_interrupt>
       ee:	00 00       	nop
-      f0:	c1 c0       	rjmp	.+386    	; 0x274 <__bad_interrupt>
+      f0:	c9 c0       	rjmp	.+402    	; 0x284 <__bad_interrupt>
       f2:	00 00       	nop
-      f4:	bf c0       	rjmp	.+382    	; 0x274 <__bad_interrupt>
+      f4:	c7 c0       	rjmp	.+398    	; 0x284 <__bad_interrupt>
       f6:	00 00       	nop
-      f8:	bd c0       	rjmp	.+378    	; 0x274 <__bad_interrupt>
+      f8:	c5 c0       	rjmp	.+394    	; 0x284 <__bad_interrupt>
       fa:	00 00       	nop
-      fc:	bb c0       	rjmp	.+374    	; 0x274 <__bad_interrupt>
+      fc:	c3 c0       	rjmp	.+390    	; 0x284 <__bad_interrupt>
       fe:	00 00       	nop
-     100:	b9 c0       	rjmp	.+370    	; 0x274 <__bad_interrupt>
+     100:	c1 c0       	rjmp	.+386    	; 0x284 <__bad_interrupt>
      102:	00 00       	nop
-     104:	b7 c0       	rjmp	.+366    	; 0x274 <__bad_interrupt>
+     104:	bf c0       	rjmp	.+382    	; 0x284 <__bad_interrupt>
      106:	00 00       	nop
-     108:	b5 c0       	rjmp	.+362    	; 0x274 <__bad_interrupt>
+     108:	bd c0       	rjmp	.+378    	; 0x284 <__bad_interrupt>
      10a:	00 00       	nop
-     10c:	b3 c0       	rjmp	.+358    	; 0x274 <__bad_interrupt>
+     10c:	bb c0       	rjmp	.+374    	; 0x284 <__bad_interrupt>
      10e:	00 00       	nop
-     110:	b1 c0       	rjmp	.+354    	; 0x274 <__bad_interrupt>
+     110:	b9 c0       	rjmp	.+370    	; 0x284 <__bad_interrupt>
      112:	00 00       	nop
-     114:	af c0       	rjmp	.+350    	; 0x274 <__bad_interrupt>
+     114:	b7 c0       	rjmp	.+366    	; 0x284 <__bad_interrupt>
      116:	00 00       	nop
-     118:	ad c0       	rjmp	.+346    	; 0x274 <__bad_interrupt>
+     118:	b5 c0       	rjmp	.+362    	; 0x284 <__bad_interrupt>
      11a:	00 00       	nop
-     11c:	ab c0       	rjmp	.+342    	; 0x274 <__bad_interrupt>
+     11c:	b3 c0       	rjmp	.+358    	; 0x284 <__bad_interrupt>
      11e:	00 00       	nop
-     120:	a9 c0       	rjmp	.+338    	; 0x274 <__bad_interrupt>
+     120:	b1 c0       	rjmp	.+354    	; 0x284 <__bad_interrupt>
      122:	00 00       	nop
-     124:	a7 c0       	rjmp	.+334    	; 0x274 <__bad_interrupt>
+     124:	af c0       	rjmp	.+350    	; 0x284 <__bad_interrupt>
      126:	00 00       	nop
-     128:	a5 c0       	rjmp	.+330    	; 0x274 <__bad_interrupt>
+     128:	ad c0       	rjmp	.+346    	; 0x284 <__bad_interrupt>
      12a:	00 00       	nop
-     12c:	a3 c0       	rjmp	.+326    	; 0x274 <__bad_interrupt>
+     12c:	ab c0       	rjmp	.+342    	; 0x284 <__bad_interrupt>
      12e:	00 00       	nop
-     130:	a1 c0       	rjmp	.+322    	; 0x274 <__bad_interrupt>
+     130:	a9 c0       	rjmp	.+338    	; 0x284 <__bad_interrupt>
      132:	00 00       	nop
-     134:	9f c0       	rjmp	.+318    	; 0x274 <__bad_interrupt>
+     134:	a7 c0       	rjmp	.+334    	; 0x284 <__bad_interrupt>
      136:	00 00       	nop
-     138:	9d c0       	rjmp	.+314    	; 0x274 <__bad_interrupt>
+     138:	a5 c0       	rjmp	.+330    	; 0x284 <__bad_interrupt>
      13a:	00 00       	nop
-     13c:	9b c0       	rjmp	.+310    	; 0x274 <__bad_interrupt>
+     13c:	a3 c0       	rjmp	.+326    	; 0x284 <__bad_interrupt>
      13e:	00 00       	nop
-     140:	99 c0       	rjmp	.+306    	; 0x274 <__bad_interrupt>
+     140:	a1 c0       	rjmp	.+322    	; 0x284 <__bad_interrupt>
      142:	00 00       	nop
-     144:	97 c0       	rjmp	.+302    	; 0x274 <__bad_interrupt>
+     144:	9f c0       	rjmp	.+318    	; 0x284 <__bad_interrupt>
      146:	00 00       	nop
-     148:	95 c0       	rjmp	.+298    	; 0x274 <__bad_interrupt>
+     148:	9d c0       	rjmp	.+314    	; 0x284 <__bad_interrupt>
      14a:	00 00       	nop
-     14c:	5d c6       	rjmp	.+3258   	; 0xe08 <__vector_83>
+     14c:	a6 c6       	rjmp	.+3404   	; 0xe9a <__vector_83>
      14e:	00 00       	nop
-     150:	91 c0       	rjmp	.+290    	; 0x274 <__bad_interrupt>
+     150:	99 c0       	rjmp	.+306    	; 0x284 <__bad_interrupt>
      152:	00 00       	nop
-     154:	8f c0       	rjmp	.+286    	; 0x274 <__bad_interrupt>
+     154:	97 c0       	rjmp	.+302    	; 0x284 <__bad_interrupt>
      156:	00 00       	nop
-     158:	8d c0       	rjmp	.+282    	; 0x274 <__bad_interrupt>
+     158:	95 c0       	rjmp	.+298    	; 0x284 <__bad_interrupt>
      15a:	00 00       	nop
-     15c:	8b c0       	rjmp	.+278    	; 0x274 <__bad_interrupt>
+     15c:	93 c0       	rjmp	.+294    	; 0x284 <__bad_interrupt>
      15e:	00 00       	nop
-     160:	89 c0       	rjmp	.+274    	; 0x274 <__bad_interrupt>
+     160:	91 c0       	rjmp	.+290    	; 0x284 <__bad_interrupt>
      162:	00 00       	nop
-     164:	87 c0       	rjmp	.+270    	; 0x274 <__bad_interrupt>
+     164:	8f c0       	rjmp	.+286    	; 0x284 <__bad_interrupt>
      166:	00 00       	nop
-     168:	85 c0       	rjmp	.+266    	; 0x274 <__bad_interrupt>
+     168:	8d c0       	rjmp	.+282    	; 0x284 <__bad_interrupt>
      16a:	00 00       	nop
-     16c:	83 c0       	rjmp	.+262    	; 0x274 <__bad_interrupt>
+     16c:	8b c0       	rjmp	.+278    	; 0x284 <__bad_interrupt>
      16e:	00 00       	nop
-     170:	81 c0       	rjmp	.+258    	; 0x274 <__bad_interrupt>
+     170:	89 c0       	rjmp	.+274    	; 0x284 <__bad_interrupt>
      172:	00 00       	nop
-     174:	7f c0       	rjmp	.+254    	; 0x274 <__bad_interrupt>
+     174:	87 c0       	rjmp	.+270    	; 0x284 <__bad_interrupt>
      176:	00 00       	nop
-     178:	7d c0       	rjmp	.+250    	; 0x274 <__bad_interrupt>
+     178:	85 c0       	rjmp	.+266    	; 0x284 <__bad_interrupt>
      17a:	00 00       	nop
-     17c:	7b c0       	rjmp	.+246    	; 0x274 <__bad_interrupt>
+     17c:	83 c0       	rjmp	.+262    	; 0x284 <__bad_interrupt>
      17e:	00 00       	nop
-     180:	79 c0       	rjmp	.+242    	; 0x274 <__bad_interrupt>
+     180:	81 c0       	rjmp	.+258    	; 0x284 <__bad_interrupt>
      182:	00 00       	nop
-     184:	77 c0       	rjmp	.+238    	; 0x274 <__bad_interrupt>
+     184:	7f c0       	rjmp	.+254    	; 0x284 <__bad_interrupt>
      186:	00 00       	nop
-     188:	75 c0       	rjmp	.+234    	; 0x274 <__bad_interrupt>
+     188:	7d c0       	rjmp	.+250    	; 0x284 <__bad_interrupt>
      18a:	00 00       	nop
-     18c:	73 c0       	rjmp	.+230    	; 0x274 <__bad_interrupt>
+     18c:	7b c0       	rjmp	.+246    	; 0x284 <__bad_interrupt>
      18e:	00 00       	nop
-     190:	71 c0       	rjmp	.+226    	; 0x274 <__bad_interrupt>
+     190:	79 c0       	rjmp	.+242    	; 0x284 <__bad_interrupt>
      192:	00 00       	nop
-     194:	6f c0       	rjmp	.+222    	; 0x274 <__bad_interrupt>
+     194:	77 c0       	rjmp	.+238    	; 0x284 <__bad_interrupt>
      196:	00 00       	nop
-     198:	6d c0       	rjmp	.+218    	; 0x274 <__bad_interrupt>
+     198:	75 c0       	rjmp	.+234    	; 0x284 <__bad_interrupt>
      19a:	00 00       	nop
-     19c:	6b c0       	rjmp	.+214    	; 0x274 <__bad_interrupt>
+     19c:	73 c0       	rjmp	.+230    	; 0x284 <__bad_interrupt>
      19e:	00 00       	nop
-     1a0:	69 c0       	rjmp	.+210    	; 0x274 <__bad_interrupt>
+     1a0:	71 c0       	rjmp	.+226    	; 0x284 <__bad_interrupt>
      1a2:	00 00       	nop
-     1a4:	67 c0       	rjmp	.+206    	; 0x274 <__bad_interrupt>
+     1a4:	6f c0       	rjmp	.+222    	; 0x284 <__bad_interrupt>
      1a6:	00 00       	nop
-     1a8:	65 c0       	rjmp	.+202    	; 0x274 <__bad_interrupt>
+     1a8:	6d c0       	rjmp	.+218    	; 0x284 <__bad_interrupt>
      1aa:	00 00       	nop
-     1ac:	63 c0       	rjmp	.+198    	; 0x274 <__bad_interrupt>
+     1ac:	6b c0       	rjmp	.+214    	; 0x284 <__bad_interrupt>
      1ae:	00 00       	nop
-     1b0:	61 c0       	rjmp	.+194    	; 0x274 <__bad_interrupt>
+     1b0:	69 c0       	rjmp	.+210    	; 0x284 <__bad_interrupt>
      1b2:	00 00       	nop
-     1b4:	5f c0       	rjmp	.+190    	; 0x274 <__bad_interrupt>
+     1b4:	67 c0       	rjmp	.+206    	; 0x284 <__bad_interrupt>
      1b6:	00 00       	nop
-     1b8:	5d c0       	rjmp	.+186    	; 0x274 <__bad_interrupt>
+     1b8:	65 c0       	rjmp	.+202    	; 0x284 <__bad_interrupt>
      1ba:	00 00       	nop
-     1bc:	5b c0       	rjmp	.+182    	; 0x274 <__bad_interrupt>
+     1bc:	63 c0       	rjmp	.+198    	; 0x284 <__bad_interrupt>
      1be:	00 00       	nop
-     1c0:	59 c0       	rjmp	.+178    	; 0x274 <__bad_interrupt>
+     1c0:	61 c0       	rjmp	.+194    	; 0x284 <__bad_interrupt>
      1c2:	00 00       	nop
-     1c4:	57 c0       	rjmp	.+174    	; 0x274 <__bad_interrupt>
+     1c4:	5f c0       	rjmp	.+190    	; 0x284 <__bad_interrupt>
      1c6:	00 00       	nop
-     1c8:	55 c0       	rjmp	.+170    	; 0x274 <__bad_interrupt>
+     1c8:	5d c0       	rjmp	.+186    	; 0x284 <__bad_interrupt>
      1ca:	00 00       	nop
-     1cc:	53 c0       	rjmp	.+166    	; 0x274 <__bad_interrupt>
+     1cc:	5b c0       	rjmp	.+182    	; 0x284 <__bad_interrupt>
      1ce:	00 00       	nop
-     1d0:	51 c0       	rjmp	.+162    	; 0x274 <__bad_interrupt>
+     1d0:	59 c0       	rjmp	.+178    	; 0x284 <__bad_interrupt>
      1d2:	00 00       	nop
-     1d4:	4f c0       	rjmp	.+158    	; 0x274 <__bad_interrupt>
+     1d4:	57 c0       	rjmp	.+174    	; 0x284 <__bad_interrupt>
      1d6:	00 00       	nop
-     1d8:	4d c0       	rjmp	.+154    	; 0x274 <__bad_interrupt>
+     1d8:	55 c0       	rjmp	.+170    	; 0x284 <__bad_interrupt>
      1da:	00 00       	nop
-     1dc:	4b c0       	rjmp	.+150    	; 0x274 <__bad_interrupt>
+     1dc:	53 c0       	rjmp	.+166    	; 0x284 <__bad_interrupt>
      1de:	00 00       	nop
-     1e0:	49 c0       	rjmp	.+146    	; 0x274 <__bad_interrupt>
+     1e0:	51 c0       	rjmp	.+162    	; 0x284 <__bad_interrupt>
      1e2:	00 00       	nop
-     1e4:	47 c0       	rjmp	.+142    	; 0x274 <__bad_interrupt>
+     1e4:	4f c0       	rjmp	.+158    	; 0x284 <__bad_interrupt>
      1e6:	00 00       	nop
-     1e8:	45 c0       	rjmp	.+138    	; 0x274 <__bad_interrupt>
+     1e8:	4d c0       	rjmp	.+154    	; 0x284 <__bad_interrupt>
      1ea:	00 00       	nop
-     1ec:	43 c0       	rjmp	.+134    	; 0x274 <__bad_interrupt>
+     1ec:	4b c0       	rjmp	.+150    	; 0x284 <__bad_interrupt>
      1ee:	00 00       	nop
-     1f0:	41 c0       	rjmp	.+130    	; 0x274 <__bad_interrupt>
+     1f0:	49 c0       	rjmp	.+146    	; 0x284 <__bad_interrupt>
      1f2:	00 00       	nop
-     1f4:	0c 94 63 11 	jmp	0x22c6	; 0x22c6 <__vector_125>
-     1f8:	0c 94 19 12 	jmp	0x2432	; 0x2432 <__vector_126>
-     1fc:	95 01       	movw	r18, r10
-     1fe:	97 01       	movw	r18, r14
-     200:	99 01       	movw	r18, r18
-     202:	9b 01       	movw	r18, r22
-     204:	9d 01       	movw	r18, r26
-     206:	a2 01       	movw	r20, r4
-     208:	9f 01       	movw	r18, r30
-     20a:	a1 01       	movw	r20, r2
-     20c:	cb 09       	sbc	r28, r11
-     20e:	cd 09       	sbc	r28, r13
-     210:	f4 09       	sbc	r31, r4
-     212:	27 0a       	sbc	r2, r23
-     214:	30 0a       	sbc	r3, r16
-     216:	35 0a       	sbc	r3, r21
-     218:	86 0a       	sbc	r8, r22
-     21a:	8b 0a       	sbc	r8, r27
-     21c:	49 0a       	sbc	r4, r25
-     21e:	53 0a       	sbc	r5, r19
-     220:	61 0a       	sbc	r6, r17
-     222:	63 0a       	sbc	r6, r19
-     224:	65 0a       	sbc	r6, r21
-     226:	6f 0a       	sbc	r6, r31
-     228:	79 0a       	sbc	r7, r25
-     22a:	84 0a       	sbc	r8, r20
-     22c:	41 0a       	sbc	r4, r17
-     22e:	4b 0a       	sbc	r4, r27
-     230:	55 0a       	sbc	r5, r21
-     232:	63 0a       	sbc	r6, r19
-     234:	65 0a       	sbc	r6, r21
-     236:	67 0a       	sbc	r6, r23
-     238:	71 0a       	sbc	r7, r17
-     23a:	7b 0a       	sbc	r7, r27
+     1f4:	0c 94 ad 11 	jmp	0x235a	; 0x235a <__vector_125>
+     1f8:	0c 94 63 12 	jmp	0x24c6	; 0x24c6 <__vector_126>
+     1fc:	ac 01       	movw	r20, r24
+     1fe:	ae 01       	movw	r20, r28
+     200:	b0 01       	movw	r22, r0
+     202:	b2 01       	movw	r22, r4
+     204:	b4 01       	movw	r22, r8
+     206:	b9 01       	movw	r22, r18
+     208:	b6 01       	movw	r22, r12
+     20a:	b8 01       	movw	r22, r16
+     20c:	01 06       	cpc	r0, r17
+     20e:	01 06       	cpc	r0, r17
+     210:	01 06       	cpc	r0, r17
+     212:	01 06       	cpc	r0, r17
+     214:	01 06       	cpc	r0, r17
+     216:	34 06       	cpc	r3, r20
+     218:	0c 06       	cpc	r0, r28
+     21a:	0c 06       	cpc	r0, r28
+     21c:	14 0a       	sbc	r1, r20
+     21e:	16 0a       	sbc	r1, r22
+     220:	3d 0a       	sbc	r3, r29
+     222:	70 0a       	sbc	r7, r16
+     224:	79 0a       	sbc	r7, r25
+     226:	7e 0a       	sbc	r7, r30
+     228:	d0 0a       	sbc	r13, r16
+     22a:	d5 0a       	sbc	r13, r21
+     22c:	92 0a       	sbc	r9, r18
+     22e:	9d 0a       	sbc	r9, r29
+     230:	ab 0a       	sbc	r10, r27
+     232:	ad 0a       	sbc	r10, r29
+     234:	af 0a       	sbc	r10, r31
+     236:	b9 0a       	sbc	r11, r25
+     238:	c3 0a       	sbc	r12, r19
+     23a:	ce 0a       	sbc	r12, r30
+     23c:	8a 0a       	sbc	r8, r26
+     23e:	95 0a       	sbc	r9, r21
+     240:	9f 0a       	sbc	r9, r31
+     242:	ad 0a       	sbc	r10, r29
+     244:	af 0a       	sbc	r10, r31
+     246:	b1 0a       	sbc	r11, r17
+     248:	bb 0a       	sbc	r11, r27
+     24a:	c5 0a       	sbc	r12, r21
 
-0000023c <__ctors_end>:
-     23c:	11 24       	eor	r1, r1
-     23e:	1f be       	out	0x3f, r1	; 63
-     240:	cf ef       	ldi	r28, 0xFF	; 255
-     242:	cd bf       	out	0x3d, r28	; 61
-     244:	df e2       	ldi	r29, 0x2F	; 47
-     246:	de bf       	out	0x3e, r29	; 62
+0000024c <__ctors_end>:
+     24c:	11 24       	eor	r1, r1
+     24e:	1f be       	out	0x3f, r1	; 63
+     250:	cf ef       	ldi	r28, 0xFF	; 255
+     252:	cd bf       	out	0x3d, r28	; 61
+     254:	df e2       	ldi	r29, 0x2F	; 47
+     256:	de bf       	out	0x3e, r29	; 62
 
-00000248 <__do_copy_data>:
-     248:	10 e2       	ldi	r17, 0x20	; 32
-     24a:	a0 e0       	ldi	r26, 0x00	; 0
-     24c:	b0 e2       	ldi	r27, 0x20	; 32
-     24e:	e0 e2       	ldi	r30, 0x20	; 32
-     250:	f6 e2       	ldi	r31, 0x26	; 38
-     252:	02 c0       	rjmp	.+4      	; 0x258 <__do_copy_data+0x10>
-     254:	05 90       	lpm	r0, Z+
-     256:	0d 92       	st	X+, r0
-     258:	a0 3c       	cpi	r26, 0xC0	; 192
-     25a:	b1 07       	cpc	r27, r17
-     25c:	d9 f7       	brne	.-10     	; 0x254 <__do_copy_data+0xc>
+00000258 <__do_copy_data>:
+     258:	10 e2       	ldi	r17, 0x20	; 32
+     25a:	a0 e0       	ldi	r26, 0x00	; 0
+     25c:	b0 e2       	ldi	r27, 0x20	; 32
+     25e:	e4 eb       	ldi	r30, 0xB4	; 180
+     260:	f6 e2       	ldi	r31, 0x26	; 38
+     262:	02 c0       	rjmp	.+4      	; 0x268 <__do_copy_data+0x10>
+     264:	05 90       	lpm	r0, Z+
+     266:	0d 92       	st	X+, r0
+     268:	a0 3c       	cpi	r26, 0xC0	; 192
+     26a:	b1 07       	cpc	r27, r17
+     26c:	d9 f7       	brne	.-10     	; 0x264 <__do_copy_data+0xc>
 
-0000025e <__do_clear_bss>:
-     25e:	2c e2       	ldi	r18, 0x2C	; 44
-     260:	a0 ec       	ldi	r26, 0xC0	; 192
-     262:	b0 e2       	ldi	r27, 0x20	; 32
-     264:	01 c0       	rjmp	.+2      	; 0x268 <.do_clear_bss_start>
+0000026e <__do_clear_bss>:
+     26e:	2c e2       	ldi	r18, 0x2C	; 44
+     270:	a0 ec       	ldi	r26, 0xC0	; 192
+     272:	b0 e2       	ldi	r27, 0x20	; 32
+     274:	01 c0       	rjmp	.+2      	; 0x278 <.do_clear_bss_start>
 
-00000266 <.do_clear_bss_loop>:
-     266:	1d 92       	st	X+, r1
+00000276 <.do_clear_bss_loop>:
+     276:	1d 92       	st	X+, r1
 
-00000268 <.do_clear_bss_start>:
-     268:	ac 35       	cpi	r26, 0x5C	; 92
-     26a:	b2 07       	cpc	r27, r18
-     26c:	e1 f7       	brne	.-8      	; 0x266 <.do_clear_bss_loop>
-     26e:	3b d0       	rcall	.+118    	; 0x2e6 <main>
-     270:	0c 94 0e 13 	jmp	0x261c	; 0x261c <_exit>
+00000278 <.do_clear_bss_start>:
+     278:	ac 35       	cpi	r26, 0x5C	; 92
+     27a:	b2 07       	cpc	r27, r18
+     27c:	e1 f7       	brne	.-8      	; 0x276 <.do_clear_bss_loop>
+     27e:	3b d0       	rcall	.+118    	; 0x2f6 <main>
+     280:	0c 94 58 13 	jmp	0x26b0	; 0x26b0 <_exit>
 
-00000274 <__bad_interrupt>:
-     274:	c5 ce       	rjmp	.-630    	; 0x0 <__vectors>
+00000284 <__bad_interrupt>:
+     284:	bd ce       	rjmp	.-646    	; 0x0 <__vectors>
 
-00000276 <tiny_dig_setup>:
-     276:	e0 e8       	ldi	r30, 0x80	; 128
-     278:	f6 e0       	ldi	r31, 0x06	; 6
-     27a:	8f e0       	ldi	r24, 0x0F	; 15
-     27c:	80 83       	st	Z, r24
-     27e:	85 e0       	ldi	r24, 0x05	; 5
-     280:	84 83       	std	Z+4, r24	; 0x04
-     282:	08 95       	ret
+00000286 <tiny_dig_setup>:
+     286:	e0 e8       	ldi	r30, 0x80	; 128
+     288:	f6 e0       	ldi	r31, 0x06	; 6
+     28a:	8f e0       	ldi	r24, 0x0F	; 15
+     28c:	80 83       	st	Z, r24
+     28e:	85 e0       	ldi	r24, 0x05	; 5
+     290:	84 83       	std	Z+4, r24	; 0x04
+     292:	08 95       	ret
 
-00000284 <board_init>:
-     284:	08 95       	ret
+00000294 <board_init>:
+     294:	08 95       	ret
 
-00000286 <iso_callback>:
-     286:	40 91 c1 20 	lds	r20, 0x20C1	; 0x8020c1 <usb_state>
-     28a:	2e ee       	ldi	r18, 0xEE	; 238
-     28c:	32 e0       	ldi	r19, 0x02	; 2
-     28e:	42 9f       	mul	r20, r18
-     290:	c0 01       	movw	r24, r0
-     292:	43 9f       	mul	r20, r19
-     294:	90 0d       	add	r25, r0
-     296:	11 24       	eor	r1, r1
-     298:	43 e4       	ldi	r20, 0x43	; 67
-     29a:	51 e0       	ldi	r21, 0x01	; 1
-     29c:	6a ef       	ldi	r22, 0xFA	; 250
-     29e:	70 e0       	ldi	r23, 0x00	; 0
-     2a0:	86 58       	subi	r24, 0x86	; 134
-     2a2:	99 4d       	sbci	r25, 0xD9	; 217
-     2a4:	0f c7       	rjmp	.+3614   	; 0x10c4 <udi_vendor_iso_in_run>
+00000296 <iso_callback>:
+     296:	40 91 c1 20 	lds	r20, 0x20C1	; 0x8020c1 <usb_state>
+     29a:	2e ee       	ldi	r18, 0xEE	; 238
+     29c:	32 e0       	ldi	r19, 0x02	; 2
+     29e:	42 9f       	mul	r20, r18
+     2a0:	c0 01       	movw	r24, r0
+     2a2:	43 9f       	mul	r20, r19
+     2a4:	90 0d       	add	r25, r0
+     2a6:	11 24       	eor	r1, r1
+     2a8:	4b e4       	ldi	r20, 0x4B	; 75
+     2aa:	51 e0       	ldi	r21, 0x01	; 1
+     2ac:	6a ef       	ldi	r22, 0xFA	; 250
+     2ae:	70 e0       	ldi	r23, 0x00	; 0
+     2b0:	86 58       	subi	r24, 0x86	; 134
+     2b2:	99 4d       	sbci	r25, 0xD9	; 217
+     2b4:	50 c7       	rjmp	.+3744   	; 0x1156 <udi_vendor_iso_in_run>
 
-000002a6 <iso_callback2>:
-     2a6:	40 91 c1 20 	lds	r20, 0x20C1	; 0x8020c1 <usb_state>
-     2aa:	2e ee       	ldi	r18, 0xEE	; 238
-     2ac:	32 e0       	ldi	r19, 0x02	; 2
-     2ae:	42 9f       	mul	r20, r18
-     2b0:	c0 01       	movw	r24, r0
-     2b2:	43 9f       	mul	r20, r19
-     2b4:	90 0d       	add	r25, r0
-     2b6:	11 24       	eor	r1, r1
-     2b8:	43 e5       	ldi	r20, 0x53	; 83
-     2ba:	51 e0       	ldi	r21, 0x01	; 1
-     2bc:	6a ef       	ldi	r22, 0xFA	; 250
-     2be:	70 e0       	ldi	r23, 0x00	; 0
-     2c0:	8c 58       	subi	r24, 0x8C	; 140
-     2c2:	98 4d       	sbci	r25, 0xD8	; 216
-     2c4:	0b c7       	rjmp	.+3606   	; 0x10dc <udi_vendor_iso_in_run2>
+000002b6 <iso_callback2>:
+     2b6:	40 91 c1 20 	lds	r20, 0x20C1	; 0x8020c1 <usb_state>
+     2ba:	2e ee       	ldi	r18, 0xEE	; 238
+     2bc:	32 e0       	ldi	r19, 0x02	; 2
+     2be:	42 9f       	mul	r20, r18
+     2c0:	c0 01       	movw	r24, r0
+     2c2:	43 9f       	mul	r20, r19
+     2c4:	90 0d       	add	r25, r0
+     2c6:	11 24       	eor	r1, r1
+     2c8:	4b e5       	ldi	r20, 0x5B	; 91
+     2ca:	51 e0       	ldi	r21, 0x01	; 1
+     2cc:	6a ef       	ldi	r22, 0xFA	; 250
+     2ce:	70 e0       	ldi	r23, 0x00	; 0
+     2d0:	8c 58       	subi	r24, 0x8C	; 140
+     2d2:	98 4d       	sbci	r25, 0xD8	; 216
+     2d4:	4c c7       	rjmp	.+3736   	; 0x116e <udi_vendor_iso_in_run2>
 
-000002c6 <iso_callback3>:
-     2c6:	40 91 c1 20 	lds	r20, 0x20C1	; 0x8020c1 <usb_state>
-     2ca:	2e ee       	ldi	r18, 0xEE	; 238
-     2cc:	32 e0       	ldi	r19, 0x02	; 2
-     2ce:	42 9f       	mul	r20, r18
-     2d0:	c0 01       	movw	r24, r0
-     2d2:	43 9f       	mul	r20, r19
-     2d4:	90 0d       	add	r25, r0
-     2d6:	11 24       	eor	r1, r1
-     2d8:	43 e6       	ldi	r20, 0x63	; 99
-     2da:	51 e0       	ldi	r21, 0x01	; 1
-     2dc:	6a ef       	ldi	r22, 0xFA	; 250
-     2de:	70 e0       	ldi	r23, 0x00	; 0
-     2e0:	82 59       	subi	r24, 0x92	; 146
-     2e2:	97 4d       	sbci	r25, 0xD7	; 215
-     2e4:	07 c7       	rjmp	.+3598   	; 0x10f4 <udi_vendor_iso_in_run3>
+000002d6 <iso_callback3>:
+     2d6:	40 91 c1 20 	lds	r20, 0x20C1	; 0x8020c1 <usb_state>
+     2da:	2e ee       	ldi	r18, 0xEE	; 238
+     2dc:	32 e0       	ldi	r19, 0x02	; 2
+     2de:	42 9f       	mul	r20, r18
+     2e0:	c0 01       	movw	r24, r0
+     2e2:	43 9f       	mul	r20, r19
+     2e4:	90 0d       	add	r25, r0
+     2e6:	11 24       	eor	r1, r1
+     2e8:	4b e6       	ldi	r20, 0x6B	; 107
+     2ea:	51 e0       	ldi	r21, 0x01	; 1
+     2ec:	6a ef       	ldi	r22, 0xFA	; 250
+     2ee:	70 e0       	ldi	r23, 0x00	; 0
+     2f0:	82 59       	subi	r24, 0x92	; 146
+     2f2:	97 4d       	sbci	r25, 0xD7	; 215
+     2f4:	48 c7       	rjmp	.+3728   	; 0x1186 <udi_vendor_iso_in_run3>
 
-000002e6 <main>:
-     2e6:	87 e0       	ldi	r24, 0x07	; 7
-     2e8:	80 93 a2 00 	sts	0x00A2, r24	; 0x8000a2 <__TEXT_REGION_LENGTH__+0x7000a2>
-     2ec:	78 94       	sei
-     2ee:	3c d6       	rcall	.+3192   	; 0xf68 <sysclk_init>
-     2f0:	c9 df       	rcall	.-110    	; 0x284 <board_init>
-     2f2:	db d7       	rcall	.+4022   	; 0x12aa <udc_start>
-     2f4:	b2 d0       	rcall	.+356    	; 0x45a <tiny_dac_setup>
-     2f6:	d5 d0       	rcall	.+426    	; 0x4a2 <tiny_dma_setup>
-     2f8:	60 e0       	ldi	r22, 0x00	; 0
-     2fa:	80 e0       	ldi	r24, 0x00	; 0
-     2fc:	7f d0       	rcall	.+254    	; 0x3fc <tiny_adc_setup>
-     2fe:	6b d0       	rcall	.+214    	; 0x3d6 <tiny_adc_pid_setup>
-     300:	8c e0       	ldi	r24, 0x0C	; 12
-     302:	5f d0       	rcall	.+190    	; 0x3c2 <tiny_adc_ch1setup>
-     304:	46 d5       	rcall	.+2700   	; 0xd92 <tiny_timer_setup>
-     306:	e0 d5       	rcall	.+3008   	; 0xec8 <tiny_uart_setup>
-     308:	f9 d5       	rcall	.+3058   	; 0xefc <tiny_spi_setup>
-     30a:	b5 df       	rcall	.-150    	; 0x276 <tiny_dig_setup>
-     30c:	ff cf       	rjmp	.-2      	; 0x30c <main+0x26>
+000002f6 <main>:
+     2f6:	87 e0       	ldi	r24, 0x07	; 7
+     2f8:	80 93 a2 00 	sts	0x00A2, r24	; 0x8000a2 <__TEXT_REGION_LENGTH__+0x7000a2>
+     2fc:	78 94       	sei
+     2fe:	7d d6       	rcall	.+3322   	; 0xffa <sysclk_init>
+     300:	c9 df       	rcall	.-110    	; 0x294 <board_init>
+     302:	0e 94 9e 09 	call	0x133c	; 0x133c <udc_start>
+     306:	c0 d0       	rcall	.+384    	; 0x488 <tiny_dac_setup>
+     308:	e3 d0       	rcall	.+454    	; 0x4d0 <tiny_dma_setup>
+     30a:	60 e0       	ldi	r22, 0x00	; 0
+     30c:	80 e0       	ldi	r24, 0x00	; 0
+     30e:	8d d0       	rcall	.+282    	; 0x42a <tiny_adc_setup>
+     310:	79 d0       	rcall	.+242    	; 0x404 <tiny_adc_pid_setup>
+     312:	8c e0       	ldi	r24, 0x0C	; 12
+     314:	6d d0       	rcall	.+218    	; 0x3f0 <tiny_adc_ch1setup>
+     316:	7f d5       	rcall	.+2814   	; 0xe16 <tiny_timer_setup>
+     318:	23 d6       	rcall	.+3142   	; 0xf60 <tiny_uart_setup>
+     31a:	3a d6       	rcall	.+3188   	; 0xf90 <tiny_spi_setup>
+     31c:	b4 df       	rcall	.-152    	; 0x286 <tiny_dig_setup>
+	...
+     33a:	f1 cf       	rjmp	.-30     	; 0x31e <main+0x28>
 
-0000030e <main_suspend_action>:
-     30e:	08 95       	ret
+0000033c <main_suspend_action>:
+     33c:	08 95       	ret
 
-00000310 <main_resume_action>:
-     310:	08 95       	ret
+0000033e <main_resume_action>:
+     33e:	08 95       	ret
 
-00000312 <main_sof_action>:
-     312:	e0 91 00 20 	lds	r30, 0x2000	; 0x802000 <__data_start>
-     316:	8e 2f       	mov	r24, r30
-     318:	90 e0       	ldi	r25, 0x00	; 0
-     31a:	88 30       	cpi	r24, 0x08	; 8
-     31c:	91 05       	cpc	r25, r1
-     31e:	90 f4       	brcc	.+36     	; 0x344 <main_sof_action+0x32>
-     320:	fc 01       	movw	r30, r24
-     322:	e2 50       	subi	r30, 0x02	; 2
-     324:	ff 4f       	sbci	r31, 0xFF	; 255
-     326:	0c 94 ff 12 	jmp	0x25fe	; 0x25fe <__tablejump2__>
-     32a:	47 d1       	rcall	.+654    	; 0x5ba <tiny_dma_loop_mode_0>
-     32c:	0b c0       	rjmp	.+22     	; 0x344 <main_sof_action+0x32>
-     32e:	be d1       	rcall	.+892    	; 0x6ac <tiny_dma_loop_mode_1>
-     330:	09 c0       	rjmp	.+18     	; 0x344 <main_sof_action+0x32>
-     332:	30 d2       	rcall	.+1120   	; 0x794 <tiny_dma_loop_mode_2>
-     334:	07 c0       	rjmp	.+14     	; 0x344 <main_sof_action+0x32>
-     336:	ab d2       	rcall	.+1366   	; 0x88e <tiny_dma_loop_mode_3>
-     338:	05 c0       	rjmp	.+10     	; 0x344 <main_sof_action+0x32>
-     33a:	20 d3       	rcall	.+1600   	; 0x97c <tiny_dma_loop_mode_4>
-     33c:	03 c0       	rjmp	.+6      	; 0x344 <main_sof_action+0x32>
-     33e:	b0 d3       	rcall	.+1888   	; 0xaa0 <tiny_dma_loop_mode_6>
-     340:	01 c0       	rjmp	.+2      	; 0x344 <main_sof_action+0x32>
-     342:	25 d4       	rcall	.+2122   	; 0xb8e <tiny_dma_loop_mode_7>
-     344:	90 91 c3 20 	lds	r25, 0x20C3	; 0x8020c3 <b1_state>
-     348:	81 e0       	ldi	r24, 0x01	; 1
-     34a:	91 11       	cpse	r25, r1
-     34c:	80 e0       	ldi	r24, 0x00	; 0
-     34e:	80 93 c1 20 	sts	0x20C1, r24	; 0x8020c1 <usb_state>
-     352:	08 95       	ret
+00000340 <main_sof_action>:
+     340:	e0 91 00 20 	lds	r30, 0x2000	; 0x802000 <__data_start>
+     344:	8e 2f       	mov	r24, r30
+     346:	90 e0       	ldi	r25, 0x00	; 0
+     348:	88 30       	cpi	r24, 0x08	; 8
+     34a:	91 05       	cpc	r25, r1
+     34c:	90 f4       	brcc	.+36     	; 0x372 <main_sof_action+0x32>
+     34e:	fc 01       	movw	r30, r24
+     350:	e2 50       	subi	r30, 0x02	; 2
+     352:	ff 4f       	sbci	r31, 0xFF	; 255
+     354:	0c 94 49 13 	jmp	0x2692	; 0x2692 <__tablejump2__>
+     358:	47 d1       	rcall	.+654    	; 0x5e8 <tiny_dma_loop_mode_0>
+     35a:	0b c0       	rjmp	.+22     	; 0x372 <main_sof_action+0x32>
+     35c:	be d1       	rcall	.+892    	; 0x6da <tiny_dma_loop_mode_1>
+     35e:	09 c0       	rjmp	.+18     	; 0x372 <main_sof_action+0x32>
+     360:	30 d2       	rcall	.+1120   	; 0x7c2 <tiny_dma_loop_mode_2>
+     362:	07 c0       	rjmp	.+14     	; 0x372 <main_sof_action+0x32>
+     364:	ab d2       	rcall	.+1366   	; 0x8bc <tiny_dma_loop_mode_3>
+     366:	05 c0       	rjmp	.+10     	; 0x372 <main_sof_action+0x32>
+     368:	20 d3       	rcall	.+1600   	; 0x9aa <tiny_dma_loop_mode_4>
+     36a:	03 c0       	rjmp	.+6      	; 0x372 <main_sof_action+0x32>
+     36c:	c9 d3       	rcall	.+1938   	; 0xb00 <tiny_dma_loop_mode_6>
+     36e:	01 c0       	rjmp	.+2      	; 0x372 <main_sof_action+0x32>
+     370:	2a d4       	rcall	.+2132   	; 0xbc6 <tiny_dma_loop_mode_7>
+     372:	90 91 c3 20 	lds	r25, 0x20C3	; 0x8020c3 <b1_state>
+     376:	81 e0       	ldi	r24, 0x01	; 1
+     378:	91 11       	cpse	r25, r1
+     37a:	80 e0       	ldi	r24, 0x00	; 0
+     37c:	80 93 c1 20 	sts	0x20C1, r24	; 0x8020c1 <usb_state>
+     380:	08 95       	ret
 
-00000354 <main_vendor_enable>:
-     354:	81 e0       	ldi	r24, 0x01	; 1
-     356:	80 93 c4 20 	sts	0x20C4, r24	; 0x8020c4 <main_b_vendor_enable>
-     35a:	43 e4       	ldi	r20, 0x43	; 67
-     35c:	51 e0       	ldi	r21, 0x01	; 1
-     35e:	6e ee       	ldi	r22, 0xEE	; 238
-     360:	72 e0       	ldi	r23, 0x02	; 2
-     362:	8a e7       	ldi	r24, 0x7A	; 122
-     364:	96 e2       	ldi	r25, 0x26	; 38
-     366:	ae d6       	rcall	.+3420   	; 0x10c4 <udi_vendor_iso_in_run>
-     368:	43 e5       	ldi	r20, 0x53	; 83
-     36a:	51 e0       	ldi	r21, 0x01	; 1
-     36c:	6e ee       	ldi	r22, 0xEE	; 238
-     36e:	72 e0       	ldi	r23, 0x02	; 2
-     370:	84 e7       	ldi	r24, 0x74	; 116
-     372:	97 e2       	ldi	r25, 0x27	; 39
-     374:	b3 d6       	rcall	.+3430   	; 0x10dc <udi_vendor_iso_in_run2>
-     376:	43 e6       	ldi	r20, 0x63	; 99
-     378:	51 e0       	ldi	r21, 0x01	; 1
-     37a:	6e ee       	ldi	r22, 0xEE	; 238
-     37c:	72 e0       	ldi	r23, 0x02	; 2
-     37e:	8e e6       	ldi	r24, 0x6E	; 110
-     380:	98 e2       	ldi	r25, 0x28	; 40
-     382:	b8 d6       	rcall	.+3440   	; 0x10f4 <udi_vendor_iso_in_run3>
-     384:	81 e0       	ldi	r24, 0x01	; 1
-     386:	08 95       	ret
+00000382 <main_vendor_enable>:
+     382:	81 e0       	ldi	r24, 0x01	; 1
+     384:	80 93 c4 20 	sts	0x20C4, r24	; 0x8020c4 <main_b_vendor_enable>
+     388:	4b e4       	ldi	r20, 0x4B	; 75
+     38a:	51 e0       	ldi	r21, 0x01	; 1
+     38c:	6e ee       	ldi	r22, 0xEE	; 238
+     38e:	72 e0       	ldi	r23, 0x02	; 2
+     390:	8a e7       	ldi	r24, 0x7A	; 122
+     392:	96 e2       	ldi	r25, 0x26	; 38
+     394:	e0 d6       	rcall	.+3520   	; 0x1156 <udi_vendor_iso_in_run>
+     396:	4b e5       	ldi	r20, 0x5B	; 91
+     398:	51 e0       	ldi	r21, 0x01	; 1
+     39a:	6e ee       	ldi	r22, 0xEE	; 238
+     39c:	72 e0       	ldi	r23, 0x02	; 2
+     39e:	84 e7       	ldi	r24, 0x74	; 116
+     3a0:	97 e2       	ldi	r25, 0x27	; 39
+     3a2:	e5 d6       	rcall	.+3530   	; 0x116e <udi_vendor_iso_in_run2>
+     3a4:	4b e6       	ldi	r20, 0x6B	; 107
+     3a6:	51 e0       	ldi	r21, 0x01	; 1
+     3a8:	6e ee       	ldi	r22, 0xEE	; 238
+     3aa:	72 e0       	ldi	r23, 0x02	; 2
+     3ac:	8e e6       	ldi	r24, 0x6E	; 110
+     3ae:	98 e2       	ldi	r25, 0x28	; 40
+     3b0:	ea d6       	rcall	.+3540   	; 0x1186 <udi_vendor_iso_in_run3>
+     3b2:	81 e0       	ldi	r24, 0x01	; 1
+     3b4:	08 95       	ret
 
-00000388 <main_vendor_disable>:
-     388:	10 92 c4 20 	sts	0x20C4, r1	; 0x8020c4 <main_b_vendor_enable>
-     38c:	08 95       	ret
+000003b6 <main_vendor_disable>:
+     3b6:	10 92 c4 20 	sts	0x20C4, r1	; 0x8020c4 <main_b_vendor_enable>
+     3ba:	08 95       	ret
 
-0000038e <main_setup_out_received>:
-     38e:	81 e0       	ldi	r24, 0x01	; 1
-     390:	08 95       	ret
+000003bc <main_setup_out_received>:
+     3bc:	81 e0       	ldi	r24, 0x01	; 1
+     3be:	08 95       	ret
 
-00000392 <main_setup_in_received>:
-     392:	81 e0       	ldi	r24, 0x01	; 1
-     394:	08 95       	ret
+000003c0 <main_setup_in_received>:
+     3c0:	81 e0       	ldi	r24, 0x01	; 1
+     3c2:	08 95       	ret
 
-00000396 <tiny_adc_ch0setup>:
-     396:	10 92 20 02 	sts	0x0220, r1	; 0x800220 <__TEXT_REGION_LENGTH__+0x700220>
-     39a:	98 2f       	mov	r25, r24
-     39c:	9c 71       	andi	r25, 0x1C	; 28
-     39e:	93 68       	ori	r25, 0x83	; 131
-     3a0:	90 93 20 02 	sts	0x0220, r25	; 0x800220 <__TEXT_REGION_LENGTH__+0x700220>
-     3a4:	87 ff       	sbrs	r24, 7
-     3a6:	03 c0       	rjmp	.+6      	; 0x3ae <tiny_adc_ch0setup+0x18>
-     3a8:	90 e1       	ldi	r25, 0x10	; 16
-     3aa:	82 e0       	ldi	r24, 0x02	; 2
-     3ac:	02 c0       	rjmp	.+4      	; 0x3b2 <tiny_adc_ch0setup+0x1c>
-     3ae:	90 e0       	ldi	r25, 0x00	; 0
-     3b0:	80 e0       	ldi	r24, 0x00	; 0
-     3b2:	89 2b       	or	r24, r25
-     3b4:	80 93 21 02 	sts	0x0221, r24	; 0x800221 <__TEXT_REGION_LENGTH__+0x700221>
-     3b8:	10 92 22 02 	sts	0x0222, r1	; 0x800222 <__TEXT_REGION_LENGTH__+0x700222>
-     3bc:	10 92 26 02 	sts	0x0226, r1	; 0x800226 <__TEXT_REGION_LENGTH__+0x700226>
-     3c0:	08 95       	ret
+000003c4 <tiny_adc_ch0setup>:
+     3c4:	10 92 20 02 	sts	0x0220, r1	; 0x800220 <__TEXT_REGION_LENGTH__+0x700220>
+     3c8:	98 2f       	mov	r25, r24
+     3ca:	9c 71       	andi	r25, 0x1C	; 28
+     3cc:	93 68       	ori	r25, 0x83	; 131
+     3ce:	90 93 20 02 	sts	0x0220, r25	; 0x800220 <__TEXT_REGION_LENGTH__+0x700220>
+     3d2:	87 ff       	sbrs	r24, 7
+     3d4:	03 c0       	rjmp	.+6      	; 0x3dc <tiny_adc_ch0setup+0x18>
+     3d6:	90 e1       	ldi	r25, 0x10	; 16
+     3d8:	82 e0       	ldi	r24, 0x02	; 2
+     3da:	02 c0       	rjmp	.+4      	; 0x3e0 <tiny_adc_ch0setup+0x1c>
+     3dc:	90 e0       	ldi	r25, 0x00	; 0
+     3de:	80 e0       	ldi	r24, 0x00	; 0
+     3e0:	89 2b       	or	r24, r25
+     3e2:	80 93 21 02 	sts	0x0221, r24	; 0x800221 <__TEXT_REGION_LENGTH__+0x700221>
+     3e6:	10 92 22 02 	sts	0x0222, r1	; 0x800222 <__TEXT_REGION_LENGTH__+0x700222>
+     3ea:	10 92 26 02 	sts	0x0226, r1	; 0x800226 <__TEXT_REGION_LENGTH__+0x700226>
+     3ee:	08 95       	ret
 
-000003c2 <tiny_adc_ch1setup>:
-     3c2:	e0 e0       	ldi	r30, 0x00	; 0
-     3c4:	f2 e0       	ldi	r31, 0x02	; 2
-     3c6:	10 aa       	std	Z+48, r1	; 0x30
-     3c8:	83 68       	ori	r24, 0x83	; 131
-     3ca:	80 ab       	std	Z+48, r24	; 0x30
-     3cc:	80 e1       	ldi	r24, 0x10	; 16
-     3ce:	81 ab       	std	Z+49, r24	; 0x31
-     3d0:	12 aa       	std	Z+50, r1	; 0x32
-     3d2:	16 aa       	std	Z+54, r1	; 0x36
-     3d4:	08 95       	ret
+000003f0 <tiny_adc_ch1setup>:
+     3f0:	e0 e0       	ldi	r30, 0x00	; 0
+     3f2:	f2 e0       	ldi	r31, 0x02	; 2
+     3f4:	10 aa       	std	Z+48, r1	; 0x30
+     3f6:	83 68       	ori	r24, 0x83	; 131
+     3f8:	80 ab       	std	Z+48, r24	; 0x30
+     3fa:	80 e1       	ldi	r24, 0x10	; 16
+     3fc:	81 ab       	std	Z+49, r24	; 0x31
+     3fe:	12 aa       	std	Z+50, r1	; 0x32
+     400:	16 aa       	std	Z+54, r1	; 0x36
+     402:	08 95       	ret
 
-000003d6 <tiny_adc_pid_setup>:
-     3d6:	e0 e0       	ldi	r30, 0x00	; 0
-     3d8:	f2 e0       	ldi	r31, 0x02	; 2
-     3da:	10 a6       	std	Z+40, r1	; 0x28
-     3dc:	83 e8       	ldi	r24, 0x83	; 131
-     3de:	80 a7       	std	Z+40, r24	; 0x28
-     3e0:	8f e2       	ldi	r24, 0x2F	; 47
-     3e2:	81 a7       	std	Z+41, r24	; 0x29
-     3e4:	12 a6       	std	Z+42, r1	; 0x2a
-     3e6:	16 a6       	std	Z+46, r1	; 0x2e
-     3e8:	08 95       	ret
+00000404 <tiny_adc_pid_setup>:
+     404:	e0 e0       	ldi	r30, 0x00	; 0
+     406:	f2 e0       	ldi	r31, 0x02	; 2
+     408:	10 a6       	std	Z+40, r1	; 0x28
+     40a:	83 e8       	ldi	r24, 0x83	; 131
+     40c:	80 a7       	std	Z+40, r24	; 0x28
+     40e:	8f e2       	ldi	r24, 0x2F	; 47
+     410:	81 a7       	std	Z+41, r24	; 0x29
+     412:	12 a6       	std	Z+42, r1	; 0x2a
+     414:	16 a6       	std	Z+46, r1	; 0x2e
+     416:	08 95       	ret
 
-000003ea <ReadCalibrationByte>:
-     3ea:	aa ec       	ldi	r26, 0xCA	; 202
-     3ec:	b1 e0       	ldi	r27, 0x01	; 1
-     3ee:	92 e0       	ldi	r25, 0x02	; 2
-     3f0:	9c 93       	st	X, r25
-     3f2:	e8 2f       	mov	r30, r24
-     3f4:	f0 e0       	ldi	r31, 0x00	; 0
-     3f6:	84 91       	lpm	r24, Z
-     3f8:	1c 92       	st	X, r1
-     3fa:	08 95       	ret
+00000418 <ReadCalibrationByte>:
+     418:	aa ec       	ldi	r26, 0xCA	; 202
+     41a:	b1 e0       	ldi	r27, 0x01	; 1
+     41c:	92 e0       	ldi	r25, 0x02	; 2
+     41e:	9c 93       	st	X, r25
+     420:	e8 2f       	mov	r30, r24
+     422:	f0 e0       	ldi	r31, 0x00	; 0
+     424:	84 91       	lpm	r24, Z
+     426:	1c 92       	st	X, r1
+     428:	08 95       	ret
 
-000003fc <tiny_adc_setup>:
-     3fc:	90 91 71 00 	lds	r25, 0x0071	; 0x800071 <__TEXT_REGION_LENGTH__+0x700071>
-     400:	9d 7f       	andi	r25, 0xFD	; 253
-     402:	90 93 71 00 	sts	0x0071, r25	; 0x800071 <__TEXT_REGION_LENGTH__+0x700071>
-     406:	10 92 00 02 	sts	0x0200, r1	; 0x800200 <__TEXT_REGION_LENGTH__+0x700200>
-     40a:	62 30       	cpi	r22, 0x02	; 2
-     40c:	11 f0       	breq	.+4      	; 0x412 <__FUSE_REGION_LENGTH__+0x12>
-     40e:	9c e1       	ldi	r25, 0x1C	; 28
-     410:	01 c0       	rjmp	.+2      	; 0x414 <__FUSE_REGION_LENGTH__+0x14>
-     412:	9e e1       	ldi	r25, 0x1E	; 30
-     414:	90 93 01 02 	sts	0x0201, r25	; 0x800201 <__TEXT_REGION_LENGTH__+0x700201>
-     418:	90 e4       	ldi	r25, 0x40	; 64
-     41a:	90 93 02 02 	sts	0x0202, r25	; 0x800202 <__TEXT_REGION_LENGTH__+0x700202>
-     41e:	81 11       	cpse	r24, r1
-     420:	02 c0       	rjmp	.+4      	; 0x426 <__FUSE_REGION_LENGTH__+0x26>
-     422:	80 e4       	ldi	r24, 0x40	; 64
-     424:	01 c0       	rjmp	.+2      	; 0x428 <__FUSE_REGION_LENGTH__+0x28>
-     426:	80 ec       	ldi	r24, 0xC0	; 192
-     428:	80 93 03 02 	sts	0x0203, r24	; 0x800203 <__TEXT_REGION_LENGTH__+0x700203>
-     42c:	61 30       	cpi	r22, 0x01	; 1
-     42e:	11 f0       	breq	.+4      	; 0x434 <__FUSE_REGION_LENGTH__+0x34>
-     430:	83 e0       	ldi	r24, 0x03	; 3
-     432:	01 c0       	rjmp	.+2      	; 0x436 <__FUSE_REGION_LENGTH__+0x36>
-     434:	82 e0       	ldi	r24, 0x02	; 2
-     436:	80 93 04 02 	sts	0x0204, r24	; 0x800204 <__TEXT_REGION_LENGTH__+0x700204>
-     43a:	80 e2       	ldi	r24, 0x20	; 32
-     43c:	d6 df       	rcall	.-84     	; 0x3ea <ReadCalibrationByte>
-     43e:	80 93 0c 02 	sts	0x020C, r24	; 0x80020c <__TEXT_REGION_LENGTH__+0x70020c>
-     442:	81 e2       	ldi	r24, 0x21	; 33
-     444:	d2 df       	rcall	.-92     	; 0x3ea <ReadCalibrationByte>
-     446:	80 93 0d 02 	sts	0x020D, r24	; 0x80020d <__TEXT_REGION_LENGTH__+0x70020d>
-     44a:	10 92 18 02 	sts	0x0218, r1	; 0x800218 <__TEXT_REGION_LENGTH__+0x700218>
-     44e:	10 92 19 02 	sts	0x0219, r1	; 0x800219 <__TEXT_REGION_LENGTH__+0x700219>
-     452:	81 e0       	ldi	r24, 0x01	; 1
-     454:	80 93 00 02 	sts	0x0200, r24	; 0x800200 <__TEXT_REGION_LENGTH__+0x700200>
-     458:	be cf       	rjmp	.-132    	; 0x3d6 <tiny_adc_pid_setup>
+0000042a <tiny_adc_setup>:
+     42a:	90 91 71 00 	lds	r25, 0x0071	; 0x800071 <__TEXT_REGION_LENGTH__+0x700071>
+     42e:	9d 7f       	andi	r25, 0xFD	; 253
+     430:	90 93 71 00 	sts	0x0071, r25	; 0x800071 <__TEXT_REGION_LENGTH__+0x700071>
+     434:	10 92 00 02 	sts	0x0200, r1	; 0x800200 <__TEXT_REGION_LENGTH__+0x700200>
+     438:	62 30       	cpi	r22, 0x02	; 2
+     43a:	11 f0       	breq	.+4      	; 0x440 <tiny_adc_setup+0x16>
+     43c:	9c e1       	ldi	r25, 0x1C	; 28
+     43e:	01 c0       	rjmp	.+2      	; 0x442 <tiny_adc_setup+0x18>
+     440:	9e e1       	ldi	r25, 0x1E	; 30
+     442:	90 93 01 02 	sts	0x0201, r25	; 0x800201 <__TEXT_REGION_LENGTH__+0x700201>
+     446:	90 e4       	ldi	r25, 0x40	; 64
+     448:	90 93 02 02 	sts	0x0202, r25	; 0x800202 <__TEXT_REGION_LENGTH__+0x700202>
+     44c:	81 11       	cpse	r24, r1
+     44e:	02 c0       	rjmp	.+4      	; 0x454 <tiny_adc_setup+0x2a>
+     450:	80 e4       	ldi	r24, 0x40	; 64
+     452:	01 c0       	rjmp	.+2      	; 0x456 <tiny_adc_setup+0x2c>
+     454:	80 ec       	ldi	r24, 0xC0	; 192
+     456:	80 93 03 02 	sts	0x0203, r24	; 0x800203 <__TEXT_REGION_LENGTH__+0x700203>
+     45a:	61 30       	cpi	r22, 0x01	; 1
+     45c:	11 f0       	breq	.+4      	; 0x462 <tiny_adc_setup+0x38>
+     45e:	83 e0       	ldi	r24, 0x03	; 3
+     460:	01 c0       	rjmp	.+2      	; 0x464 <tiny_adc_setup+0x3a>
+     462:	82 e0       	ldi	r24, 0x02	; 2
+     464:	80 93 04 02 	sts	0x0204, r24	; 0x800204 <__TEXT_REGION_LENGTH__+0x700204>
+     468:	80 e2       	ldi	r24, 0x20	; 32
+     46a:	d6 df       	rcall	.-84     	; 0x418 <ReadCalibrationByte>
+     46c:	80 93 0c 02 	sts	0x020C, r24	; 0x80020c <__TEXT_REGION_LENGTH__+0x70020c>
+     470:	81 e2       	ldi	r24, 0x21	; 33
+     472:	d2 df       	rcall	.-92     	; 0x418 <ReadCalibrationByte>
+     474:	80 93 0d 02 	sts	0x020D, r24	; 0x80020d <__TEXT_REGION_LENGTH__+0x70020d>
+     478:	10 92 18 02 	sts	0x0218, r1	; 0x800218 <__TEXT_REGION_LENGTH__+0x700218>
+     47c:	10 92 19 02 	sts	0x0219, r1	; 0x800219 <__TEXT_REGION_LENGTH__+0x700219>
+     480:	81 e0       	ldi	r24, 0x01	; 1
+     482:	80 93 00 02 	sts	0x0200, r24	; 0x800200 <__TEXT_REGION_LENGTH__+0x700200>
+     486:	be cf       	rjmp	.-132    	; 0x404 <tiny_adc_pid_setup>
 
-0000045a <tiny_dac_setup>:
-     45a:	cf 93       	push	r28
-     45c:	df 93       	push	r29
-     45e:	e0 e7       	ldi	r30, 0x70	; 112
-     460:	f0 e0       	ldi	r31, 0x00	; 0
-     462:	82 81       	ldd	r24, Z+2	; 0x02
-     464:	8b 7f       	andi	r24, 0xFB	; 251
-     466:	82 83       	std	Z+2, r24	; 0x02
-     468:	c0 e2       	ldi	r28, 0x20	; 32
-     46a:	d3 e0       	ldi	r29, 0x03	; 3
-     46c:	8d e0       	ldi	r24, 0x0D	; 13
-     46e:	88 83       	st	Y, r24
-     470:	80 e4       	ldi	r24, 0x40	; 64
-     472:	89 83       	std	Y+1, r24	; 0x01
-     474:	89 e0       	ldi	r24, 0x09	; 9
-     476:	8a 83       	std	Y+2, r24	; 0x02
-     478:	83 e3       	ldi	r24, 0x33	; 51
-     47a:	b7 df       	rcall	.-146    	; 0x3ea <ReadCalibrationByte>
-     47c:	88 87       	std	Y+8, r24	; 0x08
-     47e:	82 e3       	ldi	r24, 0x32	; 50
-     480:	b4 df       	rcall	.-152    	; 0x3ea <ReadCalibrationByte>
-     482:	89 87       	std	Y+9, r24	; 0x09
-     484:	87 e3       	ldi	r24, 0x37	; 55
-     486:	b1 df       	rcall	.-158    	; 0x3ea <ReadCalibrationByte>
-     488:	8a 87       	std	Y+10, r24	; 0x0a
-     48a:	86 e3       	ldi	r24, 0x36	; 54
-     48c:	ae df       	rcall	.-164    	; 0x3ea <ReadCalibrationByte>
-     48e:	8b 87       	std	Y+11, r24	; 0x0b
-     490:	e0 e2       	ldi	r30, 0x20	; 32
-     492:	f6 e0       	ldi	r31, 0x06	; 6
-     494:	80 81       	ld	r24, Z
-     496:	83 60       	ori	r24, 0x03	; 3
-     498:	80 83       	st	Z, r24
-     49a:	14 82       	std	Z+4, r1	; 0x04
-     49c:	df 91       	pop	r29
-     49e:	cf 91       	pop	r28
-     4a0:	08 95       	ret
+00000488 <tiny_dac_setup>:
+     488:	cf 93       	push	r28
+     48a:	df 93       	push	r29
+     48c:	e0 e7       	ldi	r30, 0x70	; 112
+     48e:	f0 e0       	ldi	r31, 0x00	; 0
+     490:	82 81       	ldd	r24, Z+2	; 0x02
+     492:	8b 7f       	andi	r24, 0xFB	; 251
+     494:	82 83       	std	Z+2, r24	; 0x02
+     496:	c0 e2       	ldi	r28, 0x20	; 32
+     498:	d3 e0       	ldi	r29, 0x03	; 3
+     49a:	8d e0       	ldi	r24, 0x0D	; 13
+     49c:	88 83       	st	Y, r24
+     49e:	80 e4       	ldi	r24, 0x40	; 64
+     4a0:	89 83       	std	Y+1, r24	; 0x01
+     4a2:	89 e0       	ldi	r24, 0x09	; 9
+     4a4:	8a 83       	std	Y+2, r24	; 0x02
+     4a6:	83 e3       	ldi	r24, 0x33	; 51
+     4a8:	b7 df       	rcall	.-146    	; 0x418 <ReadCalibrationByte>
+     4aa:	88 87       	std	Y+8, r24	; 0x08
+     4ac:	82 e3       	ldi	r24, 0x32	; 50
+     4ae:	b4 df       	rcall	.-152    	; 0x418 <ReadCalibrationByte>
+     4b0:	89 87       	std	Y+9, r24	; 0x09
+     4b2:	87 e3       	ldi	r24, 0x37	; 55
+     4b4:	b1 df       	rcall	.-158    	; 0x418 <ReadCalibrationByte>
+     4b6:	8a 87       	std	Y+10, r24	; 0x0a
+     4b8:	86 e3       	ldi	r24, 0x36	; 54
+     4ba:	ae df       	rcall	.-164    	; 0x418 <ReadCalibrationByte>
+     4bc:	8b 87       	std	Y+11, r24	; 0x0b
+     4be:	e0 e2       	ldi	r30, 0x20	; 32
+     4c0:	f6 e0       	ldi	r31, 0x06	; 6
+     4c2:	80 81       	ld	r24, Z
+     4c4:	83 60       	ori	r24, 0x03	; 3
+     4c6:	80 83       	st	Z, r24
+     4c8:	14 82       	std	Z+4, r1	; 0x04
+     4ca:	df 91       	pop	r29
+     4cc:	cf 91       	pop	r28
+     4ce:	08 95       	ret
 
-000004a2 <tiny_dma_setup>:
-     4a2:	e0 e7       	ldi	r30, 0x70	; 112
-     4a4:	f0 e0       	ldi	r31, 0x00	; 0
-     4a6:	80 81       	ld	r24, Z
-     4a8:	8e 7f       	andi	r24, 0xFE	; 254
-     4aa:	80 83       	st	Z, r24
-     4ac:	80 e8       	ldi	r24, 0x80	; 128
-     4ae:	80 93 00 01 	sts	0x0100, r24	; 0x800100 <__TEXT_REGION_LENGTH__+0x700100>
-     4b2:	08 95       	ret
+000004d0 <tiny_dma_setup>:
+     4d0:	e0 e7       	ldi	r30, 0x70	; 112
+     4d2:	f0 e0       	ldi	r31, 0x00	; 0
+     4d4:	80 81       	ld	r24, Z
+     4d6:	8e 7f       	andi	r24, 0xFE	; 254
+     4d8:	80 83       	st	Z, r24
+     4da:	80 e8       	ldi	r24, 0x80	; 128
+     4dc:	80 93 00 01 	sts	0x0100, r24	; 0x800100 <__TEXT_REGION_LENGTH__+0x700100>
+     4e0:	08 95       	ret
 
-000004b4 <tiny_dma_flush>:
-     4b4:	e0 e0       	ldi	r30, 0x00	; 0
-     4b6:	f1 e0       	ldi	r31, 0x01	; 1
-     4b8:	10 8a       	std	Z+16, r1	; 0x10
-     4ba:	80 e4       	ldi	r24, 0x40	; 64
-     4bc:	80 8b       	std	Z+16, r24	; 0x10
-     4be:	10 a2       	std	Z+32, r1	; 0x20
-     4c0:	80 a3       	std	Z+32, r24	; 0x20
-     4c2:	10 aa       	std	Z+48, r1	; 0x30
-     4c4:	80 ab       	std	Z+48, r24	; 0x30
-     4c6:	e0 e4       	ldi	r30, 0x40	; 64
-     4c8:	f1 e0       	ldi	r31, 0x01	; 1
-     4ca:	10 82       	st	Z, r1
-     4cc:	80 83       	st	Z, r24
-     4ce:	10 92 c3 20 	sts	0x20C3, r1	; 0x8020c3 <b1_state>
-     4d2:	08 95       	ret
+000004e2 <tiny_dma_flush>:
+     4e2:	e0 e0       	ldi	r30, 0x00	; 0
+     4e4:	f1 e0       	ldi	r31, 0x01	; 1
+     4e6:	10 8a       	std	Z+16, r1	; 0x10
+     4e8:	80 e4       	ldi	r24, 0x40	; 64
+     4ea:	80 8b       	std	Z+16, r24	; 0x10
+     4ec:	10 a2       	std	Z+32, r1	; 0x20
+     4ee:	80 a3       	std	Z+32, r24	; 0x20
+     4f0:	10 aa       	std	Z+48, r1	; 0x30
+     4f2:	80 ab       	std	Z+48, r24	; 0x30
+     4f4:	e0 e4       	ldi	r30, 0x40	; 64
+     4f6:	f1 e0       	ldi	r31, 0x01	; 1
+     4f8:	10 82       	st	Z, r1
+     4fa:	80 83       	st	Z, r24
+     4fc:	10 92 c3 20 	sts	0x20C3, r1	; 0x8020c3 <b1_state>
+     500:	08 95       	ret
 
-000004d4 <tiny_dma_set_mode_0>:
-     4d4:	10 92 00 20 	sts	0x2000, r1	; 0x802000 <__data_start>
-     4d8:	ed df       	rcall	.-38     	; 0x4b4 <tiny_dma_flush>
-     4da:	e0 e0       	ldi	r30, 0x00	; 0
-     4dc:	f1 e0       	ldi	r31, 0x01	; 1
-     4de:	16 aa       	std	Z+54, r1	; 0x36
-     4e0:	94 e2       	ldi	r25, 0x24	; 36
-     4e2:	90 ab       	std	Z+48, r25	; 0x30
-     4e4:	11 aa       	std	Z+49, r1	; 0x31
-     4e6:	49 e5       	ldi	r20, 0x59	; 89
-     4e8:	42 ab       	std	Z+50, r20	; 0x32
-     4ea:	32 e0       	ldi	r19, 0x02	; 2
-     4ec:	33 ab       	std	Z+51, r19	; 0x33
-     4ee:	60 91 02 20 	lds	r22, 0x2002	; 0x802002 <auxDacBufLen>
-     4f2:	70 91 03 20 	lds	r23, 0x2003	; 0x802003 <auxDacBufLen+0x1>
-     4f6:	64 ab       	std	Z+52, r22	; 0x34
-     4f8:	75 ab       	std	Z+53, r23	; 0x35
-     4fa:	6a e7       	ldi	r22, 0x7A	; 122
-     4fc:	74 e2       	ldi	r23, 0x24	; 36
-     4fe:	60 af       	std	Z+56, r22	; 0x38
-     500:	71 af       	std	Z+57, r23	; 0x39
-     502:	12 ae       	std	Z+58, r1	; 0x3a
-     504:	8b e3       	ldi	r24, 0x3B	; 59
-     506:	84 af       	std	Z+60, r24	; 0x3c
-     508:	83 e0       	ldi	r24, 0x03	; 3
-     50a:	80 93 3d 01 	sts	0x013D, r24	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
-     50e:	10 92 3e 01 	sts	0x013E, r1	; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e>
-     512:	20 a9       	ldd	r18, Z+48	; 0x30
-     514:	20 68       	ori	r18, 0x80	; 128
-     516:	20 ab       	std	Z+48, r18	; 0x30
-     518:	10 92 46 01 	sts	0x0146, r1	; 0x800146 <__TEXT_REGION_LENGTH__+0x700146>
-     51c:	a0 e4       	ldi	r26, 0x40	; 64
-     51e:	b1 e0       	ldi	r27, 0x01	; 1
-     520:	9c 93       	st	X, r25
-     522:	10 92 41 01 	sts	0x0141, r1	; 0x800141 <__TEXT_REGION_LENGTH__+0x700141>
-     526:	40 93 42 01 	sts	0x0142, r20	; 0x800142 <__TEXT_REGION_LENGTH__+0x700142>
-     52a:	80 93 43 01 	sts	0x0143, r24	; 0x800143 <__TEXT_REGION_LENGTH__+0x700143>
-     52e:	40 91 04 20 	lds	r20, 0x2004	; 0x802004 <dacBuf_len>
-     532:	50 91 05 20 	lds	r21, 0x2005	; 0x802005 <dacBuf_len+0x1>
-     536:	40 93 44 01 	sts	0x0144, r20	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
-     53a:	50 93 45 01 	sts	0x0145, r21	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
-     53e:	4a e6       	ldi	r20, 0x6A	; 106
-     540:	52 e2       	ldi	r21, 0x22	; 34
-     542:	40 93 48 01 	sts	0x0148, r20	; 0x800148 <__TEXT_REGION_LENGTH__+0x700148>
-     546:	50 93 49 01 	sts	0x0149, r21	; 0x800149 <__TEXT_REGION_LENGTH__+0x700149>
-     54a:	10 92 4a 01 	sts	0x014A, r1	; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a>
-     54e:	29 e3       	ldi	r18, 0x39	; 57
-     550:	20 93 4c 01 	sts	0x014C, r18	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
-     554:	80 93 4d 01 	sts	0x014D, r24	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
-     558:	10 92 4e 01 	sts	0x014E, r1	; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e>
-     55c:	2c 91       	ld	r18, X
-     55e:	20 68       	ori	r18, 0x80	; 128
-     560:	2c 93       	st	X, r18
-     562:	10 8a       	std	Z+16, r1	; 0x10
-     564:	20 e4       	ldi	r18, 0x40	; 64
-     566:	20 8b       	std	Z+16, r18	; 0x10
-     568:	24 e0       	ldi	r18, 0x04	; 4
-     56a:	20 8b       	std	Z+16, r18	; 0x10
-     56c:	81 8b       	std	Z+17, r24	; 0x11
-     56e:	81 e9       	ldi	r24, 0x91	; 145
-     570:	82 8b       	std	Z+18, r24	; 0x12
-     572:	80 e1       	ldi	r24, 0x10	; 16
-     574:	83 8b       	std	Z+19, r24	; 0x13
-     576:	47 e7       	ldi	r20, 0x77	; 119
-     578:	51 e0       	ldi	r21, 0x01	; 1
-     57a:	44 8b       	std	Z+20, r20	; 0x14
-     57c:	55 8b       	std	Z+21, r21	; 0x15
-     57e:	90 8f       	std	Z+24, r25	; 0x18
-     580:	31 8f       	std	Z+25, r19	; 0x19
-     582:	12 8e       	std	Z+26, r1	; 0x1a
-     584:	40 91 c3 20 	lds	r20, 0x20C3	; 0x8020c3 <b1_state>
-     588:	2e ee       	ldi	r18, 0xEE	; 238
-     58a:	32 e0       	ldi	r19, 0x02	; 2
-     58c:	42 9f       	mul	r20, r18
-     58e:	c0 01       	movw	r24, r0
-     590:	43 9f       	mul	r20, r19
-     592:	90 0d       	add	r25, r0
-     594:	11 24       	eor	r1, r1
-     596:	86 58       	subi	r24, 0x86	; 134
-     598:	99 4d       	sbci	r25, 0xD9	; 217
-     59a:	84 8f       	std	Z+28, r24	; 0x1c
-     59c:	40 91 c3 20 	lds	r20, 0x20C3	; 0x8020c3 <b1_state>
-     5a0:	42 9f       	mul	r20, r18
-     5a2:	c0 01       	movw	r24, r0
-     5a4:	43 9f       	mul	r20, r19
-     5a6:	90 0d       	add	r25, r0
-     5a8:	11 24       	eor	r1, r1
-     5aa:	86 58       	subi	r24, 0x86	; 134
-     5ac:	99 4d       	sbci	r25, 0xD9	; 217
-     5ae:	95 8f       	std	Z+29, r25	; 0x1d
-     5b0:	16 8e       	std	Z+30, r1	; 0x1e
-     5b2:	80 89       	ldd	r24, Z+16	; 0x10
-     5b4:	80 68       	ori	r24, 0x80	; 128
-     5b6:	80 8b       	std	Z+16, r24	; 0x10
-     5b8:	08 95       	ret
+00000502 <tiny_dma_set_mode_0>:
+     502:	10 92 00 20 	sts	0x2000, r1	; 0x802000 <__data_start>
+     506:	ed df       	rcall	.-38     	; 0x4e2 <tiny_dma_flush>
+     508:	e0 e0       	ldi	r30, 0x00	; 0
+     50a:	f1 e0       	ldi	r31, 0x01	; 1
+     50c:	16 aa       	std	Z+54, r1	; 0x36
+     50e:	94 e2       	ldi	r25, 0x24	; 36
+     510:	90 ab       	std	Z+48, r25	; 0x30
+     512:	11 aa       	std	Z+49, r1	; 0x31
+     514:	49 e5       	ldi	r20, 0x59	; 89
+     516:	42 ab       	std	Z+50, r20	; 0x32
+     518:	32 e0       	ldi	r19, 0x02	; 2
+     51a:	33 ab       	std	Z+51, r19	; 0x33
+     51c:	60 91 02 20 	lds	r22, 0x2002	; 0x802002 <auxDacBufLen>
+     520:	70 91 03 20 	lds	r23, 0x2003	; 0x802003 <auxDacBufLen+0x1>
+     524:	64 ab       	std	Z+52, r22	; 0x34
+     526:	75 ab       	std	Z+53, r23	; 0x35
+     528:	6a e7       	ldi	r22, 0x7A	; 122
+     52a:	74 e2       	ldi	r23, 0x24	; 36
+     52c:	60 af       	std	Z+56, r22	; 0x38
+     52e:	71 af       	std	Z+57, r23	; 0x39
+     530:	12 ae       	std	Z+58, r1	; 0x3a
+     532:	8b e3       	ldi	r24, 0x3B	; 59
+     534:	84 af       	std	Z+60, r24	; 0x3c
+     536:	83 e0       	ldi	r24, 0x03	; 3
+     538:	80 93 3d 01 	sts	0x013D, r24	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
+     53c:	10 92 3e 01 	sts	0x013E, r1	; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e>
+     540:	20 a9       	ldd	r18, Z+48	; 0x30
+     542:	20 68       	ori	r18, 0x80	; 128
+     544:	20 ab       	std	Z+48, r18	; 0x30
+     546:	10 92 46 01 	sts	0x0146, r1	; 0x800146 <__TEXT_REGION_LENGTH__+0x700146>
+     54a:	a0 e4       	ldi	r26, 0x40	; 64
+     54c:	b1 e0       	ldi	r27, 0x01	; 1
+     54e:	9c 93       	st	X, r25
+     550:	10 92 41 01 	sts	0x0141, r1	; 0x800141 <__TEXT_REGION_LENGTH__+0x700141>
+     554:	40 93 42 01 	sts	0x0142, r20	; 0x800142 <__TEXT_REGION_LENGTH__+0x700142>
+     558:	80 93 43 01 	sts	0x0143, r24	; 0x800143 <__TEXT_REGION_LENGTH__+0x700143>
+     55c:	40 91 04 20 	lds	r20, 0x2004	; 0x802004 <dacBuf_len>
+     560:	50 91 05 20 	lds	r21, 0x2005	; 0x802005 <dacBuf_len+0x1>
+     564:	40 93 44 01 	sts	0x0144, r20	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
+     568:	50 93 45 01 	sts	0x0145, r21	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
+     56c:	4a e6       	ldi	r20, 0x6A	; 106
+     56e:	52 e2       	ldi	r21, 0x22	; 34
+     570:	40 93 48 01 	sts	0x0148, r20	; 0x800148 <__TEXT_REGION_LENGTH__+0x700148>
+     574:	50 93 49 01 	sts	0x0149, r21	; 0x800149 <__TEXT_REGION_LENGTH__+0x700149>
+     578:	10 92 4a 01 	sts	0x014A, r1	; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a>
+     57c:	29 e3       	ldi	r18, 0x39	; 57
+     57e:	20 93 4c 01 	sts	0x014C, r18	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
+     582:	80 93 4d 01 	sts	0x014D, r24	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
+     586:	10 92 4e 01 	sts	0x014E, r1	; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e>
+     58a:	2c 91       	ld	r18, X
+     58c:	20 68       	ori	r18, 0x80	; 128
+     58e:	2c 93       	st	X, r18
+     590:	10 8a       	std	Z+16, r1	; 0x10
+     592:	20 e4       	ldi	r18, 0x40	; 64
+     594:	20 8b       	std	Z+16, r18	; 0x10
+     596:	24 e0       	ldi	r18, 0x04	; 4
+     598:	20 8b       	std	Z+16, r18	; 0x10
+     59a:	81 8b       	std	Z+17, r24	; 0x11
+     59c:	81 e9       	ldi	r24, 0x91	; 145
+     59e:	82 8b       	std	Z+18, r24	; 0x12
+     5a0:	80 e1       	ldi	r24, 0x10	; 16
+     5a2:	83 8b       	std	Z+19, r24	; 0x13
+     5a4:	47 e7       	ldi	r20, 0x77	; 119
+     5a6:	51 e0       	ldi	r21, 0x01	; 1
+     5a8:	44 8b       	std	Z+20, r20	; 0x14
+     5aa:	55 8b       	std	Z+21, r21	; 0x15
+     5ac:	90 8f       	std	Z+24, r25	; 0x18
+     5ae:	31 8f       	std	Z+25, r19	; 0x19
+     5b0:	12 8e       	std	Z+26, r1	; 0x1a
+     5b2:	40 91 c3 20 	lds	r20, 0x20C3	; 0x8020c3 <b1_state>
+     5b6:	2e ee       	ldi	r18, 0xEE	; 238
+     5b8:	32 e0       	ldi	r19, 0x02	; 2
+     5ba:	42 9f       	mul	r20, r18
+     5bc:	c0 01       	movw	r24, r0
+     5be:	43 9f       	mul	r20, r19
+     5c0:	90 0d       	add	r25, r0
+     5c2:	11 24       	eor	r1, r1
+     5c4:	86 58       	subi	r24, 0x86	; 134
+     5c6:	99 4d       	sbci	r25, 0xD9	; 217
+     5c8:	84 8f       	std	Z+28, r24	; 0x1c
+     5ca:	40 91 c3 20 	lds	r20, 0x20C3	; 0x8020c3 <b1_state>
+     5ce:	42 9f       	mul	r20, r18
+     5d0:	c0 01       	movw	r24, r0
+     5d2:	43 9f       	mul	r20, r19
+     5d4:	90 0d       	add	r25, r0
+     5d6:	11 24       	eor	r1, r1
+     5d8:	86 58       	subi	r24, 0x86	; 134
+     5da:	99 4d       	sbci	r25, 0xD9	; 217
+     5dc:	95 8f       	std	Z+29, r25	; 0x1d
+     5de:	16 8e       	std	Z+30, r1	; 0x1e
+     5e0:	80 89       	ldd	r24, Z+16	; 0x10
+     5e2:	80 68       	ori	r24, 0x80	; 128
+     5e4:	80 8b       	std	Z+16, r24	; 0x10
+     5e6:	08 95       	ret
 
-000005ba <tiny_dma_loop_mode_0>:
-     5ba:	08 95       	ret
+000005e8 <tiny_dma_loop_mode_0>:
+     5e8:	08 95       	ret
 
-000005bc <tiny_dma_set_mode_1>:
-     5bc:	cf 93       	push	r28
-     5be:	df 93       	push	r29
-     5c0:	81 e0       	ldi	r24, 0x01	; 1
-     5c2:	80 93 00 20 	sts	0x2000, r24	; 0x802000 <__data_start>
-     5c6:	76 df       	rcall	.-276    	; 0x4b4 <tiny_dma_flush>
-     5c8:	e0 e0       	ldi	r30, 0x00	; 0
-     5ca:	f1 e0       	ldi	r31, 0x01	; 1
-     5cc:	10 aa       	std	Z+48, r1	; 0x30
-     5ce:	80 e4       	ldi	r24, 0x40	; 64
-     5d0:	80 ab       	std	Z+48, r24	; 0x30
-     5d2:	94 e0       	ldi	r25, 0x04	; 4
-     5d4:	90 ab       	std	Z+48, r25	; 0x30
-     5d6:	11 aa       	std	Z+49, r1	; 0x31
-     5d8:	12 aa       	std	Z+50, r1	; 0x32
-     5da:	5b e4       	ldi	r21, 0x4B	; 75
-     5dc:	53 ab       	std	Z+51, r21	; 0x33
-     5de:	14 aa       	std	Z+52, r1	; 0x34
-     5e0:	15 aa       	std	Z+53, r1	; 0x35
-     5e2:	16 aa       	std	Z+54, r1	; 0x36
-     5e4:	21 e0       	ldi	r18, 0x01	; 1
-     5e6:	30 e2       	ldi	r19, 0x20	; 32
-     5e8:	20 af       	std	Z+56, r18	; 0x38
-     5ea:	31 af       	std	Z+57, r19	; 0x39
-     5ec:	12 ae       	std	Z+58, r1	; 0x3a
-     5ee:	40 ea       	ldi	r20, 0xA0	; 160
-     5f0:	44 af       	std	Z+60, r20	; 0x3c
-     5f2:	38 e0       	ldi	r19, 0x08	; 8
-     5f4:	30 93 3d 01 	sts	0x013D, r19	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
-     5f8:	10 92 3e 01 	sts	0x013E, r1	; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e>
-     5fc:	80 a9       	ldd	r24, Z+48	; 0x30
-     5fe:	80 6a       	ori	r24, 0xA0	; 160
-     600:	80 ab       	std	Z+48, r24	; 0x30
-     602:	85 e5       	ldi	r24, 0x55	; 85
-     604:	80 93 a0 08 	sts	0x08A0, r24	; 0x8008a0 <__TEXT_REGION_LENGTH__+0x7008a0>
-     608:	10 92 46 01 	sts	0x0146, r1	; 0x800146 <__TEXT_REGION_LENGTH__+0x700146>
-     60c:	a0 e4       	ldi	r26, 0x40	; 64
-     60e:	b1 e0       	ldi	r27, 0x01	; 1
-     610:	c4 e2       	ldi	r28, 0x24	; 36
-     612:	cc 93       	st	X, r28
-     614:	10 92 41 01 	sts	0x0141, r1	; 0x800141 <__TEXT_REGION_LENGTH__+0x700141>
-     618:	89 e5       	ldi	r24, 0x59	; 89
-     61a:	80 93 42 01 	sts	0x0142, r24	; 0x800142 <__TEXT_REGION_LENGTH__+0x700142>
-     61e:	82 e0       	ldi	r24, 0x02	; 2
-     620:	80 93 43 01 	sts	0x0143, r24	; 0x800143 <__TEXT_REGION_LENGTH__+0x700143>
-     624:	60 91 02 20 	lds	r22, 0x2002	; 0x802002 <auxDacBufLen>
-     628:	70 91 03 20 	lds	r23, 0x2003	; 0x802003 <auxDacBufLen+0x1>
-     62c:	60 93 44 01 	sts	0x0144, r22	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
-     630:	70 93 45 01 	sts	0x0145, r23	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
-     634:	6a e7       	ldi	r22, 0x7A	; 122
-     636:	74 e2       	ldi	r23, 0x24	; 36
-     638:	60 93 48 01 	sts	0x0148, r22	; 0x800148 <__TEXT_REGION_LENGTH__+0x700148>
-     63c:	70 93 49 01 	sts	0x0149, r23	; 0x800149 <__TEXT_REGION_LENGTH__+0x700149>
-     640:	10 92 4a 01 	sts	0x014A, r1	; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a>
-     644:	2b e3       	ldi	r18, 0x3B	; 59
-     646:	20 93 4c 01 	sts	0x014C, r18	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
-     64a:	63 e0       	ldi	r22, 0x03	; 3
-     64c:	60 93 4d 01 	sts	0x014D, r22	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
-     650:	10 92 4e 01 	sts	0x014E, r1	; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e>
-     654:	2c 91       	ld	r18, X
-     656:	20 68       	ori	r18, 0x80	; 128
-     658:	2c 93       	st	X, r18
-     65a:	90 8b       	std	Z+16, r25	; 0x10
-     65c:	61 8b       	std	Z+17, r22	; 0x11
-     65e:	a1 e9       	ldi	r26, 0x91	; 145
-     660:	a2 8b       	std	Z+18, r26	; 0x12
-     662:	20 e1       	ldi	r18, 0x10	; 16
-     664:	23 8b       	std	Z+19, r18	; 0x13
-     666:	67 e7       	ldi	r22, 0x77	; 119
-     668:	71 e0       	ldi	r23, 0x01	; 1
-     66a:	64 8b       	std	Z+20, r22	; 0x14
-     66c:	75 8b       	std	Z+21, r23	; 0x15
-     66e:	c0 8f       	std	Z+24, r28	; 0x18
-     670:	81 8f       	std	Z+25, r24	; 0x19
-     672:	12 8e       	std	Z+26, r1	; 0x1a
-     674:	ca e7       	ldi	r28, 0x7A	; 122
-     676:	d6 e2       	ldi	r29, 0x26	; 38
-     678:	c4 8f       	std	Z+28, r28	; 0x1c
-     67a:	d5 8f       	std	Z+29, r29	; 0x1d
-     67c:	16 8e       	std	Z+30, r1	; 0x1e
-     67e:	20 89       	ldd	r18, Z+16	; 0x10
-     680:	20 68       	ori	r18, 0x80	; 128
-     682:	20 8b       	std	Z+16, r18	; 0x10
-     684:	90 a3       	std	Z+32, r25	; 0x20
-     686:	81 a3       	std	Z+33, r24	; 0x21
-     688:	a2 a3       	std	Z+34, r26	; 0x22
-     68a:	53 a3       	std	Z+35, r21	; 0x23
-     68c:	64 a3       	std	Z+36, r22	; 0x24
-     68e:	75 a3       	std	Z+37, r23	; 0x25
-     690:	40 a7       	std	Z+40, r20	; 0x28
-     692:	31 a7       	std	Z+41, r19	; 0x29
-     694:	12 a6       	std	Z+42, r1	; 0x2a
-     696:	81 ef       	ldi	r24, 0xF1	; 241
-     698:	97 e2       	ldi	r25, 0x27	; 39
-     69a:	84 a7       	std	Z+44, r24	; 0x2c
-     69c:	95 a7       	std	Z+45, r25	; 0x2d
-     69e:	16 a6       	std	Z+46, r1	; 0x2e
-     6a0:	80 a1       	ldd	r24, Z+32	; 0x20
-     6a2:	80 68       	ori	r24, 0x80	; 128
-     6a4:	80 a3       	std	Z+32, r24	; 0x20
-     6a6:	df 91       	pop	r29
-     6a8:	cf 91       	pop	r28
-     6aa:	08 95       	ret
+000005ea <tiny_dma_set_mode_1>:
+     5ea:	cf 93       	push	r28
+     5ec:	df 93       	push	r29
+     5ee:	81 e0       	ldi	r24, 0x01	; 1
+     5f0:	80 93 00 20 	sts	0x2000, r24	; 0x802000 <__data_start>
+     5f4:	76 df       	rcall	.-276    	; 0x4e2 <tiny_dma_flush>
+     5f6:	e0 e0       	ldi	r30, 0x00	; 0
+     5f8:	f1 e0       	ldi	r31, 0x01	; 1
+     5fa:	10 aa       	std	Z+48, r1	; 0x30
+     5fc:	80 e4       	ldi	r24, 0x40	; 64
+     5fe:	80 ab       	std	Z+48, r24	; 0x30
+     600:	94 e0       	ldi	r25, 0x04	; 4
+     602:	90 ab       	std	Z+48, r25	; 0x30
+     604:	11 aa       	std	Z+49, r1	; 0x31
+     606:	12 aa       	std	Z+50, r1	; 0x32
+     608:	5b e4       	ldi	r21, 0x4B	; 75
+     60a:	53 ab       	std	Z+51, r21	; 0x33
+     60c:	14 aa       	std	Z+52, r1	; 0x34
+     60e:	15 aa       	std	Z+53, r1	; 0x35
+     610:	16 aa       	std	Z+54, r1	; 0x36
+     612:	21 e0       	ldi	r18, 0x01	; 1
+     614:	30 e2       	ldi	r19, 0x20	; 32
+     616:	20 af       	std	Z+56, r18	; 0x38
+     618:	31 af       	std	Z+57, r19	; 0x39
+     61a:	12 ae       	std	Z+58, r1	; 0x3a
+     61c:	40 ea       	ldi	r20, 0xA0	; 160
+     61e:	44 af       	std	Z+60, r20	; 0x3c
+     620:	38 e0       	ldi	r19, 0x08	; 8
+     622:	30 93 3d 01 	sts	0x013D, r19	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
+     626:	10 92 3e 01 	sts	0x013E, r1	; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e>
+     62a:	80 a9       	ldd	r24, Z+48	; 0x30
+     62c:	80 6a       	ori	r24, 0xA0	; 160
+     62e:	80 ab       	std	Z+48, r24	; 0x30
+     630:	85 e5       	ldi	r24, 0x55	; 85
+     632:	80 93 a0 08 	sts	0x08A0, r24	; 0x8008a0 <__TEXT_REGION_LENGTH__+0x7008a0>
+     636:	10 92 46 01 	sts	0x0146, r1	; 0x800146 <__TEXT_REGION_LENGTH__+0x700146>
+     63a:	a0 e4       	ldi	r26, 0x40	; 64
+     63c:	b1 e0       	ldi	r27, 0x01	; 1
+     63e:	c4 e2       	ldi	r28, 0x24	; 36
+     640:	cc 93       	st	X, r28
+     642:	10 92 41 01 	sts	0x0141, r1	; 0x800141 <__TEXT_REGION_LENGTH__+0x700141>
+     646:	89 e5       	ldi	r24, 0x59	; 89
+     648:	80 93 42 01 	sts	0x0142, r24	; 0x800142 <__TEXT_REGION_LENGTH__+0x700142>
+     64c:	82 e0       	ldi	r24, 0x02	; 2
+     64e:	80 93 43 01 	sts	0x0143, r24	; 0x800143 <__TEXT_REGION_LENGTH__+0x700143>
+     652:	60 91 02 20 	lds	r22, 0x2002	; 0x802002 <auxDacBufLen>
+     656:	70 91 03 20 	lds	r23, 0x2003	; 0x802003 <auxDacBufLen+0x1>
+     65a:	60 93 44 01 	sts	0x0144, r22	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
+     65e:	70 93 45 01 	sts	0x0145, r23	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
+     662:	6a e7       	ldi	r22, 0x7A	; 122
+     664:	74 e2       	ldi	r23, 0x24	; 36
+     666:	60 93 48 01 	sts	0x0148, r22	; 0x800148 <__TEXT_REGION_LENGTH__+0x700148>
+     66a:	70 93 49 01 	sts	0x0149, r23	; 0x800149 <__TEXT_REGION_LENGTH__+0x700149>
+     66e:	10 92 4a 01 	sts	0x014A, r1	; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a>
+     672:	2b e3       	ldi	r18, 0x3B	; 59
+     674:	20 93 4c 01 	sts	0x014C, r18	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
+     678:	63 e0       	ldi	r22, 0x03	; 3
+     67a:	60 93 4d 01 	sts	0x014D, r22	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
+     67e:	10 92 4e 01 	sts	0x014E, r1	; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e>
+     682:	2c 91       	ld	r18, X
+     684:	20 68       	ori	r18, 0x80	; 128
+     686:	2c 93       	st	X, r18
+     688:	90 8b       	std	Z+16, r25	; 0x10
+     68a:	61 8b       	std	Z+17, r22	; 0x11
+     68c:	a1 e9       	ldi	r26, 0x91	; 145
+     68e:	a2 8b       	std	Z+18, r26	; 0x12
+     690:	20 e1       	ldi	r18, 0x10	; 16
+     692:	23 8b       	std	Z+19, r18	; 0x13
+     694:	67 e7       	ldi	r22, 0x77	; 119
+     696:	71 e0       	ldi	r23, 0x01	; 1
+     698:	64 8b       	std	Z+20, r22	; 0x14
+     69a:	75 8b       	std	Z+21, r23	; 0x15
+     69c:	c0 8f       	std	Z+24, r28	; 0x18
+     69e:	81 8f       	std	Z+25, r24	; 0x19
+     6a0:	12 8e       	std	Z+26, r1	; 0x1a
+     6a2:	ca e7       	ldi	r28, 0x7A	; 122
+     6a4:	d6 e2       	ldi	r29, 0x26	; 38
+     6a6:	c4 8f       	std	Z+28, r28	; 0x1c
+     6a8:	d5 8f       	std	Z+29, r29	; 0x1d
+     6aa:	16 8e       	std	Z+30, r1	; 0x1e
+     6ac:	20 89       	ldd	r18, Z+16	; 0x10
+     6ae:	20 68       	ori	r18, 0x80	; 128
+     6b0:	20 8b       	std	Z+16, r18	; 0x10
+     6b2:	90 a3       	std	Z+32, r25	; 0x20
+     6b4:	81 a3       	std	Z+33, r24	; 0x21
+     6b6:	a2 a3       	std	Z+34, r26	; 0x22
+     6b8:	53 a3       	std	Z+35, r21	; 0x23
+     6ba:	64 a3       	std	Z+36, r22	; 0x24
+     6bc:	75 a3       	std	Z+37, r23	; 0x25
+     6be:	40 a7       	std	Z+40, r20	; 0x28
+     6c0:	31 a7       	std	Z+41, r19	; 0x29
+     6c2:	12 a6       	std	Z+42, r1	; 0x2a
+     6c4:	81 ef       	ldi	r24, 0xF1	; 241
+     6c6:	97 e2       	ldi	r25, 0x27	; 39
+     6c8:	84 a7       	std	Z+44, r24	; 0x2c
+     6ca:	95 a7       	std	Z+45, r25	; 0x2d
+     6cc:	16 a6       	std	Z+46, r1	; 0x2e
+     6ce:	80 a1       	ldd	r24, Z+32	; 0x20
+     6d0:	80 68       	ori	r24, 0x80	; 128
+     6d2:	80 a3       	std	Z+32, r24	; 0x20
+     6d4:	df 91       	pop	r29
+     6d6:	cf 91       	pop	r28
+     6d8:	08 95       	ret
 
-000006ac <tiny_dma_loop_mode_1>:
-     6ac:	08 95       	ret
+000006da <tiny_dma_loop_mode_1>:
+     6da:	08 95       	ret
 
-000006ae <tiny_dma_set_mode_2>:
-     6ae:	cf 93       	push	r28
-     6b0:	c2 e0       	ldi	r28, 0x02	; 2
-     6b2:	c0 93 00 20 	sts	0x2000, r28	; 0x802000 <__data_start>
-     6b6:	fe de       	rcall	.-516    	; 0x4b4 <tiny_dma_flush>
-     6b8:	e0 e0       	ldi	r30, 0x00	; 0
-     6ba:	f1 e0       	ldi	r31, 0x01	; 1
-     6bc:	16 aa       	std	Z+54, r1	; 0x36
-     6be:	94 e2       	ldi	r25, 0x24	; 36
-     6c0:	90 ab       	std	Z+48, r25	; 0x30
-     6c2:	11 aa       	std	Z+49, r1	; 0x31
-     6c4:	39 e5       	ldi	r19, 0x59	; 89
-     6c6:	32 ab       	std	Z+50, r19	; 0x32
-     6c8:	83 e0       	ldi	r24, 0x03	; 3
-     6ca:	83 ab       	std	Z+51, r24	; 0x33
-     6cc:	40 91 04 20 	lds	r20, 0x2004	; 0x802004 <dacBuf_len>
-     6d0:	50 91 05 20 	lds	r21, 0x2005	; 0x802005 <dacBuf_len+0x1>
-     6d4:	44 ab       	std	Z+52, r20	; 0x34
-     6d6:	55 ab       	std	Z+53, r21	; 0x35
-     6d8:	4a e6       	ldi	r20, 0x6A	; 106
-     6da:	52 e2       	ldi	r21, 0x22	; 34
-     6dc:	40 af       	std	Z+56, r20	; 0x38
-     6de:	51 af       	std	Z+57, r21	; 0x39
-     6e0:	12 ae       	std	Z+58, r1	; 0x3a
-     6e2:	29 e3       	ldi	r18, 0x39	; 57
-     6e4:	24 af       	std	Z+60, r18	; 0x3c
-     6e6:	80 93 3d 01 	sts	0x013D, r24	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
-     6ea:	10 92 3e 01 	sts	0x013E, r1	; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e>
-     6ee:	20 a9       	ldd	r18, Z+48	; 0x30
-     6f0:	20 68       	ori	r18, 0x80	; 128
-     6f2:	20 ab       	std	Z+48, r18	; 0x30
-     6f4:	10 92 46 01 	sts	0x0146, r1	; 0x800146 <__TEXT_REGION_LENGTH__+0x700146>
-     6f8:	a0 e4       	ldi	r26, 0x40	; 64
-     6fa:	b1 e0       	ldi	r27, 0x01	; 1
-     6fc:	9c 93       	st	X, r25
-     6fe:	10 92 41 01 	sts	0x0141, r1	; 0x800141 <__TEXT_REGION_LENGTH__+0x700141>
-     702:	30 93 42 01 	sts	0x0142, r19	; 0x800142 <__TEXT_REGION_LENGTH__+0x700142>
-     706:	c0 93 43 01 	sts	0x0143, r28	; 0x800143 <__TEXT_REGION_LENGTH__+0x700143>
-     70a:	20 91 02 20 	lds	r18, 0x2002	; 0x802002 <auxDacBufLen>
-     70e:	30 91 03 20 	lds	r19, 0x2003	; 0x802003 <auxDacBufLen+0x1>
-     712:	20 93 44 01 	sts	0x0144, r18	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
-     716:	30 93 45 01 	sts	0x0145, r19	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
-     71a:	2a e7       	ldi	r18, 0x7A	; 122
-     71c:	34 e2       	ldi	r19, 0x24	; 36
-     71e:	20 93 48 01 	sts	0x0148, r18	; 0x800148 <__TEXT_REGION_LENGTH__+0x700148>
-     722:	30 93 49 01 	sts	0x0149, r19	; 0x800149 <__TEXT_REGION_LENGTH__+0x700149>
-     726:	10 92 4a 01 	sts	0x014A, r1	; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a>
-     72a:	2b e3       	ldi	r18, 0x3B	; 59
-     72c:	20 93 4c 01 	sts	0x014C, r18	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
-     730:	80 93 4d 01 	sts	0x014D, r24	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
-     734:	10 92 4e 01 	sts	0x014E, r1	; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e>
-     738:	2c 91       	ld	r18, X
-     73a:	20 68       	ori	r18, 0x80	; 128
-     73c:	2c 93       	st	X, r18
-     73e:	54 e0       	ldi	r21, 0x04	; 4
-     740:	50 8b       	std	Z+16, r21	; 0x10
-     742:	81 8b       	std	Z+17, r24	; 0x11
-     744:	41 e9       	ldi	r20, 0x91	; 145
-     746:	42 8b       	std	Z+18, r20	; 0x12
-     748:	80 e1       	ldi	r24, 0x10	; 16
-     74a:	83 8b       	std	Z+19, r24	; 0x13
-     74c:	27 e7       	ldi	r18, 0x77	; 119
-     74e:	31 e0       	ldi	r19, 0x01	; 1
-     750:	24 8b       	std	Z+20, r18	; 0x14
-     752:	35 8b       	std	Z+21, r19	; 0x15
-     754:	90 8f       	std	Z+24, r25	; 0x18
-     756:	c1 8f       	std	Z+25, r28	; 0x19
-     758:	12 8e       	std	Z+26, r1	; 0x1a
-     75a:	8a e7       	ldi	r24, 0x7A	; 122
-     75c:	96 e2       	ldi	r25, 0x26	; 38
-     75e:	84 8f       	std	Z+28, r24	; 0x1c
-     760:	95 8f       	std	Z+29, r25	; 0x1d
-     762:	16 8e       	std	Z+30, r1	; 0x1e
-     764:	80 89       	ldd	r24, Z+16	; 0x10
-     766:	80 68       	ori	r24, 0x80	; 128
-     768:	80 8b       	std	Z+16, r24	; 0x10
-     76a:	50 a3       	std	Z+32, r21	; 0x20
-     76c:	c1 a3       	std	Z+33, r28	; 0x21
-     76e:	42 a3       	std	Z+34, r20	; 0x22
-     770:	82 e1       	ldi	r24, 0x12	; 18
-     772:	83 a3       	std	Z+35, r24	; 0x23
-     774:	24 a3       	std	Z+36, r18	; 0x24
-     776:	35 a3       	std	Z+37, r19	; 0x25
-     778:	84 e3       	ldi	r24, 0x34	; 52
-     77a:	80 a7       	std	Z+40, r24	; 0x28
-     77c:	c1 a7       	std	Z+41, r28	; 0x29
-     77e:	12 a6       	std	Z+42, r1	; 0x2a
-     780:	81 ef       	ldi	r24, 0xF1	; 241
-     782:	97 e2       	ldi	r25, 0x27	; 39
-     784:	84 a7       	std	Z+44, r24	; 0x2c
-     786:	95 a7       	std	Z+45, r25	; 0x2d
-     788:	16 a6       	std	Z+46, r1	; 0x2e
-     78a:	80 a1       	ldd	r24, Z+32	; 0x20
-     78c:	80 68       	ori	r24, 0x80	; 128
-     78e:	80 a3       	std	Z+32, r24	; 0x20
-     790:	cf 91       	pop	r28
-     792:	08 95       	ret
+000006dc <tiny_dma_set_mode_2>:
+     6dc:	cf 93       	push	r28
+     6de:	c2 e0       	ldi	r28, 0x02	; 2
+     6e0:	c0 93 00 20 	sts	0x2000, r28	; 0x802000 <__data_start>
+     6e4:	fe de       	rcall	.-516    	; 0x4e2 <tiny_dma_flush>
+     6e6:	e0 e0       	ldi	r30, 0x00	; 0
+     6e8:	f1 e0       	ldi	r31, 0x01	; 1
+     6ea:	16 aa       	std	Z+54, r1	; 0x36
+     6ec:	94 e2       	ldi	r25, 0x24	; 36
+     6ee:	90 ab       	std	Z+48, r25	; 0x30
+     6f0:	11 aa       	std	Z+49, r1	; 0x31
+     6f2:	39 e5       	ldi	r19, 0x59	; 89
+     6f4:	32 ab       	std	Z+50, r19	; 0x32
+     6f6:	83 e0       	ldi	r24, 0x03	; 3
+     6f8:	83 ab       	std	Z+51, r24	; 0x33
+     6fa:	40 91 04 20 	lds	r20, 0x2004	; 0x802004 <dacBuf_len>
+     6fe:	50 91 05 20 	lds	r21, 0x2005	; 0x802005 <dacBuf_len+0x1>
+     702:	44 ab       	std	Z+52, r20	; 0x34
+     704:	55 ab       	std	Z+53, r21	; 0x35
+     706:	4a e6       	ldi	r20, 0x6A	; 106
+     708:	52 e2       	ldi	r21, 0x22	; 34
+     70a:	40 af       	std	Z+56, r20	; 0x38
+     70c:	51 af       	std	Z+57, r21	; 0x39
+     70e:	12 ae       	std	Z+58, r1	; 0x3a
+     710:	29 e3       	ldi	r18, 0x39	; 57
+     712:	24 af       	std	Z+60, r18	; 0x3c
+     714:	80 93 3d 01 	sts	0x013D, r24	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
+     718:	10 92 3e 01 	sts	0x013E, r1	; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e>
+     71c:	20 a9       	ldd	r18, Z+48	; 0x30
+     71e:	20 68       	ori	r18, 0x80	; 128
+     720:	20 ab       	std	Z+48, r18	; 0x30
+     722:	10 92 46 01 	sts	0x0146, r1	; 0x800146 <__TEXT_REGION_LENGTH__+0x700146>
+     726:	a0 e4       	ldi	r26, 0x40	; 64
+     728:	b1 e0       	ldi	r27, 0x01	; 1
+     72a:	9c 93       	st	X, r25
+     72c:	10 92 41 01 	sts	0x0141, r1	; 0x800141 <__TEXT_REGION_LENGTH__+0x700141>
+     730:	30 93 42 01 	sts	0x0142, r19	; 0x800142 <__TEXT_REGION_LENGTH__+0x700142>
+     734:	c0 93 43 01 	sts	0x0143, r28	; 0x800143 <__TEXT_REGION_LENGTH__+0x700143>
+     738:	20 91 02 20 	lds	r18, 0x2002	; 0x802002 <auxDacBufLen>
+     73c:	30 91 03 20 	lds	r19, 0x2003	; 0x802003 <auxDacBufLen+0x1>
+     740:	20 93 44 01 	sts	0x0144, r18	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
+     744:	30 93 45 01 	sts	0x0145, r19	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
+     748:	2a e7       	ldi	r18, 0x7A	; 122
+     74a:	34 e2       	ldi	r19, 0x24	; 36
+     74c:	20 93 48 01 	sts	0x0148, r18	; 0x800148 <__TEXT_REGION_LENGTH__+0x700148>
+     750:	30 93 49 01 	sts	0x0149, r19	; 0x800149 <__TEXT_REGION_LENGTH__+0x700149>
+     754:	10 92 4a 01 	sts	0x014A, r1	; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a>
+     758:	2b e3       	ldi	r18, 0x3B	; 59
+     75a:	20 93 4c 01 	sts	0x014C, r18	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
+     75e:	80 93 4d 01 	sts	0x014D, r24	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
+     762:	10 92 4e 01 	sts	0x014E, r1	; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e>
+     766:	2c 91       	ld	r18, X
+     768:	20 68       	ori	r18, 0x80	; 128
+     76a:	2c 93       	st	X, r18
+     76c:	54 e0       	ldi	r21, 0x04	; 4
+     76e:	50 8b       	std	Z+16, r21	; 0x10
+     770:	81 8b       	std	Z+17, r24	; 0x11
+     772:	41 e9       	ldi	r20, 0x91	; 145
+     774:	42 8b       	std	Z+18, r20	; 0x12
+     776:	80 e1       	ldi	r24, 0x10	; 16
+     778:	83 8b       	std	Z+19, r24	; 0x13
+     77a:	27 e7       	ldi	r18, 0x77	; 119
+     77c:	31 e0       	ldi	r19, 0x01	; 1
+     77e:	24 8b       	std	Z+20, r18	; 0x14
+     780:	35 8b       	std	Z+21, r19	; 0x15
+     782:	90 8f       	std	Z+24, r25	; 0x18
+     784:	c1 8f       	std	Z+25, r28	; 0x19
+     786:	12 8e       	std	Z+26, r1	; 0x1a
+     788:	8a e7       	ldi	r24, 0x7A	; 122
+     78a:	96 e2       	ldi	r25, 0x26	; 38
+     78c:	84 8f       	std	Z+28, r24	; 0x1c
+     78e:	95 8f       	std	Z+29, r25	; 0x1d
+     790:	16 8e       	std	Z+30, r1	; 0x1e
+     792:	80 89       	ldd	r24, Z+16	; 0x10
+     794:	80 68       	ori	r24, 0x80	; 128
+     796:	80 8b       	std	Z+16, r24	; 0x10
+     798:	50 a3       	std	Z+32, r21	; 0x20
+     79a:	c1 a3       	std	Z+33, r28	; 0x21
+     79c:	42 a3       	std	Z+34, r20	; 0x22
+     79e:	82 e1       	ldi	r24, 0x12	; 18
+     7a0:	83 a3       	std	Z+35, r24	; 0x23
+     7a2:	24 a3       	std	Z+36, r18	; 0x24
+     7a4:	35 a3       	std	Z+37, r19	; 0x25
+     7a6:	84 e3       	ldi	r24, 0x34	; 52
+     7a8:	80 a7       	std	Z+40, r24	; 0x28
+     7aa:	c1 a7       	std	Z+41, r28	; 0x29
+     7ac:	12 a6       	std	Z+42, r1	; 0x2a
+     7ae:	81 ef       	ldi	r24, 0xF1	; 241
+     7b0:	97 e2       	ldi	r25, 0x27	; 39
+     7b2:	84 a7       	std	Z+44, r24	; 0x2c
+     7b4:	95 a7       	std	Z+45, r25	; 0x2d
+     7b6:	16 a6       	std	Z+46, r1	; 0x2e
+     7b8:	80 a1       	ldd	r24, Z+32	; 0x20
+     7ba:	80 68       	ori	r24, 0x80	; 128
+     7bc:	80 a3       	std	Z+32, r24	; 0x20
+     7be:	cf 91       	pop	r28
+     7c0:	08 95       	ret
 
-00000794 <tiny_dma_loop_mode_2>:
-     794:	08 95       	ret
+000007c2 <tiny_dma_loop_mode_2>:
+     7c2:	08 95       	ret
 
-00000796 <tiny_dma_set_mode_3>:
-     796:	cf 93       	push	r28
-     798:	c3 e0       	ldi	r28, 0x03	; 3
-     79a:	c0 93 00 20 	sts	0x2000, r28	; 0x802000 <__data_start>
-     79e:	8a de       	rcall	.-748    	; 0x4b4 <tiny_dma_flush>
-     7a0:	e0 e0       	ldi	r30, 0x00	; 0
-     7a2:	f1 e0       	ldi	r31, 0x01	; 1
-     7a4:	10 a2       	std	Z+32, r1	; 0x20
-     7a6:	50 e4       	ldi	r21, 0x40	; 64
-     7a8:	50 a3       	std	Z+32, r21	; 0x20
-     7aa:	44 e0       	ldi	r20, 0x04	; 4
-     7ac:	40 a3       	std	Z+32, r20	; 0x20
-     7ae:	11 a2       	std	Z+33, r1	; 0x21
-     7b0:	12 a2       	std	Z+34, r1	; 0x22
-     7b2:	3b e4       	ldi	r19, 0x4B	; 75
-     7b4:	33 a3       	std	Z+35, r19	; 0x23
-     7b6:	14 a2       	std	Z+36, r1	; 0x24
-     7b8:	15 a2       	std	Z+37, r1	; 0x25
-     7ba:	16 a2       	std	Z+38, r1	; 0x26
-     7bc:	81 e0       	ldi	r24, 0x01	; 1
-     7be:	90 e2       	ldi	r25, 0x20	; 32
-     7c0:	80 a7       	std	Z+40, r24	; 0x28
-     7c2:	91 a7       	std	Z+41, r25	; 0x29
-     7c4:	12 a6       	std	Z+42, r1	; 0x2a
-     7c6:	20 ea       	ldi	r18, 0xA0	; 160
-     7c8:	24 a7       	std	Z+44, r18	; 0x2c
-     7ca:	98 e0       	ldi	r25, 0x08	; 8
-     7cc:	95 a7       	std	Z+45, r25	; 0x2d
-     7ce:	16 a6       	std	Z+46, r1	; 0x2e
-     7d0:	80 a1       	ldd	r24, Z+32	; 0x20
-     7d2:	80 6a       	ori	r24, 0xA0	; 160
-     7d4:	80 a3       	std	Z+32, r24	; 0x20
-     7d6:	85 e5       	ldi	r24, 0x55	; 85
-     7d8:	80 93 a0 08 	sts	0x08A0, r24	; 0x8008a0 <__TEXT_REGION_LENGTH__+0x7008a0>
-     7dc:	16 aa       	std	Z+54, r1	; 0x36
-     7de:	74 e2       	ldi	r23, 0x24	; 36
-     7e0:	70 ab       	std	Z+48, r23	; 0x30
-     7e2:	11 aa       	std	Z+49, r1	; 0x31
-     7e4:	69 e5       	ldi	r22, 0x59	; 89
-     7e6:	62 ab       	std	Z+50, r22	; 0x32
-     7e8:	82 e0       	ldi	r24, 0x02	; 2
-     7ea:	83 ab       	std	Z+51, r24	; 0x33
-     7ec:	a0 91 02 20 	lds	r26, 0x2002	; 0x802002 <auxDacBufLen>
-     7f0:	b0 91 03 20 	lds	r27, 0x2003	; 0x802003 <auxDacBufLen+0x1>
-     7f4:	a4 ab       	std	Z+52, r26	; 0x34
-     7f6:	b5 ab       	std	Z+53, r27	; 0x35
-     7f8:	aa e7       	ldi	r26, 0x7A	; 122
-     7fa:	b4 e2       	ldi	r27, 0x24	; 36
-     7fc:	a0 af       	std	Z+56, r26	; 0x38
-     7fe:	b1 af       	std	Z+57, r27	; 0x39
-     800:	12 ae       	std	Z+58, r1	; 0x3a
-     802:	8b e3       	ldi	r24, 0x3B	; 59
-     804:	84 af       	std	Z+60, r24	; 0x3c
-     806:	c0 93 3d 01 	sts	0x013D, r28	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
-     80a:	10 92 3e 01 	sts	0x013E, r1	; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e>
-     80e:	80 a9       	ldd	r24, Z+48	; 0x30
-     810:	80 68       	ori	r24, 0x80	; 128
-     812:	80 ab       	std	Z+48, r24	; 0x30
-     814:	10 92 46 01 	sts	0x0146, r1	; 0x800146 <__TEXT_REGION_LENGTH__+0x700146>
-     818:	a0 e4       	ldi	r26, 0x40	; 64
-     81a:	b1 e0       	ldi	r27, 0x01	; 1
-     81c:	7c 93       	st	X, r23
-     81e:	10 92 41 01 	sts	0x0141, r1	; 0x800141 <__TEXT_REGION_LENGTH__+0x700141>
-     822:	60 93 42 01 	sts	0x0142, r22	; 0x800142 <__TEXT_REGION_LENGTH__+0x700142>
-     826:	c0 93 43 01 	sts	0x0143, r28	; 0x800143 <__TEXT_REGION_LENGTH__+0x700143>
-     82a:	60 91 04 20 	lds	r22, 0x2004	; 0x802004 <dacBuf_len>
-     82e:	70 91 05 20 	lds	r23, 0x2005	; 0x802005 <dacBuf_len+0x1>
-     832:	60 93 44 01 	sts	0x0144, r22	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
-     836:	70 93 45 01 	sts	0x0145, r23	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
-     83a:	6a e6       	ldi	r22, 0x6A	; 106
-     83c:	72 e2       	ldi	r23, 0x22	; 34
-     83e:	60 93 48 01 	sts	0x0148, r22	; 0x800148 <__TEXT_REGION_LENGTH__+0x700148>
-     842:	70 93 49 01 	sts	0x0149, r23	; 0x800149 <__TEXT_REGION_LENGTH__+0x700149>
-     846:	10 92 4a 01 	sts	0x014A, r1	; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a>
-     84a:	89 e3       	ldi	r24, 0x39	; 57
-     84c:	80 93 4c 01 	sts	0x014C, r24	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
-     850:	c0 93 4d 01 	sts	0x014D, r28	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
-     854:	10 92 4e 01 	sts	0x014E, r1	; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e>
-     858:	8c 91       	ld	r24, X
-     85a:	80 68       	ori	r24, 0x80	; 128
-     85c:	8c 93       	st	X, r24
-     85e:	10 8a       	std	Z+16, r1	; 0x10
-     860:	50 8b       	std	Z+16, r21	; 0x10
-     862:	40 8b       	std	Z+16, r20	; 0x10
-     864:	c1 8b       	std	Z+17, r28	; 0x11
-     866:	81 e9       	ldi	r24, 0x91	; 145
-     868:	82 8b       	std	Z+18, r24	; 0x12
-     86a:	33 8b       	std	Z+19, r19	; 0x13
-     86c:	47 e7       	ldi	r20, 0x77	; 119
-     86e:	51 e0       	ldi	r21, 0x01	; 1
-     870:	44 8b       	std	Z+20, r20	; 0x14
-     872:	55 8b       	std	Z+21, r21	; 0x15
-     874:	20 8f       	std	Z+24, r18	; 0x18
-     876:	91 8f       	std	Z+25, r25	; 0x19
-     878:	12 8e       	std	Z+26, r1	; 0x1a
-     87a:	8a e7       	ldi	r24, 0x7A	; 122
-     87c:	96 e2       	ldi	r25, 0x26	; 38
-     87e:	84 8f       	std	Z+28, r24	; 0x1c
-     880:	95 8f       	std	Z+29, r25	; 0x1d
-     882:	16 8e       	std	Z+30, r1	; 0x1e
-     884:	80 89       	ldd	r24, Z+16	; 0x10
-     886:	80 68       	ori	r24, 0x80	; 128
-     888:	80 8b       	std	Z+16, r24	; 0x10
-     88a:	cf 91       	pop	r28
-     88c:	08 95       	ret
+000007c4 <tiny_dma_set_mode_3>:
+     7c4:	cf 93       	push	r28
+     7c6:	c3 e0       	ldi	r28, 0x03	; 3
+     7c8:	c0 93 00 20 	sts	0x2000, r28	; 0x802000 <__data_start>
+     7cc:	8a de       	rcall	.-748    	; 0x4e2 <tiny_dma_flush>
+     7ce:	e0 e0       	ldi	r30, 0x00	; 0
+     7d0:	f1 e0       	ldi	r31, 0x01	; 1
+     7d2:	10 a2       	std	Z+32, r1	; 0x20
+     7d4:	50 e4       	ldi	r21, 0x40	; 64
+     7d6:	50 a3       	std	Z+32, r21	; 0x20
+     7d8:	44 e0       	ldi	r20, 0x04	; 4
+     7da:	40 a3       	std	Z+32, r20	; 0x20
+     7dc:	11 a2       	std	Z+33, r1	; 0x21
+     7de:	12 a2       	std	Z+34, r1	; 0x22
+     7e0:	3b e4       	ldi	r19, 0x4B	; 75
+     7e2:	33 a3       	std	Z+35, r19	; 0x23
+     7e4:	14 a2       	std	Z+36, r1	; 0x24
+     7e6:	15 a2       	std	Z+37, r1	; 0x25
+     7e8:	16 a2       	std	Z+38, r1	; 0x26
+     7ea:	81 e0       	ldi	r24, 0x01	; 1
+     7ec:	90 e2       	ldi	r25, 0x20	; 32
+     7ee:	80 a7       	std	Z+40, r24	; 0x28
+     7f0:	91 a7       	std	Z+41, r25	; 0x29
+     7f2:	12 a6       	std	Z+42, r1	; 0x2a
+     7f4:	20 ea       	ldi	r18, 0xA0	; 160
+     7f6:	24 a7       	std	Z+44, r18	; 0x2c
+     7f8:	98 e0       	ldi	r25, 0x08	; 8
+     7fa:	95 a7       	std	Z+45, r25	; 0x2d
+     7fc:	16 a6       	std	Z+46, r1	; 0x2e
+     7fe:	80 a1       	ldd	r24, Z+32	; 0x20
+     800:	80 6a       	ori	r24, 0xA0	; 160
+     802:	80 a3       	std	Z+32, r24	; 0x20
+     804:	85 e5       	ldi	r24, 0x55	; 85
+     806:	80 93 a0 08 	sts	0x08A0, r24	; 0x8008a0 <__TEXT_REGION_LENGTH__+0x7008a0>
+     80a:	16 aa       	std	Z+54, r1	; 0x36
+     80c:	74 e2       	ldi	r23, 0x24	; 36
+     80e:	70 ab       	std	Z+48, r23	; 0x30
+     810:	11 aa       	std	Z+49, r1	; 0x31
+     812:	69 e5       	ldi	r22, 0x59	; 89
+     814:	62 ab       	std	Z+50, r22	; 0x32
+     816:	c3 ab       	std	Z+51, r28	; 0x33
+     818:	a0 91 04 20 	lds	r26, 0x2004	; 0x802004 <dacBuf_len>
+     81c:	b0 91 05 20 	lds	r27, 0x2005	; 0x802005 <dacBuf_len+0x1>
+     820:	a4 ab       	std	Z+52, r26	; 0x34
+     822:	b5 ab       	std	Z+53, r27	; 0x35
+     824:	aa e6       	ldi	r26, 0x6A	; 106
+     826:	b2 e2       	ldi	r27, 0x22	; 34
+     828:	a0 af       	std	Z+56, r26	; 0x38
+     82a:	b1 af       	std	Z+57, r27	; 0x39
+     82c:	12 ae       	std	Z+58, r1	; 0x3a
+     82e:	89 e3       	ldi	r24, 0x39	; 57
+     830:	84 af       	std	Z+60, r24	; 0x3c
+     832:	c0 93 3d 01 	sts	0x013D, r28	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
+     836:	10 92 3e 01 	sts	0x013E, r1	; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e>
+     83a:	80 a9       	ldd	r24, Z+48	; 0x30
+     83c:	80 68       	ori	r24, 0x80	; 128
+     83e:	80 ab       	std	Z+48, r24	; 0x30
+     840:	10 92 46 01 	sts	0x0146, r1	; 0x800146 <__TEXT_REGION_LENGTH__+0x700146>
+     844:	a0 e4       	ldi	r26, 0x40	; 64
+     846:	b1 e0       	ldi	r27, 0x01	; 1
+     848:	7c 93       	st	X, r23
+     84a:	10 92 41 01 	sts	0x0141, r1	; 0x800141 <__TEXT_REGION_LENGTH__+0x700141>
+     84e:	60 93 42 01 	sts	0x0142, r22	; 0x800142 <__TEXT_REGION_LENGTH__+0x700142>
+     852:	82 e0       	ldi	r24, 0x02	; 2
+     854:	80 93 43 01 	sts	0x0143, r24	; 0x800143 <__TEXT_REGION_LENGTH__+0x700143>
+     858:	60 91 02 20 	lds	r22, 0x2002	; 0x802002 <auxDacBufLen>
+     85c:	70 91 03 20 	lds	r23, 0x2003	; 0x802003 <auxDacBufLen+0x1>
+     860:	60 93 44 01 	sts	0x0144, r22	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
+     864:	70 93 45 01 	sts	0x0145, r23	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
+     868:	6a e7       	ldi	r22, 0x7A	; 122
+     86a:	74 e2       	ldi	r23, 0x24	; 36
+     86c:	60 93 48 01 	sts	0x0148, r22	; 0x800148 <__TEXT_REGION_LENGTH__+0x700148>
+     870:	70 93 49 01 	sts	0x0149, r23	; 0x800149 <__TEXT_REGION_LENGTH__+0x700149>
+     874:	10 92 4a 01 	sts	0x014A, r1	; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a>
+     878:	8b e3       	ldi	r24, 0x3B	; 59
+     87a:	80 93 4c 01 	sts	0x014C, r24	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
+     87e:	c0 93 4d 01 	sts	0x014D, r28	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
+     882:	10 92 4e 01 	sts	0x014E, r1	; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e>
+     886:	8c 91       	ld	r24, X
+     888:	80 68       	ori	r24, 0x80	; 128
+     88a:	8c 93       	st	X, r24
+     88c:	10 8a       	std	Z+16, r1	; 0x10
+     88e:	50 8b       	std	Z+16, r21	; 0x10
+     890:	40 8b       	std	Z+16, r20	; 0x10
+     892:	c1 8b       	std	Z+17, r28	; 0x11
+     894:	81 e9       	ldi	r24, 0x91	; 145
+     896:	82 8b       	std	Z+18, r24	; 0x12
+     898:	33 8b       	std	Z+19, r19	; 0x13
+     89a:	47 e7       	ldi	r20, 0x77	; 119
+     89c:	51 e0       	ldi	r21, 0x01	; 1
+     89e:	44 8b       	std	Z+20, r20	; 0x14
+     8a0:	55 8b       	std	Z+21, r21	; 0x15
+     8a2:	20 8f       	std	Z+24, r18	; 0x18
+     8a4:	91 8f       	std	Z+25, r25	; 0x19
+     8a6:	12 8e       	std	Z+26, r1	; 0x1a
+     8a8:	8a e7       	ldi	r24, 0x7A	; 122
+     8aa:	96 e2       	ldi	r25, 0x26	; 38
+     8ac:	84 8f       	std	Z+28, r24	; 0x1c
+     8ae:	95 8f       	std	Z+29, r25	; 0x1d
+     8b0:	16 8e       	std	Z+30, r1	; 0x1e
+     8b2:	80 89       	ldd	r24, Z+16	; 0x10
+     8b4:	80 68       	ori	r24, 0x80	; 128
+     8b6:	80 8b       	std	Z+16, r24	; 0x10
+     8b8:	cf 91       	pop	r28
+     8ba:	08 95       	ret
 
-0000088e <tiny_dma_loop_mode_3>:
-     88e:	08 95       	ret
+000008bc <tiny_dma_loop_mode_3>:
+     8bc:	08 95       	ret
 
-00000890 <tiny_dma_set_mode_4>:
-     890:	cf 93       	push	r28
-     892:	c4 e0       	ldi	r28, 0x04	; 4
-     894:	c0 93 00 20 	sts	0x2000, r28	; 0x802000 <__data_start>
-     898:	0d de       	rcall	.-998    	; 0x4b4 <tiny_dma_flush>
-     89a:	e0 e0       	ldi	r30, 0x00	; 0
-     89c:	f1 e0       	ldi	r31, 0x01	; 1
-     89e:	10 a2       	std	Z+32, r1	; 0x20
-     8a0:	20 e4       	ldi	r18, 0x40	; 64
-     8a2:	20 a3       	std	Z+32, r18	; 0x20
-     8a4:	c0 a3       	std	Z+32, r28	; 0x20
-     8a6:	11 a2       	std	Z+33, r1	; 0x21
-     8a8:	12 a2       	std	Z+34, r1	; 0x22
-     8aa:	4b e4       	ldi	r20, 0x4B	; 75
-     8ac:	43 a3       	std	Z+35, r20	; 0x23
-     8ae:	14 a2       	std	Z+36, r1	; 0x24
-     8b0:	15 a2       	std	Z+37, r1	; 0x25
-     8b2:	16 a2       	std	Z+38, r1	; 0x26
-     8b4:	81 e0       	ldi	r24, 0x01	; 1
-     8b6:	90 e2       	ldi	r25, 0x20	; 32
-     8b8:	80 a7       	std	Z+40, r24	; 0x28
-     8ba:	91 a7       	std	Z+41, r25	; 0x29
-     8bc:	12 a6       	std	Z+42, r1	; 0x2a
-     8be:	70 ea       	ldi	r23, 0xA0	; 160
-     8c0:	74 a7       	std	Z+44, r23	; 0x2c
-     8c2:	88 e0       	ldi	r24, 0x08	; 8
-     8c4:	85 a7       	std	Z+45, r24	; 0x2d
-     8c6:	16 a6       	std	Z+46, r1	; 0x2e
-     8c8:	90 a1       	ldd	r25, Z+32	; 0x20
-     8ca:	90 6a       	ori	r25, 0xA0	; 160
-     8cc:	90 a3       	std	Z+32, r25	; 0x20
-     8ce:	16 aa       	std	Z+54, r1	; 0x36
-     8d0:	94 e2       	ldi	r25, 0x24	; 36
-     8d2:	90 ab       	std	Z+48, r25	; 0x30
-     8d4:	11 aa       	std	Z+49, r1	; 0x31
-     8d6:	99 e5       	ldi	r25, 0x59	; 89
-     8d8:	92 ab       	std	Z+50, r25	; 0x32
-     8da:	92 e0       	ldi	r25, 0x02	; 2
-     8dc:	93 ab       	std	Z+51, r25	; 0x33
-     8de:	a0 91 02 20 	lds	r26, 0x2002	; 0x802002 <auxDacBufLen>
-     8e2:	b0 91 03 20 	lds	r27, 0x2003	; 0x802003 <auxDacBufLen+0x1>
-     8e6:	a4 ab       	std	Z+52, r26	; 0x34
-     8e8:	b5 ab       	std	Z+53, r27	; 0x35
-     8ea:	aa e7       	ldi	r26, 0x7A	; 122
-     8ec:	b4 e2       	ldi	r27, 0x24	; 36
-     8ee:	a0 af       	std	Z+56, r26	; 0x38
-     8f0:	b1 af       	std	Z+57, r27	; 0x39
-     8f2:	12 ae       	std	Z+58, r1	; 0x3a
-     8f4:	9b e3       	ldi	r25, 0x3B	; 59
-     8f6:	94 af       	std	Z+60, r25	; 0x3c
-     8f8:	93 e0       	ldi	r25, 0x03	; 3
-     8fa:	90 93 3d 01 	sts	0x013D, r25	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
-     8fe:	10 92 3e 01 	sts	0x013E, r1	; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e>
-     902:	30 a9       	ldd	r19, Z+48	; 0x30
-     904:	30 68       	ori	r19, 0x80	; 128
-     906:	30 ab       	std	Z+48, r19	; 0x30
-     908:	10 8a       	std	Z+16, r1	; 0x10
-     90a:	20 8b       	std	Z+16, r18	; 0x10
-     90c:	c0 8b       	std	Z+16, r28	; 0x10
-     90e:	91 8b       	std	Z+17, r25	; 0x11
-     910:	61 e9       	ldi	r22, 0x91	; 145
-     912:	62 8b       	std	Z+18, r22	; 0x12
-     914:	43 8b       	std	Z+19, r20	; 0x13
-     916:	47 e7       	ldi	r20, 0x77	; 119
-     918:	51 e0       	ldi	r21, 0x01	; 1
-     91a:	44 8b       	std	Z+20, r20	; 0x14
-     91c:	55 8b       	std	Z+21, r21	; 0x15
-     91e:	70 8f       	std	Z+24, r23	; 0x18
-     920:	81 8f       	std	Z+25, r24	; 0x19
-     922:	12 8e       	std	Z+26, r1	; 0x1a
-     924:	aa e7       	ldi	r26, 0x7A	; 122
-     926:	b6 e2       	ldi	r27, 0x26	; 38
-     928:	a4 8f       	std	Z+28, r26	; 0x1c
-     92a:	b5 8f       	std	Z+29, r27	; 0x1d
-     92c:	16 8e       	std	Z+30, r1	; 0x1e
-     92e:	30 89       	ldd	r19, Z+16	; 0x10
-     930:	30 68       	ori	r19, 0x80	; 128
-     932:	30 8b       	std	Z+16, r19	; 0x10
-     934:	e0 e4       	ldi	r30, 0x40	; 64
-     936:	f1 e0       	ldi	r31, 0x01	; 1
-     938:	10 82       	st	Z, r1
-     93a:	20 83       	st	Z, r18
-     93c:	c0 83       	st	Z, r28
-     93e:	90 93 41 01 	sts	0x0141, r25	; 0x800141 <__TEXT_REGION_LENGTH__+0x700141>
-     942:	60 93 42 01 	sts	0x0142, r22	; 0x800142 <__TEXT_REGION_LENGTH__+0x700142>
-     946:	9a e4       	ldi	r25, 0x4A	; 74
-     948:	90 93 43 01 	sts	0x0143, r25	; 0x800143 <__TEXT_REGION_LENGTH__+0x700143>
-     94c:	40 93 44 01 	sts	0x0144, r20	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
-     950:	50 93 45 01 	sts	0x0145, r21	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
-     954:	93 ec       	ldi	r25, 0xC3	; 195
-     956:	90 93 48 01 	sts	0x0148, r25	; 0x800148 <__TEXT_REGION_LENGTH__+0x700148>
-     95a:	80 93 49 01 	sts	0x0149, r24	; 0x800149 <__TEXT_REGION_LENGTH__+0x700149>
-     95e:	10 92 4a 01 	sts	0x014A, r1	; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a>
-     962:	81 ef       	ldi	r24, 0xF1	; 241
-     964:	97 e2       	ldi	r25, 0x27	; 39
-     966:	80 93 4c 01 	sts	0x014C, r24	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
-     96a:	90 93 4d 01 	sts	0x014D, r25	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
-     96e:	10 92 4e 01 	sts	0x014E, r1	; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e>
-     972:	80 81       	ld	r24, Z
-     974:	80 68       	ori	r24, 0x80	; 128
-     976:	80 83       	st	Z, r24
-     978:	cf 91       	pop	r28
-     97a:	08 95       	ret
+000008be <tiny_dma_set_mode_4>:
+     8be:	cf 93       	push	r28
+     8c0:	c4 e0       	ldi	r28, 0x04	; 4
+     8c2:	c0 93 00 20 	sts	0x2000, r28	; 0x802000 <__data_start>
+     8c6:	0d de       	rcall	.-998    	; 0x4e2 <tiny_dma_flush>
+     8c8:	e0 e0       	ldi	r30, 0x00	; 0
+     8ca:	f1 e0       	ldi	r31, 0x01	; 1
+     8cc:	10 a2       	std	Z+32, r1	; 0x20
+     8ce:	80 e4       	ldi	r24, 0x40	; 64
+     8d0:	80 a3       	std	Z+32, r24	; 0x20
+     8d2:	c0 a3       	std	Z+32, r28	; 0x20
+     8d4:	11 a2       	std	Z+33, r1	; 0x21
+     8d6:	12 a2       	std	Z+34, r1	; 0x22
+     8d8:	4b e4       	ldi	r20, 0x4B	; 75
+     8da:	43 a3       	std	Z+35, r20	; 0x23
+     8dc:	14 a2       	std	Z+36, r1	; 0x24
+     8de:	15 a2       	std	Z+37, r1	; 0x25
+     8e0:	16 a2       	std	Z+38, r1	; 0x26
+     8e2:	81 e0       	ldi	r24, 0x01	; 1
+     8e4:	90 e2       	ldi	r25, 0x20	; 32
+     8e6:	80 a7       	std	Z+40, r24	; 0x28
+     8e8:	91 a7       	std	Z+41, r25	; 0x29
+     8ea:	12 a6       	std	Z+42, r1	; 0x2a
+     8ec:	60 ea       	ldi	r22, 0xA0	; 160
+     8ee:	64 a7       	std	Z+44, r22	; 0x2c
+     8f0:	88 e0       	ldi	r24, 0x08	; 8
+     8f2:	85 a7       	std	Z+45, r24	; 0x2d
+     8f4:	16 a6       	std	Z+46, r1	; 0x2e
+     8f6:	90 a1       	ldd	r25, Z+32	; 0x20
+     8f8:	90 6a       	ori	r25, 0xA0	; 160
+     8fa:	90 a3       	std	Z+32, r25	; 0x20
+     8fc:	95 e5       	ldi	r25, 0x55	; 85
+     8fe:	90 93 a0 08 	sts	0x08A0, r25	; 0x8008a0 <__TEXT_REGION_LENGTH__+0x7008a0>
+     902:	10 92 46 01 	sts	0x0146, r1	; 0x800146 <__TEXT_REGION_LENGTH__+0x700146>
+     906:	a0 e4       	ldi	r26, 0x40	; 64
+     908:	b1 e0       	ldi	r27, 0x01	; 1
+     90a:	94 e2       	ldi	r25, 0x24	; 36
+     90c:	9c 93       	st	X, r25
+     90e:	10 92 41 01 	sts	0x0141, r1	; 0x800141 <__TEXT_REGION_LENGTH__+0x700141>
+     912:	99 e5       	ldi	r25, 0x59	; 89
+     914:	90 93 42 01 	sts	0x0142, r25	; 0x800142 <__TEXT_REGION_LENGTH__+0x700142>
+     918:	92 e0       	ldi	r25, 0x02	; 2
+     91a:	90 93 43 01 	sts	0x0143, r25	; 0x800143 <__TEXT_REGION_LENGTH__+0x700143>
+     91e:	20 91 02 20 	lds	r18, 0x2002	; 0x802002 <auxDacBufLen>
+     922:	30 91 03 20 	lds	r19, 0x2003	; 0x802003 <auxDacBufLen+0x1>
+     926:	20 93 44 01 	sts	0x0144, r18	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
+     92a:	30 93 45 01 	sts	0x0145, r19	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
+     92e:	2a e7       	ldi	r18, 0x7A	; 122
+     930:	34 e2       	ldi	r19, 0x24	; 36
+     932:	20 93 48 01 	sts	0x0148, r18	; 0x800148 <__TEXT_REGION_LENGTH__+0x700148>
+     936:	30 93 49 01 	sts	0x0149, r19	; 0x800149 <__TEXT_REGION_LENGTH__+0x700149>
+     93a:	10 92 4a 01 	sts	0x014A, r1	; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a>
+     93e:	9b e3       	ldi	r25, 0x3B	; 59
+     940:	90 93 4c 01 	sts	0x014C, r25	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
+     944:	93 e0       	ldi	r25, 0x03	; 3
+     946:	90 93 4d 01 	sts	0x014D, r25	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
+     94a:	10 92 4e 01 	sts	0x014E, r1	; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e>
+     94e:	2c 91       	ld	r18, X
+     950:	20 68       	ori	r18, 0x80	; 128
+     952:	2c 93       	st	X, r18
+     954:	c0 8b       	std	Z+16, r28	; 0x10
+     956:	91 8b       	std	Z+17, r25	; 0x11
+     958:	31 e9       	ldi	r19, 0x91	; 145
+     95a:	32 8b       	std	Z+18, r19	; 0x12
+     95c:	43 8b       	std	Z+19, r20	; 0x13
+     95e:	47 e7       	ldi	r20, 0x77	; 119
+     960:	51 e0       	ldi	r21, 0x01	; 1
+     962:	44 8b       	std	Z+20, r20	; 0x14
+     964:	55 8b       	std	Z+21, r21	; 0x15
+     966:	60 8f       	std	Z+24, r22	; 0x18
+     968:	81 8f       	std	Z+25, r24	; 0x19
+     96a:	12 8e       	std	Z+26, r1	; 0x1a
+     96c:	6a e7       	ldi	r22, 0x7A	; 122
+     96e:	76 e2       	ldi	r23, 0x26	; 38
+     970:	64 8f       	std	Z+28, r22	; 0x1c
+     972:	75 8f       	std	Z+29, r23	; 0x1d
+     974:	16 8e       	std	Z+30, r1	; 0x1e
+     976:	20 89       	ldd	r18, Z+16	; 0x10
+     978:	20 68       	ori	r18, 0x80	; 128
+     97a:	20 8b       	std	Z+16, r18	; 0x10
+     97c:	c0 ab       	std	Z+48, r28	; 0x30
+     97e:	91 ab       	std	Z+49, r25	; 0x31
+     980:	32 ab       	std	Z+50, r19	; 0x32
+     982:	9a e4       	ldi	r25, 0x4A	; 74
+     984:	93 ab       	std	Z+51, r25	; 0x33
+     986:	44 ab       	std	Z+52, r20	; 0x34
+     988:	55 ab       	std	Z+53, r21	; 0x35
+     98a:	93 ec       	ldi	r25, 0xC3	; 195
+     98c:	90 af       	std	Z+56, r25	; 0x38
+     98e:	81 af       	std	Z+57, r24	; 0x39
+     990:	12 ae       	std	Z+58, r1	; 0x3a
+     992:	81 ef       	ldi	r24, 0xF1	; 241
+     994:	97 e2       	ldi	r25, 0x27	; 39
+     996:	84 af       	std	Z+60, r24	; 0x3c
+     998:	90 93 3d 01 	sts	0x013D, r25	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
+     99c:	10 92 3e 01 	sts	0x013E, r1	; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e>
+     9a0:	80 a9       	ldd	r24, Z+48	; 0x30
+     9a2:	80 68       	ori	r24, 0x80	; 128
+     9a4:	80 ab       	std	Z+48, r24	; 0x30
+     9a6:	cf 91       	pop	r28
+     9a8:	08 95       	ret
 
-0000097c <tiny_dma_loop_mode_4>:
-     97c:	08 95       	ret
+000009aa <tiny_dma_loop_mode_4>:
+     9aa:	08 95       	ret
 
-0000097e <tiny_dma_set_mode_5>:
-     97e:	85 e0       	ldi	r24, 0x05	; 5
-     980:	80 93 00 20 	sts	0x2000, r24	; 0x802000 <__data_start>
-     984:	97 dd       	rcall	.-1234   	; 0x4b4 <tiny_dma_flush>
-     986:	e0 e0       	ldi	r30, 0x00	; 0
-     988:	f1 e0       	ldi	r31, 0x01	; 1
-     98a:	16 aa       	std	Z+54, r1	; 0x36
-     98c:	34 e2       	ldi	r19, 0x24	; 36
-     98e:	30 ab       	std	Z+48, r19	; 0x30
-     990:	11 aa       	std	Z+49, r1	; 0x31
-     992:	29 e5       	ldi	r18, 0x59	; 89
-     994:	22 ab       	std	Z+50, r18	; 0x32
-     996:	83 e0       	ldi	r24, 0x03	; 3
-     998:	83 ab       	std	Z+51, r24	; 0x33
-     99a:	40 91 04 20 	lds	r20, 0x2004	; 0x802004 <dacBuf_len>
-     99e:	50 91 05 20 	lds	r21, 0x2005	; 0x802005 <dacBuf_len+0x1>
-     9a2:	44 ab       	std	Z+52, r20	; 0x34
-     9a4:	55 ab       	std	Z+53, r21	; 0x35
-     9a6:	4a e6       	ldi	r20, 0x6A	; 106
-     9a8:	52 e2       	ldi	r21, 0x22	; 34
-     9aa:	40 af       	std	Z+56, r20	; 0x38
-     9ac:	51 af       	std	Z+57, r21	; 0x39
-     9ae:	12 ae       	std	Z+58, r1	; 0x3a
-     9b0:	99 e3       	ldi	r25, 0x39	; 57
-     9b2:	94 af       	std	Z+60, r25	; 0x3c
-     9b4:	80 93 3d 01 	sts	0x013D, r24	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
-     9b8:	10 92 3e 01 	sts	0x013E, r1	; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e>
-     9bc:	90 a9       	ldd	r25, Z+48	; 0x30
-     9be:	90 68       	ori	r25, 0x80	; 128
-     9c0:	90 ab       	std	Z+48, r25	; 0x30
-     9c2:	10 92 46 01 	sts	0x0146, r1	; 0x800146 <__TEXT_REGION_LENGTH__+0x700146>
-     9c6:	e0 e4       	ldi	r30, 0x40	; 64
-     9c8:	f1 e0       	ldi	r31, 0x01	; 1
-     9ca:	30 83       	st	Z, r19
-     9cc:	10 92 41 01 	sts	0x0141, r1	; 0x800141 <__TEXT_REGION_LENGTH__+0x700141>
-     9d0:	20 93 42 01 	sts	0x0142, r18	; 0x800142 <__TEXT_REGION_LENGTH__+0x700142>
-     9d4:	80 93 43 01 	sts	0x0143, r24	; 0x800143 <__TEXT_REGION_LENGTH__+0x700143>
-     9d8:	20 91 04 20 	lds	r18, 0x2004	; 0x802004 <dacBuf_len>
-     9dc:	30 91 05 20 	lds	r19, 0x2005	; 0x802005 <dacBuf_len+0x1>
-     9e0:	20 93 44 01 	sts	0x0144, r18	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
-     9e4:	30 93 45 01 	sts	0x0145, r19	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
-     9e8:	2a e7       	ldi	r18, 0x7A	; 122
-     9ea:	34 e2       	ldi	r19, 0x24	; 36
-     9ec:	20 93 48 01 	sts	0x0148, r18	; 0x800148 <__TEXT_REGION_LENGTH__+0x700148>
-     9f0:	30 93 49 01 	sts	0x0149, r19	; 0x800149 <__TEXT_REGION_LENGTH__+0x700149>
-     9f4:	10 92 4a 01 	sts	0x014A, r1	; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a>
-     9f8:	9b e3       	ldi	r25, 0x3B	; 59
-     9fa:	90 93 4c 01 	sts	0x014C, r25	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
-     9fe:	80 93 4d 01 	sts	0x014D, r24	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
-     a02:	10 92 4e 01 	sts	0x014E, r1	; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e>
-     a06:	80 81       	ld	r24, Z
-     a08:	80 68       	ori	r24, 0x80	; 128
-     a0a:	80 83       	st	Z, r24
-     a0c:	08 95       	ret
+000009ac <tiny_dma_set_mode_5>:
+     9ac:	85 e0       	ldi	r24, 0x05	; 5
+     9ae:	80 93 00 20 	sts	0x2000, r24	; 0x802000 <__data_start>
+     9b2:	97 dd       	rcall	.-1234   	; 0x4e2 <tiny_dma_flush>
+     9b4:	e0 e0       	ldi	r30, 0x00	; 0
+     9b6:	f1 e0       	ldi	r31, 0x01	; 1
+     9b8:	16 aa       	std	Z+54, r1	; 0x36
+     9ba:	34 e2       	ldi	r19, 0x24	; 36
+     9bc:	30 ab       	std	Z+48, r19	; 0x30
+     9be:	11 aa       	std	Z+49, r1	; 0x31
+     9c0:	29 e5       	ldi	r18, 0x59	; 89
+     9c2:	22 ab       	std	Z+50, r18	; 0x32
+     9c4:	83 e0       	ldi	r24, 0x03	; 3
+     9c6:	83 ab       	std	Z+51, r24	; 0x33
+     9c8:	40 91 04 20 	lds	r20, 0x2004	; 0x802004 <dacBuf_len>
+     9cc:	50 91 05 20 	lds	r21, 0x2005	; 0x802005 <dacBuf_len+0x1>
+     9d0:	44 ab       	std	Z+52, r20	; 0x34
+     9d2:	55 ab       	std	Z+53, r21	; 0x35
+     9d4:	4a e6       	ldi	r20, 0x6A	; 106
+     9d6:	52 e2       	ldi	r21, 0x22	; 34
+     9d8:	40 af       	std	Z+56, r20	; 0x38
+     9da:	51 af       	std	Z+57, r21	; 0x39
+     9dc:	12 ae       	std	Z+58, r1	; 0x3a
+     9de:	99 e3       	ldi	r25, 0x39	; 57
+     9e0:	94 af       	std	Z+60, r25	; 0x3c
+     9e2:	80 93 3d 01 	sts	0x013D, r24	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
+     9e6:	10 92 3e 01 	sts	0x013E, r1	; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e>
+     9ea:	90 a9       	ldd	r25, Z+48	; 0x30
+     9ec:	90 68       	ori	r25, 0x80	; 128
+     9ee:	90 ab       	std	Z+48, r25	; 0x30
+     9f0:	10 92 46 01 	sts	0x0146, r1	; 0x800146 <__TEXT_REGION_LENGTH__+0x700146>
+     9f4:	e0 e4       	ldi	r30, 0x40	; 64
+     9f6:	f1 e0       	ldi	r31, 0x01	; 1
+     9f8:	30 83       	st	Z, r19
+     9fa:	10 92 41 01 	sts	0x0141, r1	; 0x800141 <__TEXT_REGION_LENGTH__+0x700141>
+     9fe:	20 93 42 01 	sts	0x0142, r18	; 0x800142 <__TEXT_REGION_LENGTH__+0x700142>
+     a02:	80 93 43 01 	sts	0x0143, r24	; 0x800143 <__TEXT_REGION_LENGTH__+0x700143>
+     a06:	20 91 04 20 	lds	r18, 0x2004	; 0x802004 <dacBuf_len>
+     a0a:	30 91 05 20 	lds	r19, 0x2005	; 0x802005 <dacBuf_len+0x1>
+     a0e:	20 93 44 01 	sts	0x0144, r18	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
+     a12:	30 93 45 01 	sts	0x0145, r19	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
+     a16:	2a e7       	ldi	r18, 0x7A	; 122
+     a18:	34 e2       	ldi	r19, 0x24	; 36
+     a1a:	20 93 48 01 	sts	0x0148, r18	; 0x800148 <__TEXT_REGION_LENGTH__+0x700148>
+     a1e:	30 93 49 01 	sts	0x0149, r19	; 0x800149 <__TEXT_REGION_LENGTH__+0x700149>
+     a22:	10 92 4a 01 	sts	0x014A, r1	; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a>
+     a26:	9b e3       	ldi	r25, 0x3B	; 59
+     a28:	90 93 4c 01 	sts	0x014C, r25	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
+     a2c:	80 93 4d 01 	sts	0x014D, r24	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
+     a30:	10 92 4e 01 	sts	0x014E, r1	; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e>
+     a34:	80 81       	ld	r24, Z
+     a36:	80 68       	ori	r24, 0x80	; 128
+     a38:	80 83       	st	Z, r24
+     a3a:	08 95       	ret
 
-00000a0e <tiny_dma_set_mode_6>:
-     a0e:	86 e0       	ldi	r24, 0x06	; 6
-     a10:	80 93 00 20 	sts	0x2000, r24	; 0x802000 <__data_start>
-     a14:	4f dd       	rcall	.-1378   	; 0x4b4 <tiny_dma_flush>
-     a16:	e0 e0       	ldi	r30, 0x00	; 0
-     a18:	f1 e0       	ldi	r31, 0x01	; 1
-     a1a:	16 aa       	std	Z+54, r1	; 0x36
-     a1c:	34 e2       	ldi	r19, 0x24	; 36
-     a1e:	30 ab       	std	Z+48, r19	; 0x30
-     a20:	11 aa       	std	Z+49, r1	; 0x31
-     a22:	29 e5       	ldi	r18, 0x59	; 89
-     a24:	22 ab       	std	Z+50, r18	; 0x32
-     a26:	83 e0       	ldi	r24, 0x03	; 3
-     a28:	83 ab       	std	Z+51, r24	; 0x33
-     a2a:	40 91 04 20 	lds	r20, 0x2004	; 0x802004 <dacBuf_len>
-     a2e:	50 91 05 20 	lds	r21, 0x2005	; 0x802005 <dacBuf_len+0x1>
-     a32:	44 ab       	std	Z+52, r20	; 0x34
-     a34:	55 ab       	std	Z+53, r21	; 0x35
-     a36:	4a e6       	ldi	r20, 0x6A	; 106
-     a38:	52 e2       	ldi	r21, 0x22	; 34
-     a3a:	40 af       	std	Z+56, r20	; 0x38
-     a3c:	51 af       	std	Z+57, r21	; 0x39
-     a3e:	12 ae       	std	Z+58, r1	; 0x3a
-     a40:	99 e3       	ldi	r25, 0x39	; 57
-     a42:	94 af       	std	Z+60, r25	; 0x3c
-     a44:	80 93 3d 01 	sts	0x013D, r24	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
-     a48:	10 92 3e 01 	sts	0x013E, r1	; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e>
-     a4c:	90 a9       	ldd	r25, Z+48	; 0x30
-     a4e:	90 68       	ori	r25, 0x80	; 128
-     a50:	90 ab       	std	Z+48, r25	; 0x30
-     a52:	10 92 46 01 	sts	0x0146, r1	; 0x800146 <__TEXT_REGION_LENGTH__+0x700146>
-     a56:	e0 e4       	ldi	r30, 0x40	; 64
-     a58:	f1 e0       	ldi	r31, 0x01	; 1
-     a5a:	30 83       	st	Z, r19
-     a5c:	10 92 41 01 	sts	0x0141, r1	; 0x800141 <__TEXT_REGION_LENGTH__+0x700141>
-     a60:	20 93 42 01 	sts	0x0142, r18	; 0x800142 <__TEXT_REGION_LENGTH__+0x700142>
-     a64:	92 e0       	ldi	r25, 0x02	; 2
-     a66:	90 93 43 01 	sts	0x0143, r25	; 0x800143 <__TEXT_REGION_LENGTH__+0x700143>
-     a6a:	20 91 02 20 	lds	r18, 0x2002	; 0x802002 <auxDacBufLen>
-     a6e:	30 91 03 20 	lds	r19, 0x2003	; 0x802003 <auxDacBufLen+0x1>
-     a72:	20 93 44 01 	sts	0x0144, r18	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
-     a76:	30 93 45 01 	sts	0x0145, r19	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
-     a7a:	2a e7       	ldi	r18, 0x7A	; 122
-     a7c:	34 e2       	ldi	r19, 0x24	; 36
-     a7e:	20 93 48 01 	sts	0x0148, r18	; 0x800148 <__TEXT_REGION_LENGTH__+0x700148>
-     a82:	30 93 49 01 	sts	0x0149, r19	; 0x800149 <__TEXT_REGION_LENGTH__+0x700149>
-     a86:	10 92 4a 01 	sts	0x014A, r1	; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a>
-     a8a:	9b e3       	ldi	r25, 0x3B	; 59
-     a8c:	90 93 4c 01 	sts	0x014C, r25	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
-     a90:	80 93 4d 01 	sts	0x014D, r24	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
-     a94:	10 92 4e 01 	sts	0x014E, r1	; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e>
-     a98:	80 81       	ld	r24, Z
-     a9a:	80 68       	ori	r24, 0x80	; 128
-     a9c:	80 83       	st	Z, r24
-     a9e:	08 95       	ret
+00000a3c <tiny_dma_set_mode_6>:
+     a3c:	86 e0       	ldi	r24, 0x06	; 6
+     a3e:	80 93 00 20 	sts	0x2000, r24	; 0x802000 <__data_start>
+     a42:	4f dd       	rcall	.-1378   	; 0x4e2 <tiny_dma_flush>
+     a44:	e0 e0       	ldi	r30, 0x00	; 0
+     a46:	f1 e0       	ldi	r31, 0x01	; 1
+     a48:	16 aa       	std	Z+54, r1	; 0x36
+     a4a:	94 e2       	ldi	r25, 0x24	; 36
+     a4c:	90 ab       	std	Z+48, r25	; 0x30
+     a4e:	11 aa       	std	Z+49, r1	; 0x31
+     a50:	39 e5       	ldi	r19, 0x59	; 89
+     a52:	32 ab       	std	Z+50, r19	; 0x32
+     a54:	83 e0       	ldi	r24, 0x03	; 3
+     a56:	83 ab       	std	Z+51, r24	; 0x33
+     a58:	40 91 04 20 	lds	r20, 0x2004	; 0x802004 <dacBuf_len>
+     a5c:	50 91 05 20 	lds	r21, 0x2005	; 0x802005 <dacBuf_len+0x1>
+     a60:	44 ab       	std	Z+52, r20	; 0x34
+     a62:	55 ab       	std	Z+53, r21	; 0x35
+     a64:	4a e6       	ldi	r20, 0x6A	; 106
+     a66:	52 e2       	ldi	r21, 0x22	; 34
+     a68:	40 af       	std	Z+56, r20	; 0x38
+     a6a:	51 af       	std	Z+57, r21	; 0x39
+     a6c:	12 ae       	std	Z+58, r1	; 0x3a
+     a6e:	29 e3       	ldi	r18, 0x39	; 57
+     a70:	24 af       	std	Z+60, r18	; 0x3c
+     a72:	80 93 3d 01 	sts	0x013D, r24	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
+     a76:	10 92 3e 01 	sts	0x013E, r1	; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e>
+     a7a:	20 a9       	ldd	r18, Z+48	; 0x30
+     a7c:	20 68       	ori	r18, 0x80	; 128
+     a7e:	20 ab       	std	Z+48, r18	; 0x30
+     a80:	10 92 46 01 	sts	0x0146, r1	; 0x800146 <__TEXT_REGION_LENGTH__+0x700146>
+     a84:	a0 e4       	ldi	r26, 0x40	; 64
+     a86:	b1 e0       	ldi	r27, 0x01	; 1
+     a88:	9c 93       	st	X, r25
+     a8a:	10 92 41 01 	sts	0x0141, r1	; 0x800141 <__TEXT_REGION_LENGTH__+0x700141>
+     a8e:	30 93 42 01 	sts	0x0142, r19	; 0x800142 <__TEXT_REGION_LENGTH__+0x700142>
+     a92:	32 e0       	ldi	r19, 0x02	; 2
+     a94:	30 93 43 01 	sts	0x0143, r19	; 0x800143 <__TEXT_REGION_LENGTH__+0x700143>
+     a98:	40 91 02 20 	lds	r20, 0x2002	; 0x802002 <auxDacBufLen>
+     a9c:	50 91 03 20 	lds	r21, 0x2003	; 0x802003 <auxDacBufLen+0x1>
+     aa0:	40 93 44 01 	sts	0x0144, r20	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
+     aa4:	50 93 45 01 	sts	0x0145, r21	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
+     aa8:	4a e7       	ldi	r20, 0x7A	; 122
+     aaa:	54 e2       	ldi	r21, 0x24	; 36
+     aac:	40 93 48 01 	sts	0x0148, r20	; 0x800148 <__TEXT_REGION_LENGTH__+0x700148>
+     ab0:	50 93 49 01 	sts	0x0149, r21	; 0x800149 <__TEXT_REGION_LENGTH__+0x700149>
+     ab4:	10 92 4a 01 	sts	0x014A, r1	; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a>
+     ab8:	2b e3       	ldi	r18, 0x3B	; 59
+     aba:	20 93 4c 01 	sts	0x014C, r18	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
+     abe:	80 93 4d 01 	sts	0x014D, r24	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
+     ac2:	10 92 4e 01 	sts	0x014E, r1	; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e>
+     ac6:	2c 91       	ld	r18, X
+     ac8:	20 68       	ori	r18, 0x80	; 128
+     aca:	2c 93       	st	X, r18
+     acc:	10 8a       	std	Z+16, r1	; 0x10
+     ace:	20 e4       	ldi	r18, 0x40	; 64
+     ad0:	20 8b       	std	Z+16, r18	; 0x10
+     ad2:	24 e0       	ldi	r18, 0x04	; 4
+     ad4:	20 8b       	std	Z+16, r18	; 0x10
+     ad6:	81 8b       	std	Z+17, r24	; 0x11
+     ad8:	81 e9       	ldi	r24, 0x91	; 145
+     ada:	82 8b       	std	Z+18, r24	; 0x12
+     adc:	80 e1       	ldi	r24, 0x10	; 16
+     ade:	83 8b       	std	Z+19, r24	; 0x13
+     ae0:	4e ee       	ldi	r20, 0xEE	; 238
+     ae2:	52 e0       	ldi	r21, 0x02	; 2
+     ae4:	44 8b       	std	Z+20, r20	; 0x14
+     ae6:	55 8b       	std	Z+21, r21	; 0x15
+     ae8:	90 8f       	std	Z+24, r25	; 0x18
+     aea:	31 8f       	std	Z+25, r19	; 0x19
+     aec:	12 8e       	std	Z+26, r1	; 0x1a
+     aee:	8a e7       	ldi	r24, 0x7A	; 122
+     af0:	96 e2       	ldi	r25, 0x26	; 38
+     af2:	84 8f       	std	Z+28, r24	; 0x1c
+     af4:	95 8f       	std	Z+29, r25	; 0x1d
+     af6:	16 8e       	std	Z+30, r1	; 0x1e
+     af8:	80 89       	ldd	r24, Z+16	; 0x10
+     afa:	80 68       	ori	r24, 0x80	; 128
+     afc:	80 8b       	std	Z+16, r24	; 0x10
+     afe:	08 95       	ret
 
-00000aa0 <tiny_dma_loop_mode_6>:
-     aa0:	e0 e0       	ldi	r30, 0x00	; 0
-     aa2:	f1 e0       	ldi	r31, 0x01	; 1
-     aa4:	10 8a       	std	Z+16, r1	; 0x10
-     aa6:	80 e4       	ldi	r24, 0x40	; 64
-     aa8:	80 8b       	std	Z+16, r24	; 0x10
-     aaa:	84 e0       	ldi	r24, 0x04	; 4
-     aac:	80 8b       	std	Z+16, r24	; 0x10
-     aae:	11 8a       	std	Z+17, r1	; 0x11
-     ab0:	81 e9       	ldi	r24, 0x91	; 145
-     ab2:	82 8b       	std	Z+18, r24	; 0x12
-     ab4:	80 e1       	ldi	r24, 0x10	; 16
-     ab6:	83 8b       	std	Z+19, r24	; 0x13
-     ab8:	2e ee       	ldi	r18, 0xEE	; 238
-     aba:	32 e0       	ldi	r19, 0x02	; 2
-     abc:	24 8b       	std	Z+20, r18	; 0x14
-     abe:	35 8b       	std	Z+21, r19	; 0x15
-     ac0:	84 e2       	ldi	r24, 0x24	; 36
-     ac2:	80 8f       	std	Z+24, r24	; 0x18
-     ac4:	82 e0       	ldi	r24, 0x02	; 2
-     ac6:	81 8f       	std	Z+25, r24	; 0x19
-     ac8:	12 8e       	std	Z+26, r1	; 0x1a
-     aca:	40 91 c3 20 	lds	r20, 0x20C3	; 0x8020c3 <b1_state>
-     ace:	42 9f       	mul	r20, r18
-     ad0:	c0 01       	movw	r24, r0
-     ad2:	43 9f       	mul	r20, r19
-     ad4:	90 0d       	add	r25, r0
-     ad6:	11 24       	eor	r1, r1
-     ad8:	86 58       	subi	r24, 0x86	; 134
-     ada:	99 4d       	sbci	r25, 0xD9	; 217
-     adc:	84 8f       	std	Z+28, r24	; 0x1c
-     ade:	40 91 c3 20 	lds	r20, 0x20C3	; 0x8020c3 <b1_state>
-     ae2:	42 9f       	mul	r20, r18
-     ae4:	c0 01       	movw	r24, r0
-     ae6:	43 9f       	mul	r20, r19
-     ae8:	90 0d       	add	r25, r0
-     aea:	11 24       	eor	r1, r1
-     aec:	86 58       	subi	r24, 0x86	; 134
-     aee:	99 4d       	sbci	r25, 0xD9	; 217
-     af0:	95 8f       	std	Z+29, r25	; 0x1d
-     af2:	16 8e       	std	Z+30, r1	; 0x1e
-     af4:	80 89       	ldd	r24, Z+16	; 0x10
-     af6:	80 68       	ori	r24, 0x80	; 128
-     af8:	80 8b       	std	Z+16, r24	; 0x10
-     afa:	08 95       	ret
+00000b00 <tiny_dma_loop_mode_6>:
+     b00:	08 95       	ret
 
-00000afc <tiny_dma_set_mode_7>:
-     afc:	87 e0       	ldi	r24, 0x07	; 7
-     afe:	80 93 00 20 	sts	0x2000, r24	; 0x802000 <__data_start>
-     b02:	d8 dc       	rcall	.-1616   	; 0x4b4 <tiny_dma_flush>
-     b04:	e0 e0       	ldi	r30, 0x00	; 0
-     b06:	f1 e0       	ldi	r31, 0x01	; 1
-     b08:	16 aa       	std	Z+54, r1	; 0x36
-     b0a:	34 e2       	ldi	r19, 0x24	; 36
-     b0c:	30 ab       	std	Z+48, r19	; 0x30
-     b0e:	11 aa       	std	Z+49, r1	; 0x31
-     b10:	29 e5       	ldi	r18, 0x59	; 89
-     b12:	22 ab       	std	Z+50, r18	; 0x32
-     b14:	83 e0       	ldi	r24, 0x03	; 3
-     b16:	83 ab       	std	Z+51, r24	; 0x33
-     b18:	40 91 04 20 	lds	r20, 0x2004	; 0x802004 <dacBuf_len>
-     b1c:	50 91 05 20 	lds	r21, 0x2005	; 0x802005 <dacBuf_len+0x1>
-     b20:	44 ab       	std	Z+52, r20	; 0x34
-     b22:	55 ab       	std	Z+53, r21	; 0x35
-     b24:	4a e6       	ldi	r20, 0x6A	; 106
-     b26:	52 e2       	ldi	r21, 0x22	; 34
-     b28:	40 af       	std	Z+56, r20	; 0x38
-     b2a:	51 af       	std	Z+57, r21	; 0x39
-     b2c:	12 ae       	std	Z+58, r1	; 0x3a
-     b2e:	99 e3       	ldi	r25, 0x39	; 57
-     b30:	94 af       	std	Z+60, r25	; 0x3c
-     b32:	80 93 3d 01 	sts	0x013D, r24	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
-     b36:	10 92 3e 01 	sts	0x013E, r1	; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e>
-     b3a:	90 a9       	ldd	r25, Z+48	; 0x30
-     b3c:	90 68       	ori	r25, 0x80	; 128
-     b3e:	90 ab       	std	Z+48, r25	; 0x30
-     b40:	10 92 46 01 	sts	0x0146, r1	; 0x800146 <__TEXT_REGION_LENGTH__+0x700146>
-     b44:	e0 e4       	ldi	r30, 0x40	; 64
-     b46:	f1 e0       	ldi	r31, 0x01	; 1
-     b48:	30 83       	st	Z, r19
-     b4a:	10 92 41 01 	sts	0x0141, r1	; 0x800141 <__TEXT_REGION_LENGTH__+0x700141>
-     b4e:	20 93 42 01 	sts	0x0142, r18	; 0x800142 <__TEXT_REGION_LENGTH__+0x700142>
-     b52:	92 e0       	ldi	r25, 0x02	; 2
-     b54:	90 93 43 01 	sts	0x0143, r25	; 0x800143 <__TEXT_REGION_LENGTH__+0x700143>
-     b58:	20 91 02 20 	lds	r18, 0x2002	; 0x802002 <auxDacBufLen>
-     b5c:	30 91 03 20 	lds	r19, 0x2003	; 0x802003 <auxDacBufLen+0x1>
-     b60:	20 93 44 01 	sts	0x0144, r18	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
-     b64:	30 93 45 01 	sts	0x0145, r19	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
-     b68:	2a e7       	ldi	r18, 0x7A	; 122
-     b6a:	34 e2       	ldi	r19, 0x24	; 36
-     b6c:	20 93 48 01 	sts	0x0148, r18	; 0x800148 <__TEXT_REGION_LENGTH__+0x700148>
-     b70:	30 93 49 01 	sts	0x0149, r19	; 0x800149 <__TEXT_REGION_LENGTH__+0x700149>
-     b74:	10 92 4a 01 	sts	0x014A, r1	; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a>
-     b78:	9b e3       	ldi	r25, 0x3B	; 59
-     b7a:	90 93 4c 01 	sts	0x014C, r25	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
-     b7e:	80 93 4d 01 	sts	0x014D, r24	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
-     b82:	10 92 4e 01 	sts	0x014E, r1	; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e>
-     b86:	80 81       	ld	r24, Z
-     b88:	80 68       	ori	r24, 0x80	; 128
-     b8a:	80 83       	st	Z, r24
-     b8c:	08 95       	ret
-
-00000b8e <tiny_dma_loop_mode_7>:
-     b8e:	e0 e0       	ldi	r30, 0x00	; 0
-     b90:	f1 e0       	ldi	r31, 0x01	; 1
+00000b02 <tiny_dma_set_mode_7>:
+     b02:	87 e0       	ldi	r24, 0x07	; 7
+     b04:	80 93 00 20 	sts	0x2000, r24	; 0x802000 <__data_start>
+     b08:	ec dc       	rcall	.-1576   	; 0x4e2 <tiny_dma_flush>
+     b0a:	e0 e0       	ldi	r30, 0x00	; 0
+     b0c:	f1 e0       	ldi	r31, 0x01	; 1
+     b0e:	16 aa       	std	Z+54, r1	; 0x36
+     b10:	94 e2       	ldi	r25, 0x24	; 36
+     b12:	90 ab       	std	Z+48, r25	; 0x30
+     b14:	11 aa       	std	Z+49, r1	; 0x31
+     b16:	39 e5       	ldi	r19, 0x59	; 89
+     b18:	32 ab       	std	Z+50, r19	; 0x32
+     b1a:	83 e0       	ldi	r24, 0x03	; 3
+     b1c:	83 ab       	std	Z+51, r24	; 0x33
+     b1e:	40 91 04 20 	lds	r20, 0x2004	; 0x802004 <dacBuf_len>
+     b22:	50 91 05 20 	lds	r21, 0x2005	; 0x802005 <dacBuf_len+0x1>
+     b26:	44 ab       	std	Z+52, r20	; 0x34
+     b28:	55 ab       	std	Z+53, r21	; 0x35
+     b2a:	4a e6       	ldi	r20, 0x6A	; 106
+     b2c:	52 e2       	ldi	r21, 0x22	; 34
+     b2e:	40 af       	std	Z+56, r20	; 0x38
+     b30:	51 af       	std	Z+57, r21	; 0x39
+     b32:	12 ae       	std	Z+58, r1	; 0x3a
+     b34:	29 e3       	ldi	r18, 0x39	; 57
+     b36:	24 af       	std	Z+60, r18	; 0x3c
+     b38:	80 93 3d 01 	sts	0x013D, r24	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
+     b3c:	10 92 3e 01 	sts	0x013E, r1	; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e>
+     b40:	20 a9       	ldd	r18, Z+48	; 0x30
+     b42:	20 68       	ori	r18, 0x80	; 128
+     b44:	20 ab       	std	Z+48, r18	; 0x30
+     b46:	10 92 46 01 	sts	0x0146, r1	; 0x800146 <__TEXT_REGION_LENGTH__+0x700146>
+     b4a:	a0 e4       	ldi	r26, 0x40	; 64
+     b4c:	b1 e0       	ldi	r27, 0x01	; 1
+     b4e:	9c 93       	st	X, r25
+     b50:	10 92 41 01 	sts	0x0141, r1	; 0x800141 <__TEXT_REGION_LENGTH__+0x700141>
+     b54:	30 93 42 01 	sts	0x0142, r19	; 0x800142 <__TEXT_REGION_LENGTH__+0x700142>
+     b58:	32 e0       	ldi	r19, 0x02	; 2
+     b5a:	30 93 43 01 	sts	0x0143, r19	; 0x800143 <__TEXT_REGION_LENGTH__+0x700143>
+     b5e:	40 91 02 20 	lds	r20, 0x2002	; 0x802002 <auxDacBufLen>
+     b62:	50 91 03 20 	lds	r21, 0x2003	; 0x802003 <auxDacBufLen+0x1>
+     b66:	40 93 44 01 	sts	0x0144, r20	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
+     b6a:	50 93 45 01 	sts	0x0145, r21	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
+     b6e:	4a e7       	ldi	r20, 0x7A	; 122
+     b70:	54 e2       	ldi	r21, 0x24	; 36
+     b72:	40 93 48 01 	sts	0x0148, r20	; 0x800148 <__TEXT_REGION_LENGTH__+0x700148>
+     b76:	50 93 49 01 	sts	0x0149, r21	; 0x800149 <__TEXT_REGION_LENGTH__+0x700149>
+     b7a:	10 92 4a 01 	sts	0x014A, r1	; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a>
+     b7e:	2b e3       	ldi	r18, 0x3B	; 59
+     b80:	20 93 4c 01 	sts	0x014C, r18	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
+     b84:	80 93 4d 01 	sts	0x014D, r24	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
+     b88:	10 92 4e 01 	sts	0x014E, r1	; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e>
+     b8c:	2c 91       	ld	r18, X
+     b8e:	20 68       	ori	r18, 0x80	; 128
+     b90:	2c 93       	st	X, r18
      b92:	10 8a       	std	Z+16, r1	; 0x10
-     b94:	80 e4       	ldi	r24, 0x40	; 64
-     b96:	80 8b       	std	Z+16, r24	; 0x10
-     b98:	85 e0       	ldi	r24, 0x05	; 5
-     b9a:	80 8b       	std	Z+16, r24	; 0x10
-     b9c:	11 8a       	std	Z+17, r1	; 0x11
+     b94:	20 e4       	ldi	r18, 0x40	; 64
+     b96:	20 8b       	std	Z+16, r18	; 0x10
+     b98:	25 e0       	ldi	r18, 0x05	; 5
+     b9a:	20 8b       	std	Z+16, r18	; 0x10
+     b9c:	81 8b       	std	Z+17, r24	; 0x11
      b9e:	81 e9       	ldi	r24, 0x91	; 145
      ba0:	82 8b       	std	Z+18, r24	; 0x12
      ba2:	80 e1       	ldi	r24, 0x10	; 16
      ba4:	83 8b       	std	Z+19, r24	; 0x13
-     ba6:	2e ee       	ldi	r18, 0xEE	; 238
-     ba8:	32 e0       	ldi	r19, 0x02	; 2
-     baa:	24 8b       	std	Z+20, r18	; 0x14
-     bac:	35 8b       	std	Z+21, r19	; 0x15
-     bae:	84 e2       	ldi	r24, 0x24	; 36
-     bb0:	80 8f       	std	Z+24, r24	; 0x18
-     bb2:	82 e0       	ldi	r24, 0x02	; 2
-     bb4:	81 8f       	std	Z+25, r24	; 0x19
-     bb6:	12 8e       	std	Z+26, r1	; 0x1a
-     bb8:	40 91 c3 20 	lds	r20, 0x20C3	; 0x8020c3 <b1_state>
-     bbc:	42 9f       	mul	r20, r18
-     bbe:	c0 01       	movw	r24, r0
-     bc0:	43 9f       	mul	r20, r19
-     bc2:	90 0d       	add	r25, r0
-     bc4:	11 24       	eor	r1, r1
-     bc6:	86 58       	subi	r24, 0x86	; 134
-     bc8:	99 4d       	sbci	r25, 0xD9	; 217
-     bca:	84 8f       	std	Z+28, r24	; 0x1c
-     bcc:	40 91 c3 20 	lds	r20, 0x20C3	; 0x8020c3 <b1_state>
-     bd0:	42 9f       	mul	r20, r18
-     bd2:	c0 01       	movw	r24, r0
-     bd4:	43 9f       	mul	r20, r19
-     bd6:	90 0d       	add	r25, r0
-     bd8:	11 24       	eor	r1, r1
-     bda:	86 58       	subi	r24, 0x86	; 134
-     bdc:	99 4d       	sbci	r25, 0xD9	; 217
-     bde:	95 8f       	std	Z+29, r25	; 0x1d
-     be0:	16 8e       	std	Z+30, r1	; 0x1e
-     be2:	80 89       	ldd	r24, Z+16	; 0x10
-     be4:	80 68       	ori	r24, 0x80	; 128
-     be6:	80 8b       	std	Z+16, r24	; 0x10
-     be8:	08 95       	ret
+     ba6:	4e ee       	ldi	r20, 0xEE	; 238
+     ba8:	52 e0       	ldi	r21, 0x02	; 2
+     baa:	44 8b       	std	Z+20, r20	; 0x14
+     bac:	55 8b       	std	Z+21, r21	; 0x15
+     bae:	90 8f       	std	Z+24, r25	; 0x18
+     bb0:	31 8f       	std	Z+25, r19	; 0x19
+     bb2:	12 8e       	std	Z+26, r1	; 0x1a
+     bb4:	8a e7       	ldi	r24, 0x7A	; 122
+     bb6:	96 e2       	ldi	r25, 0x26	; 38
+     bb8:	84 8f       	std	Z+28, r24	; 0x1c
+     bba:	95 8f       	std	Z+29, r25	; 0x1d
+     bbc:	16 8e       	std	Z+30, r1	; 0x1e
+     bbe:	80 89       	ldd	r24, Z+16	; 0x10
+     bc0:	80 68       	ori	r24, 0x80	; 128
+     bc2:	80 8b       	std	Z+16, r24	; 0x10
+     bc4:	08 95       	ret
 
-00000bea <__vector_6>:
-     bea:	1f 92       	push	r1
-     bec:	0f 92       	push	r0
-     bee:	0f b6       	in	r0, 0x3f	; 63
-     bf0:	0f 92       	push	r0
-     bf2:	11 24       	eor	r1, r1
-     bf4:	2f 93       	push	r18
-     bf6:	3f 93       	push	r19
-     bf8:	4f 93       	push	r20
-     bfa:	8f 93       	push	r24
-     bfc:	9f 93       	push	r25
-     bfe:	81 e0       	ldi	r24, 0x01	; 1
-     c00:	80 93 03 01 	sts	0x0103, r24	; 0x800103 <__TEXT_REGION_LENGTH__+0x700103>
-     c04:	80 91 00 20 	lds	r24, 0x2000	; 0x802000 <__data_start>
-     c08:	82 30       	cpi	r24, 0x02	; 2
-     c0a:	51 f0       	breq	.+20     	; 0xc20 <__vector_6+0x36>
-     c0c:	28 f4       	brcc	.+10     	; 0xc18 <__vector_6+0x2e>
-     c0e:	88 23       	and	r24, r24
-     c10:	39 f0       	breq	.+14     	; 0xc20 <__vector_6+0x36>
-     c12:	81 30       	cpi	r24, 0x01	; 1
-     c14:	29 f0       	breq	.+10     	; 0xc20 <__vector_6+0x36>
-     c16:	2e c0       	rjmp	.+92     	; 0xc74 <__vector_6+0x8a>
-     c18:	83 30       	cpi	r24, 0x03	; 3
-     c1a:	11 f0       	breq	.+4      	; 0xc20 <__vector_6+0x36>
-     c1c:	84 30       	cpi	r24, 0x04	; 4
-     c1e:	51 f5       	brne	.+84     	; 0xc74 <__vector_6+0x8a>
-     c20:	87 e7       	ldi	r24, 0x77	; 119
-     c22:	91 e0       	ldi	r25, 0x01	; 1
-     c24:	80 93 14 01 	sts	0x0114, r24	; 0x800114 <__TEXT_REGION_LENGTH__+0x700114>
-     c28:	90 93 15 01 	sts	0x0115, r25	; 0x800115 <__TEXT_REGION_LENGTH__+0x700115>
-     c2c:	40 91 c3 20 	lds	r20, 0x20C3	; 0x8020c3 <b1_state>
-     c30:	2e ee       	ldi	r18, 0xEE	; 238
-     c32:	32 e0       	ldi	r19, 0x02	; 2
-     c34:	42 9f       	mul	r20, r18
-     c36:	c0 01       	movw	r24, r0
-     c38:	43 9f       	mul	r20, r19
-     c3a:	90 0d       	add	r25, r0
-     c3c:	11 24       	eor	r1, r1
-     c3e:	86 58       	subi	r24, 0x86	; 134
-     c40:	99 4d       	sbci	r25, 0xD9	; 217
-     c42:	80 93 1c 01 	sts	0x011C, r24	; 0x80011c <__TEXT_REGION_LENGTH__+0x70011c>
-     c46:	40 91 c3 20 	lds	r20, 0x20C3	; 0x8020c3 <b1_state>
-     c4a:	42 9f       	mul	r20, r18
-     c4c:	c0 01       	movw	r24, r0
-     c4e:	43 9f       	mul	r20, r19
-     c50:	90 0d       	add	r25, r0
-     c52:	11 24       	eor	r1, r1
-     c54:	86 58       	subi	r24, 0x86	; 134
-     c56:	99 4d       	sbci	r25, 0xD9	; 217
-     c58:	90 93 1d 01 	sts	0x011D, r25	; 0x80011d <__TEXT_REGION_LENGTH__+0x70011d>
-     c5c:	80 91 10 01 	lds	r24, 0x0110	; 0x800110 <__TEXT_REGION_LENGTH__+0x700110>
-     c60:	80 68       	ori	r24, 0x80	; 128
-     c62:	80 93 10 01 	sts	0x0110, r24	; 0x800110 <__TEXT_REGION_LENGTH__+0x700110>
-     c66:	90 91 c3 20 	lds	r25, 0x20C3	; 0x8020c3 <b1_state>
-     c6a:	81 e0       	ldi	r24, 0x01	; 1
-     c6c:	91 11       	cpse	r25, r1
-     c6e:	80 e0       	ldi	r24, 0x00	; 0
-     c70:	80 93 c3 20 	sts	0x20C3, r24	; 0x8020c3 <b1_state>
-     c74:	9f 91       	pop	r25
-     c76:	8f 91       	pop	r24
-     c78:	4f 91       	pop	r20
-     c7a:	3f 91       	pop	r19
-     c7c:	2f 91       	pop	r18
+00000bc6 <tiny_dma_loop_mode_7>:
+     bc6:	08 95       	ret
+
+00000bc8 <__vector_6>:
+     bc8:	1f 92       	push	r1
+     bca:	0f 92       	push	r0
+     bcc:	0f b6       	in	r0, 0x3f	; 63
+     bce:	0f 92       	push	r0
+     bd0:	11 24       	eor	r1, r1
+     bd2:	2f 93       	push	r18
+     bd4:	3f 93       	push	r19
+     bd6:	4f 93       	push	r20
+     bd8:	8f 93       	push	r24
+     bda:	9f 93       	push	r25
+     bdc:	af 93       	push	r26
+     bde:	bf 93       	push	r27
+     be0:	ef 93       	push	r30
+     be2:	ff 93       	push	r31
+     be4:	81 e0       	ldi	r24, 0x01	; 1
+     be6:	80 93 03 01 	sts	0x0103, r24	; 0x800103 <__TEXT_REGION_LENGTH__+0x700103>
+     bea:	e0 91 00 20 	lds	r30, 0x2000	; 0x802000 <__data_start>
+     bee:	8e 2f       	mov	r24, r30
+     bf0:	90 e0       	ldi	r25, 0x00	; 0
+     bf2:	88 30       	cpi	r24, 0x08	; 8
+     bf4:	91 05       	cpc	r25, r1
+     bf6:	c0 f5       	brcc	.+112    	; 0xc68 <__vector_6+0xa0>
+     bf8:	fc 01       	movw	r30, r24
+     bfa:	ea 5f       	subi	r30, 0xFA	; 250
+     bfc:	fe 4f       	sbci	r31, 0xFE	; 254
+     bfe:	0c 94 49 13 	jmp	0x2692	; 0x2692 <__tablejump2__>
+     c02:	87 e7       	ldi	r24, 0x77	; 119
+     c04:	91 e0       	ldi	r25, 0x01	; 1
+     c06:	80 93 14 01 	sts	0x0114, r24	; 0x800114 <__TEXT_REGION_LENGTH__+0x700114>
+     c0a:	90 93 15 01 	sts	0x0115, r25	; 0x800115 <__TEXT_REGION_LENGTH__+0x700115>
+     c0e:	40 91 c3 20 	lds	r20, 0x20C3	; 0x8020c3 <b1_state>
+     c12:	2e ee       	ldi	r18, 0xEE	; 238
+     c14:	32 e0       	ldi	r19, 0x02	; 2
+     c16:	08 c0       	rjmp	.+16     	; 0xc28 <__vector_6+0x60>
+     c18:	2e ee       	ldi	r18, 0xEE	; 238
+     c1a:	32 e0       	ldi	r19, 0x02	; 2
+     c1c:	20 93 14 01 	sts	0x0114, r18	; 0x800114 <__TEXT_REGION_LENGTH__+0x700114>
+     c20:	30 93 15 01 	sts	0x0115, r19	; 0x800115 <__TEXT_REGION_LENGTH__+0x700115>
+     c24:	40 91 c3 20 	lds	r20, 0x20C3	; 0x8020c3 <b1_state>
+     c28:	42 9f       	mul	r20, r18
+     c2a:	c0 01       	movw	r24, r0
+     c2c:	43 9f       	mul	r20, r19
+     c2e:	90 0d       	add	r25, r0
+     c30:	11 24       	eor	r1, r1
+     c32:	86 58       	subi	r24, 0x86	; 134
+     c34:	99 4d       	sbci	r25, 0xD9	; 217
+     c36:	80 93 1c 01 	sts	0x011C, r24	; 0x80011c <__TEXT_REGION_LENGTH__+0x70011c>
+     c3a:	40 91 c3 20 	lds	r20, 0x20C3	; 0x8020c3 <b1_state>
+     c3e:	42 9f       	mul	r20, r18
+     c40:	c0 01       	movw	r24, r0
+     c42:	43 9f       	mul	r20, r19
+     c44:	90 0d       	add	r25, r0
+     c46:	11 24       	eor	r1, r1
+     c48:	86 58       	subi	r24, 0x86	; 134
+     c4a:	99 4d       	sbci	r25, 0xD9	; 217
+     c4c:	90 93 1d 01 	sts	0x011D, r25	; 0x80011d <__TEXT_REGION_LENGTH__+0x70011d>
+     c50:	80 91 10 01 	lds	r24, 0x0110	; 0x800110 <__TEXT_REGION_LENGTH__+0x700110>
+     c54:	80 68       	ori	r24, 0x80	; 128
+     c56:	80 93 10 01 	sts	0x0110, r24	; 0x800110 <__TEXT_REGION_LENGTH__+0x700110>
+     c5a:	90 91 c3 20 	lds	r25, 0x20C3	; 0x8020c3 <b1_state>
+     c5e:	81 e0       	ldi	r24, 0x01	; 1
+     c60:	91 11       	cpse	r25, r1
+     c62:	80 e0       	ldi	r24, 0x00	; 0
+     c64:	80 93 c3 20 	sts	0x20C3, r24	; 0x8020c3 <b1_state>
+     c68:	ff 91       	pop	r31
+     c6a:	ef 91       	pop	r30
+     c6c:	bf 91       	pop	r27
+     c6e:	af 91       	pop	r26
+     c70:	9f 91       	pop	r25
+     c72:	8f 91       	pop	r24
+     c74:	4f 91       	pop	r20
+     c76:	3f 91       	pop	r19
+     c78:	2f 91       	pop	r18
+     c7a:	0f 90       	pop	r0
+     c7c:	0f be       	out	0x3f, r0	; 63
      c7e:	0f 90       	pop	r0
-     c80:	0f be       	out	0x3f, r0	; 63
-     c82:	0f 90       	pop	r0
-     c84:	1f 90       	pop	r1
-     c86:	18 95       	reti
+     c80:	1f 90       	pop	r1
+     c82:	18 95       	reti
 
-00000c88 <__vector_7>:
-     c88:	1f 92       	push	r1
+00000c84 <__vector_7>:
+     c84:	1f 92       	push	r1
+     c86:	0f 92       	push	r0
+     c88:	0f b6       	in	r0, 0x3f	; 63
      c8a:	0f 92       	push	r0
-     c8c:	0f b6       	in	r0, 0x3f	; 63
-     c8e:	0f 92       	push	r0
-     c90:	11 24       	eor	r1, r1
-     c92:	2f 93       	push	r18
-     c94:	3f 93       	push	r19
-     c96:	4f 93       	push	r20
-     c98:	8f 93       	push	r24
-     c9a:	9f 93       	push	r25
-     c9c:	82 e0       	ldi	r24, 0x02	; 2
-     c9e:	80 93 03 01 	sts	0x0103, r24	; 0x800103 <__TEXT_REGION_LENGTH__+0x700103>
-     ca2:	80 91 00 20 	lds	r24, 0x2000	; 0x802000 <__data_start>
-     ca6:	81 30       	cpi	r24, 0x01	; 1
-     ca8:	11 f0       	breq	.+4      	; 0xcae <__vector_7+0x26>
-     caa:	82 30       	cpi	r24, 0x02	; 2
-     cac:	51 f5       	brne	.+84     	; 0xd02 <__vector_7+0x7a>
-     cae:	87 e7       	ldi	r24, 0x77	; 119
-     cb0:	91 e0       	ldi	r25, 0x01	; 1
-     cb2:	80 93 24 01 	sts	0x0124, r24	; 0x800124 <__TEXT_REGION_LENGTH__+0x700124>
-     cb6:	90 93 25 01 	sts	0x0125, r25	; 0x800125 <__TEXT_REGION_LENGTH__+0x700125>
-     cba:	40 91 c2 20 	lds	r20, 0x20C2	; 0x8020c2 <b2_state>
-     cbe:	2e ee       	ldi	r18, 0xEE	; 238
-     cc0:	32 e0       	ldi	r19, 0x02	; 2
-     cc2:	42 9f       	mul	r20, r18
-     cc4:	c0 01       	movw	r24, r0
-     cc6:	43 9f       	mul	r20, r19
-     cc8:	90 0d       	add	r25, r0
-     cca:	11 24       	eor	r1, r1
-     ccc:	8f 50       	subi	r24, 0x0F	; 15
-     cce:	98 4d       	sbci	r25, 0xD8	; 216
-     cd0:	80 93 2c 01 	sts	0x012C, r24	; 0x80012c <__TEXT_REGION_LENGTH__+0x70012c>
-     cd4:	40 91 c2 20 	lds	r20, 0x20C2	; 0x8020c2 <b2_state>
-     cd8:	42 9f       	mul	r20, r18
-     cda:	c0 01       	movw	r24, r0
-     cdc:	43 9f       	mul	r20, r19
-     cde:	90 0d       	add	r25, r0
-     ce0:	11 24       	eor	r1, r1
-     ce2:	8f 50       	subi	r24, 0x0F	; 15
-     ce4:	98 4d       	sbci	r25, 0xD8	; 216
-     ce6:	90 93 2d 01 	sts	0x012D, r25	; 0x80012d <__TEXT_REGION_LENGTH__+0x70012d>
-     cea:	80 91 20 01 	lds	r24, 0x0120	; 0x800120 <__TEXT_REGION_LENGTH__+0x700120>
-     cee:	80 68       	ori	r24, 0x80	; 128
-     cf0:	80 93 20 01 	sts	0x0120, r24	; 0x800120 <__TEXT_REGION_LENGTH__+0x700120>
-     cf4:	90 91 c2 20 	lds	r25, 0x20C2	; 0x8020c2 <b2_state>
-     cf8:	81 e0       	ldi	r24, 0x01	; 1
-     cfa:	91 11       	cpse	r25, r1
-     cfc:	80 e0       	ldi	r24, 0x00	; 0
-     cfe:	80 93 c2 20 	sts	0x20C2, r24	; 0x8020c2 <b2_state>
-     d02:	9f 91       	pop	r25
-     d04:	8f 91       	pop	r24
-     d06:	4f 91       	pop	r20
-     d08:	3f 91       	pop	r19
-     d0a:	2f 91       	pop	r18
+     c8c:	11 24       	eor	r1, r1
+     c8e:	2f 93       	push	r18
+     c90:	3f 93       	push	r19
+     c92:	4f 93       	push	r20
+     c94:	8f 93       	push	r24
+     c96:	9f 93       	push	r25
+     c98:	82 e0       	ldi	r24, 0x02	; 2
+     c9a:	80 93 03 01 	sts	0x0103, r24	; 0x800103 <__TEXT_REGION_LENGTH__+0x700103>
+     c9e:	80 91 00 20 	lds	r24, 0x2000	; 0x802000 <__data_start>
+     ca2:	81 30       	cpi	r24, 0x01	; 1
+     ca4:	11 f0       	breq	.+4      	; 0xcaa <__vector_7+0x26>
+     ca6:	82 30       	cpi	r24, 0x02	; 2
+     ca8:	51 f5       	brne	.+84     	; 0xcfe <__vector_7+0x7a>
+     caa:	87 e7       	ldi	r24, 0x77	; 119
+     cac:	91 e0       	ldi	r25, 0x01	; 1
+     cae:	80 93 24 01 	sts	0x0124, r24	; 0x800124 <__TEXT_REGION_LENGTH__+0x700124>
+     cb2:	90 93 25 01 	sts	0x0125, r25	; 0x800125 <__TEXT_REGION_LENGTH__+0x700125>
+     cb6:	40 91 c2 20 	lds	r20, 0x20C2	; 0x8020c2 <b2_state>
+     cba:	2e ee       	ldi	r18, 0xEE	; 238
+     cbc:	32 e0       	ldi	r19, 0x02	; 2
+     cbe:	42 9f       	mul	r20, r18
+     cc0:	c0 01       	movw	r24, r0
+     cc2:	43 9f       	mul	r20, r19
+     cc4:	90 0d       	add	r25, r0
+     cc6:	11 24       	eor	r1, r1
+     cc8:	8f 50       	subi	r24, 0x0F	; 15
+     cca:	98 4d       	sbci	r25, 0xD8	; 216
+     ccc:	80 93 2c 01 	sts	0x012C, r24	; 0x80012c <__TEXT_REGION_LENGTH__+0x70012c>
+     cd0:	40 91 c2 20 	lds	r20, 0x20C2	; 0x8020c2 <b2_state>
+     cd4:	42 9f       	mul	r20, r18
+     cd6:	c0 01       	movw	r24, r0
+     cd8:	43 9f       	mul	r20, r19
+     cda:	90 0d       	add	r25, r0
+     cdc:	11 24       	eor	r1, r1
+     cde:	8f 50       	subi	r24, 0x0F	; 15
+     ce0:	98 4d       	sbci	r25, 0xD8	; 216
+     ce2:	90 93 2d 01 	sts	0x012D, r25	; 0x80012d <__TEXT_REGION_LENGTH__+0x70012d>
+     ce6:	80 91 20 01 	lds	r24, 0x0120	; 0x800120 <__TEXT_REGION_LENGTH__+0x700120>
+     cea:	80 68       	ori	r24, 0x80	; 128
+     cec:	80 93 20 01 	sts	0x0120, r24	; 0x800120 <__TEXT_REGION_LENGTH__+0x700120>
+     cf0:	90 91 c2 20 	lds	r25, 0x20C2	; 0x8020c2 <b2_state>
+     cf4:	81 e0       	ldi	r24, 0x01	; 1
+     cf6:	91 11       	cpse	r25, r1
+     cf8:	80 e0       	ldi	r24, 0x00	; 0
+     cfa:	80 93 c2 20 	sts	0x20C2, r24	; 0x8020c2 <b2_state>
+     cfe:	9f 91       	pop	r25
+     d00:	8f 91       	pop	r24
+     d02:	4f 91       	pop	r20
+     d04:	3f 91       	pop	r19
+     d06:	2f 91       	pop	r18
+     d08:	0f 90       	pop	r0
+     d0a:	0f be       	out	0x3f, r0	; 63
      d0c:	0f 90       	pop	r0
-     d0e:	0f be       	out	0x3f, r0	; 63
-     d10:	0f 90       	pop	r0
-     d12:	1f 90       	pop	r1
-     d14:	18 95       	reti
+     d0e:	1f 90       	pop	r1
+     d10:	18 95       	reti
 
-00000d16 <__vector_9>:
-     d16:	1f 92       	push	r1
+00000d12 <__vector_8>:
+     d12:	1f 92       	push	r1
+     d14:	0f 92       	push	r0
+     d16:	0f b6       	in	r0, 0x3f	; 63
      d18:	0f 92       	push	r0
-     d1a:	0f b6       	in	r0, 0x3f	; 63
-     d1c:	0f 92       	push	r0
-     d1e:	11 24       	eor	r1, r1
-     d20:	2f 93       	push	r18
-     d22:	3f 93       	push	r19
-     d24:	4f 93       	push	r20
-     d26:	8f 93       	push	r24
-     d28:	9f 93       	push	r25
-     d2a:	87 e7       	ldi	r24, 0x77	; 119
-     d2c:	91 e0       	ldi	r25, 0x01	; 1
-     d2e:	80 93 44 01 	sts	0x0144, r24	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
-     d32:	90 93 45 01 	sts	0x0145, r25	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
-     d36:	40 91 c2 20 	lds	r20, 0x20C2	; 0x8020c2 <b2_state>
-     d3a:	2e ee       	ldi	r18, 0xEE	; 238
-     d3c:	32 e0       	ldi	r19, 0x02	; 2
-     d3e:	42 9f       	mul	r20, r18
-     d40:	c0 01       	movw	r24, r0
-     d42:	43 9f       	mul	r20, r19
-     d44:	90 0d       	add	r25, r0
-     d46:	11 24       	eor	r1, r1
-     d48:	8f 50       	subi	r24, 0x0F	; 15
-     d4a:	98 4d       	sbci	r25, 0xD8	; 216
-     d4c:	80 93 4c 01 	sts	0x014C, r24	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
-     d50:	40 91 c2 20 	lds	r20, 0x20C2	; 0x8020c2 <b2_state>
-     d54:	42 9f       	mul	r20, r18
-     d56:	c0 01       	movw	r24, r0
-     d58:	43 9f       	mul	r20, r19
-     d5a:	90 0d       	add	r25, r0
-     d5c:	11 24       	eor	r1, r1
-     d5e:	8f 50       	subi	r24, 0x0F	; 15
-     d60:	98 4d       	sbci	r25, 0xD8	; 216
-     d62:	90 93 4d 01 	sts	0x014D, r25	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
-     d66:	80 91 40 01 	lds	r24, 0x0140	; 0x800140 <__TEXT_REGION_LENGTH__+0x700140>
-     d6a:	80 68       	ori	r24, 0x80	; 128
-     d6c:	80 93 40 01 	sts	0x0140, r24	; 0x800140 <__TEXT_REGION_LENGTH__+0x700140>
-     d70:	90 91 c2 20 	lds	r25, 0x20C2	; 0x8020c2 <b2_state>
-     d74:	81 e0       	ldi	r24, 0x01	; 1
-     d76:	91 11       	cpse	r25, r1
-     d78:	80 e0       	ldi	r24, 0x00	; 0
-     d7a:	80 93 c2 20 	sts	0x20C2, r24	; 0x8020c2 <b2_state>
-     d7e:	9f 91       	pop	r25
-     d80:	8f 91       	pop	r24
-     d82:	4f 91       	pop	r20
-     d84:	3f 91       	pop	r19
-     d86:	2f 91       	pop	r18
-     d88:	0f 90       	pop	r0
-     d8a:	0f be       	out	0x3f, r0	; 63
-     d8c:	0f 90       	pop	r0
-     d8e:	1f 90       	pop	r1
-     d90:	18 95       	reti
+     d1a:	11 24       	eor	r1, r1
+     d1c:	2f 93       	push	r18
+     d1e:	3f 93       	push	r19
+     d20:	4f 93       	push	r20
+     d22:	8f 93       	push	r24
+     d24:	9f 93       	push	r25
+     d26:	84 e0       	ldi	r24, 0x04	; 4
+     d28:	80 93 03 01 	sts	0x0103, r24	; 0x800103 <__TEXT_REGION_LENGTH__+0x700103>
+     d2c:	87 e7       	ldi	r24, 0x77	; 119
+     d2e:	91 e0       	ldi	r25, 0x01	; 1
+     d30:	80 93 34 01 	sts	0x0134, r24	; 0x800134 <__TEXT_REGION_LENGTH__+0x700134>
+     d34:	90 93 35 01 	sts	0x0135, r25	; 0x800135 <__TEXT_REGION_LENGTH__+0x700135>
+     d38:	40 91 c2 20 	lds	r20, 0x20C2	; 0x8020c2 <b2_state>
+     d3c:	2e ee       	ldi	r18, 0xEE	; 238
+     d3e:	32 e0       	ldi	r19, 0x02	; 2
+     d40:	42 9f       	mul	r20, r18
+     d42:	c0 01       	movw	r24, r0
+     d44:	43 9f       	mul	r20, r19
+     d46:	90 0d       	add	r25, r0
+     d48:	11 24       	eor	r1, r1
+     d4a:	8f 50       	subi	r24, 0x0F	; 15
+     d4c:	98 4d       	sbci	r25, 0xD8	; 216
+     d4e:	80 93 3c 01 	sts	0x013C, r24	; 0x80013c <__TEXT_REGION_LENGTH__+0x70013c>
+     d52:	40 91 c2 20 	lds	r20, 0x20C2	; 0x8020c2 <b2_state>
+     d56:	42 9f       	mul	r20, r18
+     d58:	c0 01       	movw	r24, r0
+     d5a:	43 9f       	mul	r20, r19
+     d5c:	90 0d       	add	r25, r0
+     d5e:	11 24       	eor	r1, r1
+     d60:	8f 50       	subi	r24, 0x0F	; 15
+     d62:	98 4d       	sbci	r25, 0xD8	; 216
+     d64:	90 93 3d 01 	sts	0x013D, r25	; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d>
+     d68:	80 91 30 01 	lds	r24, 0x0130	; 0x800130 <__TEXT_REGION_LENGTH__+0x700130>
+     d6c:	80 68       	ori	r24, 0x80	; 128
+     d6e:	80 93 30 01 	sts	0x0130, r24	; 0x800130 <__TEXT_REGION_LENGTH__+0x700130>
+     d72:	90 91 c2 20 	lds	r25, 0x20C2	; 0x8020c2 <b2_state>
+     d76:	81 e0       	ldi	r24, 0x01	; 1
+     d78:	91 11       	cpse	r25, r1
+     d7a:	80 e0       	ldi	r24, 0x00	; 0
+     d7c:	80 93 c2 20 	sts	0x20C2, r24	; 0x8020c2 <b2_state>
+     d80:	9f 91       	pop	r25
+     d82:	8f 91       	pop	r24
+     d84:	4f 91       	pop	r20
+     d86:	3f 91       	pop	r19
+     d88:	2f 91       	pop	r18
+     d8a:	0f 90       	pop	r0
+     d8c:	0f be       	out	0x3f, r0	; 63
+     d8e:	0f 90       	pop	r0
+     d90:	1f 90       	pop	r1
+     d92:	18 95       	reti
 
-00000d92 <tiny_timer_setup>:
-     d92:	e0 e7       	ldi	r30, 0x70	; 112
-     d94:	f0 e0       	ldi	r31, 0x00	; 0
-     d96:	83 81       	ldd	r24, Z+3	; 0x03
-     d98:	8c 7f       	andi	r24, 0xFC	; 252
-     d9a:	83 83       	std	Z+3, r24	; 0x03
-     d9c:	84 81       	ldd	r24, Z+4	; 0x04
-     d9e:	8c 7f       	andi	r24, 0xFC	; 252
-     da0:	84 83       	std	Z+4, r24	; 0x04
-     da2:	80 81       	ld	r24, Z
-     da4:	8d 7f       	andi	r24, 0xFD	; 253
-     da6:	80 83       	st	Z, r24
-     da8:	e0 e8       	ldi	r30, 0x80	; 128
-     daa:	f1 e0       	ldi	r31, 0x01	; 1
-     dac:	80 ec       	ldi	r24, 0xC0	; 192
-     dae:	82 83       	std	Z+2, r24	; 0x02
-     db0:	12 86       	std	Z+10, r1	; 0x0a
-     db2:	88 ec       	ldi	r24, 0xC8	; 200
-     db4:	81 83       	std	Z+1, r24	; 0x01
-     db6:	11 86       	std	Z+9, r1	; 0x09
-     db8:	e0 e0       	ldi	r30, 0x00	; 0
-     dba:	f8 e0       	ldi	r31, 0x08	; 8
-     dbc:	34 e0       	ldi	r19, 0x04	; 4
-     dbe:	30 83       	st	Z, r19
-     dc0:	23 e0       	ldi	r18, 0x03	; 3
-     dc2:	21 83       	std	Z+1, r18	; 0x01
-     dc4:	14 82       	std	Z+4, r1	; 0x04
-     dc6:	85 ed       	ldi	r24, 0xD5	; 213
-     dc8:	91 e0       	ldi	r25, 0x01	; 1
-     dca:	86 a3       	std	Z+38, r24	; 0x26
-     dcc:	97 a3       	std	Z+39, r25	; 0x27
-     dce:	16 82       	std	Z+6, r1	; 0x06
-     dd0:	e0 e4       	ldi	r30, 0x40	; 64
-     dd2:	f8 e0       	ldi	r31, 0x08	; 8
-     dd4:	30 83       	st	Z, r19
-     dd6:	21 83       	std	Z+1, r18	; 0x01
-     dd8:	14 82       	std	Z+4, r1	; 0x04
-     dda:	86 a3       	std	Z+38, r24	; 0x26
-     ddc:	97 a3       	std	Z+39, r25	; 0x27
-     dde:	16 82       	std	Z+6, r1	; 0x06
-     de0:	e0 e6       	ldi	r30, 0x60	; 96
-     de2:	f6 e0       	ldi	r31, 0x06	; 6
-     de4:	80 81       	ld	r24, Z
-     de6:	80 61       	ori	r24, 0x10	; 16
-     de8:	80 83       	st	Z, r24
-     dea:	e0 e4       	ldi	r30, 0x40	; 64
-     dec:	f9 e0       	ldi	r31, 0x09	; 9
-     dee:	83 e1       	ldi	r24, 0x13	; 19
-     df0:	81 83       	std	Z+1, r24	; 0x01
-     df2:	14 82       	std	Z+4, r1	; 0x04
-     df4:	81 e0       	ldi	r24, 0x01	; 1
-     df6:	86 83       	std	Z+6, r24	; 0x06
-     df8:	28 eb       	ldi	r18, 0xB8	; 184
-     dfa:	3b e0       	ldi	r19, 0x0B	; 11
-     dfc:	26 a3       	std	Z+38, r18	; 0x26
-     dfe:	37 a3       	std	Z+39, r19	; 0x27
-     e00:	10 a6       	std	Z+40, r1	; 0x28
-     e02:	11 a6       	std	Z+41, r1	; 0x29
-     e04:	80 83       	st	Z, r24
-     e06:	08 95       	ret
+00000d94 <__vector_9>:
+     d94:	1f 92       	push	r1
+     d96:	0f 92       	push	r0
+     d98:	0f b6       	in	r0, 0x3f	; 63
+     d9a:	0f 92       	push	r0
+     d9c:	11 24       	eor	r1, r1
+     d9e:	2f 93       	push	r18
+     da0:	3f 93       	push	r19
+     da2:	4f 93       	push	r20
+     da4:	8f 93       	push	r24
+     da6:	9f 93       	push	r25
+     da8:	88 e0       	ldi	r24, 0x08	; 8
+     daa:	80 93 03 01 	sts	0x0103, r24	; 0x800103 <__TEXT_REGION_LENGTH__+0x700103>
+     dae:	87 e7       	ldi	r24, 0x77	; 119
+     db0:	91 e0       	ldi	r25, 0x01	; 1
+     db2:	80 93 44 01 	sts	0x0144, r24	; 0x800144 <__TEXT_REGION_LENGTH__+0x700144>
+     db6:	90 93 45 01 	sts	0x0145, r25	; 0x800145 <__TEXT_REGION_LENGTH__+0x700145>
+     dba:	40 91 c2 20 	lds	r20, 0x20C2	; 0x8020c2 <b2_state>
+     dbe:	2e ee       	ldi	r18, 0xEE	; 238
+     dc0:	32 e0       	ldi	r19, 0x02	; 2
+     dc2:	42 9f       	mul	r20, r18
+     dc4:	c0 01       	movw	r24, r0
+     dc6:	43 9f       	mul	r20, r19
+     dc8:	90 0d       	add	r25, r0
+     dca:	11 24       	eor	r1, r1
+     dcc:	8f 50       	subi	r24, 0x0F	; 15
+     dce:	98 4d       	sbci	r25, 0xD8	; 216
+     dd0:	80 93 4c 01 	sts	0x014C, r24	; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c>
+     dd4:	40 91 c2 20 	lds	r20, 0x20C2	; 0x8020c2 <b2_state>
+     dd8:	42 9f       	mul	r20, r18
+     dda:	c0 01       	movw	r24, r0
+     ddc:	43 9f       	mul	r20, r19
+     dde:	90 0d       	add	r25, r0
+     de0:	11 24       	eor	r1, r1
+     de2:	8f 50       	subi	r24, 0x0F	; 15
+     de4:	98 4d       	sbci	r25, 0xD8	; 216
+     de6:	90 93 4d 01 	sts	0x014D, r25	; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d>
+     dea:	80 91 40 01 	lds	r24, 0x0140	; 0x800140 <__TEXT_REGION_LENGTH__+0x700140>
+     dee:	80 68       	ori	r24, 0x80	; 128
+     df0:	80 93 40 01 	sts	0x0140, r24	; 0x800140 <__TEXT_REGION_LENGTH__+0x700140>
+     df4:	90 91 c2 20 	lds	r25, 0x20C2	; 0x8020c2 <b2_state>
+     df8:	81 e0       	ldi	r24, 0x01	; 1
+     dfa:	91 11       	cpse	r25, r1
+     dfc:	80 e0       	ldi	r24, 0x00	; 0
+     dfe:	80 93 c2 20 	sts	0x20C2, r24	; 0x8020c2 <b2_state>
+     e02:	9f 91       	pop	r25
+     e04:	8f 91       	pop	r24
+     e06:	4f 91       	pop	r20
+     e08:	3f 91       	pop	r19
+     e0a:	2f 91       	pop	r18
+     e0c:	0f 90       	pop	r0
+     e0e:	0f be       	out	0x3f, r0	; 63
+     e10:	0f 90       	pop	r0
+     e12:	1f 90       	pop	r1
+     e14:	18 95       	reti
 
-00000e08 <__vector_83>:
-     e08:	1f 92       	push	r1
-     e0a:	0f 92       	push	r0
-     e0c:	0f b6       	in	r0, 0x3f	; 63
-     e0e:	0f 92       	push	r0
-     e10:	11 24       	eor	r1, r1
-     e12:	2f 93       	push	r18
-     e14:	3f 93       	push	r19
-     e16:	4f 93       	push	r20
-     e18:	5f 93       	push	r21
-     e1a:	8f 93       	push	r24
-     e1c:	9f 93       	push	r25
-     e1e:	cf 93       	push	r28
-     e20:	df 93       	push	r29
-     e22:	1f 92       	push	r1
-     e24:	cd b7       	in	r28, 0x3d	; 61
-     e26:	de b7       	in	r29, 0x3e	; 62
-     e28:	80 91 00 20 	lds	r24, 0x2000	; 0x802000 <__data_start>
-     e2c:	87 30       	cpi	r24, 0x07	; 7
-     e2e:	31 f4       	brne	.+12     	; 0xe3c <__vector_83+0x34>
-     e30:	80 91 2c 02 	lds	r24, 0x022C	; 0x80022c <__TEXT_REGION_LENGTH__+0x70022c>
-     e34:	89 83       	std	Y+1, r24	; 0x01
-     e36:	90 91 2d 02 	lds	r25, 0x022D	; 0x80022d <__TEXT_REGION_LENGTH__+0x70022d>
-     e3a:	02 c0       	rjmp	.+4      	; 0xe40 <__vector_83+0x38>
-     e3c:	90 91 2c 02 	lds	r25, 0x022C	; 0x80022c <__TEXT_REGION_LENGTH__+0x70022c>
-     e40:	80 91 c0 20 	lds	r24, 0x20C0	; 0x8020c0 <__data_end>
-     e44:	89 1b       	sub	r24, r25
-     e46:	20 91 68 09 	lds	r18, 0x0968	; 0x800968 <__TEXT_REGION_LENGTH__+0x700968>
-     e4a:	30 91 69 09 	lds	r19, 0x0969	; 0x800969 <__TEXT_REGION_LENGTH__+0x700969>
-     e4e:	82 30       	cpi	r24, 0x02	; 2
-     e50:	8c f0       	brlt	.+34     	; 0xe74 <__vector_83+0x6c>
-     e52:	22 3b       	cpi	r18, 0xB2	; 178
-     e54:	3b 40       	sbci	r19, 0x0B	; 11
-     e56:	70 f4       	brcc	.+28     	; 0xe74 <__vector_83+0x6c>
-     e58:	20 91 68 09 	lds	r18, 0x0968	; 0x800968 <__TEXT_REGION_LENGTH__+0x700968>
-     e5c:	30 91 69 09 	lds	r19, 0x0969	; 0x800969 <__TEXT_REGION_LENGTH__+0x700969>
-     e60:	89 30       	cpi	r24, 0x09	; 9
-     e62:	1c f4       	brge	.+6      	; 0xe6a <__vector_83+0x62>
-     e64:	81 e0       	ldi	r24, 0x01	; 1
-     e66:	90 e0       	ldi	r25, 0x00	; 0
-     e68:	02 c0       	rjmp	.+4      	; 0xe6e <__vector_83+0x66>
-     e6a:	86 e0       	ldi	r24, 0x06	; 6
-     e6c:	90 e0       	ldi	r25, 0x00	; 0
-     e6e:	82 0f       	add	r24, r18
-     e70:	93 1f       	adc	r25, r19
-     e72:	18 c0       	rjmp	.+48     	; 0xea4 <__vector_83+0x9c>
-     e74:	20 91 68 09 	lds	r18, 0x0968	; 0x800968 <__TEXT_REGION_LENGTH__+0x700968>
-     e78:	30 91 69 09 	lds	r19, 0x0969	; 0x800969 <__TEXT_REGION_LENGTH__+0x700969>
-     e7c:	8f 3f       	cpi	r24, 0xFF	; 255
-     e7e:	b4 f4       	brge	.+44     	; 0xeac <__vector_83+0xa4>
-     e80:	27 30       	cpi	r18, 0x07	; 7
-     e82:	31 05       	cpc	r19, r1
-     e84:	98 f0       	brcs	.+38     	; 0xeac <__vector_83+0xa4>
-     e86:	20 91 68 09 	lds	r18, 0x0968	; 0x800968 <__TEXT_REGION_LENGTH__+0x700968>
-     e8a:	30 91 69 09 	lds	r19, 0x0969	; 0x800969 <__TEXT_REGION_LENGTH__+0x700969>
-     e8e:	88 3f       	cpi	r24, 0xF8	; 248
-     e90:	1c f0       	brlt	.+6      	; 0xe98 <__vector_83+0x90>
-     e92:	81 e0       	ldi	r24, 0x01	; 1
-     e94:	90 e0       	ldi	r25, 0x00	; 0
-     e96:	02 c0       	rjmp	.+4      	; 0xe9c <__vector_83+0x94>
-     e98:	86 e0       	ldi	r24, 0x06	; 6
-     e9a:	90 e0       	ldi	r25, 0x00	; 0
-     e9c:	a9 01       	movw	r20, r18
-     e9e:	48 1b       	sub	r20, r24
-     ea0:	59 0b       	sbc	r21, r25
-     ea2:	ca 01       	movw	r24, r20
-     ea4:	80 93 78 09 	sts	0x0978, r24	; 0x800978 <__TEXT_REGION_LENGTH__+0x700978>
-     ea8:	90 93 79 09 	sts	0x0979, r25	; 0x800979 <__TEXT_REGION_LENGTH__+0x700979>
-     eac:	0f 90       	pop	r0
-     eae:	df 91       	pop	r29
-     eb0:	cf 91       	pop	r28
-     eb2:	9f 91       	pop	r25
-     eb4:	8f 91       	pop	r24
-     eb6:	5f 91       	pop	r21
-     eb8:	4f 91       	pop	r20
-     eba:	3f 91       	pop	r19
-     ebc:	2f 91       	pop	r18
-     ebe:	0f 90       	pop	r0
-     ec0:	0f be       	out	0x3f, r0	; 63
-     ec2:	0f 90       	pop	r0
-     ec4:	1f 90       	pop	r1
-     ec6:	18 95       	reti
+00000e16 <tiny_timer_setup>:
+     e16:	e0 e7       	ldi	r30, 0x70	; 112
+     e18:	f0 e0       	ldi	r31, 0x00	; 0
+     e1a:	83 81       	ldd	r24, Z+3	; 0x03
+     e1c:	8c 7f       	andi	r24, 0xFC	; 252
+     e1e:	83 83       	std	Z+3, r24	; 0x03
+     e20:	84 81       	ldd	r24, Z+4	; 0x04
+     e22:	8c 7f       	andi	r24, 0xFC	; 252
+     e24:	84 83       	std	Z+4, r24	; 0x04
+     e26:	80 81       	ld	r24, Z
+     e28:	8d 7f       	andi	r24, 0xFD	; 253
+     e2a:	80 83       	st	Z, r24
+     e2c:	e0 e8       	ldi	r30, 0x80	; 128
+     e2e:	f1 e0       	ldi	r31, 0x01	; 1
+     e30:	80 ec       	ldi	r24, 0xC0	; 192
+     e32:	82 83       	std	Z+2, r24	; 0x02
+     e34:	12 86       	std	Z+10, r1	; 0x0a
+     e36:	88 ec       	ldi	r24, 0xC8	; 200
+     e38:	81 83       	std	Z+1, r24	; 0x01
+     e3a:	11 86       	std	Z+9, r1	; 0x09
+     e3c:	a0 e0       	ldi	r26, 0x00	; 0
+     e3e:	b8 e0       	ldi	r27, 0x08	; 8
+     e40:	34 e0       	ldi	r19, 0x04	; 4
+     e42:	3c 93       	st	X, r19
+     e44:	23 e0       	ldi	r18, 0x03	; 3
+     e46:	11 96       	adiw	r26, 0x01	; 1
+     e48:	2c 93       	st	X, r18
+     e4a:	11 97       	sbiw	r26, 0x01	; 1
+     e4c:	14 96       	adiw	r26, 0x04	; 4
+     e4e:	1c 92       	st	X, r1
+     e50:	14 97       	sbiw	r26, 0x04	; 4
+     e52:	85 ed       	ldi	r24, 0xD5	; 213
+     e54:	91 e0       	ldi	r25, 0x01	; 1
+     e56:	96 96       	adiw	r26, 0x26	; 38
+     e58:	8d 93       	st	X+, r24
+     e5a:	9c 93       	st	X, r25
+     e5c:	97 97       	sbiw	r26, 0x27	; 39
+     e5e:	16 96       	adiw	r26, 0x06	; 6
+     e60:	1c 92       	st	X, r1
+     e62:	16 97       	sbiw	r26, 0x06	; 6
+     e64:	e0 e4       	ldi	r30, 0x40	; 64
+     e66:	f8 e0       	ldi	r31, 0x08	; 8
+     e68:	30 83       	st	Z, r19
+     e6a:	21 83       	std	Z+1, r18	; 0x01
+     e6c:	14 82       	std	Z+4, r1	; 0x04
+     e6e:	86 a3       	std	Z+38, r24	; 0x26
+     e70:	97 a3       	std	Z+39, r25	; 0x27
+     e72:	16 82       	std	Z+6, r1	; 0x06
+     e74:	e0 e6       	ldi	r30, 0x60	; 96
+     e76:	f6 e0       	ldi	r31, 0x06	; 6
+     e78:	80 81       	ld	r24, Z
+     e7a:	80 61       	ori	r24, 0x10	; 16
+     e7c:	80 83       	st	Z, r24
+     e7e:	e0 e4       	ldi	r30, 0x40	; 64
+     e80:	f9 e0       	ldi	r31, 0x09	; 9
+     e82:	83 e1       	ldi	r24, 0x13	; 19
+     e84:	81 83       	std	Z+1, r24	; 0x01
+     e86:	14 82       	std	Z+4, r1	; 0x04
+     e88:	82 e0       	ldi	r24, 0x02	; 2
+     e8a:	86 83       	std	Z+6, r24	; 0x06
+     e8c:	a6 a3       	std	Z+38, r26	; 0x26
+     e8e:	b7 a3       	std	Z+39, r27	; 0x27
+     e90:	10 a6       	std	Z+40, r1	; 0x28
+     e92:	11 a6       	std	Z+41, r1	; 0x29
+     e94:	81 e0       	ldi	r24, 0x01	; 1
+     e96:	80 83       	st	Z, r24
+     e98:	08 95       	ret
 
-00000ec8 <tiny_uart_setup>:
-     ec8:	e0 e7       	ldi	r30, 0x70	; 112
-     eca:	f0 e0       	ldi	r31, 0x00	; 0
-     ecc:	83 81       	ldd	r24, Z+3	; 0x03
-     ece:	8f 7e       	andi	r24, 0xEF	; 239
-     ed0:	83 83       	std	Z+3, r24	; 0x03
-     ed2:	e0 e4       	ldi	r30, 0x40	; 64
-     ed4:	f6 e0       	ldi	r31, 0x06	; 6
-     ed6:	80 81       	ld	r24, Z
-     ed8:	8a 64       	ori	r24, 0x4A	; 74
-     eda:	80 83       	st	Z, r24
-     edc:	8f ef       	ldi	r24, 0xFF	; 255
-     ede:	84 83       	std	Z+4, r24	; 0x04
-     ee0:	88 e5       	ldi	r24, 0x58	; 88
-     ee2:	82 8b       	std	Z+18, r24	; 0x12
-     ee4:	80 e2       	ldi	r24, 0x20	; 32
-     ee6:	86 87       	std	Z+14, r24	; 0x0e
-     ee8:	e0 ea       	ldi	r30, 0xA0	; 160
-     eea:	f8 e0       	ldi	r31, 0x08	; 8
-     eec:	84 ec       	ldi	r24, 0xC4	; 196
-     eee:	85 83       	std	Z+5, r24	; 0x05
-     ef0:	83 e0       	ldi	r24, 0x03	; 3
-     ef2:	86 83       	std	Z+6, r24	; 0x06
-     ef4:	17 82       	std	Z+7, r1	; 0x07
-     ef6:	88 e1       	ldi	r24, 0x18	; 24
-     ef8:	84 83       	std	Z+4, r24	; 0x04
-     efa:	08 95       	ret
+00000e9a <__vector_83>:
+     e9a:	1f 92       	push	r1
+     e9c:	0f 92       	push	r0
+     e9e:	0f b6       	in	r0, 0x3f	; 63
+     ea0:	0f 92       	push	r0
+     ea2:	11 24       	eor	r1, r1
+     ea4:	2f 93       	push	r18
+     ea6:	3f 93       	push	r19
+     ea8:	4f 93       	push	r20
+     eaa:	5f 93       	push	r21
+     eac:	8f 93       	push	r24
+     eae:	9f 93       	push	r25
+     eb0:	cf 93       	push	r28
+     eb2:	df 93       	push	r29
+     eb4:	1f 92       	push	r1
+     eb6:	cd b7       	in	r28, 0x3d	; 61
+     eb8:	de b7       	in	r29, 0x3e	; 62
+     eba:	8f ef       	ldi	r24, 0xFF	; 255
+     ebc:	80 93 4c 09 	sts	0x094C, r24	; 0x80094c <__TEXT_REGION_LENGTH__+0x70094c>
+     ec0:	80 91 00 20 	lds	r24, 0x2000	; 0x802000 <__data_start>
+     ec4:	87 30       	cpi	r24, 0x07	; 7
+     ec6:	31 f4       	brne	.+12     	; 0xed4 <__vector_83+0x3a>
+     ec8:	80 91 2c 02 	lds	r24, 0x022C	; 0x80022c <__TEXT_REGION_LENGTH__+0x70022c>
+     ecc:	89 83       	std	Y+1, r24	; 0x01
+     ece:	90 91 2d 02 	lds	r25, 0x022D	; 0x80022d <__TEXT_REGION_LENGTH__+0x70022d>
+     ed2:	02 c0       	rjmp	.+4      	; 0xed8 <__vector_83+0x3e>
+     ed4:	90 91 2c 02 	lds	r25, 0x022C	; 0x80022c <__TEXT_REGION_LENGTH__+0x70022c>
+     ed8:	80 91 c0 20 	lds	r24, 0x20C0	; 0x8020c0 <__data_end>
+     edc:	89 1b       	sub	r24, r25
+     ede:	20 91 68 09 	lds	r18, 0x0968	; 0x800968 <__TEXT_REGION_LENGTH__+0x700968>
+     ee2:	30 91 69 09 	lds	r19, 0x0969	; 0x800969 <__TEXT_REGION_LENGTH__+0x700969>
+     ee6:	82 30       	cpi	r24, 0x02	; 2
+     ee8:	8c f0       	brlt	.+34     	; 0xf0c <__vector_83+0x72>
+     eea:	2a 3f       	cpi	r18, 0xFA	; 250
+     eec:	37 40       	sbci	r19, 0x07	; 7
+     eee:	70 f4       	brcc	.+28     	; 0xf0c <__vector_83+0x72>
+     ef0:	20 91 68 09 	lds	r18, 0x0968	; 0x800968 <__TEXT_REGION_LENGTH__+0x700968>
+     ef4:	30 91 69 09 	lds	r19, 0x0969	; 0x800969 <__TEXT_REGION_LENGTH__+0x700969>
+     ef8:	89 30       	cpi	r24, 0x09	; 9
+     efa:	1c f4       	brge	.+6      	; 0xf02 <__vector_83+0x68>
+     efc:	81 e0       	ldi	r24, 0x01	; 1
+     efe:	90 e0       	ldi	r25, 0x00	; 0
+     f00:	02 c0       	rjmp	.+4      	; 0xf06 <__vector_83+0x6c>
+     f02:	86 e0       	ldi	r24, 0x06	; 6
+     f04:	90 e0       	ldi	r25, 0x00	; 0
+     f06:	82 0f       	add	r24, r18
+     f08:	93 1f       	adc	r25, r19
+     f0a:	18 c0       	rjmp	.+48     	; 0xf3c <__vector_83+0xa2>
+     f0c:	20 91 68 09 	lds	r18, 0x0968	; 0x800968 <__TEXT_REGION_LENGTH__+0x700968>
+     f10:	30 91 69 09 	lds	r19, 0x0969	; 0x800969 <__TEXT_REGION_LENGTH__+0x700969>
+     f14:	8f 3f       	cpi	r24, 0xFF	; 255
+     f16:	b4 f4       	brge	.+44     	; 0xf44 <__vector_83+0xaa>
+     f18:	27 30       	cpi	r18, 0x07	; 7
+     f1a:	31 05       	cpc	r19, r1
+     f1c:	98 f0       	brcs	.+38     	; 0xf44 <__vector_83+0xaa>
+     f1e:	20 91 68 09 	lds	r18, 0x0968	; 0x800968 <__TEXT_REGION_LENGTH__+0x700968>
+     f22:	30 91 69 09 	lds	r19, 0x0969	; 0x800969 <__TEXT_REGION_LENGTH__+0x700969>
+     f26:	88 3f       	cpi	r24, 0xF8	; 248
+     f28:	1c f0       	brlt	.+6      	; 0xf30 <__vector_83+0x96>
+     f2a:	81 e0       	ldi	r24, 0x01	; 1
+     f2c:	90 e0       	ldi	r25, 0x00	; 0
+     f2e:	02 c0       	rjmp	.+4      	; 0xf34 <__vector_83+0x9a>
+     f30:	86 e0       	ldi	r24, 0x06	; 6
+     f32:	90 e0       	ldi	r25, 0x00	; 0
+     f34:	a9 01       	movw	r20, r18
+     f36:	48 1b       	sub	r20, r24
+     f38:	59 0b       	sbc	r21, r25
+     f3a:	ca 01       	movw	r24, r20
+     f3c:	80 93 78 09 	sts	0x0978, r24	; 0x800978 <__TEXT_REGION_LENGTH__+0x700978>
+     f40:	90 93 79 09 	sts	0x0979, r25	; 0x800979 <__TEXT_REGION_LENGTH__+0x700979>
+     f44:	0f 90       	pop	r0
+     f46:	df 91       	pop	r29
+     f48:	cf 91       	pop	r28
+     f4a:	9f 91       	pop	r25
+     f4c:	8f 91       	pop	r24
+     f4e:	5f 91       	pop	r21
+     f50:	4f 91       	pop	r20
+     f52:	3f 91       	pop	r19
+     f54:	2f 91       	pop	r18
+     f56:	0f 90       	pop	r0
+     f58:	0f be       	out	0x3f, r0	; 63
+     f5a:	0f 90       	pop	r0
+     f5c:	1f 90       	pop	r1
+     f5e:	18 95       	reti
 
-00000efc <tiny_spi_setup>:
-     efc:	e0 e7       	ldi	r30, 0x70	; 112
-     efe:	f0 e0       	ldi	r31, 0x00	; 0
-     f00:	83 81       	ldd	r24, Z+3	; 0x03
-     f02:	87 7f       	andi	r24, 0xF7	; 247
-     f04:	83 83       	std	Z+3, r24	; 0x03
-     f06:	e0 ec       	ldi	r30, 0xC0	; 192
-     f08:	f8 e0       	ldi	r31, 0x08	; 8
-     f0a:	80 e4       	ldi	r24, 0x40	; 64
-     f0c:	80 83       	st	Z, r24
-     f0e:	83 e0       	ldi	r24, 0x03	; 3
-     f10:	81 83       	std	Z+1, r24	; 0x01
-     f12:	88 e5       	ldi	r24, 0x58	; 88
-     f14:	80 93 57 06 	sts	0x0657, r24	; 0x800657 <__TEXT_REGION_LENGTH__+0x700657>
-     f18:	08 95       	ret
-
-00000f1a <__vector_24>:
-     f1a:	1f 92       	push	r1
-     f1c:	0f 92       	push	r0
-     f1e:	0f b6       	in	r0, 0x3f	; 63
-     f20:	0f 92       	push	r0
-     f22:	11 24       	eor	r1, r1
-     f24:	00 00       	nop
-     f26:	0f 90       	pop	r0
-     f28:	0f be       	out	0x3f, r0	; 63
-     f2a:	0f 90       	pop	r0
-     f2c:	1f 90       	pop	r1
-     f2e:	18 95       	reti
-
-00000f30 <osc_enable_autocalibration.constprop.4>:
-     f30:	9f b7       	in	r25, 0x3f	; 63
-     f32:	f8 94       	cli
-     f34:	a0 e5       	ldi	r26, 0x50	; 80
-     f36:	b0 e0       	ldi	r27, 0x00	; 0
-     f38:	16 96       	adiw	r26, 0x06	; 6
-     f3a:	8c 91       	ld	r24, X
-     f3c:	16 97       	sbiw	r26, 0x06	; 6
-     f3e:	89 7f       	andi	r24, 0xF9	; 249
-     f40:	16 96       	adiw	r26, 0x06	; 6
-     f42:	8c 93       	st	X, r24
-     f44:	16 97       	sbiw	r26, 0x06	; 6
-     f46:	e0 e6       	ldi	r30, 0x60	; 96
-     f48:	f0 e0       	ldi	r31, 0x00	; 0
-     f4a:	80 e8       	ldi	r24, 0x80	; 128
-     f4c:	85 83       	std	Z+5, r24	; 0x05
-     f4e:	8b eb       	ldi	r24, 0xBB	; 187
-     f50:	86 83       	std	Z+6, r24	; 0x06
-     f52:	16 96       	adiw	r26, 0x06	; 6
-     f54:	8c 91       	ld	r24, X
-     f56:	16 97       	sbiw	r26, 0x06	; 6
-     f58:	84 60       	ori	r24, 0x04	; 4
-     f5a:	16 96       	adiw	r26, 0x06	; 6
-     f5c:	8c 93       	st	X, r24
-     f5e:	80 81       	ld	r24, Z
-     f60:	81 60       	ori	r24, 0x01	; 1
-     f62:	80 83       	st	Z, r24
-     f64:	9f bf       	out	0x3f, r25	; 63
-     f66:	08 95       	ret
-
-00000f68 <sysclk_init>:
-     f68:	cf 93       	push	r28
-     f6a:	df 93       	push	r29
-     f6c:	00 d0       	rcall	.+0      	; 0xf6e <sysclk_init+0x6>
-     f6e:	00 d0       	rcall	.+0      	; 0xf70 <sysclk_init+0x8>
-     f70:	cd b7       	in	r28, 0x3d	; 61
-     f72:	de b7       	in	r29, 0x3e	; 62
+00000f60 <tiny_uart_setup>:
+     f60:	e0 e7       	ldi	r30, 0x70	; 112
+     f62:	f0 e0       	ldi	r31, 0x00	; 0
+     f64:	83 81       	ldd	r24, Z+3	; 0x03
+     f66:	8f 7e       	andi	r24, 0xEF	; 239
+     f68:	83 83       	std	Z+3, r24	; 0x03
+     f6a:	e0 e4       	ldi	r30, 0x40	; 64
+     f6c:	f6 e0       	ldi	r31, 0x06	; 6
+     f6e:	80 81       	ld	r24, Z
+     f70:	8a 6a       	ori	r24, 0xAA	; 170
+     f72:	80 83       	st	Z, r24
      f74:	8f ef       	ldi	r24, 0xFF	; 255
-     f76:	80 93 70 00 	sts	0x0070, r24	; 0x800070 <__TEXT_REGION_LENGTH__+0x700070>
-     f7a:	80 93 71 00 	sts	0x0071, r24	; 0x800071 <__TEXT_REGION_LENGTH__+0x700071>
-     f7e:	80 93 72 00 	sts	0x0072, r24	; 0x800072 <__TEXT_REGION_LENGTH__+0x700072>
-     f82:	80 93 73 00 	sts	0x0073, r24	; 0x800073 <__TEXT_REGION_LENGTH__+0x700073>
-     f86:	80 93 74 00 	sts	0x0074, r24	; 0x800074 <__TEXT_REGION_LENGTH__+0x700074>
-     f8a:	80 93 75 00 	sts	0x0075, r24	; 0x800075 <__TEXT_REGION_LENGTH__+0x700075>
-     f8e:	80 93 76 00 	sts	0x0076, r24	; 0x800076 <__TEXT_REGION_LENGTH__+0x700076>
-     f92:	64 e0       	ldi	r22, 0x04	; 4
-     f94:	81 e4       	ldi	r24, 0x41	; 65
-     f96:	90 e0       	ldi	r25, 0x00	; 0
-     f98:	0d d5       	rcall	.+2586   	; 0x19b4 <ccp_write_io>
-     f9a:	6c e1       	ldi	r22, 0x1C	; 28
-     f9c:	70 e0       	ldi	r23, 0x00	; 0
-     f9e:	82 e0       	ldi	r24, 0x02	; 2
-     fa0:	0f d5       	rcall	.+2590   	; 0x19c0 <nvm_read_byte>
-     fa2:	8c 83       	std	Y+4, r24	; 0x04
-     fa4:	6d e1       	ldi	r22, 0x1D	; 29
-     fa6:	70 e0       	ldi	r23, 0x00	; 0
-     fa8:	82 e0       	ldi	r24, 0x02	; 2
-     faa:	0a d5       	rcall	.+2580   	; 0x19c0 <nvm_read_byte>
-     fac:	8b 83       	std	Y+3, r24	; 0x03
-     fae:	8b 81       	ldd	r24, Y+3	; 0x03
-     fb0:	9c 81       	ldd	r25, Y+4	; 0x04
-     fb2:	01 96       	adiw	r24, 0x01	; 1
-     fb4:	21 f4       	brne	.+8      	; 0xfbe <sysclk_init+0x56>
-     fb6:	80 e4       	ldi	r24, 0x40	; 64
-     fb8:	93 e2       	ldi	r25, 0x23	; 35
-     fba:	8b 83       	std	Y+3, r24	; 0x03
-     fbc:	9c 83       	std	Y+4, r25	; 0x04
-     fbe:	8b 81       	ldd	r24, Y+3	; 0x03
-     fc0:	9c 81       	ldd	r25, Y+4	; 0x04
-     fc2:	89 83       	std	Y+1, r24	; 0x01
-     fc4:	9a 83       	std	Y+2, r25	; 0x02
-     fc6:	80 93 62 00 	sts	0x0062, r24	; 0x800062 <__TEXT_REGION_LENGTH__+0x700062>
-     fca:	8a 81       	ldd	r24, Y+2	; 0x02
-     fcc:	80 93 63 00 	sts	0x0063, r24	; 0x800063 <__TEXT_REGION_LENGTH__+0x700063>
-     fd0:	9f b7       	in	r25, 0x3f	; 63
-     fd2:	f8 94       	cli
-     fd4:	80 91 50 00 	lds	r24, 0x0050	; 0x800050 <__TEXT_REGION_LENGTH__+0x700050>
-     fd8:	82 60       	ori	r24, 0x02	; 2
-     fda:	80 93 50 00 	sts	0x0050, r24	; 0x800050 <__TEXT_REGION_LENGTH__+0x700050>
-     fde:	9f bf       	out	0x3f, r25	; 63
-     fe0:	80 91 51 00 	lds	r24, 0x0051	; 0x800051 <__TEXT_REGION_LENGTH__+0x700051>
-     fe4:	81 ff       	sbrs	r24, 1
-     fe6:	fc cf       	rjmp	.-8      	; 0xfe0 <sysclk_init+0x78>
-     fe8:	a3 df       	rcall	.-186    	; 0xf30 <osc_enable_autocalibration.constprop.4>
-     fea:	61 e0       	ldi	r22, 0x01	; 1
-     fec:	80 e4       	ldi	r24, 0x40	; 64
-     fee:	90 e0       	ldi	r25, 0x00	; 0
-     ff0:	e1 d4       	rcall	.+2498   	; 0x19b4 <ccp_write_io>
-     ff2:	9f b7       	in	r25, 0x3f	; 63
-     ff4:	f8 94       	cli
-     ff6:	80 91 50 00 	lds	r24, 0x0050	; 0x800050 <__TEXT_REGION_LENGTH__+0x700050>
-     ffa:	8e 7f       	andi	r24, 0xFE	; 254
-     ffc:	80 93 50 00 	sts	0x0050, r24	; 0x800050 <__TEXT_REGION_LENGTH__+0x700050>
-    1000:	9f bf       	out	0x3f, r25	; 63
-    1002:	24 96       	adiw	r28, 0x04	; 4
-    1004:	cd bf       	out	0x3d, r28	; 61
-    1006:	de bf       	out	0x3e, r29	; 62
-    1008:	df 91       	pop	r29
-    100a:	cf 91       	pop	r28
-    100c:	08 95       	ret
+     f76:	84 83       	std	Z+4, r24	; 0x04
+     f78:	88 e5       	ldi	r24, 0x58	; 88
+     f7a:	82 8b       	std	Z+18, r24	; 0x12
+     f7c:	e0 ea       	ldi	r30, 0xA0	; 160
+     f7e:	f8 e0       	ldi	r31, 0x08	; 8
+     f80:	84 ec       	ldi	r24, 0xC4	; 196
+     f82:	85 83       	std	Z+5, r24	; 0x05
+     f84:	83 e0       	ldi	r24, 0x03	; 3
+     f86:	86 83       	std	Z+6, r24	; 0x06
+     f88:	17 82       	std	Z+7, r1	; 0x07
+     f8a:	88 e1       	ldi	r24, 0x18	; 24
+     f8c:	84 83       	std	Z+4, r24	; 0x04
+     f8e:	08 95       	ret
 
-0000100e <sysclk_enable_module>:
-    100e:	9f b7       	in	r25, 0x3f	; 63
-    1010:	f8 94       	cli
-    1012:	e8 2f       	mov	r30, r24
-    1014:	f0 e0       	ldi	r31, 0x00	; 0
-    1016:	e0 59       	subi	r30, 0x90	; 144
-    1018:	ff 4f       	sbci	r31, 0xFF	; 255
-    101a:	60 95       	com	r22
-    101c:	80 81       	ld	r24, Z
-    101e:	68 23       	and	r22, r24
-    1020:	60 83       	st	Z, r22
-    1022:	9f bf       	out	0x3f, r25	; 63
-    1024:	08 95       	ret
+00000f90 <tiny_spi_setup>:
+     f90:	e0 e7       	ldi	r30, 0x70	; 112
+     f92:	f0 e0       	ldi	r31, 0x00	; 0
+     f94:	83 81       	ldd	r24, Z+3	; 0x03
+     f96:	87 7f       	andi	r24, 0xF7	; 247
+     f98:	83 83       	std	Z+3, r24	; 0x03
+     f9a:	e0 ec       	ldi	r30, 0xC0	; 192
+     f9c:	f8 e0       	ldi	r31, 0x08	; 8
+     f9e:	80 e4       	ldi	r24, 0x40	; 64
+     fa0:	80 83       	st	Z, r24
+     fa2:	11 82       	std	Z+1, r1	; 0x01
+     fa4:	88 e5       	ldi	r24, 0x58	; 88
+     fa6:	80 93 55 06 	sts	0x0655, r24	; 0x800655 <__TEXT_REGION_LENGTH__+0x700655>
+     faa:	08 95       	ret
 
-00001026 <sysclk_enable_usb>:
-    1026:	cf 93       	push	r28
-    1028:	86 30       	cpi	r24, 0x06	; 6
-    102a:	11 f0       	breq	.+4      	; 0x1030 <sysclk_enable_usb+0xa>
-    102c:	c0 e0       	ldi	r28, 0x00	; 0
-    102e:	01 c0       	rjmp	.+2      	; 0x1032 <sysclk_enable_usb+0xc>
-    1030:	c8 e1       	ldi	r28, 0x18	; 24
-    1032:	80 91 51 00 	lds	r24, 0x0051	; 0x800051 <__TEXT_REGION_LENGTH__+0x700051>
-    1036:	81 fd       	sbrc	r24, 1
-    1038:	0d c0       	rjmp	.+26     	; 0x1054 <sysclk_enable_usb+0x2e>
-    103a:	9f b7       	in	r25, 0x3f	; 63
-    103c:	f8 94       	cli
-    103e:	80 91 50 00 	lds	r24, 0x0050	; 0x800050 <__TEXT_REGION_LENGTH__+0x700050>
-    1042:	82 60       	ori	r24, 0x02	; 2
-    1044:	80 93 50 00 	sts	0x0050, r24	; 0x800050 <__TEXT_REGION_LENGTH__+0x700050>
-    1048:	9f bf       	out	0x3f, r25	; 63
-    104a:	80 91 51 00 	lds	r24, 0x0051	; 0x800051 <__TEXT_REGION_LENGTH__+0x700051>
-    104e:	81 ff       	sbrs	r24, 1
-    1050:	fc cf       	rjmp	.-8      	; 0x104a <sysclk_enable_usb+0x24>
-    1052:	6e df       	rcall	.-292    	; 0xf30 <osc_enable_autocalibration.constprop.4>
-    1054:	6c 2f       	mov	r22, r28
-    1056:	63 60       	ori	r22, 0x03	; 3
-    1058:	84 e4       	ldi	r24, 0x44	; 68
-    105a:	90 e0       	ldi	r25, 0x00	; 0
-    105c:	ab d4       	rcall	.+2390   	; 0x19b4 <ccp_write_io>
-    105e:	60 e4       	ldi	r22, 0x40	; 64
-    1060:	80 e0       	ldi	r24, 0x00	; 0
-    1062:	cf 91       	pop	r28
-    1064:	d4 cf       	rjmp	.-88     	; 0x100e <sysclk_enable_module>
+00000fac <__vector_24>:
+     fac:	1f 92       	push	r1
+     fae:	0f 92       	push	r0
+     fb0:	0f b6       	in	r0, 0x3f	; 63
+     fb2:	0f 92       	push	r0
+     fb4:	11 24       	eor	r1, r1
+     fb6:	00 00       	nop
+     fb8:	0f 90       	pop	r0
+     fba:	0f be       	out	0x3f, r0	; 63
+     fbc:	0f 90       	pop	r0
+     fbe:	1f 90       	pop	r1
+     fc0:	18 95       	reti
 
-00001066 <udi_vendor_getsetting>:
-    1066:	80 91 c5 20 	lds	r24, 0x20C5	; 0x8020c5 <udi_vendor_alternate_setting>
-    106a:	08 95       	ret
+00000fc2 <osc_enable_autocalibration.constprop.4>:
+     fc2:	9f b7       	in	r25, 0x3f	; 63
+     fc4:	f8 94       	cli
+     fc6:	a0 e5       	ldi	r26, 0x50	; 80
+     fc8:	b0 e0       	ldi	r27, 0x00	; 0
+     fca:	16 96       	adiw	r26, 0x06	; 6
+     fcc:	8c 91       	ld	r24, X
+     fce:	16 97       	sbiw	r26, 0x06	; 6
+     fd0:	89 7f       	andi	r24, 0xF9	; 249
+     fd2:	16 96       	adiw	r26, 0x06	; 6
+     fd4:	8c 93       	st	X, r24
+     fd6:	16 97       	sbiw	r26, 0x06	; 6
+     fd8:	e0 e6       	ldi	r30, 0x60	; 96
+     fda:	f0 e0       	ldi	r31, 0x00	; 0
+     fdc:	80 e8       	ldi	r24, 0x80	; 128
+     fde:	85 83       	std	Z+5, r24	; 0x05
+     fe0:	8b eb       	ldi	r24, 0xBB	; 187
+     fe2:	86 83       	std	Z+6, r24	; 0x06
+     fe4:	16 96       	adiw	r26, 0x06	; 6
+     fe6:	8c 91       	ld	r24, X
+     fe8:	16 97       	sbiw	r26, 0x06	; 6
+     fea:	84 60       	ori	r24, 0x04	; 4
+     fec:	16 96       	adiw	r26, 0x06	; 6
+     fee:	8c 93       	st	X, r24
+     ff0:	80 81       	ld	r24, Z
+     ff2:	81 60       	ori	r24, 0x01	; 1
+     ff4:	80 83       	st	Z, r24
+     ff6:	9f bf       	out	0x3f, r25	; 63
+     ff8:	08 95       	ret
 
-0000106c <udi_vendor_disable>:
-    106c:	80 91 c5 20 	lds	r24, 0x20C5	; 0x8020c5 <udi_vendor_alternate_setting>
-    1070:	81 30       	cpi	r24, 0x01	; 1
-    1072:	09 f4       	brne	.+2      	; 0x1076 <udi_vendor_disable+0xa>
-    1074:	89 c9       	rjmp	.-3310   	; 0x388 <main_vendor_disable>
-    1076:	08 95       	ret
+00000ffa <sysclk_init>:
+     ffa:	cf 93       	push	r28
+     ffc:	df 93       	push	r29
+     ffe:	00 d0       	rcall	.+0      	; 0x1000 <sysclk_init+0x6>
+    1000:	00 d0       	rcall	.+0      	; 0x1002 <sysclk_init+0x8>
+    1002:	cd b7       	in	r28, 0x3d	; 61
+    1004:	de b7       	in	r29, 0x3e	; 62
+    1006:	8f ef       	ldi	r24, 0xFF	; 255
+    1008:	80 93 70 00 	sts	0x0070, r24	; 0x800070 <__TEXT_REGION_LENGTH__+0x700070>
+    100c:	80 93 71 00 	sts	0x0071, r24	; 0x800071 <__TEXT_REGION_LENGTH__+0x700071>
+    1010:	80 93 72 00 	sts	0x0072, r24	; 0x800072 <__TEXT_REGION_LENGTH__+0x700072>
+    1014:	80 93 73 00 	sts	0x0073, r24	; 0x800073 <__TEXT_REGION_LENGTH__+0x700073>
+    1018:	80 93 74 00 	sts	0x0074, r24	; 0x800074 <__TEXT_REGION_LENGTH__+0x700074>
+    101c:	80 93 75 00 	sts	0x0075, r24	; 0x800075 <__TEXT_REGION_LENGTH__+0x700075>
+    1020:	80 93 76 00 	sts	0x0076, r24	; 0x800076 <__TEXT_REGION_LENGTH__+0x700076>
+    1024:	64 e0       	ldi	r22, 0x04	; 4
+    1026:	81 e4       	ldi	r24, 0x41	; 65
+    1028:	90 e0       	ldi	r25, 0x00	; 0
+    102a:	0e d5       	rcall	.+2588   	; 0x1a48 <ccp_write_io>
+    102c:	6c e1       	ldi	r22, 0x1C	; 28
+    102e:	70 e0       	ldi	r23, 0x00	; 0
+    1030:	82 e0       	ldi	r24, 0x02	; 2
+    1032:	10 d5       	rcall	.+2592   	; 0x1a54 <nvm_read_byte>
+    1034:	8c 83       	std	Y+4, r24	; 0x04
+    1036:	6d e1       	ldi	r22, 0x1D	; 29
+    1038:	70 e0       	ldi	r23, 0x00	; 0
+    103a:	82 e0       	ldi	r24, 0x02	; 2
+    103c:	0b d5       	rcall	.+2582   	; 0x1a54 <nvm_read_byte>
+    103e:	8b 83       	std	Y+3, r24	; 0x03
+    1040:	8b 81       	ldd	r24, Y+3	; 0x03
+    1042:	9c 81       	ldd	r25, Y+4	; 0x04
+    1044:	01 96       	adiw	r24, 0x01	; 1
+    1046:	21 f4       	brne	.+8      	; 0x1050 <sysclk_init+0x56>
+    1048:	80 e4       	ldi	r24, 0x40	; 64
+    104a:	93 e2       	ldi	r25, 0x23	; 35
+    104c:	8b 83       	std	Y+3, r24	; 0x03
+    104e:	9c 83       	std	Y+4, r25	; 0x04
+    1050:	8b 81       	ldd	r24, Y+3	; 0x03
+    1052:	9c 81       	ldd	r25, Y+4	; 0x04
+    1054:	89 83       	std	Y+1, r24	; 0x01
+    1056:	9a 83       	std	Y+2, r25	; 0x02
+    1058:	80 93 62 00 	sts	0x0062, r24	; 0x800062 <__TEXT_REGION_LENGTH__+0x700062>
+    105c:	8a 81       	ldd	r24, Y+2	; 0x02
+    105e:	80 93 63 00 	sts	0x0063, r24	; 0x800063 <__TEXT_REGION_LENGTH__+0x700063>
+    1062:	9f b7       	in	r25, 0x3f	; 63
+    1064:	f8 94       	cli
+    1066:	80 91 50 00 	lds	r24, 0x0050	; 0x800050 <__TEXT_REGION_LENGTH__+0x700050>
+    106a:	82 60       	ori	r24, 0x02	; 2
+    106c:	80 93 50 00 	sts	0x0050, r24	; 0x800050 <__TEXT_REGION_LENGTH__+0x700050>
+    1070:	9f bf       	out	0x3f, r25	; 63
+    1072:	80 91 51 00 	lds	r24, 0x0051	; 0x800051 <__TEXT_REGION_LENGTH__+0x700051>
+    1076:	81 ff       	sbrs	r24, 1
+    1078:	fc cf       	rjmp	.-8      	; 0x1072 <sysclk_init+0x78>
+    107a:	a3 df       	rcall	.-186    	; 0xfc2 <osc_enable_autocalibration.constprop.4>
+    107c:	61 e0       	ldi	r22, 0x01	; 1
+    107e:	80 e4       	ldi	r24, 0x40	; 64
+    1080:	90 e0       	ldi	r25, 0x00	; 0
+    1082:	e2 d4       	rcall	.+2500   	; 0x1a48 <ccp_write_io>
+    1084:	9f b7       	in	r25, 0x3f	; 63
+    1086:	f8 94       	cli
+    1088:	80 91 50 00 	lds	r24, 0x0050	; 0x800050 <__TEXT_REGION_LENGTH__+0x700050>
+    108c:	8e 7f       	andi	r24, 0xFE	; 254
+    108e:	80 93 50 00 	sts	0x0050, r24	; 0x800050 <__TEXT_REGION_LENGTH__+0x700050>
+    1092:	9f bf       	out	0x3f, r25	; 63
+    1094:	24 96       	adiw	r28, 0x04	; 4
+    1096:	cd bf       	out	0x3d, r28	; 61
+    1098:	de bf       	out	0x3e, r29	; 62
+    109a:	df 91       	pop	r29
+    109c:	cf 91       	pop	r28
+    109e:	08 95       	ret
 
-00001078 <udi_vendor_enable>:
-    1078:	13 d1       	rcall	.+550    	; 0x12a0 <udc_get_interface_desc>
-    107a:	fc 01       	movw	r30, r24
-    107c:	83 81       	ldd	r24, Z+3	; 0x03
-    107e:	80 93 c5 20 	sts	0x20C5, r24	; 0x8020c5 <udi_vendor_alternate_setting>
-    1082:	81 11       	cpse	r24, r1
-    1084:	01 c0       	rjmp	.+2      	; 0x1088 <udi_vendor_enable+0x10>
-    1086:	66 c9       	rjmp	.-3380   	; 0x354 <main_vendor_enable>
-    1088:	81 e0       	ldi	r24, 0x01	; 1
-    108a:	08 95       	ret
+000010a0 <sysclk_enable_module>:
+    10a0:	9f b7       	in	r25, 0x3f	; 63
+    10a2:	f8 94       	cli
+    10a4:	e8 2f       	mov	r30, r24
+    10a6:	f0 e0       	ldi	r31, 0x00	; 0
+    10a8:	e0 59       	subi	r30, 0x90	; 144
+    10aa:	ff 4f       	sbci	r31, 0xFF	; 255
+    10ac:	60 95       	com	r22
+    10ae:	80 81       	ld	r24, Z
+    10b0:	68 23       	and	r22, r24
+    10b2:	60 83       	st	Z, r22
+    10b4:	9f bf       	out	0x3f, r25	; 63
+    10b6:	08 95       	ret
 
-0000108c <udi_vendor_setup>:
-    108c:	90 91 6a 24 	lds	r25, 0x246A	; 0x80246a <udd_g_ctrlreq>
-    1090:	89 2f       	mov	r24, r25
-    1092:	80 76       	andi	r24, 0x60	; 96
-    1094:	97 ff       	sbrs	r25, 7
-    1096:	07 c0       	rjmp	.+14     	; 0x10a6 <udi_vendor_setup+0x1a>
-    1098:	80 34       	cpi	r24, 0x40	; 64
-    109a:	91 f4       	brne	.+36     	; 0x10c0 <udi_vendor_setup+0x34>
-    109c:	80 91 6b 24 	lds	r24, 0x246B	; 0x80246b <udd_g_ctrlreq+0x1>
-    10a0:	81 11       	cpse	r24, r1
-    10a2:	0e c0       	rjmp	.+28     	; 0x10c0 <udi_vendor_setup+0x34>
-    10a4:	76 c9       	rjmp	.-3348   	; 0x392 <main_setup_in_received>
-    10a6:	80 34       	cpi	r24, 0x40	; 64
-    10a8:	59 f4       	brne	.+22     	; 0x10c0 <udi_vendor_setup+0x34>
-    10aa:	80 91 6b 24 	lds	r24, 0x246B	; 0x80246b <udd_g_ctrlreq+0x1>
-    10ae:	81 11       	cpse	r24, r1
-    10b0:	07 c0       	rjmp	.+14     	; 0x10c0 <udi_vendor_setup+0x34>
-    10b2:	80 91 70 24 	lds	r24, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
-    10b6:	90 91 71 24 	lds	r25, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
-    10ba:	89 2b       	or	r24, r25
-    10bc:	09 f0       	breq	.+2      	; 0x10c0 <udi_vendor_setup+0x34>
-    10be:	67 c9       	rjmp	.-3378   	; 0x38e <main_setup_out_received>
-    10c0:	80 e0       	ldi	r24, 0x00	; 0
-    10c2:	08 95       	ret
+000010b8 <sysclk_enable_usb>:
+    10b8:	cf 93       	push	r28
+    10ba:	86 30       	cpi	r24, 0x06	; 6
+    10bc:	11 f0       	breq	.+4      	; 0x10c2 <sysclk_enable_usb+0xa>
+    10be:	c0 e0       	ldi	r28, 0x00	; 0
+    10c0:	01 c0       	rjmp	.+2      	; 0x10c4 <sysclk_enable_usb+0xc>
+    10c2:	c8 e1       	ldi	r28, 0x18	; 24
+    10c4:	80 91 51 00 	lds	r24, 0x0051	; 0x800051 <__TEXT_REGION_LENGTH__+0x700051>
+    10c8:	81 fd       	sbrc	r24, 1
+    10ca:	0d c0       	rjmp	.+26     	; 0x10e6 <sysclk_enable_usb+0x2e>
+    10cc:	9f b7       	in	r25, 0x3f	; 63
+    10ce:	f8 94       	cli
+    10d0:	80 91 50 00 	lds	r24, 0x0050	; 0x800050 <__TEXT_REGION_LENGTH__+0x700050>
+    10d4:	82 60       	ori	r24, 0x02	; 2
+    10d6:	80 93 50 00 	sts	0x0050, r24	; 0x800050 <__TEXT_REGION_LENGTH__+0x700050>
+    10da:	9f bf       	out	0x3f, r25	; 63
+    10dc:	80 91 51 00 	lds	r24, 0x0051	; 0x800051 <__TEXT_REGION_LENGTH__+0x700051>
+    10e0:	81 ff       	sbrs	r24, 1
+    10e2:	fc cf       	rjmp	.-8      	; 0x10dc <sysclk_enable_usb+0x24>
+    10e4:	6e df       	rcall	.-292    	; 0xfc2 <osc_enable_autocalibration.constprop.4>
+    10e6:	6c 2f       	mov	r22, r28
+    10e8:	63 60       	ori	r22, 0x03	; 3
+    10ea:	84 e4       	ldi	r24, 0x44	; 68
+    10ec:	90 e0       	ldi	r25, 0x00	; 0
+    10ee:	ac d4       	rcall	.+2392   	; 0x1a48 <ccp_write_io>
+    10f0:	60 e4       	ldi	r22, 0x40	; 64
+    10f2:	80 e0       	ldi	r24, 0x00	; 0
+    10f4:	cf 91       	pop	r28
+    10f6:	d4 cf       	rjmp	.-88     	; 0x10a0 <sysclk_enable_module>
 
-000010c4 <udi_vendor_iso_in_run>:
-    10c4:	0f 93       	push	r16
-    10c6:	1f 93       	push	r17
-    10c8:	9b 01       	movw	r18, r22
-    10ca:	8a 01       	movw	r16, r20
-    10cc:	ac 01       	movw	r20, r24
-    10ce:	60 e0       	ldi	r22, 0x00	; 0
-    10d0:	81 e8       	ldi	r24, 0x81	; 129
-    10d2:	0e 94 8e 10 	call	0x211c	; 0x211c <udd_ep_run>
-    10d6:	1f 91       	pop	r17
-    10d8:	0f 91       	pop	r16
-    10da:	08 95       	ret
+000010f8 <udi_vendor_getsetting>:
+    10f8:	80 91 c5 20 	lds	r24, 0x20C5	; 0x8020c5 <udi_vendor_alternate_setting>
+    10fc:	08 95       	ret
 
-000010dc <udi_vendor_iso_in_run2>:
-    10dc:	0f 93       	push	r16
-    10de:	1f 93       	push	r17
-    10e0:	9b 01       	movw	r18, r22
-    10e2:	8a 01       	movw	r16, r20
-    10e4:	ac 01       	movw	r20, r24
-    10e6:	60 e0       	ldi	r22, 0x00	; 0
-    10e8:	82 e8       	ldi	r24, 0x82	; 130
-    10ea:	0e 94 8e 10 	call	0x211c	; 0x211c <udd_ep_run>
-    10ee:	1f 91       	pop	r17
-    10f0:	0f 91       	pop	r16
-    10f2:	08 95       	ret
+000010fe <udi_vendor_disable>:
+    10fe:	80 91 c5 20 	lds	r24, 0x20C5	; 0x8020c5 <udi_vendor_alternate_setting>
+    1102:	81 30       	cpi	r24, 0x01	; 1
+    1104:	09 f4       	brne	.+2      	; 0x1108 <udi_vendor_disable+0xa>
+    1106:	57 c9       	rjmp	.-3410   	; 0x3b6 <main_vendor_disable>
+    1108:	08 95       	ret
 
-000010f4 <udi_vendor_iso_in_run3>:
-    10f4:	0f 93       	push	r16
-    10f6:	1f 93       	push	r17
-    10f8:	9b 01       	movw	r18, r22
-    10fa:	8a 01       	movw	r16, r20
-    10fc:	ac 01       	movw	r20, r24
-    10fe:	60 e0       	ldi	r22, 0x00	; 0
-    1100:	83 e8       	ldi	r24, 0x83	; 131
-    1102:	0e 94 8e 10 	call	0x211c	; 0x211c <udd_ep_run>
-    1106:	1f 91       	pop	r17
-    1108:	0f 91       	pop	r16
-    110a:	08 95       	ret
+0000110a <udi_vendor_enable>:
+    110a:	13 d1       	rcall	.+550    	; 0x1332 <udc_get_interface_desc>
+    110c:	fc 01       	movw	r30, r24
+    110e:	83 81       	ldd	r24, Z+3	; 0x03
+    1110:	80 93 c5 20 	sts	0x20C5, r24	; 0x8020c5 <udi_vendor_alternate_setting>
+    1114:	81 11       	cpse	r24, r1
+    1116:	01 c0       	rjmp	.+2      	; 0x111a <udi_vendor_enable+0x10>
+    1118:	34 c9       	rjmp	.-3480   	; 0x382 <main_vendor_enable>
+    111a:	81 e0       	ldi	r24, 0x01	; 1
+    111c:	08 95       	ret
 
-0000110c <udc_valid_address>:
-    110c:	80 91 6c 24 	lds	r24, 0x246C	; 0x80246c <udd_g_ctrlreq+0x2>
-    1110:	8f 77       	andi	r24, 0x7F	; 127
-    1112:	86 c7       	rjmp	.+3852   	; 0x2020 <udd_set_address>
+0000111e <udi_vendor_setup>:
+    111e:	90 91 6a 24 	lds	r25, 0x246A	; 0x80246a <udd_g_ctrlreq>
+    1122:	89 2f       	mov	r24, r25
+    1124:	80 76       	andi	r24, 0x60	; 96
+    1126:	97 ff       	sbrs	r25, 7
+    1128:	07 c0       	rjmp	.+14     	; 0x1138 <udi_vendor_setup+0x1a>
+    112a:	80 34       	cpi	r24, 0x40	; 64
+    112c:	91 f4       	brne	.+36     	; 0x1152 <udi_vendor_setup+0x34>
+    112e:	80 91 6b 24 	lds	r24, 0x246B	; 0x80246b <udd_g_ctrlreq+0x1>
+    1132:	81 11       	cpse	r24, r1
+    1134:	0e c0       	rjmp	.+28     	; 0x1152 <udi_vendor_setup+0x34>
+    1136:	44 c9       	rjmp	.-3448   	; 0x3c0 <main_setup_in_received>
+    1138:	80 34       	cpi	r24, 0x40	; 64
+    113a:	59 f4       	brne	.+22     	; 0x1152 <udi_vendor_setup+0x34>
+    113c:	80 91 6b 24 	lds	r24, 0x246B	; 0x80246b <udd_g_ctrlreq+0x1>
+    1140:	81 11       	cpse	r24, r1
+    1142:	07 c0       	rjmp	.+14     	; 0x1152 <udi_vendor_setup+0x34>
+    1144:	80 91 70 24 	lds	r24, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
+    1148:	90 91 71 24 	lds	r25, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
+    114c:	89 2b       	or	r24, r25
+    114e:	09 f0       	breq	.+2      	; 0x1152 <udi_vendor_setup+0x34>
+    1150:	35 c9       	rjmp	.-3478   	; 0x3bc <main_setup_out_received>
+    1152:	80 e0       	ldi	r24, 0x00	; 0
+    1154:	08 95       	ret
 
-00001114 <udc_update_iface_desc>:
-    1114:	90 91 cc 20 	lds	r25, 0x20CC	; 0x8020cc <udc_num_configuration>
-    1118:	91 11       	cpse	r25, r1
-    111a:	02 c0       	rjmp	.+4      	; 0x1120 <udc_update_iface_desc+0xc>
-    111c:	80 e0       	ldi	r24, 0x00	; 0
-    111e:	08 95       	ret
-    1120:	e0 91 ca 20 	lds	r30, 0x20CA	; 0x8020ca <udc_ptr_conf>
-    1124:	f0 91 cb 20 	lds	r31, 0x20CB	; 0x8020cb <udc_ptr_conf+0x1>
-    1128:	01 90       	ld	r0, Z+
-    112a:	f0 81       	ld	r31, Z
-    112c:	e0 2d       	mov	r30, r0
-    112e:	94 81       	ldd	r25, Z+4	; 0x04
-    1130:	89 17       	cp	r24, r25
-    1132:	a0 f7       	brcc	.-24     	; 0x111c <udc_update_iface_desc+0x8>
-    1134:	e0 93 c8 20 	sts	0x20C8, r30	; 0x8020c8 <udc_ptr_iface>
-    1138:	f0 93 c9 20 	sts	0x20C9, r31	; 0x8020c9 <udc_ptr_iface+0x1>
-    113c:	22 81       	ldd	r18, Z+2	; 0x02
-    113e:	33 81       	ldd	r19, Z+3	; 0x03
-    1140:	2e 0f       	add	r18, r30
-    1142:	3f 1f       	adc	r19, r31
-    1144:	e2 17       	cp	r30, r18
-    1146:	f3 07       	cpc	r31, r19
-    1148:	98 f4       	brcc	.+38     	; 0x1170 <udc_update_iface_desc+0x5c>
-    114a:	91 81       	ldd	r25, Z+1	; 0x01
-    114c:	94 30       	cpi	r25, 0x04	; 4
-    114e:	61 f4       	brne	.+24     	; 0x1168 <udc_update_iface_desc+0x54>
-    1150:	92 81       	ldd	r25, Z+2	; 0x02
-    1152:	89 13       	cpse	r24, r25
-    1154:	09 c0       	rjmp	.+18     	; 0x1168 <udc_update_iface_desc+0x54>
-    1156:	93 81       	ldd	r25, Z+3	; 0x03
-    1158:	69 13       	cpse	r22, r25
-    115a:	06 c0       	rjmp	.+12     	; 0x1168 <udc_update_iface_desc+0x54>
-    115c:	e0 93 c8 20 	sts	0x20C8, r30	; 0x8020c8 <udc_ptr_iface>
-    1160:	f0 93 c9 20 	sts	0x20C9, r31	; 0x8020c9 <udc_ptr_iface+0x1>
-    1164:	81 e0       	ldi	r24, 0x01	; 1
-    1166:	08 95       	ret
-    1168:	90 81       	ld	r25, Z
-    116a:	e9 0f       	add	r30, r25
-    116c:	f1 1d       	adc	r31, r1
-    116e:	ea cf       	rjmp	.-44     	; 0x1144 <udc_update_iface_desc+0x30>
-    1170:	e0 93 c8 20 	sts	0x20C8, r30	; 0x8020c8 <udc_ptr_iface>
-    1174:	f0 93 c9 20 	sts	0x20C9, r31	; 0x8020c9 <udc_ptr_iface+0x1>
-    1178:	d1 cf       	rjmp	.-94     	; 0x111c <udc_update_iface_desc+0x8>
+00001156 <udi_vendor_iso_in_run>:
+    1156:	0f 93       	push	r16
+    1158:	1f 93       	push	r17
+    115a:	9b 01       	movw	r18, r22
+    115c:	8a 01       	movw	r16, r20
+    115e:	ac 01       	movw	r20, r24
+    1160:	60 e0       	ldi	r22, 0x00	; 0
+    1162:	81 e8       	ldi	r24, 0x81	; 129
+    1164:	0e 94 d8 10 	call	0x21b0	; 0x21b0 <udd_ep_run>
+    1168:	1f 91       	pop	r17
+    116a:	0f 91       	pop	r16
+    116c:	08 95       	ret
 
-0000117a <udc_next_desc_in_iface.constprop.3>:
-    117a:	e0 91 ca 20 	lds	r30, 0x20CA	; 0x8020ca <udc_ptr_conf>
-    117e:	f0 91 cb 20 	lds	r31, 0x20CB	; 0x8020cb <udc_ptr_conf+0x1>
-    1182:	01 90       	ld	r0, Z+
-    1184:	f0 81       	ld	r31, Z
-    1186:	e0 2d       	mov	r30, r0
-    1188:	22 81       	ldd	r18, Z+2	; 0x02
-    118a:	33 81       	ldd	r19, Z+3	; 0x03
-    118c:	2e 0f       	add	r18, r30
-    118e:	3f 1f       	adc	r19, r31
-    1190:	fc 01       	movw	r30, r24
-    1192:	40 81       	ld	r20, Z
-    1194:	e4 0f       	add	r30, r20
-    1196:	f1 1d       	adc	r31, r1
-    1198:	e2 17       	cp	r30, r18
-    119a:	f3 07       	cpc	r31, r19
-    119c:	48 f4       	brcc	.+18     	; 0x11b0 <udc_next_desc_in_iface.constprop.3+0x36>
-    119e:	81 81       	ldd	r24, Z+1	; 0x01
-    11a0:	84 30       	cpi	r24, 0x04	; 4
-    11a2:	31 f0       	breq	.+12     	; 0x11b0 <udc_next_desc_in_iface.constprop.3+0x36>
-    11a4:	85 30       	cpi	r24, 0x05	; 5
-    11a6:	39 f0       	breq	.+14     	; 0x11b6 <udc_next_desc_in_iface.constprop.3+0x3c>
-    11a8:	80 81       	ld	r24, Z
-    11aa:	e8 0f       	add	r30, r24
-    11ac:	f1 1d       	adc	r31, r1
-    11ae:	f4 cf       	rjmp	.-24     	; 0x1198 <udc_next_desc_in_iface.constprop.3+0x1e>
-    11b0:	80 e0       	ldi	r24, 0x00	; 0
-    11b2:	90 e0       	ldi	r25, 0x00	; 0
-    11b4:	08 95       	ret
-    11b6:	cf 01       	movw	r24, r30
-    11b8:	08 95       	ret
+0000116e <udi_vendor_iso_in_run2>:
+    116e:	0f 93       	push	r16
+    1170:	1f 93       	push	r17
+    1172:	9b 01       	movw	r18, r22
+    1174:	8a 01       	movw	r16, r20
+    1176:	ac 01       	movw	r20, r24
+    1178:	60 e0       	ldi	r22, 0x00	; 0
+    117a:	82 e8       	ldi	r24, 0x82	; 130
+    117c:	0e 94 d8 10 	call	0x21b0	; 0x21b0 <udd_ep_run>
+    1180:	1f 91       	pop	r17
+    1182:	0f 91       	pop	r16
+    1184:	08 95       	ret
 
-000011ba <udc_iface_enable>:
-    11ba:	1f 93       	push	r17
-    11bc:	cf 93       	push	r28
-    11be:	df 93       	push	r29
-    11c0:	18 2f       	mov	r17, r24
-    11c2:	a8 df       	rcall	.-176    	; 0x1114 <udc_update_iface_desc>
-    11c4:	88 23       	and	r24, r24
-    11c6:	39 f1       	breq	.+78     	; 0x1216 <udc_iface_enable+0x5c>
-    11c8:	c0 91 c8 20 	lds	r28, 0x20C8	; 0x8020c8 <udc_ptr_iface>
-    11cc:	d0 91 c9 20 	lds	r29, 0x20C9	; 0x8020c9 <udc_ptr_iface+0x1>
-    11d0:	ce 01       	movw	r24, r28
-    11d2:	d3 df       	rcall	.-90     	; 0x117a <udc_next_desc_in_iface.constprop.3>
-    11d4:	ec 01       	movw	r28, r24
-    11d6:	89 2b       	or	r24, r25
-    11d8:	41 f0       	breq	.+16     	; 0x11ea <udc_iface_enable+0x30>
-    11da:	4c 81       	ldd	r20, Y+4	; 0x04
-    11dc:	5d 81       	ldd	r21, Y+5	; 0x05
-    11de:	6b 81       	ldd	r22, Y+3	; 0x03
-    11e0:	8a 81       	ldd	r24, Y+2	; 0x02
-    11e2:	2b d7       	rcall	.+3670   	; 0x203a <udd_ep_alloc>
-    11e4:	81 11       	cpse	r24, r1
-    11e6:	f4 cf       	rjmp	.-24     	; 0x11d0 <udc_iface_enable+0x16>
-    11e8:	16 c0       	rjmp	.+44     	; 0x1216 <udc_iface_enable+0x5c>
-    11ea:	e0 91 ca 20 	lds	r30, 0x20CA	; 0x8020ca <udc_ptr_conf>
-    11ee:	f0 91 cb 20 	lds	r31, 0x20CB	; 0x8020cb <udc_ptr_conf+0x1>
-    11f2:	92 81       	ldd	r25, Z+2	; 0x02
-    11f4:	83 81       	ldd	r24, Z+3	; 0x03
-    11f6:	e9 2f       	mov	r30, r25
-    11f8:	f8 2f       	mov	r31, r24
-    11fa:	e1 0f       	add	r30, r17
-    11fc:	f1 1d       	adc	r31, r1
-    11fe:	e1 0f       	add	r30, r17
-    1200:	f1 1d       	adc	r31, r1
-    1202:	01 90       	ld	r0, Z+
-    1204:	f0 81       	ld	r31, Z
-    1206:	e0 2d       	mov	r30, r0
-    1208:	01 90       	ld	r0, Z+
-    120a:	f0 81       	ld	r31, Z
-    120c:	e0 2d       	mov	r30, r0
-    120e:	df 91       	pop	r29
-    1210:	cf 91       	pop	r28
-    1212:	1f 91       	pop	r17
-    1214:	09 94       	ijmp
-    1216:	80 e0       	ldi	r24, 0x00	; 0
-    1218:	df 91       	pop	r29
-    121a:	cf 91       	pop	r28
-    121c:	1f 91       	pop	r17
-    121e:	08 95       	ret
+00001186 <udi_vendor_iso_in_run3>:
+    1186:	0f 93       	push	r16
+    1188:	1f 93       	push	r17
+    118a:	9b 01       	movw	r18, r22
+    118c:	8a 01       	movw	r16, r20
+    118e:	ac 01       	movw	r20, r24
+    1190:	60 e0       	ldi	r22, 0x00	; 0
+    1192:	83 e8       	ldi	r24, 0x83	; 131
+    1194:	0e 94 d8 10 	call	0x21b0	; 0x21b0 <udd_ep_run>
+    1198:	1f 91       	pop	r17
+    119a:	0f 91       	pop	r16
+    119c:	08 95       	ret
 
-00001220 <udc_iface_disable>:
-    1220:	ef 92       	push	r14
-    1222:	ff 92       	push	r15
-    1224:	1f 93       	push	r17
-    1226:	cf 93       	push	r28
-    1228:	df 93       	push	r29
-    122a:	c8 2f       	mov	r28, r24
-    122c:	60 e0       	ldi	r22, 0x00	; 0
-    122e:	72 df       	rcall	.-284    	; 0x1114 <udc_update_iface_desc>
-    1230:	81 11       	cpse	r24, r1
-    1232:	02 c0       	rjmp	.+4      	; 0x1238 <udc_iface_disable+0x18>
-    1234:	10 e0       	ldi	r17, 0x00	; 0
-    1236:	2d c0       	rjmp	.+90     	; 0x1292 <udc_iface_disable+0x72>
-    1238:	e0 91 ca 20 	lds	r30, 0x20CA	; 0x8020ca <udc_ptr_conf>
-    123c:	f0 91 cb 20 	lds	r31, 0x20CB	; 0x8020cb <udc_ptr_conf+0x1>
-    1240:	92 81       	ldd	r25, Z+2	; 0x02
-    1242:	83 81       	ldd	r24, Z+3	; 0x03
-    1244:	e9 2f       	mov	r30, r25
-    1246:	f8 2f       	mov	r31, r24
-    1248:	ec 0f       	add	r30, r28
-    124a:	f1 1d       	adc	r31, r1
-    124c:	ec 0f       	add	r30, r28
-    124e:	f1 1d       	adc	r31, r1
-    1250:	e0 80       	ld	r14, Z
-    1252:	f1 80       	ldd	r15, Z+1	; 0x01
-    1254:	d7 01       	movw	r26, r14
-    1256:	16 96       	adiw	r26, 0x06	; 6
-    1258:	ed 91       	ld	r30, X+
-    125a:	fc 91       	ld	r31, X
-    125c:	17 97       	sbiw	r26, 0x07	; 7
-    125e:	09 95       	icall
-    1260:	68 2f       	mov	r22, r24
-    1262:	8c 2f       	mov	r24, r28
-    1264:	57 df       	rcall	.-338    	; 0x1114 <udc_update_iface_desc>
-    1266:	18 2f       	mov	r17, r24
-    1268:	88 23       	and	r24, r24
-    126a:	21 f3       	breq	.-56     	; 0x1234 <udc_iface_disable+0x14>
-    126c:	c0 91 c8 20 	lds	r28, 0x20C8	; 0x8020c8 <udc_ptr_iface>
-    1270:	d0 91 c9 20 	lds	r29, 0x20C9	; 0x8020c9 <udc_ptr_iface+0x1>
-    1274:	ce 01       	movw	r24, r28
-    1276:	81 df       	rcall	.-254    	; 0x117a <udc_next_desc_in_iface.constprop.3>
-    1278:	ec 01       	movw	r28, r24
-    127a:	89 2b       	or	r24, r25
-    127c:	21 f0       	breq	.+8      	; 0x1286 <udc_iface_disable+0x66>
-    127e:	8a 81       	ldd	r24, Y+2	; 0x02
-    1280:	0e 94 4a 11 	call	0x2294	; 0x2294 <udd_ep_free>
-    1284:	f7 cf       	rjmp	.-18     	; 0x1274 <udc_iface_disable+0x54>
-    1286:	d7 01       	movw	r26, r14
-    1288:	12 96       	adiw	r26, 0x02	; 2
-    128a:	ed 91       	ld	r30, X+
-    128c:	fc 91       	ld	r31, X
-    128e:	13 97       	sbiw	r26, 0x03	; 3
-    1290:	09 95       	icall
-    1292:	81 2f       	mov	r24, r17
-    1294:	df 91       	pop	r29
-    1296:	cf 91       	pop	r28
-    1298:	1f 91       	pop	r17
-    129a:	ff 90       	pop	r15
-    129c:	ef 90       	pop	r14
-    129e:	08 95       	ret
+0000119e <udc_valid_address>:
+    119e:	80 91 6c 24 	lds	r24, 0x246C	; 0x80246c <udd_g_ctrlreq+0x2>
+    11a2:	8f 77       	andi	r24, 0x7F	; 127
+    11a4:	87 c7       	rjmp	.+3854   	; 0x20b4 <udd_set_address>
 
-000012a0 <udc_get_interface_desc>:
-    12a0:	80 91 c8 20 	lds	r24, 0x20C8	; 0x8020c8 <udc_ptr_iface>
-    12a4:	90 91 c9 20 	lds	r25, 0x20C9	; 0x8020c9 <udc_ptr_iface+0x1>
-    12a8:	08 95       	ret
+000011a6 <udc_update_iface_desc>:
+    11a6:	90 91 cc 20 	lds	r25, 0x20CC	; 0x8020cc <udc_num_configuration>
+    11aa:	91 11       	cpse	r25, r1
+    11ac:	02 c0       	rjmp	.+4      	; 0x11b2 <udc_update_iface_desc+0xc>
+    11ae:	80 e0       	ldi	r24, 0x00	; 0
+    11b0:	08 95       	ret
+    11b2:	e0 91 ca 20 	lds	r30, 0x20CA	; 0x8020ca <udc_ptr_conf>
+    11b6:	f0 91 cb 20 	lds	r31, 0x20CB	; 0x8020cb <udc_ptr_conf+0x1>
+    11ba:	01 90       	ld	r0, Z+
+    11bc:	f0 81       	ld	r31, Z
+    11be:	e0 2d       	mov	r30, r0
+    11c0:	94 81       	ldd	r25, Z+4	; 0x04
+    11c2:	89 17       	cp	r24, r25
+    11c4:	a0 f7       	brcc	.-24     	; 0x11ae <udc_update_iface_desc+0x8>
+    11c6:	e0 93 c8 20 	sts	0x20C8, r30	; 0x8020c8 <udc_ptr_iface>
+    11ca:	f0 93 c9 20 	sts	0x20C9, r31	; 0x8020c9 <udc_ptr_iface+0x1>
+    11ce:	22 81       	ldd	r18, Z+2	; 0x02
+    11d0:	33 81       	ldd	r19, Z+3	; 0x03
+    11d2:	2e 0f       	add	r18, r30
+    11d4:	3f 1f       	adc	r19, r31
+    11d6:	e2 17       	cp	r30, r18
+    11d8:	f3 07       	cpc	r31, r19
+    11da:	98 f4       	brcc	.+38     	; 0x1202 <udc_update_iface_desc+0x5c>
+    11dc:	91 81       	ldd	r25, Z+1	; 0x01
+    11de:	94 30       	cpi	r25, 0x04	; 4
+    11e0:	61 f4       	brne	.+24     	; 0x11fa <udc_update_iface_desc+0x54>
+    11e2:	92 81       	ldd	r25, Z+2	; 0x02
+    11e4:	89 13       	cpse	r24, r25
+    11e6:	09 c0       	rjmp	.+18     	; 0x11fa <udc_update_iface_desc+0x54>
+    11e8:	93 81       	ldd	r25, Z+3	; 0x03
+    11ea:	69 13       	cpse	r22, r25
+    11ec:	06 c0       	rjmp	.+12     	; 0x11fa <udc_update_iface_desc+0x54>
+    11ee:	e0 93 c8 20 	sts	0x20C8, r30	; 0x8020c8 <udc_ptr_iface>
+    11f2:	f0 93 c9 20 	sts	0x20C9, r31	; 0x8020c9 <udc_ptr_iface+0x1>
+    11f6:	81 e0       	ldi	r24, 0x01	; 1
+    11f8:	08 95       	ret
+    11fa:	90 81       	ld	r25, Z
+    11fc:	e9 0f       	add	r30, r25
+    11fe:	f1 1d       	adc	r31, r1
+    1200:	ea cf       	rjmp	.-44     	; 0x11d6 <udc_update_iface_desc+0x30>
+    1202:	e0 93 c8 20 	sts	0x20C8, r30	; 0x8020c8 <udc_ptr_iface>
+    1206:	f0 93 c9 20 	sts	0x20C9, r31	; 0x8020c9 <udc_ptr_iface+0x1>
+    120a:	d1 cf       	rjmp	.-94     	; 0x11ae <udc_update_iface_desc+0x8>
 
-000012aa <udc_start>:
-    12aa:	42 c6       	rjmp	.+3204   	; 0x1f30 <udd_enable>
+0000120c <udc_next_desc_in_iface.constprop.3>:
+    120c:	e0 91 ca 20 	lds	r30, 0x20CA	; 0x8020ca <udc_ptr_conf>
+    1210:	f0 91 cb 20 	lds	r31, 0x20CB	; 0x8020cb <udc_ptr_conf+0x1>
+    1214:	01 90       	ld	r0, Z+
+    1216:	f0 81       	ld	r31, Z
+    1218:	e0 2d       	mov	r30, r0
+    121a:	22 81       	ldd	r18, Z+2	; 0x02
+    121c:	33 81       	ldd	r19, Z+3	; 0x03
+    121e:	2e 0f       	add	r18, r30
+    1220:	3f 1f       	adc	r19, r31
+    1222:	fc 01       	movw	r30, r24
+    1224:	40 81       	ld	r20, Z
+    1226:	e4 0f       	add	r30, r20
+    1228:	f1 1d       	adc	r31, r1
+    122a:	e2 17       	cp	r30, r18
+    122c:	f3 07       	cpc	r31, r19
+    122e:	48 f4       	brcc	.+18     	; 0x1242 <udc_next_desc_in_iface.constprop.3+0x36>
+    1230:	81 81       	ldd	r24, Z+1	; 0x01
+    1232:	84 30       	cpi	r24, 0x04	; 4
+    1234:	31 f0       	breq	.+12     	; 0x1242 <udc_next_desc_in_iface.constprop.3+0x36>
+    1236:	85 30       	cpi	r24, 0x05	; 5
+    1238:	39 f0       	breq	.+14     	; 0x1248 <udc_next_desc_in_iface.constprop.3+0x3c>
+    123a:	80 81       	ld	r24, Z
+    123c:	e8 0f       	add	r30, r24
+    123e:	f1 1d       	adc	r31, r1
+    1240:	f4 cf       	rjmp	.-24     	; 0x122a <udc_next_desc_in_iface.constprop.3+0x1e>
+    1242:	80 e0       	ldi	r24, 0x00	; 0
+    1244:	90 e0       	ldi	r25, 0x00	; 0
+    1246:	08 95       	ret
+    1248:	cf 01       	movw	r24, r30
+    124a:	08 95       	ret
 
-000012ac <udc_reset>:
-    12ac:	cf 93       	push	r28
-    12ae:	80 91 cc 20 	lds	r24, 0x20CC	; 0x8020cc <udc_num_configuration>
-    12b2:	81 11       	cpse	r24, r1
-    12b4:	08 c0       	rjmp	.+16     	; 0x12c6 <udc_reset+0x1a>
-    12b6:	10 92 cc 20 	sts	0x20CC, r1	; 0x8020cc <udc_num_configuration>
-    12ba:	10 92 d0 20 	sts	0x20D0, r1	; 0x8020d0 <udc_device_status>
-    12be:	10 92 d1 20 	sts	0x20D1, r1	; 0x8020d1 <udc_device_status+0x1>
-    12c2:	cf 91       	pop	r28
-    12c4:	08 95       	ret
-    12c6:	c0 e0       	ldi	r28, 0x00	; 0
-    12c8:	e0 91 ca 20 	lds	r30, 0x20CA	; 0x8020ca <udc_ptr_conf>
-    12cc:	f0 91 cb 20 	lds	r31, 0x20CB	; 0x8020cb <udc_ptr_conf+0x1>
-    12d0:	01 90       	ld	r0, Z+
-    12d2:	f0 81       	ld	r31, Z
-    12d4:	e0 2d       	mov	r30, r0
-    12d6:	84 81       	ldd	r24, Z+4	; 0x04
-    12d8:	c8 17       	cp	r28, r24
-    12da:	68 f7       	brcc	.-38     	; 0x12b6 <udc_reset+0xa>
-    12dc:	8c 2f       	mov	r24, r28
-    12de:	a0 df       	rcall	.-192    	; 0x1220 <udc_iface_disable>
-    12e0:	cf 5f       	subi	r28, 0xFF	; 255
-    12e2:	f2 cf       	rjmp	.-28     	; 0x12c8 <udc_reset+0x1c>
+0000124c <udc_iface_enable>:
+    124c:	1f 93       	push	r17
+    124e:	cf 93       	push	r28
+    1250:	df 93       	push	r29
+    1252:	18 2f       	mov	r17, r24
+    1254:	a8 df       	rcall	.-176    	; 0x11a6 <udc_update_iface_desc>
+    1256:	88 23       	and	r24, r24
+    1258:	39 f1       	breq	.+78     	; 0x12a8 <udc_iface_enable+0x5c>
+    125a:	c0 91 c8 20 	lds	r28, 0x20C8	; 0x8020c8 <udc_ptr_iface>
+    125e:	d0 91 c9 20 	lds	r29, 0x20C9	; 0x8020c9 <udc_ptr_iface+0x1>
+    1262:	ce 01       	movw	r24, r28
+    1264:	d3 df       	rcall	.-90     	; 0x120c <udc_next_desc_in_iface.constprop.3>
+    1266:	ec 01       	movw	r28, r24
+    1268:	89 2b       	or	r24, r25
+    126a:	41 f0       	breq	.+16     	; 0x127c <udc_iface_enable+0x30>
+    126c:	4c 81       	ldd	r20, Y+4	; 0x04
+    126e:	5d 81       	ldd	r21, Y+5	; 0x05
+    1270:	6b 81       	ldd	r22, Y+3	; 0x03
+    1272:	8a 81       	ldd	r24, Y+2	; 0x02
+    1274:	2c d7       	rcall	.+3672   	; 0x20ce <udd_ep_alloc>
+    1276:	81 11       	cpse	r24, r1
+    1278:	f4 cf       	rjmp	.-24     	; 0x1262 <udc_iface_enable+0x16>
+    127a:	16 c0       	rjmp	.+44     	; 0x12a8 <udc_iface_enable+0x5c>
+    127c:	e0 91 ca 20 	lds	r30, 0x20CA	; 0x8020ca <udc_ptr_conf>
+    1280:	f0 91 cb 20 	lds	r31, 0x20CB	; 0x8020cb <udc_ptr_conf+0x1>
+    1284:	92 81       	ldd	r25, Z+2	; 0x02
+    1286:	83 81       	ldd	r24, Z+3	; 0x03
+    1288:	e9 2f       	mov	r30, r25
+    128a:	f8 2f       	mov	r31, r24
+    128c:	e1 0f       	add	r30, r17
+    128e:	f1 1d       	adc	r31, r1
+    1290:	e1 0f       	add	r30, r17
+    1292:	f1 1d       	adc	r31, r1
+    1294:	01 90       	ld	r0, Z+
+    1296:	f0 81       	ld	r31, Z
+    1298:	e0 2d       	mov	r30, r0
+    129a:	01 90       	ld	r0, Z+
+    129c:	f0 81       	ld	r31, Z
+    129e:	e0 2d       	mov	r30, r0
+    12a0:	df 91       	pop	r29
+    12a2:	cf 91       	pop	r28
+    12a4:	1f 91       	pop	r17
+    12a6:	09 94       	ijmp
+    12a8:	80 e0       	ldi	r24, 0x00	; 0
+    12aa:	df 91       	pop	r29
+    12ac:	cf 91       	pop	r28
+    12ae:	1f 91       	pop	r17
+    12b0:	08 95       	ret
 
-000012e4 <udc_sof_notify>:
-    12e4:	cf 93       	push	r28
-    12e6:	80 91 cc 20 	lds	r24, 0x20CC	; 0x8020cc <udc_num_configuration>
-    12ea:	88 23       	and	r24, r24
-    12ec:	f1 f0       	breq	.+60     	; 0x132a <udc_sof_notify+0x46>
-    12ee:	c0 e0       	ldi	r28, 0x00	; 0
-    12f0:	e0 91 ca 20 	lds	r30, 0x20CA	; 0x8020ca <udc_ptr_conf>
-    12f4:	f0 91 cb 20 	lds	r31, 0x20CB	; 0x8020cb <udc_ptr_conf+0x1>
-    12f8:	a0 81       	ld	r26, Z
-    12fa:	b1 81       	ldd	r27, Z+1	; 0x01
-    12fc:	14 96       	adiw	r26, 0x04	; 4
-    12fe:	8c 91       	ld	r24, X
-    1300:	c8 17       	cp	r28, r24
-    1302:	98 f4       	brcc	.+38     	; 0x132a <udc_sof_notify+0x46>
-    1304:	92 81       	ldd	r25, Z+2	; 0x02
-    1306:	83 81       	ldd	r24, Z+3	; 0x03
-    1308:	e9 2f       	mov	r30, r25
-    130a:	f8 2f       	mov	r31, r24
-    130c:	ec 0f       	add	r30, r28
-    130e:	f1 1d       	adc	r31, r1
-    1310:	ec 0f       	add	r30, r28
-    1312:	f1 1d       	adc	r31, r1
-    1314:	01 90       	ld	r0, Z+
-    1316:	f0 81       	ld	r31, Z
-    1318:	e0 2d       	mov	r30, r0
-    131a:	00 84       	ldd	r0, Z+8	; 0x08
-    131c:	f1 85       	ldd	r31, Z+9	; 0x09
-    131e:	e0 2d       	mov	r30, r0
-    1320:	30 97       	sbiw	r30, 0x00	; 0
-    1322:	09 f0       	breq	.+2      	; 0x1326 <udc_sof_notify+0x42>
-    1324:	09 95       	icall
-    1326:	cf 5f       	subi	r28, 0xFF	; 255
-    1328:	e3 cf       	rjmp	.-58     	; 0x12f0 <udc_sof_notify+0xc>
-    132a:	cf 91       	pop	r28
-    132c:	08 95       	ret
+000012b2 <udc_iface_disable>:
+    12b2:	ef 92       	push	r14
+    12b4:	ff 92       	push	r15
+    12b6:	1f 93       	push	r17
+    12b8:	cf 93       	push	r28
+    12ba:	df 93       	push	r29
+    12bc:	c8 2f       	mov	r28, r24
+    12be:	60 e0       	ldi	r22, 0x00	; 0
+    12c0:	72 df       	rcall	.-284    	; 0x11a6 <udc_update_iface_desc>
+    12c2:	81 11       	cpse	r24, r1
+    12c4:	02 c0       	rjmp	.+4      	; 0x12ca <udc_iface_disable+0x18>
+    12c6:	10 e0       	ldi	r17, 0x00	; 0
+    12c8:	2d c0       	rjmp	.+90     	; 0x1324 <udc_iface_disable+0x72>
+    12ca:	e0 91 ca 20 	lds	r30, 0x20CA	; 0x8020ca <udc_ptr_conf>
+    12ce:	f0 91 cb 20 	lds	r31, 0x20CB	; 0x8020cb <udc_ptr_conf+0x1>
+    12d2:	92 81       	ldd	r25, Z+2	; 0x02
+    12d4:	83 81       	ldd	r24, Z+3	; 0x03
+    12d6:	e9 2f       	mov	r30, r25
+    12d8:	f8 2f       	mov	r31, r24
+    12da:	ec 0f       	add	r30, r28
+    12dc:	f1 1d       	adc	r31, r1
+    12de:	ec 0f       	add	r30, r28
+    12e0:	f1 1d       	adc	r31, r1
+    12e2:	e0 80       	ld	r14, Z
+    12e4:	f1 80       	ldd	r15, Z+1	; 0x01
+    12e6:	d7 01       	movw	r26, r14
+    12e8:	16 96       	adiw	r26, 0x06	; 6
+    12ea:	ed 91       	ld	r30, X+
+    12ec:	fc 91       	ld	r31, X
+    12ee:	17 97       	sbiw	r26, 0x07	; 7
+    12f0:	09 95       	icall
+    12f2:	68 2f       	mov	r22, r24
+    12f4:	8c 2f       	mov	r24, r28
+    12f6:	57 df       	rcall	.-338    	; 0x11a6 <udc_update_iface_desc>
+    12f8:	18 2f       	mov	r17, r24
+    12fa:	88 23       	and	r24, r24
+    12fc:	21 f3       	breq	.-56     	; 0x12c6 <udc_iface_disable+0x14>
+    12fe:	c0 91 c8 20 	lds	r28, 0x20C8	; 0x8020c8 <udc_ptr_iface>
+    1302:	d0 91 c9 20 	lds	r29, 0x20C9	; 0x8020c9 <udc_ptr_iface+0x1>
+    1306:	ce 01       	movw	r24, r28
+    1308:	81 df       	rcall	.-254    	; 0x120c <udc_next_desc_in_iface.constprop.3>
+    130a:	ec 01       	movw	r28, r24
+    130c:	89 2b       	or	r24, r25
+    130e:	21 f0       	breq	.+8      	; 0x1318 <udc_iface_disable+0x66>
+    1310:	8a 81       	ldd	r24, Y+2	; 0x02
+    1312:	0e 94 94 11 	call	0x2328	; 0x2328 <udd_ep_free>
+    1316:	f7 cf       	rjmp	.-18     	; 0x1306 <udc_iface_disable+0x54>
+    1318:	d7 01       	movw	r26, r14
+    131a:	12 96       	adiw	r26, 0x02	; 2
+    131c:	ed 91       	ld	r30, X+
+    131e:	fc 91       	ld	r31, X
+    1320:	13 97       	sbiw	r26, 0x03	; 3
+    1322:	09 95       	icall
+    1324:	81 2f       	mov	r24, r17
+    1326:	df 91       	pop	r29
+    1328:	cf 91       	pop	r28
+    132a:	1f 91       	pop	r17
+    132c:	ff 90       	pop	r15
+    132e:	ef 90       	pop	r14
+    1330:	08 95       	ret
 
-0000132e <udc_process_setup>:
-    132e:	ef 92       	push	r14
-    1330:	ff 92       	push	r15
-    1332:	0f 93       	push	r16
-    1334:	1f 93       	push	r17
-    1336:	cf 93       	push	r28
-    1338:	df 93       	push	r29
-    133a:	1f 92       	push	r1
-    133c:	cd b7       	in	r28, 0x3d	; 61
-    133e:	de b7       	in	r29, 0x3e	; 62
-    1340:	10 92 74 24 	sts	0x2474, r1	; 0x802474 <udd_g_ctrlreq+0xa>
-    1344:	10 92 75 24 	sts	0x2475, r1	; 0x802475 <udd_g_ctrlreq+0xb>
-    1348:	10 92 76 24 	sts	0x2476, r1	; 0x802476 <udd_g_ctrlreq+0xc>
-    134c:	10 92 77 24 	sts	0x2477, r1	; 0x802477 <udd_g_ctrlreq+0xd>
-    1350:	10 92 78 24 	sts	0x2478, r1	; 0x802478 <udd_g_ctrlreq+0xe>
-    1354:	10 92 79 24 	sts	0x2479, r1	; 0x802479 <udd_g_ctrlreq+0xf>
-    1358:	80 91 6a 24 	lds	r24, 0x246A	; 0x80246a <udd_g_ctrlreq>
-    135c:	87 ff       	sbrs	r24, 7
-    135e:	07 c0       	rjmp	.+14     	; 0x136e <udc_process_setup+0x40>
-    1360:	20 91 70 24 	lds	r18, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
-    1364:	30 91 71 24 	lds	r19, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
-    1368:	23 2b       	or	r18, r19
-    136a:	09 f4       	brne	.+2      	; 0x136e <udc_process_setup+0x40>
-    136c:	1a c3       	rjmp	.+1588   	; 0x19a2 <udc_process_setup+0x674>
-    136e:	98 2f       	mov	r25, r24
-    1370:	90 76       	andi	r25, 0x60	; 96
-    1372:	90 34       	cpi	r25, 0x40	; 64
-    1374:	09 f0       	breq	.+2      	; 0x1378 <udc_process_setup+0x4a>
-    1376:	d6 c0       	rjmp	.+428    	; 0x1524 <udc_process_setup+0x1f6>
-    1378:	e0 91 6b 24 	lds	r30, 0x246B	; 0x80246b <udd_g_ctrlreq+0x1>
-    137c:	8e 2f       	mov	r24, r30
-    137e:	90 e0       	ldi	r25, 0x00	; 0
-    1380:	fc 01       	movw	r30, r24
-    1382:	e0 5a       	subi	r30, 0xA0	; 160
-    1384:	f1 09       	sbc	r31, r1
-    1386:	e8 30       	cpi	r30, 0x08	; 8
-    1388:	f1 05       	cpc	r31, r1
-    138a:	08 f0       	brcs	.+2      	; 0x138e <udc_process_setup+0x60>
-    138c:	99 c2       	rjmp	.+1330   	; 0x18c0 <udc_process_setup+0x592>
-    138e:	ea 5f       	subi	r30, 0xFA	; 250
-    1390:	fe 4f       	sbci	r31, 0xFE	; 254
-    1392:	0c 94 ff 12 	jmp	0x25fe	; 0x25fe <__tablejump2__>
-    1396:	00 00       	nop
-    1398:	02 c3       	rjmp	.+1540   	; 0x199e <udc_process_setup+0x670>
-    139a:	10 92 00 08 	sts	0x0800, r1	; 0x800800 <__TEXT_REGION_LENGTH__+0x700800>
-    139e:	80 91 6c 24 	lds	r24, 0x246C	; 0x80246c <udd_g_ctrlreq+0x2>
-    13a2:	90 91 6d 24 	lds	r25, 0x246D	; 0x80246d <udd_g_ctrlreq+0x3>
-    13a6:	80 93 36 08 	sts	0x0836, r24	; 0x800836 <__TEXT_REGION_LENGTH__+0x700836>
-    13aa:	90 93 37 08 	sts	0x0837, r25	; 0x800837 <__TEXT_REGION_LENGTH__+0x700837>
-    13ae:	80 91 6e 24 	lds	r24, 0x246E	; 0x80246e <udd_g_ctrlreq+0x4>
-    13b2:	8f 70       	andi	r24, 0x0F	; 15
-    13b4:	80 93 00 08 	sts	0x0800, r24	; 0x800800 <__TEXT_REGION_LENGTH__+0x700800>
-    13b8:	60 91 70 24 	lds	r22, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
-    13bc:	70 91 71 24 	lds	r23, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
-    13c0:	8a e6       	ldi	r24, 0x6A	; 106
-    13c2:	92 e2       	ldi	r25, 0x22	; 34
-    13c4:	33 d6       	rcall	.+3174   	; 0x202c <udd_set_setup_payload>
-    13c6:	20 91 04 20 	lds	r18, 0x2004	; 0x802004 <dacBuf_len>
-    13ca:	30 91 05 20 	lds	r19, 0x2005	; 0x802005 <dacBuf_len+0x1>
-    13ce:	80 91 70 24 	lds	r24, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
-    13d2:	90 91 71 24 	lds	r25, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
-    13d6:	28 17       	cp	r18, r24
-    13d8:	39 07       	cpc	r19, r25
-    13da:	09 f4       	brne	.+2      	; 0x13de <udc_process_setup+0xb0>
-    13dc:	e0 c2       	rjmp	.+1472   	; 0x199e <udc_process_setup+0x670>
-    13de:	80 93 04 20 	sts	0x2004, r24	; 0x802004 <dacBuf_len>
-    13e2:	90 93 05 20 	sts	0x2005, r25	; 0x802005 <dacBuf_len+0x1>
-    13e6:	26 c0       	rjmp	.+76     	; 0x1434 <udc_process_setup+0x106>
-    13e8:	10 92 40 08 	sts	0x0840, r1	; 0x800840 <__TEXT_REGION_LENGTH__+0x700840>
-    13ec:	80 91 6c 24 	lds	r24, 0x246C	; 0x80246c <udd_g_ctrlreq+0x2>
-    13f0:	90 91 6d 24 	lds	r25, 0x246D	; 0x80246d <udd_g_ctrlreq+0x3>
-    13f4:	80 93 76 08 	sts	0x0876, r24	; 0x800876 <__TEXT_REGION_LENGTH__+0x700876>
-    13f8:	90 93 77 08 	sts	0x0877, r25	; 0x800877 <__TEXT_REGION_LENGTH__+0x700877>
-    13fc:	80 91 6e 24 	lds	r24, 0x246E	; 0x80246e <udd_g_ctrlreq+0x4>
-    1400:	8f 70       	andi	r24, 0x0F	; 15
-    1402:	80 93 40 08 	sts	0x0840, r24	; 0x800840 <__TEXT_REGION_LENGTH__+0x700840>
-    1406:	60 91 70 24 	lds	r22, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
-    140a:	70 91 71 24 	lds	r23, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
-    140e:	8a e7       	ldi	r24, 0x7A	; 122
-    1410:	94 e2       	ldi	r25, 0x24	; 36
-    1412:	0c d6       	rcall	.+3096   	; 0x202c <udd_set_setup_payload>
-    1414:	20 91 02 20 	lds	r18, 0x2002	; 0x802002 <auxDacBufLen>
-    1418:	30 91 03 20 	lds	r19, 0x2003	; 0x802003 <auxDacBufLen+0x1>
-    141c:	80 91 70 24 	lds	r24, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
-    1420:	90 91 71 24 	lds	r25, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
-    1424:	28 17       	cp	r18, r24
-    1426:	39 07       	cpc	r19, r25
-    1428:	09 f4       	brne	.+2      	; 0x142c <udc_process_setup+0xfe>
-    142a:	b9 c2       	rjmp	.+1394   	; 0x199e <udc_process_setup+0x670>
-    142c:	80 93 02 20 	sts	0x2002, r24	; 0x802002 <auxDacBufLen>
-    1430:	90 93 03 20 	sts	0x2003, r25	; 0x802003 <auxDacBufLen+0x1>
-    1434:	e0 91 00 20 	lds	r30, 0x2000	; 0x802000 <__data_start>
-    1438:	8e 2f       	mov	r24, r30
-    143a:	90 e0       	ldi	r25, 0x00	; 0
-    143c:	88 30       	cpi	r24, 0x08	; 8
-    143e:	91 05       	cpc	r25, r1
-    1440:	08 f0       	brcs	.+2      	; 0x1444 <udc_process_setup+0x116>
-    1442:	ad c2       	rjmp	.+1370   	; 0x199e <udc_process_setup+0x670>
-    1444:	fc 01       	movw	r30, r24
-    1446:	e2 5f       	subi	r30, 0xF2	; 242
-    1448:	fe 4f       	sbci	r31, 0xFE	; 254
-    144a:	0c 94 ff 12 	jmp	0x25fe	; 0x25fe <__tablejump2__>
-    144e:	10 92 68 09 	sts	0x0968, r1	; 0x800968 <__TEXT_REGION_LENGTH__+0x700968>
-    1452:	10 92 69 09 	sts	0x0969, r1	; 0x800969 <__TEXT_REGION_LENGTH__+0x700969>
-    1456:	80 91 6c 24 	lds	r24, 0x246C	; 0x80246c <udd_g_ctrlreq+0x2>
-    145a:	80 93 c0 20 	sts	0x20C0, r24	; 0x8020c0 <__data_end>
-    145e:	9f c2       	rjmp	.+1342   	; 0x199e <udc_process_setup+0x670>
-    1460:	80 91 6c 24 	lds	r24, 0x246C	; 0x80246c <udd_g_ctrlreq+0x2>
-    1464:	80 93 24 06 	sts	0x0624, r24	; 0x800624 <__TEXT_REGION_LENGTH__+0x700624>
-    1468:	9a c2       	rjmp	.+1332   	; 0x199e <udc_process_setup+0x670>
-    146a:	e0 91 6c 24 	lds	r30, 0x246C	; 0x80246c <udd_g_ctrlreq+0x2>
-    146e:	f0 91 6d 24 	lds	r31, 0x246D	; 0x80246d <udd_g_ctrlreq+0x3>
-    1472:	e8 30       	cpi	r30, 0x08	; 8
-    1474:	f1 05       	cpc	r31, r1
-    1476:	08 f0       	brcs	.+2      	; 0x147a <udc_process_setup+0x14c>
-    1478:	23 c2       	rjmp	.+1094   	; 0x18c0 <udc_process_setup+0x592>
-    147a:	ea 5e       	subi	r30, 0xEA	; 234
-    147c:	fe 4f       	sbci	r31, 0xFE	; 254
-    147e:	0c 94 ff 12 	jmp	0x25fe	; 0x25fe <__tablejump2__>
-    1482:	60 e0       	ldi	r22, 0x00	; 0
-    1484:	80 e0       	ldi	r24, 0x00	; 0
-    1486:	0e 94 fe 01 	call	0x3fc	; 0x3fc <tiny_adc_setup>
-    148a:	80 91 6e 24 	lds	r24, 0x246E	; 0x80246e <udd_g_ctrlreq+0x4>
-    148e:	0e 94 cb 01 	call	0x396	; 0x396 <tiny_adc_ch0setup>
-    1492:	20 d8       	rcall	.-4032   	; 0x4d4 <tiny_dma_set_mode_0>
-    1494:	84 c2       	rjmp	.+1288   	; 0x199e <udc_process_setup+0x670>
-    1496:	60 e0       	ldi	r22, 0x00	; 0
-    1498:	80 e0       	ldi	r24, 0x00	; 0
-    149a:	0e 94 fe 01 	call	0x3fc	; 0x3fc <tiny_adc_setup>
-    149e:	80 91 6e 24 	lds	r24, 0x246E	; 0x80246e <udd_g_ctrlreq+0x4>
-    14a2:	0e 94 cb 01 	call	0x396	; 0x396 <tiny_adc_ch0setup>
-    14a6:	8a d8       	rcall	.-3820   	; 0x5bc <tiny_dma_set_mode_1>
-    14a8:	7a c2       	rjmp	.+1268   	; 0x199e <udc_process_setup+0x670>
-    14aa:	61 e0       	ldi	r22, 0x01	; 1
-    14ac:	81 e0       	ldi	r24, 0x01	; 1
-    14ae:	0e 94 fe 01 	call	0x3fc	; 0x3fc <tiny_adc_setup>
-    14b2:	80 91 6e 24 	lds	r24, 0x246E	; 0x80246e <udd_g_ctrlreq+0x4>
-    14b6:	0e 94 cb 01 	call	0x396	; 0x396 <tiny_adc_ch0setup>
-    14ba:	80 91 6f 24 	lds	r24, 0x246F	; 0x80246f <udd_g_ctrlreq+0x5>
-    14be:	0e 94 e1 01 	call	0x3c2	; 0x3c2 <tiny_adc_ch1setup>
-    14c2:	f5 d8       	rcall	.-3606   	; 0x6ae <tiny_dma_set_mode_2>
-    14c4:	6c c2       	rjmp	.+1240   	; 0x199e <udc_process_setup+0x670>
-    14c6:	67 d9       	rcall	.-3378   	; 0x796 <tiny_dma_set_mode_3>
-    14c8:	6a c2       	rjmp	.+1236   	; 0x199e <udc_process_setup+0x670>
-    14ca:	e2 d9       	rcall	.-3132   	; 0x890 <tiny_dma_set_mode_4>
-    14cc:	68 c2       	rjmp	.+1232   	; 0x199e <udc_process_setup+0x670>
-    14ce:	60 e0       	ldi	r22, 0x00	; 0
-    14d0:	80 e0       	ldi	r24, 0x00	; 0
-    14d2:	0e 94 fe 01 	call	0x3fc	; 0x3fc <tiny_adc_setup>
-    14d6:	80 91 6e 24 	lds	r24, 0x246E	; 0x80246e <udd_g_ctrlreq+0x4>
-    14da:	0e 94 cb 01 	call	0x396	; 0x396 <tiny_adc_ch0setup>
-    14de:	4f da       	rcall	.-2914   	; 0x97e <tiny_dma_set_mode_5>
-    14e0:	5e c2       	rjmp	.+1212   	; 0x199e <udc_process_setup+0x670>
-    14e2:	61 e0       	ldi	r22, 0x01	; 1
-    14e4:	80 e0       	ldi	r24, 0x00	; 0
-    14e6:	0e 94 fe 01 	call	0x3fc	; 0x3fc <tiny_adc_setup>
-    14ea:	80 91 6e 24 	lds	r24, 0x246E	; 0x80246e <udd_g_ctrlreq+0x4>
-    14ee:	0e 94 cb 01 	call	0x396	; 0x396 <tiny_adc_ch0setup>
-    14f2:	8d da       	rcall	.-2790   	; 0xa0e <tiny_dma_set_mode_6>
-    14f4:	54 c2       	rjmp	.+1192   	; 0x199e <udc_process_setup+0x670>
-    14f6:	62 e0       	ldi	r22, 0x02	; 2
-    14f8:	80 e0       	ldi	r24, 0x00	; 0
-    14fa:	0e 94 fe 01 	call	0x3fc	; 0x3fc <tiny_adc_setup>
-    14fe:	80 91 6e 24 	lds	r24, 0x246E	; 0x80246e <udd_g_ctrlreq+0x4>
-    1502:	80 68       	ori	r24, 0x80	; 128
-    1504:	0e 94 cb 01 	call	0x396	; 0x396 <tiny_adc_ch0setup>
-    1508:	f9 da       	rcall	.-2574   	; 0xafc <tiny_dma_set_mode_7>
-    150a:	49 c2       	rjmp	.+1170   	; 0x199e <udc_process_setup+0x670>
-    150c:	80 91 6c 24 	lds	r24, 0x246C	; 0x80246c <udd_g_ctrlreq+0x2>
-    1510:	80 93 84 06 	sts	0x0684, r24	; 0x800684 <__TEXT_REGION_LENGTH__+0x700684>
-    1514:	44 c2       	rjmp	.+1160   	; 0x199e <udc_process_setup+0x670>
-    1516:	e9 e7       	ldi	r30, 0x79	; 121
-    1518:	f0 e0       	ldi	r31, 0x00	; 0
-    151a:	91 e0       	ldi	r25, 0x01	; 1
-    151c:	88 ed       	ldi	r24, 0xD8	; 216
-    151e:	f8 94       	cli
-    1520:	84 bf       	out	0x34, r24	; 52
-    1522:	90 83       	st	Z, r25
-    1524:	91 11       	cpse	r25, r1
-    1526:	cc c1       	rjmp	.+920    	; 0x18c0 <udc_process_setup+0x592>
-    1528:	87 ff       	sbrs	r24, 7
-    152a:	fd c0       	rjmp	.+506    	; 0x1726 <udc_process_setup+0x3f8>
-    152c:	20 91 70 24 	lds	r18, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
-    1530:	30 91 71 24 	lds	r19, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
-    1534:	21 15       	cp	r18, r1
-    1536:	31 05       	cpc	r19, r1
-    1538:	09 f4       	brne	.+2      	; 0x153c <udc_process_setup+0x20e>
-    153a:	c2 c1       	rjmp	.+900    	; 0x18c0 <udc_process_setup+0x592>
-    153c:	8f 71       	andi	r24, 0x1F	; 31
-    153e:	09 f0       	breq	.+2      	; 0x1542 <udc_process_setup+0x214>
-    1540:	9f c0       	rjmp	.+318    	; 0x1680 <udc_process_setup+0x352>
-    1542:	80 91 6b 24 	lds	r24, 0x246B	; 0x80246b <udd_g_ctrlreq+0x1>
-    1546:	86 30       	cpi	r24, 0x06	; 6
-    1548:	71 f0       	breq	.+28     	; 0x1566 <udc_process_setup+0x238>
-    154a:	88 30       	cpi	r24, 0x08	; 8
-    154c:	09 f4       	brne	.+2      	; 0x1550 <udc_process_setup+0x222>
-    154e:	8e c0       	rjmp	.+284    	; 0x166c <udc_process_setup+0x33e>
-    1550:	81 11       	cpse	r24, r1
-    1552:	b6 c1       	rjmp	.+876    	; 0x18c0 <udc_process_setup+0x592>
-    1554:	22 30       	cpi	r18, 0x02	; 2
-    1556:	31 05       	cpc	r19, r1
-    1558:	09 f0       	breq	.+2      	; 0x155c <udc_process_setup+0x22e>
-    155a:	b2 c1       	rjmp	.+868    	; 0x18c0 <udc_process_setup+0x592>
-    155c:	62 e0       	ldi	r22, 0x02	; 2
-    155e:	70 e0       	ldi	r23, 0x00	; 0
-    1560:	80 ed       	ldi	r24, 0xD0	; 208
-    1562:	90 e2       	ldi	r25, 0x20	; 32
-    1564:	8b c0       	rjmp	.+278    	; 0x167c <udc_process_setup+0x34e>
-    1566:	80 91 6c 24 	lds	r24, 0x246C	; 0x80246c <udd_g_ctrlreq+0x2>
-    156a:	90 91 6d 24 	lds	r25, 0x246D	; 0x80246d <udd_g_ctrlreq+0x3>
-    156e:	29 2f       	mov	r18, r25
-    1570:	33 27       	eor	r19, r19
-    1572:	22 30       	cpi	r18, 0x02	; 2
-    1574:	31 05       	cpc	r19, r1
-    1576:	a1 f0       	breq	.+40     	; 0x15a0 <udc_process_setup+0x272>
-    1578:	64 f4       	brge	.+24     	; 0x1592 <udc_process_setup+0x264>
-    157a:	21 30       	cpi	r18, 0x01	; 1
-    157c:	31 05       	cpc	r19, r1
-    157e:	09 f0       	breq	.+2      	; 0x1582 <udc_process_setup+0x254>
-    1580:	9f c1       	rjmp	.+830    	; 0x18c0 <udc_process_setup+0x592>
-    1582:	80 91 10 20 	lds	r24, 0x2010	; 0x802010 <udc_config>
-    1586:	90 91 11 20 	lds	r25, 0x2011	; 0x802011 <udc_config+0x1>
-    158a:	dc 01       	movw	r26, r24
-    158c:	6c 91       	ld	r22, X
-    158e:	70 e0       	ldi	r23, 0x00	; 0
-    1590:	5b c0       	rjmp	.+182    	; 0x1648 <udc_process_setup+0x31a>
-    1592:	23 30       	cpi	r18, 0x03	; 3
-    1594:	31 05       	cpc	r19, r1
-    1596:	89 f1       	breq	.+98     	; 0x15fa <udc_process_setup+0x2cc>
-    1598:	2f 30       	cpi	r18, 0x0F	; 15
-    159a:	31 05       	cpc	r19, r1
-    159c:	09 f1       	breq	.+66     	; 0x15e0 <udc_process_setup+0x2b2>
-    159e:	90 c1       	rjmp	.+800    	; 0x18c0 <udc_process_setup+0x592>
-    15a0:	e0 91 10 20 	lds	r30, 0x2010	; 0x802010 <udc_config>
-    15a4:	f0 91 11 20 	lds	r31, 0x2011	; 0x802011 <udc_config+0x1>
-    15a8:	21 89       	ldd	r18, Z+17	; 0x11
-    15aa:	82 17       	cp	r24, r18
-    15ac:	08 f0       	brcs	.+2      	; 0x15b0 <udc_process_setup+0x282>
-    15ae:	88 c1       	rjmp	.+784    	; 0x18c0 <udc_process_setup+0x592>
-    15b0:	99 27       	eor	r25, r25
-    15b2:	88 0f       	add	r24, r24
-    15b4:	99 1f       	adc	r25, r25
-    15b6:	88 0f       	add	r24, r24
-    15b8:	99 1f       	adc	r25, r25
-    15ba:	e0 91 12 20 	lds	r30, 0x2012	; 0x802012 <udc_config+0x2>
-    15be:	f0 91 13 20 	lds	r31, 0x2013	; 0x802013 <udc_config+0x3>
-    15c2:	e8 0f       	add	r30, r24
-    15c4:	f9 1f       	adc	r31, r25
-    15c6:	80 81       	ld	r24, Z
-    15c8:	91 81       	ldd	r25, Z+1	; 0x01
-    15ca:	fc 01       	movw	r30, r24
-    15cc:	62 81       	ldd	r22, Z+2	; 0x02
-    15ce:	73 81       	ldd	r23, Z+3	; 0x03
-    15d0:	2d d5       	rcall	.+2650   	; 0x202c <udd_set_setup_payload>
-    15d2:	e0 91 72 24 	lds	r30, 0x2472	; 0x802472 <udd_g_ctrlreq+0x8>
-    15d6:	f0 91 73 24 	lds	r31, 0x2473	; 0x802473 <udd_g_ctrlreq+0x9>
-    15da:	82 e0       	ldi	r24, 0x02	; 2
-    15dc:	81 83       	std	Z+1, r24	; 0x01
-    15de:	35 c0       	rjmp	.+106    	; 0x164a <udc_process_setup+0x31c>
-    15e0:	80 91 14 20 	lds	r24, 0x2014	; 0x802014 <udc_config+0x4>
-    15e4:	90 91 15 20 	lds	r25, 0x2015	; 0x802015 <udc_config+0x5>
-    15e8:	00 97       	sbiw	r24, 0x00	; 0
-    15ea:	09 f4       	brne	.+2      	; 0x15ee <udc_process_setup+0x2c0>
-    15ec:	69 c1       	rjmp	.+722    	; 0x18c0 <udc_process_setup+0x592>
-    15ee:	dc 01       	movw	r26, r24
-    15f0:	12 96       	adiw	r26, 0x02	; 2
-    15f2:	6d 91       	ld	r22, X+
-    15f4:	7c 91       	ld	r23, X
-    15f6:	13 97       	sbiw	r26, 0x03	; 3
-    15f8:	27 c0       	rjmp	.+78     	; 0x1648 <udc_process_setup+0x31a>
-    15fa:	99 27       	eor	r25, r25
-    15fc:	81 30       	cpi	r24, 0x01	; 1
-    15fe:	91 05       	cpc	r25, r1
-    1600:	69 f0       	breq	.+26     	; 0x161c <udc_process_setup+0x2ee>
-    1602:	38 f0       	brcs	.+14     	; 0x1612 <udc_process_setup+0x2e4>
-    1604:	02 97       	sbiw	r24, 0x02	; 2
-    1606:	09 f0       	breq	.+2      	; 0x160a <udc_process_setup+0x2dc>
-    1608:	5b c1       	rjmp	.+694    	; 0x18c0 <udc_process_setup+0x592>
-    160a:	68 e1       	ldi	r22, 0x18	; 24
-    160c:	8a e8       	ldi	r24, 0x8A	; 138
-    160e:	90 e2       	ldi	r25, 0x20	; 32
-    1610:	08 c0       	rjmp	.+16     	; 0x1622 <udc_process_setup+0x2f4>
-    1612:	64 e0       	ldi	r22, 0x04	; 4
-    1614:	70 e0       	ldi	r23, 0x00	; 0
-    1616:	8e ea       	ldi	r24, 0xAE	; 174
-    1618:	90 e2       	ldi	r25, 0x20	; 32
-    161a:	16 c0       	rjmp	.+44     	; 0x1648 <udc_process_setup+0x31a>
-    161c:	69 e0       	ldi	r22, 0x09	; 9
-    161e:	83 ea       	ldi	r24, 0xA3	; 163
-    1620:	90 e2       	ldi	r25, 0x20	; 32
-    1622:	28 2f       	mov	r18, r24
-    1624:	aa e5       	ldi	r26, 0x5A	; 90
-    1626:	b0 e2       	ldi	r27, 0x20	; 32
-    1628:	fc 01       	movw	r30, r24
-    162a:	81 91       	ld	r24, Z+
-    162c:	90 e0       	ldi	r25, 0x00	; 0
-    162e:	8d 93       	st	X+, r24
-    1630:	9d 93       	st	X+, r25
-    1632:	8e 2f       	mov	r24, r30
-    1634:	82 1b       	sub	r24, r18
-    1636:	86 17       	cp	r24, r22
-    1638:	c0 f3       	brcs	.-16     	; 0x162a <udc_process_setup+0x2fc>
-    163a:	66 0f       	add	r22, r22
-    163c:	6e 5f       	subi	r22, 0xFE	; 254
-    163e:	60 93 58 20 	sts	0x2058, r22	; 0x802058 <udc_string_desc>
-    1642:	70 e0       	ldi	r23, 0x00	; 0
-    1644:	88 e5       	ldi	r24, 0x58	; 88
-    1646:	90 e2       	ldi	r25, 0x20	; 32
-    1648:	f1 d4       	rcall	.+2530   	; 0x202c <udd_set_setup_payload>
-    164a:	80 91 70 24 	lds	r24, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
-    164e:	90 91 71 24 	lds	r25, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
-    1652:	20 91 74 24 	lds	r18, 0x2474	; 0x802474 <udd_g_ctrlreq+0xa>
-    1656:	30 91 75 24 	lds	r19, 0x2475	; 0x802475 <udd_g_ctrlreq+0xb>
-    165a:	82 17       	cp	r24, r18
-    165c:	93 07       	cpc	r25, r19
-    165e:	08 f0       	brcs	.+2      	; 0x1662 <udc_process_setup+0x334>
-    1660:	9e c1       	rjmp	.+828    	; 0x199e <udc_process_setup+0x670>
-    1662:	80 93 74 24 	sts	0x2474, r24	; 0x802474 <udd_g_ctrlreq+0xa>
-    1666:	90 93 75 24 	sts	0x2475, r25	; 0x802475 <udd_g_ctrlreq+0xb>
-    166a:	99 c1       	rjmp	.+818    	; 0x199e <udc_process_setup+0x670>
-    166c:	21 30       	cpi	r18, 0x01	; 1
-    166e:	31 05       	cpc	r19, r1
-    1670:	09 f0       	breq	.+2      	; 0x1674 <udc_process_setup+0x346>
-    1672:	26 c1       	rjmp	.+588    	; 0x18c0 <udc_process_setup+0x592>
-    1674:	61 e0       	ldi	r22, 0x01	; 1
-    1676:	70 e0       	ldi	r23, 0x00	; 0
-    1678:	8c ec       	ldi	r24, 0xCC	; 204
-    167a:	90 e2       	ldi	r25, 0x20	; 32
-    167c:	d7 d4       	rcall	.+2478   	; 0x202c <udd_set_setup_payload>
-    167e:	8f c1       	rjmp	.+798    	; 0x199e <udc_process_setup+0x670>
-    1680:	81 30       	cpi	r24, 0x01	; 1
-    1682:	c9 f5       	brne	.+114    	; 0x16f6 <udc_process_setup+0x3c8>
-    1684:	80 91 6b 24 	lds	r24, 0x246B	; 0x80246b <udd_g_ctrlreq+0x1>
-    1688:	8a 30       	cpi	r24, 0x0A	; 10
-    168a:	09 f0       	breq	.+2      	; 0x168e <udc_process_setup+0x360>
-    168c:	19 c1       	rjmp	.+562    	; 0x18c0 <udc_process_setup+0x592>
-    168e:	21 30       	cpi	r18, 0x01	; 1
-    1690:	31 05       	cpc	r19, r1
-    1692:	09 f0       	breq	.+2      	; 0x1696 <udc_process_setup+0x368>
-    1694:	15 c1       	rjmp	.+554    	; 0x18c0 <udc_process_setup+0x592>
-    1696:	80 91 cc 20 	lds	r24, 0x20CC	; 0x8020cc <udc_num_configuration>
-    169a:	88 23       	and	r24, r24
-    169c:	09 f4       	brne	.+2      	; 0x16a0 <udc_process_setup+0x372>
-    169e:	10 c1       	rjmp	.+544    	; 0x18c0 <udc_process_setup+0x592>
-    16a0:	e0 90 6e 24 	lds	r14, 0x246E	; 0x80246e <udd_g_ctrlreq+0x4>
-    16a4:	f0 90 6f 24 	lds	r15, 0x246F	; 0x80246f <udd_g_ctrlreq+0x5>
-    16a8:	00 91 ca 20 	lds	r16, 0x20CA	; 0x8020ca <udc_ptr_conf>
-    16ac:	10 91 cb 20 	lds	r17, 0x20CB	; 0x8020cb <udc_ptr_conf+0x1>
-    16b0:	d8 01       	movw	r26, r16
-    16b2:	ed 91       	ld	r30, X+
-    16b4:	fc 91       	ld	r31, X
-    16b6:	84 81       	ldd	r24, Z+4	; 0x04
-    16b8:	e8 16       	cp	r14, r24
-    16ba:	08 f0       	brcs	.+2      	; 0x16be <udc_process_setup+0x390>
-    16bc:	01 c1       	rjmp	.+514    	; 0x18c0 <udc_process_setup+0x592>
-    16be:	60 e0       	ldi	r22, 0x00	; 0
-    16c0:	8e 2d       	mov	r24, r14
-    16c2:	28 dd       	rcall	.-1456   	; 0x1114 <udc_update_iface_desc>
-    16c4:	88 23       	and	r24, r24
-    16c6:	09 f4       	brne	.+2      	; 0x16ca <udc_process_setup+0x39c>
-    16c8:	fb c0       	rjmp	.+502    	; 0x18c0 <udc_process_setup+0x592>
-    16ca:	ff 24       	eor	r15, r15
-    16cc:	ee 0c       	add	r14, r14
-    16ce:	ff 1c       	adc	r15, r15
-    16d0:	f8 01       	movw	r30, r16
-    16d2:	82 81       	ldd	r24, Z+2	; 0x02
-    16d4:	93 81       	ldd	r25, Z+3	; 0x03
-    16d6:	8e 0d       	add	r24, r14
-    16d8:	9f 1d       	adc	r25, r15
-    16da:	dc 01       	movw	r26, r24
-    16dc:	ed 91       	ld	r30, X+
-    16de:	fc 91       	ld	r31, X
-    16e0:	06 80       	ldd	r0, Z+6	; 0x06
-    16e2:	f7 81       	ldd	r31, Z+7	; 0x07
-    16e4:	e0 2d       	mov	r30, r0
-    16e6:	09 95       	icall
-    16e8:	80 93 ce 20 	sts	0x20CE, r24	; 0x8020ce <udc_iface_setting>
-    16ec:	61 e0       	ldi	r22, 0x01	; 1
-    16ee:	70 e0       	ldi	r23, 0x00	; 0
-    16f0:	8e ec       	ldi	r24, 0xCE	; 206
-    16f2:	90 e2       	ldi	r25, 0x20	; 32
-    16f4:	c3 cf       	rjmp	.-122    	; 0x167c <udc_process_setup+0x34e>
-    16f6:	82 30       	cpi	r24, 0x02	; 2
-    16f8:	09 f0       	breq	.+2      	; 0x16fc <udc_process_setup+0x3ce>
-    16fa:	e2 c0       	rjmp	.+452    	; 0x18c0 <udc_process_setup+0x592>
-    16fc:	80 91 6b 24 	lds	r24, 0x246B	; 0x80246b <udd_g_ctrlreq+0x1>
-    1700:	81 11       	cpse	r24, r1
-    1702:	de c0       	rjmp	.+444    	; 0x18c0 <udc_process_setup+0x592>
-    1704:	22 30       	cpi	r18, 0x02	; 2
-    1706:	31 05       	cpc	r19, r1
-    1708:	09 f0       	breq	.+2      	; 0x170c <udc_process_setup+0x3de>
-    170a:	da c0       	rjmp	.+436    	; 0x18c0 <udc_process_setup+0x592>
-    170c:	80 91 6e 24 	lds	r24, 0x246E	; 0x80246e <udd_g_ctrlreq+0x4>
-    1710:	e5 d4       	rcall	.+2506   	; 0x20dc <udd_ep_is_halted>
-    1712:	90 e0       	ldi	r25, 0x00	; 0
-    1714:	80 93 c6 20 	sts	0x20C6, r24	; 0x8020c6 <udc_ep_status.5522>
-    1718:	90 93 c7 20 	sts	0x20C7, r25	; 0x8020c7 <udc_ep_status.5522+0x1>
-    171c:	62 e0       	ldi	r22, 0x02	; 2
-    171e:	70 e0       	ldi	r23, 0x00	; 0
-    1720:	86 ec       	ldi	r24, 0xC6	; 198
-    1722:	90 e2       	ldi	r25, 0x20	; 32
-    1724:	ab cf       	rjmp	.-170    	; 0x167c <udc_process_setup+0x34e>
-    1726:	8f 71       	andi	r24, 0x1F	; 31
-    1728:	09 f0       	breq	.+2      	; 0x172c <udc_process_setup+0x3fe>
-    172a:	7d c0       	rjmp	.+250    	; 0x1826 <udc_process_setup+0x4f8>
-    172c:	80 91 6b 24 	lds	r24, 0x246B	; 0x80246b <udd_g_ctrlreq+0x1>
-    1730:	83 30       	cpi	r24, 0x03	; 3
-    1732:	09 f4       	brne	.+2      	; 0x1736 <udc_process_setup+0x408>
-    1734:	c5 c0       	rjmp	.+394    	; 0x18c0 <udc_process_setup+0x592>
-    1736:	18 f4       	brcc	.+6      	; 0x173e <udc_process_setup+0x410>
-    1738:	81 30       	cpi	r24, 0x01	; 1
-    173a:	a1 f0       	breq	.+40     	; 0x1764 <udc_process_setup+0x436>
-    173c:	c1 c0       	rjmp	.+386    	; 0x18c0 <udc_process_setup+0x592>
-    173e:	85 30       	cpi	r24, 0x05	; 5
-    1740:	19 f0       	breq	.+6      	; 0x1748 <udc_process_setup+0x41a>
-    1742:	89 30       	cpi	r24, 0x09	; 9
-    1744:	39 f1       	breq	.+78     	; 0x1794 <udc_process_setup+0x466>
-    1746:	bc c0       	rjmp	.+376    	; 0x18c0 <udc_process_setup+0x592>
-    1748:	80 91 70 24 	lds	r24, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
-    174c:	90 91 71 24 	lds	r25, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
-    1750:	89 2b       	or	r24, r25
-    1752:	09 f0       	breq	.+2      	; 0x1756 <udc_process_setup+0x428>
-    1754:	b5 c0       	rjmp	.+362    	; 0x18c0 <udc_process_setup+0x592>
-    1756:	86 e8       	ldi	r24, 0x86	; 134
-    1758:	98 e0       	ldi	r25, 0x08	; 8
-    175a:	80 93 76 24 	sts	0x2476, r24	; 0x802476 <udd_g_ctrlreq+0xc>
-    175e:	90 93 77 24 	sts	0x2477, r25	; 0x802477 <udd_g_ctrlreq+0xd>
-    1762:	1d c1       	rjmp	.+570    	; 0x199e <udc_process_setup+0x670>
-    1764:	80 91 70 24 	lds	r24, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
-    1768:	90 91 71 24 	lds	r25, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
-    176c:	89 2b       	or	r24, r25
-    176e:	09 f0       	breq	.+2      	; 0x1772 <udc_process_setup+0x444>
-    1770:	a7 c0       	rjmp	.+334    	; 0x18c0 <udc_process_setup+0x592>
-    1772:	80 91 6c 24 	lds	r24, 0x246C	; 0x80246c <udd_g_ctrlreq+0x2>
-    1776:	90 91 6d 24 	lds	r25, 0x246D	; 0x80246d <udd_g_ctrlreq+0x3>
-    177a:	01 97       	sbiw	r24, 0x01	; 1
-    177c:	09 f0       	breq	.+2      	; 0x1780 <udc_process_setup+0x452>
-    177e:	a0 c0       	rjmp	.+320    	; 0x18c0 <udc_process_setup+0x592>
-    1780:	80 91 d0 20 	lds	r24, 0x20D0	; 0x8020d0 <udc_device_status>
-    1784:	90 91 d1 20 	lds	r25, 0x20D1	; 0x8020d1 <udc_device_status+0x1>
-    1788:	8d 7f       	andi	r24, 0xFD	; 253
-    178a:	80 93 d0 20 	sts	0x20D0, r24	; 0x8020d0 <udc_device_status>
-    178e:	90 93 d1 20 	sts	0x20D1, r25	; 0x8020d1 <udc_device_status+0x1>
-    1792:	05 c1       	rjmp	.+522    	; 0x199e <udc_process_setup+0x670>
-    1794:	80 91 70 24 	lds	r24, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
-    1798:	90 91 71 24 	lds	r25, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
-    179c:	89 2b       	or	r24, r25
-    179e:	09 f0       	breq	.+2      	; 0x17a2 <udc_process_setup+0x474>
-    17a0:	8f c0       	rjmp	.+286    	; 0x18c0 <udc_process_setup+0x592>
-    17a2:	41 d4       	rcall	.+2178   	; 0x2026 <udd_getaddress>
-    17a4:	88 23       	and	r24, r24
-    17a6:	09 f4       	brne	.+2      	; 0x17aa <udc_process_setup+0x47c>
-    17a8:	8b c0       	rjmp	.+278    	; 0x18c0 <udc_process_setup+0x592>
-    17aa:	20 91 6c 24 	lds	r18, 0x246C	; 0x80246c <udd_g_ctrlreq+0x2>
-    17ae:	30 91 6d 24 	lds	r19, 0x246D	; 0x80246d <udd_g_ctrlreq+0x3>
-    17b2:	33 27       	eor	r19, r19
-    17b4:	e0 91 10 20 	lds	r30, 0x2010	; 0x802010 <udc_config>
-    17b8:	f0 91 11 20 	lds	r31, 0x2011	; 0x802011 <udc_config+0x1>
-    17bc:	81 89       	ldd	r24, Z+17	; 0x11
-    17be:	90 e0       	ldi	r25, 0x00	; 0
-    17c0:	82 17       	cp	r24, r18
-    17c2:	93 07       	cpc	r25, r19
-    17c4:	08 f4       	brcc	.+2      	; 0x17c8 <udc_process_setup+0x49a>
-    17c6:	7c c0       	rjmp	.+248    	; 0x18c0 <udc_process_setup+0x592>
-    17c8:	71 dd       	rcall	.-1310   	; 0x12ac <udc_reset>
-    17ca:	80 91 6c 24 	lds	r24, 0x246C	; 0x80246c <udd_g_ctrlreq+0x2>
-    17ce:	90 91 6d 24 	lds	r25, 0x246D	; 0x80246d <udd_g_ctrlreq+0x3>
-    17d2:	80 93 cc 20 	sts	0x20CC, r24	; 0x8020cc <udc_num_configuration>
-    17d6:	88 23       	and	r24, r24
-    17d8:	09 f4       	brne	.+2      	; 0x17dc <udc_process_setup+0x4ae>
-    17da:	e1 c0       	rjmp	.+450    	; 0x199e <udc_process_setup+0x670>
-    17dc:	99 27       	eor	r25, r25
-    17de:	81 50       	subi	r24, 0x01	; 1
-    17e0:	90 4c       	sbci	r25, 0xC0	; 192
-    17e2:	88 0f       	add	r24, r24
-    17e4:	99 1f       	adc	r25, r25
-    17e6:	88 0f       	add	r24, r24
-    17e8:	99 1f       	adc	r25, r25
-    17ea:	20 91 12 20 	lds	r18, 0x2012	; 0x802012 <udc_config+0x2>
-    17ee:	30 91 13 20 	lds	r19, 0x2013	; 0x802013 <udc_config+0x3>
-    17f2:	82 0f       	add	r24, r18
-    17f4:	93 1f       	adc	r25, r19
-    17f6:	80 93 ca 20 	sts	0x20CA, r24	; 0x8020ca <udc_ptr_conf>
-    17fa:	90 93 cb 20 	sts	0x20CB, r25	; 0x8020cb <udc_ptr_conf+0x1>
-    17fe:	10 e0       	ldi	r17, 0x00	; 0
-    1800:	e0 91 ca 20 	lds	r30, 0x20CA	; 0x8020ca <udc_ptr_conf>
-    1804:	f0 91 cb 20 	lds	r31, 0x20CB	; 0x8020cb <udc_ptr_conf+0x1>
-    1808:	01 90       	ld	r0, Z+
-    180a:	f0 81       	ld	r31, Z
-    180c:	e0 2d       	mov	r30, r0
-    180e:	84 81       	ldd	r24, Z+4	; 0x04
-    1810:	18 17       	cp	r17, r24
-    1812:	08 f0       	brcs	.+2      	; 0x1816 <udc_process_setup+0x4e8>
-    1814:	c4 c0       	rjmp	.+392    	; 0x199e <udc_process_setup+0x670>
-    1816:	60 e0       	ldi	r22, 0x00	; 0
-    1818:	81 2f       	mov	r24, r17
-    181a:	cf dc       	rcall	.-1634   	; 0x11ba <udc_iface_enable>
-    181c:	88 23       	and	r24, r24
-    181e:	09 f4       	brne	.+2      	; 0x1822 <udc_process_setup+0x4f4>
-    1820:	4f c0       	rjmp	.+158    	; 0x18c0 <udc_process_setup+0x592>
-    1822:	1f 5f       	subi	r17, 0xFF	; 255
-    1824:	ed cf       	rjmp	.-38     	; 0x1800 <udc_process_setup+0x4d2>
-    1826:	81 30       	cpi	r24, 0x01	; 1
-    1828:	f1 f4       	brne	.+60     	; 0x1866 <udc_process_setup+0x538>
-    182a:	80 91 6b 24 	lds	r24, 0x246B	; 0x80246b <udd_g_ctrlreq+0x1>
-    182e:	8b 30       	cpi	r24, 0x0B	; 11
-    1830:	09 f0       	breq	.+2      	; 0x1834 <udc_process_setup+0x506>
-    1832:	46 c0       	rjmp	.+140    	; 0x18c0 <udc_process_setup+0x592>
-    1834:	80 91 70 24 	lds	r24, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
-    1838:	90 91 71 24 	lds	r25, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
-    183c:	89 2b       	or	r24, r25
-    183e:	09 f0       	breq	.+2      	; 0x1842 <udc_process_setup+0x514>
-    1840:	3f c0       	rjmp	.+126    	; 0x18c0 <udc_process_setup+0x592>
-    1842:	80 91 cc 20 	lds	r24, 0x20CC	; 0x8020cc <udc_num_configuration>
-    1846:	88 23       	and	r24, r24
-    1848:	09 f4       	brne	.+2      	; 0x184c <udc_process_setup+0x51e>
-    184a:	3a c0       	rjmp	.+116    	; 0x18c0 <udc_process_setup+0x592>
-    184c:	10 91 6e 24 	lds	r17, 0x246E	; 0x80246e <udd_g_ctrlreq+0x4>
-    1850:	60 91 6c 24 	lds	r22, 0x246C	; 0x80246c <udd_g_ctrlreq+0x2>
-    1854:	81 2f       	mov	r24, r17
-    1856:	69 83       	std	Y+1, r22	; 0x01
-    1858:	e3 dc       	rcall	.-1594   	; 0x1220 <udc_iface_disable>
-    185a:	69 81       	ldd	r22, Y+1	; 0x01
-    185c:	88 23       	and	r24, r24
-    185e:	81 f1       	breq	.+96     	; 0x18c0 <udc_process_setup+0x592>
-    1860:	81 2f       	mov	r24, r17
-    1862:	ab dc       	rcall	.-1706   	; 0x11ba <udc_iface_enable>
-    1864:	2b c0       	rjmp	.+86     	; 0x18bc <udc_process_setup+0x58e>
-    1866:	82 30       	cpi	r24, 0x02	; 2
-    1868:	59 f5       	brne	.+86     	; 0x18c0 <udc_process_setup+0x592>
-    186a:	80 91 6b 24 	lds	r24, 0x246B	; 0x80246b <udd_g_ctrlreq+0x1>
-    186e:	81 30       	cpi	r24, 0x01	; 1
-    1870:	19 f0       	breq	.+6      	; 0x1878 <udc_process_setup+0x54a>
-    1872:	83 30       	cpi	r24, 0x03	; 3
-    1874:	89 f0       	breq	.+34     	; 0x1898 <udc_process_setup+0x56a>
-    1876:	24 c0       	rjmp	.+72     	; 0x18c0 <udc_process_setup+0x592>
-    1878:	80 91 70 24 	lds	r24, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
-    187c:	90 91 71 24 	lds	r25, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
-    1880:	89 2b       	or	r24, r25
-    1882:	f1 f4       	brne	.+60     	; 0x18c0 <udc_process_setup+0x592>
-    1884:	80 91 6c 24 	lds	r24, 0x246C	; 0x80246c <udd_g_ctrlreq+0x2>
-    1888:	90 91 6d 24 	lds	r25, 0x246D	; 0x80246d <udd_g_ctrlreq+0x3>
-    188c:	89 2b       	or	r24, r25
-    188e:	c1 f4       	brne	.+48     	; 0x18c0 <udc_process_setup+0x592>
-    1890:	80 91 6e 24 	lds	r24, 0x246E	; 0x80246e <udd_g_ctrlreq+0x4>
-    1894:	2a d4       	rcall	.+2132   	; 0x20ea <udd_ep_clear_halt>
-    1896:	12 c0       	rjmp	.+36     	; 0x18bc <udc_process_setup+0x58e>
-    1898:	80 91 70 24 	lds	r24, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
-    189c:	90 91 71 24 	lds	r25, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
-    18a0:	89 2b       	or	r24, r25
-    18a2:	71 f4       	brne	.+28     	; 0x18c0 <udc_process_setup+0x592>
-    18a4:	80 91 6c 24 	lds	r24, 0x246C	; 0x80246c <udd_g_ctrlreq+0x2>
-    18a8:	90 91 6d 24 	lds	r25, 0x246D	; 0x80246d <udd_g_ctrlreq+0x3>
-    18ac:	89 2b       	or	r24, r25
-    18ae:	41 f4       	brne	.+16     	; 0x18c0 <udc_process_setup+0x592>
-    18b0:	80 91 6e 24 	lds	r24, 0x246E	; 0x80246e <udd_g_ctrlreq+0x4>
-    18b4:	bf d4       	rcall	.+2430   	; 0x2234 <udd_ep_abort>
-    18b6:	80 91 6e 24 	lds	r24, 0x246E	; 0x80246e <udd_g_ctrlreq+0x4>
-    18ba:	f5 d4       	rcall	.+2538   	; 0x22a6 <udd_ep_set_halt>
-    18bc:	81 11       	cpse	r24, r1
-    18be:	6f c0       	rjmp	.+222    	; 0x199e <udc_process_setup+0x670>
-    18c0:	80 91 6a 24 	lds	r24, 0x246A	; 0x80246a <udd_g_ctrlreq>
-    18c4:	8f 71       	andi	r24, 0x1F	; 31
-    18c6:	81 30       	cpi	r24, 0x01	; 1
-    18c8:	b9 f5       	brne	.+110    	; 0x1938 <udc_process_setup+0x60a>
-    18ca:	80 91 cc 20 	lds	r24, 0x20CC	; 0x8020cc <udc_num_configuration>
-    18ce:	88 23       	and	r24, r24
-    18d0:	99 f1       	breq	.+102    	; 0x1938 <udc_process_setup+0x60a>
-    18d2:	e0 90 6e 24 	lds	r14, 0x246E	; 0x80246e <udd_g_ctrlreq+0x4>
-    18d6:	f0 90 6f 24 	lds	r15, 0x246F	; 0x80246f <udd_g_ctrlreq+0x5>
-    18da:	00 91 ca 20 	lds	r16, 0x20CA	; 0x8020ca <udc_ptr_conf>
-    18de:	10 91 cb 20 	lds	r17, 0x20CB	; 0x8020cb <udc_ptr_conf+0x1>
-    18e2:	d8 01       	movw	r26, r16
-    18e4:	ed 91       	ld	r30, X+
-    18e6:	fc 91       	ld	r31, X
-    18e8:	84 81       	ldd	r24, Z+4	; 0x04
-    18ea:	e8 16       	cp	r14, r24
-    18ec:	28 f5       	brcc	.+74     	; 0x1938 <udc_process_setup+0x60a>
-    18ee:	60 e0       	ldi	r22, 0x00	; 0
-    18f0:	8e 2d       	mov	r24, r14
-    18f2:	10 dc       	rcall	.-2016   	; 0x1114 <udc_update_iface_desc>
-    18f4:	88 23       	and	r24, r24
-    18f6:	01 f1       	breq	.+64     	; 0x1938 <udc_process_setup+0x60a>
-    18f8:	f7 01       	movw	r30, r14
-    18fa:	ff 27       	eor	r31, r31
-    18fc:	ee 0f       	add	r30, r30
-    18fe:	ff 1f       	adc	r31, r31
-    1900:	d8 01       	movw	r26, r16
-    1902:	12 96       	adiw	r26, 0x02	; 2
-    1904:	8d 91       	ld	r24, X+
-    1906:	9c 91       	ld	r25, X
-    1908:	13 97       	sbiw	r26, 0x03	; 3
-    190a:	e8 0f       	add	r30, r24
-    190c:	f9 1f       	adc	r31, r25
-    190e:	00 81       	ld	r16, Z
-    1910:	11 81       	ldd	r17, Z+1	; 0x01
-    1912:	d8 01       	movw	r26, r16
-    1914:	16 96       	adiw	r26, 0x06	; 6
-    1916:	ed 91       	ld	r30, X+
-    1918:	fc 91       	ld	r31, X
-    191a:	17 97       	sbiw	r26, 0x07	; 7
-    191c:	09 95       	icall
-    191e:	68 2f       	mov	r22, r24
-    1920:	8e 2d       	mov	r24, r14
-    1922:	f8 db       	rcall	.-2064   	; 0x1114 <udc_update_iface_desc>
-    1924:	88 23       	and	r24, r24
-    1926:	41 f0       	breq	.+16     	; 0x1938 <udc_process_setup+0x60a>
-    1928:	d8 01       	movw	r26, r16
-    192a:	14 96       	adiw	r26, 0x04	; 4
-    192c:	ed 91       	ld	r30, X+
-    192e:	fc 91       	ld	r31, X
-    1930:	15 97       	sbiw	r26, 0x05	; 5
-    1932:	09 95       	icall
-    1934:	81 11       	cpse	r24, r1
-    1936:	33 c0       	rjmp	.+102    	; 0x199e <udc_process_setup+0x670>
-    1938:	80 91 6a 24 	lds	r24, 0x246A	; 0x80246a <udd_g_ctrlreq>
-    193c:	8f 71       	andi	r24, 0x1F	; 31
-    193e:	82 30       	cpi	r24, 0x02	; 2
-    1940:	81 f5       	brne	.+96     	; 0x19a2 <udc_process_setup+0x674>
-    1942:	80 91 cc 20 	lds	r24, 0x20CC	; 0x8020cc <udc_num_configuration>
-    1946:	88 23       	and	r24, r24
-    1948:	61 f1       	breq	.+88     	; 0x19a2 <udc_process_setup+0x674>
-    194a:	f1 2c       	mov	r15, r1
-    194c:	e0 91 ca 20 	lds	r30, 0x20CA	; 0x8020ca <udc_ptr_conf>
-    1950:	f0 91 cb 20 	lds	r31, 0x20CB	; 0x8020cb <udc_ptr_conf+0x1>
-    1954:	a0 81       	ld	r26, Z
-    1956:	b1 81       	ldd	r27, Z+1	; 0x01
-    1958:	14 96       	adiw	r26, 0x04	; 4
-    195a:	8c 91       	ld	r24, X
-    195c:	f8 16       	cp	r15, r24
-    195e:	08 f5       	brcc	.+66     	; 0x19a2 <udc_process_setup+0x674>
-    1960:	92 81       	ldd	r25, Z+2	; 0x02
-    1962:	83 81       	ldd	r24, Z+3	; 0x03
-    1964:	e9 2f       	mov	r30, r25
-    1966:	f8 2f       	mov	r31, r24
-    1968:	ef 0d       	add	r30, r15
-    196a:	f1 1d       	adc	r31, r1
-    196c:	ef 0d       	add	r30, r15
-    196e:	f1 1d       	adc	r31, r1
-    1970:	00 81       	ld	r16, Z
-    1972:	11 81       	ldd	r17, Z+1	; 0x01
-    1974:	d8 01       	movw	r26, r16
-    1976:	16 96       	adiw	r26, 0x06	; 6
+00001332 <udc_get_interface_desc>:
+    1332:	80 91 c8 20 	lds	r24, 0x20C8	; 0x8020c8 <udc_ptr_iface>
+    1336:	90 91 c9 20 	lds	r25, 0x20C9	; 0x8020c9 <udc_ptr_iface+0x1>
+    133a:	08 95       	ret
+
+0000133c <udc_start>:
+    133c:	43 c6       	rjmp	.+3206   	; 0x1fc4 <udd_enable>
+
+0000133e <udc_reset>:
+    133e:	cf 93       	push	r28
+    1340:	80 91 cc 20 	lds	r24, 0x20CC	; 0x8020cc <udc_num_configuration>
+    1344:	81 11       	cpse	r24, r1
+    1346:	08 c0       	rjmp	.+16     	; 0x1358 <udc_reset+0x1a>
+    1348:	10 92 cc 20 	sts	0x20CC, r1	; 0x8020cc <udc_num_configuration>
+    134c:	10 92 d0 20 	sts	0x20D0, r1	; 0x8020d0 <udc_device_status>
+    1350:	10 92 d1 20 	sts	0x20D1, r1	; 0x8020d1 <udc_device_status+0x1>
+    1354:	cf 91       	pop	r28
+    1356:	08 95       	ret
+    1358:	c0 e0       	ldi	r28, 0x00	; 0
+    135a:	e0 91 ca 20 	lds	r30, 0x20CA	; 0x8020ca <udc_ptr_conf>
+    135e:	f0 91 cb 20 	lds	r31, 0x20CB	; 0x8020cb <udc_ptr_conf+0x1>
+    1362:	01 90       	ld	r0, Z+
+    1364:	f0 81       	ld	r31, Z
+    1366:	e0 2d       	mov	r30, r0
+    1368:	84 81       	ldd	r24, Z+4	; 0x04
+    136a:	c8 17       	cp	r28, r24
+    136c:	68 f7       	brcc	.-38     	; 0x1348 <udc_reset+0xa>
+    136e:	8c 2f       	mov	r24, r28
+    1370:	a0 df       	rcall	.-192    	; 0x12b2 <udc_iface_disable>
+    1372:	cf 5f       	subi	r28, 0xFF	; 255
+    1374:	f2 cf       	rjmp	.-28     	; 0x135a <udc_reset+0x1c>
+
+00001376 <udc_sof_notify>:
+    1376:	cf 93       	push	r28
+    1378:	80 91 cc 20 	lds	r24, 0x20CC	; 0x8020cc <udc_num_configuration>
+    137c:	88 23       	and	r24, r24
+    137e:	f1 f0       	breq	.+60     	; 0x13bc <udc_sof_notify+0x46>
+    1380:	c0 e0       	ldi	r28, 0x00	; 0
+    1382:	e0 91 ca 20 	lds	r30, 0x20CA	; 0x8020ca <udc_ptr_conf>
+    1386:	f0 91 cb 20 	lds	r31, 0x20CB	; 0x8020cb <udc_ptr_conf+0x1>
+    138a:	a0 81       	ld	r26, Z
+    138c:	b1 81       	ldd	r27, Z+1	; 0x01
+    138e:	14 96       	adiw	r26, 0x04	; 4
+    1390:	8c 91       	ld	r24, X
+    1392:	c8 17       	cp	r28, r24
+    1394:	98 f4       	brcc	.+38     	; 0x13bc <udc_sof_notify+0x46>
+    1396:	92 81       	ldd	r25, Z+2	; 0x02
+    1398:	83 81       	ldd	r24, Z+3	; 0x03
+    139a:	e9 2f       	mov	r30, r25
+    139c:	f8 2f       	mov	r31, r24
+    139e:	ec 0f       	add	r30, r28
+    13a0:	f1 1d       	adc	r31, r1
+    13a2:	ec 0f       	add	r30, r28
+    13a4:	f1 1d       	adc	r31, r1
+    13a6:	01 90       	ld	r0, Z+
+    13a8:	f0 81       	ld	r31, Z
+    13aa:	e0 2d       	mov	r30, r0
+    13ac:	00 84       	ldd	r0, Z+8	; 0x08
+    13ae:	f1 85       	ldd	r31, Z+9	; 0x09
+    13b0:	e0 2d       	mov	r30, r0
+    13b2:	30 97       	sbiw	r30, 0x00	; 0
+    13b4:	09 f0       	breq	.+2      	; 0x13b8 <udc_sof_notify+0x42>
+    13b6:	09 95       	icall
+    13b8:	cf 5f       	subi	r28, 0xFF	; 255
+    13ba:	e3 cf       	rjmp	.-58     	; 0x1382 <udc_sof_notify+0xc>
+    13bc:	cf 91       	pop	r28
+    13be:	08 95       	ret
+
+000013c0 <udc_process_setup>:
+    13c0:	ef 92       	push	r14
+    13c2:	ff 92       	push	r15
+    13c4:	0f 93       	push	r16
+    13c6:	1f 93       	push	r17
+    13c8:	cf 93       	push	r28
+    13ca:	df 93       	push	r29
+    13cc:	1f 92       	push	r1
+    13ce:	cd b7       	in	r28, 0x3d	; 61
+    13d0:	de b7       	in	r29, 0x3e	; 62
+    13d2:	10 92 74 24 	sts	0x2474, r1	; 0x802474 <udd_g_ctrlreq+0xa>
+    13d6:	10 92 75 24 	sts	0x2475, r1	; 0x802475 <udd_g_ctrlreq+0xb>
+    13da:	10 92 76 24 	sts	0x2476, r1	; 0x802476 <udd_g_ctrlreq+0xc>
+    13de:	10 92 77 24 	sts	0x2477, r1	; 0x802477 <udd_g_ctrlreq+0xd>
+    13e2:	10 92 78 24 	sts	0x2478, r1	; 0x802478 <udd_g_ctrlreq+0xe>
+    13e6:	10 92 79 24 	sts	0x2479, r1	; 0x802479 <udd_g_ctrlreq+0xf>
+    13ea:	80 91 6a 24 	lds	r24, 0x246A	; 0x80246a <udd_g_ctrlreq>
+    13ee:	87 ff       	sbrs	r24, 7
+    13f0:	07 c0       	rjmp	.+14     	; 0x1400 <udc_process_setup+0x40>
+    13f2:	20 91 70 24 	lds	r18, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
+    13f6:	30 91 71 24 	lds	r19, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
+    13fa:	23 2b       	or	r18, r19
+    13fc:	09 f4       	brne	.+2      	; 0x1400 <udc_process_setup+0x40>
+    13fe:	1b c3       	rjmp	.+1590   	; 0x1a36 <udc_process_setup+0x676>
+    1400:	98 2f       	mov	r25, r24
+    1402:	90 76       	andi	r25, 0x60	; 96
+    1404:	90 34       	cpi	r25, 0x40	; 64
+    1406:	09 f0       	breq	.+2      	; 0x140a <udc_process_setup+0x4a>
+    1408:	d7 c0       	rjmp	.+430    	; 0x15b8 <udc_process_setup+0x1f8>
+    140a:	e0 91 6b 24 	lds	r30, 0x246B	; 0x80246b <udd_g_ctrlreq+0x1>
+    140e:	8e 2f       	mov	r24, r30
+    1410:	90 e0       	ldi	r25, 0x00	; 0
+    1412:	fc 01       	movw	r30, r24
+    1414:	e0 5a       	subi	r30, 0xA0	; 160
+    1416:	f1 09       	sbc	r31, r1
+    1418:	e8 30       	cpi	r30, 0x08	; 8
+    141a:	f1 05       	cpc	r31, r1
+    141c:	08 f0       	brcs	.+2      	; 0x1420 <udc_process_setup+0x60>
+    141e:	9a c2       	rjmp	.+1332   	; 0x1954 <udc_process_setup+0x594>
+    1420:	e2 5f       	subi	r30, 0xF2	; 242
+    1422:	fe 4f       	sbci	r31, 0xFE	; 254
+    1424:	0c 94 49 13 	jmp	0x2692	; 0x2692 <__tablejump2__>
+    1428:	00 00       	nop
+    142a:	03 c3       	rjmp	.+1542   	; 0x1a32 <udc_process_setup+0x672>
+    142c:	10 92 00 08 	sts	0x0800, r1	; 0x800800 <__TEXT_REGION_LENGTH__+0x700800>
+    1430:	80 91 6c 24 	lds	r24, 0x246C	; 0x80246c <udd_g_ctrlreq+0x2>
+    1434:	90 91 6d 24 	lds	r25, 0x246D	; 0x80246d <udd_g_ctrlreq+0x3>
+    1438:	80 93 36 08 	sts	0x0836, r24	; 0x800836 <__TEXT_REGION_LENGTH__+0x700836>
+    143c:	90 93 37 08 	sts	0x0837, r25	; 0x800837 <__TEXT_REGION_LENGTH__+0x700837>
+    1440:	80 91 6e 24 	lds	r24, 0x246E	; 0x80246e <udd_g_ctrlreq+0x4>
+    1444:	8f 70       	andi	r24, 0x0F	; 15
+    1446:	80 93 00 08 	sts	0x0800, r24	; 0x800800 <__TEXT_REGION_LENGTH__+0x700800>
+    144a:	60 91 70 24 	lds	r22, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
+    144e:	70 91 71 24 	lds	r23, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
+    1452:	8a e6       	ldi	r24, 0x6A	; 106
+    1454:	92 e2       	ldi	r25, 0x22	; 34
+    1456:	34 d6       	rcall	.+3176   	; 0x20c0 <udd_set_setup_payload>
+    1458:	20 91 04 20 	lds	r18, 0x2004	; 0x802004 <dacBuf_len>
+    145c:	30 91 05 20 	lds	r19, 0x2005	; 0x802005 <dacBuf_len+0x1>
+    1460:	80 91 70 24 	lds	r24, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
+    1464:	90 91 71 24 	lds	r25, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
+    1468:	28 17       	cp	r18, r24
+    146a:	39 07       	cpc	r19, r25
+    146c:	09 f4       	brne	.+2      	; 0x1470 <udc_process_setup+0xb0>
+    146e:	e1 c2       	rjmp	.+1474   	; 0x1a32 <udc_process_setup+0x672>
+    1470:	80 93 04 20 	sts	0x2004, r24	; 0x802004 <dacBuf_len>
+    1474:	90 93 05 20 	sts	0x2005, r25	; 0x802005 <dacBuf_len+0x1>
+    1478:	26 c0       	rjmp	.+76     	; 0x14c6 <udc_process_setup+0x106>
+    147a:	10 92 40 08 	sts	0x0840, r1	; 0x800840 <__TEXT_REGION_LENGTH__+0x700840>
+    147e:	80 91 6c 24 	lds	r24, 0x246C	; 0x80246c <udd_g_ctrlreq+0x2>
+    1482:	90 91 6d 24 	lds	r25, 0x246D	; 0x80246d <udd_g_ctrlreq+0x3>
+    1486:	80 93 76 08 	sts	0x0876, r24	; 0x800876 <__TEXT_REGION_LENGTH__+0x700876>
+    148a:	90 93 77 08 	sts	0x0877, r25	; 0x800877 <__TEXT_REGION_LENGTH__+0x700877>
+    148e:	80 91 6e 24 	lds	r24, 0x246E	; 0x80246e <udd_g_ctrlreq+0x4>
+    1492:	8f 70       	andi	r24, 0x0F	; 15
+    1494:	80 93 40 08 	sts	0x0840, r24	; 0x800840 <__TEXT_REGION_LENGTH__+0x700840>
+    1498:	60 91 70 24 	lds	r22, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
+    149c:	70 91 71 24 	lds	r23, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
+    14a0:	8a e7       	ldi	r24, 0x7A	; 122
+    14a2:	94 e2       	ldi	r25, 0x24	; 36
+    14a4:	0d d6       	rcall	.+3098   	; 0x20c0 <udd_set_setup_payload>
+    14a6:	20 91 02 20 	lds	r18, 0x2002	; 0x802002 <auxDacBufLen>
+    14aa:	30 91 03 20 	lds	r19, 0x2003	; 0x802003 <auxDacBufLen+0x1>
+    14ae:	80 91 70 24 	lds	r24, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
+    14b2:	90 91 71 24 	lds	r25, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
+    14b6:	28 17       	cp	r18, r24
+    14b8:	39 07       	cpc	r19, r25
+    14ba:	09 f4       	brne	.+2      	; 0x14be <udc_process_setup+0xfe>
+    14bc:	ba c2       	rjmp	.+1396   	; 0x1a32 <udc_process_setup+0x672>
+    14be:	80 93 02 20 	sts	0x2002, r24	; 0x802002 <auxDacBufLen>
+    14c2:	90 93 03 20 	sts	0x2003, r25	; 0x802003 <auxDacBufLen+0x1>
+    14c6:	e0 91 00 20 	lds	r30, 0x2000	; 0x802000 <__data_start>
+    14ca:	8e 2f       	mov	r24, r30
+    14cc:	90 e0       	ldi	r25, 0x00	; 0
+    14ce:	88 30       	cpi	r24, 0x08	; 8
+    14d0:	91 05       	cpc	r25, r1
+    14d2:	08 f0       	brcs	.+2      	; 0x14d6 <udc_process_setup+0x116>
+    14d4:	ae c2       	rjmp	.+1372   	; 0x1a32 <udc_process_setup+0x672>
+    14d6:	fc 01       	movw	r30, r24
+    14d8:	ea 5e       	subi	r30, 0xEA	; 234
+    14da:	fe 4f       	sbci	r31, 0xFE	; 254
+    14dc:	0c 94 49 13 	jmp	0x2692	; 0x2692 <__tablejump2__>
+    14e0:	10 92 68 09 	sts	0x0968, r1	; 0x800968 <__TEXT_REGION_LENGTH__+0x700968>
+    14e4:	10 92 69 09 	sts	0x0969, r1	; 0x800969 <__TEXT_REGION_LENGTH__+0x700969>
+    14e8:	80 91 6c 24 	lds	r24, 0x246C	; 0x80246c <udd_g_ctrlreq+0x2>
+    14ec:	80 93 c0 20 	sts	0x20C0, r24	; 0x8020c0 <__data_end>
+    14f0:	a0 c2       	rjmp	.+1344   	; 0x1a32 <udc_process_setup+0x672>
+    14f2:	80 91 6c 24 	lds	r24, 0x246C	; 0x80246c <udd_g_ctrlreq+0x2>
+    14f6:	80 93 24 06 	sts	0x0624, r24	; 0x800624 <__TEXT_REGION_LENGTH__+0x700624>
+    14fa:	9b c2       	rjmp	.+1334   	; 0x1a32 <udc_process_setup+0x672>
+    14fc:	e0 91 6c 24 	lds	r30, 0x246C	; 0x80246c <udd_g_ctrlreq+0x2>
+    1500:	f0 91 6d 24 	lds	r31, 0x246D	; 0x80246d <udd_g_ctrlreq+0x3>
+    1504:	e8 30       	cpi	r30, 0x08	; 8
+    1506:	f1 05       	cpc	r31, r1
+    1508:	08 f0       	brcs	.+2      	; 0x150c <udc_process_setup+0x14c>
+    150a:	24 c2       	rjmp	.+1096   	; 0x1954 <udc_process_setup+0x594>
+    150c:	e2 5e       	subi	r30, 0xE2	; 226
+    150e:	fe 4f       	sbci	r31, 0xFE	; 254
+    1510:	0c 94 49 13 	jmp	0x2692	; 0x2692 <__tablejump2__>
+    1514:	60 e0       	ldi	r22, 0x00	; 0
+    1516:	80 e0       	ldi	r24, 0x00	; 0
+    1518:	0e 94 15 02 	call	0x42a	; 0x42a <tiny_adc_setup>
+    151c:	80 91 6e 24 	lds	r24, 0x246E	; 0x80246e <udd_g_ctrlreq+0x4>
+    1520:	0e 94 e2 01 	call	0x3c4	; 0x3c4 <tiny_adc_ch0setup>
+    1524:	0e 94 81 02 	call	0x502	; 0x502 <tiny_dma_set_mode_0>
+    1528:	84 c2       	rjmp	.+1288   	; 0x1a32 <udc_process_setup+0x672>
+    152a:	60 e0       	ldi	r22, 0x00	; 0
+    152c:	80 e0       	ldi	r24, 0x00	; 0
+    152e:	0e 94 15 02 	call	0x42a	; 0x42a <tiny_adc_setup>
+    1532:	80 91 6e 24 	lds	r24, 0x246E	; 0x80246e <udd_g_ctrlreq+0x4>
+    1536:	0e 94 e2 01 	call	0x3c4	; 0x3c4 <tiny_adc_ch0setup>
+    153a:	57 d8       	rcall	.-3922   	; 0x5ea <tiny_dma_set_mode_1>
+    153c:	7a c2       	rjmp	.+1268   	; 0x1a32 <udc_process_setup+0x672>
+    153e:	61 e0       	ldi	r22, 0x01	; 1
+    1540:	81 e0       	ldi	r24, 0x01	; 1
+    1542:	0e 94 15 02 	call	0x42a	; 0x42a <tiny_adc_setup>
+    1546:	80 91 6e 24 	lds	r24, 0x246E	; 0x80246e <udd_g_ctrlreq+0x4>
+    154a:	0e 94 e2 01 	call	0x3c4	; 0x3c4 <tiny_adc_ch0setup>
+    154e:	80 91 6f 24 	lds	r24, 0x246F	; 0x80246f <udd_g_ctrlreq+0x5>
+    1552:	0e 94 f8 01 	call	0x3f0	; 0x3f0 <tiny_adc_ch1setup>
+    1556:	c2 d8       	rcall	.-3708   	; 0x6dc <tiny_dma_set_mode_2>
+    1558:	6c c2       	rjmp	.+1240   	; 0x1a32 <udc_process_setup+0x672>
+    155a:	34 d9       	rcall	.-3480   	; 0x7c4 <tiny_dma_set_mode_3>
+    155c:	6a c2       	rjmp	.+1236   	; 0x1a32 <udc_process_setup+0x672>
+    155e:	af d9       	rcall	.-3234   	; 0x8be <tiny_dma_set_mode_4>
+    1560:	68 c2       	rjmp	.+1232   	; 0x1a32 <udc_process_setup+0x672>
+    1562:	60 e0       	ldi	r22, 0x00	; 0
+    1564:	80 e0       	ldi	r24, 0x00	; 0
+    1566:	0e 94 15 02 	call	0x42a	; 0x42a <tiny_adc_setup>
+    156a:	80 91 6e 24 	lds	r24, 0x246E	; 0x80246e <udd_g_ctrlreq+0x4>
+    156e:	0e 94 e2 01 	call	0x3c4	; 0x3c4 <tiny_adc_ch0setup>
+    1572:	1c da       	rcall	.-3016   	; 0x9ac <tiny_dma_set_mode_5>
+    1574:	5e c2       	rjmp	.+1212   	; 0x1a32 <udc_process_setup+0x672>
+    1576:	61 e0       	ldi	r22, 0x01	; 1
+    1578:	80 e0       	ldi	r24, 0x00	; 0
+    157a:	0e 94 15 02 	call	0x42a	; 0x42a <tiny_adc_setup>
+    157e:	80 91 6e 24 	lds	r24, 0x246E	; 0x80246e <udd_g_ctrlreq+0x4>
+    1582:	0e 94 e2 01 	call	0x3c4	; 0x3c4 <tiny_adc_ch0setup>
+    1586:	5a da       	rcall	.-2892   	; 0xa3c <tiny_dma_set_mode_6>
+    1588:	54 c2       	rjmp	.+1192   	; 0x1a32 <udc_process_setup+0x672>
+    158a:	62 e0       	ldi	r22, 0x02	; 2
+    158c:	80 e0       	ldi	r24, 0x00	; 0
+    158e:	0e 94 15 02 	call	0x42a	; 0x42a <tiny_adc_setup>
+    1592:	80 91 6e 24 	lds	r24, 0x246E	; 0x80246e <udd_g_ctrlreq+0x4>
+    1596:	80 68       	ori	r24, 0x80	; 128
+    1598:	0e 94 e2 01 	call	0x3c4	; 0x3c4 <tiny_adc_ch0setup>
+    159c:	b2 da       	rcall	.-2716   	; 0xb02 <tiny_dma_set_mode_7>
+    159e:	49 c2       	rjmp	.+1170   	; 0x1a32 <udc_process_setup+0x672>
+    15a0:	80 91 6c 24 	lds	r24, 0x246C	; 0x80246c <udd_g_ctrlreq+0x2>
+    15a4:	80 93 84 06 	sts	0x0684, r24	; 0x800684 <__TEXT_REGION_LENGTH__+0x700684>
+    15a8:	44 c2       	rjmp	.+1160   	; 0x1a32 <udc_process_setup+0x672>
+    15aa:	e9 e7       	ldi	r30, 0x79	; 121
+    15ac:	f0 e0       	ldi	r31, 0x00	; 0
+    15ae:	91 e0       	ldi	r25, 0x01	; 1
+    15b0:	88 ed       	ldi	r24, 0xD8	; 216
+    15b2:	f8 94       	cli
+    15b4:	84 bf       	out	0x34, r24	; 52
+    15b6:	90 83       	st	Z, r25
+    15b8:	91 11       	cpse	r25, r1
+    15ba:	cc c1       	rjmp	.+920    	; 0x1954 <udc_process_setup+0x594>
+    15bc:	87 ff       	sbrs	r24, 7
+    15be:	fd c0       	rjmp	.+506    	; 0x17ba <udc_process_setup+0x3fa>
+    15c0:	20 91 70 24 	lds	r18, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
+    15c4:	30 91 71 24 	lds	r19, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
+    15c8:	21 15       	cp	r18, r1
+    15ca:	31 05       	cpc	r19, r1
+    15cc:	09 f4       	brne	.+2      	; 0x15d0 <udc_process_setup+0x210>
+    15ce:	c2 c1       	rjmp	.+900    	; 0x1954 <udc_process_setup+0x594>
+    15d0:	8f 71       	andi	r24, 0x1F	; 31
+    15d2:	09 f0       	breq	.+2      	; 0x15d6 <udc_process_setup+0x216>
+    15d4:	9f c0       	rjmp	.+318    	; 0x1714 <udc_process_setup+0x354>
+    15d6:	80 91 6b 24 	lds	r24, 0x246B	; 0x80246b <udd_g_ctrlreq+0x1>
+    15da:	86 30       	cpi	r24, 0x06	; 6
+    15dc:	71 f0       	breq	.+28     	; 0x15fa <udc_process_setup+0x23a>
+    15de:	88 30       	cpi	r24, 0x08	; 8
+    15e0:	09 f4       	brne	.+2      	; 0x15e4 <udc_process_setup+0x224>
+    15e2:	8e c0       	rjmp	.+284    	; 0x1700 <udc_process_setup+0x340>
+    15e4:	81 11       	cpse	r24, r1
+    15e6:	b6 c1       	rjmp	.+876    	; 0x1954 <udc_process_setup+0x594>
+    15e8:	22 30       	cpi	r18, 0x02	; 2
+    15ea:	31 05       	cpc	r19, r1
+    15ec:	09 f0       	breq	.+2      	; 0x15f0 <udc_process_setup+0x230>
+    15ee:	b2 c1       	rjmp	.+868    	; 0x1954 <udc_process_setup+0x594>
+    15f0:	62 e0       	ldi	r22, 0x02	; 2
+    15f2:	70 e0       	ldi	r23, 0x00	; 0
+    15f4:	80 ed       	ldi	r24, 0xD0	; 208
+    15f6:	90 e2       	ldi	r25, 0x20	; 32
+    15f8:	8b c0       	rjmp	.+278    	; 0x1710 <udc_process_setup+0x350>
+    15fa:	80 91 6c 24 	lds	r24, 0x246C	; 0x80246c <udd_g_ctrlreq+0x2>
+    15fe:	90 91 6d 24 	lds	r25, 0x246D	; 0x80246d <udd_g_ctrlreq+0x3>
+    1602:	29 2f       	mov	r18, r25
+    1604:	33 27       	eor	r19, r19
+    1606:	22 30       	cpi	r18, 0x02	; 2
+    1608:	31 05       	cpc	r19, r1
+    160a:	a1 f0       	breq	.+40     	; 0x1634 <udc_process_setup+0x274>
+    160c:	64 f4       	brge	.+24     	; 0x1626 <udc_process_setup+0x266>
+    160e:	21 30       	cpi	r18, 0x01	; 1
+    1610:	31 05       	cpc	r19, r1
+    1612:	09 f0       	breq	.+2      	; 0x1616 <udc_process_setup+0x256>
+    1614:	9f c1       	rjmp	.+830    	; 0x1954 <udc_process_setup+0x594>
+    1616:	80 91 10 20 	lds	r24, 0x2010	; 0x802010 <udc_config>
+    161a:	90 91 11 20 	lds	r25, 0x2011	; 0x802011 <udc_config+0x1>
+    161e:	dc 01       	movw	r26, r24
+    1620:	6c 91       	ld	r22, X
+    1622:	70 e0       	ldi	r23, 0x00	; 0
+    1624:	5b c0       	rjmp	.+182    	; 0x16dc <udc_process_setup+0x31c>
+    1626:	23 30       	cpi	r18, 0x03	; 3
+    1628:	31 05       	cpc	r19, r1
+    162a:	89 f1       	breq	.+98     	; 0x168e <udc_process_setup+0x2ce>
+    162c:	2f 30       	cpi	r18, 0x0F	; 15
+    162e:	31 05       	cpc	r19, r1
+    1630:	09 f1       	breq	.+66     	; 0x1674 <udc_process_setup+0x2b4>
+    1632:	90 c1       	rjmp	.+800    	; 0x1954 <udc_process_setup+0x594>
+    1634:	e0 91 10 20 	lds	r30, 0x2010	; 0x802010 <udc_config>
+    1638:	f0 91 11 20 	lds	r31, 0x2011	; 0x802011 <udc_config+0x1>
+    163c:	21 89       	ldd	r18, Z+17	; 0x11
+    163e:	82 17       	cp	r24, r18
+    1640:	08 f0       	brcs	.+2      	; 0x1644 <udc_process_setup+0x284>
+    1642:	88 c1       	rjmp	.+784    	; 0x1954 <udc_process_setup+0x594>
+    1644:	99 27       	eor	r25, r25
+    1646:	88 0f       	add	r24, r24
+    1648:	99 1f       	adc	r25, r25
+    164a:	88 0f       	add	r24, r24
+    164c:	99 1f       	adc	r25, r25
+    164e:	e0 91 12 20 	lds	r30, 0x2012	; 0x802012 <udc_config+0x2>
+    1652:	f0 91 13 20 	lds	r31, 0x2013	; 0x802013 <udc_config+0x3>
+    1656:	e8 0f       	add	r30, r24
+    1658:	f9 1f       	adc	r31, r25
+    165a:	80 81       	ld	r24, Z
+    165c:	91 81       	ldd	r25, Z+1	; 0x01
+    165e:	fc 01       	movw	r30, r24
+    1660:	62 81       	ldd	r22, Z+2	; 0x02
+    1662:	73 81       	ldd	r23, Z+3	; 0x03
+    1664:	2d d5       	rcall	.+2650   	; 0x20c0 <udd_set_setup_payload>
+    1666:	e0 91 72 24 	lds	r30, 0x2472	; 0x802472 <udd_g_ctrlreq+0x8>
+    166a:	f0 91 73 24 	lds	r31, 0x2473	; 0x802473 <udd_g_ctrlreq+0x9>
+    166e:	82 e0       	ldi	r24, 0x02	; 2
+    1670:	81 83       	std	Z+1, r24	; 0x01
+    1672:	35 c0       	rjmp	.+106    	; 0x16de <udc_process_setup+0x31e>
+    1674:	80 91 14 20 	lds	r24, 0x2014	; 0x802014 <udc_config+0x4>
+    1678:	90 91 15 20 	lds	r25, 0x2015	; 0x802015 <udc_config+0x5>
+    167c:	00 97       	sbiw	r24, 0x00	; 0
+    167e:	09 f4       	brne	.+2      	; 0x1682 <udc_process_setup+0x2c2>
+    1680:	69 c1       	rjmp	.+722    	; 0x1954 <udc_process_setup+0x594>
+    1682:	dc 01       	movw	r26, r24
+    1684:	12 96       	adiw	r26, 0x02	; 2
+    1686:	6d 91       	ld	r22, X+
+    1688:	7c 91       	ld	r23, X
+    168a:	13 97       	sbiw	r26, 0x03	; 3
+    168c:	27 c0       	rjmp	.+78     	; 0x16dc <udc_process_setup+0x31c>
+    168e:	99 27       	eor	r25, r25
+    1690:	81 30       	cpi	r24, 0x01	; 1
+    1692:	91 05       	cpc	r25, r1
+    1694:	69 f0       	breq	.+26     	; 0x16b0 <udc_process_setup+0x2f0>
+    1696:	38 f0       	brcs	.+14     	; 0x16a6 <udc_process_setup+0x2e6>
+    1698:	02 97       	sbiw	r24, 0x02	; 2
+    169a:	09 f0       	breq	.+2      	; 0x169e <udc_process_setup+0x2de>
+    169c:	5b c1       	rjmp	.+694    	; 0x1954 <udc_process_setup+0x594>
+    169e:	68 e1       	ldi	r22, 0x18	; 24
+    16a0:	8a e8       	ldi	r24, 0x8A	; 138
+    16a2:	90 e2       	ldi	r25, 0x20	; 32
+    16a4:	08 c0       	rjmp	.+16     	; 0x16b6 <udc_process_setup+0x2f6>
+    16a6:	64 e0       	ldi	r22, 0x04	; 4
+    16a8:	70 e0       	ldi	r23, 0x00	; 0
+    16aa:	8e ea       	ldi	r24, 0xAE	; 174
+    16ac:	90 e2       	ldi	r25, 0x20	; 32
+    16ae:	16 c0       	rjmp	.+44     	; 0x16dc <udc_process_setup+0x31c>
+    16b0:	69 e0       	ldi	r22, 0x09	; 9
+    16b2:	83 ea       	ldi	r24, 0xA3	; 163
+    16b4:	90 e2       	ldi	r25, 0x20	; 32
+    16b6:	28 2f       	mov	r18, r24
+    16b8:	aa e5       	ldi	r26, 0x5A	; 90
+    16ba:	b0 e2       	ldi	r27, 0x20	; 32
+    16bc:	fc 01       	movw	r30, r24
+    16be:	81 91       	ld	r24, Z+
+    16c0:	90 e0       	ldi	r25, 0x00	; 0
+    16c2:	8d 93       	st	X+, r24
+    16c4:	9d 93       	st	X+, r25
+    16c6:	8e 2f       	mov	r24, r30
+    16c8:	82 1b       	sub	r24, r18
+    16ca:	86 17       	cp	r24, r22
+    16cc:	c0 f3       	brcs	.-16     	; 0x16be <udc_process_setup+0x2fe>
+    16ce:	66 0f       	add	r22, r22
+    16d0:	6e 5f       	subi	r22, 0xFE	; 254
+    16d2:	60 93 58 20 	sts	0x2058, r22	; 0x802058 <udc_string_desc>
+    16d6:	70 e0       	ldi	r23, 0x00	; 0
+    16d8:	88 e5       	ldi	r24, 0x58	; 88
+    16da:	90 e2       	ldi	r25, 0x20	; 32
+    16dc:	f1 d4       	rcall	.+2530   	; 0x20c0 <udd_set_setup_payload>
+    16de:	80 91 70 24 	lds	r24, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
+    16e2:	90 91 71 24 	lds	r25, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
+    16e6:	20 91 74 24 	lds	r18, 0x2474	; 0x802474 <udd_g_ctrlreq+0xa>
+    16ea:	30 91 75 24 	lds	r19, 0x2475	; 0x802475 <udd_g_ctrlreq+0xb>
+    16ee:	82 17       	cp	r24, r18
+    16f0:	93 07       	cpc	r25, r19
+    16f2:	08 f0       	brcs	.+2      	; 0x16f6 <udc_process_setup+0x336>
+    16f4:	9e c1       	rjmp	.+828    	; 0x1a32 <udc_process_setup+0x672>
+    16f6:	80 93 74 24 	sts	0x2474, r24	; 0x802474 <udd_g_ctrlreq+0xa>
+    16fa:	90 93 75 24 	sts	0x2475, r25	; 0x802475 <udd_g_ctrlreq+0xb>
+    16fe:	99 c1       	rjmp	.+818    	; 0x1a32 <udc_process_setup+0x672>
+    1700:	21 30       	cpi	r18, 0x01	; 1
+    1702:	31 05       	cpc	r19, r1
+    1704:	09 f0       	breq	.+2      	; 0x1708 <udc_process_setup+0x348>
+    1706:	26 c1       	rjmp	.+588    	; 0x1954 <udc_process_setup+0x594>
+    1708:	61 e0       	ldi	r22, 0x01	; 1
+    170a:	70 e0       	ldi	r23, 0x00	; 0
+    170c:	8c ec       	ldi	r24, 0xCC	; 204
+    170e:	90 e2       	ldi	r25, 0x20	; 32
+    1710:	d7 d4       	rcall	.+2478   	; 0x20c0 <udd_set_setup_payload>
+    1712:	8f c1       	rjmp	.+798    	; 0x1a32 <udc_process_setup+0x672>
+    1714:	81 30       	cpi	r24, 0x01	; 1
+    1716:	c9 f5       	brne	.+114    	; 0x178a <udc_process_setup+0x3ca>
+    1718:	80 91 6b 24 	lds	r24, 0x246B	; 0x80246b <udd_g_ctrlreq+0x1>
+    171c:	8a 30       	cpi	r24, 0x0A	; 10
+    171e:	09 f0       	breq	.+2      	; 0x1722 <udc_process_setup+0x362>
+    1720:	19 c1       	rjmp	.+562    	; 0x1954 <udc_process_setup+0x594>
+    1722:	21 30       	cpi	r18, 0x01	; 1
+    1724:	31 05       	cpc	r19, r1
+    1726:	09 f0       	breq	.+2      	; 0x172a <udc_process_setup+0x36a>
+    1728:	15 c1       	rjmp	.+554    	; 0x1954 <udc_process_setup+0x594>
+    172a:	80 91 cc 20 	lds	r24, 0x20CC	; 0x8020cc <udc_num_configuration>
+    172e:	88 23       	and	r24, r24
+    1730:	09 f4       	brne	.+2      	; 0x1734 <udc_process_setup+0x374>
+    1732:	10 c1       	rjmp	.+544    	; 0x1954 <udc_process_setup+0x594>
+    1734:	e0 90 6e 24 	lds	r14, 0x246E	; 0x80246e <udd_g_ctrlreq+0x4>
+    1738:	f0 90 6f 24 	lds	r15, 0x246F	; 0x80246f <udd_g_ctrlreq+0x5>
+    173c:	00 91 ca 20 	lds	r16, 0x20CA	; 0x8020ca <udc_ptr_conf>
+    1740:	10 91 cb 20 	lds	r17, 0x20CB	; 0x8020cb <udc_ptr_conf+0x1>
+    1744:	d8 01       	movw	r26, r16
+    1746:	ed 91       	ld	r30, X+
+    1748:	fc 91       	ld	r31, X
+    174a:	84 81       	ldd	r24, Z+4	; 0x04
+    174c:	e8 16       	cp	r14, r24
+    174e:	08 f0       	brcs	.+2      	; 0x1752 <udc_process_setup+0x392>
+    1750:	01 c1       	rjmp	.+514    	; 0x1954 <udc_process_setup+0x594>
+    1752:	60 e0       	ldi	r22, 0x00	; 0
+    1754:	8e 2d       	mov	r24, r14
+    1756:	27 dd       	rcall	.-1458   	; 0x11a6 <udc_update_iface_desc>
+    1758:	88 23       	and	r24, r24
+    175a:	09 f4       	brne	.+2      	; 0x175e <udc_process_setup+0x39e>
+    175c:	fb c0       	rjmp	.+502    	; 0x1954 <udc_process_setup+0x594>
+    175e:	ff 24       	eor	r15, r15
+    1760:	ee 0c       	add	r14, r14
+    1762:	ff 1c       	adc	r15, r15
+    1764:	f8 01       	movw	r30, r16
+    1766:	82 81       	ldd	r24, Z+2	; 0x02
+    1768:	93 81       	ldd	r25, Z+3	; 0x03
+    176a:	8e 0d       	add	r24, r14
+    176c:	9f 1d       	adc	r25, r15
+    176e:	dc 01       	movw	r26, r24
+    1770:	ed 91       	ld	r30, X+
+    1772:	fc 91       	ld	r31, X
+    1774:	06 80       	ldd	r0, Z+6	; 0x06
+    1776:	f7 81       	ldd	r31, Z+7	; 0x07
+    1778:	e0 2d       	mov	r30, r0
+    177a:	09 95       	icall
+    177c:	80 93 ce 20 	sts	0x20CE, r24	; 0x8020ce <udc_iface_setting>
+    1780:	61 e0       	ldi	r22, 0x01	; 1
+    1782:	70 e0       	ldi	r23, 0x00	; 0
+    1784:	8e ec       	ldi	r24, 0xCE	; 206
+    1786:	90 e2       	ldi	r25, 0x20	; 32
+    1788:	c3 cf       	rjmp	.-122    	; 0x1710 <udc_process_setup+0x350>
+    178a:	82 30       	cpi	r24, 0x02	; 2
+    178c:	09 f0       	breq	.+2      	; 0x1790 <udc_process_setup+0x3d0>
+    178e:	e2 c0       	rjmp	.+452    	; 0x1954 <udc_process_setup+0x594>
+    1790:	80 91 6b 24 	lds	r24, 0x246B	; 0x80246b <udd_g_ctrlreq+0x1>
+    1794:	81 11       	cpse	r24, r1
+    1796:	de c0       	rjmp	.+444    	; 0x1954 <udc_process_setup+0x594>
+    1798:	22 30       	cpi	r18, 0x02	; 2
+    179a:	31 05       	cpc	r19, r1
+    179c:	09 f0       	breq	.+2      	; 0x17a0 <udc_process_setup+0x3e0>
+    179e:	da c0       	rjmp	.+436    	; 0x1954 <udc_process_setup+0x594>
+    17a0:	80 91 6e 24 	lds	r24, 0x246E	; 0x80246e <udd_g_ctrlreq+0x4>
+    17a4:	e5 d4       	rcall	.+2506   	; 0x2170 <udd_ep_is_halted>
+    17a6:	90 e0       	ldi	r25, 0x00	; 0
+    17a8:	80 93 c6 20 	sts	0x20C6, r24	; 0x8020c6 <udc_ep_status.5522>
+    17ac:	90 93 c7 20 	sts	0x20C7, r25	; 0x8020c7 <udc_ep_status.5522+0x1>
+    17b0:	62 e0       	ldi	r22, 0x02	; 2
+    17b2:	70 e0       	ldi	r23, 0x00	; 0
+    17b4:	86 ec       	ldi	r24, 0xC6	; 198
+    17b6:	90 e2       	ldi	r25, 0x20	; 32
+    17b8:	ab cf       	rjmp	.-170    	; 0x1710 <udc_process_setup+0x350>
+    17ba:	8f 71       	andi	r24, 0x1F	; 31
+    17bc:	09 f0       	breq	.+2      	; 0x17c0 <udc_process_setup+0x400>
+    17be:	7d c0       	rjmp	.+250    	; 0x18ba <udc_process_setup+0x4fa>
+    17c0:	80 91 6b 24 	lds	r24, 0x246B	; 0x80246b <udd_g_ctrlreq+0x1>
+    17c4:	83 30       	cpi	r24, 0x03	; 3
+    17c6:	09 f4       	brne	.+2      	; 0x17ca <udc_process_setup+0x40a>
+    17c8:	c5 c0       	rjmp	.+394    	; 0x1954 <udc_process_setup+0x594>
+    17ca:	18 f4       	brcc	.+6      	; 0x17d2 <udc_process_setup+0x412>
+    17cc:	81 30       	cpi	r24, 0x01	; 1
+    17ce:	a1 f0       	breq	.+40     	; 0x17f8 <udc_process_setup+0x438>
+    17d0:	c1 c0       	rjmp	.+386    	; 0x1954 <udc_process_setup+0x594>
+    17d2:	85 30       	cpi	r24, 0x05	; 5
+    17d4:	19 f0       	breq	.+6      	; 0x17dc <udc_process_setup+0x41c>
+    17d6:	89 30       	cpi	r24, 0x09	; 9
+    17d8:	39 f1       	breq	.+78     	; 0x1828 <udc_process_setup+0x468>
+    17da:	bc c0       	rjmp	.+376    	; 0x1954 <udc_process_setup+0x594>
+    17dc:	80 91 70 24 	lds	r24, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
+    17e0:	90 91 71 24 	lds	r25, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
+    17e4:	89 2b       	or	r24, r25
+    17e6:	09 f0       	breq	.+2      	; 0x17ea <udc_process_setup+0x42a>
+    17e8:	b5 c0       	rjmp	.+362    	; 0x1954 <udc_process_setup+0x594>
+    17ea:	8f ec       	ldi	r24, 0xCF	; 207
+    17ec:	98 e0       	ldi	r25, 0x08	; 8
+    17ee:	80 93 76 24 	sts	0x2476, r24	; 0x802476 <udd_g_ctrlreq+0xc>
+    17f2:	90 93 77 24 	sts	0x2477, r25	; 0x802477 <udd_g_ctrlreq+0xd>
+    17f6:	1d c1       	rjmp	.+570    	; 0x1a32 <udc_process_setup+0x672>
+    17f8:	80 91 70 24 	lds	r24, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
+    17fc:	90 91 71 24 	lds	r25, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
+    1800:	89 2b       	or	r24, r25
+    1802:	09 f0       	breq	.+2      	; 0x1806 <udc_process_setup+0x446>
+    1804:	a7 c0       	rjmp	.+334    	; 0x1954 <udc_process_setup+0x594>
+    1806:	80 91 6c 24 	lds	r24, 0x246C	; 0x80246c <udd_g_ctrlreq+0x2>
+    180a:	90 91 6d 24 	lds	r25, 0x246D	; 0x80246d <udd_g_ctrlreq+0x3>
+    180e:	01 97       	sbiw	r24, 0x01	; 1
+    1810:	09 f0       	breq	.+2      	; 0x1814 <udc_process_setup+0x454>
+    1812:	a0 c0       	rjmp	.+320    	; 0x1954 <udc_process_setup+0x594>
+    1814:	80 91 d0 20 	lds	r24, 0x20D0	; 0x8020d0 <udc_device_status>
+    1818:	90 91 d1 20 	lds	r25, 0x20D1	; 0x8020d1 <udc_device_status+0x1>
+    181c:	8d 7f       	andi	r24, 0xFD	; 253
+    181e:	80 93 d0 20 	sts	0x20D0, r24	; 0x8020d0 <udc_device_status>
+    1822:	90 93 d1 20 	sts	0x20D1, r25	; 0x8020d1 <udc_device_status+0x1>
+    1826:	05 c1       	rjmp	.+522    	; 0x1a32 <udc_process_setup+0x672>
+    1828:	80 91 70 24 	lds	r24, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
+    182c:	90 91 71 24 	lds	r25, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
+    1830:	89 2b       	or	r24, r25
+    1832:	09 f0       	breq	.+2      	; 0x1836 <udc_process_setup+0x476>
+    1834:	8f c0       	rjmp	.+286    	; 0x1954 <udc_process_setup+0x594>
+    1836:	41 d4       	rcall	.+2178   	; 0x20ba <udd_getaddress>
+    1838:	88 23       	and	r24, r24
+    183a:	09 f4       	brne	.+2      	; 0x183e <udc_process_setup+0x47e>
+    183c:	8b c0       	rjmp	.+278    	; 0x1954 <udc_process_setup+0x594>
+    183e:	20 91 6c 24 	lds	r18, 0x246C	; 0x80246c <udd_g_ctrlreq+0x2>
+    1842:	30 91 6d 24 	lds	r19, 0x246D	; 0x80246d <udd_g_ctrlreq+0x3>
+    1846:	33 27       	eor	r19, r19
+    1848:	e0 91 10 20 	lds	r30, 0x2010	; 0x802010 <udc_config>
+    184c:	f0 91 11 20 	lds	r31, 0x2011	; 0x802011 <udc_config+0x1>
+    1850:	81 89       	ldd	r24, Z+17	; 0x11
+    1852:	90 e0       	ldi	r25, 0x00	; 0
+    1854:	82 17       	cp	r24, r18
+    1856:	93 07       	cpc	r25, r19
+    1858:	08 f4       	brcc	.+2      	; 0x185c <udc_process_setup+0x49c>
+    185a:	7c c0       	rjmp	.+248    	; 0x1954 <udc_process_setup+0x594>
+    185c:	70 dd       	rcall	.-1312   	; 0x133e <udc_reset>
+    185e:	80 91 6c 24 	lds	r24, 0x246C	; 0x80246c <udd_g_ctrlreq+0x2>
+    1862:	90 91 6d 24 	lds	r25, 0x246D	; 0x80246d <udd_g_ctrlreq+0x3>
+    1866:	80 93 cc 20 	sts	0x20CC, r24	; 0x8020cc <udc_num_configuration>
+    186a:	88 23       	and	r24, r24
+    186c:	09 f4       	brne	.+2      	; 0x1870 <udc_process_setup+0x4b0>
+    186e:	e1 c0       	rjmp	.+450    	; 0x1a32 <udc_process_setup+0x672>
+    1870:	99 27       	eor	r25, r25
+    1872:	81 50       	subi	r24, 0x01	; 1
+    1874:	90 4c       	sbci	r25, 0xC0	; 192
+    1876:	88 0f       	add	r24, r24
+    1878:	99 1f       	adc	r25, r25
+    187a:	88 0f       	add	r24, r24
+    187c:	99 1f       	adc	r25, r25
+    187e:	20 91 12 20 	lds	r18, 0x2012	; 0x802012 <udc_config+0x2>
+    1882:	30 91 13 20 	lds	r19, 0x2013	; 0x802013 <udc_config+0x3>
+    1886:	82 0f       	add	r24, r18
+    1888:	93 1f       	adc	r25, r19
+    188a:	80 93 ca 20 	sts	0x20CA, r24	; 0x8020ca <udc_ptr_conf>
+    188e:	90 93 cb 20 	sts	0x20CB, r25	; 0x8020cb <udc_ptr_conf+0x1>
+    1892:	10 e0       	ldi	r17, 0x00	; 0
+    1894:	e0 91 ca 20 	lds	r30, 0x20CA	; 0x8020ca <udc_ptr_conf>
+    1898:	f0 91 cb 20 	lds	r31, 0x20CB	; 0x8020cb <udc_ptr_conf+0x1>
+    189c:	01 90       	ld	r0, Z+
+    189e:	f0 81       	ld	r31, Z
+    18a0:	e0 2d       	mov	r30, r0
+    18a2:	84 81       	ldd	r24, Z+4	; 0x04
+    18a4:	18 17       	cp	r17, r24
+    18a6:	08 f0       	brcs	.+2      	; 0x18aa <udc_process_setup+0x4ea>
+    18a8:	c4 c0       	rjmp	.+392    	; 0x1a32 <udc_process_setup+0x672>
+    18aa:	60 e0       	ldi	r22, 0x00	; 0
+    18ac:	81 2f       	mov	r24, r17
+    18ae:	ce dc       	rcall	.-1636   	; 0x124c <udc_iface_enable>
+    18b0:	88 23       	and	r24, r24
+    18b2:	09 f4       	brne	.+2      	; 0x18b6 <udc_process_setup+0x4f6>
+    18b4:	4f c0       	rjmp	.+158    	; 0x1954 <udc_process_setup+0x594>
+    18b6:	1f 5f       	subi	r17, 0xFF	; 255
+    18b8:	ed cf       	rjmp	.-38     	; 0x1894 <udc_process_setup+0x4d4>
+    18ba:	81 30       	cpi	r24, 0x01	; 1
+    18bc:	f1 f4       	brne	.+60     	; 0x18fa <udc_process_setup+0x53a>
+    18be:	80 91 6b 24 	lds	r24, 0x246B	; 0x80246b <udd_g_ctrlreq+0x1>
+    18c2:	8b 30       	cpi	r24, 0x0B	; 11
+    18c4:	09 f0       	breq	.+2      	; 0x18c8 <udc_process_setup+0x508>
+    18c6:	46 c0       	rjmp	.+140    	; 0x1954 <udc_process_setup+0x594>
+    18c8:	80 91 70 24 	lds	r24, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
+    18cc:	90 91 71 24 	lds	r25, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
+    18d0:	89 2b       	or	r24, r25
+    18d2:	09 f0       	breq	.+2      	; 0x18d6 <udc_process_setup+0x516>
+    18d4:	3f c0       	rjmp	.+126    	; 0x1954 <udc_process_setup+0x594>
+    18d6:	80 91 cc 20 	lds	r24, 0x20CC	; 0x8020cc <udc_num_configuration>
+    18da:	88 23       	and	r24, r24
+    18dc:	09 f4       	brne	.+2      	; 0x18e0 <udc_process_setup+0x520>
+    18de:	3a c0       	rjmp	.+116    	; 0x1954 <udc_process_setup+0x594>
+    18e0:	10 91 6e 24 	lds	r17, 0x246E	; 0x80246e <udd_g_ctrlreq+0x4>
+    18e4:	60 91 6c 24 	lds	r22, 0x246C	; 0x80246c <udd_g_ctrlreq+0x2>
+    18e8:	81 2f       	mov	r24, r17
+    18ea:	69 83       	std	Y+1, r22	; 0x01
+    18ec:	e2 dc       	rcall	.-1596   	; 0x12b2 <udc_iface_disable>
+    18ee:	69 81       	ldd	r22, Y+1	; 0x01
+    18f0:	88 23       	and	r24, r24
+    18f2:	81 f1       	breq	.+96     	; 0x1954 <udc_process_setup+0x594>
+    18f4:	81 2f       	mov	r24, r17
+    18f6:	aa dc       	rcall	.-1708   	; 0x124c <udc_iface_enable>
+    18f8:	2b c0       	rjmp	.+86     	; 0x1950 <udc_process_setup+0x590>
+    18fa:	82 30       	cpi	r24, 0x02	; 2
+    18fc:	59 f5       	brne	.+86     	; 0x1954 <udc_process_setup+0x594>
+    18fe:	80 91 6b 24 	lds	r24, 0x246B	; 0x80246b <udd_g_ctrlreq+0x1>
+    1902:	81 30       	cpi	r24, 0x01	; 1
+    1904:	19 f0       	breq	.+6      	; 0x190c <udc_process_setup+0x54c>
+    1906:	83 30       	cpi	r24, 0x03	; 3
+    1908:	89 f0       	breq	.+34     	; 0x192c <udc_process_setup+0x56c>
+    190a:	24 c0       	rjmp	.+72     	; 0x1954 <udc_process_setup+0x594>
+    190c:	80 91 70 24 	lds	r24, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
+    1910:	90 91 71 24 	lds	r25, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
+    1914:	89 2b       	or	r24, r25
+    1916:	f1 f4       	brne	.+60     	; 0x1954 <udc_process_setup+0x594>
+    1918:	80 91 6c 24 	lds	r24, 0x246C	; 0x80246c <udd_g_ctrlreq+0x2>
+    191c:	90 91 6d 24 	lds	r25, 0x246D	; 0x80246d <udd_g_ctrlreq+0x3>
+    1920:	89 2b       	or	r24, r25
+    1922:	c1 f4       	brne	.+48     	; 0x1954 <udc_process_setup+0x594>
+    1924:	80 91 6e 24 	lds	r24, 0x246E	; 0x80246e <udd_g_ctrlreq+0x4>
+    1928:	2a d4       	rcall	.+2132   	; 0x217e <udd_ep_clear_halt>
+    192a:	12 c0       	rjmp	.+36     	; 0x1950 <udc_process_setup+0x590>
+    192c:	80 91 70 24 	lds	r24, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
+    1930:	90 91 71 24 	lds	r25, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
+    1934:	89 2b       	or	r24, r25
+    1936:	71 f4       	brne	.+28     	; 0x1954 <udc_process_setup+0x594>
+    1938:	80 91 6c 24 	lds	r24, 0x246C	; 0x80246c <udd_g_ctrlreq+0x2>
+    193c:	90 91 6d 24 	lds	r25, 0x246D	; 0x80246d <udd_g_ctrlreq+0x3>
+    1940:	89 2b       	or	r24, r25
+    1942:	41 f4       	brne	.+16     	; 0x1954 <udc_process_setup+0x594>
+    1944:	80 91 6e 24 	lds	r24, 0x246E	; 0x80246e <udd_g_ctrlreq+0x4>
+    1948:	bf d4       	rcall	.+2430   	; 0x22c8 <udd_ep_abort>
+    194a:	80 91 6e 24 	lds	r24, 0x246E	; 0x80246e <udd_g_ctrlreq+0x4>
+    194e:	f5 d4       	rcall	.+2538   	; 0x233a <udd_ep_set_halt>
+    1950:	81 11       	cpse	r24, r1
+    1952:	6f c0       	rjmp	.+222    	; 0x1a32 <udc_process_setup+0x672>
+    1954:	80 91 6a 24 	lds	r24, 0x246A	; 0x80246a <udd_g_ctrlreq>
+    1958:	8f 71       	andi	r24, 0x1F	; 31
+    195a:	81 30       	cpi	r24, 0x01	; 1
+    195c:	b9 f5       	brne	.+110    	; 0x19cc <udc_process_setup+0x60c>
+    195e:	80 91 cc 20 	lds	r24, 0x20CC	; 0x8020cc <udc_num_configuration>
+    1962:	88 23       	and	r24, r24
+    1964:	99 f1       	breq	.+102    	; 0x19cc <udc_process_setup+0x60c>
+    1966:	e0 90 6e 24 	lds	r14, 0x246E	; 0x80246e <udd_g_ctrlreq+0x4>
+    196a:	f0 90 6f 24 	lds	r15, 0x246F	; 0x80246f <udd_g_ctrlreq+0x5>
+    196e:	00 91 ca 20 	lds	r16, 0x20CA	; 0x8020ca <udc_ptr_conf>
+    1972:	10 91 cb 20 	lds	r17, 0x20CB	; 0x8020cb <udc_ptr_conf+0x1>
+    1976:	d8 01       	movw	r26, r16
     1978:	ed 91       	ld	r30, X+
     197a:	fc 91       	ld	r31, X
-    197c:	17 97       	sbiw	r26, 0x07	; 7
-    197e:	09 95       	icall
-    1980:	68 2f       	mov	r22, r24
-    1982:	8f 2d       	mov	r24, r15
-    1984:	c7 db       	rcall	.-2162   	; 0x1114 <udc_update_iface_desc>
-    1986:	88 23       	and	r24, r24
-    1988:	61 f0       	breq	.+24     	; 0x19a2 <udc_process_setup+0x674>
-    198a:	d8 01       	movw	r26, r16
-    198c:	14 96       	adiw	r26, 0x04	; 4
-    198e:	ed 91       	ld	r30, X+
-    1990:	fc 91       	ld	r31, X
-    1992:	15 97       	sbiw	r26, 0x05	; 5
-    1994:	09 95       	icall
-    1996:	81 11       	cpse	r24, r1
-    1998:	02 c0       	rjmp	.+4      	; 0x199e <udc_process_setup+0x670>
-    199a:	f3 94       	inc	r15
-    199c:	d7 cf       	rjmp	.-82     	; 0x194c <udc_process_setup+0x61e>
-    199e:	81 e0       	ldi	r24, 0x01	; 1
-    19a0:	01 c0       	rjmp	.+2      	; 0x19a4 <udc_process_setup+0x676>
-    19a2:	80 e0       	ldi	r24, 0x00	; 0
-    19a4:	0f 90       	pop	r0
-    19a6:	df 91       	pop	r29
-    19a8:	cf 91       	pop	r28
-    19aa:	1f 91       	pop	r17
-    19ac:	0f 91       	pop	r16
-    19ae:	ff 90       	pop	r15
-    19b0:	ef 90       	pop	r14
-    19b2:	08 95       	ret
+    197c:	84 81       	ldd	r24, Z+4	; 0x04
+    197e:	e8 16       	cp	r14, r24
+    1980:	28 f5       	brcc	.+74     	; 0x19cc <udc_process_setup+0x60c>
+    1982:	60 e0       	ldi	r22, 0x00	; 0
+    1984:	8e 2d       	mov	r24, r14
+    1986:	0f dc       	rcall	.-2018   	; 0x11a6 <udc_update_iface_desc>
+    1988:	88 23       	and	r24, r24
+    198a:	01 f1       	breq	.+64     	; 0x19cc <udc_process_setup+0x60c>
+    198c:	f7 01       	movw	r30, r14
+    198e:	ff 27       	eor	r31, r31
+    1990:	ee 0f       	add	r30, r30
+    1992:	ff 1f       	adc	r31, r31
+    1994:	d8 01       	movw	r26, r16
+    1996:	12 96       	adiw	r26, 0x02	; 2
+    1998:	8d 91       	ld	r24, X+
+    199a:	9c 91       	ld	r25, X
+    199c:	13 97       	sbiw	r26, 0x03	; 3
+    199e:	e8 0f       	add	r30, r24
+    19a0:	f9 1f       	adc	r31, r25
+    19a2:	00 81       	ld	r16, Z
+    19a4:	11 81       	ldd	r17, Z+1	; 0x01
+    19a6:	d8 01       	movw	r26, r16
+    19a8:	16 96       	adiw	r26, 0x06	; 6
+    19aa:	ed 91       	ld	r30, X+
+    19ac:	fc 91       	ld	r31, X
+    19ae:	17 97       	sbiw	r26, 0x07	; 7
+    19b0:	09 95       	icall
+    19b2:	68 2f       	mov	r22, r24
+    19b4:	8e 2d       	mov	r24, r14
+    19b6:	f7 db       	rcall	.-2066   	; 0x11a6 <udc_update_iface_desc>
+    19b8:	88 23       	and	r24, r24
+    19ba:	41 f0       	breq	.+16     	; 0x19cc <udc_process_setup+0x60c>
+    19bc:	d8 01       	movw	r26, r16
+    19be:	14 96       	adiw	r26, 0x04	; 4
+    19c0:	ed 91       	ld	r30, X+
+    19c2:	fc 91       	ld	r31, X
+    19c4:	15 97       	sbiw	r26, 0x05	; 5
+    19c6:	09 95       	icall
+    19c8:	81 11       	cpse	r24, r1
+    19ca:	33 c0       	rjmp	.+102    	; 0x1a32 <udc_process_setup+0x672>
+    19cc:	80 91 6a 24 	lds	r24, 0x246A	; 0x80246a <udd_g_ctrlreq>
+    19d0:	8f 71       	andi	r24, 0x1F	; 31
+    19d2:	82 30       	cpi	r24, 0x02	; 2
+    19d4:	81 f5       	brne	.+96     	; 0x1a36 <udc_process_setup+0x676>
+    19d6:	80 91 cc 20 	lds	r24, 0x20CC	; 0x8020cc <udc_num_configuration>
+    19da:	88 23       	and	r24, r24
+    19dc:	61 f1       	breq	.+88     	; 0x1a36 <udc_process_setup+0x676>
+    19de:	f1 2c       	mov	r15, r1
+    19e0:	e0 91 ca 20 	lds	r30, 0x20CA	; 0x8020ca <udc_ptr_conf>
+    19e4:	f0 91 cb 20 	lds	r31, 0x20CB	; 0x8020cb <udc_ptr_conf+0x1>
+    19e8:	a0 81       	ld	r26, Z
+    19ea:	b1 81       	ldd	r27, Z+1	; 0x01
+    19ec:	14 96       	adiw	r26, 0x04	; 4
+    19ee:	8c 91       	ld	r24, X
+    19f0:	f8 16       	cp	r15, r24
+    19f2:	08 f5       	brcc	.+66     	; 0x1a36 <udc_process_setup+0x676>
+    19f4:	92 81       	ldd	r25, Z+2	; 0x02
+    19f6:	83 81       	ldd	r24, Z+3	; 0x03
+    19f8:	e9 2f       	mov	r30, r25
+    19fa:	f8 2f       	mov	r31, r24
+    19fc:	ef 0d       	add	r30, r15
+    19fe:	f1 1d       	adc	r31, r1
+    1a00:	ef 0d       	add	r30, r15
+    1a02:	f1 1d       	adc	r31, r1
+    1a04:	00 81       	ld	r16, Z
+    1a06:	11 81       	ldd	r17, Z+1	; 0x01
+    1a08:	d8 01       	movw	r26, r16
+    1a0a:	16 96       	adiw	r26, 0x06	; 6
+    1a0c:	ed 91       	ld	r30, X+
+    1a0e:	fc 91       	ld	r31, X
+    1a10:	17 97       	sbiw	r26, 0x07	; 7
+    1a12:	09 95       	icall
+    1a14:	68 2f       	mov	r22, r24
+    1a16:	8f 2d       	mov	r24, r15
+    1a18:	c6 db       	rcall	.-2164   	; 0x11a6 <udc_update_iface_desc>
+    1a1a:	88 23       	and	r24, r24
+    1a1c:	61 f0       	breq	.+24     	; 0x1a36 <udc_process_setup+0x676>
+    1a1e:	d8 01       	movw	r26, r16
+    1a20:	14 96       	adiw	r26, 0x04	; 4
+    1a22:	ed 91       	ld	r30, X+
+    1a24:	fc 91       	ld	r31, X
+    1a26:	15 97       	sbiw	r26, 0x05	; 5
+    1a28:	09 95       	icall
+    1a2a:	81 11       	cpse	r24, r1
+    1a2c:	02 c0       	rjmp	.+4      	; 0x1a32 <udc_process_setup+0x672>
+    1a2e:	f3 94       	inc	r15
+    1a30:	d7 cf       	rjmp	.-82     	; 0x19e0 <udc_process_setup+0x620>
+    1a32:	81 e0       	ldi	r24, 0x01	; 1
+    1a34:	01 c0       	rjmp	.+2      	; 0x1a38 <udc_process_setup+0x678>
+    1a36:	80 e0       	ldi	r24, 0x00	; 0
+    1a38:	0f 90       	pop	r0
+    1a3a:	df 91       	pop	r29
+    1a3c:	cf 91       	pop	r28
+    1a3e:	1f 91       	pop	r17
+    1a40:	0f 91       	pop	r16
+    1a42:	ff 90       	pop	r15
+    1a44:	ef 90       	pop	r14
+    1a46:	08 95       	ret
 
-000019b4 <ccp_write_io>:
+00001a48 <ccp_write_io>:
 
 	PUBLIC_FUNCTION(ccp_write_io)
 
 #if defined(__GNUC__)
 
 	out     RAMPZ, r1               // Reset bits 23:16 of Z
-    19b4:	1b be       	out	0x3b, r1	; 59
+    1a48:	1b be       	out	0x3b, r1	; 59
 	movw    r30, r24                // Load addr into Z
-    19b6:	fc 01       	movw	r30, r24
+    1a4a:	fc 01       	movw	r30, r24
 	ldi     r18, CCP_IOREG          // Load magic CCP value
-    19b8:	28 ed       	ldi	r18, 0xD8	; 216
+    1a4c:	28 ed       	ldi	r18, 0xD8	; 216
 	out     CCP, r18                // Start CCP handshake
-    19ba:	24 bf       	out	0x34, r18	; 52
+    1a4e:	24 bf       	out	0x34, r18	; 52
 	st      Z, r22                  // Write value to I/O register
-    19bc:	60 83       	st	Z, r22
+    1a50:	60 83       	st	Z, r22
 	ret                             // Return to caller
-    19be:	08 95       	ret
+    1a52:	08 95       	ret
 
-000019c0 <nvm_read_byte>:
+00001a54 <nvm_read_byte>:
 #endif
 
 #ifndef __DOXYGEN__
 	PUBLIC_FUNCTION(nvm_read_byte)
 #if defined(__GNUC__)
 	lds r20, NVM_CMD          ; Store NVM command register
-    19c0:	40 91 ca 01 	lds	r20, 0x01CA	; 0x8001ca <__TEXT_REGION_LENGTH__+0x7001ca>
+    1a54:	40 91 ca 01 	lds	r20, 0x01CA	; 0x8001ca <__TEXT_REGION_LENGTH__+0x7001ca>
 	mov ZL, r22               ; Load byte index into low byte of Z.
-    19c4:	e6 2f       	mov	r30, r22
+    1a58:	e6 2f       	mov	r30, r22
 	mov ZH, r23               ; Load high byte into Z.
-    19c6:	f7 2f       	mov	r31, r23
+    1a5a:	f7 2f       	mov	r31, r23
 	sts NVM_CMD, r24          ; Load prepared command into NVM Command register.
-    19c8:	80 93 ca 01 	sts	0x01CA, r24	; 0x8001ca <__TEXT_REGION_LENGTH__+0x7001ca>
+    1a5c:	80 93 ca 01 	sts	0x01CA, r24	; 0x8001ca <__TEXT_REGION_LENGTH__+0x7001ca>
 	lpm r24, Z                ; Perform an LPM to read out byte
-    19cc:	84 91       	lpm	r24, Z
+    1a60:	84 91       	lpm	r24, Z
 	sts NVM_CMD, r20          ; Restore NVM command register
-    19ce:	40 93 ca 01 	sts	0x01CA, r20	; 0x8001ca <__TEXT_REGION_LENGTH__+0x7001ca>
+    1a62:	40 93 ca 01 	sts	0x01CA, r20	; 0x8001ca <__TEXT_REGION_LENGTH__+0x7001ca>
 	sts NVM_CMD, r16          ; Load prepared command into NVM Command register.
 	lpm r16, Z                ; Perform an LPM to read out byte
 	sts NVM_CMD, r20          ; Restore NVM command register
 #endif
 
 	ret
-    19d2:	08 95       	ret
+    1a66:	08 95       	ret
 
-000019d4 <sleepmgr_lock_mode>:
-    19d4:	e8 2f       	mov	r30, r24
-    19d6:	f0 e0       	ldi	r31, 0x00	; 0
-    19d8:	ea 5a       	subi	r30, 0xAA	; 170
-    19da:	f3 4d       	sbci	r31, 0xD3	; 211
-    19dc:	80 81       	ld	r24, Z
-    19de:	8f 3f       	cpi	r24, 0xFF	; 255
-    19e0:	09 f4       	brne	.+2      	; 0x19e4 <sleepmgr_lock_mode+0x10>
-    19e2:	ff cf       	rjmp	.-2      	; 0x19e2 <sleepmgr_lock_mode+0xe>
-    19e4:	9f b7       	in	r25, 0x3f	; 63
-    19e6:	f8 94       	cli
-    19e8:	80 81       	ld	r24, Z
-    19ea:	8f 5f       	subi	r24, 0xFF	; 255
-    19ec:	80 83       	st	Z, r24
-    19ee:	9f bf       	out	0x3f, r25	; 63
-    19f0:	08 95       	ret
-
-000019f2 <sleepmgr_unlock_mode>:
-    19f2:	e8 2f       	mov	r30, r24
-    19f4:	f0 e0       	ldi	r31, 0x00	; 0
-    19f6:	ea 5a       	subi	r30, 0xAA	; 170
-    19f8:	f3 4d       	sbci	r31, 0xD3	; 211
-    19fa:	80 81       	ld	r24, Z
-    19fc:	81 11       	cpse	r24, r1
-    19fe:	01 c0       	rjmp	.+2      	; 0x1a02 <sleepmgr_unlock_mode+0x10>
-    1a00:	ff cf       	rjmp	.-2      	; 0x1a00 <sleepmgr_unlock_mode+0xe>
-    1a02:	9f b7       	in	r25, 0x3f	; 63
-    1a04:	f8 94       	cli
-    1a06:	80 81       	ld	r24, Z
-    1a08:	81 50       	subi	r24, 0x01	; 1
-    1a0a:	80 83       	st	Z, r24
-    1a0c:	9f bf       	out	0x3f, r25	; 63
-    1a0e:	08 95       	ret
-
-00001a10 <udd_sleep_mode>:
-    1a10:	cf 93       	push	r28
-    1a12:	c8 2f       	mov	r28, r24
-    1a14:	80 91 64 22 	lds	r24, 0x2264	; 0x802264 <udd_b_idle>
-    1a18:	c1 11       	cpse	r28, r1
-    1a1a:	05 c0       	rjmp	.+10     	; 0x1a26 <udd_sleep_mode+0x16>
-    1a1c:	88 23       	and	r24, r24
-    1a1e:	39 f0       	breq	.+14     	; 0x1a2e <udd_sleep_mode+0x1e>
-    1a20:	81 e0       	ldi	r24, 0x01	; 1
-    1a22:	e7 df       	rcall	.-50     	; 0x19f2 <sleepmgr_unlock_mode>
-    1a24:	04 c0       	rjmp	.+8      	; 0x1a2e <udd_sleep_mode+0x1e>
-    1a26:	81 11       	cpse	r24, r1
-    1a28:	02 c0       	rjmp	.+4      	; 0x1a2e <udd_sleep_mode+0x1e>
-    1a2a:	81 e0       	ldi	r24, 0x01	; 1
-    1a2c:	d3 df       	rcall	.-90     	; 0x19d4 <sleepmgr_lock_mode>
-    1a2e:	c0 93 64 22 	sts	0x2264, r28	; 0x802264 <udd_b_idle>
-    1a32:	cf 91       	pop	r28
-    1a34:	08 95       	ret
-
-00001a36 <udd_ep_get_ctrl>:
-    1a36:	28 2f       	mov	r18, r24
-    1a38:	2f 70       	andi	r18, 0x0F	; 15
-    1a3a:	08 2e       	mov	r0, r24
-    1a3c:	00 0c       	add	r0, r0
-    1a3e:	99 0b       	sbc	r25, r25
-    1a40:	39 2f       	mov	r19, r25
-    1a42:	33 1f       	adc	r19, r19
-    1a44:	33 27       	eor	r19, r19
-    1a46:	33 1f       	adc	r19, r19
-    1a48:	83 2f       	mov	r24, r19
-    1a4a:	90 e0       	ldi	r25, 0x00	; 0
-    1a4c:	82 0f       	add	r24, r18
-    1a4e:	91 1d       	adc	r25, r1
-    1a50:	82 0f       	add	r24, r18
-    1a52:	91 1d       	adc	r25, r1
-    1a54:	23 e0       	ldi	r18, 0x03	; 3
-    1a56:	88 0f       	add	r24, r24
-    1a58:	99 1f       	adc	r25, r25
-    1a5a:	2a 95       	dec	r18
-    1a5c:	e1 f7       	brne	.-8      	; 0x1a56 <udd_ep_get_ctrl+0x20>
-    1a5e:	80 5e       	subi	r24, 0xE0	; 224
-    1a60:	9d 4d       	sbci	r25, 0xDD	; 221
-    1a62:	08 95       	ret
-
-00001a64 <udd_ctrl_init>:
-    1a64:	0f 93       	push	r16
-    1a66:	e8 ec       	ldi	r30, 0xC8	; 200
-    1a68:	f4 e0       	ldi	r31, 0x04	; 4
-    1a6a:	80 81       	ld	r24, Z
-    1a6c:	8f 7d       	andi	r24, 0xDF	; 223
-    1a6e:	80 83       	st	Z, r24
+00001a68 <sleepmgr_lock_mode>:
+    1a68:	e8 2f       	mov	r30, r24
+    1a6a:	f0 e0       	ldi	r31, 0x00	; 0
+    1a6c:	ea 5a       	subi	r30, 0xAA	; 170
+    1a6e:	f3 4d       	sbci	r31, 0xD3	; 211
     1a70:	80 81       	ld	r24, Z
-    1a72:	8f 7d       	andi	r24, 0xDF	; 223
-    1a74:	80 83       	st	Z, r24
-    1a76:	e8 e2       	ldi	r30, 0x28	; 40
-    1a78:	f2 e2       	ldi	r31, 0x22	; 34
-    1a7a:	02 e0       	ldi	r16, 0x02	; 2
-    1a7c:	05 93       	las	Z, r16
-    1a7e:	10 92 2a 22 	sts	0x222A, r1	; 0x80222a <udd_sram+0x1a>
-    1a82:	10 92 2b 22 	sts	0x222B, r1	; 0x80222b <udd_sram+0x1b>
-    1a86:	00 e2       	ldi	r16, 0x20	; 32
-    1a88:	06 93       	lac	Z, r16
-    1a8a:	00 e4       	ldi	r16, 0x40	; 64
-    1a8c:	06 93       	lac	Z, r16
-    1a8e:	e0 e2       	ldi	r30, 0x20	; 32
-    1a90:	f2 e2       	ldi	r31, 0x22	; 34
-    1a92:	00 e2       	ldi	r16, 0x20	; 32
-    1a94:	06 93       	lac	Z, r16
-    1a96:	00 e4       	ldi	r16, 0x40	; 64
-    1a98:	06 93       	lac	Z, r16
-    1a9a:	ea e6       	ldi	r30, 0x6A	; 106
-    1a9c:	f4 e2       	ldi	r31, 0x24	; 36
-    1a9e:	14 86       	std	Z+12, r1	; 0x0c
-    1aa0:	15 86       	std	Z+13, r1	; 0x0d
-    1aa2:	16 86       	std	Z+14, r1	; 0x0e
-    1aa4:	17 86       	std	Z+15, r1	; 0x0f
-    1aa6:	12 86       	std	Z+10, r1	; 0x0a
-    1aa8:	13 86       	std	Z+11, r1	; 0x0b
-    1aaa:	10 92 0d 22 	sts	0x220D, r1	; 0x80220d <udd_ep_control_state>
-    1aae:	0f 91       	pop	r16
-    1ab0:	08 95       	ret
+    1a72:	8f 3f       	cpi	r24, 0xFF	; 255
+    1a74:	09 f4       	brne	.+2      	; 0x1a78 <sleepmgr_lock_mode+0x10>
+    1a76:	ff cf       	rjmp	.-2      	; 0x1a76 <sleepmgr_lock_mode+0xe>
+    1a78:	9f b7       	in	r25, 0x3f	; 63
+    1a7a:	f8 94       	cli
+    1a7c:	80 81       	ld	r24, Z
+    1a7e:	8f 5f       	subi	r24, 0xFF	; 255
+    1a80:	80 83       	st	Z, r24
+    1a82:	9f bf       	out	0x3f, r25	; 63
+    1a84:	08 95       	ret
 
-00001ab2 <udd_ctrl_stall_data>:
-    1ab2:	0f 93       	push	r16
-    1ab4:	85 e0       	ldi	r24, 0x05	; 5
-    1ab6:	80 93 0d 22 	sts	0x220D, r24	; 0x80220d <udd_ep_control_state>
-    1aba:	e9 e2       	ldi	r30, 0x29	; 41
-    1abc:	f2 e2       	ldi	r31, 0x22	; 34
-    1abe:	04 e0       	ldi	r16, 0x04	; 4
-    1ac0:	05 93       	las	Z, r16
-    1ac2:	e1 e2       	ldi	r30, 0x21	; 33
-    1ac4:	f2 e2       	ldi	r31, 0x22	; 34
-    1ac6:	04 e0       	ldi	r16, 0x04	; 4
-    1ac8:	05 93       	las	Z, r16
-    1aca:	0f 91       	pop	r16
-    1acc:	08 95       	ret
+00001a86 <sleepmgr_unlock_mode>:
+    1a86:	e8 2f       	mov	r30, r24
+    1a88:	f0 e0       	ldi	r31, 0x00	; 0
+    1a8a:	ea 5a       	subi	r30, 0xAA	; 170
+    1a8c:	f3 4d       	sbci	r31, 0xD3	; 211
+    1a8e:	80 81       	ld	r24, Z
+    1a90:	81 11       	cpse	r24, r1
+    1a92:	01 c0       	rjmp	.+2      	; 0x1a96 <sleepmgr_unlock_mode+0x10>
+    1a94:	ff cf       	rjmp	.-2      	; 0x1a94 <sleepmgr_unlock_mode+0xe>
+    1a96:	9f b7       	in	r25, 0x3f	; 63
+    1a98:	f8 94       	cli
+    1a9a:	80 81       	ld	r24, Z
+    1a9c:	81 50       	subi	r24, 0x01	; 1
+    1a9e:	80 83       	st	Z, r24
+    1aa0:	9f bf       	out	0x3f, r25	; 63
+    1aa2:	08 95       	ret
 
-00001ace <udd_ctrl_send_zlp_in>:
-    1ace:	0f 93       	push	r16
-    1ad0:	83 e0       	ldi	r24, 0x03	; 3
-    1ad2:	80 93 0d 22 	sts	0x220D, r24	; 0x80220d <udd_ep_control_state>
-    1ad6:	10 92 2a 22 	sts	0x222A, r1	; 0x80222a <udd_sram+0x1a>
-    1ada:	10 92 2b 22 	sts	0x222B, r1	; 0x80222b <udd_sram+0x1b>
-    1ade:	e8 e2       	ldi	r30, 0x28	; 40
-    1ae0:	f2 e2       	ldi	r31, 0x22	; 34
-    1ae2:	02 e0       	ldi	r16, 0x02	; 2
-    1ae4:	06 93       	lac	Z, r16
-    1ae6:	0f 91       	pop	r16
-    1ae8:	08 95       	ret
+00001aa4 <udd_sleep_mode>:
+    1aa4:	cf 93       	push	r28
+    1aa6:	c8 2f       	mov	r28, r24
+    1aa8:	80 91 64 22 	lds	r24, 0x2264	; 0x802264 <udd_b_idle>
+    1aac:	c1 11       	cpse	r28, r1
+    1aae:	05 c0       	rjmp	.+10     	; 0x1aba <udd_sleep_mode+0x16>
+    1ab0:	88 23       	and	r24, r24
+    1ab2:	39 f0       	breq	.+14     	; 0x1ac2 <udd_sleep_mode+0x1e>
+    1ab4:	81 e0       	ldi	r24, 0x01	; 1
+    1ab6:	e7 df       	rcall	.-50     	; 0x1a86 <sleepmgr_unlock_mode>
+    1ab8:	04 c0       	rjmp	.+8      	; 0x1ac2 <udd_sleep_mode+0x1e>
+    1aba:	81 11       	cpse	r24, r1
+    1abc:	02 c0       	rjmp	.+4      	; 0x1ac2 <udd_sleep_mode+0x1e>
+    1abe:	81 e0       	ldi	r24, 0x01	; 1
+    1ac0:	d3 df       	rcall	.-90     	; 0x1a68 <sleepmgr_lock_mode>
+    1ac2:	c0 93 64 22 	sts	0x2264, r28	; 0x802264 <udd_b_idle>
+    1ac6:	cf 91       	pop	r28
+    1ac8:	08 95       	ret
 
-00001aea <udd_ctrl_endofrequest>:
-    1aea:	e0 91 76 24 	lds	r30, 0x2476	; 0x802476 <udd_g_ctrlreq+0xc>
-    1aee:	f0 91 77 24 	lds	r31, 0x2477	; 0x802477 <udd_g_ctrlreq+0xd>
-    1af2:	30 97       	sbiw	r30, 0x00	; 0
-    1af4:	09 f0       	breq	.+2      	; 0x1af8 <udd_ctrl_endofrequest+0xe>
-    1af6:	09 94       	ijmp
-    1af8:	08 95       	ret
+00001aca <udd_ep_get_ctrl>:
+    1aca:	28 2f       	mov	r18, r24
+    1acc:	2f 70       	andi	r18, 0x0F	; 15
+    1ace:	08 2e       	mov	r0, r24
+    1ad0:	00 0c       	add	r0, r0
+    1ad2:	99 0b       	sbc	r25, r25
+    1ad4:	39 2f       	mov	r19, r25
+    1ad6:	33 1f       	adc	r19, r19
+    1ad8:	33 27       	eor	r19, r19
+    1ada:	33 1f       	adc	r19, r19
+    1adc:	83 2f       	mov	r24, r19
+    1ade:	90 e0       	ldi	r25, 0x00	; 0
+    1ae0:	82 0f       	add	r24, r18
+    1ae2:	91 1d       	adc	r25, r1
+    1ae4:	82 0f       	add	r24, r18
+    1ae6:	91 1d       	adc	r25, r1
+    1ae8:	23 e0       	ldi	r18, 0x03	; 3
+    1aea:	88 0f       	add	r24, r24
+    1aec:	99 1f       	adc	r25, r25
+    1aee:	2a 95       	dec	r18
+    1af0:	e1 f7       	brne	.-8      	; 0x1aea <udd_ep_get_ctrl+0x20>
+    1af2:	80 5e       	subi	r24, 0xE0	; 224
+    1af4:	9d 4d       	sbci	r25, 0xDD	; 221
+    1af6:	08 95       	ret
 
-00001afa <udd_ep_get_job>:
-    1afa:	28 2f       	mov	r18, r24
-    1afc:	2f 70       	andi	r18, 0x0F	; 15
-    1afe:	08 2e       	mov	r0, r24
-    1b00:	00 0c       	add	r0, r0
-    1b02:	99 0b       	sbc	r25, r25
-    1b04:	39 2f       	mov	r19, r25
-    1b06:	33 1f       	adc	r19, r19
-    1b08:	33 27       	eor	r19, r19
-    1b0a:	33 1f       	adc	r19, r19
-    1b0c:	83 2f       	mov	r24, r19
-    1b0e:	90 e0       	ldi	r25, 0x00	; 0
-    1b10:	82 0f       	add	r24, r18
-    1b12:	91 1d       	adc	r25, r1
-    1b14:	82 0f       	add	r24, r18
-    1b16:	91 1d       	adc	r25, r1
-    1b18:	02 97       	sbiw	r24, 0x02	; 2
-    1b1a:	49 e0       	ldi	r20, 0x09	; 9
-    1b1c:	48 9f       	mul	r20, r24
-    1b1e:	90 01       	movw	r18, r0
-    1b20:	49 9f       	mul	r20, r25
-    1b22:	30 0d       	add	r19, r0
-    1b24:	11 24       	eor	r1, r1
-    1b26:	c9 01       	movw	r24, r18
-    1b28:	8d 56       	subi	r24, 0x6D	; 109
-    1b2a:	9e 4d       	sbci	r25, 0xDE	; 222
-    1b2c:	08 95       	ret
+00001af8 <udd_ctrl_init>:
+    1af8:	0f 93       	push	r16
+    1afa:	e8 ec       	ldi	r30, 0xC8	; 200
+    1afc:	f4 e0       	ldi	r31, 0x04	; 4
+    1afe:	80 81       	ld	r24, Z
+    1b00:	8f 7d       	andi	r24, 0xDF	; 223
+    1b02:	80 83       	st	Z, r24
+    1b04:	80 81       	ld	r24, Z
+    1b06:	8f 7d       	andi	r24, 0xDF	; 223
+    1b08:	80 83       	st	Z, r24
+    1b0a:	e8 e2       	ldi	r30, 0x28	; 40
+    1b0c:	f2 e2       	ldi	r31, 0x22	; 34
+    1b0e:	02 e0       	ldi	r16, 0x02	; 2
+    1b10:	05 93       	las	Z, r16
+    1b12:	10 92 2a 22 	sts	0x222A, r1	; 0x80222a <udd_sram+0x1a>
+    1b16:	10 92 2b 22 	sts	0x222B, r1	; 0x80222b <udd_sram+0x1b>
+    1b1a:	00 e2       	ldi	r16, 0x20	; 32
+    1b1c:	06 93       	lac	Z, r16
+    1b1e:	00 e4       	ldi	r16, 0x40	; 64
+    1b20:	06 93       	lac	Z, r16
+    1b22:	e0 e2       	ldi	r30, 0x20	; 32
+    1b24:	f2 e2       	ldi	r31, 0x22	; 34
+    1b26:	00 e2       	ldi	r16, 0x20	; 32
+    1b28:	06 93       	lac	Z, r16
+    1b2a:	00 e4       	ldi	r16, 0x40	; 64
+    1b2c:	06 93       	lac	Z, r16
+    1b2e:	ea e6       	ldi	r30, 0x6A	; 106
+    1b30:	f4 e2       	ldi	r31, 0x24	; 36
+    1b32:	14 86       	std	Z+12, r1	; 0x0c
+    1b34:	15 86       	std	Z+13, r1	; 0x0d
+    1b36:	16 86       	std	Z+14, r1	; 0x0e
+    1b38:	17 86       	std	Z+15, r1	; 0x0f
+    1b3a:	12 86       	std	Z+10, r1	; 0x0a
+    1b3c:	13 86       	std	Z+11, r1	; 0x0b
+    1b3e:	10 92 0d 22 	sts	0x220D, r1	; 0x80220d <udd_ep_control_state>
+    1b42:	0f 91       	pop	r16
+    1b44:	08 95       	ret
 
-00001b2e <udd_ep_trans_complet>:
-    1b2e:	8f 92       	push	r8
-    1b30:	9f 92       	push	r9
-    1b32:	af 92       	push	r10
-    1b34:	bf 92       	push	r11
-    1b36:	df 92       	push	r13
-    1b38:	ef 92       	push	r14
-    1b3a:	ff 92       	push	r15
-    1b3c:	0f 93       	push	r16
-    1b3e:	1f 93       	push	r17
-    1b40:	cf 93       	push	r28
-    1b42:	df 93       	push	r29
-    1b44:	d8 2e       	mov	r13, r24
-    1b46:	d9 df       	rcall	.-78     	; 0x1afa <udd_ep_get_job>
-    1b48:	ec 01       	movw	r28, r24
-    1b4a:	8d 2d       	mov	r24, r13
-    1b4c:	74 df       	rcall	.-280    	; 0x1a36 <udd_ep_get_ctrl>
-    1b4e:	7c 01       	movw	r14, r24
-    1b50:	dc 01       	movw	r26, r24
-    1b52:	11 96       	adiw	r26, 0x01	; 1
-    1b54:	ec 91       	ld	r30, X
-    1b56:	e7 70       	andi	r30, 0x07	; 7
-    1b58:	e1 50       	subi	r30, 0x01	; 1
-    1b5a:	e7 30       	cpi	r30, 0x07	; 7
-    1b5c:	40 f4       	brcc	.+16     	; 0x1b6e <udd_ep_trans_complet+0x40>
-    1b5e:	f0 e0       	ldi	r31, 0x00	; 0
-    1b60:	ee 0f       	add	r30, r30
-    1b62:	ff 1f       	adc	r31, r31
-    1b64:	ee 54       	subi	r30, 0x4E	; 78
-    1b66:	ff 4d       	sbci	r31, 0xDF	; 223
-    1b68:	00 81       	ld	r16, Z
-    1b6a:	11 81       	ldd	r17, Z+1	; 0x01
-    1b6c:	02 c0       	rjmp	.+4      	; 0x1b72 <udd_ep_trans_complet+0x44>
-    1b6e:	08 e0       	ldi	r16, 0x08	; 8
-    1b70:	10 e0       	ldi	r17, 0x00	; 0
-    1b72:	ed 81       	ldd	r30, Y+5	; 0x05
-    1b74:	fe 81       	ldd	r31, Y+6	; 0x06
-    1b76:	2b 81       	ldd	r18, Y+3	; 0x03
-    1b78:	3c 81       	ldd	r19, Y+4	; 0x04
-    1b7a:	48 81       	ld	r20, Y
-    1b7c:	d7 01       	movw	r26, r14
-    1b7e:	d7 fe       	sbrs	r13, 7
-    1b80:	48 c0       	rjmp	.+144    	; 0x1c12 <udd_ep_trans_complet+0xe4>
-    1b82:	16 96       	adiw	r26, 0x06	; 6
-    1b84:	8d 91       	ld	r24, X+
-    1b86:	9c 91       	ld	r25, X
-    1b88:	17 97       	sbiw	r26, 0x07	; 7
-    1b8a:	8e 0f       	add	r24, r30
-    1b8c:	9f 1f       	adc	r25, r31
-    1b8e:	8d 83       	std	Y+5, r24	; 0x05
-    1b90:	9e 83       	std	Y+6, r25	; 0x06
-    1b92:	82 17       	cp	r24, r18
-    1b94:	93 07       	cpc	r25, r19
-    1b96:	61 f1       	breq	.+88     	; 0x1bf0 <udd_ep_trans_complet+0xc2>
-    1b98:	28 1b       	sub	r18, r24
-    1b9a:	39 0b       	sbc	r19, r25
-    1b9c:	21 15       	cp	r18, r1
-    1b9e:	b4 e0       	ldi	r27, 0x04	; 4
-    1ba0:	3b 07       	cpc	r19, r27
-    1ba2:	38 f0       	brcs	.+14     	; 0x1bb2 <udd_ep_trans_complet+0x84>
-    1ba4:	2f ef       	ldi	r18, 0xFF	; 255
-    1ba6:	33 e0       	ldi	r19, 0x03	; 3
-    1ba8:	c9 01       	movw	r24, r18
-    1baa:	b8 01       	movw	r22, r16
-    1bac:	14 d5       	rcall	.+2600   	; 0x25d6 <__udivmodhi4>
-    1bae:	28 1b       	sub	r18, r24
-    1bb0:	39 0b       	sbc	r19, r25
-    1bb2:	41 ff       	sbrs	r20, 1
-    1bb4:	0a c0       	rjmp	.+20     	; 0x1bca <udd_ep_trans_complet+0x9c>
-    1bb6:	c9 01       	movw	r24, r18
-    1bb8:	b8 01       	movw	r22, r16
-    1bba:	0d d5       	rcall	.+2586   	; 0x25d6 <__udivmodhi4>
-    1bbc:	ac 01       	movw	r20, r24
-    1bbe:	91 e0       	ldi	r25, 0x01	; 1
-    1bc0:	45 2b       	or	r20, r21
-    1bc2:	09 f0       	breq	.+2      	; 0x1bc6 <udd_ep_trans_complet+0x98>
-    1bc4:	90 e0       	ldi	r25, 0x00	; 0
-    1bc6:	89 2f       	mov	r24, r25
-    1bc8:	01 c0       	rjmp	.+2      	; 0x1bcc <udd_ep_trans_complet+0x9e>
-    1bca:	80 e0       	ldi	r24, 0x00	; 0
-    1bcc:	98 81       	ld	r25, Y
-    1bce:	80 fb       	bst	r24, 0
-    1bd0:	91 f9       	bld	r25, 1
-    1bd2:	98 83       	st	Y, r25
-    1bd4:	f7 01       	movw	r30, r14
-    1bd6:	16 82       	std	Z+6, r1	; 0x06
-    1bd8:	17 82       	std	Z+7, r1	; 0x07
-    1bda:	22 83       	std	Z+2, r18	; 0x02
-    1bdc:	33 83       	std	Z+3, r19	; 0x03
-    1bde:	29 81       	ldd	r18, Y+1	; 0x01
-    1be0:	3a 81       	ldd	r19, Y+2	; 0x02
-    1be2:	8d 81       	ldd	r24, Y+5	; 0x05
-    1be4:	9e 81       	ldd	r25, Y+6	; 0x06
-    1be6:	82 0f       	add	r24, r18
-    1be8:	93 1f       	adc	r25, r19
-    1bea:	84 83       	std	Z+4, r24	; 0x04
-    1bec:	95 83       	std	Z+5, r25	; 0x05
-    1bee:	0e c0       	rjmp	.+28     	; 0x1c0c <udd_ep_trans_complet+0xde>
-    1bf0:	41 ff       	sbrs	r20, 1
-    1bf2:	71 c0       	rjmp	.+226    	; 0x1cd6 <udd_ep_trans_complet+0x1a8>
-    1bf4:	4d 7f       	andi	r20, 0xFD	; 253
-    1bf6:	48 83       	st	Y, r20
-    1bf8:	d7 01       	movw	r26, r14
-    1bfa:	16 96       	adiw	r26, 0x06	; 6
-    1bfc:	1d 92       	st	X+, r1
-    1bfe:	1c 92       	st	X, r1
-    1c00:	17 97       	sbiw	r26, 0x07	; 7
-    1c02:	12 96       	adiw	r26, 0x02	; 2
-    1c04:	1d 92       	st	X+, r1
-    1c06:	1c 92       	st	X, r1
-    1c08:	13 97       	sbiw	r26, 0x03	; 3
-    1c0a:	f7 01       	movw	r30, r14
-    1c0c:	02 e0       	ldi	r16, 0x02	; 2
-    1c0e:	06 93       	lac	Z, r16
-    1c10:	7b c0       	rjmp	.+246    	; 0x1d08 <udd_ep_trans_complet+0x1da>
-    1c12:	12 96       	adiw	r26, 0x02	; 2
-    1c14:	ad 90       	ld	r10, X+
-    1c16:	bc 90       	ld	r11, X
-    1c18:	13 97       	sbiw	r26, 0x03	; 3
-    1c1a:	42 ff       	sbrs	r20, 2
-    1c1c:	10 c0       	rjmp	.+32     	; 0x1c3e <udd_ep_trans_complet+0x110>
-    1c1e:	89 80       	ldd	r8, Y+1	; 0x01
-    1c20:	9a 80       	ldd	r9, Y+2	; 0x02
-    1c22:	c9 01       	movw	r24, r18
-    1c24:	b8 01       	movw	r22, r16
-    1c26:	d7 d4       	rcall	.+2478   	; 0x25d6 <__udivmodhi4>
-    1c28:	b0 e4       	ldi	r27, 0x40	; 64
-    1c2a:	db 9e       	mul	r13, r27
-    1c2c:	b0 01       	movw	r22, r0
-    1c2e:	11 24       	eor	r1, r1
-    1c30:	6d 56       	subi	r22, 0x6D	; 109
-    1c32:	7f 4d       	sbci	r23, 0xDF	; 223
-    1c34:	ac 01       	movw	r20, r24
-    1c36:	c4 01       	movw	r24, r8
-    1c38:	8e 0f       	add	r24, r30
-    1c3a:	9f 1f       	adc	r25, r31
-    1c3c:	e6 d4       	rcall	.+2508   	; 0x260a <memcpy>
-    1c3e:	8d 81       	ldd	r24, Y+5	; 0x05
-    1c40:	9e 81       	ldd	r25, Y+6	; 0x06
-    1c42:	8a 0d       	add	r24, r10
-    1c44:	9b 1d       	adc	r25, r11
-    1c46:	8d 83       	std	Y+5, r24	; 0x05
-    1c48:	9e 83       	std	Y+6, r25	; 0x06
-    1c4a:	2b 81       	ldd	r18, Y+3	; 0x03
-    1c4c:	3c 81       	ldd	r19, Y+4	; 0x04
-    1c4e:	28 17       	cp	r18, r24
-    1c50:	39 07       	cpc	r19, r25
-    1c52:	10 f4       	brcc	.+4      	; 0x1c58 <udd_ep_trans_complet+0x12a>
-    1c54:	2d 83       	std	Y+5, r18	; 0x05
-    1c56:	3e 83       	std	Y+6, r19	; 0x06
-    1c58:	f7 01       	movw	r30, r14
-    1c5a:	86 81       	ldd	r24, Z+6	; 0x06
-    1c5c:	97 81       	ldd	r25, Z+7	; 0x07
-    1c5e:	a8 16       	cp	r10, r24
-    1c60:	b9 06       	cpc	r11, r25
-    1c62:	c9 f5       	brne	.+114    	; 0x1cd6 <udd_ep_trans_complet+0x1a8>
-    1c64:	8d 81       	ldd	r24, Y+5	; 0x05
-    1c66:	9e 81       	ldd	r25, Y+6	; 0x06
-    1c68:	82 17       	cp	r24, r18
-    1c6a:	93 07       	cpc	r25, r19
-    1c6c:	a1 f1       	breq	.+104    	; 0x1cd6 <udd_ep_trans_complet+0x1a8>
-    1c6e:	28 1b       	sub	r18, r24
-    1c70:	39 0b       	sbc	r19, r25
-    1c72:	21 15       	cp	r18, r1
-    1c74:	f4 e0       	ldi	r31, 0x04	; 4
-    1c76:	3f 07       	cpc	r19, r31
-    1c78:	10 f0       	brcs	.+4      	; 0x1c7e <udd_ep_trans_complet+0x150>
-    1c7a:	2f ef       	ldi	r18, 0xFF	; 255
-    1c7c:	33 e0       	ldi	r19, 0x03	; 3
-    1c7e:	c9 01       	movw	r24, r18
-    1c80:	b8 01       	movw	r22, r16
-    1c82:	a9 d4       	rcall	.+2386   	; 0x25d6 <__udivmodhi4>
-    1c84:	28 1b       	sub	r18, r24
-    1c86:	39 0b       	sbc	r19, r25
-    1c88:	d7 01       	movw	r26, r14
-    1c8a:	12 96       	adiw	r26, 0x02	; 2
-    1c8c:	1d 92       	st	X+, r1
-    1c8e:	1c 92       	st	X, r1
-    1c90:	13 97       	sbiw	r26, 0x03	; 3
-    1c92:	20 17       	cp	r18, r16
-    1c94:	31 07       	cpc	r19, r17
-    1c96:	78 f4       	brcc	.+30     	; 0x1cb6 <udd_ep_trans_complet+0x188>
-    1c98:	88 81       	ld	r24, Y
-    1c9a:	84 60       	ori	r24, 0x04	; 4
-    1c9c:	88 83       	st	Y, r24
-    1c9e:	b0 e4       	ldi	r27, 0x40	; 64
-    1ca0:	db 9e       	mul	r13, r27
-    1ca2:	c0 01       	movw	r24, r0
-    1ca4:	11 24       	eor	r1, r1
-    1ca6:	8d 56       	subi	r24, 0x6D	; 109
-    1ca8:	9f 4d       	sbci	r25, 0xDF	; 223
-    1caa:	f7 01       	movw	r30, r14
-    1cac:	84 83       	std	Z+4, r24	; 0x04
-    1cae:	95 83       	std	Z+5, r25	; 0x05
-    1cb0:	06 83       	std	Z+6, r16	; 0x06
-    1cb2:	17 83       	std	Z+7, r17	; 0x07
-    1cb4:	aa cf       	rjmp	.-172    	; 0x1c0a <udd_ep_trans_complet+0xdc>
-    1cb6:	49 81       	ldd	r20, Y+1	; 0x01
-    1cb8:	5a 81       	ldd	r21, Y+2	; 0x02
-    1cba:	8d 81       	ldd	r24, Y+5	; 0x05
-    1cbc:	9e 81       	ldd	r25, Y+6	; 0x06
-    1cbe:	84 0f       	add	r24, r20
-    1cc0:	95 1f       	adc	r25, r21
-    1cc2:	d7 01       	movw	r26, r14
-    1cc4:	14 96       	adiw	r26, 0x04	; 4
-    1cc6:	8d 93       	st	X+, r24
-    1cc8:	9c 93       	st	X, r25
-    1cca:	15 97       	sbiw	r26, 0x05	; 5
-    1ccc:	16 96       	adiw	r26, 0x06	; 6
-    1cce:	2d 93       	st	X+, r18
-    1cd0:	3c 93       	st	X, r19
-    1cd2:	17 97       	sbiw	r26, 0x07	; 7
-    1cd4:	9a cf       	rjmp	.-204    	; 0x1c0a <udd_ep_trans_complet+0xdc>
-    1cd6:	88 81       	ld	r24, Y
-    1cd8:	80 ff       	sbrs	r24, 0
-    1cda:	16 c0       	rjmp	.+44     	; 0x1d08 <udd_ep_trans_complet+0x1da>
-    1cdc:	8e 7f       	andi	r24, 0xFE	; 254
-    1cde:	88 83       	st	Y, r24
-    1ce0:	ef 81       	ldd	r30, Y+7	; 0x07
-    1ce2:	f8 85       	ldd	r31, Y+8	; 0x08
-    1ce4:	30 97       	sbiw	r30, 0x00	; 0
-    1ce6:	81 f0       	breq	.+32     	; 0x1d08 <udd_ep_trans_complet+0x1da>
-    1ce8:	6d 81       	ldd	r22, Y+5	; 0x05
-    1cea:	7e 81       	ldd	r23, Y+6	; 0x06
-    1cec:	4d 2d       	mov	r20, r13
-    1cee:	80 e0       	ldi	r24, 0x00	; 0
-    1cf0:	df 91       	pop	r29
-    1cf2:	cf 91       	pop	r28
-    1cf4:	1f 91       	pop	r17
-    1cf6:	0f 91       	pop	r16
-    1cf8:	ff 90       	pop	r15
-    1cfa:	ef 90       	pop	r14
-    1cfc:	df 90       	pop	r13
-    1cfe:	bf 90       	pop	r11
-    1d00:	af 90       	pop	r10
-    1d02:	9f 90       	pop	r9
-    1d04:	8f 90       	pop	r8
-    1d06:	09 94       	ijmp
-    1d08:	df 91       	pop	r29
-    1d0a:	cf 91       	pop	r28
-    1d0c:	1f 91       	pop	r17
-    1d0e:	0f 91       	pop	r16
-    1d10:	ff 90       	pop	r15
-    1d12:	ef 90       	pop	r14
-    1d14:	df 90       	pop	r13
-    1d16:	bf 90       	pop	r11
-    1d18:	af 90       	pop	r10
-    1d1a:	9f 90       	pop	r9
-    1d1c:	8f 90       	pop	r8
-    1d1e:	08 95       	ret
+00001b46 <udd_ctrl_stall_data>:
+    1b46:	0f 93       	push	r16
+    1b48:	85 e0       	ldi	r24, 0x05	; 5
+    1b4a:	80 93 0d 22 	sts	0x220D, r24	; 0x80220d <udd_ep_control_state>
+    1b4e:	e9 e2       	ldi	r30, 0x29	; 41
+    1b50:	f2 e2       	ldi	r31, 0x22	; 34
+    1b52:	04 e0       	ldi	r16, 0x04	; 4
+    1b54:	05 93       	las	Z, r16
+    1b56:	e1 e2       	ldi	r30, 0x21	; 33
+    1b58:	f2 e2       	ldi	r31, 0x22	; 34
+    1b5a:	04 e0       	ldi	r16, 0x04	; 4
+    1b5c:	05 93       	las	Z, r16
+    1b5e:	0f 91       	pop	r16
+    1b60:	08 95       	ret
 
-00001d20 <udd_ctrl_in_sent>:
-    1d20:	0f 93       	push	r16
-    1d22:	cf 93       	push	r28
-    1d24:	df 93       	push	r29
-    1d26:	80 91 0d 22 	lds	r24, 0x220D	; 0x80220d <udd_ep_control_state>
-    1d2a:	83 30       	cpi	r24, 0x03	; 3
-    1d2c:	29 f4       	brne	.+10     	; 0x1d38 <udd_ctrl_in_sent+0x18>
-    1d2e:	dd de       	rcall	.-582    	; 0x1aea <udd_ctrl_endofrequest>
-    1d30:	df 91       	pop	r29
-    1d32:	cf 91       	pop	r28
-    1d34:	0f 91       	pop	r16
-    1d36:	96 ce       	rjmp	.-724    	; 0x1a64 <udd_ctrl_init>
-    1d38:	20 91 09 22 	lds	r18, 0x2209	; 0x802209 <udd_ctrl_payload_nb_trans>
-    1d3c:	30 91 0a 22 	lds	r19, 0x220A	; 0x80220a <udd_ctrl_payload_nb_trans+0x1>
-    1d40:	c0 91 74 24 	lds	r28, 0x2474	; 0x802474 <udd_g_ctrlreq+0xa>
-    1d44:	d0 91 75 24 	lds	r29, 0x2475	; 0x802475 <udd_g_ctrlreq+0xb>
-    1d48:	c2 1b       	sub	r28, r18
-    1d4a:	d3 0b       	sbc	r29, r19
-    1d4c:	61 f5       	brne	.+88     	; 0x1da6 <udd_ctrl_in_sent+0x86>
-    1d4e:	80 91 0b 22 	lds	r24, 0x220B	; 0x80220b <udd_ctrl_prev_payload_nb_trans>
-    1d52:	90 91 0c 22 	lds	r25, 0x220C	; 0x80220c <udd_ctrl_prev_payload_nb_trans+0x1>
-    1d56:	82 0f       	add	r24, r18
-    1d58:	93 1f       	adc	r25, r19
-    1d5a:	80 93 0b 22 	sts	0x220B, r24	; 0x80220b <udd_ctrl_prev_payload_nb_trans>
-    1d5e:	90 93 0c 22 	sts	0x220C, r25	; 0x80220c <udd_ctrl_prev_payload_nb_trans+0x1>
-    1d62:	20 91 70 24 	lds	r18, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
-    1d66:	30 91 71 24 	lds	r19, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
-    1d6a:	28 17       	cp	r18, r24
-    1d6c:	39 07       	cpc	r19, r25
-    1d6e:	21 f0       	breq	.+8      	; 0x1d78 <udd_ctrl_in_sent+0x58>
-    1d70:	80 91 d2 20 	lds	r24, 0x20D2	; 0x8020d2 <b_shortpacket.5272>
-    1d74:	88 23       	and	r24, r24
-    1d76:	31 f0       	breq	.+12     	; 0x1d84 <udd_ctrl_in_sent+0x64>
-    1d78:	84 e0       	ldi	r24, 0x04	; 4
-    1d7a:	80 93 0d 22 	sts	0x220D, r24	; 0x80220d <udd_ep_control_state>
-    1d7e:	e0 e2       	ldi	r30, 0x20	; 32
-    1d80:	f2 e2       	ldi	r31, 0x22	; 34
-    1d82:	36 c0       	rjmp	.+108    	; 0x1df0 <udd_ctrl_in_sent+0xd0>
-    1d84:	e0 91 78 24 	lds	r30, 0x2478	; 0x802478 <udd_g_ctrlreq+0xe>
-    1d88:	f0 91 79 24 	lds	r31, 0x2479	; 0x802479 <udd_g_ctrlreq+0xf>
-    1d8c:	30 97       	sbiw	r30, 0x00	; 0
-    1d8e:	99 f0       	breq	.+38     	; 0x1db6 <udd_ctrl_in_sent+0x96>
-    1d90:	09 95       	icall
-    1d92:	88 23       	and	r24, r24
-    1d94:	81 f0       	breq	.+32     	; 0x1db6 <udd_ctrl_in_sent+0x96>
-    1d96:	10 92 09 22 	sts	0x2209, r1	; 0x802209 <udd_ctrl_payload_nb_trans>
-    1d9a:	10 92 0a 22 	sts	0x220A, r1	; 0x80220a <udd_ctrl_payload_nb_trans+0x1>
-    1d9e:	c0 91 74 24 	lds	r28, 0x2474	; 0x802474 <udd_g_ctrlreq+0xa>
-    1da2:	d0 91 75 24 	lds	r29, 0x2475	; 0x802475 <udd_g_ctrlreq+0xb>
-    1da6:	c0 34       	cpi	r28, 0x40	; 64
-    1da8:	d1 05       	cpc	r29, r1
-    1daa:	28 f0       	brcs	.+10     	; 0x1db6 <udd_ctrl_in_sent+0x96>
-    1dac:	10 92 d2 20 	sts	0x20D2, r1	; 0x8020d2 <b_shortpacket.5272>
-    1db0:	c0 e4       	ldi	r28, 0x40	; 64
-    1db2:	d0 e0       	ldi	r29, 0x00	; 0
-    1db4:	03 c0       	rjmp	.+6      	; 0x1dbc <udd_ctrl_in_sent+0x9c>
-    1db6:	81 e0       	ldi	r24, 0x01	; 1
-    1db8:	80 93 d2 20 	sts	0x20D2, r24	; 0x8020d2 <b_shortpacket.5272>
-    1dbc:	c0 93 2a 22 	sts	0x222A, r28	; 0x80222a <udd_sram+0x1a>
-    1dc0:	d0 93 2b 22 	sts	0x222B, r29	; 0x80222b <udd_sram+0x1b>
-    1dc4:	80 91 09 22 	lds	r24, 0x2209	; 0x802209 <udd_ctrl_payload_nb_trans>
-    1dc8:	90 91 0a 22 	lds	r25, 0x220A	; 0x80220a <udd_ctrl_payload_nb_trans+0x1>
-    1dcc:	20 91 72 24 	lds	r18, 0x2472	; 0x802472 <udd_g_ctrlreq+0x8>
-    1dd0:	30 91 73 24 	lds	r19, 0x2473	; 0x802473 <udd_g_ctrlreq+0x9>
-    1dd4:	28 0f       	add	r18, r24
-    1dd6:	39 1f       	adc	r19, r25
-    1dd8:	20 93 2c 22 	sts	0x222C, r18	; 0x80222c <udd_sram+0x1c>
-    1ddc:	30 93 2d 22 	sts	0x222D, r19	; 0x80222d <udd_sram+0x1d>
-    1de0:	c8 0f       	add	r28, r24
-    1de2:	d9 1f       	adc	r29, r25
-    1de4:	c0 93 09 22 	sts	0x2209, r28	; 0x802209 <udd_ctrl_payload_nb_trans>
-    1de8:	d0 93 0a 22 	sts	0x220A, r29	; 0x80220a <udd_ctrl_payload_nb_trans+0x1>
-    1dec:	e8 e2       	ldi	r30, 0x28	; 40
-    1dee:	f2 e2       	ldi	r31, 0x22	; 34
-    1df0:	02 e0       	ldi	r16, 0x02	; 2
-    1df2:	06 93       	lac	Z, r16
-    1df4:	df 91       	pop	r29
-    1df6:	cf 91       	pop	r28
-    1df8:	0f 91       	pop	r16
-    1dfa:	08 95       	ret
+00001b62 <udd_ctrl_send_zlp_in>:
+    1b62:	0f 93       	push	r16
+    1b64:	83 e0       	ldi	r24, 0x03	; 3
+    1b66:	80 93 0d 22 	sts	0x220D, r24	; 0x80220d <udd_ep_control_state>
+    1b6a:	10 92 2a 22 	sts	0x222A, r1	; 0x80222a <udd_sram+0x1a>
+    1b6e:	10 92 2b 22 	sts	0x222B, r1	; 0x80222b <udd_sram+0x1b>
+    1b72:	e8 e2       	ldi	r30, 0x28	; 40
+    1b74:	f2 e2       	ldi	r31, 0x22	; 34
+    1b76:	02 e0       	ldi	r16, 0x02	; 2
+    1b78:	06 93       	lac	Z, r16
+    1b7a:	0f 91       	pop	r16
+    1b7c:	08 95       	ret
 
-00001dfc <udd_ctrl_interrupt_tc_setup>:
-    1dfc:	0f 93       	push	r16
-    1dfe:	cf 93       	push	r28
-    1e00:	df 93       	push	r29
-    1e02:	1f 92       	push	r1
-    1e04:	cd b7       	in	r28, 0x3d	; 61
-    1e06:	de b7       	in	r29, 0x3e	; 62
-    1e08:	80 91 cc 04 	lds	r24, 0x04CC	; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc>
-    1e0c:	80 ff       	sbrs	r24, 0
-    1e0e:	65 c0       	rjmp	.+202    	; 0x1eda <udd_ctrl_interrupt_tc_setup+0xde>
-    1e10:	21 e0       	ldi	r18, 0x01	; 1
-    1e12:	20 93 cc 04 	sts	0x04CC, r18	; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc>
-    1e16:	80 e2       	ldi	r24, 0x20	; 32
-    1e18:	92 e2       	ldi	r25, 0x22	; 34
-    1e1a:	fc 01       	movw	r30, r24
-    1e1c:	00 e8       	ldi	r16, 0x80	; 128
-    1e1e:	06 93       	lac	Z, r16
-    1e20:	e8 e2       	ldi	r30, 0x28	; 40
-    1e22:	f2 e2       	ldi	r31, 0x22	; 34
-    1e24:	00 e8       	ldi	r16, 0x80	; 128
-    1e26:	06 93       	lac	Z, r16
-    1e28:	20 93 ca 04 	sts	0x04CA, r18	; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca>
-    1e2c:	fc 01       	movw	r30, r24
-    1e2e:	00 e1       	ldi	r16, 0x10	; 16
-    1e30:	06 93       	lac	Z, r16
-    1e32:	80 91 0d 22 	lds	r24, 0x220D	; 0x80220d <udd_ep_control_state>
-    1e36:	88 23       	and	r24, r24
-    1e38:	29 f0       	breq	.+10     	; 0x1e44 <udd_ctrl_interrupt_tc_setup+0x48>
-    1e3a:	83 50       	subi	r24, 0x03	; 3
-    1e3c:	82 30       	cpi	r24, 0x02	; 2
-    1e3e:	08 f4       	brcc	.+2      	; 0x1e42 <udd_ctrl_interrupt_tc_setup+0x46>
-    1e40:	54 de       	rcall	.-856    	; 0x1aea <udd_ctrl_endofrequest>
-    1e42:	10 de       	rcall	.-992    	; 0x1a64 <udd_ctrl_init>
-    1e44:	80 91 22 22 	lds	r24, 0x2222	; 0x802222 <udd_sram+0x12>
-    1e48:	90 91 23 22 	lds	r25, 0x2223	; 0x802223 <udd_sram+0x13>
-    1e4c:	08 97       	sbiw	r24, 0x08	; 8
-    1e4e:	09 f0       	breq	.+2      	; 0x1e52 <udd_ctrl_interrupt_tc_setup+0x56>
-    1e50:	46 c0       	rjmp	.+140    	; 0x1ede <udd_ctrl_interrupt_tc_setup+0xe2>
-    1e52:	88 e0       	ldi	r24, 0x08	; 8
-    1e54:	e9 ec       	ldi	r30, 0xC9	; 201
-    1e56:	f1 e2       	ldi	r31, 0x21	; 33
-    1e58:	aa e6       	ldi	r26, 0x6A	; 106
-    1e5a:	b4 e2       	ldi	r27, 0x24	; 36
-    1e5c:	01 90       	ld	r0, Z+
-    1e5e:	0d 92       	st	X+, r0
-    1e60:	8a 95       	dec	r24
-    1e62:	e1 f7       	brne	.-8      	; 0x1e5c <udd_ctrl_interrupt_tc_setup+0x60>
-    1e64:	80 91 c8 04 	lds	r24, 0x04C8	; 0x8004c8 <__TEXT_REGION_LENGTH__+0x7004c8>
-    1e68:	80 62       	ori	r24, 0x20	; 32
-    1e6a:	80 93 c8 04 	sts	0x04C8, r24	; 0x8004c8 <__TEXT_REGION_LENGTH__+0x7004c8>
-    1e6e:	80 91 c8 04 	lds	r24, 0x04C8	; 0x8004c8 <__TEXT_REGION_LENGTH__+0x7004c8>
-    1e72:	80 62       	ori	r24, 0x20	; 32
-    1e74:	80 93 c8 04 	sts	0x04C8, r24	; 0x8004c8 <__TEXT_REGION_LENGTH__+0x7004c8>
-    1e78:	5a da       	rcall	.-2892   	; 0x132e <udc_process_setup>
-    1e7a:	81 11       	cpse	r24, r1
-    1e7c:	02 c0       	rjmp	.+4      	; 0x1e82 <udd_ctrl_interrupt_tc_setup+0x86>
-    1e7e:	19 de       	rcall	.-974    	; 0x1ab2 <udd_ctrl_stall_data>
-    1e80:	2e c0       	rjmp	.+92     	; 0x1ede <udd_ctrl_interrupt_tc_setup+0xe2>
-    1e82:	90 91 6a 24 	lds	r25, 0x246A	; 0x80246a <udd_g_ctrlreq>
-    1e86:	97 ff       	sbrs	r25, 7
-    1e88:	0e c0       	rjmp	.+28     	; 0x1ea6 <udd_ctrl_interrupt_tc_setup+0xaa>
-    1e8a:	10 92 0b 22 	sts	0x220B, r1	; 0x80220b <udd_ctrl_prev_payload_nb_trans>
-    1e8e:	10 92 0c 22 	sts	0x220C, r1	; 0x80220c <udd_ctrl_prev_payload_nb_trans+0x1>
-    1e92:	10 92 09 22 	sts	0x2209, r1	; 0x802209 <udd_ctrl_payload_nb_trans>
-    1e96:	10 92 0a 22 	sts	0x220A, r1	; 0x80220a <udd_ctrl_payload_nb_trans+0x1>
-    1e9a:	92 e0       	ldi	r25, 0x02	; 2
-    1e9c:	90 93 0d 22 	sts	0x220D, r25	; 0x80220d <udd_ep_control_state>
-    1ea0:	89 83       	std	Y+1, r24	; 0x01
-    1ea2:	3e df       	rcall	.-388    	; 0x1d20 <udd_ctrl_in_sent>
-    1ea4:	08 c0       	rjmp	.+16     	; 0x1eb6 <udd_ctrl_interrupt_tc_setup+0xba>
-    1ea6:	20 91 70 24 	lds	r18, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
-    1eaa:	30 91 71 24 	lds	r19, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
-    1eae:	23 2b       	or	r18, r19
-    1eb0:	21 f4       	brne	.+8      	; 0x1eba <udd_ctrl_interrupt_tc_setup+0xbe>
-    1eb2:	89 83       	std	Y+1, r24	; 0x01
-    1eb4:	0c de       	rcall	.-1000   	; 0x1ace <udd_ctrl_send_zlp_in>
-    1eb6:	89 81       	ldd	r24, Y+1	; 0x01
-    1eb8:	13 c0       	rjmp	.+38     	; 0x1ee0 <udd_ctrl_interrupt_tc_setup+0xe4>
-    1eba:	10 92 0b 22 	sts	0x220B, r1	; 0x80220b <udd_ctrl_prev_payload_nb_trans>
-    1ebe:	10 92 0c 22 	sts	0x220C, r1	; 0x80220c <udd_ctrl_prev_payload_nb_trans+0x1>
-    1ec2:	10 92 09 22 	sts	0x2209, r1	; 0x802209 <udd_ctrl_payload_nb_trans>
-    1ec6:	10 92 0a 22 	sts	0x220A, r1	; 0x80220a <udd_ctrl_payload_nb_trans+0x1>
-    1eca:	91 e0       	ldi	r25, 0x01	; 1
-    1ecc:	90 93 0d 22 	sts	0x220D, r25	; 0x80220d <udd_ep_control_state>
-    1ed0:	e0 e2       	ldi	r30, 0x20	; 32
-    1ed2:	f2 e2       	ldi	r31, 0x22	; 34
-    1ed4:	02 e0       	ldi	r16, 0x02	; 2
-    1ed6:	06 93       	lac	Z, r16
-    1ed8:	03 c0       	rjmp	.+6      	; 0x1ee0 <udd_ctrl_interrupt_tc_setup+0xe4>
-    1eda:	80 e0       	ldi	r24, 0x00	; 0
-    1edc:	01 c0       	rjmp	.+2      	; 0x1ee0 <udd_ctrl_interrupt_tc_setup+0xe4>
-    1ede:	81 e0       	ldi	r24, 0x01	; 1
-    1ee0:	0f 90       	pop	r0
-    1ee2:	df 91       	pop	r29
-    1ee4:	cf 91       	pop	r28
-    1ee6:	0f 91       	pop	r16
-    1ee8:	08 95       	ret
+00001b7e <udd_ctrl_endofrequest>:
+    1b7e:	e0 91 76 24 	lds	r30, 0x2476	; 0x802476 <udd_g_ctrlreq+0xc>
+    1b82:	f0 91 77 24 	lds	r31, 0x2477	; 0x802477 <udd_g_ctrlreq+0xd>
+    1b86:	30 97       	sbiw	r30, 0x00	; 0
+    1b88:	09 f0       	breq	.+2      	; 0x1b8c <udd_ctrl_endofrequest+0xe>
+    1b8a:	09 94       	ijmp
+    1b8c:	08 95       	ret
 
-00001eea <udd_attach>:
-    1eea:	cf 93       	push	r28
-    1eec:	cf b7       	in	r28, 0x3f	; 63
-    1eee:	f8 94       	cli
-    1ef0:	81 e0       	ldi	r24, 0x01	; 1
-    1ef2:	8e dd       	rcall	.-1252   	; 0x1a10 <udd_sleep_mode>
-    1ef4:	ea ec       	ldi	r30, 0xCA	; 202
-    1ef6:	f4 e0       	ldi	r31, 0x04	; 4
-    1ef8:	80 e4       	ldi	r24, 0x40	; 64
-    1efa:	80 83       	st	Z, r24
-    1efc:	80 e2       	ldi	r24, 0x20	; 32
-    1efe:	80 83       	st	Z, r24
-    1f00:	e1 ec       	ldi	r30, 0xC1	; 193
-    1f02:	f4 e0       	ldi	r31, 0x04	; 4
-    1f04:	80 81       	ld	r24, Z
-    1f06:	81 60       	ori	r24, 0x01	; 1
-    1f08:	80 83       	st	Z, r24
-    1f0a:	a9 ec       	ldi	r26, 0xC9	; 201
-    1f0c:	b4 e0       	ldi	r27, 0x04	; 4
-    1f0e:	8c 91       	ld	r24, X
-    1f10:	82 60       	ori	r24, 0x02	; 2
-    1f12:	8c 93       	st	X, r24
-    1f14:	e8 ec       	ldi	r30, 0xC8	; 200
-    1f16:	f4 e0       	ldi	r31, 0x04	; 4
-    1f18:	80 81       	ld	r24, Z
-    1f1a:	80 64       	ori	r24, 0x40	; 64
-    1f1c:	80 83       	st	Z, r24
-    1f1e:	8c 91       	ld	r24, X
-    1f20:	81 60       	ori	r24, 0x01	; 1
-    1f22:	8c 93       	st	X, r24
-    1f24:	80 81       	ld	r24, Z
-    1f26:	80 68       	ori	r24, 0x80	; 128
-    1f28:	80 83       	st	Z, r24
-    1f2a:	cf bf       	out	0x3f, r28	; 63
-    1f2c:	cf 91       	pop	r28
-    1f2e:	08 95       	ret
+00001b8e <udd_ep_get_job>:
+    1b8e:	28 2f       	mov	r18, r24
+    1b90:	2f 70       	andi	r18, 0x0F	; 15
+    1b92:	08 2e       	mov	r0, r24
+    1b94:	00 0c       	add	r0, r0
+    1b96:	99 0b       	sbc	r25, r25
+    1b98:	39 2f       	mov	r19, r25
+    1b9a:	33 1f       	adc	r19, r19
+    1b9c:	33 27       	eor	r19, r19
+    1b9e:	33 1f       	adc	r19, r19
+    1ba0:	83 2f       	mov	r24, r19
+    1ba2:	90 e0       	ldi	r25, 0x00	; 0
+    1ba4:	82 0f       	add	r24, r18
+    1ba6:	91 1d       	adc	r25, r1
+    1ba8:	82 0f       	add	r24, r18
+    1baa:	91 1d       	adc	r25, r1
+    1bac:	02 97       	sbiw	r24, 0x02	; 2
+    1bae:	49 e0       	ldi	r20, 0x09	; 9
+    1bb0:	48 9f       	mul	r20, r24
+    1bb2:	90 01       	movw	r18, r0
+    1bb4:	49 9f       	mul	r20, r25
+    1bb6:	30 0d       	add	r19, r0
+    1bb8:	11 24       	eor	r1, r1
+    1bba:	c9 01       	movw	r24, r18
+    1bbc:	8d 56       	subi	r24, 0x6D	; 109
+    1bbe:	9e 4d       	sbci	r25, 0xDE	; 222
+    1bc0:	08 95       	ret
 
-00001f30 <udd_enable>:
-    1f30:	cf 93       	push	r28
-    1f32:	10 92 60 00 	sts	0x0060, r1	; 0x800060 <__TEXT_REGION_LENGTH__+0x700060>
-    1f36:	80 e3       	ldi	r24, 0x30	; 48
-    1f38:	76 d8       	rcall	.-3860   	; 0x1026 <sysclk_enable_usb>
-    1f3a:	80 91 c0 04 	lds	r24, 0x04C0	; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0>
-    1f3e:	80 64       	ori	r24, 0x40	; 64
-    1f40:	80 93 c0 04 	sts	0x04C0, r24	; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0>
-    1f44:	81 e0       	ldi	r24, 0x01	; 1
-    1f46:	80 93 60 00 	sts	0x0060, r24	; 0x800060 <__TEXT_REGION_LENGTH__+0x700060>
-    1f4a:	cf b7       	in	r28, 0x3f	; 63
-    1f4c:	f8 94       	cli
-    1f4e:	80 e0       	ldi	r24, 0x00	; 0
-    1f50:	90 e0       	ldi	r25, 0x00	; 0
-    1f52:	fc 01       	movw	r30, r24
-    1f54:	23 e0       	ldi	r18, 0x03	; 3
-    1f56:	ee 0f       	add	r30, r30
-    1f58:	ff 1f       	adc	r31, r31
-    1f5a:	2a 95       	dec	r18
-    1f5c:	e1 f7       	brne	.-8      	; 0x1f56 <udd_enable+0x26>
-    1f5e:	e0 5f       	subi	r30, 0xF0	; 240
-    1f60:	fd 4d       	sbci	r31, 0xDD	; 221
-    1f62:	11 8a       	std	Z+17, r1	; 0x11
-    1f64:	01 96       	adiw	r24, 0x01	; 1
-    1f66:	88 30       	cpi	r24, 0x08	; 8
-    1f68:	91 05       	cpc	r25, r1
-    1f6a:	99 f7       	brne	.-26     	; 0x1f52 <udd_enable+0x22>
-    1f6c:	80 91 93 21 	lds	r24, 0x2193	; 0x802193 <udd_ep_job>
-    1f70:	8e 7f       	andi	r24, 0xFE	; 254
-    1f72:	80 93 93 21 	sts	0x2193, r24	; 0x802193 <udd_ep_job>
-    1f76:	80 91 9c 21 	lds	r24, 0x219C	; 0x80219c <udd_ep_job+0x9>
-    1f7a:	8e 7f       	andi	r24, 0xFE	; 254
-    1f7c:	80 93 9c 21 	sts	0x219C, r24	; 0x80219c <udd_ep_job+0x9>
-    1f80:	80 91 a5 21 	lds	r24, 0x21A5	; 0x8021a5 <udd_ep_job+0x12>
-    1f84:	8e 7f       	andi	r24, 0xFE	; 254
-    1f86:	80 93 a5 21 	sts	0x21A5, r24	; 0x8021a5 <udd_ep_job+0x12>
-    1f8a:	80 91 ae 21 	lds	r24, 0x21AE	; 0x8021ae <udd_ep_job+0x1b>
-    1f8e:	8e 7f       	andi	r24, 0xFE	; 254
-    1f90:	80 93 ae 21 	sts	0x21AE, r24	; 0x8021ae <udd_ep_job+0x1b>
-    1f94:	80 91 b7 21 	lds	r24, 0x21B7	; 0x8021b7 <udd_ep_job+0x24>
-    1f98:	8e 7f       	andi	r24, 0xFE	; 254
-    1f9a:	80 93 b7 21 	sts	0x21B7, r24	; 0x8021b7 <udd_ep_job+0x24>
-    1f9e:	80 91 c0 21 	lds	r24, 0x21C0	; 0x8021c0 <udd_ep_job+0x2d>
-    1fa2:	8e 7f       	andi	r24, 0xFE	; 254
-    1fa4:	80 93 c0 21 	sts	0x21C0, r24	; 0x8021c0 <udd_ep_job+0x2d>
-    1fa8:	6a e1       	ldi	r22, 0x1A	; 26
-    1faa:	70 e0       	ldi	r23, 0x00	; 0
-    1fac:	82 e0       	ldi	r24, 0x02	; 2
-    1fae:	08 dd       	rcall	.-1520   	; 0x19c0 <nvm_read_byte>
-    1fb0:	8f 3f       	cpi	r24, 0xFF	; 255
-    1fb2:	09 f4       	brne	.+2      	; 0x1fb6 <udd_enable+0x86>
-    1fb4:	8f e1       	ldi	r24, 0x1F	; 31
-    1fb6:	80 93 fa 04 	sts	0x04FA, r24	; 0x8004fa <__TEXT_REGION_LENGTH__+0x7004fa>
-    1fba:	6b e1       	ldi	r22, 0x1B	; 27
-    1fbc:	70 e0       	ldi	r23, 0x00	; 0
-    1fbe:	82 e0       	ldi	r24, 0x02	; 2
-    1fc0:	ff dc       	rcall	.-1538   	; 0x19c0 <nvm_read_byte>
-    1fc2:	8f 3f       	cpi	r24, 0xFF	; 255
-    1fc4:	09 f4       	brne	.+2      	; 0x1fc8 <udd_enable+0x98>
-    1fc6:	8f e1       	ldi	r24, 0x1F	; 31
-    1fc8:	80 93 fb 04 	sts	0x04FB, r24	; 0x8004fb <__TEXT_REGION_LENGTH__+0x7004fb>
-    1fcc:	80 91 c0 04 	lds	r24, 0x04C0	; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0>
-    1fd0:	83 60       	ori	r24, 0x03	; 3
-    1fd2:	80 93 c0 04 	sts	0x04C0, r24	; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0>
-    1fd6:	80 91 c0 04 	lds	r24, 0x04C0	; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0>
-    1fda:	80 68       	ori	r24, 0x80	; 128
-    1fdc:	80 93 c0 04 	sts	0x04C0, r24	; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0>
-    1fe0:	80 91 c0 04 	lds	r24, 0x04C0	; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0>
-    1fe4:	80 61       	ori	r24, 0x10	; 16
-    1fe6:	80 93 c0 04 	sts	0x04C0, r24	; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0>
-    1fea:	80 e2       	ldi	r24, 0x20	; 32
-    1fec:	92 e2       	ldi	r25, 0x22	; 34
-    1fee:	80 93 c6 04 	sts	0x04C6, r24	; 0x8004c6 <__TEXT_REGION_LENGTH__+0x7004c6>
-    1ff2:	90 93 c7 04 	sts	0x04C7, r25	; 0x8004c7 <__TEXT_REGION_LENGTH__+0x7004c7>
-    1ff6:	80 91 c0 04 	lds	r24, 0x04C0	; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0>
-    1ffa:	80 62       	ori	r24, 0x20	; 32
-    1ffc:	80 93 c0 04 	sts	0x04C0, r24	; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0>
-    2000:	8f ef       	ldi	r24, 0xFF	; 255
-    2002:	80 93 c5 04 	sts	0x04C5, r24	; 0x8004c5 <__TEXT_REGION_LENGTH__+0x7004c5>
-    2006:	80 91 c8 04 	lds	r24, 0x04C8	; 0x8004c8 <__TEXT_REGION_LENGTH__+0x7004c8>
-    200a:	82 60       	ori	r24, 0x02	; 2
-    200c:	80 93 c8 04 	sts	0x04C8, r24	; 0x8004c8 <__TEXT_REGION_LENGTH__+0x7004c8>
-    2010:	10 92 64 22 	sts	0x2264, r1	; 0x802264 <udd_b_idle>
-    2014:	85 e0       	ldi	r24, 0x05	; 5
-    2016:	de dc       	rcall	.-1604   	; 0x19d4 <sleepmgr_lock_mode>
-    2018:	68 df       	rcall	.-304    	; 0x1eea <udd_attach>
-    201a:	cf bf       	out	0x3f, r28	; 63
-    201c:	cf 91       	pop	r28
-    201e:	08 95       	ret
+00001bc2 <udd_ep_trans_complet>:
+    1bc2:	8f 92       	push	r8
+    1bc4:	9f 92       	push	r9
+    1bc6:	af 92       	push	r10
+    1bc8:	bf 92       	push	r11
+    1bca:	df 92       	push	r13
+    1bcc:	ef 92       	push	r14
+    1bce:	ff 92       	push	r15
+    1bd0:	0f 93       	push	r16
+    1bd2:	1f 93       	push	r17
+    1bd4:	cf 93       	push	r28
+    1bd6:	df 93       	push	r29
+    1bd8:	d8 2e       	mov	r13, r24
+    1bda:	d9 df       	rcall	.-78     	; 0x1b8e <udd_ep_get_job>
+    1bdc:	ec 01       	movw	r28, r24
+    1bde:	8d 2d       	mov	r24, r13
+    1be0:	74 df       	rcall	.-280    	; 0x1aca <udd_ep_get_ctrl>
+    1be2:	7c 01       	movw	r14, r24
+    1be4:	dc 01       	movw	r26, r24
+    1be6:	11 96       	adiw	r26, 0x01	; 1
+    1be8:	ec 91       	ld	r30, X
+    1bea:	e7 70       	andi	r30, 0x07	; 7
+    1bec:	e1 50       	subi	r30, 0x01	; 1
+    1bee:	e7 30       	cpi	r30, 0x07	; 7
+    1bf0:	40 f4       	brcc	.+16     	; 0x1c02 <udd_ep_trans_complet+0x40>
+    1bf2:	f0 e0       	ldi	r31, 0x00	; 0
+    1bf4:	ee 0f       	add	r30, r30
+    1bf6:	ff 1f       	adc	r31, r31
+    1bf8:	ee 54       	subi	r30, 0x4E	; 78
+    1bfa:	ff 4d       	sbci	r31, 0xDF	; 223
+    1bfc:	00 81       	ld	r16, Z
+    1bfe:	11 81       	ldd	r17, Z+1	; 0x01
+    1c00:	02 c0       	rjmp	.+4      	; 0x1c06 <udd_ep_trans_complet+0x44>
+    1c02:	08 e0       	ldi	r16, 0x08	; 8
+    1c04:	10 e0       	ldi	r17, 0x00	; 0
+    1c06:	ed 81       	ldd	r30, Y+5	; 0x05
+    1c08:	fe 81       	ldd	r31, Y+6	; 0x06
+    1c0a:	2b 81       	ldd	r18, Y+3	; 0x03
+    1c0c:	3c 81       	ldd	r19, Y+4	; 0x04
+    1c0e:	48 81       	ld	r20, Y
+    1c10:	d7 01       	movw	r26, r14
+    1c12:	d7 fe       	sbrs	r13, 7
+    1c14:	48 c0       	rjmp	.+144    	; 0x1ca6 <udd_ep_trans_complet+0xe4>
+    1c16:	16 96       	adiw	r26, 0x06	; 6
+    1c18:	8d 91       	ld	r24, X+
+    1c1a:	9c 91       	ld	r25, X
+    1c1c:	17 97       	sbiw	r26, 0x07	; 7
+    1c1e:	8e 0f       	add	r24, r30
+    1c20:	9f 1f       	adc	r25, r31
+    1c22:	8d 83       	std	Y+5, r24	; 0x05
+    1c24:	9e 83       	std	Y+6, r25	; 0x06
+    1c26:	82 17       	cp	r24, r18
+    1c28:	93 07       	cpc	r25, r19
+    1c2a:	61 f1       	breq	.+88     	; 0x1c84 <udd_ep_trans_complet+0xc2>
+    1c2c:	28 1b       	sub	r18, r24
+    1c2e:	39 0b       	sbc	r19, r25
+    1c30:	21 15       	cp	r18, r1
+    1c32:	b4 e0       	ldi	r27, 0x04	; 4
+    1c34:	3b 07       	cpc	r19, r27
+    1c36:	38 f0       	brcs	.+14     	; 0x1c46 <udd_ep_trans_complet+0x84>
+    1c38:	2f ef       	ldi	r18, 0xFF	; 255
+    1c3a:	33 e0       	ldi	r19, 0x03	; 3
+    1c3c:	c9 01       	movw	r24, r18
+    1c3e:	b8 01       	movw	r22, r16
+    1c40:	14 d5       	rcall	.+2600   	; 0x266a <__udivmodhi4>
+    1c42:	28 1b       	sub	r18, r24
+    1c44:	39 0b       	sbc	r19, r25
+    1c46:	41 ff       	sbrs	r20, 1
+    1c48:	0a c0       	rjmp	.+20     	; 0x1c5e <udd_ep_trans_complet+0x9c>
+    1c4a:	c9 01       	movw	r24, r18
+    1c4c:	b8 01       	movw	r22, r16
+    1c4e:	0d d5       	rcall	.+2586   	; 0x266a <__udivmodhi4>
+    1c50:	ac 01       	movw	r20, r24
+    1c52:	91 e0       	ldi	r25, 0x01	; 1
+    1c54:	45 2b       	or	r20, r21
+    1c56:	09 f0       	breq	.+2      	; 0x1c5a <udd_ep_trans_complet+0x98>
+    1c58:	90 e0       	ldi	r25, 0x00	; 0
+    1c5a:	89 2f       	mov	r24, r25
+    1c5c:	01 c0       	rjmp	.+2      	; 0x1c60 <udd_ep_trans_complet+0x9e>
+    1c5e:	80 e0       	ldi	r24, 0x00	; 0
+    1c60:	98 81       	ld	r25, Y
+    1c62:	80 fb       	bst	r24, 0
+    1c64:	91 f9       	bld	r25, 1
+    1c66:	98 83       	st	Y, r25
+    1c68:	f7 01       	movw	r30, r14
+    1c6a:	16 82       	std	Z+6, r1	; 0x06
+    1c6c:	17 82       	std	Z+7, r1	; 0x07
+    1c6e:	22 83       	std	Z+2, r18	; 0x02
+    1c70:	33 83       	std	Z+3, r19	; 0x03
+    1c72:	29 81       	ldd	r18, Y+1	; 0x01
+    1c74:	3a 81       	ldd	r19, Y+2	; 0x02
+    1c76:	8d 81       	ldd	r24, Y+5	; 0x05
+    1c78:	9e 81       	ldd	r25, Y+6	; 0x06
+    1c7a:	82 0f       	add	r24, r18
+    1c7c:	93 1f       	adc	r25, r19
+    1c7e:	84 83       	std	Z+4, r24	; 0x04
+    1c80:	95 83       	std	Z+5, r25	; 0x05
+    1c82:	0e c0       	rjmp	.+28     	; 0x1ca0 <udd_ep_trans_complet+0xde>
+    1c84:	41 ff       	sbrs	r20, 1
+    1c86:	71 c0       	rjmp	.+226    	; 0x1d6a <udd_ep_trans_complet+0x1a8>
+    1c88:	4d 7f       	andi	r20, 0xFD	; 253
+    1c8a:	48 83       	st	Y, r20
+    1c8c:	d7 01       	movw	r26, r14
+    1c8e:	16 96       	adiw	r26, 0x06	; 6
+    1c90:	1d 92       	st	X+, r1
+    1c92:	1c 92       	st	X, r1
+    1c94:	17 97       	sbiw	r26, 0x07	; 7
+    1c96:	12 96       	adiw	r26, 0x02	; 2
+    1c98:	1d 92       	st	X+, r1
+    1c9a:	1c 92       	st	X, r1
+    1c9c:	13 97       	sbiw	r26, 0x03	; 3
+    1c9e:	f7 01       	movw	r30, r14
+    1ca0:	02 e0       	ldi	r16, 0x02	; 2
+    1ca2:	06 93       	lac	Z, r16
+    1ca4:	7b c0       	rjmp	.+246    	; 0x1d9c <udd_ep_trans_complet+0x1da>
+    1ca6:	12 96       	adiw	r26, 0x02	; 2
+    1ca8:	ad 90       	ld	r10, X+
+    1caa:	bc 90       	ld	r11, X
+    1cac:	13 97       	sbiw	r26, 0x03	; 3
+    1cae:	42 ff       	sbrs	r20, 2
+    1cb0:	10 c0       	rjmp	.+32     	; 0x1cd2 <udd_ep_trans_complet+0x110>
+    1cb2:	89 80       	ldd	r8, Y+1	; 0x01
+    1cb4:	9a 80       	ldd	r9, Y+2	; 0x02
+    1cb6:	c9 01       	movw	r24, r18
+    1cb8:	b8 01       	movw	r22, r16
+    1cba:	d7 d4       	rcall	.+2478   	; 0x266a <__udivmodhi4>
+    1cbc:	b0 e4       	ldi	r27, 0x40	; 64
+    1cbe:	db 9e       	mul	r13, r27
+    1cc0:	b0 01       	movw	r22, r0
+    1cc2:	11 24       	eor	r1, r1
+    1cc4:	6d 56       	subi	r22, 0x6D	; 109
+    1cc6:	7f 4d       	sbci	r23, 0xDF	; 223
+    1cc8:	ac 01       	movw	r20, r24
+    1cca:	c4 01       	movw	r24, r8
+    1ccc:	8e 0f       	add	r24, r30
+    1cce:	9f 1f       	adc	r25, r31
+    1cd0:	e6 d4       	rcall	.+2508   	; 0x269e <memcpy>
+    1cd2:	8d 81       	ldd	r24, Y+5	; 0x05
+    1cd4:	9e 81       	ldd	r25, Y+6	; 0x06
+    1cd6:	8a 0d       	add	r24, r10
+    1cd8:	9b 1d       	adc	r25, r11
+    1cda:	8d 83       	std	Y+5, r24	; 0x05
+    1cdc:	9e 83       	std	Y+6, r25	; 0x06
+    1cde:	2b 81       	ldd	r18, Y+3	; 0x03
+    1ce0:	3c 81       	ldd	r19, Y+4	; 0x04
+    1ce2:	28 17       	cp	r18, r24
+    1ce4:	39 07       	cpc	r19, r25
+    1ce6:	10 f4       	brcc	.+4      	; 0x1cec <udd_ep_trans_complet+0x12a>
+    1ce8:	2d 83       	std	Y+5, r18	; 0x05
+    1cea:	3e 83       	std	Y+6, r19	; 0x06
+    1cec:	f7 01       	movw	r30, r14
+    1cee:	86 81       	ldd	r24, Z+6	; 0x06
+    1cf0:	97 81       	ldd	r25, Z+7	; 0x07
+    1cf2:	a8 16       	cp	r10, r24
+    1cf4:	b9 06       	cpc	r11, r25
+    1cf6:	c9 f5       	brne	.+114    	; 0x1d6a <udd_ep_trans_complet+0x1a8>
+    1cf8:	8d 81       	ldd	r24, Y+5	; 0x05
+    1cfa:	9e 81       	ldd	r25, Y+6	; 0x06
+    1cfc:	82 17       	cp	r24, r18
+    1cfe:	93 07       	cpc	r25, r19
+    1d00:	a1 f1       	breq	.+104    	; 0x1d6a <udd_ep_trans_complet+0x1a8>
+    1d02:	28 1b       	sub	r18, r24
+    1d04:	39 0b       	sbc	r19, r25
+    1d06:	21 15       	cp	r18, r1
+    1d08:	f4 e0       	ldi	r31, 0x04	; 4
+    1d0a:	3f 07       	cpc	r19, r31
+    1d0c:	10 f0       	brcs	.+4      	; 0x1d12 <udd_ep_trans_complet+0x150>
+    1d0e:	2f ef       	ldi	r18, 0xFF	; 255
+    1d10:	33 e0       	ldi	r19, 0x03	; 3
+    1d12:	c9 01       	movw	r24, r18
+    1d14:	b8 01       	movw	r22, r16
+    1d16:	a9 d4       	rcall	.+2386   	; 0x266a <__udivmodhi4>
+    1d18:	28 1b       	sub	r18, r24
+    1d1a:	39 0b       	sbc	r19, r25
+    1d1c:	d7 01       	movw	r26, r14
+    1d1e:	12 96       	adiw	r26, 0x02	; 2
+    1d20:	1d 92       	st	X+, r1
+    1d22:	1c 92       	st	X, r1
+    1d24:	13 97       	sbiw	r26, 0x03	; 3
+    1d26:	20 17       	cp	r18, r16
+    1d28:	31 07       	cpc	r19, r17
+    1d2a:	78 f4       	brcc	.+30     	; 0x1d4a <udd_ep_trans_complet+0x188>
+    1d2c:	88 81       	ld	r24, Y
+    1d2e:	84 60       	ori	r24, 0x04	; 4
+    1d30:	88 83       	st	Y, r24
+    1d32:	b0 e4       	ldi	r27, 0x40	; 64
+    1d34:	db 9e       	mul	r13, r27
+    1d36:	c0 01       	movw	r24, r0
+    1d38:	11 24       	eor	r1, r1
+    1d3a:	8d 56       	subi	r24, 0x6D	; 109
+    1d3c:	9f 4d       	sbci	r25, 0xDF	; 223
+    1d3e:	f7 01       	movw	r30, r14
+    1d40:	84 83       	std	Z+4, r24	; 0x04
+    1d42:	95 83       	std	Z+5, r25	; 0x05
+    1d44:	06 83       	std	Z+6, r16	; 0x06
+    1d46:	17 83       	std	Z+7, r17	; 0x07
+    1d48:	aa cf       	rjmp	.-172    	; 0x1c9e <udd_ep_trans_complet+0xdc>
+    1d4a:	49 81       	ldd	r20, Y+1	; 0x01
+    1d4c:	5a 81       	ldd	r21, Y+2	; 0x02
+    1d4e:	8d 81       	ldd	r24, Y+5	; 0x05
+    1d50:	9e 81       	ldd	r25, Y+6	; 0x06
+    1d52:	84 0f       	add	r24, r20
+    1d54:	95 1f       	adc	r25, r21
+    1d56:	d7 01       	movw	r26, r14
+    1d58:	14 96       	adiw	r26, 0x04	; 4
+    1d5a:	8d 93       	st	X+, r24
+    1d5c:	9c 93       	st	X, r25
+    1d5e:	15 97       	sbiw	r26, 0x05	; 5
+    1d60:	16 96       	adiw	r26, 0x06	; 6
+    1d62:	2d 93       	st	X+, r18
+    1d64:	3c 93       	st	X, r19
+    1d66:	17 97       	sbiw	r26, 0x07	; 7
+    1d68:	9a cf       	rjmp	.-204    	; 0x1c9e <udd_ep_trans_complet+0xdc>
+    1d6a:	88 81       	ld	r24, Y
+    1d6c:	80 ff       	sbrs	r24, 0
+    1d6e:	16 c0       	rjmp	.+44     	; 0x1d9c <udd_ep_trans_complet+0x1da>
+    1d70:	8e 7f       	andi	r24, 0xFE	; 254
+    1d72:	88 83       	st	Y, r24
+    1d74:	ef 81       	ldd	r30, Y+7	; 0x07
+    1d76:	f8 85       	ldd	r31, Y+8	; 0x08
+    1d78:	30 97       	sbiw	r30, 0x00	; 0
+    1d7a:	81 f0       	breq	.+32     	; 0x1d9c <udd_ep_trans_complet+0x1da>
+    1d7c:	6d 81       	ldd	r22, Y+5	; 0x05
+    1d7e:	7e 81       	ldd	r23, Y+6	; 0x06
+    1d80:	4d 2d       	mov	r20, r13
+    1d82:	80 e0       	ldi	r24, 0x00	; 0
+    1d84:	df 91       	pop	r29
+    1d86:	cf 91       	pop	r28
+    1d88:	1f 91       	pop	r17
+    1d8a:	0f 91       	pop	r16
+    1d8c:	ff 90       	pop	r15
+    1d8e:	ef 90       	pop	r14
+    1d90:	df 90       	pop	r13
+    1d92:	bf 90       	pop	r11
+    1d94:	af 90       	pop	r10
+    1d96:	9f 90       	pop	r9
+    1d98:	8f 90       	pop	r8
+    1d9a:	09 94       	ijmp
+    1d9c:	df 91       	pop	r29
+    1d9e:	cf 91       	pop	r28
+    1da0:	1f 91       	pop	r17
+    1da2:	0f 91       	pop	r16
+    1da4:	ff 90       	pop	r15
+    1da6:	ef 90       	pop	r14
+    1da8:	df 90       	pop	r13
+    1daa:	bf 90       	pop	r11
+    1dac:	af 90       	pop	r10
+    1dae:	9f 90       	pop	r9
+    1db0:	8f 90       	pop	r8
+    1db2:	08 95       	ret
 
-00002020 <udd_set_address>:
-    2020:	80 93 c3 04 	sts	0x04C3, r24	; 0x8004c3 <__TEXT_REGION_LENGTH__+0x7004c3>
-    2024:	08 95       	ret
+00001db4 <udd_ctrl_in_sent>:
+    1db4:	0f 93       	push	r16
+    1db6:	cf 93       	push	r28
+    1db8:	df 93       	push	r29
+    1dba:	80 91 0d 22 	lds	r24, 0x220D	; 0x80220d <udd_ep_control_state>
+    1dbe:	83 30       	cpi	r24, 0x03	; 3
+    1dc0:	29 f4       	brne	.+10     	; 0x1dcc <udd_ctrl_in_sent+0x18>
+    1dc2:	dd de       	rcall	.-582    	; 0x1b7e <udd_ctrl_endofrequest>
+    1dc4:	df 91       	pop	r29
+    1dc6:	cf 91       	pop	r28
+    1dc8:	0f 91       	pop	r16
+    1dca:	96 ce       	rjmp	.-724    	; 0x1af8 <udd_ctrl_init>
+    1dcc:	20 91 09 22 	lds	r18, 0x2209	; 0x802209 <udd_ctrl_payload_nb_trans>
+    1dd0:	30 91 0a 22 	lds	r19, 0x220A	; 0x80220a <udd_ctrl_payload_nb_trans+0x1>
+    1dd4:	c0 91 74 24 	lds	r28, 0x2474	; 0x802474 <udd_g_ctrlreq+0xa>
+    1dd8:	d0 91 75 24 	lds	r29, 0x2475	; 0x802475 <udd_g_ctrlreq+0xb>
+    1ddc:	c2 1b       	sub	r28, r18
+    1dde:	d3 0b       	sbc	r29, r19
+    1de0:	61 f5       	brne	.+88     	; 0x1e3a <udd_ctrl_in_sent+0x86>
+    1de2:	80 91 0b 22 	lds	r24, 0x220B	; 0x80220b <udd_ctrl_prev_payload_nb_trans>
+    1de6:	90 91 0c 22 	lds	r25, 0x220C	; 0x80220c <udd_ctrl_prev_payload_nb_trans+0x1>
+    1dea:	82 0f       	add	r24, r18
+    1dec:	93 1f       	adc	r25, r19
+    1dee:	80 93 0b 22 	sts	0x220B, r24	; 0x80220b <udd_ctrl_prev_payload_nb_trans>
+    1df2:	90 93 0c 22 	sts	0x220C, r25	; 0x80220c <udd_ctrl_prev_payload_nb_trans+0x1>
+    1df6:	20 91 70 24 	lds	r18, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
+    1dfa:	30 91 71 24 	lds	r19, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
+    1dfe:	28 17       	cp	r18, r24
+    1e00:	39 07       	cpc	r19, r25
+    1e02:	21 f0       	breq	.+8      	; 0x1e0c <udd_ctrl_in_sent+0x58>
+    1e04:	80 91 d2 20 	lds	r24, 0x20D2	; 0x8020d2 <b_shortpacket.5272>
+    1e08:	88 23       	and	r24, r24
+    1e0a:	31 f0       	breq	.+12     	; 0x1e18 <udd_ctrl_in_sent+0x64>
+    1e0c:	84 e0       	ldi	r24, 0x04	; 4
+    1e0e:	80 93 0d 22 	sts	0x220D, r24	; 0x80220d <udd_ep_control_state>
+    1e12:	e0 e2       	ldi	r30, 0x20	; 32
+    1e14:	f2 e2       	ldi	r31, 0x22	; 34
+    1e16:	36 c0       	rjmp	.+108    	; 0x1e84 <udd_ctrl_in_sent+0xd0>
+    1e18:	e0 91 78 24 	lds	r30, 0x2478	; 0x802478 <udd_g_ctrlreq+0xe>
+    1e1c:	f0 91 79 24 	lds	r31, 0x2479	; 0x802479 <udd_g_ctrlreq+0xf>
+    1e20:	30 97       	sbiw	r30, 0x00	; 0
+    1e22:	99 f0       	breq	.+38     	; 0x1e4a <udd_ctrl_in_sent+0x96>
+    1e24:	09 95       	icall
+    1e26:	88 23       	and	r24, r24
+    1e28:	81 f0       	breq	.+32     	; 0x1e4a <udd_ctrl_in_sent+0x96>
+    1e2a:	10 92 09 22 	sts	0x2209, r1	; 0x802209 <udd_ctrl_payload_nb_trans>
+    1e2e:	10 92 0a 22 	sts	0x220A, r1	; 0x80220a <udd_ctrl_payload_nb_trans+0x1>
+    1e32:	c0 91 74 24 	lds	r28, 0x2474	; 0x802474 <udd_g_ctrlreq+0xa>
+    1e36:	d0 91 75 24 	lds	r29, 0x2475	; 0x802475 <udd_g_ctrlreq+0xb>
+    1e3a:	c0 34       	cpi	r28, 0x40	; 64
+    1e3c:	d1 05       	cpc	r29, r1
+    1e3e:	28 f0       	brcs	.+10     	; 0x1e4a <udd_ctrl_in_sent+0x96>
+    1e40:	10 92 d2 20 	sts	0x20D2, r1	; 0x8020d2 <b_shortpacket.5272>
+    1e44:	c0 e4       	ldi	r28, 0x40	; 64
+    1e46:	d0 e0       	ldi	r29, 0x00	; 0
+    1e48:	03 c0       	rjmp	.+6      	; 0x1e50 <udd_ctrl_in_sent+0x9c>
+    1e4a:	81 e0       	ldi	r24, 0x01	; 1
+    1e4c:	80 93 d2 20 	sts	0x20D2, r24	; 0x8020d2 <b_shortpacket.5272>
+    1e50:	c0 93 2a 22 	sts	0x222A, r28	; 0x80222a <udd_sram+0x1a>
+    1e54:	d0 93 2b 22 	sts	0x222B, r29	; 0x80222b <udd_sram+0x1b>
+    1e58:	80 91 09 22 	lds	r24, 0x2209	; 0x802209 <udd_ctrl_payload_nb_trans>
+    1e5c:	90 91 0a 22 	lds	r25, 0x220A	; 0x80220a <udd_ctrl_payload_nb_trans+0x1>
+    1e60:	20 91 72 24 	lds	r18, 0x2472	; 0x802472 <udd_g_ctrlreq+0x8>
+    1e64:	30 91 73 24 	lds	r19, 0x2473	; 0x802473 <udd_g_ctrlreq+0x9>
+    1e68:	28 0f       	add	r18, r24
+    1e6a:	39 1f       	adc	r19, r25
+    1e6c:	20 93 2c 22 	sts	0x222C, r18	; 0x80222c <udd_sram+0x1c>
+    1e70:	30 93 2d 22 	sts	0x222D, r19	; 0x80222d <udd_sram+0x1d>
+    1e74:	c8 0f       	add	r28, r24
+    1e76:	d9 1f       	adc	r29, r25
+    1e78:	c0 93 09 22 	sts	0x2209, r28	; 0x802209 <udd_ctrl_payload_nb_trans>
+    1e7c:	d0 93 0a 22 	sts	0x220A, r29	; 0x80220a <udd_ctrl_payload_nb_trans+0x1>
+    1e80:	e8 e2       	ldi	r30, 0x28	; 40
+    1e82:	f2 e2       	ldi	r31, 0x22	; 34
+    1e84:	02 e0       	ldi	r16, 0x02	; 2
+    1e86:	06 93       	lac	Z, r16
+    1e88:	df 91       	pop	r29
+    1e8a:	cf 91       	pop	r28
+    1e8c:	0f 91       	pop	r16
+    1e8e:	08 95       	ret
 
-00002026 <udd_getaddress>:
-    2026:	80 91 c3 04 	lds	r24, 0x04C3	; 0x8004c3 <__TEXT_REGION_LENGTH__+0x7004c3>
-    202a:	08 95       	ret
+00001e90 <udd_ctrl_interrupt_tc_setup>:
+    1e90:	0f 93       	push	r16
+    1e92:	cf 93       	push	r28
+    1e94:	df 93       	push	r29
+    1e96:	1f 92       	push	r1
+    1e98:	cd b7       	in	r28, 0x3d	; 61
+    1e9a:	de b7       	in	r29, 0x3e	; 62
+    1e9c:	80 91 cc 04 	lds	r24, 0x04CC	; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc>
+    1ea0:	80 ff       	sbrs	r24, 0
+    1ea2:	65 c0       	rjmp	.+202    	; 0x1f6e <udd_ctrl_interrupt_tc_setup+0xde>
+    1ea4:	21 e0       	ldi	r18, 0x01	; 1
+    1ea6:	20 93 cc 04 	sts	0x04CC, r18	; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc>
+    1eaa:	80 e2       	ldi	r24, 0x20	; 32
+    1eac:	92 e2       	ldi	r25, 0x22	; 34
+    1eae:	fc 01       	movw	r30, r24
+    1eb0:	00 e8       	ldi	r16, 0x80	; 128
+    1eb2:	06 93       	lac	Z, r16
+    1eb4:	e8 e2       	ldi	r30, 0x28	; 40
+    1eb6:	f2 e2       	ldi	r31, 0x22	; 34
+    1eb8:	00 e8       	ldi	r16, 0x80	; 128
+    1eba:	06 93       	lac	Z, r16
+    1ebc:	20 93 ca 04 	sts	0x04CA, r18	; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca>
+    1ec0:	fc 01       	movw	r30, r24
+    1ec2:	00 e1       	ldi	r16, 0x10	; 16
+    1ec4:	06 93       	lac	Z, r16
+    1ec6:	80 91 0d 22 	lds	r24, 0x220D	; 0x80220d <udd_ep_control_state>
+    1eca:	88 23       	and	r24, r24
+    1ecc:	29 f0       	breq	.+10     	; 0x1ed8 <udd_ctrl_interrupt_tc_setup+0x48>
+    1ece:	83 50       	subi	r24, 0x03	; 3
+    1ed0:	82 30       	cpi	r24, 0x02	; 2
+    1ed2:	08 f4       	brcc	.+2      	; 0x1ed6 <udd_ctrl_interrupt_tc_setup+0x46>
+    1ed4:	54 de       	rcall	.-856    	; 0x1b7e <udd_ctrl_endofrequest>
+    1ed6:	10 de       	rcall	.-992    	; 0x1af8 <udd_ctrl_init>
+    1ed8:	80 91 22 22 	lds	r24, 0x2222	; 0x802222 <udd_sram+0x12>
+    1edc:	90 91 23 22 	lds	r25, 0x2223	; 0x802223 <udd_sram+0x13>
+    1ee0:	08 97       	sbiw	r24, 0x08	; 8
+    1ee2:	09 f0       	breq	.+2      	; 0x1ee6 <udd_ctrl_interrupt_tc_setup+0x56>
+    1ee4:	46 c0       	rjmp	.+140    	; 0x1f72 <udd_ctrl_interrupt_tc_setup+0xe2>
+    1ee6:	88 e0       	ldi	r24, 0x08	; 8
+    1ee8:	e9 ec       	ldi	r30, 0xC9	; 201
+    1eea:	f1 e2       	ldi	r31, 0x21	; 33
+    1eec:	aa e6       	ldi	r26, 0x6A	; 106
+    1eee:	b4 e2       	ldi	r27, 0x24	; 36
+    1ef0:	01 90       	ld	r0, Z+
+    1ef2:	0d 92       	st	X+, r0
+    1ef4:	8a 95       	dec	r24
+    1ef6:	e1 f7       	brne	.-8      	; 0x1ef0 <udd_ctrl_interrupt_tc_setup+0x60>
+    1ef8:	80 91 c8 04 	lds	r24, 0x04C8	; 0x8004c8 <__TEXT_REGION_LENGTH__+0x7004c8>
+    1efc:	80 62       	ori	r24, 0x20	; 32
+    1efe:	80 93 c8 04 	sts	0x04C8, r24	; 0x8004c8 <__TEXT_REGION_LENGTH__+0x7004c8>
+    1f02:	80 91 c8 04 	lds	r24, 0x04C8	; 0x8004c8 <__TEXT_REGION_LENGTH__+0x7004c8>
+    1f06:	80 62       	ori	r24, 0x20	; 32
+    1f08:	80 93 c8 04 	sts	0x04C8, r24	; 0x8004c8 <__TEXT_REGION_LENGTH__+0x7004c8>
+    1f0c:	59 da       	rcall	.-2894   	; 0x13c0 <udc_process_setup>
+    1f0e:	81 11       	cpse	r24, r1
+    1f10:	02 c0       	rjmp	.+4      	; 0x1f16 <udd_ctrl_interrupt_tc_setup+0x86>
+    1f12:	19 de       	rcall	.-974    	; 0x1b46 <udd_ctrl_stall_data>
+    1f14:	2e c0       	rjmp	.+92     	; 0x1f72 <udd_ctrl_interrupt_tc_setup+0xe2>
+    1f16:	90 91 6a 24 	lds	r25, 0x246A	; 0x80246a <udd_g_ctrlreq>
+    1f1a:	97 ff       	sbrs	r25, 7
+    1f1c:	0e c0       	rjmp	.+28     	; 0x1f3a <udd_ctrl_interrupt_tc_setup+0xaa>
+    1f1e:	10 92 0b 22 	sts	0x220B, r1	; 0x80220b <udd_ctrl_prev_payload_nb_trans>
+    1f22:	10 92 0c 22 	sts	0x220C, r1	; 0x80220c <udd_ctrl_prev_payload_nb_trans+0x1>
+    1f26:	10 92 09 22 	sts	0x2209, r1	; 0x802209 <udd_ctrl_payload_nb_trans>
+    1f2a:	10 92 0a 22 	sts	0x220A, r1	; 0x80220a <udd_ctrl_payload_nb_trans+0x1>
+    1f2e:	92 e0       	ldi	r25, 0x02	; 2
+    1f30:	90 93 0d 22 	sts	0x220D, r25	; 0x80220d <udd_ep_control_state>
+    1f34:	89 83       	std	Y+1, r24	; 0x01
+    1f36:	3e df       	rcall	.-388    	; 0x1db4 <udd_ctrl_in_sent>
+    1f38:	08 c0       	rjmp	.+16     	; 0x1f4a <udd_ctrl_interrupt_tc_setup+0xba>
+    1f3a:	20 91 70 24 	lds	r18, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
+    1f3e:	30 91 71 24 	lds	r19, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
+    1f42:	23 2b       	or	r18, r19
+    1f44:	21 f4       	brne	.+8      	; 0x1f4e <udd_ctrl_interrupt_tc_setup+0xbe>
+    1f46:	89 83       	std	Y+1, r24	; 0x01
+    1f48:	0c de       	rcall	.-1000   	; 0x1b62 <udd_ctrl_send_zlp_in>
+    1f4a:	89 81       	ldd	r24, Y+1	; 0x01
+    1f4c:	13 c0       	rjmp	.+38     	; 0x1f74 <udd_ctrl_interrupt_tc_setup+0xe4>
+    1f4e:	10 92 0b 22 	sts	0x220B, r1	; 0x80220b <udd_ctrl_prev_payload_nb_trans>
+    1f52:	10 92 0c 22 	sts	0x220C, r1	; 0x80220c <udd_ctrl_prev_payload_nb_trans+0x1>
+    1f56:	10 92 09 22 	sts	0x2209, r1	; 0x802209 <udd_ctrl_payload_nb_trans>
+    1f5a:	10 92 0a 22 	sts	0x220A, r1	; 0x80220a <udd_ctrl_payload_nb_trans+0x1>
+    1f5e:	91 e0       	ldi	r25, 0x01	; 1
+    1f60:	90 93 0d 22 	sts	0x220D, r25	; 0x80220d <udd_ep_control_state>
+    1f64:	e0 e2       	ldi	r30, 0x20	; 32
+    1f66:	f2 e2       	ldi	r31, 0x22	; 34
+    1f68:	02 e0       	ldi	r16, 0x02	; 2
+    1f6a:	06 93       	lac	Z, r16
+    1f6c:	03 c0       	rjmp	.+6      	; 0x1f74 <udd_ctrl_interrupt_tc_setup+0xe4>
+    1f6e:	80 e0       	ldi	r24, 0x00	; 0
+    1f70:	01 c0       	rjmp	.+2      	; 0x1f74 <udd_ctrl_interrupt_tc_setup+0xe4>
+    1f72:	81 e0       	ldi	r24, 0x01	; 1
+    1f74:	0f 90       	pop	r0
+    1f76:	df 91       	pop	r29
+    1f78:	cf 91       	pop	r28
+    1f7a:	0f 91       	pop	r16
+    1f7c:	08 95       	ret
 
-0000202c <udd_set_setup_payload>:
-    202c:	ea e6       	ldi	r30, 0x6A	; 106
-    202e:	f4 e2       	ldi	r31, 0x24	; 36
-    2030:	80 87       	std	Z+8, r24	; 0x08
-    2032:	91 87       	std	Z+9, r25	; 0x09
-    2034:	62 87       	std	Z+10, r22	; 0x0a
-    2036:	73 87       	std	Z+11, r23	; 0x0b
-    2038:	08 95       	ret
+00001f7e <udd_attach>:
+    1f7e:	cf 93       	push	r28
+    1f80:	cf b7       	in	r28, 0x3f	; 63
+    1f82:	f8 94       	cli
+    1f84:	81 e0       	ldi	r24, 0x01	; 1
+    1f86:	8e dd       	rcall	.-1252   	; 0x1aa4 <udd_sleep_mode>
+    1f88:	ea ec       	ldi	r30, 0xCA	; 202
+    1f8a:	f4 e0       	ldi	r31, 0x04	; 4
+    1f8c:	80 e4       	ldi	r24, 0x40	; 64
+    1f8e:	80 83       	st	Z, r24
+    1f90:	80 e2       	ldi	r24, 0x20	; 32
+    1f92:	80 83       	st	Z, r24
+    1f94:	e1 ec       	ldi	r30, 0xC1	; 193
+    1f96:	f4 e0       	ldi	r31, 0x04	; 4
+    1f98:	80 81       	ld	r24, Z
+    1f9a:	81 60       	ori	r24, 0x01	; 1
+    1f9c:	80 83       	st	Z, r24
+    1f9e:	a9 ec       	ldi	r26, 0xC9	; 201
+    1fa0:	b4 e0       	ldi	r27, 0x04	; 4
+    1fa2:	8c 91       	ld	r24, X
+    1fa4:	82 60       	ori	r24, 0x02	; 2
+    1fa6:	8c 93       	st	X, r24
+    1fa8:	e8 ec       	ldi	r30, 0xC8	; 200
+    1faa:	f4 e0       	ldi	r31, 0x04	; 4
+    1fac:	80 81       	ld	r24, Z
+    1fae:	80 64       	ori	r24, 0x40	; 64
+    1fb0:	80 83       	st	Z, r24
+    1fb2:	8c 91       	ld	r24, X
+    1fb4:	81 60       	ori	r24, 0x01	; 1
+    1fb6:	8c 93       	st	X, r24
+    1fb8:	80 81       	ld	r24, Z
+    1fba:	80 68       	ori	r24, 0x80	; 128
+    1fbc:	80 83       	st	Z, r24
+    1fbe:	cf bf       	out	0x3f, r28	; 63
+    1fc0:	cf 91       	pop	r28
+    1fc2:	08 95       	ret
 
-0000203a <udd_ep_alloc>:
-    203a:	0f 93       	push	r16
-    203c:	1f 93       	push	r17
-    203e:	cf 93       	push	r28
-    2040:	df 93       	push	r29
-    2042:	1f 92       	push	r1
-    2044:	cd b7       	in	r28, 0x3d	; 61
-    2046:	de b7       	in	r29, 0x3e	; 62
-    2048:	8a 01       	movw	r16, r20
-    204a:	69 83       	std	Y+1, r22	; 0x01
-    204c:	f4 dc       	rcall	.-1560   	; 0x1a36 <udd_ep_get_ctrl>
-    204e:	fc 01       	movw	r30, r24
-    2050:	81 81       	ldd	r24, Z+1	; 0x01
-    2052:	80 7c       	andi	r24, 0xC0	; 192
-    2054:	69 81       	ldd	r22, Y+1	; 0x01
-    2056:	81 11       	cpse	r24, r1
-    2058:	3a c0       	rjmp	.+116    	; 0x20ce <udd_ep_alloc+0x94>
-    205a:	63 70       	andi	r22, 0x03	; 3
-    205c:	61 30       	cpi	r22, 0x01	; 1
-    205e:	19 f0       	breq	.+6      	; 0x2066 <udd_ep_alloc+0x2c>
-    2060:	20 f0       	brcs	.+8      	; 0x206a <udd_ep_alloc+0x30>
-    2062:	80 e8       	ldi	r24, 0x80	; 128
-    2064:	03 c0       	rjmp	.+6      	; 0x206c <udd_ep_alloc+0x32>
-    2066:	80 ec       	ldi	r24, 0xC0	; 192
-    2068:	01 c0       	rjmp	.+2      	; 0x206c <udd_ep_alloc+0x32>
-    206a:	80 e4       	ldi	r24, 0x40	; 64
-    206c:	00 38       	cpi	r16, 0x80	; 128
-    206e:	11 05       	cpc	r17, r1
-    2070:	e9 f0       	breq	.+58     	; 0x20ac <udd_ep_alloc+0x72>
-    2072:	58 f4       	brcc	.+22     	; 0x208a <udd_ep_alloc+0x50>
-    2074:	00 32       	cpi	r16, 0x20	; 32
-    2076:	11 05       	cpc	r17, r1
-    2078:	a9 f0       	breq	.+42     	; 0x20a4 <udd_ep_alloc+0x6a>
-    207a:	00 34       	cpi	r16, 0x40	; 64
-    207c:	11 05       	cpc	r17, r1
-    207e:	a1 f0       	breq	.+40     	; 0x20a8 <udd_ep_alloc+0x6e>
-    2080:	00 31       	cpi	r16, 0x10	; 16
-    2082:	11 05       	cpc	r17, r1
-    2084:	c9 f4       	brne	.+50     	; 0x20b8 <udd_ep_alloc+0x7e>
-    2086:	91 e0       	ldi	r25, 0x01	; 1
-    2088:	18 c0       	rjmp	.+48     	; 0x20ba <udd_ep_alloc+0x80>
-    208a:	01 15       	cp	r16, r1
-    208c:	92 e0       	ldi	r25, 0x02	; 2
-    208e:	19 07       	cpc	r17, r25
-    2090:	79 f0       	breq	.+30     	; 0x20b0 <udd_ep_alloc+0x76>
-    2092:	0f 3f       	cpi	r16, 0xFF	; 255
-    2094:	93 e0       	ldi	r25, 0x03	; 3
-    2096:	19 07       	cpc	r17, r25
-    2098:	69 f0       	breq	.+26     	; 0x20b4 <udd_ep_alloc+0x7a>
-    209a:	01 15       	cp	r16, r1
-    209c:	11 40       	sbci	r17, 0x01	; 1
-    209e:	61 f4       	brne	.+24     	; 0x20b8 <udd_ep_alloc+0x7e>
-    20a0:	95 e0       	ldi	r25, 0x05	; 5
-    20a2:	0b c0       	rjmp	.+22     	; 0x20ba <udd_ep_alloc+0x80>
-    20a4:	92 e0       	ldi	r25, 0x02	; 2
-    20a6:	09 c0       	rjmp	.+18     	; 0x20ba <udd_ep_alloc+0x80>
-    20a8:	93 e0       	ldi	r25, 0x03	; 3
-    20aa:	07 c0       	rjmp	.+14     	; 0x20ba <udd_ep_alloc+0x80>
-    20ac:	94 e0       	ldi	r25, 0x04	; 4
-    20ae:	05 c0       	rjmp	.+10     	; 0x20ba <udd_ep_alloc+0x80>
-    20b0:	96 e0       	ldi	r25, 0x06	; 6
-    20b2:	03 c0       	rjmp	.+6      	; 0x20ba <udd_ep_alloc+0x80>
-    20b4:	97 e0       	ldi	r25, 0x07	; 7
-    20b6:	01 c0       	rjmp	.+2      	; 0x20ba <udd_ep_alloc+0x80>
-    20b8:	90 e0       	ldi	r25, 0x00	; 0
-    20ba:	11 82       	std	Z+1, r1	; 0x01
-    20bc:	26 e0       	ldi	r18, 0x06	; 6
-    20be:	20 83       	st	Z, r18
-    20c0:	98 2b       	or	r25, r24
-    20c2:	91 83       	std	Z+1, r25	; 0x01
-    20c4:	81 81       	ldd	r24, Z+1	; 0x01
-    20c6:	80 62       	ori	r24, 0x20	; 32
-    20c8:	81 83       	std	Z+1, r24	; 0x01
-    20ca:	81 e0       	ldi	r24, 0x01	; 1
-    20cc:	01 c0       	rjmp	.+2      	; 0x20d0 <udd_ep_alloc+0x96>
-    20ce:	80 e0       	ldi	r24, 0x00	; 0
-    20d0:	0f 90       	pop	r0
-    20d2:	df 91       	pop	r29
-    20d4:	cf 91       	pop	r28
-    20d6:	1f 91       	pop	r17
-    20d8:	0f 91       	pop	r16
-    20da:	08 95       	ret
+00001fc4 <udd_enable>:
+    1fc4:	cf 93       	push	r28
+    1fc6:	10 92 60 00 	sts	0x0060, r1	; 0x800060 <__TEXT_REGION_LENGTH__+0x700060>
+    1fca:	80 e3       	ldi	r24, 0x30	; 48
+    1fcc:	75 d8       	rcall	.-3862   	; 0x10b8 <sysclk_enable_usb>
+    1fce:	80 91 c0 04 	lds	r24, 0x04C0	; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0>
+    1fd2:	80 64       	ori	r24, 0x40	; 64
+    1fd4:	80 93 c0 04 	sts	0x04C0, r24	; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0>
+    1fd8:	81 e0       	ldi	r24, 0x01	; 1
+    1fda:	80 93 60 00 	sts	0x0060, r24	; 0x800060 <__TEXT_REGION_LENGTH__+0x700060>
+    1fde:	cf b7       	in	r28, 0x3f	; 63
+    1fe0:	f8 94       	cli
+    1fe2:	80 e0       	ldi	r24, 0x00	; 0
+    1fe4:	90 e0       	ldi	r25, 0x00	; 0
+    1fe6:	fc 01       	movw	r30, r24
+    1fe8:	23 e0       	ldi	r18, 0x03	; 3
+    1fea:	ee 0f       	add	r30, r30
+    1fec:	ff 1f       	adc	r31, r31
+    1fee:	2a 95       	dec	r18
+    1ff0:	e1 f7       	brne	.-8      	; 0x1fea <udd_enable+0x26>
+    1ff2:	e0 5f       	subi	r30, 0xF0	; 240
+    1ff4:	fd 4d       	sbci	r31, 0xDD	; 221
+    1ff6:	11 8a       	std	Z+17, r1	; 0x11
+    1ff8:	01 96       	adiw	r24, 0x01	; 1
+    1ffa:	88 30       	cpi	r24, 0x08	; 8
+    1ffc:	91 05       	cpc	r25, r1
+    1ffe:	99 f7       	brne	.-26     	; 0x1fe6 <udd_enable+0x22>
+    2000:	80 91 93 21 	lds	r24, 0x2193	; 0x802193 <udd_ep_job>
+    2004:	8e 7f       	andi	r24, 0xFE	; 254
+    2006:	80 93 93 21 	sts	0x2193, r24	; 0x802193 <udd_ep_job>
+    200a:	80 91 9c 21 	lds	r24, 0x219C	; 0x80219c <udd_ep_job+0x9>
+    200e:	8e 7f       	andi	r24, 0xFE	; 254
+    2010:	80 93 9c 21 	sts	0x219C, r24	; 0x80219c <udd_ep_job+0x9>
+    2014:	80 91 a5 21 	lds	r24, 0x21A5	; 0x8021a5 <udd_ep_job+0x12>
+    2018:	8e 7f       	andi	r24, 0xFE	; 254
+    201a:	80 93 a5 21 	sts	0x21A5, r24	; 0x8021a5 <udd_ep_job+0x12>
+    201e:	80 91 ae 21 	lds	r24, 0x21AE	; 0x8021ae <udd_ep_job+0x1b>
+    2022:	8e 7f       	andi	r24, 0xFE	; 254
+    2024:	80 93 ae 21 	sts	0x21AE, r24	; 0x8021ae <udd_ep_job+0x1b>
+    2028:	80 91 b7 21 	lds	r24, 0x21B7	; 0x8021b7 <udd_ep_job+0x24>
+    202c:	8e 7f       	andi	r24, 0xFE	; 254
+    202e:	80 93 b7 21 	sts	0x21B7, r24	; 0x8021b7 <udd_ep_job+0x24>
+    2032:	80 91 c0 21 	lds	r24, 0x21C0	; 0x8021c0 <udd_ep_job+0x2d>
+    2036:	8e 7f       	andi	r24, 0xFE	; 254
+    2038:	80 93 c0 21 	sts	0x21C0, r24	; 0x8021c0 <udd_ep_job+0x2d>
+    203c:	6a e1       	ldi	r22, 0x1A	; 26
+    203e:	70 e0       	ldi	r23, 0x00	; 0
+    2040:	82 e0       	ldi	r24, 0x02	; 2
+    2042:	08 dd       	rcall	.-1520   	; 0x1a54 <nvm_read_byte>
+    2044:	8f 3f       	cpi	r24, 0xFF	; 255
+    2046:	09 f4       	brne	.+2      	; 0x204a <udd_enable+0x86>
+    2048:	8f e1       	ldi	r24, 0x1F	; 31
+    204a:	80 93 fa 04 	sts	0x04FA, r24	; 0x8004fa <__TEXT_REGION_LENGTH__+0x7004fa>
+    204e:	6b e1       	ldi	r22, 0x1B	; 27
+    2050:	70 e0       	ldi	r23, 0x00	; 0
+    2052:	82 e0       	ldi	r24, 0x02	; 2
+    2054:	ff dc       	rcall	.-1538   	; 0x1a54 <nvm_read_byte>
+    2056:	8f 3f       	cpi	r24, 0xFF	; 255
+    2058:	09 f4       	brne	.+2      	; 0x205c <udd_enable+0x98>
+    205a:	8f e1       	ldi	r24, 0x1F	; 31
+    205c:	80 93 fb 04 	sts	0x04FB, r24	; 0x8004fb <__TEXT_REGION_LENGTH__+0x7004fb>
+    2060:	80 91 c0 04 	lds	r24, 0x04C0	; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0>
+    2064:	83 60       	ori	r24, 0x03	; 3
+    2066:	80 93 c0 04 	sts	0x04C0, r24	; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0>
+    206a:	80 91 c0 04 	lds	r24, 0x04C0	; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0>
+    206e:	80 68       	ori	r24, 0x80	; 128
+    2070:	80 93 c0 04 	sts	0x04C0, r24	; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0>
+    2074:	80 91 c0 04 	lds	r24, 0x04C0	; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0>
+    2078:	80 61       	ori	r24, 0x10	; 16
+    207a:	80 93 c0 04 	sts	0x04C0, r24	; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0>
+    207e:	80 e2       	ldi	r24, 0x20	; 32
+    2080:	92 e2       	ldi	r25, 0x22	; 34
+    2082:	80 93 c6 04 	sts	0x04C6, r24	; 0x8004c6 <__TEXT_REGION_LENGTH__+0x7004c6>
+    2086:	90 93 c7 04 	sts	0x04C7, r25	; 0x8004c7 <__TEXT_REGION_LENGTH__+0x7004c7>
+    208a:	80 91 c0 04 	lds	r24, 0x04C0	; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0>
+    208e:	80 62       	ori	r24, 0x20	; 32
+    2090:	80 93 c0 04 	sts	0x04C0, r24	; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0>
+    2094:	8f ef       	ldi	r24, 0xFF	; 255
+    2096:	80 93 c5 04 	sts	0x04C5, r24	; 0x8004c5 <__TEXT_REGION_LENGTH__+0x7004c5>
+    209a:	80 91 c8 04 	lds	r24, 0x04C8	; 0x8004c8 <__TEXT_REGION_LENGTH__+0x7004c8>
+    209e:	82 60       	ori	r24, 0x02	; 2
+    20a0:	80 93 c8 04 	sts	0x04C8, r24	; 0x8004c8 <__TEXT_REGION_LENGTH__+0x7004c8>
+    20a4:	10 92 64 22 	sts	0x2264, r1	; 0x802264 <udd_b_idle>
+    20a8:	85 e0       	ldi	r24, 0x05	; 5
+    20aa:	de dc       	rcall	.-1604   	; 0x1a68 <sleepmgr_lock_mode>
+    20ac:	68 df       	rcall	.-304    	; 0x1f7e <udd_attach>
+    20ae:	cf bf       	out	0x3f, r28	; 63
+    20b0:	cf 91       	pop	r28
+    20b2:	08 95       	ret
 
-000020dc <udd_ep_is_halted>:
-    20dc:	ac dc       	rcall	.-1704   	; 0x1a36 <udd_ep_get_ctrl>
-    20de:	fc 01       	movw	r30, r24
-    20e0:	81 81       	ldd	r24, Z+1	; 0x01
-    20e2:	82 fb       	bst	r24, 2
-    20e4:	88 27       	eor	r24, r24
-    20e6:	80 f9       	bld	r24, 0
-    20e8:	08 95       	ret
+000020b4 <udd_set_address>:
+    20b4:	80 93 c3 04 	sts	0x04C3, r24	; 0x8004c3 <__TEXT_REGION_LENGTH__+0x7004c3>
+    20b8:	08 95       	ret
 
-000020ea <udd_ep_clear_halt>:
-    20ea:	cf 93       	push	r28
-    20ec:	c8 2f       	mov	r28, r24
-    20ee:	a3 dc       	rcall	.-1722   	; 0x1a36 <udd_ep_get_ctrl>
-    20f0:	fc 01       	movw	r30, r24
-    20f2:	81 81       	ldd	r24, Z+1	; 0x01
-    20f4:	82 ff       	sbrs	r24, 2
-    20f6:	0f c0       	rjmp	.+30     	; 0x2116 <udd_ep_clear_halt+0x2c>
-    20f8:	91 81       	ldd	r25, Z+1	; 0x01
-    20fa:	9b 7f       	andi	r25, 0xFB	; 251
-    20fc:	91 83       	std	Z+1, r25	; 0x01
-    20fe:	8c 2f       	mov	r24, r28
-    2100:	fc dc       	rcall	.-1544   	; 0x1afa <udd_ep_get_job>
-    2102:	fc 01       	movw	r30, r24
-    2104:	90 81       	ld	r25, Z
-    2106:	90 ff       	sbrs	r25, 0
-    2108:	06 c0       	rjmp	.+12     	; 0x2116 <udd_ep_clear_halt+0x2c>
-    210a:	9e 7f       	andi	r25, 0xFE	; 254
-    210c:	90 83       	st	Z, r25
-    210e:	07 80       	ldd	r0, Z+7	; 0x07
-    2110:	f0 85       	ldd	r31, Z+8	; 0x08
-    2112:	e0 2d       	mov	r30, r0
-    2114:	09 95       	icall
-    2116:	81 e0       	ldi	r24, 0x01	; 1
-    2118:	cf 91       	pop	r28
-    211a:	08 95       	ret
+000020ba <udd_getaddress>:
+    20ba:	80 91 c3 04 	lds	r24, 0x04C3	; 0x8004c3 <__TEXT_REGION_LENGTH__+0x7004c3>
+    20be:	08 95       	ret
 
-0000211c <udd_ep_run>:
-    211c:	8f 92       	push	r8
-    211e:	9f 92       	push	r9
-    2120:	af 92       	push	r10
-    2122:	bf 92       	push	r11
-    2124:	df 92       	push	r13
-    2126:	ef 92       	push	r14
-    2128:	ff 92       	push	r15
-    212a:	0f 93       	push	r16
-    212c:	1f 93       	push	r17
-    212e:	cf 93       	push	r28
-    2130:	df 93       	push	r29
-    2132:	1f 92       	push	r1
-    2134:	cd b7       	in	r28, 0x3d	; 61
-    2136:	de b7       	in	r29, 0x3e	; 62
-    2138:	d8 2e       	mov	r13, r24
-    213a:	5a 01       	movw	r10, r20
-    213c:	79 01       	movw	r14, r18
-    213e:	69 83       	std	Y+1, r22	; 0x01
-    2140:	dc dc       	rcall	.-1608   	; 0x1afa <udd_ep_get_job>
-    2142:	4c 01       	movw	r8, r24
-    2144:	8d 2d       	mov	r24, r13
-    2146:	77 dc       	rcall	.-1810   	; 0x1a36 <udd_ep_get_ctrl>
-    2148:	9c 01       	movw	r18, r24
-    214a:	dc 01       	movw	r26, r24
-    214c:	11 96       	adiw	r26, 0x01	; 1
-    214e:	8c 91       	ld	r24, X
-    2150:	11 97       	sbiw	r26, 0x01	; 1
-    2152:	80 7c       	andi	r24, 0xC0	; 192
-    2154:	69 81       	ldd	r22, Y+1	; 0x01
-    2156:	88 23       	and	r24, r24
-    2158:	09 f4       	brne	.+2      	; 0x215c <udd_ep_run+0x40>
-    215a:	5e c0       	rjmp	.+188    	; 0x2218 <udd_ep_run+0xfc>
-    215c:	11 96       	adiw	r26, 0x01	; 1
-    215e:	8c 91       	ld	r24, X
-    2160:	11 97       	sbiw	r26, 0x01	; 1
-    2162:	80 7c       	andi	r24, 0xC0	; 192
-    2164:	80 3c       	cpi	r24, 0xC0	; 192
-    2166:	21 f0       	breq	.+8      	; 0x2170 <udd_ep_run+0x54>
-    2168:	11 96       	adiw	r26, 0x01	; 1
-    216a:	8c 91       	ld	r24, X
-    216c:	82 fd       	sbrc	r24, 2
-    216e:	54 c0       	rjmp	.+168    	; 0x2218 <udd_ep_run+0xfc>
-    2170:	9f b7       	in	r25, 0x3f	; 63
-    2172:	f8 94       	cli
-    2174:	f4 01       	movw	r30, r8
-    2176:	80 81       	ld	r24, Z
-    2178:	80 ff       	sbrs	r24, 0
-    217a:	02 c0       	rjmp	.+4      	; 0x2180 <udd_ep_run+0x64>
-    217c:	9f bf       	out	0x3f, r25	; 63
-    217e:	4c c0       	rjmp	.+152    	; 0x2218 <udd_ep_run+0xfc>
-    2180:	81 60       	ori	r24, 0x01	; 1
-    2182:	80 83       	st	Z, r24
-    2184:	9f bf       	out	0x3f, r25	; 63
-    2186:	f4 01       	movw	r30, r8
-    2188:	a1 82       	std	Z+1, r10	; 0x01
-    218a:	b2 82       	std	Z+2, r11	; 0x02
-    218c:	e3 82       	std	Z+3, r14	; 0x03
-    218e:	f4 82       	std	Z+4, r15	; 0x04
-    2190:	15 82       	std	Z+5, r1	; 0x05
-    2192:	16 82       	std	Z+6, r1	; 0x06
-    2194:	07 83       	std	Z+7, r16	; 0x07
-    2196:	10 87       	std	Z+8, r17	; 0x08
-    2198:	91 e0       	ldi	r25, 0x01	; 1
-    219a:	61 11       	cpse	r22, r1
-    219c:	04 c0       	rjmp	.+8      	; 0x21a6 <udd_ep_run+0x8a>
-    219e:	e1 14       	cp	r14, r1
-    21a0:	f1 04       	cpc	r15, r1
-    21a2:	09 f0       	breq	.+2      	; 0x21a6 <udd_ep_run+0x8a>
-    21a4:	90 e0       	ldi	r25, 0x00	; 0
-    21a6:	d4 01       	movw	r26, r8
-    21a8:	8c 91       	ld	r24, X
-    21aa:	90 fb       	bst	r25, 0
-    21ac:	81 f9       	bld	r24, 1
-    21ae:	8b 7f       	andi	r24, 0xFB	; 251
-    21b0:	8c 93       	st	X, r24
-    21b2:	d7 fe       	sbrs	r13, 7
-    21b4:	04 c0       	rjmp	.+8      	; 0x21be <udd_ep_run+0xa2>
-    21b6:	f9 01       	movw	r30, r18
-    21b8:	16 82       	std	Z+6, r1	; 0x06
-    21ba:	17 82       	std	Z+7, r1	; 0x07
-    21bc:	29 c0       	rjmp	.+82     	; 0x2210 <udd_ep_run+0xf4>
-    21be:	d9 01       	movw	r26, r18
-    21c0:	11 96       	adiw	r26, 0x01	; 1
-    21c2:	8c 91       	ld	r24, X
-    21c4:	11 97       	sbiw	r26, 0x01	; 1
-    21c6:	80 7c       	andi	r24, 0xC0	; 192
-    21c8:	80 3c       	cpi	r24, 0xC0	; 192
-    21ca:	c9 f4       	brne	.+50     	; 0x21fe <udd_ep_run+0xe2>
-    21cc:	11 96       	adiw	r26, 0x01	; 1
-    21ce:	ec 91       	ld	r30, X
-    21d0:	e7 70       	andi	r30, 0x07	; 7
-    21d2:	e1 50       	subi	r30, 0x01	; 1
-    21d4:	e7 30       	cpi	r30, 0x07	; 7
-    21d6:	40 f4       	brcc	.+16     	; 0x21e8 <udd_ep_run+0xcc>
-    21d8:	f0 e0       	ldi	r31, 0x00	; 0
-    21da:	ee 0f       	add	r30, r30
-    21dc:	ff 1f       	adc	r31, r31
-    21de:	ee 54       	subi	r30, 0x4E	; 78
-    21e0:	ff 4d       	sbci	r31, 0xDF	; 223
-    21e2:	60 81       	ld	r22, Z
-    21e4:	71 81       	ldd	r23, Z+1	; 0x01
-    21e6:	02 c0       	rjmp	.+4      	; 0x21ec <udd_ep_run+0xd0>
-    21e8:	68 e0       	ldi	r22, 0x08	; 8
-    21ea:	70 e0       	ldi	r23, 0x00	; 0
-    21ec:	c7 01       	movw	r24, r14
-    21ee:	f3 d1       	rcall	.+998    	; 0x25d6 <__udivmodhi4>
-    21f0:	89 2b       	or	r24, r25
-    21f2:	29 f0       	breq	.+10     	; 0x21fe <udd_ep_run+0xe2>
-    21f4:	f4 01       	movw	r30, r8
-    21f6:	80 81       	ld	r24, Z
-    21f8:	8e 7f       	andi	r24, 0xFE	; 254
-    21fa:	80 83       	st	Z, r24
-    21fc:	0d c0       	rjmp	.+26     	; 0x2218 <udd_ep_run+0xfc>
-    21fe:	d9 01       	movw	r26, r18
-    2200:	12 96       	adiw	r26, 0x02	; 2
-    2202:	1d 92       	st	X+, r1
-    2204:	1c 92       	st	X, r1
-    2206:	13 97       	sbiw	r26, 0x03	; 3
-    2208:	16 96       	adiw	r26, 0x06	; 6
-    220a:	1d 92       	st	X+, r1
-    220c:	1c 92       	st	X, r1
-    220e:	17 97       	sbiw	r26, 0x07	; 7
-    2210:	8d 2d       	mov	r24, r13
-    2212:	8d dc       	rcall	.-1766   	; 0x1b2e <udd_ep_trans_complet>
-    2214:	81 e0       	ldi	r24, 0x01	; 1
-    2216:	01 c0       	rjmp	.+2      	; 0x221a <udd_ep_run+0xfe>
-    2218:	80 e0       	ldi	r24, 0x00	; 0
-    221a:	0f 90       	pop	r0
-    221c:	df 91       	pop	r29
-    221e:	cf 91       	pop	r28
-    2220:	1f 91       	pop	r17
-    2222:	0f 91       	pop	r16
-    2224:	ff 90       	pop	r15
-    2226:	ef 90       	pop	r14
-    2228:	df 90       	pop	r13
-    222a:	bf 90       	pop	r11
-    222c:	af 90       	pop	r10
-    222e:	9f 90       	pop	r9
-    2230:	8f 90       	pop	r8
-    2232:	08 95       	ret
+000020c0 <udd_set_setup_payload>:
+    20c0:	ea e6       	ldi	r30, 0x6A	; 106
+    20c2:	f4 e2       	ldi	r31, 0x24	; 36
+    20c4:	80 87       	std	Z+8, r24	; 0x08
+    20c6:	91 87       	std	Z+9, r25	; 0x09
+    20c8:	62 87       	std	Z+10, r22	; 0x0a
+    20ca:	73 87       	std	Z+11, r23	; 0x0b
+    20cc:	08 95       	ret
 
-00002234 <udd_ep_abort>:
-    2234:	ef 92       	push	r14
-    2236:	ff 92       	push	r15
-    2238:	0f 93       	push	r16
-    223a:	cf 93       	push	r28
-    223c:	c8 2f       	mov	r28, r24
-    223e:	fb db       	rcall	.-2058   	; 0x1a36 <udd_ep_get_ctrl>
-    2240:	7c 01       	movw	r14, r24
-    2242:	8c 2f       	mov	r24, r28
-    2244:	5a dc       	rcall	.-1868   	; 0x1afa <udd_ep_get_job>
-    2246:	dc 01       	movw	r26, r24
-    2248:	f7 01       	movw	r30, r14
-    224a:	02 e0       	ldi	r16, 0x02	; 2
-    224c:	05 93       	las	Z, r16
-    224e:	9c 91       	ld	r25, X
-    2250:	90 ff       	sbrs	r25, 0
-    2252:	1b c0       	rjmp	.+54     	; 0x228a <udd_ep_abort+0x56>
-    2254:	9e 7f       	andi	r25, 0xFE	; 254
-    2256:	9c 93       	st	X, r25
-    2258:	17 96       	adiw	r26, 0x07	; 7
-    225a:	ed 91       	ld	r30, X+
-    225c:	fc 91       	ld	r31, X
-    225e:	18 97       	sbiw	r26, 0x08	; 8
-    2260:	30 97       	sbiw	r30, 0x00	; 0
-    2262:	99 f0       	breq	.+38     	; 0x228a <udd_ep_abort+0x56>
-    2264:	d7 01       	movw	r26, r14
-    2266:	c7 ff       	sbrs	r28, 7
-    2268:	05 c0       	rjmp	.+10     	; 0x2274 <udd_ep_abort+0x40>
-    226a:	16 96       	adiw	r26, 0x06	; 6
-    226c:	6d 91       	ld	r22, X+
-    226e:	7c 91       	ld	r23, X
-    2270:	17 97       	sbiw	r26, 0x07	; 7
-    2272:	04 c0       	rjmp	.+8      	; 0x227c <udd_ep_abort+0x48>
-    2274:	12 96       	adiw	r26, 0x02	; 2
-    2276:	6d 91       	ld	r22, X+
-    2278:	7c 91       	ld	r23, X
-    227a:	13 97       	sbiw	r26, 0x03	; 3
-    227c:	4c 2f       	mov	r20, r28
-    227e:	81 e0       	ldi	r24, 0x01	; 1
-    2280:	cf 91       	pop	r28
-    2282:	0f 91       	pop	r16
-    2284:	ff 90       	pop	r15
-    2286:	ef 90       	pop	r14
-    2288:	09 94       	ijmp
-    228a:	cf 91       	pop	r28
-    228c:	0f 91       	pop	r16
-    228e:	ff 90       	pop	r15
-    2290:	ef 90       	pop	r14
-    2292:	08 95       	ret
+000020ce <udd_ep_alloc>:
+    20ce:	0f 93       	push	r16
+    20d0:	1f 93       	push	r17
+    20d2:	cf 93       	push	r28
+    20d4:	df 93       	push	r29
+    20d6:	1f 92       	push	r1
+    20d8:	cd b7       	in	r28, 0x3d	; 61
+    20da:	de b7       	in	r29, 0x3e	; 62
+    20dc:	8a 01       	movw	r16, r20
+    20de:	69 83       	std	Y+1, r22	; 0x01
+    20e0:	f4 dc       	rcall	.-1560   	; 0x1aca <udd_ep_get_ctrl>
+    20e2:	fc 01       	movw	r30, r24
+    20e4:	81 81       	ldd	r24, Z+1	; 0x01
+    20e6:	80 7c       	andi	r24, 0xC0	; 192
+    20e8:	69 81       	ldd	r22, Y+1	; 0x01
+    20ea:	81 11       	cpse	r24, r1
+    20ec:	3a c0       	rjmp	.+116    	; 0x2162 <udd_ep_alloc+0x94>
+    20ee:	63 70       	andi	r22, 0x03	; 3
+    20f0:	61 30       	cpi	r22, 0x01	; 1
+    20f2:	19 f0       	breq	.+6      	; 0x20fa <udd_ep_alloc+0x2c>
+    20f4:	20 f0       	brcs	.+8      	; 0x20fe <udd_ep_alloc+0x30>
+    20f6:	80 e8       	ldi	r24, 0x80	; 128
+    20f8:	03 c0       	rjmp	.+6      	; 0x2100 <udd_ep_alloc+0x32>
+    20fa:	80 ec       	ldi	r24, 0xC0	; 192
+    20fc:	01 c0       	rjmp	.+2      	; 0x2100 <udd_ep_alloc+0x32>
+    20fe:	80 e4       	ldi	r24, 0x40	; 64
+    2100:	00 38       	cpi	r16, 0x80	; 128
+    2102:	11 05       	cpc	r17, r1
+    2104:	e9 f0       	breq	.+58     	; 0x2140 <udd_ep_alloc+0x72>
+    2106:	58 f4       	brcc	.+22     	; 0x211e <udd_ep_alloc+0x50>
+    2108:	00 32       	cpi	r16, 0x20	; 32
+    210a:	11 05       	cpc	r17, r1
+    210c:	a9 f0       	breq	.+42     	; 0x2138 <udd_ep_alloc+0x6a>
+    210e:	00 34       	cpi	r16, 0x40	; 64
+    2110:	11 05       	cpc	r17, r1
+    2112:	a1 f0       	breq	.+40     	; 0x213c <udd_ep_alloc+0x6e>
+    2114:	00 31       	cpi	r16, 0x10	; 16
+    2116:	11 05       	cpc	r17, r1
+    2118:	c9 f4       	brne	.+50     	; 0x214c <udd_ep_alloc+0x7e>
+    211a:	91 e0       	ldi	r25, 0x01	; 1
+    211c:	18 c0       	rjmp	.+48     	; 0x214e <udd_ep_alloc+0x80>
+    211e:	01 15       	cp	r16, r1
+    2120:	92 e0       	ldi	r25, 0x02	; 2
+    2122:	19 07       	cpc	r17, r25
+    2124:	79 f0       	breq	.+30     	; 0x2144 <udd_ep_alloc+0x76>
+    2126:	0f 3f       	cpi	r16, 0xFF	; 255
+    2128:	93 e0       	ldi	r25, 0x03	; 3
+    212a:	19 07       	cpc	r17, r25
+    212c:	69 f0       	breq	.+26     	; 0x2148 <udd_ep_alloc+0x7a>
+    212e:	01 15       	cp	r16, r1
+    2130:	11 40       	sbci	r17, 0x01	; 1
+    2132:	61 f4       	brne	.+24     	; 0x214c <udd_ep_alloc+0x7e>
+    2134:	95 e0       	ldi	r25, 0x05	; 5
+    2136:	0b c0       	rjmp	.+22     	; 0x214e <udd_ep_alloc+0x80>
+    2138:	92 e0       	ldi	r25, 0x02	; 2
+    213a:	09 c0       	rjmp	.+18     	; 0x214e <udd_ep_alloc+0x80>
+    213c:	93 e0       	ldi	r25, 0x03	; 3
+    213e:	07 c0       	rjmp	.+14     	; 0x214e <udd_ep_alloc+0x80>
+    2140:	94 e0       	ldi	r25, 0x04	; 4
+    2142:	05 c0       	rjmp	.+10     	; 0x214e <udd_ep_alloc+0x80>
+    2144:	96 e0       	ldi	r25, 0x06	; 6
+    2146:	03 c0       	rjmp	.+6      	; 0x214e <udd_ep_alloc+0x80>
+    2148:	97 e0       	ldi	r25, 0x07	; 7
+    214a:	01 c0       	rjmp	.+2      	; 0x214e <udd_ep_alloc+0x80>
+    214c:	90 e0       	ldi	r25, 0x00	; 0
+    214e:	11 82       	std	Z+1, r1	; 0x01
+    2150:	26 e0       	ldi	r18, 0x06	; 6
+    2152:	20 83       	st	Z, r18
+    2154:	98 2b       	or	r25, r24
+    2156:	91 83       	std	Z+1, r25	; 0x01
+    2158:	81 81       	ldd	r24, Z+1	; 0x01
+    215a:	80 62       	ori	r24, 0x20	; 32
+    215c:	81 83       	std	Z+1, r24	; 0x01
+    215e:	81 e0       	ldi	r24, 0x01	; 1
+    2160:	01 c0       	rjmp	.+2      	; 0x2164 <udd_ep_alloc+0x96>
+    2162:	80 e0       	ldi	r24, 0x00	; 0
+    2164:	0f 90       	pop	r0
+    2166:	df 91       	pop	r29
+    2168:	cf 91       	pop	r28
+    216a:	1f 91       	pop	r17
+    216c:	0f 91       	pop	r16
+    216e:	08 95       	ret
 
-00002294 <udd_ep_free>:
-    2294:	cf 93       	push	r28
-    2296:	c8 2f       	mov	r28, r24
-    2298:	cd df       	rcall	.-102    	; 0x2234 <udd_ep_abort>
-    229a:	8c 2f       	mov	r24, r28
-    229c:	cc db       	rcall	.-2152   	; 0x1a36 <udd_ep_get_ctrl>
-    229e:	fc 01       	movw	r30, r24
-    22a0:	11 82       	std	Z+1, r1	; 0x01
-    22a2:	cf 91       	pop	r28
-    22a4:	08 95       	ret
+00002170 <udd_ep_is_halted>:
+    2170:	ac dc       	rcall	.-1704   	; 0x1aca <udd_ep_get_ctrl>
+    2172:	fc 01       	movw	r30, r24
+    2174:	81 81       	ldd	r24, Z+1	; 0x01
+    2176:	82 fb       	bst	r24, 2
+    2178:	88 27       	eor	r24, r24
+    217a:	80 f9       	bld	r24, 0
+    217c:	08 95       	ret
 
-000022a6 <udd_ep_set_halt>:
-    22a6:	0f 93       	push	r16
-    22a8:	cf 93       	push	r28
-    22aa:	c8 2f       	mov	r28, r24
-    22ac:	c4 db       	rcall	.-2168   	; 0x1a36 <udd_ep_get_ctrl>
-    22ae:	fc 01       	movw	r30, r24
-    22b0:	91 81       	ldd	r25, Z+1	; 0x01
-    22b2:	94 60       	ori	r25, 0x04	; 4
-    22b4:	91 83       	std	Z+1, r25	; 0x01
-    22b6:	01 e0       	ldi	r16, 0x01	; 1
-    22b8:	06 93       	lac	Z, r16
-    22ba:	8c 2f       	mov	r24, r28
-    22bc:	bb df       	rcall	.-138    	; 0x2234 <udd_ep_abort>
-    22be:	81 e0       	ldi	r24, 0x01	; 1
-    22c0:	cf 91       	pop	r28
-    22c2:	0f 91       	pop	r16
-    22c4:	08 95       	ret
+0000217e <udd_ep_clear_halt>:
+    217e:	cf 93       	push	r28
+    2180:	c8 2f       	mov	r28, r24
+    2182:	a3 dc       	rcall	.-1722   	; 0x1aca <udd_ep_get_ctrl>
+    2184:	fc 01       	movw	r30, r24
+    2186:	81 81       	ldd	r24, Z+1	; 0x01
+    2188:	82 ff       	sbrs	r24, 2
+    218a:	0f c0       	rjmp	.+30     	; 0x21aa <udd_ep_clear_halt+0x2c>
+    218c:	91 81       	ldd	r25, Z+1	; 0x01
+    218e:	9b 7f       	andi	r25, 0xFB	; 251
+    2190:	91 83       	std	Z+1, r25	; 0x01
+    2192:	8c 2f       	mov	r24, r28
+    2194:	fc dc       	rcall	.-1544   	; 0x1b8e <udd_ep_get_job>
+    2196:	fc 01       	movw	r30, r24
+    2198:	90 81       	ld	r25, Z
+    219a:	90 ff       	sbrs	r25, 0
+    219c:	06 c0       	rjmp	.+12     	; 0x21aa <udd_ep_clear_halt+0x2c>
+    219e:	9e 7f       	andi	r25, 0xFE	; 254
+    21a0:	90 83       	st	Z, r25
+    21a2:	07 80       	ldd	r0, Z+7	; 0x07
+    21a4:	f0 85       	ldd	r31, Z+8	; 0x08
+    21a6:	e0 2d       	mov	r30, r0
+    21a8:	09 95       	icall
+    21aa:	81 e0       	ldi	r24, 0x01	; 1
+    21ac:	cf 91       	pop	r28
+    21ae:	08 95       	ret
 
-000022c6 <__vector_125>:
-    22c6:	1f 92       	push	r1
-    22c8:	0f 92       	push	r0
-    22ca:	0f b6       	in	r0, 0x3f	; 63
-    22cc:	0f 92       	push	r0
-    22ce:	11 24       	eor	r1, r1
-    22d0:	0f 93       	push	r16
-    22d2:	2f 93       	push	r18
-    22d4:	3f 93       	push	r19
-    22d6:	4f 93       	push	r20
-    22d8:	5f 93       	push	r21
-    22da:	6f 93       	push	r22
-    22dc:	7f 93       	push	r23
-    22de:	8f 93       	push	r24
-    22e0:	9f 93       	push	r25
-    22e2:	af 93       	push	r26
-    22e4:	bf 93       	push	r27
-    22e6:	ef 93       	push	r30
-    22e8:	ff 93       	push	r31
-    22ea:	80 91 cb 04 	lds	r24, 0x04CB	; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb>
-    22ee:	87 ff       	sbrs	r24, 7
-    22f0:	08 c0       	rjmp	.+16     	; 0x2302 <__vector_125+0x3c>
-    22f2:	80 e8       	ldi	r24, 0x80	; 128
-    22f4:	80 93 ca 04 	sts	0x04CA, r24	; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca>
-    22f8:	0e 94 72 09 	call	0x12e4	; 0x12e4 <udc_sof_notify>
-    22fc:	0e 94 89 01 	call	0x312	; 0x312 <main_sof_action>
-    2300:	86 c0       	rjmp	.+268    	; 0x240e <__vector_125+0x148>
-    2302:	80 91 cb 04 	lds	r24, 0x04CB	; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb>
-    2306:	82 ff       	sbrs	r24, 2
-    2308:	18 c0       	rjmp	.+48     	; 0x233a <__vector_125+0x74>
-    230a:	84 e0       	ldi	r24, 0x04	; 4
-    230c:	80 93 ca 04 	sts	0x04CA, r24	; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca>
-    2310:	80 91 28 22 	lds	r24, 0x2228	; 0x802228 <udd_sram+0x18>
-    2314:	86 ff       	sbrs	r24, 6
-    2316:	7b c0       	rjmp	.+246    	; 0x240e <__vector_125+0x148>
-    2318:	80 91 cc 04 	lds	r24, 0x04CC	; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc>
-    231c:	81 fd       	sbrc	r24, 1
-    231e:	77 c0       	rjmp	.+238    	; 0x240e <__vector_125+0x148>
-    2320:	6d dd       	rcall	.-1318   	; 0x1dfc <udd_ctrl_interrupt_tc_setup>
-    2322:	81 11       	cpse	r24, r1
-    2324:	74 c0       	rjmp	.+232    	; 0x240e <__vector_125+0x148>
-    2326:	80 91 0d 22 	lds	r24, 0x220D	; 0x80220d <udd_ep_control_state>
-    232a:	81 30       	cpi	r24, 0x01	; 1
-    232c:	11 f4       	brne	.+4      	; 0x2332 <__vector_125+0x6c>
-    232e:	cf db       	rcall	.-2146   	; 0x1ace <udd_ctrl_send_zlp_in>
-    2330:	6e c0       	rjmp	.+220    	; 0x240e <__vector_125+0x148>
-    2332:	84 30       	cpi	r24, 0x04	; 4
-    2334:	09 f0       	breq	.+2      	; 0x2338 <__vector_125+0x72>
-    2336:	6b c0       	rjmp	.+214    	; 0x240e <__vector_125+0x148>
-    2338:	21 c0       	rjmp	.+66     	; 0x237c <__vector_125+0xb6>
-    233a:	80 91 cb 04 	lds	r24, 0x04CB	; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb>
-    233e:	81 ff       	sbrs	r24, 1
-    2340:	26 c0       	rjmp	.+76     	; 0x238e <__vector_125+0xc8>
-    2342:	82 e0       	ldi	r24, 0x02	; 2
-    2344:	80 93 ca 04 	sts	0x04CA, r24	; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca>
-    2348:	80 91 20 22 	lds	r24, 0x2220	; 0x802220 <udd_sram+0x10>
-    234c:	86 ff       	sbrs	r24, 6
-    234e:	5f c0       	rjmp	.+190    	; 0x240e <__vector_125+0x148>
-    2350:	80 91 cc 04 	lds	r24, 0x04CC	; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc>
-    2354:	81 fd       	sbrc	r24, 1
-    2356:	5b c0       	rjmp	.+182    	; 0x240e <__vector_125+0x148>
-    2358:	51 dd       	rcall	.-1374   	; 0x1dfc <udd_ctrl_interrupt_tc_setup>
-    235a:	81 11       	cpse	r24, r1
-    235c:	58 c0       	rjmp	.+176    	; 0x240e <__vector_125+0x148>
-    235e:	80 91 0d 22 	lds	r24, 0x220D	; 0x80220d <udd_ep_control_state>
-    2362:	82 30       	cpi	r24, 0x02	; 2
-    2364:	41 f4       	brne	.+16     	; 0x2376 <__vector_125+0xb0>
-    2366:	84 e0       	ldi	r24, 0x04	; 4
-    2368:	80 93 0d 22 	sts	0x220D, r24	; 0x80220d <udd_ep_control_state>
-    236c:	e0 e2       	ldi	r30, 0x20	; 32
-    236e:	f2 e2       	ldi	r31, 0x22	; 34
-    2370:	02 e0       	ldi	r16, 0x02	; 2
-    2372:	06 93       	lac	Z, r16
-    2374:	4c c0       	rjmp	.+152    	; 0x240e <__vector_125+0x148>
-    2376:	83 30       	cpi	r24, 0x03	; 3
-    2378:	09 f0       	breq	.+2      	; 0x237c <__vector_125+0xb6>
-    237a:	49 c0       	rjmp	.+146    	; 0x240e <__vector_125+0x148>
-    237c:	e9 e2       	ldi	r30, 0x29	; 41
-    237e:	f2 e2       	ldi	r31, 0x22	; 34
-    2380:	04 e0       	ldi	r16, 0x04	; 4
-    2382:	05 93       	las	Z, r16
-    2384:	e1 e2       	ldi	r30, 0x21	; 33
-    2386:	f2 e2       	ldi	r31, 0x22	; 34
-    2388:	04 e0       	ldi	r16, 0x04	; 4
-    238a:	05 93       	las	Z, r16
-    238c:	40 c0       	rjmp	.+128    	; 0x240e <__vector_125+0x148>
-    238e:	80 91 cb 04 	lds	r24, 0x04CB	; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb>
-    2392:	84 ff       	sbrs	r24, 4
-    2394:	25 c0       	rjmp	.+74     	; 0x23e0 <__vector_125+0x11a>
-    2396:	80 e1       	ldi	r24, 0x10	; 16
-    2398:	80 93 ca 04 	sts	0x04CA, r24	; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca>
-    239c:	81 e0       	ldi	r24, 0x01	; 1
-    239e:	4a df       	rcall	.-364    	; 0x2234 <udd_ep_abort>
-    23a0:	81 e8       	ldi	r24, 0x81	; 129
-    23a2:	48 df       	rcall	.-368    	; 0x2234 <udd_ep_abort>
-    23a4:	82 e0       	ldi	r24, 0x02	; 2
-    23a6:	46 df       	rcall	.-372    	; 0x2234 <udd_ep_abort>
-    23a8:	82 e8       	ldi	r24, 0x82	; 130
-    23aa:	44 df       	rcall	.-376    	; 0x2234 <udd_ep_abort>
-    23ac:	0e 94 56 09 	call	0x12ac	; 0x12ac <udc_reset>
-    23b0:	10 92 c3 04 	sts	0x04C3, r1	; 0x8004c3 <__TEXT_REGION_LENGTH__+0x7004c3>
-    23b4:	10 92 21 22 	sts	0x2221, r1	; 0x802221 <udd_sram+0x11>
-    23b8:	96 e0       	ldi	r25, 0x06	; 6
-    23ba:	90 93 20 22 	sts	0x2220, r25	; 0x802220 <udd_sram+0x10>
-    23be:	83 e4       	ldi	r24, 0x43	; 67
-    23c0:	80 93 21 22 	sts	0x2221, r24	; 0x802221 <udd_sram+0x11>
-    23c4:	10 92 29 22 	sts	0x2229, r1	; 0x802229 <udd_sram+0x19>
-    23c8:	90 93 28 22 	sts	0x2228, r25	; 0x802228 <udd_sram+0x18>
-    23cc:	80 93 29 22 	sts	0x2229, r24	; 0x802229 <udd_sram+0x19>
-    23d0:	89 ec       	ldi	r24, 0xC9	; 201
-    23d2:	91 e2       	ldi	r25, 0x21	; 33
-    23d4:	80 93 24 22 	sts	0x2224, r24	; 0x802224 <udd_sram+0x14>
-    23d8:	90 93 25 22 	sts	0x2225, r25	; 0x802225 <udd_sram+0x15>
-    23dc:	43 db       	rcall	.-2426   	; 0x1a64 <udd_ctrl_init>
-    23de:	17 c0       	rjmp	.+46     	; 0x240e <__vector_125+0x148>
-    23e0:	80 91 cb 04 	lds	r24, 0x04CB	; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb>
-    23e4:	86 ff       	sbrs	r24, 6
-    23e6:	08 c0       	rjmp	.+16     	; 0x23f8 <__vector_125+0x132>
-    23e8:	80 e4       	ldi	r24, 0x40	; 64
-    23ea:	80 93 ca 04 	sts	0x04CA, r24	; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca>
-    23ee:	80 e0       	ldi	r24, 0x00	; 0
-    23f0:	0f db       	rcall	.-2530   	; 0x1a10 <udd_sleep_mode>
-    23f2:	0e 94 87 01 	call	0x30e	; 0x30e <main_suspend_action>
-    23f6:	0b c0       	rjmp	.+22     	; 0x240e <__vector_125+0x148>
-    23f8:	80 91 cb 04 	lds	r24, 0x04CB	; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb>
-    23fc:	85 ff       	sbrs	r24, 5
-    23fe:	07 c0       	rjmp	.+14     	; 0x240e <__vector_125+0x148>
-    2400:	80 e2       	ldi	r24, 0x20	; 32
-    2402:	80 93 ca 04 	sts	0x04CA, r24	; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca>
-    2406:	81 e0       	ldi	r24, 0x01	; 1
-    2408:	03 db       	rcall	.-2554   	; 0x1a10 <udd_sleep_mode>
-    240a:	0e 94 88 01 	call	0x310	; 0x310 <main_resume_action>
-    240e:	ff 91       	pop	r31
-    2410:	ef 91       	pop	r30
-    2412:	bf 91       	pop	r27
-    2414:	af 91       	pop	r26
-    2416:	9f 91       	pop	r25
-    2418:	8f 91       	pop	r24
-    241a:	7f 91       	pop	r23
-    241c:	6f 91       	pop	r22
-    241e:	5f 91       	pop	r21
-    2420:	4f 91       	pop	r20
-    2422:	3f 91       	pop	r19
-    2424:	2f 91       	pop	r18
-    2426:	0f 91       	pop	r16
-    2428:	0f 90       	pop	r0
-    242a:	0f be       	out	0x3f, r0	; 63
-    242c:	0f 90       	pop	r0
-    242e:	1f 90       	pop	r1
-    2430:	18 95       	reti
+000021b0 <udd_ep_run>:
+    21b0:	8f 92       	push	r8
+    21b2:	9f 92       	push	r9
+    21b4:	af 92       	push	r10
+    21b6:	bf 92       	push	r11
+    21b8:	df 92       	push	r13
+    21ba:	ef 92       	push	r14
+    21bc:	ff 92       	push	r15
+    21be:	0f 93       	push	r16
+    21c0:	1f 93       	push	r17
+    21c2:	cf 93       	push	r28
+    21c4:	df 93       	push	r29
+    21c6:	1f 92       	push	r1
+    21c8:	cd b7       	in	r28, 0x3d	; 61
+    21ca:	de b7       	in	r29, 0x3e	; 62
+    21cc:	d8 2e       	mov	r13, r24
+    21ce:	5a 01       	movw	r10, r20
+    21d0:	79 01       	movw	r14, r18
+    21d2:	69 83       	std	Y+1, r22	; 0x01
+    21d4:	dc dc       	rcall	.-1608   	; 0x1b8e <udd_ep_get_job>
+    21d6:	4c 01       	movw	r8, r24
+    21d8:	8d 2d       	mov	r24, r13
+    21da:	77 dc       	rcall	.-1810   	; 0x1aca <udd_ep_get_ctrl>
+    21dc:	9c 01       	movw	r18, r24
+    21de:	dc 01       	movw	r26, r24
+    21e0:	11 96       	adiw	r26, 0x01	; 1
+    21e2:	8c 91       	ld	r24, X
+    21e4:	11 97       	sbiw	r26, 0x01	; 1
+    21e6:	80 7c       	andi	r24, 0xC0	; 192
+    21e8:	69 81       	ldd	r22, Y+1	; 0x01
+    21ea:	88 23       	and	r24, r24
+    21ec:	09 f4       	brne	.+2      	; 0x21f0 <udd_ep_run+0x40>
+    21ee:	5e c0       	rjmp	.+188    	; 0x22ac <udd_ep_run+0xfc>
+    21f0:	11 96       	adiw	r26, 0x01	; 1
+    21f2:	8c 91       	ld	r24, X
+    21f4:	11 97       	sbiw	r26, 0x01	; 1
+    21f6:	80 7c       	andi	r24, 0xC0	; 192
+    21f8:	80 3c       	cpi	r24, 0xC0	; 192
+    21fa:	21 f0       	breq	.+8      	; 0x2204 <udd_ep_run+0x54>
+    21fc:	11 96       	adiw	r26, 0x01	; 1
+    21fe:	8c 91       	ld	r24, X
+    2200:	82 fd       	sbrc	r24, 2
+    2202:	54 c0       	rjmp	.+168    	; 0x22ac <udd_ep_run+0xfc>
+    2204:	9f b7       	in	r25, 0x3f	; 63
+    2206:	f8 94       	cli
+    2208:	f4 01       	movw	r30, r8
+    220a:	80 81       	ld	r24, Z
+    220c:	80 ff       	sbrs	r24, 0
+    220e:	02 c0       	rjmp	.+4      	; 0x2214 <udd_ep_run+0x64>
+    2210:	9f bf       	out	0x3f, r25	; 63
+    2212:	4c c0       	rjmp	.+152    	; 0x22ac <udd_ep_run+0xfc>
+    2214:	81 60       	ori	r24, 0x01	; 1
+    2216:	80 83       	st	Z, r24
+    2218:	9f bf       	out	0x3f, r25	; 63
+    221a:	f4 01       	movw	r30, r8
+    221c:	a1 82       	std	Z+1, r10	; 0x01
+    221e:	b2 82       	std	Z+2, r11	; 0x02
+    2220:	e3 82       	std	Z+3, r14	; 0x03
+    2222:	f4 82       	std	Z+4, r15	; 0x04
+    2224:	15 82       	std	Z+5, r1	; 0x05
+    2226:	16 82       	std	Z+6, r1	; 0x06
+    2228:	07 83       	std	Z+7, r16	; 0x07
+    222a:	10 87       	std	Z+8, r17	; 0x08
+    222c:	91 e0       	ldi	r25, 0x01	; 1
+    222e:	61 11       	cpse	r22, r1
+    2230:	04 c0       	rjmp	.+8      	; 0x223a <udd_ep_run+0x8a>
+    2232:	e1 14       	cp	r14, r1
+    2234:	f1 04       	cpc	r15, r1
+    2236:	09 f0       	breq	.+2      	; 0x223a <udd_ep_run+0x8a>
+    2238:	90 e0       	ldi	r25, 0x00	; 0
+    223a:	d4 01       	movw	r26, r8
+    223c:	8c 91       	ld	r24, X
+    223e:	90 fb       	bst	r25, 0
+    2240:	81 f9       	bld	r24, 1
+    2242:	8b 7f       	andi	r24, 0xFB	; 251
+    2244:	8c 93       	st	X, r24
+    2246:	d7 fe       	sbrs	r13, 7
+    2248:	04 c0       	rjmp	.+8      	; 0x2252 <udd_ep_run+0xa2>
+    224a:	f9 01       	movw	r30, r18
+    224c:	16 82       	std	Z+6, r1	; 0x06
+    224e:	17 82       	std	Z+7, r1	; 0x07
+    2250:	29 c0       	rjmp	.+82     	; 0x22a4 <udd_ep_run+0xf4>
+    2252:	d9 01       	movw	r26, r18
+    2254:	11 96       	adiw	r26, 0x01	; 1
+    2256:	8c 91       	ld	r24, X
+    2258:	11 97       	sbiw	r26, 0x01	; 1
+    225a:	80 7c       	andi	r24, 0xC0	; 192
+    225c:	80 3c       	cpi	r24, 0xC0	; 192
+    225e:	c9 f4       	brne	.+50     	; 0x2292 <udd_ep_run+0xe2>
+    2260:	11 96       	adiw	r26, 0x01	; 1
+    2262:	ec 91       	ld	r30, X
+    2264:	e7 70       	andi	r30, 0x07	; 7
+    2266:	e1 50       	subi	r30, 0x01	; 1
+    2268:	e7 30       	cpi	r30, 0x07	; 7
+    226a:	40 f4       	brcc	.+16     	; 0x227c <udd_ep_run+0xcc>
+    226c:	f0 e0       	ldi	r31, 0x00	; 0
+    226e:	ee 0f       	add	r30, r30
+    2270:	ff 1f       	adc	r31, r31
+    2272:	ee 54       	subi	r30, 0x4E	; 78
+    2274:	ff 4d       	sbci	r31, 0xDF	; 223
+    2276:	60 81       	ld	r22, Z
+    2278:	71 81       	ldd	r23, Z+1	; 0x01
+    227a:	02 c0       	rjmp	.+4      	; 0x2280 <udd_ep_run+0xd0>
+    227c:	68 e0       	ldi	r22, 0x08	; 8
+    227e:	70 e0       	ldi	r23, 0x00	; 0
+    2280:	c7 01       	movw	r24, r14
+    2282:	f3 d1       	rcall	.+998    	; 0x266a <__udivmodhi4>
+    2284:	89 2b       	or	r24, r25
+    2286:	29 f0       	breq	.+10     	; 0x2292 <udd_ep_run+0xe2>
+    2288:	f4 01       	movw	r30, r8
+    228a:	80 81       	ld	r24, Z
+    228c:	8e 7f       	andi	r24, 0xFE	; 254
+    228e:	80 83       	st	Z, r24
+    2290:	0d c0       	rjmp	.+26     	; 0x22ac <udd_ep_run+0xfc>
+    2292:	d9 01       	movw	r26, r18
+    2294:	12 96       	adiw	r26, 0x02	; 2
+    2296:	1d 92       	st	X+, r1
+    2298:	1c 92       	st	X, r1
+    229a:	13 97       	sbiw	r26, 0x03	; 3
+    229c:	16 96       	adiw	r26, 0x06	; 6
+    229e:	1d 92       	st	X+, r1
+    22a0:	1c 92       	st	X, r1
+    22a2:	17 97       	sbiw	r26, 0x07	; 7
+    22a4:	8d 2d       	mov	r24, r13
+    22a6:	8d dc       	rcall	.-1766   	; 0x1bc2 <udd_ep_trans_complet>
+    22a8:	81 e0       	ldi	r24, 0x01	; 1
+    22aa:	01 c0       	rjmp	.+2      	; 0x22ae <udd_ep_run+0xfe>
+    22ac:	80 e0       	ldi	r24, 0x00	; 0
+    22ae:	0f 90       	pop	r0
+    22b0:	df 91       	pop	r29
+    22b2:	cf 91       	pop	r28
+    22b4:	1f 91       	pop	r17
+    22b6:	0f 91       	pop	r16
+    22b8:	ff 90       	pop	r15
+    22ba:	ef 90       	pop	r14
+    22bc:	df 90       	pop	r13
+    22be:	bf 90       	pop	r11
+    22c0:	af 90       	pop	r10
+    22c2:	9f 90       	pop	r9
+    22c4:	8f 90       	pop	r8
+    22c6:	08 95       	ret
 
-00002432 <__vector_126>:
-    2432:	1f 92       	push	r1
-    2434:	0f 92       	push	r0
-    2436:	0f b6       	in	r0, 0x3f	; 63
-    2438:	0f 92       	push	r0
-    243a:	11 24       	eor	r1, r1
-    243c:	0f 93       	push	r16
-    243e:	1f 93       	push	r17
-    2440:	2f 93       	push	r18
-    2442:	3f 93       	push	r19
-    2444:	4f 93       	push	r20
-    2446:	5f 93       	push	r21
-    2448:	6f 93       	push	r22
-    244a:	7f 93       	push	r23
-    244c:	8f 93       	push	r24
-    244e:	9f 93       	push	r25
-    2450:	af 93       	push	r26
-    2452:	bf 93       	push	r27
-    2454:	cf 93       	push	r28
-    2456:	df 93       	push	r29
-    2458:	ef 93       	push	r30
-    245a:	ff 93       	push	r31
-    245c:	80 91 cc 04 	lds	r24, 0x04CC	; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc>
-    2460:	81 ff       	sbrs	r24, 1
-    2462:	1a c0       	rjmp	.+52     	; 0x2498 <__vector_126+0x66>
-    2464:	82 e0       	ldi	r24, 0x02	; 2
-    2466:	80 93 cc 04 	sts	0x04CC, r24	; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc>
-    246a:	80 91 c5 04 	lds	r24, 0x04C5	; 0x8004c5 <__TEXT_REGION_LENGTH__+0x7004c5>
-    246e:	81 95       	neg	r24
-    2470:	88 0f       	add	r24, r24
-    2472:	e0 e2       	ldi	r30, 0x20	; 32
-    2474:	f2 e2       	ldi	r31, 0x22	; 34
-    2476:	e8 1b       	sub	r30, r24
-    2478:	f1 09       	sbc	r31, r1
-    247a:	20 81       	ld	r18, Z
-    247c:	31 81       	ldd	r19, Z+1	; 0x01
-    247e:	20 52       	subi	r18, 0x20	; 32
-    2480:	32 42       	sbci	r19, 0x22	; 34
-    2482:	83 e0       	ldi	r24, 0x03	; 3
-    2484:	36 95       	lsr	r19
-    2486:	27 95       	ror	r18
-    2488:	8a 95       	dec	r24
-    248a:	e1 f7       	brne	.-8      	; 0x2484 <__vector_126+0x52>
-    248c:	82 2f       	mov	r24, r18
-    248e:	86 95       	lsr	r24
-    2490:	20 fd       	sbrc	r18, 0
-    2492:	06 c0       	rjmp	.+12     	; 0x24a0 <__vector_126+0x6e>
-    2494:	c0 e0       	ldi	r28, 0x00	; 0
-    2496:	05 c0       	rjmp	.+10     	; 0x24a2 <__vector_126+0x70>
-    2498:	b1 dc       	rcall	.-1694   	; 0x1dfc <udd_ctrl_interrupt_tc_setup>
-    249a:	88 23       	and	r24, r24
-    249c:	19 f3       	breq	.-58     	; 0x2464 <__vector_126+0x32>
-    249e:	86 c0       	rjmp	.+268    	; 0x25ac <__vector_126+0x17a>
-    24a0:	c0 e8       	ldi	r28, 0x80	; 128
-    24a2:	c8 0f       	add	r28, r24
-    24a4:	8c 2f       	mov	r24, r28
-    24a6:	c7 da       	rcall	.-2674   	; 0x1a36 <udd_ep_get_ctrl>
-    24a8:	fc 01       	movw	r30, r24
-    24aa:	20 81       	ld	r18, Z
-    24ac:	25 ff       	sbrs	r18, 5
-    24ae:	7e c0       	rjmp	.+252    	; 0x25ac <__vector_126+0x17a>
-    24b0:	00 e2       	ldi	r16, 0x20	; 32
-    24b2:	06 93       	lac	Z, r16
-    24b4:	c1 11       	cpse	r28, r1
-    24b6:	74 c0       	rjmp	.+232    	; 0x25a0 <__vector_126+0x16e>
-    24b8:	80 91 0d 22 	lds	r24, 0x220D	; 0x80220d <udd_ep_control_state>
-    24bc:	84 30       	cpi	r24, 0x04	; 4
-    24be:	19 f4       	brne	.+6      	; 0x24c6 <__vector_126+0x94>
-    24c0:	14 db       	rcall	.-2520   	; 0x1aea <udd_ctrl_endofrequest>
-    24c2:	d0 da       	rcall	.-2656   	; 0x1a64 <udd_ctrl_init>
-    24c4:	73 c0       	rjmp	.+230    	; 0x25ac <__vector_126+0x17a>
-    24c6:	00 91 22 22 	lds	r16, 0x2222	; 0x802222 <udd_sram+0x12>
-    24ca:	10 91 23 22 	lds	r17, 0x2223	; 0x802223 <udd_sram+0x13>
-    24ce:	80 91 74 24 	lds	r24, 0x2474	; 0x802474 <udd_g_ctrlreq+0xa>
-    24d2:	90 91 75 24 	lds	r25, 0x2475	; 0x802475 <udd_g_ctrlreq+0xb>
-    24d6:	c0 91 09 22 	lds	r28, 0x2209	; 0x802209 <udd_ctrl_payload_nb_trans>
-    24da:	d0 91 0a 22 	lds	r29, 0x220A	; 0x80220a <udd_ctrl_payload_nb_trans+0x1>
-    24de:	9e 01       	movw	r18, r28
-    24e0:	20 0f       	add	r18, r16
-    24e2:	31 1f       	adc	r19, r17
-    24e4:	82 17       	cp	r24, r18
-    24e6:	93 07       	cpc	r25, r19
-    24e8:	18 f4       	brcc	.+6      	; 0x24f0 <__vector_126+0xbe>
-    24ea:	8c 01       	movw	r16, r24
-    24ec:	0c 1b       	sub	r16, r28
-    24ee:	1d 0b       	sbc	r17, r29
-    24f0:	80 91 72 24 	lds	r24, 0x2472	; 0x802472 <udd_g_ctrlreq+0x8>
-    24f4:	90 91 73 24 	lds	r25, 0x2473	; 0x802473 <udd_g_ctrlreq+0x9>
-    24f8:	a8 01       	movw	r20, r16
-    24fa:	69 ec       	ldi	r22, 0xC9	; 201
-    24fc:	71 e2       	ldi	r23, 0x21	; 33
-    24fe:	8c 0f       	add	r24, r28
-    2500:	9d 1f       	adc	r25, r29
-    2502:	83 d0       	rcall	.+262    	; 0x260a <memcpy>
-    2504:	c0 0f       	add	r28, r16
-    2506:	d1 1f       	adc	r29, r17
-    2508:	c0 93 09 22 	sts	0x2209, r28	; 0x802209 <udd_ctrl_payload_nb_trans>
-    250c:	d0 93 0a 22 	sts	0x220A, r29	; 0x80220a <udd_ctrl_payload_nb_trans+0x1>
-    2510:	00 34       	cpi	r16, 0x40	; 64
-    2512:	11 05       	cpc	r17, r1
-    2514:	69 f4       	brne	.+26     	; 0x2530 <__vector_126+0xfe>
-    2516:	80 91 0b 22 	lds	r24, 0x220B	; 0x80220b <udd_ctrl_prev_payload_nb_trans>
-    251a:	90 91 0c 22 	lds	r25, 0x220C	; 0x80220c <udd_ctrl_prev_payload_nb_trans+0x1>
-    251e:	8c 0f       	add	r24, r28
-    2520:	9d 1f       	adc	r25, r29
-    2522:	20 91 70 24 	lds	r18, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
-    2526:	30 91 71 24 	lds	r19, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
-    252a:	82 17       	cp	r24, r18
-    252c:	93 07       	cpc	r25, r19
-    252e:	88 f0       	brcs	.+34     	; 0x2552 <__vector_126+0x120>
-    2530:	c0 93 74 24 	sts	0x2474, r28	; 0x802474 <udd_g_ctrlreq+0xa>
-    2534:	d0 93 75 24 	sts	0x2475, r29	; 0x802475 <udd_g_ctrlreq+0xb>
-    2538:	e0 91 78 24 	lds	r30, 0x2478	; 0x802478 <udd_g_ctrlreq+0xe>
-    253c:	f0 91 79 24 	lds	r31, 0x2479	; 0x802479 <udd_g_ctrlreq+0xf>
-    2540:	30 97       	sbiw	r30, 0x00	; 0
-    2542:	29 f0       	breq	.+10     	; 0x254e <__vector_126+0x11c>
-    2544:	09 95       	icall
-    2546:	81 11       	cpse	r24, r1
-    2548:	02 c0       	rjmp	.+4      	; 0x254e <__vector_126+0x11c>
-    254a:	b3 da       	rcall	.-2714   	; 0x1ab2 <udd_ctrl_stall_data>
-    254c:	2f c0       	rjmp	.+94     	; 0x25ac <__vector_126+0x17a>
-    254e:	bf da       	rcall	.-2690   	; 0x1ace <udd_ctrl_send_zlp_in>
-    2550:	2d c0       	rjmp	.+90     	; 0x25ac <__vector_126+0x17a>
-    2552:	80 91 74 24 	lds	r24, 0x2474	; 0x802474 <udd_g_ctrlreq+0xa>
-    2556:	90 91 75 24 	lds	r25, 0x2475	; 0x802475 <udd_g_ctrlreq+0xb>
-    255a:	8c 17       	cp	r24, r28
-    255c:	9d 07       	cpc	r25, r29
-    255e:	d9 f4       	brne	.+54     	; 0x2596 <__vector_126+0x164>
-    2560:	e0 91 78 24 	lds	r30, 0x2478	; 0x802478 <udd_g_ctrlreq+0xe>
-    2564:	f0 91 79 24 	lds	r31, 0x2479	; 0x802479 <udd_g_ctrlreq+0xf>
-    2568:	30 97       	sbiw	r30, 0x00	; 0
-    256a:	79 f3       	breq	.-34     	; 0x254a <__vector_126+0x118>
-    256c:	09 95       	icall
-    256e:	88 23       	and	r24, r24
-    2570:	61 f3       	breq	.-40     	; 0x254a <__vector_126+0x118>
-    2572:	20 91 0b 22 	lds	r18, 0x220B	; 0x80220b <udd_ctrl_prev_payload_nb_trans>
-    2576:	30 91 0c 22 	lds	r19, 0x220C	; 0x80220c <udd_ctrl_prev_payload_nb_trans+0x1>
-    257a:	80 91 09 22 	lds	r24, 0x2209	; 0x802209 <udd_ctrl_payload_nb_trans>
-    257e:	90 91 0a 22 	lds	r25, 0x220A	; 0x80220a <udd_ctrl_payload_nb_trans+0x1>
-    2582:	82 0f       	add	r24, r18
-    2584:	93 1f       	adc	r25, r19
-    2586:	80 93 0b 22 	sts	0x220B, r24	; 0x80220b <udd_ctrl_prev_payload_nb_trans>
-    258a:	90 93 0c 22 	sts	0x220C, r25	; 0x80220c <udd_ctrl_prev_payload_nb_trans+0x1>
-    258e:	10 92 09 22 	sts	0x2209, r1	; 0x802209 <udd_ctrl_payload_nb_trans>
-    2592:	10 92 0a 22 	sts	0x220A, r1	; 0x80220a <udd_ctrl_payload_nb_trans+0x1>
-    2596:	e0 e2       	ldi	r30, 0x20	; 32
-    2598:	f2 e2       	ldi	r31, 0x22	; 34
-    259a:	02 e0       	ldi	r16, 0x02	; 2
-    259c:	06 93       	lac	Z, r16
-    259e:	06 c0       	rjmp	.+12     	; 0x25ac <__vector_126+0x17a>
-    25a0:	c0 38       	cpi	r28, 0x80	; 128
-    25a2:	11 f4       	brne	.+4      	; 0x25a8 <__vector_126+0x176>
-    25a4:	bd db       	rcall	.-2182   	; 0x1d20 <udd_ctrl_in_sent>
-    25a6:	02 c0       	rjmp	.+4      	; 0x25ac <__vector_126+0x17a>
-    25a8:	8c 2f       	mov	r24, r28
-    25aa:	c1 da       	rcall	.-2686   	; 0x1b2e <udd_ep_trans_complet>
-    25ac:	ff 91       	pop	r31
-    25ae:	ef 91       	pop	r30
-    25b0:	df 91       	pop	r29
-    25b2:	cf 91       	pop	r28
-    25b4:	bf 91       	pop	r27
-    25b6:	af 91       	pop	r26
-    25b8:	9f 91       	pop	r25
-    25ba:	8f 91       	pop	r24
-    25bc:	7f 91       	pop	r23
-    25be:	6f 91       	pop	r22
-    25c0:	5f 91       	pop	r21
-    25c2:	4f 91       	pop	r20
-    25c4:	3f 91       	pop	r19
-    25c6:	2f 91       	pop	r18
-    25c8:	1f 91       	pop	r17
-    25ca:	0f 91       	pop	r16
-    25cc:	0f 90       	pop	r0
-    25ce:	0f be       	out	0x3f, r0	; 63
-    25d0:	0f 90       	pop	r0
-    25d2:	1f 90       	pop	r1
-    25d4:	18 95       	reti
+000022c8 <udd_ep_abort>:
+    22c8:	ef 92       	push	r14
+    22ca:	ff 92       	push	r15
+    22cc:	0f 93       	push	r16
+    22ce:	cf 93       	push	r28
+    22d0:	c8 2f       	mov	r28, r24
+    22d2:	fb db       	rcall	.-2058   	; 0x1aca <udd_ep_get_ctrl>
+    22d4:	7c 01       	movw	r14, r24
+    22d6:	8c 2f       	mov	r24, r28
+    22d8:	5a dc       	rcall	.-1868   	; 0x1b8e <udd_ep_get_job>
+    22da:	dc 01       	movw	r26, r24
+    22dc:	f7 01       	movw	r30, r14
+    22de:	02 e0       	ldi	r16, 0x02	; 2
+    22e0:	05 93       	las	Z, r16
+    22e2:	9c 91       	ld	r25, X
+    22e4:	90 ff       	sbrs	r25, 0
+    22e6:	1b c0       	rjmp	.+54     	; 0x231e <udd_ep_abort+0x56>
+    22e8:	9e 7f       	andi	r25, 0xFE	; 254
+    22ea:	9c 93       	st	X, r25
+    22ec:	17 96       	adiw	r26, 0x07	; 7
+    22ee:	ed 91       	ld	r30, X+
+    22f0:	fc 91       	ld	r31, X
+    22f2:	18 97       	sbiw	r26, 0x08	; 8
+    22f4:	30 97       	sbiw	r30, 0x00	; 0
+    22f6:	99 f0       	breq	.+38     	; 0x231e <udd_ep_abort+0x56>
+    22f8:	d7 01       	movw	r26, r14
+    22fa:	c7 ff       	sbrs	r28, 7
+    22fc:	05 c0       	rjmp	.+10     	; 0x2308 <udd_ep_abort+0x40>
+    22fe:	16 96       	adiw	r26, 0x06	; 6
+    2300:	6d 91       	ld	r22, X+
+    2302:	7c 91       	ld	r23, X
+    2304:	17 97       	sbiw	r26, 0x07	; 7
+    2306:	04 c0       	rjmp	.+8      	; 0x2310 <udd_ep_abort+0x48>
+    2308:	12 96       	adiw	r26, 0x02	; 2
+    230a:	6d 91       	ld	r22, X+
+    230c:	7c 91       	ld	r23, X
+    230e:	13 97       	sbiw	r26, 0x03	; 3
+    2310:	4c 2f       	mov	r20, r28
+    2312:	81 e0       	ldi	r24, 0x01	; 1
+    2314:	cf 91       	pop	r28
+    2316:	0f 91       	pop	r16
+    2318:	ff 90       	pop	r15
+    231a:	ef 90       	pop	r14
+    231c:	09 94       	ijmp
+    231e:	cf 91       	pop	r28
+    2320:	0f 91       	pop	r16
+    2322:	ff 90       	pop	r15
+    2324:	ef 90       	pop	r14
+    2326:	08 95       	ret
 
-000025d6 <__udivmodhi4>:
-    25d6:	aa 1b       	sub	r26, r26
-    25d8:	bb 1b       	sub	r27, r27
-    25da:	51 e1       	ldi	r21, 0x11	; 17
-    25dc:	07 c0       	rjmp	.+14     	; 0x25ec <__udivmodhi4_ep>
+00002328 <udd_ep_free>:
+    2328:	cf 93       	push	r28
+    232a:	c8 2f       	mov	r28, r24
+    232c:	cd df       	rcall	.-102    	; 0x22c8 <udd_ep_abort>
+    232e:	8c 2f       	mov	r24, r28
+    2330:	cc db       	rcall	.-2152   	; 0x1aca <udd_ep_get_ctrl>
+    2332:	fc 01       	movw	r30, r24
+    2334:	11 82       	std	Z+1, r1	; 0x01
+    2336:	cf 91       	pop	r28
+    2338:	08 95       	ret
 
-000025de <__udivmodhi4_loop>:
-    25de:	aa 1f       	adc	r26, r26
-    25e0:	bb 1f       	adc	r27, r27
-    25e2:	a6 17       	cp	r26, r22
-    25e4:	b7 07       	cpc	r27, r23
-    25e6:	10 f0       	brcs	.+4      	; 0x25ec <__udivmodhi4_ep>
-    25e8:	a6 1b       	sub	r26, r22
-    25ea:	b7 0b       	sbc	r27, r23
+0000233a <udd_ep_set_halt>:
+    233a:	0f 93       	push	r16
+    233c:	cf 93       	push	r28
+    233e:	c8 2f       	mov	r28, r24
+    2340:	c4 db       	rcall	.-2168   	; 0x1aca <udd_ep_get_ctrl>
+    2342:	fc 01       	movw	r30, r24
+    2344:	91 81       	ldd	r25, Z+1	; 0x01
+    2346:	94 60       	ori	r25, 0x04	; 4
+    2348:	91 83       	std	Z+1, r25	; 0x01
+    234a:	01 e0       	ldi	r16, 0x01	; 1
+    234c:	06 93       	lac	Z, r16
+    234e:	8c 2f       	mov	r24, r28
+    2350:	bb df       	rcall	.-138    	; 0x22c8 <udd_ep_abort>
+    2352:	81 e0       	ldi	r24, 0x01	; 1
+    2354:	cf 91       	pop	r28
+    2356:	0f 91       	pop	r16
+    2358:	08 95       	ret
 
-000025ec <__udivmodhi4_ep>:
-    25ec:	88 1f       	adc	r24, r24
-    25ee:	99 1f       	adc	r25, r25
-    25f0:	5a 95       	dec	r21
-    25f2:	a9 f7       	brne	.-22     	; 0x25de <__udivmodhi4_loop>
-    25f4:	80 95       	com	r24
-    25f6:	90 95       	com	r25
-    25f8:	bc 01       	movw	r22, r24
-    25fa:	cd 01       	movw	r24, r26
-    25fc:	08 95       	ret
+0000235a <__vector_125>:
+    235a:	1f 92       	push	r1
+    235c:	0f 92       	push	r0
+    235e:	0f b6       	in	r0, 0x3f	; 63
+    2360:	0f 92       	push	r0
+    2362:	11 24       	eor	r1, r1
+    2364:	0f 93       	push	r16
+    2366:	2f 93       	push	r18
+    2368:	3f 93       	push	r19
+    236a:	4f 93       	push	r20
+    236c:	5f 93       	push	r21
+    236e:	6f 93       	push	r22
+    2370:	7f 93       	push	r23
+    2372:	8f 93       	push	r24
+    2374:	9f 93       	push	r25
+    2376:	af 93       	push	r26
+    2378:	bf 93       	push	r27
+    237a:	ef 93       	push	r30
+    237c:	ff 93       	push	r31
+    237e:	80 91 cb 04 	lds	r24, 0x04CB	; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb>
+    2382:	87 ff       	sbrs	r24, 7
+    2384:	08 c0       	rjmp	.+16     	; 0x2396 <__vector_125+0x3c>
+    2386:	80 e8       	ldi	r24, 0x80	; 128
+    2388:	80 93 ca 04 	sts	0x04CA, r24	; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca>
+    238c:	0e 94 bb 09 	call	0x1376	; 0x1376 <udc_sof_notify>
+    2390:	0e 94 a0 01 	call	0x340	; 0x340 <main_sof_action>
+    2394:	86 c0       	rjmp	.+268    	; 0x24a2 <__vector_125+0x148>
+    2396:	80 91 cb 04 	lds	r24, 0x04CB	; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb>
+    239a:	82 ff       	sbrs	r24, 2
+    239c:	18 c0       	rjmp	.+48     	; 0x23ce <__vector_125+0x74>
+    239e:	84 e0       	ldi	r24, 0x04	; 4
+    23a0:	80 93 ca 04 	sts	0x04CA, r24	; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca>
+    23a4:	80 91 28 22 	lds	r24, 0x2228	; 0x802228 <udd_sram+0x18>
+    23a8:	86 ff       	sbrs	r24, 6
+    23aa:	7b c0       	rjmp	.+246    	; 0x24a2 <__vector_125+0x148>
+    23ac:	80 91 cc 04 	lds	r24, 0x04CC	; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc>
+    23b0:	81 fd       	sbrc	r24, 1
+    23b2:	77 c0       	rjmp	.+238    	; 0x24a2 <__vector_125+0x148>
+    23b4:	6d dd       	rcall	.-1318   	; 0x1e90 <udd_ctrl_interrupt_tc_setup>
+    23b6:	81 11       	cpse	r24, r1
+    23b8:	74 c0       	rjmp	.+232    	; 0x24a2 <__vector_125+0x148>
+    23ba:	80 91 0d 22 	lds	r24, 0x220D	; 0x80220d <udd_ep_control_state>
+    23be:	81 30       	cpi	r24, 0x01	; 1
+    23c0:	11 f4       	brne	.+4      	; 0x23c6 <__vector_125+0x6c>
+    23c2:	cf db       	rcall	.-2146   	; 0x1b62 <udd_ctrl_send_zlp_in>
+    23c4:	6e c0       	rjmp	.+220    	; 0x24a2 <__vector_125+0x148>
+    23c6:	84 30       	cpi	r24, 0x04	; 4
+    23c8:	09 f0       	breq	.+2      	; 0x23cc <__vector_125+0x72>
+    23ca:	6b c0       	rjmp	.+214    	; 0x24a2 <__vector_125+0x148>
+    23cc:	21 c0       	rjmp	.+66     	; 0x2410 <__vector_125+0xb6>
+    23ce:	80 91 cb 04 	lds	r24, 0x04CB	; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb>
+    23d2:	81 ff       	sbrs	r24, 1
+    23d4:	26 c0       	rjmp	.+76     	; 0x2422 <__vector_125+0xc8>
+    23d6:	82 e0       	ldi	r24, 0x02	; 2
+    23d8:	80 93 ca 04 	sts	0x04CA, r24	; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca>
+    23dc:	80 91 20 22 	lds	r24, 0x2220	; 0x802220 <udd_sram+0x10>
+    23e0:	86 ff       	sbrs	r24, 6
+    23e2:	5f c0       	rjmp	.+190    	; 0x24a2 <__vector_125+0x148>
+    23e4:	80 91 cc 04 	lds	r24, 0x04CC	; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc>
+    23e8:	81 fd       	sbrc	r24, 1
+    23ea:	5b c0       	rjmp	.+182    	; 0x24a2 <__vector_125+0x148>
+    23ec:	51 dd       	rcall	.-1374   	; 0x1e90 <udd_ctrl_interrupt_tc_setup>
+    23ee:	81 11       	cpse	r24, r1
+    23f0:	58 c0       	rjmp	.+176    	; 0x24a2 <__vector_125+0x148>
+    23f2:	80 91 0d 22 	lds	r24, 0x220D	; 0x80220d <udd_ep_control_state>
+    23f6:	82 30       	cpi	r24, 0x02	; 2
+    23f8:	41 f4       	brne	.+16     	; 0x240a <__vector_125+0xb0>
+    23fa:	84 e0       	ldi	r24, 0x04	; 4
+    23fc:	80 93 0d 22 	sts	0x220D, r24	; 0x80220d <udd_ep_control_state>
+    2400:	e0 e2       	ldi	r30, 0x20	; 32
+    2402:	f2 e2       	ldi	r31, 0x22	; 34
+    2404:	02 e0       	ldi	r16, 0x02	; 2
+    2406:	06 93       	lac	Z, r16
+    2408:	4c c0       	rjmp	.+152    	; 0x24a2 <__vector_125+0x148>
+    240a:	83 30       	cpi	r24, 0x03	; 3
+    240c:	09 f0       	breq	.+2      	; 0x2410 <__vector_125+0xb6>
+    240e:	49 c0       	rjmp	.+146    	; 0x24a2 <__vector_125+0x148>
+    2410:	e9 e2       	ldi	r30, 0x29	; 41
+    2412:	f2 e2       	ldi	r31, 0x22	; 34
+    2414:	04 e0       	ldi	r16, 0x04	; 4
+    2416:	05 93       	las	Z, r16
+    2418:	e1 e2       	ldi	r30, 0x21	; 33
+    241a:	f2 e2       	ldi	r31, 0x22	; 34
+    241c:	04 e0       	ldi	r16, 0x04	; 4
+    241e:	05 93       	las	Z, r16
+    2420:	40 c0       	rjmp	.+128    	; 0x24a2 <__vector_125+0x148>
+    2422:	80 91 cb 04 	lds	r24, 0x04CB	; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb>
+    2426:	84 ff       	sbrs	r24, 4
+    2428:	25 c0       	rjmp	.+74     	; 0x2474 <__vector_125+0x11a>
+    242a:	80 e1       	ldi	r24, 0x10	; 16
+    242c:	80 93 ca 04 	sts	0x04CA, r24	; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca>
+    2430:	81 e0       	ldi	r24, 0x01	; 1
+    2432:	4a df       	rcall	.-364    	; 0x22c8 <udd_ep_abort>
+    2434:	81 e8       	ldi	r24, 0x81	; 129
+    2436:	48 df       	rcall	.-368    	; 0x22c8 <udd_ep_abort>
+    2438:	82 e0       	ldi	r24, 0x02	; 2
+    243a:	46 df       	rcall	.-372    	; 0x22c8 <udd_ep_abort>
+    243c:	82 e8       	ldi	r24, 0x82	; 130
+    243e:	44 df       	rcall	.-376    	; 0x22c8 <udd_ep_abort>
+    2440:	0e 94 9f 09 	call	0x133e	; 0x133e <udc_reset>
+    2444:	10 92 c3 04 	sts	0x04C3, r1	; 0x8004c3 <__TEXT_REGION_LENGTH__+0x7004c3>
+    2448:	10 92 21 22 	sts	0x2221, r1	; 0x802221 <udd_sram+0x11>
+    244c:	96 e0       	ldi	r25, 0x06	; 6
+    244e:	90 93 20 22 	sts	0x2220, r25	; 0x802220 <udd_sram+0x10>
+    2452:	83 e4       	ldi	r24, 0x43	; 67
+    2454:	80 93 21 22 	sts	0x2221, r24	; 0x802221 <udd_sram+0x11>
+    2458:	10 92 29 22 	sts	0x2229, r1	; 0x802229 <udd_sram+0x19>
+    245c:	90 93 28 22 	sts	0x2228, r25	; 0x802228 <udd_sram+0x18>
+    2460:	80 93 29 22 	sts	0x2229, r24	; 0x802229 <udd_sram+0x19>
+    2464:	89 ec       	ldi	r24, 0xC9	; 201
+    2466:	91 e2       	ldi	r25, 0x21	; 33
+    2468:	80 93 24 22 	sts	0x2224, r24	; 0x802224 <udd_sram+0x14>
+    246c:	90 93 25 22 	sts	0x2225, r25	; 0x802225 <udd_sram+0x15>
+    2470:	43 db       	rcall	.-2426   	; 0x1af8 <udd_ctrl_init>
+    2472:	17 c0       	rjmp	.+46     	; 0x24a2 <__vector_125+0x148>
+    2474:	80 91 cb 04 	lds	r24, 0x04CB	; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb>
+    2478:	86 ff       	sbrs	r24, 6
+    247a:	08 c0       	rjmp	.+16     	; 0x248c <__vector_125+0x132>
+    247c:	80 e4       	ldi	r24, 0x40	; 64
+    247e:	80 93 ca 04 	sts	0x04CA, r24	; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca>
+    2482:	80 e0       	ldi	r24, 0x00	; 0
+    2484:	0f db       	rcall	.-2530   	; 0x1aa4 <udd_sleep_mode>
+    2486:	0e 94 9e 01 	call	0x33c	; 0x33c <main_suspend_action>
+    248a:	0b c0       	rjmp	.+22     	; 0x24a2 <__vector_125+0x148>
+    248c:	80 91 cb 04 	lds	r24, 0x04CB	; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb>
+    2490:	85 ff       	sbrs	r24, 5
+    2492:	07 c0       	rjmp	.+14     	; 0x24a2 <__vector_125+0x148>
+    2494:	80 e2       	ldi	r24, 0x20	; 32
+    2496:	80 93 ca 04 	sts	0x04CA, r24	; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca>
+    249a:	81 e0       	ldi	r24, 0x01	; 1
+    249c:	03 db       	rcall	.-2554   	; 0x1aa4 <udd_sleep_mode>
+    249e:	0e 94 9f 01 	call	0x33e	; 0x33e <main_resume_action>
+    24a2:	ff 91       	pop	r31
+    24a4:	ef 91       	pop	r30
+    24a6:	bf 91       	pop	r27
+    24a8:	af 91       	pop	r26
+    24aa:	9f 91       	pop	r25
+    24ac:	8f 91       	pop	r24
+    24ae:	7f 91       	pop	r23
+    24b0:	6f 91       	pop	r22
+    24b2:	5f 91       	pop	r21
+    24b4:	4f 91       	pop	r20
+    24b6:	3f 91       	pop	r19
+    24b8:	2f 91       	pop	r18
+    24ba:	0f 91       	pop	r16
+    24bc:	0f 90       	pop	r0
+    24be:	0f be       	out	0x3f, r0	; 63
+    24c0:	0f 90       	pop	r0
+    24c2:	1f 90       	pop	r1
+    24c4:	18 95       	reti
 
-000025fe <__tablejump2__>:
-    25fe:	ee 0f       	add	r30, r30
-    2600:	ff 1f       	adc	r31, r31
-    2602:	05 90       	lpm	r0, Z+
-    2604:	f4 91       	lpm	r31, Z
-    2606:	e0 2d       	mov	r30, r0
-    2608:	09 94       	ijmp
+000024c6 <__vector_126>:
+    24c6:	1f 92       	push	r1
+    24c8:	0f 92       	push	r0
+    24ca:	0f b6       	in	r0, 0x3f	; 63
+    24cc:	0f 92       	push	r0
+    24ce:	11 24       	eor	r1, r1
+    24d0:	0f 93       	push	r16
+    24d2:	1f 93       	push	r17
+    24d4:	2f 93       	push	r18
+    24d6:	3f 93       	push	r19
+    24d8:	4f 93       	push	r20
+    24da:	5f 93       	push	r21
+    24dc:	6f 93       	push	r22
+    24de:	7f 93       	push	r23
+    24e0:	8f 93       	push	r24
+    24e2:	9f 93       	push	r25
+    24e4:	af 93       	push	r26
+    24e6:	bf 93       	push	r27
+    24e8:	cf 93       	push	r28
+    24ea:	df 93       	push	r29
+    24ec:	ef 93       	push	r30
+    24ee:	ff 93       	push	r31
+    24f0:	80 91 cc 04 	lds	r24, 0x04CC	; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc>
+    24f4:	81 ff       	sbrs	r24, 1
+    24f6:	1a c0       	rjmp	.+52     	; 0x252c <__vector_126+0x66>
+    24f8:	82 e0       	ldi	r24, 0x02	; 2
+    24fa:	80 93 cc 04 	sts	0x04CC, r24	; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc>
+    24fe:	80 91 c5 04 	lds	r24, 0x04C5	; 0x8004c5 <__TEXT_REGION_LENGTH__+0x7004c5>
+    2502:	81 95       	neg	r24
+    2504:	88 0f       	add	r24, r24
+    2506:	e0 e2       	ldi	r30, 0x20	; 32
+    2508:	f2 e2       	ldi	r31, 0x22	; 34
+    250a:	e8 1b       	sub	r30, r24
+    250c:	f1 09       	sbc	r31, r1
+    250e:	20 81       	ld	r18, Z
+    2510:	31 81       	ldd	r19, Z+1	; 0x01
+    2512:	20 52       	subi	r18, 0x20	; 32
+    2514:	32 42       	sbci	r19, 0x22	; 34
+    2516:	83 e0       	ldi	r24, 0x03	; 3
+    2518:	36 95       	lsr	r19
+    251a:	27 95       	ror	r18
+    251c:	8a 95       	dec	r24
+    251e:	e1 f7       	brne	.-8      	; 0x2518 <__vector_126+0x52>
+    2520:	82 2f       	mov	r24, r18
+    2522:	86 95       	lsr	r24
+    2524:	20 fd       	sbrc	r18, 0
+    2526:	06 c0       	rjmp	.+12     	; 0x2534 <__vector_126+0x6e>
+    2528:	c0 e0       	ldi	r28, 0x00	; 0
+    252a:	05 c0       	rjmp	.+10     	; 0x2536 <__vector_126+0x70>
+    252c:	b1 dc       	rcall	.-1694   	; 0x1e90 <udd_ctrl_interrupt_tc_setup>
+    252e:	88 23       	and	r24, r24
+    2530:	19 f3       	breq	.-58     	; 0x24f8 <__vector_126+0x32>
+    2532:	86 c0       	rjmp	.+268    	; 0x2640 <__vector_126+0x17a>
+    2534:	c0 e8       	ldi	r28, 0x80	; 128
+    2536:	c8 0f       	add	r28, r24
+    2538:	8c 2f       	mov	r24, r28
+    253a:	c7 da       	rcall	.-2674   	; 0x1aca <udd_ep_get_ctrl>
+    253c:	fc 01       	movw	r30, r24
+    253e:	20 81       	ld	r18, Z
+    2540:	25 ff       	sbrs	r18, 5
+    2542:	7e c0       	rjmp	.+252    	; 0x2640 <__vector_126+0x17a>
+    2544:	00 e2       	ldi	r16, 0x20	; 32
+    2546:	06 93       	lac	Z, r16
+    2548:	c1 11       	cpse	r28, r1
+    254a:	74 c0       	rjmp	.+232    	; 0x2634 <__vector_126+0x16e>
+    254c:	80 91 0d 22 	lds	r24, 0x220D	; 0x80220d <udd_ep_control_state>
+    2550:	84 30       	cpi	r24, 0x04	; 4
+    2552:	19 f4       	brne	.+6      	; 0x255a <__vector_126+0x94>
+    2554:	14 db       	rcall	.-2520   	; 0x1b7e <udd_ctrl_endofrequest>
+    2556:	d0 da       	rcall	.-2656   	; 0x1af8 <udd_ctrl_init>
+    2558:	73 c0       	rjmp	.+230    	; 0x2640 <__vector_126+0x17a>
+    255a:	00 91 22 22 	lds	r16, 0x2222	; 0x802222 <udd_sram+0x12>
+    255e:	10 91 23 22 	lds	r17, 0x2223	; 0x802223 <udd_sram+0x13>
+    2562:	80 91 74 24 	lds	r24, 0x2474	; 0x802474 <udd_g_ctrlreq+0xa>
+    2566:	90 91 75 24 	lds	r25, 0x2475	; 0x802475 <udd_g_ctrlreq+0xb>
+    256a:	c0 91 09 22 	lds	r28, 0x2209	; 0x802209 <udd_ctrl_payload_nb_trans>
+    256e:	d0 91 0a 22 	lds	r29, 0x220A	; 0x80220a <udd_ctrl_payload_nb_trans+0x1>
+    2572:	9e 01       	movw	r18, r28
+    2574:	20 0f       	add	r18, r16
+    2576:	31 1f       	adc	r19, r17
+    2578:	82 17       	cp	r24, r18
+    257a:	93 07       	cpc	r25, r19
+    257c:	18 f4       	brcc	.+6      	; 0x2584 <__vector_126+0xbe>
+    257e:	8c 01       	movw	r16, r24
+    2580:	0c 1b       	sub	r16, r28
+    2582:	1d 0b       	sbc	r17, r29
+    2584:	80 91 72 24 	lds	r24, 0x2472	; 0x802472 <udd_g_ctrlreq+0x8>
+    2588:	90 91 73 24 	lds	r25, 0x2473	; 0x802473 <udd_g_ctrlreq+0x9>
+    258c:	a8 01       	movw	r20, r16
+    258e:	69 ec       	ldi	r22, 0xC9	; 201
+    2590:	71 e2       	ldi	r23, 0x21	; 33
+    2592:	8c 0f       	add	r24, r28
+    2594:	9d 1f       	adc	r25, r29
+    2596:	83 d0       	rcall	.+262    	; 0x269e <memcpy>
+    2598:	c0 0f       	add	r28, r16
+    259a:	d1 1f       	adc	r29, r17
+    259c:	c0 93 09 22 	sts	0x2209, r28	; 0x802209 <udd_ctrl_payload_nb_trans>
+    25a0:	d0 93 0a 22 	sts	0x220A, r29	; 0x80220a <udd_ctrl_payload_nb_trans+0x1>
+    25a4:	00 34       	cpi	r16, 0x40	; 64
+    25a6:	11 05       	cpc	r17, r1
+    25a8:	69 f4       	brne	.+26     	; 0x25c4 <__vector_126+0xfe>
+    25aa:	80 91 0b 22 	lds	r24, 0x220B	; 0x80220b <udd_ctrl_prev_payload_nb_trans>
+    25ae:	90 91 0c 22 	lds	r25, 0x220C	; 0x80220c <udd_ctrl_prev_payload_nb_trans+0x1>
+    25b2:	8c 0f       	add	r24, r28
+    25b4:	9d 1f       	adc	r25, r29
+    25b6:	20 91 70 24 	lds	r18, 0x2470	; 0x802470 <udd_g_ctrlreq+0x6>
+    25ba:	30 91 71 24 	lds	r19, 0x2471	; 0x802471 <udd_g_ctrlreq+0x7>
+    25be:	82 17       	cp	r24, r18
+    25c0:	93 07       	cpc	r25, r19
+    25c2:	88 f0       	brcs	.+34     	; 0x25e6 <__vector_126+0x120>
+    25c4:	c0 93 74 24 	sts	0x2474, r28	; 0x802474 <udd_g_ctrlreq+0xa>
+    25c8:	d0 93 75 24 	sts	0x2475, r29	; 0x802475 <udd_g_ctrlreq+0xb>
+    25cc:	e0 91 78 24 	lds	r30, 0x2478	; 0x802478 <udd_g_ctrlreq+0xe>
+    25d0:	f0 91 79 24 	lds	r31, 0x2479	; 0x802479 <udd_g_ctrlreq+0xf>
+    25d4:	30 97       	sbiw	r30, 0x00	; 0
+    25d6:	29 f0       	breq	.+10     	; 0x25e2 <__vector_126+0x11c>
+    25d8:	09 95       	icall
+    25da:	81 11       	cpse	r24, r1
+    25dc:	02 c0       	rjmp	.+4      	; 0x25e2 <__vector_126+0x11c>
+    25de:	b3 da       	rcall	.-2714   	; 0x1b46 <udd_ctrl_stall_data>
+    25e0:	2f c0       	rjmp	.+94     	; 0x2640 <__vector_126+0x17a>
+    25e2:	bf da       	rcall	.-2690   	; 0x1b62 <udd_ctrl_send_zlp_in>
+    25e4:	2d c0       	rjmp	.+90     	; 0x2640 <__vector_126+0x17a>
+    25e6:	80 91 74 24 	lds	r24, 0x2474	; 0x802474 <udd_g_ctrlreq+0xa>
+    25ea:	90 91 75 24 	lds	r25, 0x2475	; 0x802475 <udd_g_ctrlreq+0xb>
+    25ee:	8c 17       	cp	r24, r28
+    25f0:	9d 07       	cpc	r25, r29
+    25f2:	d9 f4       	brne	.+54     	; 0x262a <__vector_126+0x164>
+    25f4:	e0 91 78 24 	lds	r30, 0x2478	; 0x802478 <udd_g_ctrlreq+0xe>
+    25f8:	f0 91 79 24 	lds	r31, 0x2479	; 0x802479 <udd_g_ctrlreq+0xf>
+    25fc:	30 97       	sbiw	r30, 0x00	; 0
+    25fe:	79 f3       	breq	.-34     	; 0x25de <__vector_126+0x118>
+    2600:	09 95       	icall
+    2602:	88 23       	and	r24, r24
+    2604:	61 f3       	breq	.-40     	; 0x25de <__vector_126+0x118>
+    2606:	20 91 0b 22 	lds	r18, 0x220B	; 0x80220b <udd_ctrl_prev_payload_nb_trans>
+    260a:	30 91 0c 22 	lds	r19, 0x220C	; 0x80220c <udd_ctrl_prev_payload_nb_trans+0x1>
+    260e:	80 91 09 22 	lds	r24, 0x2209	; 0x802209 <udd_ctrl_payload_nb_trans>
+    2612:	90 91 0a 22 	lds	r25, 0x220A	; 0x80220a <udd_ctrl_payload_nb_trans+0x1>
+    2616:	82 0f       	add	r24, r18
+    2618:	93 1f       	adc	r25, r19
+    261a:	80 93 0b 22 	sts	0x220B, r24	; 0x80220b <udd_ctrl_prev_payload_nb_trans>
+    261e:	90 93 0c 22 	sts	0x220C, r25	; 0x80220c <udd_ctrl_prev_payload_nb_trans+0x1>
+    2622:	10 92 09 22 	sts	0x2209, r1	; 0x802209 <udd_ctrl_payload_nb_trans>
+    2626:	10 92 0a 22 	sts	0x220A, r1	; 0x80220a <udd_ctrl_payload_nb_trans+0x1>
+    262a:	e0 e2       	ldi	r30, 0x20	; 32
+    262c:	f2 e2       	ldi	r31, 0x22	; 34
+    262e:	02 e0       	ldi	r16, 0x02	; 2
+    2630:	06 93       	lac	Z, r16
+    2632:	06 c0       	rjmp	.+12     	; 0x2640 <__vector_126+0x17a>
+    2634:	c0 38       	cpi	r28, 0x80	; 128
+    2636:	11 f4       	brne	.+4      	; 0x263c <__vector_126+0x176>
+    2638:	bd db       	rcall	.-2182   	; 0x1db4 <udd_ctrl_in_sent>
+    263a:	02 c0       	rjmp	.+4      	; 0x2640 <__vector_126+0x17a>
+    263c:	8c 2f       	mov	r24, r28
+    263e:	c1 da       	rcall	.-2686   	; 0x1bc2 <udd_ep_trans_complet>
+    2640:	ff 91       	pop	r31
+    2642:	ef 91       	pop	r30
+    2644:	df 91       	pop	r29
+    2646:	cf 91       	pop	r28
+    2648:	bf 91       	pop	r27
+    264a:	af 91       	pop	r26
+    264c:	9f 91       	pop	r25
+    264e:	8f 91       	pop	r24
+    2650:	7f 91       	pop	r23
+    2652:	6f 91       	pop	r22
+    2654:	5f 91       	pop	r21
+    2656:	4f 91       	pop	r20
+    2658:	3f 91       	pop	r19
+    265a:	2f 91       	pop	r18
+    265c:	1f 91       	pop	r17
+    265e:	0f 91       	pop	r16
+    2660:	0f 90       	pop	r0
+    2662:	0f be       	out	0x3f, r0	; 63
+    2664:	0f 90       	pop	r0
+    2666:	1f 90       	pop	r1
+    2668:	18 95       	reti
 
-0000260a <memcpy>:
-    260a:	fb 01       	movw	r30, r22
-    260c:	dc 01       	movw	r26, r24
-    260e:	02 c0       	rjmp	.+4      	; 0x2614 <memcpy+0xa>
-    2610:	01 90       	ld	r0, Z+
-    2612:	0d 92       	st	X+, r0
-    2614:	41 50       	subi	r20, 0x01	; 1
-    2616:	50 40       	sbci	r21, 0x00	; 0
-    2618:	d8 f7       	brcc	.-10     	; 0x2610 <memcpy+0x6>
-    261a:	08 95       	ret
+0000266a <__udivmodhi4>:
+    266a:	aa 1b       	sub	r26, r26
+    266c:	bb 1b       	sub	r27, r27
+    266e:	51 e1       	ldi	r21, 0x11	; 17
+    2670:	07 c0       	rjmp	.+14     	; 0x2680 <__udivmodhi4_ep>
 
-0000261c <_exit>:
-    261c:	f8 94       	cli
+00002672 <__udivmodhi4_loop>:
+    2672:	aa 1f       	adc	r26, r26
+    2674:	bb 1f       	adc	r27, r27
+    2676:	a6 17       	cp	r26, r22
+    2678:	b7 07       	cpc	r27, r23
+    267a:	10 f0       	brcs	.+4      	; 0x2680 <__udivmodhi4_ep>
+    267c:	a6 1b       	sub	r26, r22
+    267e:	b7 0b       	sbc	r27, r23
 
-0000261e <__stop_program>:
-    261e:	ff cf       	rjmp	.-2      	; 0x261e <__stop_program>
+00002680 <__udivmodhi4_ep>:
+    2680:	88 1f       	adc	r24, r24
+    2682:	99 1f       	adc	r25, r25
+    2684:	5a 95       	dec	r21
+    2686:	a9 f7       	brne	.-22     	; 0x2672 <__udivmodhi4_loop>
+    2688:	80 95       	com	r24
+    268a:	90 95       	com	r25
+    268c:	bc 01       	movw	r22, r24
+    268e:	cd 01       	movw	r24, r26
+    2690:	08 95       	ret
+
+00002692 <__tablejump2__>:
+    2692:	ee 0f       	add	r30, r30
+    2694:	ff 1f       	adc	r31, r31
+    2696:	05 90       	lpm	r0, Z+
+    2698:	f4 91       	lpm	r31, Z
+    269a:	e0 2d       	mov	r30, r0
+    269c:	09 94       	ijmp
+
+0000269e <memcpy>:
+    269e:	fb 01       	movw	r30, r22
+    26a0:	dc 01       	movw	r26, r24
+    26a2:	02 c0       	rjmp	.+4      	; 0x26a8 <memcpy+0xa>
+    26a4:	01 90       	ld	r0, Z+
+    26a6:	0d 92       	st	X+, r0
+    26a8:	41 50       	subi	r20, 0x01	; 1
+    26aa:	50 40       	sbci	r21, 0x00	; 0
+    26ac:	d8 f7       	brcc	.-10     	; 0x26a4 <memcpy+0x6>
+    26ae:	08 95       	ret
+
+000026b0 <_exit>:
+    26b0:	f8 94       	cli
+
+000026b2 <__stop_program>:
+    26b2:	ff cf       	rjmp	.-2      	; 0x26b2 <__stop_program>
diff --git a/AVR Code/USB_BULK_TEST/Release/USB_BULK_TEST.map b/AVR Code/USB_BULK_TEST/Release/USB_BULK_TEST.map
index dc9eb51f..85eaef69 100644
--- a/AVR Code/USB_BULK_TEST/Release/USB_BULK_TEST.map	
+++ b/AVR Code/USB_BULK_TEST/Release/USB_BULK_TEST.map	
@@ -399,7 +399,7 @@ END GROUP
 .rela.plt
  *(.rela.plt)
 
-.text           0x00000000     0x2620
+.text           0x00000000     0x26b4
  *(.vectors)
  .vectors       0x00000000      0x1fc C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/XMEGAA_DFP/1.0.39/gcc/dev/atxmega32a4u/avrxmega2/crtatxmega32a4u.o
                 0x00000000                __vector_default
@@ -408,46 +408,48 @@ END GROUP
  *(.progmem.gcc*)
  .progmem.gcc_sw_table.main_sof_action
                 0x000001fc       0x10 src/main.o
+ .progmem.gcc_sw_table.__vector_6
+                0x0000020c       0x10 src/tiny_dma.o
  .progmem.gcc_sw_table.udc_process_setup
-                0x0000020c       0x30 src/ASF/common/services/usb/udc/udc.o
-                0x0000023c                . = ALIGN (0x2)
-                0x0000023c                __trampolines_start = .
+                0x0000021c       0x30 src/ASF/common/services/usb/udc/udc.o
+                0x0000024c                . = ALIGN (0x2)
+                0x0000024c                __trampolines_start = .
  *(.trampolines)
- .trampolines   0x0000023c        0x0 linker stubs
+ .trampolines   0x0000024c        0x0 linker stubs
  *(.trampolines*)
-                0x0000023c                __trampolines_end = .
+                0x0000024c                __trampolines_end = .
  *libprintf_flt.a:*(.progmem.data)
  *libc.a:*(.progmem.data)
  *(.progmem*)
-                0x0000023c                . = ALIGN (0x2)
+                0x0000024c                . = ALIGN (0x2)
  *(.jumptables)
  *(.jumptables*)
  *(.lowtext)
  *(.lowtext*)
-                0x0000023c                __ctors_start = .
+                0x0000024c                __ctors_start = .
  *(.ctors)
-                0x0000023c                __ctors_end = .
-                0x0000023c                __dtors_start = .
+                0x0000024c                __ctors_end = .
+                0x0000024c                __dtors_start = .
  *(.dtors)
-                0x0000023c                __dtors_end = .
+                0x0000024c                __dtors_end = .
  SORT(*)(.ctors)
  SORT(*)(.dtors)
  *(.init0)
- .init0         0x0000023c        0x0 C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/XMEGAA_DFP/1.0.39/gcc/dev/atxmega32a4u/avrxmega2/crtatxmega32a4u.o
-                0x0000023c                __init
+ .init0         0x0000024c        0x0 C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/XMEGAA_DFP/1.0.39/gcc/dev/atxmega32a4u/avrxmega2/crtatxmega32a4u.o
+                0x0000024c                __init
  *(.init0)
  *(.init1)
  *(.init1)
  *(.init2)
- .init2         0x0000023c        0xc C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/XMEGAA_DFP/1.0.39/gcc/dev/atxmega32a4u/avrxmega2/crtatxmega32a4u.o
+ .init2         0x0000024c        0xc C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/XMEGAA_DFP/1.0.39/gcc/dev/atxmega32a4u/avrxmega2/crtatxmega32a4u.o
  *(.init2)
  *(.init3)
  *(.init3)
  *(.init4)
- .init4         0x00000248       0x16 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_copy_data.o)
-                0x00000248                __do_copy_data
- .init4         0x0000025e       0x10 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_clear_bss.o)
-                0x0000025e                __do_clear_bss
+ .init4         0x00000258       0x16 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_copy_data.o)
+                0x00000258                __do_copy_data
+ .init4         0x0000026e       0x10 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_clear_bss.o)
+                0x0000026e                __do_clear_bss
  *(.init4)
  *(.init5)
  *(.init5)
@@ -458,406 +460,408 @@ END GROUP
  *(.init8)
  *(.init8)
  *(.init9)
- .init9         0x0000026e        0x6 C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/XMEGAA_DFP/1.0.39/gcc/dev/atxmega32a4u/avrxmega2/crtatxmega32a4u.o
+ .init9         0x0000027e        0x6 C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/XMEGAA_DFP/1.0.39/gcc/dev/atxmega32a4u/avrxmega2/crtatxmega32a4u.o
  *(.init9)
  *(.text)
- .text          0x00000274        0x2 C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/XMEGAA_DFP/1.0.39/gcc/dev/atxmega32a4u/avrxmega2/crtatxmega32a4u.o
-                0x00000274                __vector_38
-                0x00000274                __vector_104
-                0x00000274                __vector_22
-                0x00000274                __vector_63
-                0x00000274                __vector_28
-                0x00000274                __vector_67
-                0x00000274                __vector_1
-                0x00000274                __vector_119
-                0x00000274                __vector_32
-                0x00000274                __vector_75
-                0x00000274                __vector_71
-                0x00000274                __vector_91
-                0x00000274                __vector_34
-                0x00000274                __vector_62
-                0x00000274                __vector_77
-                0x00000274                __vector_102
-                0x00000274                __vector_12
-                0x00000274                __vector_55
-                0x00000274                __vector_69
-                0x00000274                __vector_81
-                0x00000274                __vector_90
-                0x00000274                __vector_46
-                0x00000274                __bad_interrupt
-                0x00000274                __vector_122
-                0x00000274                __vector_72
-                0x00000274                __vector_114
-                0x00000274                __vector_110
-                0x00000274                __vector_31
-                0x00000274                __vector_92
-                0x00000274                __vector_35
-                0x00000274                __vector_78
-                0x00000274                __vector_74
-                0x00000274                __vector_117
-                0x00000274                __vector_39
-                0x00000274                __vector_107
-                0x00000274                __vector_3
-                0x00000274                __vector_105
-                0x00000274                __vector_98
-                0x00000274                __vector_23
-                0x00000274                __vector_68
-                0x00000274                __vector_30
-                0x00000274                __vector_73
-                0x00000274                __vector_45
-                0x00000274                __vector_25
-                0x00000274                __vector_93
-                0x00000274                __vector_61
-                0x00000274                __vector_11
-                0x00000274                __vector_54
-                0x00000274                __vector_99
-                0x00000274                __vector_13
-                0x00000274                __vector_17
-                0x00000274                __vector_19
-                0x00000274                __vector_56
-                0x00000274                __vector_49
-                0x00000274                __vector_123
-                0x00000274                __vector_41
-                0x00000274                __vector_86
-                0x00000274                __vector_100
-                0x00000274                __vector_101
-                0x00000274                __vector_64
-                0x00000274                __vector_88
-                0x00000274                __vector_109
-                0x00000274                __vector_43
-                0x00000274                __vector_27
-                0x00000274                __vector_5
-                0x00000274                __vector_113
-                0x00000274                __vector_33
-                0x00000274                __vector_76
-                0x00000274                __vector_115
-                0x00000274                __vector_47
-                0x00000274                __vector_52
-                0x00000274                __vector_37
-                0x00000274                __vector_95
-                0x00000274                __vector_103
-                0x00000274                __vector_96
-                0x00000274                __vector_89
-                0x00000274                __vector_108
-                0x00000274                __vector_4
-                0x00000274                __vector_44
-                0x00000274                __vector_82
-                0x00000274                __vector_106
-                0x00000274                __vector_118
-                0x00000274                __vector_51
-                0x00000274                __vector_2
-                0x00000274                __vector_21
-                0x00000274                __vector_15
-                0x00000274                __vector_66
-                0x00000274                __vector_36
-                0x00000274                __vector_79
-                0x00000274                __vector_58
-                0x00000274                __vector_70
-                0x00000274                __vector_29
-                0x00000274                __vector_60
-                0x00000274                __vector_121
-                0x00000274                __vector_40
-                0x00000274                __vector_85
-                0x00000274                __vector_94
-                0x00000274                __vector_8
-                0x00000274                __vector_26
-                0x00000274                __vector_48
-                0x00000274                __vector_124
-                0x00000274                __vector_116
-                0x00000274                __vector_112
-                0x00000274                __vector_111
-                0x00000274                __vector_80
-                0x00000274                __vector_14
-                0x00000274                __vector_84
-                0x00000274                __vector_57
-                0x00000274                __vector_53
-                0x00000274                __vector_10
-                0x00000274                __vector_50
-                0x00000274                __vector_16
-                0x00000274                __vector_59
-                0x00000274                __vector_18
-                0x00000274                __vector_97
-                0x00000274                __vector_20
-                0x00000274                __vector_42
-                0x00000274                __vector_87
-                0x00000274                __vector_65
-                0x00000274                __vector_120
-                0x00000276                . = ALIGN (0x2)
+ .text          0x00000284        0x2 C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/XMEGAA_DFP/1.0.39/gcc/dev/atxmega32a4u/avrxmega2/crtatxmega32a4u.o
+                0x00000284                __vector_38
+                0x00000284                __vector_104
+                0x00000284                __vector_22
+                0x00000284                __vector_63
+                0x00000284                __vector_28
+                0x00000284                __vector_67
+                0x00000284                __vector_1
+                0x00000284                __vector_119
+                0x00000284                __vector_32
+                0x00000284                __vector_75
+                0x00000284                __vector_71
+                0x00000284                __vector_91
+                0x00000284                __vector_34
+                0x00000284                __vector_62
+                0x00000284                __vector_77
+                0x00000284                __vector_102
+                0x00000284                __vector_12
+                0x00000284                __vector_55
+                0x00000284                __vector_69
+                0x00000284                __vector_81
+                0x00000284                __vector_90
+                0x00000284                __vector_46
+                0x00000284                __bad_interrupt
+                0x00000284                __vector_122
+                0x00000284                __vector_72
+                0x00000284                __vector_114
+                0x00000284                __vector_110
+                0x00000284                __vector_31
+                0x00000284                __vector_92
+                0x00000284                __vector_35
+                0x00000284                __vector_78
+                0x00000284                __vector_74
+                0x00000284                __vector_117
+                0x00000284                __vector_39
+                0x00000284                __vector_107
+                0x00000284                __vector_3
+                0x00000284                __vector_105
+                0x00000284                __vector_98
+                0x00000284                __vector_23
+                0x00000284                __vector_68
+                0x00000284                __vector_30
+                0x00000284                __vector_73
+                0x00000284                __vector_45
+                0x00000284                __vector_25
+                0x00000284                __vector_93
+                0x00000284                __vector_61
+                0x00000284                __vector_11
+                0x00000284                __vector_54
+                0x00000284                __vector_99
+                0x00000284                __vector_13
+                0x00000284                __vector_17
+                0x00000284                __vector_19
+                0x00000284                __vector_56
+                0x00000284                __vector_49
+                0x00000284                __vector_123
+                0x00000284                __vector_41
+                0x00000284                __vector_86
+                0x00000284                __vector_100
+                0x00000284                __vector_101
+                0x00000284                __vector_64
+                0x00000284                __vector_88
+                0x00000284                __vector_109
+                0x00000284                __vector_43
+                0x00000284                __vector_27
+                0x00000284                __vector_5
+                0x00000284                __vector_113
+                0x00000284                __vector_33
+                0x00000284                __vector_76
+                0x00000284                __vector_115
+                0x00000284                __vector_47
+                0x00000284                __vector_52
+                0x00000284                __vector_37
+                0x00000284                __vector_95
+                0x00000284                __vector_103
+                0x00000284                __vector_96
+                0x00000284                __vector_89
+                0x00000284                __vector_108
+                0x00000284                __vector_4
+                0x00000284                __vector_44
+                0x00000284                __vector_82
+                0x00000284                __vector_106
+                0x00000284                __vector_118
+                0x00000284                __vector_51
+                0x00000284                __vector_2
+                0x00000284                __vector_21
+                0x00000284                __vector_15
+                0x00000284                __vector_66
+                0x00000284                __vector_36
+                0x00000284                __vector_79
+                0x00000284                __vector_58
+                0x00000284                __vector_70
+                0x00000284                __vector_29
+                0x00000284                __vector_60
+                0x00000284                __vector_121
+                0x00000284                __vector_40
+                0x00000284                __vector_85
+                0x00000284                __vector_94
+                0x00000284                __vector_26
+                0x00000284                __vector_48
+                0x00000284                __vector_124
+                0x00000284                __vector_116
+                0x00000284                __vector_112
+                0x00000284                __vector_111
+                0x00000284                __vector_80
+                0x00000284                __vector_14
+                0x00000284                __vector_84
+                0x00000284                __vector_57
+                0x00000284                __vector_53
+                0x00000284                __vector_10
+                0x00000284                __vector_50
+                0x00000284                __vector_16
+                0x00000284                __vector_59
+                0x00000284                __vector_18
+                0x00000284                __vector_97
+                0x00000284                __vector_20
+                0x00000284                __vector_42
+                0x00000284                __vector_87
+                0x00000284                __vector_65
+                0x00000284                __vector_120
+                0x00000286                . = ALIGN (0x2)
  *(.text.*)
  .text.tiny_dig_setup
-                0x00000276        0xe src/tiny_dig.o
-                0x00000276                tiny_dig_setup
+                0x00000286        0xe src/tiny_dig.o
+                0x00000286                tiny_dig_setup
  .text.board_init
-                0x00000284        0x2 src/ASF/common/boards/user_board/init.o
-                0x00000284                board_init
+                0x00000294        0x2 src/ASF/common/boards/user_board/init.o
+                0x00000294                board_init
  .text.iso_callback
-                0x00000286       0x20 src/main.o
-                0x00000286                iso_callback
+                0x00000296       0x20 src/main.o
+                0x00000296                iso_callback
  .text.iso_callback2
-                0x000002a6       0x20 src/main.o
-                0x000002a6                iso_callback2
+                0x000002b6       0x20 src/main.o
+                0x000002b6                iso_callback2
  .text.iso_callback3
-                0x000002c6       0x20 src/main.o
-                0x000002c6                iso_callback3
+                0x000002d6       0x20 src/main.o
+                0x000002d6                iso_callback3
  .text.startup.main
-                0x000002e6       0x28 src/main.o
-                0x000002e6                main
+                0x000002f6       0x46 src/main.o
+                0x000002f6                main
  .text.main_suspend_action
-                0x0000030e        0x2 src/main.o
-                0x0000030e                main_suspend_action
+                0x0000033c        0x2 src/main.o
+                0x0000033c                main_suspend_action
  .text.main_resume_action
-                0x00000310        0x2 src/main.o
-                0x00000310                main_resume_action
+                0x0000033e        0x2 src/main.o
+                0x0000033e                main_resume_action
  .text.main_sof_action
-                0x00000312       0x42 src/main.o
-                0x00000312                main_sof_action
+                0x00000340       0x42 src/main.o
+                0x00000340                main_sof_action
  .text.main_vendor_enable
-                0x00000354       0x34 src/main.o
-                0x00000354                main_vendor_enable
+                0x00000382       0x34 src/main.o
+                0x00000382                main_vendor_enable
  .text.main_vendor_disable
-                0x00000388        0x6 src/main.o
-                0x00000388                main_vendor_disable
+                0x000003b6        0x6 src/main.o
+                0x000003b6                main_vendor_disable
  .text.main_setup_out_received
-                0x0000038e        0x4 src/main.o
-                0x0000038e                main_setup_out_received
+                0x000003bc        0x4 src/main.o
+                0x000003bc                main_setup_out_received
  .text.main_setup_in_received
-                0x00000392        0x4 src/main.o
-                0x00000392                main_setup_in_received
+                0x000003c0        0x4 src/main.o
+                0x000003c0                main_setup_in_received
  .text.tiny_adc_ch0setup
-                0x00000396       0x2c src/tiny_adc.o
-                0x00000396                tiny_adc_ch0setup
+                0x000003c4       0x2c src/tiny_adc.o
+                0x000003c4                tiny_adc_ch0setup
  .text.tiny_adc_ch1setup
-                0x000003c2       0x14 src/tiny_adc.o
-                0x000003c2                tiny_adc_ch1setup
+                0x000003f0       0x14 src/tiny_adc.o
+                0x000003f0                tiny_adc_ch1setup
  .text.tiny_adc_pid_setup
-                0x000003d6       0x14 src/tiny_adc.o
-                0x000003d6                tiny_adc_pid_setup
+                0x00000404       0x14 src/tiny_adc.o
+                0x00000404                tiny_adc_pid_setup
  .text.ReadCalibrationByte
-                0x000003ea       0x12 src/tiny_adc.o
-                0x000003ea                ReadCalibrationByte
+                0x00000418       0x12 src/tiny_adc.o
+                0x00000418                ReadCalibrationByte
  .text.tiny_adc_setup
-                0x000003fc       0x5e src/tiny_adc.o
-                0x000003fc                tiny_adc_setup
+                0x0000042a       0x5e src/tiny_adc.o
+                0x0000042a                tiny_adc_setup
  .text.tiny_dac_setup
-                0x0000045a       0x48 src/tiny_dac.o
-                0x0000045a                tiny_dac_setup
+                0x00000488       0x48 src/tiny_dac.o
+                0x00000488                tiny_dac_setup
  .text.tiny_dma_setup
-                0x000004a2       0x12 src/tiny_dma.o
-                0x000004a2                tiny_dma_setup
+                0x000004d0       0x12 src/tiny_dma.o
+                0x000004d0                tiny_dma_setup
  .text.tiny_dma_flush
-                0x000004b4       0x20 src/tiny_dma.o
-                0x000004b4                tiny_dma_flush
+                0x000004e2       0x20 src/tiny_dma.o
+                0x000004e2                tiny_dma_flush
  .text.tiny_dma_set_mode_0
-                0x000004d4       0xe6 src/tiny_dma.o
-                0x000004d4                tiny_dma_set_mode_0
+                0x00000502       0xe6 src/tiny_dma.o
+                0x00000502                tiny_dma_set_mode_0
  .text.tiny_dma_loop_mode_0
-                0x000005ba        0x2 src/tiny_dma.o
-                0x000005ba                tiny_dma_loop_mode_0
+                0x000005e8        0x2 src/tiny_dma.o
+                0x000005e8                tiny_dma_loop_mode_0
  .text.tiny_dma_set_mode_1
-                0x000005bc       0xf0 src/tiny_dma.o
-                0x000005bc                tiny_dma_set_mode_1
+                0x000005ea       0xf0 src/tiny_dma.o
+                0x000005ea                tiny_dma_set_mode_1
  .text.tiny_dma_loop_mode_1
-                0x000006ac        0x2 src/tiny_dma.o
-                0x000006ac                tiny_dma_loop_mode_1
+                0x000006da        0x2 src/tiny_dma.o
+                0x000006da                tiny_dma_loop_mode_1
  .text.tiny_dma_set_mode_2
-                0x000006ae       0xe6 src/tiny_dma.o
-                0x000006ae                tiny_dma_set_mode_2
+                0x000006dc       0xe6 src/tiny_dma.o
+                0x000006dc                tiny_dma_set_mode_2
  .text.tiny_dma_loop_mode_2
-                0x00000794        0x2 src/tiny_dma.o
-                0x00000794                tiny_dma_loop_mode_2
+                0x000007c2        0x2 src/tiny_dma.o
+                0x000007c2                tiny_dma_loop_mode_2
  .text.tiny_dma_set_mode_3
-                0x00000796       0xf8 src/tiny_dma.o
-                0x00000796                tiny_dma_set_mode_3
+                0x000007c4       0xf8 src/tiny_dma.o
+                0x000007c4                tiny_dma_set_mode_3
  .text.tiny_dma_loop_mode_3
-                0x0000088e        0x2 src/tiny_dma.o
-                0x0000088e                tiny_dma_loop_mode_3
+                0x000008bc        0x2 src/tiny_dma.o
+                0x000008bc                tiny_dma_loop_mode_3
  .text.tiny_dma_set_mode_4
-                0x00000890       0xec src/tiny_dma.o
-                0x00000890                tiny_dma_set_mode_4
+                0x000008be       0xec src/tiny_dma.o
+                0x000008be                tiny_dma_set_mode_4
  .text.tiny_dma_loop_mode_4
-                0x0000097c        0x2 src/tiny_dma.o
-                0x0000097c                tiny_dma_loop_mode_4
+                0x000009aa        0x2 src/tiny_dma.o
+                0x000009aa                tiny_dma_loop_mode_4
  .text.tiny_dma_set_mode_5
-                0x0000097e       0x90 src/tiny_dma.o
-                0x0000097e                tiny_dma_set_mode_5
+                0x000009ac       0x90 src/tiny_dma.o
+                0x000009ac                tiny_dma_set_mode_5
  .text.tiny_dma_set_mode_6
-                0x00000a0e       0x92 src/tiny_dma.o
-                0x00000a0e                tiny_dma_set_mode_6
+                0x00000a3c       0xc4 src/tiny_dma.o
+                0x00000a3c                tiny_dma_set_mode_6
  .text.tiny_dma_loop_mode_6
-                0x00000aa0       0x5c src/tiny_dma.o
-                0x00000aa0                tiny_dma_loop_mode_6
+                0x00000b00        0x2 src/tiny_dma.o
+                0x00000b00                tiny_dma_loop_mode_6
  .text.tiny_dma_set_mode_7
-                0x00000afc       0x92 src/tiny_dma.o
-                0x00000afc                tiny_dma_set_mode_7
+                0x00000b02       0xc4 src/tiny_dma.o
+                0x00000b02                tiny_dma_set_mode_7
  .text.tiny_dma_loop_mode_7
-                0x00000b8e       0x5c src/tiny_dma.o
-                0x00000b8e                tiny_dma_loop_mode_7
+                0x00000bc6        0x2 src/tiny_dma.o
+                0x00000bc6                tiny_dma_loop_mode_7
  .text.__vector_6
-                0x00000bea       0x9e src/tiny_dma.o
-                0x00000bea                __vector_6
+                0x00000bc8       0xbc src/tiny_dma.o
+                0x00000bc8                __vector_6
  .text.__vector_7
-                0x00000c88       0x8e src/tiny_dma.o
-                0x00000c88                __vector_7
+                0x00000c84       0x8e src/tiny_dma.o
+                0x00000c84                __vector_7
+ .text.__vector_8
+                0x00000d12       0x82 src/tiny_dma.o
+                0x00000d12                __vector_8
  .text.__vector_9
-                0x00000d16       0x7c src/tiny_dma.o
-                0x00000d16                __vector_9
+                0x00000d94       0x82 src/tiny_dma.o
+                0x00000d94                __vector_9
  .text.tiny_timer_setup
-                0x00000d92       0x76 src/tiny_timer.o
-                0x00000d92                tiny_timer_setup
+                0x00000e16       0x84 src/tiny_timer.o
+                0x00000e16                tiny_timer_setup
  .text.__vector_83
-                0x00000e08       0xc0 src/tiny_timer.o
-                0x00000e08                __vector_83
+                0x00000e9a       0xc6 src/tiny_timer.o
+                0x00000e9a                __vector_83
  .text.tiny_uart_setup
-                0x00000ec8       0x34 src/tiny_uart.o
-                0x00000ec8                tiny_uart_setup
+                0x00000f60       0x30 src/tiny_uart.o
+                0x00000f60                tiny_uart_setup
  .text.tiny_spi_setup
-                0x00000efc       0x1e src/tiny_uart.o
-                0x00000efc                tiny_spi_setup
+                0x00000f90       0x1c src/tiny_uart.o
+                0x00000f90                tiny_spi_setup
  .text.__vector_24
-                0x00000f1a       0x16 src/tiny_uart.o
-                0x00000f1a                __vector_24
+                0x00000fac       0x16 src/tiny_uart.o
+                0x00000fac                __vector_24
  .text.osc_enable_autocalibration.constprop.4
-                0x00000f30       0x38 src/ASF/common/services/clock/xmega/sysclk.o
+                0x00000fc2       0x38 src/ASF/common/services/clock/xmega/sysclk.o
  .text.sysclk_init
-                0x00000f68       0xa6 src/ASF/common/services/clock/xmega/sysclk.o
-                0x00000f68                sysclk_init
+                0x00000ffa       0xa6 src/ASF/common/services/clock/xmega/sysclk.o
+                0x00000ffa                sysclk_init
  .text.sysclk_enable_module
-                0x0000100e       0x18 src/ASF/common/services/clock/xmega/sysclk.o
-                0x0000100e                sysclk_enable_module
+                0x000010a0       0x18 src/ASF/common/services/clock/xmega/sysclk.o
+                0x000010a0                sysclk_enable_module
  .text.sysclk_enable_usb
-                0x00001026       0x40 src/ASF/common/services/clock/xmega/sysclk.o
-                0x00001026                sysclk_enable_usb
+                0x000010b8       0x40 src/ASF/common/services/clock/xmega/sysclk.o
+                0x000010b8                sysclk_enable_usb
  .text.udi_vendor_getsetting
-                0x00001066        0x6 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
-                0x00001066                udi_vendor_getsetting
+                0x000010f8        0x6 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
+                0x000010f8                udi_vendor_getsetting
  .text.udi_vendor_disable
-                0x0000106c        0xc src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
-                0x0000106c                udi_vendor_disable
+                0x000010fe        0xc src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
+                0x000010fe                udi_vendor_disable
  .text.udi_vendor_enable
-                0x00001078       0x14 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
-                0x00001078                udi_vendor_enable
+                0x0000110a       0x14 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
+                0x0000110a                udi_vendor_enable
  .text.udi_vendor_setup
-                0x0000108c       0x38 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
-                0x0000108c                udi_vendor_setup
+                0x0000111e       0x38 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
+                0x0000111e                udi_vendor_setup
  .text.udi_vendor_iso_in_run
-                0x000010c4       0x18 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
-                0x000010c4                udi_vendor_iso_in_run
+                0x00001156       0x18 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
+                0x00001156                udi_vendor_iso_in_run
  .text.udi_vendor_iso_in_run2
-                0x000010dc       0x18 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
-                0x000010dc                udi_vendor_iso_in_run2
+                0x0000116e       0x18 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
+                0x0000116e                udi_vendor_iso_in_run2
  .text.udi_vendor_iso_in_run3
-                0x000010f4       0x18 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
-                0x000010f4                udi_vendor_iso_in_run3
+                0x00001186       0x18 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o
+                0x00001186                udi_vendor_iso_in_run3
  .text.udc_valid_address
-                0x0000110c        0x8 src/ASF/common/services/usb/udc/udc.o
+                0x0000119e        0x8 src/ASF/common/services/usb/udc/udc.o
  .text.udc_update_iface_desc
-                0x00001114       0x66 src/ASF/common/services/usb/udc/udc.o
+                0x000011a6       0x66 src/ASF/common/services/usb/udc/udc.o
  .text.udc_next_desc_in_iface.constprop.3
-                0x0000117a       0x40 src/ASF/common/services/usb/udc/udc.o
+                0x0000120c       0x40 src/ASF/common/services/usb/udc/udc.o
  .text.udc_iface_enable
-                0x000011ba       0x66 src/ASF/common/services/usb/udc/udc.o
+                0x0000124c       0x66 src/ASF/common/services/usb/udc/udc.o
  .text.udc_iface_disable
-                0x00001220       0x80 src/ASF/common/services/usb/udc/udc.o
+                0x000012b2       0x80 src/ASF/common/services/usb/udc/udc.o
  .text.udc_get_interface_desc
-                0x000012a0        0xa src/ASF/common/services/usb/udc/udc.o
-                0x000012a0                udc_get_interface_desc
+                0x00001332        0xa src/ASF/common/services/usb/udc/udc.o
+                0x00001332                udc_get_interface_desc
  .text.udc_start
-                0x000012aa        0x2 src/ASF/common/services/usb/udc/udc.o
-                0x000012aa                udc_start
+                0x0000133c        0x2 src/ASF/common/services/usb/udc/udc.o
+                0x0000133c                udc_start
  .text.udc_reset
-                0x000012ac       0x38 src/ASF/common/services/usb/udc/udc.o
-                0x000012ac                udc_reset
+                0x0000133e       0x38 src/ASF/common/services/usb/udc/udc.o
+                0x0000133e                udc_reset
  .text.udc_sof_notify
-                0x000012e4       0x4a src/ASF/common/services/usb/udc/udc.o
-                0x000012e4                udc_sof_notify
+                0x00001376       0x4a src/ASF/common/services/usb/udc/udc.o
+                0x00001376                udc_sof_notify
  .text.udc_process_setup
-                0x0000132e      0x686 src/ASF/common/services/usb/udc/udc.o
-                0x0000132e                udc_process_setup
+                0x000013c0      0x688 src/ASF/common/services/usb/udc/udc.o
+                0x000013c0                udc_process_setup
  .text.ccp_write_io
-                0x000019b4        0xc src/ASF/xmega/drivers/cpu/ccp.o
-                0x000019b4                ccp_write_io
+                0x00001a48        0xc src/ASF/xmega/drivers/cpu/ccp.o
+                0x00001a48                ccp_write_io
  .text.nvm_read_byte
-                0x000019c0       0x14 src/ASF/xmega/drivers/nvm/nvm_asm.o
-                0x000019c0                nvm_read_byte
+                0x00001a54       0x14 src/ASF/xmega/drivers/nvm/nvm_asm.o
+                0x00001a54                nvm_read_byte
  .text.sleepmgr_lock_mode
-                0x000019d4       0x1e src/ASF/xmega/drivers/usb/usb_device.o
+                0x00001a68       0x1e src/ASF/xmega/drivers/usb/usb_device.o
  .text.sleepmgr_unlock_mode
-                0x000019f2       0x1e src/ASF/xmega/drivers/usb/usb_device.o
+                0x00001a86       0x1e src/ASF/xmega/drivers/usb/usb_device.o
  .text.udd_sleep_mode
-                0x00001a10       0x26 src/ASF/xmega/drivers/usb/usb_device.o
+                0x00001aa4       0x26 src/ASF/xmega/drivers/usb/usb_device.o
  .text.udd_ep_get_ctrl
-                0x00001a36       0x2e src/ASF/xmega/drivers/usb/usb_device.o
+                0x00001aca       0x2e src/ASF/xmega/drivers/usb/usb_device.o
  .text.udd_ctrl_init
-                0x00001a64       0x4e src/ASF/xmega/drivers/usb/usb_device.o
+                0x00001af8       0x4e src/ASF/xmega/drivers/usb/usb_device.o
  .text.udd_ctrl_stall_data
-                0x00001ab2       0x1c src/ASF/xmega/drivers/usb/usb_device.o
+                0x00001b46       0x1c src/ASF/xmega/drivers/usb/usb_device.o
  .text.udd_ctrl_send_zlp_in
-                0x00001ace       0x1c src/ASF/xmega/drivers/usb/usb_device.o
+                0x00001b62       0x1c src/ASF/xmega/drivers/usb/usb_device.o
  .text.udd_ctrl_endofrequest
-                0x00001aea       0x10 src/ASF/xmega/drivers/usb/usb_device.o
+                0x00001b7e       0x10 src/ASF/xmega/drivers/usb/usb_device.o
  .text.udd_ep_get_job
-                0x00001afa       0x34 src/ASF/xmega/drivers/usb/usb_device.o
+                0x00001b8e       0x34 src/ASF/xmega/drivers/usb/usb_device.o
  .text.udd_ep_trans_complet
-                0x00001b2e      0x1f2 src/ASF/xmega/drivers/usb/usb_device.o
+                0x00001bc2      0x1f2 src/ASF/xmega/drivers/usb/usb_device.o
  .text.udd_ctrl_in_sent
-                0x00001d20       0xdc src/ASF/xmega/drivers/usb/usb_device.o
+                0x00001db4       0xdc src/ASF/xmega/drivers/usb/usb_device.o
  .text.udd_ctrl_interrupt_tc_setup
-                0x00001dfc       0xee src/ASF/xmega/drivers/usb/usb_device.o
+                0x00001e90       0xee src/ASF/xmega/drivers/usb/usb_device.o
  .text.udd_attach
-                0x00001eea       0x46 src/ASF/xmega/drivers/usb/usb_device.o
-                0x00001eea                udd_attach
+                0x00001f7e       0x46 src/ASF/xmega/drivers/usb/usb_device.o
+                0x00001f7e                udd_attach
  .text.udd_enable
-                0x00001f30       0xf0 src/ASF/xmega/drivers/usb/usb_device.o
-                0x00001f30                udd_enable
+                0x00001fc4       0xf0 src/ASF/xmega/drivers/usb/usb_device.o
+                0x00001fc4                udd_enable
  .text.udd_set_address
-                0x00002020        0x6 src/ASF/xmega/drivers/usb/usb_device.o
-                0x00002020                udd_set_address
+                0x000020b4        0x6 src/ASF/xmega/drivers/usb/usb_device.o
+                0x000020b4                udd_set_address
  .text.udd_getaddress
-                0x00002026        0x6 src/ASF/xmega/drivers/usb/usb_device.o
-                0x00002026                udd_getaddress
+                0x000020ba        0x6 src/ASF/xmega/drivers/usb/usb_device.o
+                0x000020ba                udd_getaddress
  .text.udd_set_setup_payload
-                0x0000202c        0xe src/ASF/xmega/drivers/usb/usb_device.o
-                0x0000202c                udd_set_setup_payload
+                0x000020c0        0xe src/ASF/xmega/drivers/usb/usb_device.o
+                0x000020c0                udd_set_setup_payload
  .text.udd_ep_alloc
-                0x0000203a       0xa2 src/ASF/xmega/drivers/usb/usb_device.o
-                0x0000203a                udd_ep_alloc
+                0x000020ce       0xa2 src/ASF/xmega/drivers/usb/usb_device.o
+                0x000020ce                udd_ep_alloc
  .text.udd_ep_is_halted
-                0x000020dc        0xe src/ASF/xmega/drivers/usb/usb_device.o
-                0x000020dc                udd_ep_is_halted
+                0x00002170        0xe src/ASF/xmega/drivers/usb/usb_device.o
+                0x00002170                udd_ep_is_halted
  .text.udd_ep_clear_halt
-                0x000020ea       0x32 src/ASF/xmega/drivers/usb/usb_device.o
-                0x000020ea                udd_ep_clear_halt
+                0x0000217e       0x32 src/ASF/xmega/drivers/usb/usb_device.o
+                0x0000217e                udd_ep_clear_halt
  .text.udd_ep_run
-                0x0000211c      0x118 src/ASF/xmega/drivers/usb/usb_device.o
-                0x0000211c                udd_ep_run
+                0x000021b0      0x118 src/ASF/xmega/drivers/usb/usb_device.o
+                0x000021b0                udd_ep_run
  .text.udd_ep_abort
-                0x00002234       0x60 src/ASF/xmega/drivers/usb/usb_device.o
-                0x00002234                udd_ep_abort
+                0x000022c8       0x60 src/ASF/xmega/drivers/usb/usb_device.o
+                0x000022c8                udd_ep_abort
  .text.udd_ep_free
-                0x00002294       0x12 src/ASF/xmega/drivers/usb/usb_device.o
-                0x00002294                udd_ep_free
+                0x00002328       0x12 src/ASF/xmega/drivers/usb/usb_device.o
+                0x00002328                udd_ep_free
  .text.udd_ep_set_halt
-                0x000022a6       0x20 src/ASF/xmega/drivers/usb/usb_device.o
-                0x000022a6                udd_ep_set_halt
+                0x0000233a       0x20 src/ASF/xmega/drivers/usb/usb_device.o
+                0x0000233a                udd_ep_set_halt
  .text.__vector_125
-                0x000022c6      0x16c src/ASF/xmega/drivers/usb/usb_device.o
-                0x000022c6                __vector_125
+                0x0000235a      0x16c src/ASF/xmega/drivers/usb/usb_device.o
+                0x0000235a                __vector_125
  .text.__vector_126
-                0x00002432      0x1a4 src/ASF/xmega/drivers/usb/usb_device.o
-                0x00002432                __vector_126
+                0x000024c6      0x1a4 src/ASF/xmega/drivers/usb/usb_device.o
+                0x000024c6                __vector_126
  .text.libgcc.div
-                0x000025d6       0x28 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_udivmodhi4.o)
-                0x000025d6                __udivmodhi4
- .text.libgcc   0x000025fe        0xc c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_tablejump2.o)
-                0x000025fe                __tablejump2__
+                0x0000266a       0x28 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_udivmodhi4.o)
+                0x0000266a                __udivmodhi4
+ .text.libgcc   0x00002692        0xc c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_tablejump2.o)
+                0x00002692                __tablejump2__
  .text.avr-libc
-                0x0000260a       0x12 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/../../../../avr/lib/avrxmega2\libc.a(memcpy.o)
-                0x0000260a                memcpy
-                0x0000261c                . = ALIGN (0x2)
+                0x0000269e       0x12 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/../../../../avr/lib/avrxmega2\libc.a(memcpy.o)
+                0x0000269e                memcpy
+                0x000026b0                . = ALIGN (0x2)
  *(.fini9)
- .fini9         0x0000261c        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_exit.o)
-                0x0000261c                _exit
-                0x0000261c                exit
+ .fini9         0x000026b0        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_exit.o)
+                0x000026b0                _exit
+                0x000026b0                exit
  *(.fini9)
  *(.fini8)
  *(.fini8)
@@ -876,11 +880,11 @@ END GROUP
  *(.fini1)
  *(.fini1)
  *(.fini0)
- .fini0         0x0000261c        0x4 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_exit.o)
+ .fini0         0x000026b0        0x4 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_exit.o)
  *(.fini0)
-                0x00002620                _etext = .
+                0x000026b4                _etext = .
 
-.data           0x00802000       0xc0 load address 0x00002620
+.data           0x00802000       0xc0 load address 0x000026b4
                 0x00802000                PROVIDE (__data_start, .)
  *(.data)
  *(.data*)
@@ -991,8 +995,8 @@ END GROUP
  COMMON         0x00802c56        0x6 src/ASF/common/services/sleepmgr/xmega/sleepmgr.o
                 0x00802c56                sleepmgr_locks
                 0x00802c5c                PROVIDE (__bss_end, .)
-                0x00002620                __data_load_start = LOADADDR (.data)
-                0x000026e0                __data_load_end = (__data_load_start + SIZEOF (.data))
+                0x000026b4                __data_load_start = LOADADDR (.data)
+                0x00002774                __data_load_end = (__data_load_start + SIZEOF (.data))
 
 .noinit         0x00802c5c        0x0
                 [!provide]                PROVIDE (__noinit_start, .)
diff --git a/AVR Code/USB_BULK_TEST/Release/USB_BULK_TEST.srec b/AVR Code/USB_BULK_TEST/Release/USB_BULK_TEST.srec
index c9fab140..46b1a221 100644
--- a/AVR Code/USB_BULK_TEST/Release/USB_BULK_TEST.srec	
+++ b/AVR Code/USB_BULK_TEST/Release/USB_BULK_TEST.srec	
@@ -1,624 +1,634 @@
 S01500005553425F42554C4B5F544553542E73726563F9
-S11300001DC1000037C1000035C1000033C100002C
-S113001031C100002FC10000E8C5000035C6000052
-S113002029C1000078C6000025C1000023C10000DA
-S113003021C100001FC100001DC100001BC1000040
-S113004019C1000017C1000015C1000013C1000050
-S113005011C100000FC100000DC100000BC1000060
-S11300605CC7000007C1000005C1000003C1000017
-S113007001C10000FFC00000FDC00000FBC0000083
-S1130080F9C00000F7C00000F5C00000F3C0000094
-S1130090F1C00000EFC00000EDC00000EBC00000A4
-S11300A0E9C00000E7C00000E5C00000E3C00000B4
-S11300B0E1C00000DFC00000DDC00000DBC00000C4
-S11300C0D9C00000D7C00000D5C00000D3C00000D4
-S11300D0D1C00000CFC00000CDC00000CBC00000E4
-S11300E0C9C00000C7C00000C5C00000C3C00000F4
-S11300F0C1C00000BFC00000BDC00000BBC0000004
-S1130100B9C00000B7C00000B5C00000B3C0000013
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diff --git a/AVR Code/USB_BULK_TEST/Release/src/main.o b/AVR Code/USB_BULK_TEST/Release/src/main.o
index 3d5f343760b1ce722ccee756d78ada6a9570a8ca..05545476c13c6ab9706f3d94fd4cd030b163f851 100644
GIT binary patch
delta 276
zcmbQByGD0{0^^j4iaRE^2*_-_IiHy^W^*M=KRaX8W=<Y=R>nP(0|ot=Shy!I67*yA
znfy^un=xjxtdKI}l*x`l>WtqePZScL+#n>t_yfpNXZ$sJCy+Fl{18ZbP39C<XH=MM
z2qdE>M*_))$&EmA%H)+m(qZyNAUSKYqKNop0TBVlc|evr<D$uhKz;&{4`Qh^E(Y^A
z0Qrk29|ZE3fcTR{1sIo378F%yTn;3~CkFueD<>xc`76Q77l8R2;rtI^KBJgA&;y!4
W^3LQyF?9(ab_RxgW(GK5gt7o^M@(=4

delta 333
zcmZ3ZJ3)7X0%OHQ#T^^J&Sz$H*gTb`pPkWevnr1}E8~L6xq|*oFSsV}6ZB&=n9M7r
z&FC=sA*1kQA0Yw8ipjA;>a4dI7#NtqVsn6EcP6g|iroW>1%Sog0L4Tm{}oba)SIj-
ztj@?X*;iPd)sB&Y!3r$jBP_s}GI=ggtO6*;1{S*m6jPb}7ARH+6k`F4>4*q0Hchq_
zQD<!fiZO!4YJg&GlY4<;?QpR(K(Y48cY$IZa4{KC0mjbBx}xf=-9RyjTXTS7y_0K!
uV!d#6d%$96QN(z}K<Z@0)PcTt1(F9Q=ZdLI7_c)i<TC?32?anSzyJUSR#aX9

diff --git a/AVR Code/USB_BULK_TEST/Release/src/tiny_dma.o b/AVR Code/USB_BULK_TEST/Release/src/tiny_dma.o
index 844b16e1f0a6afcdd06d2ff8be9ca41b1c6ba0f2..0cbc8f8423477c697a79ec0816e90031765ac36f 100644
GIT binary patch
literal 8368
zcmd5=dvH|c75^?9NMMjGE5uY$Z)rpjTy{6%<#S1b#FpYJ(stD8Ze9?Wyi7I~9UX5H
zeBe6dZf;T^WlG3)h-N!RJJ#v6wl0<NFJ|-)>)6(*R}uuA7RAz;j?)?XJ9ocx_wHpA
zm_BAaGv9va^_|yu?zuO4eAAXY6h#pXir6M{lo0QILx@iytg;lAi&bKUFi(DAYQ6g(
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diff --git a/AVR Code/USB_BULK_TEST/Release/src/tiny_timer.o b/AVR Code/USB_BULK_TEST/Release/src/tiny_timer.o
index c9d664dbf84fa0d154f7d44fd38b8755896fa57b..6f1d433f15b166a9f29457c53e8e8f80240820fa 100644
GIT binary patch
delta 327
zcmeyu-N7?KfiYmBqNT=y2Rj~^Jg}Lp{6KJ;&Sb&qBGY6hiA-;OJMqD^X}y!@OrAbn
z3@9QtePWRcU(<uO=4FewFBVuPxUBKP#APaM{qGwl`*2P?rNyjeZ@%$+FQZ@!0|SE)
z0}DemkOqNclczE*uh#&wSOmZV3_3uHiHCu~3P@W3F*A^D2c#W<m_-ms0D&J6gVYoO
z=@2A#0+gKrq|<;Hq&Ejh7eLvIfOHKIgY>Qf(oGPy6qwTom6!&krvNcX^Q_HRnWY&S
zTPA;GQD)r%6g)P0A*1kQ9aaIxfXTM3>Wp=hQ-S20$-O{w!{n{3>Z})-7#Qk6ssPbf
BNq7JN

delta 299
zcmeC+`NBOxfzf87qNT)x2R|N|JTPchexTSa($xBP;)Axu(-(_1O>9yTXnfGttnu3V
zf!bp8#RAI&mrdNFGVz`kvy!#-W^Tq_M!_-$1_mJp7KUgb4FU%yuVh+YuLNYV2!I6`
z)PNKd4+Db<kTwEhW+2-FNLv9hiy)8y0uLYtsmTG-en{*nC_4#ACjc=>ZyJ!!g0klT
zX^;y*dY1s{8VFko%;|tiOaRh-Kn&76W%EmBX-3Af$*io(tgC>62PW&XDl^(l4rEnl
Z%$i&YByUV!2qfoBJ_#iEO#a9!4ggF3JW>Dv

diff --git a/AVR Code/USB_BULK_TEST/Release/src/tiny_uart.o b/AVR Code/USB_BULK_TEST/Release/src/tiny_uart.o
index 8fea8eb8f97005aa960eb7cfcb8935c285ad284d..47e414167fabe6b28861cbf34f099cb17449914e 100644
GIT binary patch
delta 128
zcmbQh*}*wMf$_pbMHTL>hUWhFEzKQIo4O~4sIdz+bv$jD96GT%dg6l@f(8r>3_=Vn
z43R(@1Y|bfWZcZiXfU~#S(!BjBrtg^vod4D<eSXujMFAFvZyo0Ox6UFCng87s7t(H
PWMC)(YlIL$E*Jm+OmQHw

delta 119
zcmeC+oWMCjf$_#fMHT*(hUWhFEzKQIo4OkwwY5(SP~&WV&<Nx=Ob(w|8$H>MnQP*M
z2ZAOH3=BdHEDVuA8U*AvUu4|O$Y?UTm06iJ10*ncEweIX+vJPP>Wp(H{{)gLlNDLi
Q881xs1d<;n7qW;0065_%R{#J2

diff --git a/AVR Code/USB_BULK_TEST/src/globals.h b/AVR Code/USB_BULK_TEST/src/globals.h
index 0293a28b..50242ba7 100644
--- a/AVR Code/USB_BULK_TEST/src/globals.h	
+++ b/AVR Code/USB_BULK_TEST/src/globals.h	
@@ -9,7 +9,7 @@
 #ifndef GLOBALS_H_
 #define GLOBALS_H_
 
-#define VERO
+//#define VERO
 
 #define TC_SPISLAVE TCD0
 #define TC_PSU TCD1
diff --git a/AVR Code/USB_BULK_TEST/src/main.c b/AVR Code/USB_BULK_TEST/src/main.c
index f9ac83bd..e0b56d88 100644
--- a/AVR Code/USB_BULK_TEST/src/main.c	
+++ b/AVR Code/USB_BULK_TEST/src/main.c	
@@ -60,7 +60,20 @@ int main(void){
 		if(debug_counter > 100000000){
 			debug_counter = 0;
 		}
-
+			asm("nop");
+			asm("nop");
+			asm("nop");
+			asm("nop");
+			asm("nop");
+			asm("nop");
+			asm("nop");
+			asm("nop");
+			asm("nop");
+			asm("nop");
+			asm("nop");
+			asm("nop");
+			asm("nop");
+			asm("nop");
 	//test_byte = ADCA.CH1.RESH;
 	//DO NOTHING!
 	}
diff --git a/AVR Code/USB_BULK_TEST/src/tiny_dma.c b/AVR Code/USB_BULK_TEST/src/tiny_dma.c
index 95bd66d2..b3457a52 100644
--- a/AVR Code/USB_BULK_TEST/src/tiny_dma.c	
+++ b/AVR Code/USB_BULK_TEST/src/tiny_dma.c	
@@ -302,35 +302,35 @@ void tiny_dma_set_mode_3(void){
 	
 	DMA.CH2.REPCNT = 0; //Repeat forever!
 	DMA.CH2.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm | DMA_CH_REPEAT_bm;
-	DMA.CH2.CTRLB = 0x00; //No interrupt for DacBuf!!
+	DMA.CH2.CTRLB = 0x00; //Hi interrupt on block complete
 	DMA.CH2.ADDRCTRL = DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc | DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc;   //Dest reloads after each burst, with byte incrementing.  Src reloads at end of block, also incrementing address.
-	DMA.CH2.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH1_gc;	//Triggered from TCC0 when it hits PER
-	DMA.CH2.TRFCNT = auxDacBufLen;
+	DMA.CH2.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH2_gc;	//Triggered from TCC0 when it hits PER
+	DMA.CH2.TRFCNT = dacBuf_len;
 
-	DMA.CH2.SRCADDR0 = (( (uint16_t) &dacBuf_CH2[0]) >> 0) & 0xFF; //Source address is dacbuf
-	DMA.CH2.SRCADDR1 = (( (uint16_t) &dacBuf_CH2[0]) >> 8) & 0xFF;
+	DMA.CH2.SRCADDR0 = (( (uint16_t) &dacBuf_CH1[0]) >> 0) & 0xFF; //Source address is dacbuf
+	DMA.CH2.SRCADDR1 = (( (uint16_t) &dacBuf_CH1[0]) >> 8) & 0xFF;
 	DMA.CH2.SRCADDR2 = 0x00;
-	
-	DMA.CH2.DESTADDR0 = (( (uint16_t) &DACB.CH1DATAH) >> 0) & 0xFF;  //Dest address is high byte of DAC register
-	DMA.CH2.DESTADDR1 = (( (uint16_t) &DACB.CH1DATAH) >> 8) & 0xFF;
+		
+	DMA.CH2.DESTADDR0 = (( (uint16_t) &DACB.CH0DATAH) >> 0) & 0xFF;  //Dest address is high byte of DAC register
+	DMA.CH2.DESTADDR1 = (( (uint16_t) &DACB.CH0DATAH) >> 8) & 0xFF;
 	DMA.CH2.DESTADDR2 = 0x00;
-	
+		
 	//Must enable last for REPCNT won't work!
 	DMA.CH2.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
-	
+
 	DMA.CH3.REPCNT = 0; //Repeat forever!
 	DMA.CH3.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm | DMA_CH_REPEAT_bm;
-	DMA.CH3.CTRLB = 0x00; //Hi interrupt on block complete
+	DMA.CH3.CTRLB = 0x00; //No interrupt for DacBuf!!
 	DMA.CH3.ADDRCTRL = DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc | DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc;   //Dest reloads after each burst, with byte incrementing.  Src reloads at end of block, also incrementing address.
-	DMA.CH3.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH2_gc;	//Triggered from TCC0 when it hits PER
-	DMA.CH3.TRFCNT = dacBuf_len;
+	DMA.CH3.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH1_gc;	//Triggered from TCC0 when it hits PER
+	DMA.CH3.TRFCNT = auxDacBufLen;
 
-	DMA.CH3.SRCADDR0 = (( (uint16_t) &dacBuf_CH1[0]) >> 0) & 0xFF; //Source address is dacbuf
-	DMA.CH3.SRCADDR1 = (( (uint16_t) &dacBuf_CH1[0]) >> 8) & 0xFF;
+	DMA.CH3.SRCADDR0 = (( (uint16_t) &dacBuf_CH2[0]) >> 0) & 0xFF; //Source address is dacbuf
+	DMA.CH3.SRCADDR1 = (( (uint16_t) &dacBuf_CH2[0]) >> 8) & 0xFF;
 	DMA.CH3.SRCADDR2 = 0x00;
 	
-	DMA.CH3.DESTADDR0 = (( (uint16_t) &DACB.CH0DATAH) >> 0) & 0xFF;  //Dest address is high byte of DAC register
-	DMA.CH3.DESTADDR1 = (( (uint16_t) &DACB.CH0DATAH) >> 8) & 0xFF;
+	DMA.CH3.DESTADDR0 = (( (uint16_t) &DACB.CH1DATAH) >> 0) & 0xFF;  //Dest address is high byte of DAC register
+	DMA.CH3.DESTADDR1 = (( (uint16_t) &DACB.CH1DATAH) >> 8) & 0xFF;
 	DMA.CH3.DESTADDR2 = 0x00;
 	
 	//Must enable last for REPCNT won't work!
@@ -391,29 +391,28 @@ void tiny_dma_set_mode_4(void){
 	
 	//Must enable last for REPCNT won't work!
 	DMA.CH1.CTRLA |= DMA_CH_REPEAT_bm | DMA_CH_ENABLE_bm;  //Enable!
-		
-	DMA.CH2.REPCNT = 0; //Repeat forever!
-	DMA.CH2.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm | DMA_CH_REPEAT_bm;
-	DMA.CH2.CTRLB = 0x00; //No interrupt for DacBuf!!
-	DMA.CH2.ADDRCTRL = DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc | DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc;   //Dest reloads after each burst, with byte incrementing.  Src reloads at end of block, also incrementing address.
-	DMA.CH2.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH1_gc;	//Triggered from TCC0 when it hits PER
-	DMA.CH2.TRFCNT = auxDacBufLen;
-
-	DMA.CH2.SRCADDR0 = (( (uint16_t) &dacBuf_CH2[0]) >> 0) & 0xFF; //Source address is dacbuf
-	DMA.CH2.SRCADDR1 = (( (uint16_t) &dacBuf_CH2[0]) >> 8) & 0xFF;
-	DMA.CH2.SRCADDR2 = 0x00;
 	
-	DMA.CH2.DESTADDR0 = (( (uint16_t) &DACB.CH1DATAH) >> 0) & 0xFF;  //Dest address is high byte of DAC register
-	DMA.CH2.DESTADDR1 = (( (uint16_t) &DACB.CH1DATAH) >> 8) & 0xFF;
-	DMA.CH2.DESTADDR2 = 0x00;
+	USARTC0.DATA = 0x55;
+	
+	DMA.CH3.REPCNT = 0; //Repeat forever!
+	DMA.CH3.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm | DMA_CH_REPEAT_bm;
+	DMA.CH3.CTRLB = 0x00; //No interrupt for DacBuf!!
+	DMA.CH3.ADDRCTRL = DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc | DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc;   //Dest reloads after each burst, with byte incrementing.  Src reloads at end of block, also incrementing address.
+	DMA.CH3.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH1_gc;	//Triggered from TCC0 when it hits PER
+	DMA.CH3.TRFCNT = auxDacBufLen;
+
+	DMA.CH3.SRCADDR0 = (( (uint16_t) &dacBuf_CH2[0]) >> 0) & 0xFF; //Source address is dacbuf
+	DMA.CH3.SRCADDR1 = (( (uint16_t) &dacBuf_CH2[0]) >> 8) & 0xFF;
+	DMA.CH3.SRCADDR2 = 0x00;
+	
+	DMA.CH3.DESTADDR0 = (( (uint16_t) &DACB.CH1DATAH) >> 0) & 0xFF;  //Dest address is high byte of DAC register
+	DMA.CH3.DESTADDR1 = (( (uint16_t) &DACB.CH1DATAH) >> 8) & 0xFF;
+	DMA.CH3.DESTADDR2 = 0x00;
 	
 	//Must enable last for REPCNT won't work!
-	DMA.CH2.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
+	DMA.CH3.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
 	
 	//Actual data being transferred
-	DMA.CH0.CTRLA = 0x00;
-	DMA.CH0.CTRLA = DMA_CH_RESET_bm;
-		
 	DMA.CH0.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm; //Do not repeat!
 	DMA.CH0.CTRLB = 0x03; //No interrupt
 	DMA.CH0.ADDRCTRL = DMA_CH_SRCRELOAD_BURST_gc | DMA_CH_SRCDIR_INC_gc | DMA_CH_DESTDIR_INC_gc;   //Source reloads after each burst, with byte incrementing.  Dest does not reload, but does increment address.
@@ -431,31 +430,28 @@ void tiny_dma_set_mode_4(void){
 	//Must enable last for REPCNT won't work!
 	DMA.CH0.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
 		
-	//Actual data being transferred
-	DMA.CH3.CTRLA = 0x00;
-	DMA.CH3.CTRLA = DMA_CH_RESET_bm;
+	DMA.CH2.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm; //Do not repeat!
+	DMA.CH2.CTRLB = 0x03; //Hi interrupt on block complete
+	DMA.CH2.ADDRCTRL = DMA_CH_SRCRELOAD_BURST_gc | DMA_CH_SRCDIR_INC_gc | DMA_CH_DESTDIR_INC_gc;   //Source reloads after each burst, with byte incrementing.  Dest does not reload, but does increment address.
+	DMA.CH2.TRIGSRC = DMA_CH_TRIGSRC_SPIC_gc;
+	DMA.CH2.TRFCNT = HALFPACKET_SIZE;
 		
-	DMA.CH3.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm; //Do not repeat!
-	DMA.CH3.CTRLB = 0x03; //No interrupt
-	DMA.CH3.ADDRCTRL = DMA_CH_SRCRELOAD_BURST_gc | DMA_CH_SRCDIR_INC_gc | DMA_CH_DESTDIR_INC_gc;   //Source reloads after each burst, with byte incrementing.  Dest does not reload, but does increment address.
-	DMA.CH3.TRIGSRC = DMA_CH_TRIGSRC_SPIC_gc;
-	DMA.CH3.TRFCNT = HALFPACKET_SIZE;
+	DMA.CH2.SRCADDR0 = (( (uint16_t) &SPIC.DATA) >> 0) & 0xFF; //Source address is ADC
+	DMA.CH2.SRCADDR1 = (( (uint16_t) &SPIC.DATA) >> 8) & 0xFF;
+	DMA.CH2.SRCADDR2 = 0x00;
 		
-	DMA.CH3.SRCADDR0 = (( (uint16_t) &SPIC.DATA) >> 0) & 0xFF; //Source address is ADC
-	DMA.CH3.SRCADDR1 = (( (uint16_t) &SPIC.DATA) >> 8) & 0xFF;
-	DMA.CH3.SRCADDR2 = 0x00;
-		
-	DMA.CH3.DESTADDR0 = (( (uint16_t) &isoBuf[HALFPACKET_SIZE]) >> 0) & 0xFF;  //Dest address is isoBuf
-	DMA.CH3.DESTADDR1 = (( (uint16_t) &isoBuf[HALFPACKET_SIZE]) >> 8) & 0xFF;
-	DMA.CH3.DESTADDR2 = 0x00;
+	DMA.CH2.DESTADDR0 = (( (uint16_t) &isoBuf[HALFPACKET_SIZE]) >> 0) & 0xFF;  //Dest address is isoBuf
+	DMA.CH2.DESTADDR1 = (( (uint16_t) &isoBuf[HALFPACKET_SIZE]) >> 8) & 0xFF;
+	DMA.CH2.DESTADDR2 = 0x00;
 		
 	//Must enable last for REPCNT won't work!
-	DMA.CH3.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
+	DMA.CH2.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
 }
 
 void tiny_dma_loop_mode_4(void){
-	return;
-}	
+return;
+}
+	
 	
 void tiny_dma_set_mode_5(void){
 	global_mode = 5;
@@ -737,6 +733,15 @@ ISR(DMA_CH1_vect){
 			break;
 		}
 }
+ISR(DMA_CH2_vect){
+	DMA.INTFLAGS = 0x04;
+	DMA.CH2.TRFCNT = HALFPACKET_SIZE;		
+	DMA.CH2.DESTADDR0 = (( (uint16_t) &isoBuf[b2_state * PACKET_SIZE + HALFPACKET_SIZE]) >> 0) & 0xFF;  //Dest address is isoBuf
+	DMA.CH2.DESTADDR1 = (( (uint16_t) &isoBuf[b2_state * PACKET_SIZE + HALFPACKET_SIZE]) >> 8) & 0xFF;	
+	//Must enable last for REPCNT won't work!
+	DMA.CH2.CTRLA |= DMA_CH_ENABLE_bm;  //Enable!
+	b2_state = !b2_state;
+}
 
 ISR(DMA_CH3_vect){
 	DMA.INTFLAGS = 0x08;
diff --git a/AVR Code/USB_BULK_TEST/src/tiny_timer.c b/AVR Code/USB_BULK_TEST/src/tiny_timer.c
index c2a5cddc..95c8a9df 100644
--- a/AVR Code/USB_BULK_TEST/src/tiny_timer.c	
+++ b/AVR Code/USB_BULK_TEST/src/tiny_timer.c	
@@ -8,7 +8,7 @@
 #include "tiny_timer.h"
 #include "globals.h"
 
-#define PSU_PER 3000
+#define PSU_PER 2048	
 #define jump 6
 
 void tiny_timer_setup(void){
@@ -41,7 +41,7 @@ void tiny_timer_setup(void){
 		PORTD.DIR |= 0b00010000;
 		TC_PSU.CTRLB = 0x10 | TC_WGMODE_SINGLESLOPE_gc;  //CCAEN is set
 		TC_PSU.CTRLE = TC_BYTEM_NORMAL_gc;
-		TC_PSU.INTCTRLA = TC_OVFINTLVL_LO_gc;
+		TC_PSU.INTCTRLA = TC_OVFINTLVL_MED_gc;
 		TC_PSU.PER = PSU_PER;  // Max value of CNT
 		TC_PSU.CCA = 0; //Initial Duty cycle of 0%
 		TC_PSU.CTRLA = TC_CLKSEL_DIV1_gc;
@@ -59,6 +59,7 @@ ISR(TC_PSU_OVF){
 	char tempvar;
 	char err;
 	volatile char nothing;
+	TC_PSU.INTFLAGS = 0xff;
 	if (global_mode == 7){
 		nothing = ADCA.CH1.RESL;
 		tempvar = ADCA.CH1.RESH;
diff --git a/AVR Code/USB_BULK_TEST/src/tiny_uart.c b/AVR Code/USB_BULK_TEST/src/tiny_uart.c
index 97cc5bd2..9d6a1ed7 100644
--- a/AVR Code/USB_BULK_TEST/src/tiny_uart.c	
+++ b/AVR Code/USB_BULK_TEST/src/tiny_uart.c	
@@ -13,13 +13,13 @@ void tiny_uart_setup(void){
 	PR.PRPC &= 0b11101111;
 	//PR.PRPE &= 0b11111110;  ???
 	
-	PORTC.DIR |= 0b01001010;
+	PORTC.DIR |= 0b10101010;
 	PORTC.OUT = 0xff;
 	PORTC.PIN2CTRL = PORT_INVEN_bm | PORT_OPC_PULLUP_gc;
 	//PORTC.REMAP = 0x10; //Remap USART to [7:4]
-	#ifndef VERO
-		PORTC.REMAP = 0x20; //Swap MOSI and SCK - for small boards only!!!
-	#endif
+	//#ifndef VERO
+//		PORTC.REMAP = 0x20; //Swap MOSI and SCK - for small boards only!!!
+	//#endif
 	
 	USARTC0.CTRLC = USART_CMODE_MSPI_gc | 0b00000100; //LSB received first, UPCHA disabled
 	USARTC0.BAUDCTRLA = 3;  	//BSEL = fper/(2fbaud) -1;  24/(2*3) - 1 = 3
@@ -34,12 +34,12 @@ void tiny_spi_setup(void){
 	
 	//SPI enable
 	SPIC.CTRL = SPI_ENABLE_bm;  //Slave mode
-	SPIC.INTCTRL = SPI_INTLVL_HI_gc;
-	#ifdef VERO
+	SPIC.INTCTRL = SPI_INTLVL_OFF_gc;
+	//#ifdef VERO
 		PORTC.PIN5CTRL = PORT_INVEN_bm | PORT_OPC_PULLUP_gc;
-	#else
-		PORTC.PIN7CTRL = PORT_INVEN_bm | PORT_OPC_PULLUP_gc;  //Pin5 if not swapped		
-	#endif
+	//#else
+	//	PORTC.PIN7CTRL = PORT_INVEN_bm | PORT_OPC_PULLUP_gc;  //Pin5 if not swapped		
+	//#endif
 		
 	return;
 }
diff --git a/Desktop Interface/Labrador.pro.user b/Desktop Interface/Labrador.pro.user
index 4777d137..201002de 100644
--- a/Desktop Interface/Labrador.pro.user	
+++ b/Desktop Interface/Labrador.pro.user	
@@ -1,6 +1,6 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <!DOCTYPE QtCreatorProject>
-<!-- Written by QtCreator 4.1.0, 2016-12-18T14:47:42. -->
+<!-- Written by QtCreator 4.1.0, 2016-12-20T10:44:00. -->
 <qtcreator>
  <data>
   <variable>EnvironmentId</variable>
diff --git a/Desktop Interface/Thumbs.db b/Desktop Interface/Thumbs.db
index 8207303d7b9eb4fa44461100394ebb12b5fb9943..db2b68b4c626759bd51727808df014a28b7930df 100644
GIT binary patch
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delta 80
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