diff --git a/AVR Code/.vs/USB_BULK_TEST/v14/.atsuo b/AVR Code/.vs/USB_BULK_TEST/v14/.atsuo index 4fc34f79..86c199d2 100644 Binary files a/AVR Code/.vs/USB_BULK_TEST/v14/.atsuo and b/AVR Code/.vs/USB_BULK_TEST/v14/.atsuo differ diff --git a/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.elf b/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.elf index 0e9b3c69..cff65e81 100644 Binary files a/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.elf and b/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.elf differ diff --git a/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.hex b/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.hex index 1515e38d..eb39e563 100644 --- a/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.hex +++ b/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.hex @@ -4,7 +4,7 @@ :1000300030C100002EC100002CC100002AC1000008 :1000400028C1000026C1000024C1000022C1000018 :1000500020C100001EC100001CC100001AC1000028 -:1000600040C7000016C1000014C1000012C100000A +:100060004FC7000016C1000014C1000012C10000FB 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+:1029DA00810240000007050202400000070583014A +:1029EA00FF0301001201000200000040EB0300A0F7 +:1029FA0000020102000100000003000000000000C4 +:102A0A0000000000000000000000000000000000BC +:102A1A0000000000000000000000000000000000AC +:102A2A0000000000000000000000555342476F629A +:102A3A00696E6461722044756D6D792044657669AA +:102A4A006365005461706972546563680000040329 +:022A5A0009046D :00000001FF diff --git a/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.lss b/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.lss index 3185fa5d..68751911 100644 --- a/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.lss +++ b/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.lss @@ -3,33 +3,33 @@ USB_BULK_TEST.elf: file format elf32-avr Sections: Idx Name Size VMA LMA File off Algn - 0 .text 0000298c 00000000 00000000 00000094 2**1 + 0 .text 000029aa 00000000 00000000 00000094 2**1 CONTENTS, ALLOC, LOAD, READONLY, CODE - 1 .data 000000b2 00802000 0000298c 00002a20 2**2 + 1 .data 000000b2 00802000 000029aa 00002a40 2**2 CONTENTS, ALLOC, LOAD, DATA - 2 .bss 00000b96 008020b2 008020b2 00002ad2 2**2 + 2 .bss 00000b9a 008020b2 008020b2 00002af2 2**2 ALLOC - 3 .comment 00000030 00000000 00000000 00002ad2 2**0 + 3 .comment 00000030 00000000 00000000 00002af2 2**0 CONTENTS, READONLY - 4 .note.gnu.avr.deviceinfo 00000040 00000000 00000000 00002b04 2**2 + 4 .note.gnu.avr.deviceinfo 00000040 00000000 00000000 00002b24 2**2 CONTENTS, READONLY - 5 .debug_aranges 00000498 00000000 00000000 00002b48 2**3 + 5 .debug_aranges 00000498 00000000 00000000 00002b68 2**3 CONTENTS, READONLY, DEBUGGING - 6 .debug_info 0000a277 00000000 00000000 00002fe0 2**0 + 6 .debug_info 0000a294 00000000 00000000 00003000 2**0 CONTENTS, READONLY, DEBUGGING - 7 .debug_abbrev 00001ba2 00000000 00000000 0000d257 2**0 + 7 .debug_abbrev 00001ba2 00000000 00000000 0000d294 2**0 CONTENTS, READONLY, DEBUGGING - 8 .debug_line 000089d2 00000000 00000000 0000edf9 2**0 + 8 .debug_line 0000894e 00000000 00000000 0000ee36 2**0 CONTENTS, READONLY, DEBUGGING - 9 .debug_frame 000009d0 00000000 00000000 000177cc 2**2 + 9 .debug_frame 000009d0 00000000 00000000 00017784 2**2 CONTENTS, READONLY, DEBUGGING - 10 .debug_str 0002f5e7 00000000 00000000 0001819c 2**0 + 10 .debug_str 0002f5f5 00000000 00000000 00018154 2**0 CONTENTS, READONLY, DEBUGGING - 11 .debug_loc 00002105 00000000 00000000 00047783 2**0 + 11 .debug_loc 00002105 00000000 00000000 00047749 2**0 CONTENTS, READONLY, DEBUGGING - 12 .debug_ranges 000003c8 00000000 00000000 00049888 2**3 + 12 .debug_ranges 000003c8 00000000 00000000 00049850 2**3 CONTENTS, READONLY, DEBUGGING - 13 .debug_macro 0000b8d9 00000000 00000000 00049c50 2**0 + 13 .debug_macro 0000b8d9 00000000 00000000 00049c18 2**0 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: @@ -83,7 +83,7 @@ Disassembly of section .text: 5a: 00 00 nop 5c: 1a c1 rjmp .+564 ; 0x292 <__bad_interrupt> 5e: 00 00 nop - 60: 40 c7 rjmp .+3712 ; 0xee2 <__vector_24> + 60: 4f c7 rjmp .+3742 ; 0xf00 <__vector_24> 62: 00 00 nop 64: 16 c1 rjmp .+556 ; 0x292 <__bad_interrupt> 66: 00 00 nop @@ -201,7 +201,7 @@ Disassembly of section .text: 146: 00 00 nop 148: a4 c0 rjmp .+328 ; 0x292 <__bad_interrupt> 14a: 00 00 nop - 14c: 2a c6 rjmp .+3156 ; 0xda2 <__vector_83> + 14c: 39 c6 rjmp .+3186 ; 0xdc0 <__vector_83> 14e: 00 00 nop 150: a0 c0 rjmp .+320 ; 0x292 <__bad_interrupt> 152: 00 00 nop @@ -285,55 +285,55 @@ Disassembly of section .text: 1ee: 00 00 nop 1f0: 50 c0 rjmp .+160 ; 0x292 <__bad_interrupt> 1f2: 00 00 nop - 1f4: 0c 94 fd 12 jmp 0x25fa ; 0x25fa <__vector_125> - 1f8: 0c 94 b7 13 jmp 0x276e ; 0x276e <__vector_126> - 1fc: 93 01 movw r18, r6 - 1fe: 95 01 movw r18, r10 - 200: 97 01 movw r18, r14 - 202: 99 01 movw r18, r18 - 204: 9b 01 movw r18, r22 - 206: a0 01 movw r20, r0 - 208: 9d 01 movw r18, r26 - 20a: 9f 01 movw r18, r30 - 20c: e0 09 sbc r30, r0 - 20e: e2 09 sbc r30, r2 - 210: 1e 0a sbc r1, r30 - 212: 5e 0a sbc r5, r30 - 214: 67 0a sbc r6, r23 - 216: 6c 0a sbc r6, r28 - 218: be 0a sbc r11, r30 - 21a: c3 0a sbc r12, r19 - 21c: 0e 0a sbc r0, r30 - 21e: 10 0a sbc r1, r16 - 220: 12 0a sbc r1, r18 - 222: 14 0a sbc r1, r20 - 224: 16 0a sbc r1, r22 - 226: 18 0a sbc r1, r24 - 228: 1a 0a sbc r1, r26 - 22a: 1c 0a sbc r1, r28 - 22c: 4e 0a sbc r4, r30 - 22e: 50 0a sbc r5, r16 - 230: 52 0a sbc r5, r18 - 232: 54 0a sbc r5, r20 - 234: 56 0a sbc r5, r22 - 236: 58 0a sbc r5, r24 - 238: 5a 0a sbc r5, r26 - 23a: 5c 0a sbc r5, r28 - 23c: 78 0a sbc r7, r24 - 23e: 83 0a sbc r8, r19 - 240: 8d 0a sbc r8, r29 - 242: 9b 0a sbc r9, r27 - 244: 9d 0a sbc r9, r29 - 246: 9f 0a sbc r9, r31 - 248: a9 0a sbc r10, r25 - 24a: b3 0a sbc r11, r19 - 24c: 3b 0e add r3, r27 - 24e: 3e 0e add r3, r30 - 250: 41 0e add r4, r17 - 252: 44 0e add r4, r20 - 254: 47 0e add r4, r23 - 256: 4a 0e add r4, r26 - 258: 4d 0e add r4, r29 + 1f4: 0c 94 0c 13 jmp 0x2618 ; 0x2618 <__vector_125> + 1f8: 0c 94 c6 13 jmp 0x278c ; 0x278c <__vector_126> + 1fc: a1 01 movw r20, r2 + 1fe: a3 01 movw r20, r6 + 200: a5 01 movw r20, r10 + 202: a7 01 movw r20, r14 + 204: a9 01 movw r20, r18 + 206: ae 01 movw r20, r28 + 208: ab 01 movw r20, r22 + 20a: ad 01 movw r20, r26 + 20c: ef 09 sbc r30, r15 + 20e: f1 09 sbc r31, r1 + 210: 2d 0a sbc r2, r29 + 212: 6d 0a sbc r6, r29 + 214: 76 0a sbc r7, r22 + 216: 7b 0a sbc r7, r27 + 218: cd 0a sbc r12, r29 + 21a: d2 0a sbc r13, r18 + 21c: 1d 0a sbc r1, r29 + 21e: 1f 0a sbc r1, r31 + 220: 21 0a sbc r2, r17 + 222: 23 0a sbc r2, r19 + 224: 25 0a sbc r2, r21 + 226: 27 0a sbc r2, r23 + 228: 29 0a sbc r2, r25 + 22a: 2b 0a sbc r2, r27 + 22c: 5d 0a sbc r5, r29 + 22e: 5f 0a sbc r5, r31 + 230: 61 0a sbc r6, r17 + 232: 63 0a sbc r6, r19 + 234: 65 0a sbc r6, r21 + 236: 67 0a sbc r6, r23 + 238: 69 0a sbc r6, r25 + 23a: 6b 0a sbc r6, r27 + 23c: 87 0a sbc r8, r23 + 23e: 92 0a sbc r9, r18 + 240: 9c 0a sbc r9, r28 + 242: aa 0a sbc r10, r26 + 244: ac 0a sbc r10, r28 + 246: ae 0a sbc r10, r30 + 248: b8 0a sbc r11, r24 + 24a: c2 0a sbc r12, r18 + 24c: 4a 0e add r4, r26 + 24e: 4d 0e add r4, r29 + 250: 50 0e add r5, r16 + 252: 53 0e add r5, r19 + 254: 56 0e add r5, r22 + 256: 59 0e add r5, r25 + 258: 5c 0e add r5, r28 0000025a <__ctors_end>: 25a: 11 24 eor r1, r1 @@ -347,7 +347,7 @@ Disassembly of section .text: 266: 10 e2 ldi r17, 0x20 ; 32 268: a0 e0 ldi r26, 0x00 ; 0 26a: b0 e2 ldi r27, 0x20 ; 32 - 26c: ec e8 ldi r30, 0x8C ; 140 + 26c: ea ea ldi r30, 0xAA ; 170 26e: f9 e2 ldi r31, 0x29 ; 41 270: 02 c0 rjmp .+4 ; 0x276 <__do_copy_data+0x10> 272: 05 90 lpm r0, Z+ @@ -366,11 +366,11 @@ Disassembly of section .text: 284: 1d 92 st X+, r1 00000286 <.do_clear_bss_start>: - 286: a8 34 cpi r26, 0x48 ; 72 + 286: ac 34 cpi r26, 0x4C ; 76 288: b2 07 cpc r27, r18 28a: e1 f7 brne .-8 ; 0x284 <.do_clear_bss_loop> 28c: 1c d0 rcall .+56 ; 0x2c6
- 28e: 0c 94 c4 14 jmp 0x2988 ; 0x2988 <_exit> + 28e: 0c 94 d3 14 jmp 0x29a6 ; 0x29a6 <_exit> 00000292 <__bad_interrupt>: 292: b6 ce rjmp .-660 ; 0x0 <__vectors> @@ -419,16 +419,16 @@ void iso_callback(udd_ep_status_t status, iram_size_t nb_transfered, udd_ep_id_t 2b8: 51 e0 ldi r21, 0x01 ; 1 2ba: 6e ee ldi r22, 0xEE ; 238 2bc: 72 e0 ldi r23, 0x02 ; 2 - 2be: 8a 59 subi r24, 0x9A ; 154 + 2be: 86 59 subi r24, 0x96 ; 150 2c0: 99 4d sbci r25, 0xD9 ; 217 - 2c2: 07 c7 rjmp .+3598 ; 0x10d2 + 2c2: 16 c7 rjmp .+3628 ; 0x10f0 2c4: 08 95 ret 000002c6
: -volatile char PSU_target = 0; - volatile unsigned char test_byte = 123; +uint32_t debug_counter; + int main(void){ irq_initialize_vectors(); 2c6: 87 e0 ldi r24, 0x07 ; 7 @@ -436,6748 +436,6783 @@ int main(void){ cpu_irq_enable(); 2cc: 78 94 sei sysclk_init(); - 2ce: 14 d6 rcall .+3112 ; 0xef8 + 2ce: 23 d6 rcall .+3142 ; 0xf16 board_init(); 2d0: e8 df rcall .-48 ; 0x2a2 udc_start(); - 2d2: f6 d7 rcall .+4076 ; 0x12c0 + 2d2: 0e 94 6f 09 call 0x12de ; 0x12de tiny_dac_setup(); - 2d4: bf d0 rcall .+382 ; 0x454 + 2d6: cc d0 rcall .+408 ; 0x470 tiny_dma_setup(); - 2d6: e2 d0 rcall .+452 ; 0x49c + 2d8: ef d0 rcall .+478 ; 0x4b8 tiny_adc_setup(0, 0); - 2d8: 60 e0 ldi r22, 0x00 ; 0 - 2da: 80 e0 ldi r24, 0x00 ; 0 - 2dc: 7e d0 rcall .+252 ; 0x3da + 2da: 60 e0 ldi r22, 0x00 ; 0 + 2dc: 80 e0 ldi r24, 0x00 ; 0 + 2de: 8b d0 rcall .+278 ; 0x3f6 tiny_adc_pid_setup(); - 2de: 6a d0 rcall .+212 ; 0x3b4 + 2e0: 77 d0 rcall .+238 ; 0x3d0 tiny_adc_ch1setup(12); - 2e0: 8c e0 ldi r24, 0x0C ; 12 - 2e2: 5e d0 rcall .+188 ; 0x3a0 + 2e2: 8c e0 ldi r24, 0x0C ; 12 + 2e4: 6b d0 rcall .+214 ; 0x3bc tiny_timer_setup(); - 2e4: 23 d5 rcall .+2630 ; 0xd2c + 2e6: 31 d5 rcall .+2658 ; 0xd4a tiny_uart_setup(); - 2e6: d4 d5 rcall .+2984 ; 0xe90 + 2e8: e2 d5 rcall .+3012 ; 0xeae tiny_spi_setup(); - 2e8: ed d5 rcall .+3034 ; 0xec4 + 2ea: fb d5 rcall .+3062 ; 0xee2 tiny_dig_setup(); - 2ea: d4 df rcall .-88 ; 0x294 - ... - asm("nop"); - asm("nop"); - asm("nop"); - //test_byte = ADCA.CH1.RESH; - //DO NOTHING! - } - 308: f1 cf rjmp .-30 ; 0x2ec + 2ec: d3 df rcall .-90 ; 0x294 + 2ee: 50 91 56 22 lds r21, 0x2256 ; 0x802256 + 2f2: 40 91 57 22 lds r20, 0x2257 ; 0x802257 + 2f6: 30 91 58 22 lds r19, 0x2258 ; 0x802258 + 2fa: 20 91 59 22 lds r18, 0x2259 ; 0x802259 -0000030a : +volatile unsigned char test_byte = 123; + +uint32_t debug_counter; + +int main(void){ + 2fe: 85 2f mov r24, r21 + 300: 94 2f mov r25, r20 + 302: a3 2f mov r26, r19 + 304: b2 2f mov r27, r18 + 306: 01 96 adiw r24, 0x01 ; 1 + 308: a1 1d adc r26, r1 + 30a: b1 1d adc r27, r1 + //asm("nop"); + + while (true) { + debug_counter++; + if(debug_counter > 100000000){ + debug_counter = 0; + 30c: 50 e0 ldi r21, 0x00 ; 0 + 30e: 40 e0 ldi r20, 0x00 ; 0 + 310: 30 e0 ldi r19, 0x00 ; 0 + 312: 20 e0 ldi r18, 0x00 ; 0 + //USARTC0.DATA = 0x55; + //asm("nop"); + + while (true) { + debug_counter++; + if(debug_counter > 100000000){ + 314: 81 30 cpi r24, 0x01 ; 1 + 316: 61 ee ldi r22, 0xE1 ; 225 + 318: 96 07 cpc r25, r22 + 31a: 65 ef ldi r22, 0xF5 ; 245 + 31c: a6 07 cpc r26, r22 + 31e: 65 e0 ldi r22, 0x05 ; 5 + 320: b6 07 cpc r27, r22 + 322: 88 f3 brcs .-30 ; 0x306 + 324: ec cf rjmp .-40 ; 0x2fe + +00000326 : //! Global variable to give and record information about setup request management udd_ctrl_request_t udd_g_ctrlreq; //CALLBACKS: void main_suspend_action(void) { - 30a: 08 95 ret + 326: 08 95 ret -0000030c : +00000328 : return; } void main_resume_action(void) { - 30c: 08 95 ret + 328: 08 95 ret -0000030e : +0000032a : return; } void main_sof_action(void) { switch(global_mode){ - 30e: e0 91 00 20 lds r30, 0x2000 ; 0x802000 <__data_start> - 312: 8e 2f mov r24, r30 - 314: 90 e0 ldi r25, 0x00 ; 0 - 316: 88 30 cpi r24, 0x08 ; 8 - 318: 91 05 cpc r25, r1 - 31a: 90 f4 brcc .+36 ; 0x340 - 31c: fc 01 movw r30, r24 - 31e: e2 50 subi r30, 0x02 ; 2 - 320: ff 4f sbci r31, 0xFF ; 255 - 322: 0c 94 b5 14 jmp 0x296a ; 0x296a <__tablejump2__> + 32a: e0 91 00 20 lds r30, 0x2000 ; 0x802000 <__data_start> + 32e: 8e 2f mov r24, r30 + 330: 90 e0 ldi r25, 0x00 ; 0 + 332: 88 30 cpi r24, 0x08 ; 8 + 334: 91 05 cpc r25, r1 + 336: 90 f4 brcc .+36 ; 0x35c + 338: fc 01 movw r30, r24 + 33a: e2 50 subi r30, 0x02 ; 2 + 33c: ff 4f sbci r31, 0xFF ; 255 + 33e: 0c 94 c4 14 jmp 0x2988 ; 0x2988 <__tablejump2__> case 0: tiny_dma_loop_mode_0(); - 326: 1d d1 rcall .+570 ; 0x562 + 342: 1d d1 rcall .+570 ; 0x57e break; - 328: 0b c0 rjmp .+22 ; 0x340 + 344: 0b c0 rjmp .+22 ; 0x35c case 1: tiny_dma_loop_mode_1(); - 32a: 99 d1 rcall .+818 ; 0x65e + 346: 99 d1 rcall .+818 ; 0x67a break; - 32c: 09 c0 rjmp .+18 ; 0x340 + 348: 09 c0 rjmp .+18 ; 0x35c case 2: tiny_dma_loop_mode_2(); - 32e: 38 d2 rcall .+1136 ; 0x7a0 + 34a: 38 d2 rcall .+1136 ; 0x7bc break; - 330: 07 c0 rjmp .+14 ; 0x340 + 34c: 07 c0 rjmp .+14 ; 0x35c case 3: tiny_dma_loop_mode_3(); - 332: f4 d2 rcall .+1512 ; 0x91c + 34e: f4 d2 rcall .+1512 ; 0x938 break; - 334: 05 c0 rjmp .+10 ; 0x340 + 350: 05 c0 rjmp .+10 ; 0x35c case 4: tiny_dma_loop_mode_4(); - 336: 60 d3 rcall .+1728 ; 0x9f8 + 352: 60 d3 rcall .+1728 ; 0xa14 break; - 338: 03 c0 rjmp .+6 ; 0x340 + 354: 03 c0 rjmp .+6 ; 0x35c case 6: tiny_dma_loop_mode_6(); - 33a: 53 d4 rcall .+2214 ; 0xbe2 + 356: 54 d4 rcall .+2216 ; 0xc00 break; - 33c: 01 c0 rjmp .+2 ; 0x340 + 358: 01 c0 rjmp .+2 ; 0x35c case 7: tiny_dma_loop_mode_7(); - 33e: c8 d4 rcall .+2448 ; 0xcd0 + 35a: c9 d4 rcall .+2450 ; 0xcee break; default: break; } b1_state = !b1_state; - 340: 90 91 b4 20 lds r25, 0x20B4 ; 0x8020b4 - 344: 81 e0 ldi r24, 0x01 ; 1 - 346: 91 11 cpse r25, r1 - 348: 80 e0 ldi r24, 0x00 ; 0 - 34a: 80 93 b4 20 sts 0x20B4, r24 ; 0x8020b4 - 34e: 08 95 ret + 35c: 90 91 b4 20 lds r25, 0x20B4 ; 0x8020b4 + 360: 81 e0 ldi r24, 0x01 ; 1 + 362: 91 11 cpse r25, r1 + 364: 80 e0 ldi r24, 0x00 ; 0 + 366: 80 93 b4 20 sts 0x20B4, r24 ; 0x8020b4 + 36a: 08 95 ret -00000350 : +0000036c : return; } bool main_vendor_enable(void) { main_b_vendor_enable = true; - 350: 81 e0 ldi r24, 0x01 ; 1 - 352: 80 93 b5 20 sts 0x20B5, r24 ; 0x8020b5 + 36c: 81 e0 ldi r24, 0x01 ; 1 + 36e: 80 93 b5 20 sts 0x20B5, r24 ; 0x8020b5 udi_vendor_iso_in_run((uint8_t *)&isoBuf[0], PACKET_SIZE, iso_callback); - 356: 42 e5 ldi r20, 0x52 ; 82 - 358: 51 e0 ldi r21, 0x01 ; 1 - 35a: 6e ee ldi r22, 0xEE ; 238 - 35c: 72 e0 ldi r23, 0x02 ; 2 - 35e: 86 e6 ldi r24, 0x66 ; 102 - 360: 96 e2 ldi r25, 0x26 ; 38 - 362: b7 d6 rcall .+3438 ; 0x10d2 + 372: 42 e5 ldi r20, 0x52 ; 82 + 374: 51 e0 ldi r21, 0x01 ; 1 + 376: 6e ee ldi r22, 0xEE ; 238 + 378: 72 e0 ldi r23, 0x02 ; 2 + 37a: 8a e6 ldi r24, 0x6A ; 106 + 37c: 96 e2 ldi r25, 0x26 ; 38 + 37e: b8 d6 rcall .+3440 ; 0x10f0 return true; } - 364: 81 e0 ldi r24, 0x01 ; 1 - 366: 08 95 ret + 380: 81 e0 ldi r24, 0x01 ; 1 + 382: 08 95 ret -00000368 : +00000384 : void main_vendor_disable(void) { main_b_vendor_enable = false; - 368: 10 92 b5 20 sts 0x20B5, r1 ; 0x8020b5 - 36c: 08 95 ret + 384: 10 92 b5 20 sts 0x20B5, r1 ; 0x8020b5 + 388: 08 95 ret -0000036e : +0000038a : } bool main_setup_out_received(void) { return 1; } - 36e: 81 e0 ldi r24, 0x01 ; 1 - 370: 08 95 ret + 38a: 81 e0 ldi r24, 0x01 ; 1 + 38c: 08 95 ret -00000372 : +0000038e : bool main_setup_in_received(void) { return true; } - 372: 81 e0 ldi r24, 0x01 ; 1 - 374: 08 95 ret + 38e: 81 e0 ldi r24, 0x01 ; 1 + 390: 08 95 ret -00000376 : +00000392 : return; } void tiny_adc_ch0setup(unsigned char gain_mask){ ADCA.CH0.CTRL = 0x00; //Reset - 376: e0 e0 ldi r30, 0x00 ; 0 - 378: f2 e0 ldi r31, 0x02 ; 2 - 37a: 10 a2 std Z+32, r1 ; 0x20 + 392: e0 e0 ldi r30, 0x00 ; 0 + 394: f2 e0 ldi r31, 0x02 ; 2 + 396: 10 a2 std Z+32, r1 ; 0x20 ADCA.CH0.CTRL = ADC_CH_START_bm | (gain_mask&0x1c) | ADC_CH_INPUTMODE_DIFFWGAIN_gc; - 37c: 98 2f mov r25, r24 - 37e: 9c 71 andi r25, 0x1C ; 28 - 380: 93 68 ori r25, 0x83 ; 131 - 382: 90 a3 std Z+32, r25 ; 0x20 + 398: 98 2f mov r25, r24 + 39a: 9c 71 andi r25, 0x1C ; 28 + 39c: 93 68 ori r25, 0x83 ; 131 + 39e: 90 a3 std Z+32, r25 ; 0x20 #ifdef VERO ADCA.CH0.MUXCTRL = ADC_CH_MUXPOS_PIN0_gc | ((gain_mask&0x80) ? ADC_CH_MUXNEG_PIN6_gc : ADC_CH_MUXNEG_PIN4_gc); #else ADCA.CH0.MUXCTRL = ((gain_mask&0x80) ? ADC_CH_MUXPOS_PIN2_gc : ADC_CH_MUXPOS_PIN0_gc) | ((gain_mask&0x80) ? ADC_CH_MUXNEG_PIN6_gc : ADC_CH_MUXNEG_PIN4_gc); - 384: 88 23 and r24, r24 - 386: 1c f4 brge .+6 ; 0x38e - 388: 90 e1 ldi r25, 0x10 ; 16 - 38a: 82 e0 ldi r24, 0x02 ; 2 - 38c: 02 c0 rjmp .+4 ; 0x392 - 38e: 90 e0 ldi r25, 0x00 ; 0 - 390: 80 e0 ldi r24, 0x00 ; 0 - 392: 89 2b or r24, r25 - 394: e0 e0 ldi r30, 0x00 ; 0 - 396: f2 e0 ldi r31, 0x02 ; 2 - 398: 81 a3 std Z+33, r24 ; 0x21 + 3a0: 88 23 and r24, r24 + 3a2: 1c f4 brge .+6 ; 0x3aa + 3a4: 90 e1 ldi r25, 0x10 ; 16 + 3a6: 82 e0 ldi r24, 0x02 ; 2 + 3a8: 02 c0 rjmp .+4 ; 0x3ae + 3aa: 90 e0 ldi r25, 0x00 ; 0 + 3ac: 80 e0 ldi r24, 0x00 ; 0 + 3ae: 89 2b or r24, r25 + 3b0: e0 e0 ldi r30, 0x00 ; 0 + 3b2: f2 e0 ldi r31, 0x02 ; 2 + 3b4: 81 a3 std Z+33, r24 ; 0x21 #endif ADCA.CH0.INTCTRL = ADC_CH_INTLVL_OFF_gc; - 39a: 12 a2 std Z+34, r1 ; 0x22 + 3b6: 12 a2 std Z+34, r1 ; 0x22 ADCA.CH0.SCAN = 0x00; //Disable scanning - 39c: 16 a2 std Z+38, r1 ; 0x26 - 39e: 08 95 ret + 3b8: 16 a2 std Z+38, r1 ; 0x26 + 3ba: 08 95 ret -000003a0 : +000003bc : } void tiny_adc_ch1setup(unsigned char gain_mask){ ADCA.CH2.CTRL = 0x00; //Reset - 3a0: e0 e0 ldi r30, 0x00 ; 0 - 3a2: f2 e0 ldi r31, 0x02 ; 2 - 3a4: 10 aa std Z+48, r1 ; 0x30 + 3bc: e0 e0 ldi r30, 0x00 ; 0 + 3be: f2 e0 ldi r31, 0x02 ; 2 + 3c0: 10 aa std Z+48, r1 ; 0x30 ADCA.CH2.CTRL = ADC_CH_START_bm | gain_mask | ADC_CH_INPUTMODE_DIFFWGAIN_gc; - 3a6: 83 68 ori r24, 0x83 ; 131 - 3a8: 80 ab std Z+48, r24 ; 0x30 + 3c2: 83 68 ori r24, 0x83 ; 131 + 3c4: 80 ab std Z+48, r24 ; 0x30 ADCA.CH2.MUXCTRL = ADC_CH_MUXPOS_PIN2_gc | ADC_CH_MUXNEG_PIN4_gc; - 3aa: 80 e1 ldi r24, 0x10 ; 16 - 3ac: 81 ab std Z+49, r24 ; 0x31 + 3c6: 80 e1 ldi r24, 0x10 ; 16 + 3c8: 81 ab std Z+49, r24 ; 0x31 ADCA.CH2.INTCTRL = ADC_CH_INTLVL_OFF_gc; - 3ae: 12 aa std Z+50, r1 ; 0x32 + 3ca: 12 aa std Z+50, r1 ; 0x32 ADCA.CH2.SCAN = 0x00; //Disable scanning - 3b0: 16 aa std Z+54, r1 ; 0x36 - 3b2: 08 95 ret + 3cc: 16 aa std Z+54, r1 ; 0x36 + 3ce: 08 95 ret -000003b4 : +000003d0 : } void tiny_adc_pid_setup(void){ ADCA.CH1.CTRL = 0x00; //Reset - 3b4: e0 e0 ldi r30, 0x00 ; 0 - 3b6: f2 e0 ldi r31, 0x02 ; 2 - 3b8: 10 a6 std Z+40, r1 ; 0x28 + 3d0: e0 e0 ldi r30, 0x00 ; 0 + 3d2: f2 e0 ldi r31, 0x02 ; 2 + 3d4: 10 a6 std Z+40, r1 ; 0x28 ADCA.CH1.CTRL = ADC_CH_START_bm | ADC_CH_GAIN_1X_gc | ADC_CH_INPUTMODE_DIFFWGAIN_gc; - 3ba: 83 e8 ldi r24, 0x83 ; 131 - 3bc: 80 a7 std Z+40, r24 ; 0x28 + 3d6: 83 e8 ldi r24, 0x83 ; 131 + 3d8: 80 a7 std Z+40, r24 ; 0x28 ADCA.CH1.MUXCTRL = ADC_CH_MUXPOS_PIN5_gc | 0b00000111; - 3be: 8f e2 ldi r24, 0x2F ; 47 - 3c0: 81 a7 std Z+41, r24 ; 0x29 + 3da: 8f e2 ldi r24, 0x2F ; 47 + 3dc: 81 a7 std Z+41, r24 ; 0x29 ADCA.CH1.INTCTRL = ADC_CH_INTLVL_OFF_gc; - 3c2: 12 a6 std Z+42, r1 ; 0x2a + 3de: 12 a6 std Z+42, r1 ; 0x2a ADCA.CH1.SCAN = 0x00; //Disable scanning - 3c4: 16 a6 std Z+46, r1 ; 0x2e - 3c6: 08 95 ret + 3e0: 16 a6 std Z+46, r1 ; 0x2e + 3e2: 08 95 ret -000003c8 : +000003e4 : //FROM: http://www.avrfreaks.net/forum/xmega-production-signature-row uint8_t ReadCalibrationByte(uint8_t index){ uint8_t result; /* Load the NVM Command register to read the calibration row. */ NVM_CMD = NVM_CMD_READ_CALIB_ROW_gc; - 3c8: aa ec ldi r26, 0xCA ; 202 - 3ca: b1 e0 ldi r27, 0x01 ; 1 - 3cc: 92 e0 ldi r25, 0x02 ; 2 - 3ce: 9c 93 st X, r25 + 3e4: aa ec ldi r26, 0xCA ; 202 + 3e6: b1 e0 ldi r27, 0x01 ; 1 + 3e8: 92 e0 ldi r25, 0x02 ; 2 + 3ea: 9c 93 st X, r25 result = pgm_read_byte(index); - 3d0: e8 2f mov r30, r24 - 3d2: f0 e0 ldi r31, 0x00 ; 0 - 3d4: 84 91 lpm r24, Z + 3ec: e8 2f mov r30, r24 + 3ee: f0 e0 ldi r31, 0x00 ; 0 + 3f0: 84 91 lpm r24, Z /* Clean up NVM Command register. */ NVM_CMD = NVM_CMD_NO_OPERATION_gc; - 3d6: 1c 92 st X, r1 + 3f2: 1c 92 st X, r1 return( result ); - 3d8: 08 95 ret + 3f4: 08 95 ret -000003da : +000003f6 : // These 2 files need to be included in order to read // the production calibration values from EEPROM #include #include void tiny_adc_setup(unsigned char ch2_enable, unsigned char seven_fiddy_ksps){ - 3da: cf 93 push r28 - 3dc: df 93 push r29 + 3f6: cf 93 push r28 + 3f8: df 93 push r29 PR.PRPA &=0b11111101; - 3de: e0 e7 ldi r30, 0x70 ; 112 - 3e0: f0 e0 ldi r31, 0x00 ; 0 - 3e2: 91 81 ldd r25, Z+1 ; 0x01 - 3e4: 9d 7f andi r25, 0xFD ; 253 - 3e6: 91 83 std Z+1, r25 ; 0x01 + 3fa: e0 e7 ldi r30, 0x70 ; 112 + 3fc: f0 e0 ldi r31, 0x00 ; 0 + 3fe: 91 81 ldd r25, Z+1 ; 0x01 + 400: 9d 7f andi r25, 0xFD ; 253 + 402: 91 83 std Z+1, r25 ; 0x01 ADCA.CTRLA = 0x00; //Turn off - 3e8: 10 92 00 02 sts 0x0200, r1 ; 0x800200 <__TEXT_REGION_LENGTH__+0x700200> + 404: 10 92 00 02 sts 0x0200, r1 ; 0x800200 <__TEXT_REGION_LENGTH__+0x700200> ADCA.CTRLB = ADC_FREERUN_bm | (seven_fiddy_ksps == 2 ? ADC_RESOLUTION_LEFT12BIT_gc : ADC_RESOLUTION_8BIT_gc) | ADC_CONMODE_bm ; - 3ec: 62 30 cpi r22, 0x02 ; 2 - 3ee: 31 f1 breq .+76 ; 0x43c <__FUSE_REGION_LENGTH__+0x3c> - 3f0: e0 e0 ldi r30, 0x00 ; 0 - 3f2: f2 e0 ldi r31, 0x02 ; 2 - 3f4: 9c e1 ldi r25, 0x1C ; 28 - 3f6: 91 83 std Z+1, r25 ; 0x01 + 408: 62 30 cpi r22, 0x02 ; 2 + 40a: 31 f1 breq .+76 ; 0x458 <__FUSE_REGION_LENGTH__+0x58> + 40c: e0 e0 ldi r30, 0x00 ; 0 + 40e: f2 e0 ldi r31, 0x02 ; 2 + 410: 9c e1 ldi r25, 0x1C ; 28 + 412: 91 83 std Z+1, r25 ; 0x01 ADCA.REFCTRL = ADC_REFSEL_INTVCC2_gc; - 3f8: 90 e4 ldi r25, 0x40 ; 64 - 3fa: 92 83 std Z+2, r25 ; 0x02 + 414: 90 e4 ldi r25, 0x40 ; 64 + 416: 92 83 std Z+2, r25 ; 0x02 ADCA.EVCTRL = ch2_enable ? ADC_SWEEP_0123_gc : ADC_SWEEP_01_gc; //Non-zero causes issues with interrupts! ;.; - 3fc: 81 11 cpse r24, r1 - 3fe: 02 c0 rjmp .+4 ; 0x404 <__FUSE_REGION_LENGTH__+0x4> - 400: 80 e4 ldi r24, 0x40 ; 64 - 402: 01 c0 rjmp .+2 ; 0x406 <__FUSE_REGION_LENGTH__+0x6> - 404: 80 ec ldi r24, 0xC0 ; 192 - 406: 80 93 03 02 sts 0x0203, r24 ; 0x800203 <__TEXT_REGION_LENGTH__+0x700203> + 418: 81 11 cpse r24, r1 + 41a: 02 c0 rjmp .+4 ; 0x420 <__FUSE_REGION_LENGTH__+0x20> + 41c: 80 e4 ldi r24, 0x40 ; 64 + 41e: 01 c0 rjmp .+2 ; 0x422 <__FUSE_REGION_LENGTH__+0x22> + 420: 80 ec ldi r24, 0xC0 ; 192 + 422: 80 93 03 02 sts 0x0203, r24 ; 0x800203 <__TEXT_REGION_LENGTH__+0x700203> ADCA.PRESCALER = seven_fiddy_ksps == 1 ? ADC_PRESCALER_DIV16_gc : ADC_PRESCALER_DIV32_gc; //ADC Clock = Sysclock/128 - 40a: 61 30 cpi r22, 0x01 ; 1 - 40c: 11 f0 breq .+4 ; 0x412 <__FUSE_REGION_LENGTH__+0x12> - 40e: 83 e0 ldi r24, 0x03 ; 3 - 410: 01 c0 rjmp .+2 ; 0x414 <__FUSE_REGION_LENGTH__+0x14> - 412: 82 e0 ldi r24, 0x02 ; 2 - 414: c0 e0 ldi r28, 0x00 ; 0 - 416: d2 e0 ldi r29, 0x02 ; 2 - 418: 8c 83 std Y+4, r24 ; 0x04 + 426: 61 30 cpi r22, 0x01 ; 1 + 428: 11 f0 breq .+4 ; 0x42e <__FUSE_REGION_LENGTH__+0x2e> + 42a: 83 e0 ldi r24, 0x03 ; 3 + 42c: 01 c0 rjmp .+2 ; 0x430 <__FUSE_REGION_LENGTH__+0x30> + 42e: 82 e0 ldi r24, 0x02 ; 2 + 430: c0 e0 ldi r28, 0x00 ; 0 + 432: d2 e0 ldi r29, 0x02 ; 2 + 434: 8c 83 std Y+4, r24 ; 0x04 ADCA.CALL = ReadCalibrationByte(offsetof(NVM_PROD_SIGNATURES_t, ADCACAL0)); //Load calibration bytes from production row. - 41a: 80 e2 ldi r24, 0x20 ; 32 - 41c: d5 df rcall .-86 ; 0x3c8 - 41e: 8c 87 std Y+12, r24 ; 0x0c + 436: 80 e2 ldi r24, 0x20 ; 32 + 438: d5 df rcall .-86 ; 0x3e4 + 43a: 8c 87 std Y+12, r24 ; 0x0c ADCA.CALH = ReadCalibrationByte(offsetof(NVM_PROD_SIGNATURES_t, ADCACAL1)); //Load calibration bytes from production row. - 420: 81 e2 ldi r24, 0x21 ; 33 - 422: d2 df rcall .-92 ; 0x3c8 - 424: 8d 87 std Y+13, r24 ; 0x0d + 43c: 81 e2 ldi r24, 0x21 ; 33 + 43e: d2 df rcall .-92 ; 0x3e4 + 440: 8d 87 std Y+13, r24 ; 0x0d ADCA.CMP = 0x0000; //No compare used - 426: 18 8e std Y+24, r1 ; 0x18 - 428: 19 8e std Y+25, r1 ; 0x19 + 442: 18 8e std Y+24, r1 ; 0x18 + 444: 19 8e std Y+25, r1 ; 0x19 ADCA.CTRLA = ADC_ENABLE_bm; - 42a: 81 e0 ldi r24, 0x01 ; 1 - 42c: 88 83 st Y, r24 + 446: 81 e0 ldi r24, 0x01 ; 1 + 448: 88 83 st Y, r24 tiny_adc_pid_setup(); - 42e: c2 df rcall .-124 ; 0x3b4 - 430: 0e c0 rjmp .+28 ; 0x44e <__FUSE_REGION_LENGTH__+0x4e> + 44a: c2 df rcall .-124 ; 0x3d0 + 44c: 0e c0 rjmp .+28 ; 0x46a <__FUSE_REGION_LENGTH__+0x6a> PR.PRPA &=0b11111101; ADCA.CTRLA = 0x00; //Turn off ADCA.CTRLB = ADC_FREERUN_bm | (seven_fiddy_ksps == 2 ? ADC_RESOLUTION_LEFT12BIT_gc : ADC_RESOLUTION_8BIT_gc) | ADC_CONMODE_bm ; ADCA.REFCTRL = ADC_REFSEL_INTVCC2_gc; ADCA.EVCTRL = ch2_enable ? ADC_SWEEP_0123_gc : ADC_SWEEP_01_gc; //Non-zero causes issues with interrupts! ;.; - 432: 80 ec ldi r24, 0xC0 ; 192 - 434: 80 93 03 02 sts 0x0203, r24 ; 0x800203 <__TEXT_REGION_LENGTH__+0x700203> + 44e: 80 ec ldi r24, 0xC0 ; 192 + 450: 80 93 03 02 sts 0x0203, r24 ; 0x800203 <__TEXT_REGION_LENGTH__+0x700203> ADCA.PRESCALER = seven_fiddy_ksps == 1 ? ADC_PRESCALER_DIV16_gc : ADC_PRESCALER_DIV32_gc; //ADC Clock = Sysclock/128 - 438: 83 e0 ldi r24, 0x03 ; 3 - 43a: ec cf rjmp .-40 ; 0x414 <__FUSE_REGION_LENGTH__+0x14> + 454: 83 e0 ldi r24, 0x03 ; 3 + 456: ec cf rjmp .-40 ; 0x430 <__FUSE_REGION_LENGTH__+0x30> void tiny_adc_setup(unsigned char ch2_enable, unsigned char seven_fiddy_ksps){ PR.PRPA &=0b11111101; ADCA.CTRLA = 0x00; //Turn off ADCA.CTRLB = ADC_FREERUN_bm | (seven_fiddy_ksps == 2 ? ADC_RESOLUTION_LEFT12BIT_gc : ADC_RESOLUTION_8BIT_gc) | ADC_CONMODE_bm ; - 43c: e0 e0 ldi r30, 0x00 ; 0 - 43e: f2 e0 ldi r31, 0x02 ; 2 - 440: 9e e1 ldi r25, 0x1E ; 30 - 442: 91 83 std Z+1, r25 ; 0x01 + 458: e0 e0 ldi r30, 0x00 ; 0 + 45a: f2 e0 ldi r31, 0x02 ; 2 + 45c: 9e e1 ldi r25, 0x1E ; 30 + 45e: 91 83 std Z+1, r25 ; 0x01 ADCA.REFCTRL = ADC_REFSEL_INTVCC2_gc; - 444: 90 e4 ldi r25, 0x40 ; 64 - 446: 92 83 std Z+2, r25 ; 0x02 + 460: 90 e4 ldi r25, 0x40 ; 64 + 462: 92 83 std Z+2, r25 ; 0x02 ADCA.EVCTRL = ch2_enable ? ADC_SWEEP_0123_gc : ADC_SWEEP_01_gc; //Non-zero causes issues with interrupts! ;.; - 448: 81 11 cpse r24, r1 - 44a: f3 cf rjmp .-26 ; 0x432 <__FUSE_REGION_LENGTH__+0x32> - 44c: d9 cf rjmp .-78 ; 0x400 <__FUSE_REGION_LENGTH__> + 464: 81 11 cpse r24, r1 + 466: f3 cf rjmp .-26 ; 0x44e <__FUSE_REGION_LENGTH__+0x4e> + 468: d9 cf rjmp .-78 ; 0x41c <__FUSE_REGION_LENGTH__+0x1c> ADCA.CTRLA = ADC_ENABLE_bm; tiny_adc_pid_setup(); return; } - 44e: df 91 pop r29 - 450: cf 91 pop r28 - 452: 08 95 ret + 46a: df 91 pop r29 + 46c: cf 91 pop r28 + 46e: 08 95 ret -00000454 : +00000470 : #include "tiny_adc.h" #include #include void tiny_dac_setup(void){ - 454: cf 93 push r28 - 456: df 93 push r29 + 470: cf 93 push r28 + 472: df 93 push r29 //Turn on in PR PR.PRPB &=0b11111011; - 458: e0 e7 ldi r30, 0x70 ; 112 - 45a: f0 e0 ldi r31, 0x00 ; 0 - 45c: 82 81 ldd r24, Z+2 ; 0x02 - 45e: 8b 7f andi r24, 0xFB ; 251 - 460: 82 83 std Z+2, r24 ; 0x02 + 474: e0 e7 ldi r30, 0x70 ; 112 + 476: f0 e0 ldi r31, 0x00 ; 0 + 478: 82 81 ldd r24, Z+2 ; 0x02 + 47a: 8b 7f andi r24, 0xFB ; 251 + 47c: 82 83 std Z+2, r24 ; 0x02 DACB.CTRLA = DAC_CH1EN_bm | DAC_CH0EN_bm | DAC_ENABLE_bm; - 462: c0 e2 ldi r28, 0x20 ; 32 - 464: d3 e0 ldi r29, 0x03 ; 3 - 466: 8d e0 ldi r24, 0x0D ; 13 - 468: 88 83 st Y, r24 + 47e: c0 e2 ldi r28, 0x20 ; 32 + 480: d3 e0 ldi r29, 0x03 ; 3 + 482: 8d e0 ldi r24, 0x0D ; 13 + 484: 88 83 st Y, r24 DACB.CTRLB = DAC_CHSEL_DUAL_gc; - 46a: 80 e4 ldi r24, 0x40 ; 64 - 46c: 89 83 std Y+1, r24 ; 0x01 + 486: 80 e4 ldi r24, 0x40 ; 64 + 488: 89 83 std Y+1, r24 ; 0x01 DACB.CTRLC = DAC_REFSEL_AVCC_gc | DAC_LEFTADJ_bm; - 46e: 89 e0 ldi r24, 0x09 ; 9 - 470: 8a 83 std Y+2, r24 ; 0x02 + 48a: 89 e0 ldi r24, 0x09 ; 9 + 48c: 8a 83 std Y+2, r24 ; 0x02 //EVCTRL unset //DACB.CH0DATAH = 127;//contains (8-bit) sample, assuming left adjust! //TODO: Calibrate DACB.CH0GAINCAL = ReadCalibrationByte(offsetof(NVM_PROD_SIGNATURES_t, DACB0GAINCAL)); //Load calibration bytes from production row. - 472: 83 e3 ldi r24, 0x33 ; 51 - 474: a9 df rcall .-174 ; 0x3c8 - 476: 88 87 std Y+8, r24 ; 0x08 + 48e: 83 e3 ldi r24, 0x33 ; 51 + 490: a9 df rcall .-174 ; 0x3e4 + 492: 88 87 std Y+8, r24 ; 0x08 DACB.CH0OFFSETCAL = ReadCalibrationByte(offsetof(NVM_PROD_SIGNATURES_t, DACB0OFFCAL)); //Load calibration bytes from production row. - 478: 82 e3 ldi r24, 0x32 ; 50 - 47a: a6 df rcall .-180 ; 0x3c8 - 47c: 89 87 std Y+9, r24 ; 0x09 + 494: 82 e3 ldi r24, 0x32 ; 50 + 496: a6 df rcall .-180 ; 0x3e4 + 498: 89 87 std Y+9, r24 ; 0x09 DACB.CH1GAINCAL = ReadCalibrationByte(offsetof(NVM_PROD_SIGNATURES_t, DACB1GAINCAL)); //Load calibration bytes from production row. - 47e: 87 e3 ldi r24, 0x37 ; 55 - 480: a3 df rcall .-186 ; 0x3c8 - 482: 8a 87 std Y+10, r24 ; 0x0a + 49a: 87 e3 ldi r24, 0x37 ; 55 + 49c: a3 df rcall .-186 ; 0x3e4 + 49e: 8a 87 std Y+10, r24 ; 0x0a DACB.CH1OFFSETCAL = ReadCalibrationByte(offsetof(NVM_PROD_SIGNATURES_t, DACB1OFFCAL)); //Load calibration bytes from production row. - 484: 86 e3 ldi r24, 0x36 ; 54 - 486: a0 df rcall .-192 ; 0x3c8 - 488: 8b 87 std Y+11, r24 ; 0x0b + 4a0: 86 e3 ldi r24, 0x36 ; 54 + 4a2: a0 df rcall .-192 ; 0x3e4 + 4a4: 8b 87 std Y+11, r24 ; 0x0b //Set up for triple mode! PORTB.DIR |= 0x03; - 48a: e0 e2 ldi r30, 0x20 ; 32 - 48c: f6 e0 ldi r31, 0x06 ; 6 - 48e: 80 81 ld r24, Z - 490: 83 60 ori r24, 0x03 ; 3 - 492: 80 83 st Z, r24 + 4a6: e0 e2 ldi r30, 0x20 ; 32 + 4a8: f6 e0 ldi r31, 0x06 ; 6 + 4aa: 80 81 ld r24, Z + 4ac: 83 60 ori r24, 0x03 ; 3 + 4ae: 80 83 st Z, r24 PORTB.OUT = 0x00; - 494: 14 82 std Z+4, r1 ; 0x04 + 4b0: 14 82 std Z+4, r1 ; 0x04 - 496: df 91 pop r29 - 498: cf 91 pop r28 - 49a: 08 95 ret + 4b2: df 91 pop r29 + 4b4: cf 91 pop r28 + 4b6: 08 95 ret -0000049c : +000004b8 : #include "globals.h" void tiny_dma_setup(void){ //Turn on DMA PR.PRGEN &=0b111111110; //Turn on DMA clk - 49c: e0 e7 ldi r30, 0x70 ; 112 - 49e: f0 e0 ldi r31, 0x00 ; 0 - 4a0: 80 81 ld r24, Z - 4a2: 8e 7f andi r24, 0xFE ; 254 - 4a4: 80 83 st Z, r24 + 4b8: e0 e7 ldi r30, 0x70 ; 112 + 4ba: f0 e0 ldi r31, 0x00 ; 0 + 4bc: 80 81 ld r24, Z + 4be: 8e 7f andi r24, 0xFE ; 254 + 4c0: 80 83 st Z, r24 DMA.CTRL = DMA_ENABLE_bm | DMA_PRIMODE_RR0123_gc; - 4a6: 80 e8 ldi r24, 0x80 ; 128 - 4a8: 80 93 00 01 sts 0x0100, r24 ; 0x800100 <__TEXT_REGION_LENGTH__+0x700100> - 4ac: 08 95 ret + 4c2: 80 e8 ldi r24, 0x80 ; 128 + 4c4: 80 93 00 01 sts 0x0100, r24 ; 0x800100 <__TEXT_REGION_LENGTH__+0x700100> + 4c8: 08 95 ret -000004ae : +000004ca : } void tiny_dma_flush(void){ DMA.CH0.CTRLA = 0x00; - 4ae: e0 e0 ldi r30, 0x00 ; 0 - 4b0: f1 e0 ldi r31, 0x01 ; 1 - 4b2: 10 8a std Z+16, r1 ; 0x10 + 4ca: e0 e0 ldi r30, 0x00 ; 0 + 4cc: f1 e0 ldi r31, 0x01 ; 1 + 4ce: 10 8a std Z+16, r1 ; 0x10 DMA.CH0.CTRLA = DMA_CH_RESET_bm; - 4b4: 80 e4 ldi r24, 0x40 ; 64 - 4b6: 80 8b std Z+16, r24 ; 0x10 + 4d0: 80 e4 ldi r24, 0x40 ; 64 + 4d2: 80 8b std Z+16, r24 ; 0x10 DMA.CH1.CTRLA = 0x00; - 4b8: 10 a2 std Z+32, r1 ; 0x20 + 4d4: 10 a2 std Z+32, r1 ; 0x20 DMA.CH1.CTRLA = DMA_CH_RESET_bm; - 4ba: 80 a3 std Z+32, r24 ; 0x20 + 4d6: 80 a3 std Z+32, r24 ; 0x20 DMA.CH2.CTRLA = 0x00; - 4bc: 10 aa std Z+48, r1 ; 0x30 + 4d8: 10 aa std Z+48, r1 ; 0x30 DMA.CH2.CTRLA = DMA_CH_RESET_bm; - 4be: 80 ab std Z+48, r24 ; 0x30 + 4da: 80 ab std Z+48, r24 ; 0x30 DMA.CH3.CTRLA = 0x00; - 4c0: e0 e4 ldi r30, 0x40 ; 64 - 4c2: f1 e0 ldi r31, 0x01 ; 1 - 4c4: 10 82 st Z, r1 + 4dc: e0 e4 ldi r30, 0x40 ; 64 + 4de: f1 e0 ldi r31, 0x01 ; 1 + 4e0: 10 82 st Z, r1 DMA.CH3.CTRLA = DMA_CH_RESET_bm; - 4c6: 80 83 st Z, r24 + 4e2: 80 83 st Z, r24 b1_state = 0; - 4c8: 10 92 b4 20 sts 0x20B4, r1 ; 0x8020b4 + 4e4: 10 92 b4 20 sts 0x20B4, r1 ; 0x8020b4 b2_state = 0; - 4cc: 10 92 b3 20 sts 0x20B3, r1 ; 0x8020b3 - 4d0: 08 95 ret + 4e8: 10 92 b3 20 sts 0x20B3, r1 ; 0x8020b3 + 4ec: 08 95 ret -000004d2 : +000004ee : } void tiny_dma_set_mode_0(void){ global_mode = 0; - 4d2: 10 92 00 20 sts 0x2000, r1 ; 0x802000 <__data_start> + 4ee: 10 92 00 20 sts 0x2000, r1 ; 0x802000 <__data_start> tiny_dma_flush(); - 4d6: eb df rcall .-42 ; 0x4ae + 4f2: eb df rcall .-42 ; 0x4ca DMA.CH2.REPCNT = 0; //Repeat forever! - 4d8: e0 e0 ldi r30, 0x00 ; 0 - 4da: f1 e0 ldi r31, 0x01 ; 1 - 4dc: 16 aa std Z+54, r1 ; 0x36 + 4f4: e0 e0 ldi r30, 0x00 ; 0 + 4f6: f1 e0 ldi r31, 0x01 ; 1 + 4f8: 16 aa std Z+54, r1 ; 0x36 DMA.CH2.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm | DMA_CH_REPEAT_bm; - 4de: 34 e2 ldi r19, 0x24 ; 36 - 4e0: 30 ab std Z+48, r19 ; 0x30 + 4fa: 34 e2 ldi r19, 0x24 ; 36 + 4fc: 30 ab std Z+48, r19 ; 0x30 DMA.CH2.CTRLB = 0x00; //No interrupt for DacBuf!! - 4e2: 11 aa std Z+49, r1 ; 0x31 + 4fe: 11 aa std Z+49, r1 ; 0x31 DMA.CH2.ADDRCTRL = DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc | DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc; //Dest reloads after each burst, with byte incrementing. Src reloads at end of block, also incrementing address. - 4e4: 29 e5 ldi r18, 0x59 ; 89 - 4e6: 22 ab std Z+50, r18 ; 0x32 + 500: 29 e5 ldi r18, 0x59 ; 89 + 502: 22 ab std Z+50, r18 ; 0x32 DMA.CH2.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH1_gc; //Triggered from TCC0 when it hits PER - 4e8: 82 e0 ldi r24, 0x02 ; 2 - 4ea: 83 ab std Z+51, r24 ; 0x33 + 504: 82 e0 ldi r24, 0x02 ; 2 + 506: 83 ab std Z+51, r24 ; 0x33 DMA.CH2.TRFCNT = auxDacBufLen; - 4ec: 80 91 02 20 lds r24, 0x2002 ; 0x802002 - 4f0: 90 91 03 20 lds r25, 0x2003 ; 0x802003 - 4f4: 84 ab std Z+52, r24 ; 0x34 - 4f6: 95 ab std Z+53, r25 ; 0x35 + 508: 80 91 02 20 lds r24, 0x2002 ; 0x802002 + 50c: 90 91 03 20 lds r25, 0x2003 ; 0x802003 + 510: 84 ab std Z+52, r24 ; 0x34 + 512: 95 ab std Z+53, r25 ; 0x35 DMA.CH2.SRCADDR0 = (( (uint16_t) &dacBuf_CH2[0]) >> 0) & 0xFF; //Source address is dacbuf - 4f8: 86 e6 ldi r24, 0x66 ; 102 - 4fa: 94 e2 ldi r25, 0x24 ; 36 - 4fc: 80 af std Z+56, r24 ; 0x38 + 514: 8a e6 ldi r24, 0x6A ; 106 + 516: 94 e2 ldi r25, 0x24 ; 36 + 518: 80 af std Z+56, r24 ; 0x38 DMA.CH2.SRCADDR1 = (( (uint16_t) &dacBuf_CH2[0]) >> 8) & 0xFF; - 4fe: 91 af std Z+57, r25 ; 0x39 + 51a: 91 af std Z+57, r25 ; 0x39 DMA.CH2.SRCADDR2 = 0x00; - 500: 12 ae std Z+58, r1 ; 0x3a + 51c: 12 ae std Z+58, r1 ; 0x3a DMA.CH2.DESTADDR0 = (( (uint16_t) &DACB.CH1DATAH) >> 0) & 0xFF; //Dest address is high byte of DAC register - 502: 8b e3 ldi r24, 0x3B ; 59 - 504: 84 af std Z+60, r24 ; 0x3c + 51e: 8b e3 ldi r24, 0x3B ; 59 + 520: 84 af std Z+60, r24 ; 0x3c DMA.CH2.DESTADDR1 = (( (uint16_t) &DACB.CH1DATAH) >> 8) & 0xFF; - 506: 83 e0 ldi r24, 0x03 ; 3 - 508: 80 93 3d 01 sts 0x013D, r24 ; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d> + 522: 83 e0 ldi r24, 0x03 ; 3 + 524: 80 93 3d 01 sts 0x013D, r24 ; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d> DMA.CH2.DESTADDR2 = 0x00; - 50c: 10 92 3e 01 sts 0x013E, r1 ; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e> + 528: 10 92 3e 01 sts 0x013E, r1 ; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e> //Must enable last for REPCNT won't work! DMA.CH2.CTRLA |= DMA_CH_ENABLE_bm; //Enable! - 510: 90 a9 ldd r25, Z+48 ; 0x30 - 512: 90 68 ori r25, 0x80 ; 128 - 514: 90 ab std Z+48, r25 ; 0x30 + 52c: 90 a9 ldd r25, Z+48 ; 0x30 + 52e: 90 68 ori r25, 0x80 ; 128 + 530: 90 ab std Z+48, r25 ; 0x30 DMA.CH3.REPCNT = 0; //Repeat forever! - 516: 10 92 46 01 sts 0x0146, r1 ; 0x800146 <__TEXT_REGION_LENGTH__+0x700146> + 532: 10 92 46 01 sts 0x0146, r1 ; 0x800146 <__TEXT_REGION_LENGTH__+0x700146> DMA.CH3.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm | DMA_CH_REPEAT_bm; - 51a: e0 e4 ldi r30, 0x40 ; 64 - 51c: f1 e0 ldi r31, 0x01 ; 1 - 51e: 30 83 st Z, r19 + 536: e0 e4 ldi r30, 0x40 ; 64 + 538: f1 e0 ldi r31, 0x01 ; 1 + 53a: 30 83 st Z, r19 DMA.CH3.CTRLB = 0x00; //Hi interrupt on block complete - 520: 10 92 41 01 sts 0x0141, r1 ; 0x800141 <__TEXT_REGION_LENGTH__+0x700141> + 53c: 10 92 41 01 sts 0x0141, r1 ; 0x800141 <__TEXT_REGION_LENGTH__+0x700141> DMA.CH3.ADDRCTRL = DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc | DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc; //Dest reloads after each burst, with byte incrementing. Src reloads at end of block, also incrementing address. - 524: 20 93 42 01 sts 0x0142, r18 ; 0x800142 <__TEXT_REGION_LENGTH__+0x700142> + 540: 20 93 42 01 sts 0x0142, r18 ; 0x800142 <__TEXT_REGION_LENGTH__+0x700142> DMA.CH3.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH2_gc; //Triggered from TCC0 when it hits PER - 528: 80 93 43 01 sts 0x0143, r24 ; 0x800143 <__TEXT_REGION_LENGTH__+0x700143> + 544: 80 93 43 01 sts 0x0143, r24 ; 0x800143 <__TEXT_REGION_LENGTH__+0x700143> DMA.CH3.TRFCNT = dacBuf_len; - 52c: 20 91 04 20 lds r18, 0x2004 ; 0x802004 - 530: 30 91 05 20 lds r19, 0x2005 ; 0x802005 - 534: 20 93 44 01 sts 0x0144, r18 ; 0x800144 <__TEXT_REGION_LENGTH__+0x700144> - 538: 30 93 45 01 sts 0x0145, r19 ; 0x800145 <__TEXT_REGION_LENGTH__+0x700145> + 548: 20 91 04 20 lds r18, 0x2004 ; 0x802004 + 54c: 30 91 05 20 lds r19, 0x2005 ; 0x802005 + 550: 20 93 44 01 sts 0x0144, r18 ; 0x800144 <__TEXT_REGION_LENGTH__+0x700144> + 554: 30 93 45 01 sts 0x0145, r19 ; 0x800145 <__TEXT_REGION_LENGTH__+0x700145> DMA.CH3.SRCADDR0 = (( (uint16_t) &dacBuf_CH1[0]) >> 0) & 0xFF; //Source address is dacbuf - 53c: 26 e5 ldi r18, 0x56 ; 86 - 53e: 32 e2 ldi r19, 0x22 ; 34 - 540: 20 93 48 01 sts 0x0148, r18 ; 0x800148 <__TEXT_REGION_LENGTH__+0x700148> + 558: 2a e5 ldi r18, 0x5A ; 90 + 55a: 32 e2 ldi r19, 0x22 ; 34 + 55c: 20 93 48 01 sts 0x0148, r18 ; 0x800148 <__TEXT_REGION_LENGTH__+0x700148> DMA.CH3.SRCADDR1 = (( (uint16_t) &dacBuf_CH1[0]) >> 8) & 0xFF; - 544: 30 93 49 01 sts 0x0149, r19 ; 0x800149 <__TEXT_REGION_LENGTH__+0x700149> + 560: 30 93 49 01 sts 0x0149, r19 ; 0x800149 <__TEXT_REGION_LENGTH__+0x700149> DMA.CH3.SRCADDR2 = 0x00; - 548: 10 92 4a 01 sts 0x014A, r1 ; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a> + 564: 10 92 4a 01 sts 0x014A, r1 ; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a> DMA.CH3.DESTADDR0 = (( (uint16_t) &DACB.CH0DATAH) >> 0) & 0xFF; //Dest address is high byte of DAC register - 54c: 99 e3 ldi r25, 0x39 ; 57 - 54e: 90 93 4c 01 sts 0x014C, r25 ; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c> + 568: 99 e3 ldi r25, 0x39 ; 57 + 56a: 90 93 4c 01 sts 0x014C, r25 ; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c> DMA.CH3.DESTADDR1 = (( (uint16_t) &DACB.CH0DATAH) >> 8) & 0xFF; - 552: 80 93 4d 01 sts 0x014D, r24 ; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d> + 56e: 80 93 4d 01 sts 0x014D, r24 ; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d> DMA.CH3.DESTADDR2 = 0x00; - 556: 10 92 4e 01 sts 0x014E, r1 ; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e> + 572: 10 92 4e 01 sts 0x014E, r1 ; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e> //Must enable last for REPCNT won't work! DMA.CH3.CTRLA |= DMA_CH_ENABLE_bm; //Enable! - 55a: 80 81 ld r24, Z - 55c: 80 68 ori r24, 0x80 ; 128 - 55e: 80 83 st Z, r24 - 560: 08 95 ret + 576: 80 81 ld r24, Z + 578: 80 68 ori r24, 0x80 ; 128 + 57a: 80 83 st Z, r24 + 57c: 08 95 ret -00000562 : +0000057e : } void tiny_dma_loop_mode_0(void){ DMA.CH0.CTRLA = 0x00; - 562: e0 e0 ldi r30, 0x00 ; 0 - 564: f1 e0 ldi r31, 0x01 ; 1 - 566: 10 8a std Z+16, r1 ; 0x10 + 57e: e0 e0 ldi r30, 0x00 ; 0 + 580: f1 e0 ldi r31, 0x01 ; 1 + 582: 10 8a std Z+16, r1 ; 0x10 DMA.CH0.CTRLA = DMA_CH_RESET_bm; - 568: 80 e4 ldi r24, 0x40 ; 64 - 56a: 80 8b std Z+16, r24 ; 0x10 + 584: 80 e4 ldi r24, 0x40 ; 64 + 586: 80 8b std Z+16, r24 ; 0x10 DMA.CH0.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm; //Do not repeat! - 56c: 84 e0 ldi r24, 0x04 ; 4 - 56e: 80 8b std Z+16, r24 ; 0x10 + 588: 84 e0 ldi r24, 0x04 ; 4 + 58a: 80 8b std Z+16, r24 ; 0x10 DMA.CH0.CTRLB = 0x00; //No interrupt! - 570: 11 8a std Z+17, r1 ; 0x11 + 58c: 11 8a std Z+17, r1 ; 0x11 DMA.CH0.ADDRCTRL = DMA_CH_SRCRELOAD_BURST_gc | DMA_CH_SRCDIR_INC_gc | DMA_CH_DESTDIR_INC_gc; //Source reloads after each burst, with byte incrementing. Dest does not reload, but does increment address. - 572: 81 e9 ldi r24, 0x91 ; 145 - 574: 82 8b std Z+18, r24 ; 0x12 + 58e: 81 e9 ldi r24, 0x91 ; 145 + 590: 82 8b std Z+18, r24 ; 0x12 DMA.CH0.TRIGSRC = DMA_CH_TRIGSRC_ADCA_CH0_gc; //Triggered from ADCA channel 0 - 576: 80 e1 ldi r24, 0x10 ; 16 - 578: 83 8b std Z+19, r24 ; 0x13 + 592: 80 e1 ldi r24, 0x10 ; 16 + 594: 83 8b std Z+19, r24 ; 0x13 DMA.CH0.TRFCNT = HALFPACKET_SIZE; - 57a: 87 e7 ldi r24, 0x77 ; 119 - 57c: 91 e0 ldi r25, 0x01 ; 1 - 57e: 84 8b std Z+20, r24 ; 0x14 - 580: 95 8b std Z+21, r25 ; 0x15 + 596: 87 e7 ldi r24, 0x77 ; 119 + 598: 91 e0 ldi r25, 0x01 ; 1 + 59a: 84 8b std Z+20, r24 ; 0x14 + 59c: 95 8b std Z+21, r25 ; 0x15 DMA.CH0.SRCADDR0 = (( (uint16_t) &ADCA.CH0.RESL) >> 0) & 0xFF; //Source address is ADC - 582: 84 e2 ldi r24, 0x24 ; 36 - 584: 80 8f std Z+24, r24 ; 0x18 + 59e: 84 e2 ldi r24, 0x24 ; 36 + 5a0: 80 8f std Z+24, r24 ; 0x18 DMA.CH0.SRCADDR1 = (( (uint16_t) &ADCA.CH0.RESL) >> 8) & 0xFF; - 586: 82 e0 ldi r24, 0x02 ; 2 - 588: 81 8f std Z+25, r24 ; 0x19 + 5a2: 82 e0 ldi r24, 0x02 ; 2 + 5a4: 81 8f std Z+25, r24 ; 0x19 DMA.CH0.SRCADDR2 = 0x00; - 58a: 12 8e std Z+26, r1 ; 0x1a + 5a6: 12 8e std Z+26, r1 ; 0x1a DMA.CH0.DESTADDR0 = (( (uint16_t) &isoBuf[b1_state * PACKET_SIZE]) >> 0) & 0xFF; //Dest address is isoBuf - 58c: 40 91 b4 20 lds r20, 0x20B4 ; 0x8020b4 - 590: 2e ee ldi r18, 0xEE ; 238 - 592: 32 e0 ldi r19, 0x02 ; 2 - 594: 42 9f mul r20, r18 - 596: c0 01 movw r24, r0 - 598: 43 9f mul r20, r19 - 59a: 90 0d add r25, r0 - 59c: 11 24 eor r1, r1 - 59e: 8a 59 subi r24, 0x9A ; 154 - 5a0: 99 4d sbci r25, 0xD9 ; 217 - 5a2: 84 8f std Z+28, r24 ; 0x1c + 5a8: 40 91 b4 20 lds r20, 0x20B4 ; 0x8020b4 + 5ac: 2e ee ldi r18, 0xEE ; 238 + 5ae: 32 e0 ldi r19, 0x02 ; 2 + 5b0: 42 9f mul r20, r18 + 5b2: c0 01 movw r24, r0 + 5b4: 43 9f mul r20, r19 + 5b6: 90 0d add r25, r0 + 5b8: 11 24 eor r1, r1 + 5ba: 86 59 subi r24, 0x96 ; 150 + 5bc: 99 4d sbci r25, 0xD9 ; 217 + 5be: 84 8f std Z+28, r24 ; 0x1c DMA.CH0.DESTADDR1 = (( (uint16_t) &isoBuf[b1_state * PACKET_SIZE]) >> 8) & 0xFF; - 5a4: 40 91 b4 20 lds r20, 0x20B4 ; 0x8020b4 - 5a8: 42 9f mul r20, r18 - 5aa: c0 01 movw r24, r0 - 5ac: 43 9f mul r20, r19 - 5ae: 90 0d add r25, r0 - 5b0: 11 24 eor r1, r1 - 5b2: 8a 59 subi r24, 0x9A ; 154 - 5b4: 99 4d sbci r25, 0xD9 ; 217 - 5b6: 95 8f std Z+29, r25 ; 0x1d + 5c0: 40 91 b4 20 lds r20, 0x20B4 ; 0x8020b4 + 5c4: 42 9f mul r20, r18 + 5c6: c0 01 movw r24, r0 + 5c8: 43 9f mul r20, r19 + 5ca: 90 0d add r25, r0 + 5cc: 11 24 eor r1, r1 + 5ce: 86 59 subi r24, 0x96 ; 150 + 5d0: 99 4d sbci r25, 0xD9 ; 217 + 5d2: 95 8f std Z+29, r25 ; 0x1d DMA.CH0.DESTADDR2 = 0x00; - 5b8: 16 8e std Z+30, r1 ; 0x1e + 5d4: 16 8e std Z+30, r1 ; 0x1e //Must enable last for REPCNT won't work! DMA.CH0.CTRLA |= DMA_CH_ENABLE_bm; //Enable! - 5ba: 80 89 ldd r24, Z+16 ; 0x10 - 5bc: 80 68 ori r24, 0x80 ; 128 - 5be: 80 8b std Z+16, r24 ; 0x10 - 5c0: 08 95 ret + 5d6: 80 89 ldd r24, Z+16 ; 0x10 + 5d8: 80 68 ori r24, 0x80 ; 128 + 5da: 80 8b std Z+16, r24 ; 0x10 + 5dc: 08 95 ret -000005c2 : +000005de : } void tiny_dma_set_mode_1(void){ global_mode = 1; - 5c2: 81 e0 ldi r24, 0x01 ; 1 - 5c4: 80 93 00 20 sts 0x2000, r24 ; 0x802000 <__data_start> + 5de: 81 e0 ldi r24, 0x01 ; 1 + 5e0: 80 93 00 20 sts 0x2000, r24 ; 0x802000 <__data_start> tiny_dma_flush(); - 5c8: 72 df rcall .-284 ; 0x4ae + 5e4: 72 df rcall .-284 ; 0x4ca //AUX channel (to keep it tx, therefore always rx) DMA.CH2.CTRLA = 0x00; - 5ca: e0 e0 ldi r30, 0x00 ; 0 - 5cc: f1 e0 ldi r31, 0x01 ; 1 - 5ce: 10 aa std Z+48, r1 ; 0x30 + 5e6: e0 e0 ldi r30, 0x00 ; 0 + 5e8: f1 e0 ldi r31, 0x01 ; 1 + 5ea: 10 aa std Z+48, r1 ; 0x30 DMA.CH2.CTRLA = DMA_CH_RESET_bm; - 5d0: 80 e4 ldi r24, 0x40 ; 64 - 5d2: 80 ab std Z+48, r24 ; 0x30 + 5ec: 80 e4 ldi r24, 0x40 ; 64 + 5ee: 80 ab std Z+48, r24 ; 0x30 DMA.CH2.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm; //Do not repeat! - 5d4: 84 e0 ldi r24, 0x04 ; 4 - 5d6: 80 ab std Z+48, r24 ; 0x30 + 5f0: 84 e0 ldi r24, 0x04 ; 4 + 5f2: 80 ab std Z+48, r24 ; 0x30 DMA.CH2.CTRLB = 0x00; //No int - 5d8: 11 aa std Z+49, r1 ; 0x31 + 5f4: 11 aa std Z+49, r1 ; 0x31 DMA.CH2.ADDRCTRL = DMA_CH_SRCDIR_FIXED_gc | DMA_CH_DESTDIR_FIXED_gc; //Source and address fixed. - 5da: 12 aa std Z+50, r1 ; 0x32 + 5f6: 12 aa std Z+50, r1 ; 0x32 DMA.CH2.TRIGSRC = DMA_CH_TRIGSRC_USARTC0_RXC_gc; - 5dc: 8b e4 ldi r24, 0x4B ; 75 - 5de: 83 ab std Z+51, r24 ; 0x33 + 5f8: 8b e4 ldi r24, 0x4B ; 75 + 5fa: 83 ab std Z+51, r24 ; 0x33 DMA.CH2.TRFCNT = 0; - 5e0: 14 aa std Z+52, r1 ; 0x34 - 5e2: 15 aa std Z+53, r1 ; 0x35 + 5fc: 14 aa std Z+52, r1 ; 0x34 + 5fe: 15 aa std Z+53, r1 ; 0x35 DMA.CH2.REPCNT = 0; - 5e4: 16 aa std Z+54, r1 ; 0x36 + 600: 16 aa std Z+54, r1 ; 0x36 DMA.CH2.SRCADDR0 = (( (uint16_t) &dummy) >> 0) & 0xFF; - 5e6: 81 e0 ldi r24, 0x01 ; 1 - 5e8: 90 e2 ldi r25, 0x20 ; 32 - 5ea: 80 af std Z+56, r24 ; 0x38 + 602: 81 e0 ldi r24, 0x01 ; 1 + 604: 90 e2 ldi r25, 0x20 ; 32 + 606: 80 af std Z+56, r24 ; 0x38 DMA.CH2.SRCADDR1 = (( (uint16_t) &dummy) >> 8) & 0xFF; - 5ec: 91 af std Z+57, r25 ; 0x39 + 608: 91 af std Z+57, r25 ; 0x39 DMA.CH2.SRCADDR2 = 0x00; - 5ee: 12 ae std Z+58, r1 ; 0x3a + 60a: 12 ae std Z+58, r1 ; 0x3a DMA.CH2.DESTADDR0 = (( (uint16_t) &USARTC0.DATA) >> 0) & 0xFF; - 5f0: 80 ea ldi r24, 0xA0 ; 160 - 5f2: 84 af std Z+60, r24 ; 0x3c + 60c: 80 ea ldi r24, 0xA0 ; 160 + 60e: 84 af std Z+60, r24 ; 0x3c DMA.CH2.DESTADDR1 = (( (uint16_t) &USARTC0.DATA) >> 8) & 0xFF; - 5f4: 88 e0 ldi r24, 0x08 ; 8 - 5f6: 80 93 3d 01 sts 0x013D, r24 ; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d> + 610: 88 e0 ldi r24, 0x08 ; 8 + 612: 80 93 3d 01 sts 0x013D, r24 ; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d> DMA.CH2.DESTADDR2 = 0x00; - 5fa: 10 92 3e 01 sts 0x013E, r1 ; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e> + 616: 10 92 3e 01 sts 0x013E, r1 ; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e> //Must enable last for REPCNT won't work! DMA.CH2.CTRLA |= DMA_CH_REPEAT_bm | DMA_CH_ENABLE_bm; //Enable! - 5fe: 80 a9 ldd r24, Z+48 ; 0x30 - 600: 80 6a ori r24, 0xA0 ; 160 - 602: 80 ab std Z+48, r24 ; 0x30 + 61a: 80 a9 ldd r24, Z+48 ; 0x30 + 61c: 80 6a ori r24, 0xA0 ; 160 + 61e: 80 ab std Z+48, r24 ; 0x30 USARTC0.DATA = 0x55; - 604: 85 e5 ldi r24, 0x55 ; 85 - 606: 80 93 a0 08 sts 0x08A0, r24 ; 0x8008a0 <__TEXT_REGION_LENGTH__+0x7008a0> + 620: 85 e5 ldi r24, 0x55 ; 85 + 622: 80 93 a0 08 sts 0x08A0, r24 ; 0x8008a0 <__TEXT_REGION_LENGTH__+0x7008a0> DMA.CH3.REPCNT = 0; //Repeat forever! - 60a: 10 92 46 01 sts 0x0146, r1 ; 0x800146 <__TEXT_REGION_LENGTH__+0x700146> + 626: 10 92 46 01 sts 0x0146, r1 ; 0x800146 <__TEXT_REGION_LENGTH__+0x700146> DMA.CH3.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm | DMA_CH_REPEAT_bm; - 60e: e0 e4 ldi r30, 0x40 ; 64 - 610: f1 e0 ldi r31, 0x01 ; 1 - 612: 84 e2 ldi r24, 0x24 ; 36 - 614: 80 83 st Z, r24 + 62a: e0 e4 ldi r30, 0x40 ; 64 + 62c: f1 e0 ldi r31, 0x01 ; 1 + 62e: 84 e2 ldi r24, 0x24 ; 36 + 630: 80 83 st Z, r24 DMA.CH3.CTRLB = 0x00; //No interrupt for DacBuf!! - 616: 10 92 41 01 sts 0x0141, r1 ; 0x800141 <__TEXT_REGION_LENGTH__+0x700141> + 632: 10 92 41 01 sts 0x0141, r1 ; 0x800141 <__TEXT_REGION_LENGTH__+0x700141> DMA.CH3.ADDRCTRL = DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc | DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc; //Dest reloads after each burst, with byte incrementing. Src reloads at end of block, also incrementing address. - 61a: 89 e5 ldi r24, 0x59 ; 89 - 61c: 80 93 42 01 sts 0x0142, r24 ; 0x800142 <__TEXT_REGION_LENGTH__+0x700142> + 636: 89 e5 ldi r24, 0x59 ; 89 + 638: 80 93 42 01 sts 0x0142, r24 ; 0x800142 <__TEXT_REGION_LENGTH__+0x700142> DMA.CH3.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH1_gc; //Triggered from TCC0 when it hits PER - 620: 82 e0 ldi r24, 0x02 ; 2 - 622: 80 93 43 01 sts 0x0143, r24 ; 0x800143 <__TEXT_REGION_LENGTH__+0x700143> + 63c: 82 e0 ldi r24, 0x02 ; 2 + 63e: 80 93 43 01 sts 0x0143, r24 ; 0x800143 <__TEXT_REGION_LENGTH__+0x700143> DMA.CH3.TRFCNT = auxDacBufLen; - 626: 80 91 02 20 lds r24, 0x2002 ; 0x802002 - 62a: 90 91 03 20 lds r25, 0x2003 ; 0x802003 - 62e: 80 93 44 01 sts 0x0144, r24 ; 0x800144 <__TEXT_REGION_LENGTH__+0x700144> - 632: 90 93 45 01 sts 0x0145, r25 ; 0x800145 <__TEXT_REGION_LENGTH__+0x700145> + 642: 80 91 02 20 lds r24, 0x2002 ; 0x802002 + 646: 90 91 03 20 lds r25, 0x2003 ; 0x802003 + 64a: 80 93 44 01 sts 0x0144, r24 ; 0x800144 <__TEXT_REGION_LENGTH__+0x700144> + 64e: 90 93 45 01 sts 0x0145, r25 ; 0x800145 <__TEXT_REGION_LENGTH__+0x700145> DMA.CH3.SRCADDR0 = (( (uint16_t) &dacBuf_CH2[0]) >> 0) & 0xFF; //Source address is dacbuf - 636: 86 e6 ldi r24, 0x66 ; 102 - 638: 94 e2 ldi r25, 0x24 ; 36 - 63a: 80 93 48 01 sts 0x0148, r24 ; 0x800148 <__TEXT_REGION_LENGTH__+0x700148> + 652: 8a e6 ldi r24, 0x6A ; 106 + 654: 94 e2 ldi r25, 0x24 ; 36 + 656: 80 93 48 01 sts 0x0148, r24 ; 0x800148 <__TEXT_REGION_LENGTH__+0x700148> DMA.CH3.SRCADDR1 = (( (uint16_t) &dacBuf_CH2[0]) >> 8) & 0xFF; - 63e: 90 93 49 01 sts 0x0149, r25 ; 0x800149 <__TEXT_REGION_LENGTH__+0x700149> + 65a: 90 93 49 01 sts 0x0149, r25 ; 0x800149 <__TEXT_REGION_LENGTH__+0x700149> DMA.CH3.SRCADDR2 = 0x00; - 642: 10 92 4a 01 sts 0x014A, r1 ; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a> + 65e: 10 92 4a 01 sts 0x014A, r1 ; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a> DMA.CH3.DESTADDR0 = (( (uint16_t) &DACB.CH1DATAH) >> 0) & 0xFF; //Dest address is high byte of DAC register - 646: 8b e3 ldi r24, 0x3B ; 59 - 648: 80 93 4c 01 sts 0x014C, r24 ; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c> + 662: 8b e3 ldi r24, 0x3B ; 59 + 664: 80 93 4c 01 sts 0x014C, r24 ; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c> DMA.CH3.DESTADDR1 = (( (uint16_t) &DACB.CH1DATAH) >> 8) & 0xFF; - 64c: 83 e0 ldi r24, 0x03 ; 3 - 64e: 80 93 4d 01 sts 0x014D, r24 ; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d> + 668: 83 e0 ldi r24, 0x03 ; 3 + 66a: 80 93 4d 01 sts 0x014D, r24 ; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d> DMA.CH3.DESTADDR2 = 0x00; - 652: 10 92 4e 01 sts 0x014E, r1 ; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e> + 66e: 10 92 4e 01 sts 0x014E, r1 ; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e> //Must enable last for REPCNT won't work! DMA.CH3.CTRLA |= DMA_CH_ENABLE_bm; //Enable! - 656: 80 81 ld r24, Z - 658: 80 68 ori r24, 0x80 ; 128 - 65a: 80 83 st Z, r24 - 65c: 08 95 ret + 672: 80 81 ld r24, Z + 674: 80 68 ori r24, 0x80 ; 128 + 676: 80 83 st Z, r24 + 678: 08 95 ret -0000065e : +0000067a : } void tiny_dma_loop_mode_1(void){ DMA.CH0.CTRLA = 0x00; - 65e: e0 e0 ldi r30, 0x00 ; 0 - 660: f1 e0 ldi r31, 0x01 ; 1 - 662: 10 8a std Z+16, r1 ; 0x10 + 67a: e0 e0 ldi r30, 0x00 ; 0 + 67c: f1 e0 ldi r31, 0x01 ; 1 + 67e: 10 8a std Z+16, r1 ; 0x10 DMA.CH0.CTRLA = DMA_CH_RESET_bm; - 664: a0 e4 ldi r26, 0x40 ; 64 - 666: a0 8b std Z+16, r26 ; 0x10 + 680: a0 e4 ldi r26, 0x40 ; 64 + 682: a0 8b std Z+16, r26 ; 0x10 DMA.CH0.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm; //Do not repeat! - 668: 74 e0 ldi r23, 0x04 ; 4 - 66a: 70 8b std Z+16, r23 ; 0x10 + 684: 74 e0 ldi r23, 0x04 ; 4 + 686: 70 8b std Z+16, r23 ; 0x10 DMA.CH0.CTRLB = 0x00; //No interrupt! - 66c: 11 8a std Z+17, r1 ; 0x11 + 688: 11 8a std Z+17, r1 ; 0x11 DMA.CH0.ADDRCTRL = DMA_CH_SRCRELOAD_BURST_gc | DMA_CH_SRCDIR_INC_gc | DMA_CH_DESTDIR_INC_gc; //Source reloads after each burst, with byte incrementing. Dest does not reload, but does increment address. - 66e: 61 e9 ldi r22, 0x91 ; 145 - 670: 62 8b std Z+18, r22 ; 0x12 + 68a: 61 e9 ldi r22, 0x91 ; 145 + 68c: 62 8b std Z+18, r22 ; 0x12 DMA.CH0.TRIGSRC = DMA_CH_TRIGSRC_ADCA_CH0_gc; //Triggered from ADCA channel 0 - 672: 80 e1 ldi r24, 0x10 ; 16 - 674: 83 8b std Z+19, r24 ; 0x13 + 68e: 80 e1 ldi r24, 0x10 ; 16 + 690: 83 8b std Z+19, r24 ; 0x13 DMA.CH0.TRFCNT = HALFPACKET_SIZE; - 676: 47 e7 ldi r20, 0x77 ; 119 - 678: 51 e0 ldi r21, 0x01 ; 1 - 67a: 44 8b std Z+20, r20 ; 0x14 - 67c: 55 8b std Z+21, r21 ; 0x15 + 692: 47 e7 ldi r20, 0x77 ; 119 + 694: 51 e0 ldi r21, 0x01 ; 1 + 696: 44 8b std Z+20, r20 ; 0x14 + 698: 55 8b std Z+21, r21 ; 0x15 DMA.CH0.SRCADDR0 = (( (uint16_t) &ADCA.CH0.RESL) >> 0) & 0xFF; //Source address is ADC - 67e: 84 e2 ldi r24, 0x24 ; 36 - 680: 80 8f std Z+24, r24 ; 0x18 + 69a: 84 e2 ldi r24, 0x24 ; 36 + 69c: 80 8f std Z+24, r24 ; 0x18 DMA.CH0.SRCADDR1 = (( (uint16_t) &ADCA.CH0.RESL) >> 8) & 0xFF; - 682: 82 e0 ldi r24, 0x02 ; 2 - 684: 81 8f std Z+25, r24 ; 0x19 + 69e: 82 e0 ldi r24, 0x02 ; 2 + 6a0: 81 8f std Z+25, r24 ; 0x19 DMA.CH0.SRCADDR2 = 0x00; - 686: 12 8e std Z+26, r1 ; 0x1a + 6a2: 12 8e std Z+26, r1 ; 0x1a DMA.CH0.DESTADDR0 = (( (uint16_t) &isoBuf[b1_state * PACKET_SIZE]) >> 0) & 0xFF; //Dest address is isoBuf - 688: b0 91 b4 20 lds r27, 0x20B4 ; 0x8020b4 - 68c: 8e ee ldi r24, 0xEE ; 238 - 68e: 92 e0 ldi r25, 0x02 ; 2 - 690: b8 9f mul r27, r24 - 692: 90 01 movw r18, r0 - 694: b9 9f mul r27, r25 - 696: 30 0d add r19, r0 - 698: 11 24 eor r1, r1 - 69a: 2a 59 subi r18, 0x9A ; 154 - 69c: 39 4d sbci r19, 0xD9 ; 217 - 69e: 24 8f std Z+28, r18 ; 0x1c + 6a4: b0 91 b4 20 lds r27, 0x20B4 ; 0x8020b4 + 6a8: 8e ee ldi r24, 0xEE ; 238 + 6aa: 92 e0 ldi r25, 0x02 ; 2 + 6ac: b8 9f mul r27, r24 + 6ae: 90 01 movw r18, r0 + 6b0: b9 9f mul r27, r25 + 6b2: 30 0d add r19, r0 + 6b4: 11 24 eor r1, r1 + 6b6: 26 59 subi r18, 0x96 ; 150 + 6b8: 39 4d sbci r19, 0xD9 ; 217 + 6ba: 24 8f std Z+28, r18 ; 0x1c DMA.CH0.DESTADDR1 = (( (uint16_t) &isoBuf[b1_state * PACKET_SIZE]) >> 8) & 0xFF; - 6a0: b0 91 b4 20 lds r27, 0x20B4 ; 0x8020b4 - 6a4: b8 9f mul r27, r24 - 6a6: 90 01 movw r18, r0 - 6a8: b9 9f mul r27, r25 - 6aa: 30 0d add r19, r0 - 6ac: 11 24 eor r1, r1 - 6ae: 2a 59 subi r18, 0x9A ; 154 - 6b0: 39 4d sbci r19, 0xD9 ; 217 - 6b2: 35 8f std Z+29, r19 ; 0x1d + 6bc: b0 91 b4 20 lds r27, 0x20B4 ; 0x8020b4 + 6c0: b8 9f mul r27, r24 + 6c2: 90 01 movw r18, r0 + 6c4: b9 9f mul r27, r25 + 6c6: 30 0d add r19, r0 + 6c8: 11 24 eor r1, r1 + 6ca: 26 59 subi r18, 0x96 ; 150 + 6cc: 39 4d sbci r19, 0xD9 ; 217 + 6ce: 35 8f std Z+29, r19 ; 0x1d DMA.CH0.DESTADDR2 = 0x00; - 6b4: 16 8e std Z+30, r1 ; 0x1e + 6d0: 16 8e std Z+30, r1 ; 0x1e //Must enable last for REPCNT won't work! DMA.CH0.CTRLA |= DMA_CH_ENABLE_bm; //Enable! - 6b6: 20 89 ldd r18, Z+16 ; 0x10 - 6b8: 20 68 ori r18, 0x80 ; 128 - 6ba: 20 8b std Z+16, r18 ; 0x10 + 6d2: 20 89 ldd r18, Z+16 ; 0x10 + 6d4: 20 68 ori r18, 0x80 ; 128 + 6d6: 20 8b std Z+16, r18 ; 0x10 DMA.CH1.CTRLA = 0x00; - 6bc: 10 a2 std Z+32, r1 ; 0x20 + 6d8: 10 a2 std Z+32, r1 ; 0x20 DMA.CH1.CTRLA = DMA_CH_RESET_bm; - 6be: a0 a3 std Z+32, r26 ; 0x20 + 6da: a0 a3 std Z+32, r26 ; 0x20 DMA.CH1.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm; //Do not repeat! - 6c0: 70 a3 std Z+32, r23 ; 0x20 + 6dc: 70 a3 std Z+32, r23 ; 0x20 DMA.CH1.CTRLB = 0x00; //No interrupt - 6c2: 11 a2 std Z+33, r1 ; 0x21 + 6de: 11 a2 std Z+33, r1 ; 0x21 DMA.CH1.ADDRCTRL = DMA_CH_SRCRELOAD_BURST_gc | DMA_CH_SRCDIR_INC_gc | DMA_CH_DESTDIR_INC_gc; //Source reloads after each burst, with byte incrementing. Dest does not reload, but does increment address. - 6c4: 62 a3 std Z+34, r22 ; 0x22 + 6e0: 62 a3 std Z+34, r22 ; 0x22 DMA.CH1.TRIGSRC = DMA_CH_TRIGSRC_USARTC0_RXC_gc; - 6c6: 2b e4 ldi r18, 0x4B ; 75 - 6c8: 23 a3 std Z+35, r18 ; 0x23 + 6e2: 2b e4 ldi r18, 0x4B ; 75 + 6e4: 23 a3 std Z+35, r18 ; 0x23 DMA.CH1.TRFCNT = HALFPACKET_SIZE; - 6ca: 44 a3 std Z+36, r20 ; 0x24 - 6cc: 55 a3 std Z+37, r21 ; 0x25 + 6e6: 44 a3 std Z+36, r20 ; 0x24 + 6e8: 55 a3 std Z+37, r21 ; 0x25 DMA.CH1.SRCADDR0 = (( (uint16_t) &USARTC0.DATA) >> 0) & 0xFF; //Source address is ADC - 6ce: 20 ea ldi r18, 0xA0 ; 160 - 6d0: 20 a7 std Z+40, r18 ; 0x28 + 6ea: 20 ea ldi r18, 0xA0 ; 160 + 6ec: 20 a7 std Z+40, r18 ; 0x28 DMA.CH1.SRCADDR1 = (( (uint16_t) &USARTC0.DATA) >> 8) & 0xFF; - 6d2: 28 e0 ldi r18, 0x08 ; 8 - 6d4: 21 a7 std Z+41, r18 ; 0x29 + 6ee: 28 e0 ldi r18, 0x08 ; 8 + 6f0: 21 a7 std Z+41, r18 ; 0x29 DMA.CH1.SRCADDR2 = 0x00; - 6d6: 12 a6 std Z+42, r1 ; 0x2a + 6f2: 12 a6 std Z+42, r1 ; 0x2a DMA.CH1.DESTADDR0 = (( (uint16_t) &isoBuf[b1_state * PACKET_SIZE + HALFPACKET_SIZE]) >> 0) & 0xFF; //Dest address is isoBuf - 6d8: 40 91 b4 20 lds r20, 0x20B4 ; 0x8020b4 - 6dc: 48 9f mul r20, r24 - 6de: 90 01 movw r18, r0 - 6e0: 49 9f mul r20, r25 - 6e2: 30 0d add r19, r0 - 6e4: 11 24 eor r1, r1 - 6e6: 23 52 subi r18, 0x23 ; 35 - 6e8: 38 4d sbci r19, 0xD8 ; 216 - 6ea: 24 a7 std Z+44, r18 ; 0x2c + 6f4: 40 91 b4 20 lds r20, 0x20B4 ; 0x8020b4 + 6f8: 48 9f mul r20, r24 + 6fa: 90 01 movw r18, r0 + 6fc: 49 9f mul r20, r25 + 6fe: 30 0d add r19, r0 + 700: 11 24 eor r1, r1 + 702: 2f 51 subi r18, 0x1F ; 31 + 704: 38 4d sbci r19, 0xD8 ; 216 + 706: 24 a7 std Z+44, r18 ; 0x2c DMA.CH1.DESTADDR1 = (( (uint16_t) &isoBuf[b1_state * PACKET_SIZE + HALFPACKET_SIZE]) >> 8) & 0xFF; - 6ec: 40 91 b4 20 lds r20, 0x20B4 ; 0x8020b4 - 6f0: 48 9f mul r20, r24 - 6f2: 90 01 movw r18, r0 - 6f4: 49 9f mul r20, r25 - 6f6: 30 0d add r19, r0 - 6f8: 11 24 eor r1, r1 - 6fa: c9 01 movw r24, r18 - 6fc: 83 52 subi r24, 0x23 ; 35 - 6fe: 98 4d sbci r25, 0xD8 ; 216 - 700: 95 a7 std Z+45, r25 ; 0x2d + 708: 40 91 b4 20 lds r20, 0x20B4 ; 0x8020b4 + 70c: 48 9f mul r20, r24 + 70e: 90 01 movw r18, r0 + 710: 49 9f mul r20, r25 + 712: 30 0d add r19, r0 + 714: 11 24 eor r1, r1 + 716: c9 01 movw r24, r18 + 718: 8f 51 subi r24, 0x1F ; 31 + 71a: 98 4d sbci r25, 0xD8 ; 216 + 71c: 95 a7 std Z+45, r25 ; 0x2d DMA.CH1.DESTADDR2 = 0x00; - 702: 16 a6 std Z+46, r1 ; 0x2e + 71e: 16 a6 std Z+46, r1 ; 0x2e //Must enable last for REPCNT won't work! DMA.CH1.CTRLA |= DMA_CH_ENABLE_bm; //Enable! - 704: 80 a1 ldd r24, Z+32 ; 0x20 - 706: 80 68 ori r24, 0x80 ; 128 - 708: 80 a3 std Z+32, r24 ; 0x20 - 70a: 08 95 ret + 720: 80 a1 ldd r24, Z+32 ; 0x20 + 722: 80 68 ori r24, 0x80 ; 128 + 724: 80 a3 std Z+32, r24 ; 0x20 + 726: 08 95 ret -0000070c : +00000728 : } void tiny_dma_set_mode_2(void){ - 70c: cf 93 push r28 + 728: cf 93 push r28 global_mode = 2; - 70e: c2 e0 ldi r28, 0x02 ; 2 - 710: c0 93 00 20 sts 0x2000, r28 ; 0x802000 <__data_start> + 72a: c2 e0 ldi r28, 0x02 ; 2 + 72c: c0 93 00 20 sts 0x2000, r28 ; 0x802000 <__data_start> tiny_dma_flush(); - 714: cc de rcall .-616 ; 0x4ae + 730: cc de rcall .-616 ; 0x4ca DMA.CH2.REPCNT = 0; //Repeat forever! - 716: e0 e0 ldi r30, 0x00 ; 0 - 718: f1 e0 ldi r31, 0x01 ; 1 - 71a: 16 aa std Z+54, r1 ; 0x36 + 732: e0 e0 ldi r30, 0x00 ; 0 + 734: f1 e0 ldi r31, 0x01 ; 1 + 736: 16 aa std Z+54, r1 ; 0x36 DMA.CH2.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm | DMA_CH_REPEAT_bm; - 71c: 34 e2 ldi r19, 0x24 ; 36 - 71e: 30 ab std Z+48, r19 ; 0x30 + 738: 34 e2 ldi r19, 0x24 ; 36 + 73a: 30 ab std Z+48, r19 ; 0x30 DMA.CH2.CTRLB = 0x00; //Hi interrupt on block complete - 720: 11 aa std Z+49, r1 ; 0x31 + 73c: 11 aa std Z+49, r1 ; 0x31 DMA.CH2.ADDRCTRL = DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc | DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc; //Dest reloads after each burst, with byte incrementing. Src reloads at end of block, also incrementing address. - 722: 29 e5 ldi r18, 0x59 ; 89 - 724: 22 ab std Z+50, r18 ; 0x32 + 73e: 29 e5 ldi r18, 0x59 ; 89 + 740: 22 ab std Z+50, r18 ; 0x32 DMA.CH2.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH2_gc; //Triggered from TCC0 when it hits PER - 726: 83 e0 ldi r24, 0x03 ; 3 - 728: 83 ab std Z+51, r24 ; 0x33 + 742: 83 e0 ldi r24, 0x03 ; 3 + 744: 83 ab std Z+51, r24 ; 0x33 DMA.CH2.TRFCNT = dacBuf_len; - 72a: 40 91 04 20 lds r20, 0x2004 ; 0x802004 - 72e: 50 91 05 20 lds r21, 0x2005 ; 0x802005 - 732: 44 ab std Z+52, r20 ; 0x34 - 734: 55 ab std Z+53, r21 ; 0x35 + 746: 40 91 04 20 lds r20, 0x2004 ; 0x802004 + 74a: 50 91 05 20 lds r21, 0x2005 ; 0x802005 + 74e: 44 ab std Z+52, r20 ; 0x34 + 750: 55 ab std Z+53, r21 ; 0x35 DMA.CH2.SRCADDR0 = (( (uint16_t) &dacBuf_CH1[0]) >> 0) & 0xFF; //Source address is dacbuf - 736: 46 e5 ldi r20, 0x56 ; 86 - 738: 52 e2 ldi r21, 0x22 ; 34 - 73a: 40 af std Z+56, r20 ; 0x38 + 752: 4a e5 ldi r20, 0x5A ; 90 + 754: 52 e2 ldi r21, 0x22 ; 34 + 756: 40 af std Z+56, r20 ; 0x38 DMA.CH2.SRCADDR1 = (( (uint16_t) &dacBuf_CH1[0]) >> 8) & 0xFF; - 73c: 51 af std Z+57, r21 ; 0x39 + 758: 51 af std Z+57, r21 ; 0x39 DMA.CH2.SRCADDR2 = 0x00; - 73e: 12 ae std Z+58, r1 ; 0x3a + 75a: 12 ae std Z+58, r1 ; 0x3a DMA.CH2.DESTADDR0 = (( (uint16_t) &DACB.CH0DATAH) >> 0) & 0xFF; //Dest address is high byte of DAC register - 740: 99 e3 ldi r25, 0x39 ; 57 - 742: 94 af std Z+60, r25 ; 0x3c + 75c: 99 e3 ldi r25, 0x39 ; 57 + 75e: 94 af std Z+60, r25 ; 0x3c DMA.CH2.DESTADDR1 = (( (uint16_t) &DACB.CH0DATAH) >> 8) & 0xFF; - 744: 80 93 3d 01 sts 0x013D, r24 ; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d> + 760: 80 93 3d 01 sts 0x013D, r24 ; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d> DMA.CH2.DESTADDR2 = 0x00; - 748: 10 92 3e 01 sts 0x013E, r1 ; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e> + 764: 10 92 3e 01 sts 0x013E, r1 ; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e> //Must enable last for REPCNT won't work! DMA.CH2.CTRLA |= DMA_CH_ENABLE_bm; //Enable! - 74c: 90 a9 ldd r25, Z+48 ; 0x30 - 74e: 90 68 ori r25, 0x80 ; 128 - 750: 90 ab std Z+48, r25 ; 0x30 + 768: 90 a9 ldd r25, Z+48 ; 0x30 + 76a: 90 68 ori r25, 0x80 ; 128 + 76c: 90 ab std Z+48, r25 ; 0x30 DMA.CH3.REPCNT = 0; //Repeat forever! - 752: 10 92 46 01 sts 0x0146, r1 ; 0x800146 <__TEXT_REGION_LENGTH__+0x700146> + 76e: 10 92 46 01 sts 0x0146, r1 ; 0x800146 <__TEXT_REGION_LENGTH__+0x700146> DMA.CH3.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm | DMA_CH_REPEAT_bm; - 756: e0 e4 ldi r30, 0x40 ; 64 - 758: f1 e0 ldi r31, 0x01 ; 1 - 75a: 30 83 st Z, r19 + 772: e0 e4 ldi r30, 0x40 ; 64 + 774: f1 e0 ldi r31, 0x01 ; 1 + 776: 30 83 st Z, r19 DMA.CH3.CTRLB = 0x00; //No interrupt for DacBuf!! - 75c: 10 92 41 01 sts 0x0141, r1 ; 0x800141 <__TEXT_REGION_LENGTH__+0x700141> + 778: 10 92 41 01 sts 0x0141, r1 ; 0x800141 <__TEXT_REGION_LENGTH__+0x700141> DMA.CH3.ADDRCTRL = DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc | DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc; //Dest reloads after each burst, with byte incrementing. Src reloads at end of block, also incrementing address. - 760: 20 93 42 01 sts 0x0142, r18 ; 0x800142 <__TEXT_REGION_LENGTH__+0x700142> + 77c: 20 93 42 01 sts 0x0142, r18 ; 0x800142 <__TEXT_REGION_LENGTH__+0x700142> DMA.CH3.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH1_gc; //Triggered from TCC0 when it hits PER - 764: c0 93 43 01 sts 0x0143, r28 ; 0x800143 <__TEXT_REGION_LENGTH__+0x700143> + 780: c0 93 43 01 sts 0x0143, r28 ; 0x800143 <__TEXT_REGION_LENGTH__+0x700143> DMA.CH3.TRFCNT = auxDacBufLen; - 768: 20 91 02 20 lds r18, 0x2002 ; 0x802002 - 76c: 30 91 03 20 lds r19, 0x2003 ; 0x802003 - 770: 20 93 44 01 sts 0x0144, r18 ; 0x800144 <__TEXT_REGION_LENGTH__+0x700144> - 774: 30 93 45 01 sts 0x0145, r19 ; 0x800145 <__TEXT_REGION_LENGTH__+0x700145> + 784: 20 91 02 20 lds r18, 0x2002 ; 0x802002 + 788: 30 91 03 20 lds r19, 0x2003 ; 0x802003 + 78c: 20 93 44 01 sts 0x0144, r18 ; 0x800144 <__TEXT_REGION_LENGTH__+0x700144> + 790: 30 93 45 01 sts 0x0145, r19 ; 0x800145 <__TEXT_REGION_LENGTH__+0x700145> DMA.CH3.SRCADDR0 = (( (uint16_t) &dacBuf_CH2[0]) >> 0) & 0xFF; //Source address is dacbuf - 778: 26 e6 ldi r18, 0x66 ; 102 - 77a: 34 e2 ldi r19, 0x24 ; 36 - 77c: 20 93 48 01 sts 0x0148, r18 ; 0x800148 <__TEXT_REGION_LENGTH__+0x700148> + 794: 2a e6 ldi r18, 0x6A ; 106 + 796: 34 e2 ldi r19, 0x24 ; 36 + 798: 20 93 48 01 sts 0x0148, r18 ; 0x800148 <__TEXT_REGION_LENGTH__+0x700148> DMA.CH3.SRCADDR1 = (( (uint16_t) &dacBuf_CH2[0]) >> 8) & 0xFF; - 780: 30 93 49 01 sts 0x0149, r19 ; 0x800149 <__TEXT_REGION_LENGTH__+0x700149> + 79c: 30 93 49 01 sts 0x0149, r19 ; 0x800149 <__TEXT_REGION_LENGTH__+0x700149> DMA.CH3.SRCADDR2 = 0x00; - 784: 10 92 4a 01 sts 0x014A, r1 ; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a> + 7a0: 10 92 4a 01 sts 0x014A, r1 ; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a> DMA.CH3.DESTADDR0 = (( (uint16_t) &DACB.CH1DATAH) >> 0) & 0xFF; //Dest address is high byte of DAC register - 788: 9b e3 ldi r25, 0x3B ; 59 - 78a: 90 93 4c 01 sts 0x014C, r25 ; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c> + 7a4: 9b e3 ldi r25, 0x3B ; 59 + 7a6: 90 93 4c 01 sts 0x014C, r25 ; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c> DMA.CH3.DESTADDR1 = (( (uint16_t) &DACB.CH1DATAH) >> 8) & 0xFF; - 78e: 80 93 4d 01 sts 0x014D, r24 ; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d> + 7aa: 80 93 4d 01 sts 0x014D, r24 ; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d> DMA.CH3.DESTADDR2 = 0x00; - 792: 10 92 4e 01 sts 0x014E, r1 ; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e> + 7ae: 10 92 4e 01 sts 0x014E, r1 ; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e> //Must enable last for REPCNT won't work! DMA.CH3.CTRLA |= DMA_CH_ENABLE_bm; //Enable! - 796: 80 81 ld r24, Z - 798: 80 68 ori r24, 0x80 ; 128 - 79a: 80 83 st Z, r24 + 7b2: 80 81 ld r24, Z + 7b4: 80 68 ori r24, 0x80 ; 128 + 7b6: 80 83 st Z, r24 } - 79c: cf 91 pop r28 - 79e: 08 95 ret + 7b8: cf 91 pop r28 + 7ba: 08 95 ret -000007a0 : +000007bc : void tiny_dma_loop_mode_2(void){ - 7a0: cf 93 push r28 + 7bc: cf 93 push r28 DMA.CH0.CTRLA = 0x00; - 7a2: e0 e0 ldi r30, 0x00 ; 0 - 7a4: f1 e0 ldi r31, 0x01 ; 1 - 7a6: 10 8a std Z+16, r1 ; 0x10 + 7be: e0 e0 ldi r30, 0x00 ; 0 + 7c0: f1 e0 ldi r31, 0x01 ; 1 + 7c2: 10 8a std Z+16, r1 ; 0x10 DMA.CH0.CTRLA = DMA_CH_RESET_bm; - 7a8: b0 e4 ldi r27, 0x40 ; 64 - 7aa: b0 8b std Z+16, r27 ; 0x10 + 7c4: b0 e4 ldi r27, 0x40 ; 64 + 7c6: b0 8b std Z+16, r27 ; 0x10 DMA.CH0.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm; //Do not repeat! - 7ac: a4 e0 ldi r26, 0x04 ; 4 - 7ae: a0 8b std Z+16, r26 ; 0x10 + 7c8: a4 e0 ldi r26, 0x04 ; 4 + 7ca: a0 8b std Z+16, r26 ; 0x10 DMA.CH0.CTRLB = 0x00; //No interrupt! - 7b0: 11 8a std Z+17, r1 ; 0x11 + 7cc: 11 8a std Z+17, r1 ; 0x11 DMA.CH0.ADDRCTRL = DMA_CH_SRCRELOAD_BURST_gc | DMA_CH_SRCDIR_INC_gc | DMA_CH_DESTDIR_INC_gc; //Source reloads after each burst, with byte incrementing. Dest does not reload, but does increment address. - 7b2: 51 e9 ldi r21, 0x91 ; 145 - 7b4: 52 8b std Z+18, r21 ; 0x12 + 7ce: 51 e9 ldi r21, 0x91 ; 145 + 7d0: 52 8b std Z+18, r21 ; 0x12 DMA.CH0.TRIGSRC = DMA_CH_TRIGSRC_ADCA_CH0_gc; //Triggered from ADCA channel 0 - 7b6: 80 e1 ldi r24, 0x10 ; 16 - 7b8: 83 8b std Z+19, r24 ; 0x13 + 7d2: 80 e1 ldi r24, 0x10 ; 16 + 7d4: 83 8b std Z+19, r24 ; 0x13 DMA.CH0.TRFCNT = HALFPACKET_SIZE; - 7ba: 67 e7 ldi r22, 0x77 ; 119 - 7bc: 71 e0 ldi r23, 0x01 ; 1 - 7be: 64 8b std Z+20, r22 ; 0x14 - 7c0: 75 8b std Z+21, r23 ; 0x15 + 7d6: 67 e7 ldi r22, 0x77 ; 119 + 7d8: 71 e0 ldi r23, 0x01 ; 1 + 7da: 64 8b std Z+20, r22 ; 0x14 + 7dc: 75 8b std Z+21, r23 ; 0x15 DMA.CH0.SRCADDR0 = (( (uint16_t) &ADCA.CH0.RESL) >> 0) & 0xFF; //Source address is ADC - 7c2: 84 e2 ldi r24, 0x24 ; 36 - 7c4: 80 8f std Z+24, r24 ; 0x18 + 7de: 84 e2 ldi r24, 0x24 ; 36 + 7e0: 80 8f std Z+24, r24 ; 0x18 DMA.CH0.SRCADDR1 = (( (uint16_t) &ADCA.CH0.RESL) >> 8) & 0xFF; - 7c6: 42 e0 ldi r20, 0x02 ; 2 - 7c8: 41 8f std Z+25, r20 ; 0x19 + 7e2: 42 e0 ldi r20, 0x02 ; 2 + 7e4: 41 8f std Z+25, r20 ; 0x19 DMA.CH0.SRCADDR2 = 0x00; - 7ca: 12 8e std Z+26, r1 ; 0x1a + 7e6: 12 8e std Z+26, r1 ; 0x1a DMA.CH0.DESTADDR0 = (( (uint16_t) &isoBuf[b1_state * PACKET_SIZE]) >> 0) & 0xFF; //Dest address is isoBuf - 7cc: c0 91 b4 20 lds r28, 0x20B4 ; 0x8020b4 - 7d0: 8e ee ldi r24, 0xEE ; 238 - 7d2: 92 e0 ldi r25, 0x02 ; 2 - 7d4: c8 9f mul r28, r24 - 7d6: 90 01 movw r18, r0 - 7d8: c9 9f mul r28, r25 - 7da: 30 0d add r19, r0 - 7dc: 11 24 eor r1, r1 - 7de: 2a 59 subi r18, 0x9A ; 154 - 7e0: 39 4d sbci r19, 0xD9 ; 217 - 7e2: 24 8f std Z+28, r18 ; 0x1c + 7e8: c0 91 b4 20 lds r28, 0x20B4 ; 0x8020b4 + 7ec: 8e ee ldi r24, 0xEE ; 238 + 7ee: 92 e0 ldi r25, 0x02 ; 2 + 7f0: c8 9f mul r28, r24 + 7f2: 90 01 movw r18, r0 + 7f4: c9 9f mul r28, r25 + 7f6: 30 0d add r19, r0 + 7f8: 11 24 eor r1, r1 + 7fa: 26 59 subi r18, 0x96 ; 150 + 7fc: 39 4d sbci r19, 0xD9 ; 217 + 7fe: 24 8f std Z+28, r18 ; 0x1c DMA.CH0.DESTADDR1 = (( (uint16_t) &isoBuf[b1_state * PACKET_SIZE]) >> 8) & 0xFF; - 7e4: c0 91 b4 20 lds r28, 0x20B4 ; 0x8020b4 - 7e8: c8 9f mul r28, r24 - 7ea: 90 01 movw r18, r0 - 7ec: c9 9f mul r28, r25 - 7ee: 30 0d add r19, r0 - 7f0: 11 24 eor r1, r1 - 7f2: 2a 59 subi r18, 0x9A ; 154 - 7f4: 39 4d sbci r19, 0xD9 ; 217 - 7f6: 35 8f std Z+29, r19 ; 0x1d + 800: c0 91 b4 20 lds r28, 0x20B4 ; 0x8020b4 + 804: c8 9f mul r28, r24 + 806: 90 01 movw r18, r0 + 808: c9 9f mul r28, r25 + 80a: 30 0d add r19, r0 + 80c: 11 24 eor r1, r1 + 80e: 26 59 subi r18, 0x96 ; 150 + 810: 39 4d sbci r19, 0xD9 ; 217 + 812: 35 8f std Z+29, r19 ; 0x1d DMA.CH0.DESTADDR2 = 0x00; - 7f8: 16 8e std Z+30, r1 ; 0x1e + 814: 16 8e std Z+30, r1 ; 0x1e //Must enable last for REPCNT won't work! DMA.CH0.CTRLA |= DMA_CH_ENABLE_bm; //Enable! - 7fa: 20 89 ldd r18, Z+16 ; 0x10 - 7fc: 20 68 ori r18, 0x80 ; 128 - 7fe: 20 8b std Z+16, r18 ; 0x10 + 816: 20 89 ldd r18, Z+16 ; 0x10 + 818: 20 68 ori r18, 0x80 ; 128 + 81a: 20 8b std Z+16, r18 ; 0x10 DMA.CH1.CTRLA = 0x00; - 800: 10 a2 std Z+32, r1 ; 0x20 + 81c: 10 a2 std Z+32, r1 ; 0x20 DMA.CH1.CTRLA = DMA_CH_RESET_bm; - 802: b0 a3 std Z+32, r27 ; 0x20 + 81e: b0 a3 std Z+32, r27 ; 0x20 DMA.CH1.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm; //Do not repeat! - 804: a0 a3 std Z+32, r26 ; 0x20 + 820: a0 a3 std Z+32, r26 ; 0x20 DMA.CH1.CTRLB = 0x00; //No interrupt! - 806: 11 a2 std Z+33, r1 ; 0x21 + 822: 11 a2 std Z+33, r1 ; 0x21 DMA.CH1.ADDRCTRL = DMA_CH_SRCRELOAD_BURST_gc | DMA_CH_SRCDIR_INC_gc | DMA_CH_DESTDIR_INC_gc; //Source reloads after each burst, with byte incrementing. Dest does not reload, but does increment address. - 808: 52 a3 std Z+34, r21 ; 0x22 + 824: 52 a3 std Z+34, r21 ; 0x22 DMA.CH1.TRIGSRC = DMA_CH_TRIGSRC_ADCA_CH2_gc; //Triggered from ADCA channel 0 - 80a: 22 e1 ldi r18, 0x12 ; 18 - 80c: 23 a3 std Z+35, r18 ; 0x23 + 826: 22 e1 ldi r18, 0x12 ; 18 + 828: 23 a3 std Z+35, r18 ; 0x23 DMA.CH1.TRFCNT = HALFPACKET_SIZE; - 80e: 64 a3 std Z+36, r22 ; 0x24 - 810: 75 a3 std Z+37, r23 ; 0x25 + 82a: 64 a3 std Z+36, r22 ; 0x24 + 82c: 75 a3 std Z+37, r23 ; 0x25 DMA.CH1.SRCADDR0 = (( (uint16_t) &ADCA.CH2.RESL) >> 0) & 0xFF; //Source address is ADC - 812: 24 e3 ldi r18, 0x34 ; 52 - 814: 20 a7 std Z+40, r18 ; 0x28 + 82e: 24 e3 ldi r18, 0x34 ; 52 + 830: 20 a7 std Z+40, r18 ; 0x28 DMA.CH1.SRCADDR1 = (( (uint16_t) &ADCA.CH2.RESL) >> 8) & 0xFF; - 816: 41 a7 std Z+41, r20 ; 0x29 + 832: 41 a7 std Z+41, r20 ; 0x29 DMA.CH1.SRCADDR2 = 0x00; - 818: 12 a6 std Z+42, r1 ; 0x2a + 834: 12 a6 std Z+42, r1 ; 0x2a DMA.CH1.DESTADDR0 = (( (uint16_t) &isoBuf[b1_state * PACKET_SIZE + HALFPACKET_SIZE]) >> 0) & 0xFF; //Dest address is isoBuf - 81a: 40 91 b4 20 lds r20, 0x20B4 ; 0x8020b4 - 81e: 48 9f mul r20, r24 - 820: 90 01 movw r18, r0 - 822: 49 9f mul r20, r25 - 824: 30 0d add r19, r0 - 826: 11 24 eor r1, r1 - 828: 23 52 subi r18, 0x23 ; 35 - 82a: 38 4d sbci r19, 0xD8 ; 216 - 82c: 24 a7 std Z+44, r18 ; 0x2c + 836: 40 91 b4 20 lds r20, 0x20B4 ; 0x8020b4 + 83a: 48 9f mul r20, r24 + 83c: 90 01 movw r18, r0 + 83e: 49 9f mul r20, r25 + 840: 30 0d add r19, r0 + 842: 11 24 eor r1, r1 + 844: 2f 51 subi r18, 0x1F ; 31 + 846: 38 4d sbci r19, 0xD8 ; 216 + 848: 24 a7 std Z+44, r18 ; 0x2c DMA.CH1.DESTADDR1 = (( (uint16_t) &isoBuf[b1_state * PACKET_SIZE + HALFPACKET_SIZE]) >> 8) & 0xFF; - 82e: 40 91 b4 20 lds r20, 0x20B4 ; 0x8020b4 - 832: 48 9f mul r20, r24 - 834: 90 01 movw r18, r0 - 836: 49 9f mul r20, r25 - 838: 30 0d add r19, r0 - 83a: 11 24 eor r1, r1 - 83c: c9 01 movw r24, r18 - 83e: 83 52 subi r24, 0x23 ; 35 - 840: 98 4d sbci r25, 0xD8 ; 216 - 842: 95 a7 std Z+45, r25 ; 0x2d + 84a: 40 91 b4 20 lds r20, 0x20B4 ; 0x8020b4 + 84e: 48 9f mul r20, r24 + 850: 90 01 movw r18, r0 + 852: 49 9f mul r20, r25 + 854: 30 0d add r19, r0 + 856: 11 24 eor r1, r1 + 858: c9 01 movw r24, r18 + 85a: 8f 51 subi r24, 0x1F ; 31 + 85c: 98 4d sbci r25, 0xD8 ; 216 + 85e: 95 a7 std Z+45, r25 ; 0x2d DMA.CH1.DESTADDR2 = 0x00; - 844: 16 a6 std Z+46, r1 ; 0x2e + 860: 16 a6 std Z+46, r1 ; 0x2e //Must enable last for REPCNT won't work! DMA.CH1.CTRLA |= DMA_CH_ENABLE_bm; //Enable! - 846: 80 a1 ldd r24, Z+32 ; 0x20 - 848: 80 68 ori r24, 0x80 ; 128 - 84a: 80 a3 std Z+32, r24 ; 0x20 + 862: 80 a1 ldd r24, Z+32 ; 0x20 + 864: 80 68 ori r24, 0x80 ; 128 + 866: 80 a3 std Z+32, r24 ; 0x20 } - 84c: cf 91 pop r28 - 84e: 08 95 ret + 868: cf 91 pop r28 + 86a: 08 95 ret -00000850 : +0000086c : void tiny_dma_set_mode_3(void){ - 850: cf 93 push r28 + 86c: cf 93 push r28 global_mode = 3; - 852: c3 e0 ldi r28, 0x03 ; 3 - 854: c0 93 00 20 sts 0x2000, r28 ; 0x802000 <__data_start> + 86e: c3 e0 ldi r28, 0x03 ; 3 + 870: c0 93 00 20 sts 0x2000, r28 ; 0x802000 <__data_start> tiny_dma_flush(); - 858: 2a de rcall .-940 ; 0x4ae + 874: 2a de rcall .-940 ; 0x4ca //AUX channel (to keep it tx, therefore always rx) DMA.CH1.CTRLA = 0x00; - 85a: e0 e0 ldi r30, 0x00 ; 0 - 85c: f1 e0 ldi r31, 0x01 ; 1 - 85e: 10 a2 std Z+32, r1 ; 0x20 + 876: e0 e0 ldi r30, 0x00 ; 0 + 878: f1 e0 ldi r31, 0x01 ; 1 + 87a: 10 a2 std Z+32, r1 ; 0x20 DMA.CH1.CTRLA = DMA_CH_RESET_bm; - 860: 80 e4 ldi r24, 0x40 ; 64 - 862: 80 a3 std Z+32, r24 ; 0x20 + 87c: 80 e4 ldi r24, 0x40 ; 64 + 87e: 80 a3 std Z+32, r24 ; 0x20 DMA.CH1.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm; //Do not repeat! - 864: 84 e0 ldi r24, 0x04 ; 4 - 866: 80 a3 std Z+32, r24 ; 0x20 + 880: 84 e0 ldi r24, 0x04 ; 4 + 882: 80 a3 std Z+32, r24 ; 0x20 DMA.CH1.CTRLB = 0x00; //No int - 868: 11 a2 std Z+33, r1 ; 0x21 + 884: 11 a2 std Z+33, r1 ; 0x21 DMA.CH1.ADDRCTRL = DMA_CH_SRCDIR_FIXED_gc | DMA_CH_DESTDIR_FIXED_gc; //Source and address fixed. - 86a: 12 a2 std Z+34, r1 ; 0x22 + 886: 12 a2 std Z+34, r1 ; 0x22 DMA.CH1.TRIGSRC = DMA_CH_TRIGSRC_USARTC0_RXC_gc; - 86c: 8b e4 ldi r24, 0x4B ; 75 - 86e: 83 a3 std Z+35, r24 ; 0x23 + 888: 8b e4 ldi r24, 0x4B ; 75 + 88a: 83 a3 std Z+35, r24 ; 0x23 DMA.CH1.TRFCNT = 0; - 870: 14 a2 std Z+36, r1 ; 0x24 - 872: 15 a2 std Z+37, r1 ; 0x25 + 88c: 14 a2 std Z+36, r1 ; 0x24 + 88e: 15 a2 std Z+37, r1 ; 0x25 DMA.CH1.REPCNT = 0; - 874: 16 a2 std Z+38, r1 ; 0x26 + 890: 16 a2 std Z+38, r1 ; 0x26 DMA.CH1.SRCADDR0 = (( (uint16_t) &dummy) >> 0) & 0xFF; - 876: 81 e0 ldi r24, 0x01 ; 1 - 878: 90 e2 ldi r25, 0x20 ; 32 - 87a: 80 a7 std Z+40, r24 ; 0x28 + 892: 81 e0 ldi r24, 0x01 ; 1 + 894: 90 e2 ldi r25, 0x20 ; 32 + 896: 80 a7 std Z+40, r24 ; 0x28 DMA.CH1.SRCADDR1 = (( (uint16_t) &dummy) >> 8) & 0xFF; - 87c: 91 a7 std Z+41, r25 ; 0x29 + 898: 91 a7 std Z+41, r25 ; 0x29 DMA.CH1.SRCADDR2 = 0x00; - 87e: 12 a6 std Z+42, r1 ; 0x2a + 89a: 12 a6 std Z+42, r1 ; 0x2a DMA.CH1.DESTADDR0 = (( (uint16_t) &USARTC0.DATA) >> 0) & 0xFF; - 880: 80 ea ldi r24, 0xA0 ; 160 - 882: 84 a7 std Z+44, r24 ; 0x2c + 89c: 80 ea ldi r24, 0xA0 ; 160 + 89e: 84 a7 std Z+44, r24 ; 0x2c DMA.CH1.DESTADDR1 = (( (uint16_t) &USARTC0.DATA) >> 8) & 0xFF; - 884: 88 e0 ldi r24, 0x08 ; 8 - 886: 85 a7 std Z+45, r24 ; 0x2d + 8a0: 88 e0 ldi r24, 0x08 ; 8 + 8a2: 85 a7 std Z+45, r24 ; 0x2d DMA.CH1.DESTADDR2 = 0x00; - 888: 16 a6 std Z+46, r1 ; 0x2e + 8a4: 16 a6 std Z+46, r1 ; 0x2e //Must enable last for REPCNT won't work! DMA.CH1.CTRLA |= DMA_CH_REPEAT_bm | DMA_CH_ENABLE_bm; //Enable! - 88a: 80 a1 ldd r24, Z+32 ; 0x20 - 88c: 80 6a ori r24, 0xA0 ; 160 - 88e: 80 a3 std Z+32, r24 ; 0x20 + 8a6: 80 a1 ldd r24, Z+32 ; 0x20 + 8a8: 80 6a ori r24, 0xA0 ; 160 + 8aa: 80 a3 std Z+32, r24 ; 0x20 USARTC0.DATA = 0x55; - 890: 85 e5 ldi r24, 0x55 ; 85 - 892: 80 93 a0 08 sts 0x08A0, r24 ; 0x8008a0 <__TEXT_REGION_LENGTH__+0x7008a0> + 8ac: 85 e5 ldi r24, 0x55 ; 85 + 8ae: 80 93 a0 08 sts 0x08A0, r24 ; 0x8008a0 <__TEXT_REGION_LENGTH__+0x7008a0> DMA.CH2.REPCNT = 0; //Repeat forever! - 896: 16 aa std Z+54, r1 ; 0x36 + 8b2: 16 aa std Z+54, r1 ; 0x36 DMA.CH2.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm | DMA_CH_REPEAT_bm; - 898: 24 e2 ldi r18, 0x24 ; 36 - 89a: 20 ab std Z+48, r18 ; 0x30 + 8b4: 24 e2 ldi r18, 0x24 ; 36 + 8b6: 20 ab std Z+48, r18 ; 0x30 DMA.CH2.CTRLB = 0x00; //No interrupt for DacBuf!! - 89c: 11 aa std Z+49, r1 ; 0x31 + 8b8: 11 aa std Z+49, r1 ; 0x31 DMA.CH2.ADDRCTRL = DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc | DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc; //Dest reloads after each burst, with byte incrementing. Src reloads at end of block, also incrementing address. - 89e: 99 e5 ldi r25, 0x59 ; 89 - 8a0: 92 ab std Z+50, r25 ; 0x32 + 8ba: 99 e5 ldi r25, 0x59 ; 89 + 8bc: 92 ab std Z+50, r25 ; 0x32 DMA.CH2.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH1_gc; //Triggered from TCC0 when it hits PER - 8a2: 82 e0 ldi r24, 0x02 ; 2 - 8a4: 83 ab std Z+51, r24 ; 0x33 + 8be: 82 e0 ldi r24, 0x02 ; 2 + 8c0: 83 ab std Z+51, r24 ; 0x33 DMA.CH2.TRFCNT = auxDacBufLen; - 8a6: 40 91 02 20 lds r20, 0x2002 ; 0x802002 - 8aa: 50 91 03 20 lds r21, 0x2003 ; 0x802003 - 8ae: 44 ab std Z+52, r20 ; 0x34 - 8b0: 55 ab std Z+53, r21 ; 0x35 + 8c2: 40 91 02 20 lds r20, 0x2002 ; 0x802002 + 8c6: 50 91 03 20 lds r21, 0x2003 ; 0x802003 + 8ca: 44 ab std Z+52, r20 ; 0x34 + 8cc: 55 ab std Z+53, r21 ; 0x35 DMA.CH2.SRCADDR0 = (( (uint16_t) &dacBuf_CH2[0]) >> 0) & 0xFF; //Source address is dacbuf - 8b2: 46 e6 ldi r20, 0x66 ; 102 - 8b4: 54 e2 ldi r21, 0x24 ; 36 - 8b6: 40 af std Z+56, r20 ; 0x38 + 8ce: 4a e6 ldi r20, 0x6A ; 106 + 8d0: 54 e2 ldi r21, 0x24 ; 36 + 8d2: 40 af std Z+56, r20 ; 0x38 DMA.CH2.SRCADDR1 = (( (uint16_t) &dacBuf_CH2[0]) >> 8) & 0xFF; - 8b8: 51 af std Z+57, r21 ; 0x39 + 8d4: 51 af std Z+57, r21 ; 0x39 DMA.CH2.SRCADDR2 = 0x00; - 8ba: 12 ae std Z+58, r1 ; 0x3a + 8d6: 12 ae std Z+58, r1 ; 0x3a DMA.CH2.DESTADDR0 = (( (uint16_t) &DACB.CH1DATAH) >> 0) & 0xFF; //Dest address is high byte of DAC register - 8bc: 8b e3 ldi r24, 0x3B ; 59 - 8be: 84 af std Z+60, r24 ; 0x3c + 8d8: 8b e3 ldi r24, 0x3B ; 59 + 8da: 84 af std Z+60, r24 ; 0x3c DMA.CH2.DESTADDR1 = (( (uint16_t) &DACB.CH1DATAH) >> 8) & 0xFF; - 8c0: c0 93 3d 01 sts 0x013D, r28 ; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d> + 8dc: c0 93 3d 01 sts 0x013D, r28 ; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d> DMA.CH2.DESTADDR2 = 0x00; - 8c4: 10 92 3e 01 sts 0x013E, r1 ; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e> + 8e0: 10 92 3e 01 sts 0x013E, r1 ; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e> //Must enable last for REPCNT won't work! DMA.CH2.CTRLA |= DMA_CH_ENABLE_bm; //Enable! - 8c8: 80 a9 ldd r24, Z+48 ; 0x30 - 8ca: 80 68 ori r24, 0x80 ; 128 - 8cc: 80 ab std Z+48, r24 ; 0x30 + 8e4: 80 a9 ldd r24, Z+48 ; 0x30 + 8e6: 80 68 ori r24, 0x80 ; 128 + 8e8: 80 ab std Z+48, r24 ; 0x30 DMA.CH3.REPCNT = 0; //Repeat forever! - 8ce: 10 92 46 01 sts 0x0146, r1 ; 0x800146 <__TEXT_REGION_LENGTH__+0x700146> + 8ea: 10 92 46 01 sts 0x0146, r1 ; 0x800146 <__TEXT_REGION_LENGTH__+0x700146> DMA.CH3.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm | DMA_CH_REPEAT_bm; - 8d2: e0 e4 ldi r30, 0x40 ; 64 - 8d4: f1 e0 ldi r31, 0x01 ; 1 - 8d6: 20 83 st Z, r18 + 8ee: e0 e4 ldi r30, 0x40 ; 64 + 8f0: f1 e0 ldi r31, 0x01 ; 1 + 8f2: 20 83 st Z, r18 DMA.CH3.CTRLB = 0x00; //Hi interrupt on block complete - 8d8: 10 92 41 01 sts 0x0141, r1 ; 0x800141 <__TEXT_REGION_LENGTH__+0x700141> + 8f4: 10 92 41 01 sts 0x0141, r1 ; 0x800141 <__TEXT_REGION_LENGTH__+0x700141> DMA.CH3.ADDRCTRL = DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc | DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc; //Dest reloads after each burst, with byte incrementing. Src reloads at end of block, also incrementing address. - 8dc: 90 93 42 01 sts 0x0142, r25 ; 0x800142 <__TEXT_REGION_LENGTH__+0x700142> + 8f8: 90 93 42 01 sts 0x0142, r25 ; 0x800142 <__TEXT_REGION_LENGTH__+0x700142> DMA.CH3.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH2_gc; //Triggered from TCC0 when it hits PER - 8e0: c0 93 43 01 sts 0x0143, r28 ; 0x800143 <__TEXT_REGION_LENGTH__+0x700143> + 8fc: c0 93 43 01 sts 0x0143, r28 ; 0x800143 <__TEXT_REGION_LENGTH__+0x700143> DMA.CH3.TRFCNT = dacBuf_len; - 8e4: 80 91 04 20 lds r24, 0x2004 ; 0x802004 - 8e8: 90 91 05 20 lds r25, 0x2005 ; 0x802005 - 8ec: 80 93 44 01 sts 0x0144, r24 ; 0x800144 <__TEXT_REGION_LENGTH__+0x700144> - 8f0: 90 93 45 01 sts 0x0145, r25 ; 0x800145 <__TEXT_REGION_LENGTH__+0x700145> + 900: 80 91 04 20 lds r24, 0x2004 ; 0x802004 + 904: 90 91 05 20 lds r25, 0x2005 ; 0x802005 + 908: 80 93 44 01 sts 0x0144, r24 ; 0x800144 <__TEXT_REGION_LENGTH__+0x700144> + 90c: 90 93 45 01 sts 0x0145, r25 ; 0x800145 <__TEXT_REGION_LENGTH__+0x700145> DMA.CH3.SRCADDR0 = (( (uint16_t) &dacBuf_CH1[0]) >> 0) & 0xFF; //Source address is dacbuf - 8f4: 86 e5 ldi r24, 0x56 ; 86 - 8f6: 92 e2 ldi r25, 0x22 ; 34 - 8f8: 80 93 48 01 sts 0x0148, r24 ; 0x800148 <__TEXT_REGION_LENGTH__+0x700148> + 910: 8a e5 ldi r24, 0x5A ; 90 + 912: 92 e2 ldi r25, 0x22 ; 34 + 914: 80 93 48 01 sts 0x0148, r24 ; 0x800148 <__TEXT_REGION_LENGTH__+0x700148> DMA.CH3.SRCADDR1 = (( (uint16_t) &dacBuf_CH1[0]) >> 8) & 0xFF; - 8fc: 90 93 49 01 sts 0x0149, r25 ; 0x800149 <__TEXT_REGION_LENGTH__+0x700149> + 918: 90 93 49 01 sts 0x0149, r25 ; 0x800149 <__TEXT_REGION_LENGTH__+0x700149> DMA.CH3.SRCADDR2 = 0x00; - 900: 10 92 4a 01 sts 0x014A, r1 ; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a> + 91c: 10 92 4a 01 sts 0x014A, r1 ; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a> DMA.CH3.DESTADDR0 = (( (uint16_t) &DACB.CH0DATAH) >> 0) & 0xFF; //Dest address is high byte of DAC register - 904: 89 e3 ldi r24, 0x39 ; 57 - 906: 80 93 4c 01 sts 0x014C, r24 ; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c> + 920: 89 e3 ldi r24, 0x39 ; 57 + 922: 80 93 4c 01 sts 0x014C, r24 ; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c> DMA.CH3.DESTADDR1 = (( (uint16_t) &DACB.CH0DATAH) >> 8) & 0xFF; - 90a: c0 93 4d 01 sts 0x014D, r28 ; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d> + 926: c0 93 4d 01 sts 0x014D, r28 ; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d> DMA.CH3.DESTADDR2 = 0x00; - 90e: 10 92 4e 01 sts 0x014E, r1 ; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e> + 92a: 10 92 4e 01 sts 0x014E, r1 ; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e> //Must enable last for REPCNT won't work! DMA.CH3.CTRLA |= DMA_CH_ENABLE_bm; //Enable! - 912: 80 81 ld r24, Z - 914: 80 68 ori r24, 0x80 ; 128 - 916: 80 83 st Z, r24 + 92e: 80 81 ld r24, Z + 930: 80 68 ori r24, 0x80 ; 128 + 932: 80 83 st Z, r24 } - 918: cf 91 pop r28 - 91a: 08 95 ret + 934: cf 91 pop r28 + 936: 08 95 ret -0000091c : +00000938 : void tiny_dma_loop_mode_3(void){ //Actual data being transferred DMA.CH0.CTRLA = 0x00; - 91c: e0 e0 ldi r30, 0x00 ; 0 - 91e: f1 e0 ldi r31, 0x01 ; 1 - 920: 10 8a std Z+16, r1 ; 0x10 + 938: e0 e0 ldi r30, 0x00 ; 0 + 93a: f1 e0 ldi r31, 0x01 ; 1 + 93c: 10 8a std Z+16, r1 ; 0x10 DMA.CH0.CTRLA = DMA_CH_RESET_bm; - 922: 80 e4 ldi r24, 0x40 ; 64 - 924: 80 8b std Z+16, r24 ; 0x10 + 93e: 80 e4 ldi r24, 0x40 ; 64 + 940: 80 8b std Z+16, r24 ; 0x10 DMA.CH0.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm; //Do not repeat! - 926: 84 e0 ldi r24, 0x04 ; 4 - 928: 80 8b std Z+16, r24 ; 0x10 + 942: 84 e0 ldi r24, 0x04 ; 4 + 944: 80 8b std Z+16, r24 ; 0x10 DMA.CH0.CTRLB = 0x00; //No interrupt - 92a: 11 8a std Z+17, r1 ; 0x11 + 946: 11 8a std Z+17, r1 ; 0x11 DMA.CH0.ADDRCTRL = DMA_CH_SRCRELOAD_BURST_gc | DMA_CH_SRCDIR_INC_gc | DMA_CH_DESTDIR_INC_gc; //Source reloads after each burst, with byte incrementing. Dest does not reload, but does increment address. - 92c: 81 e9 ldi r24, 0x91 ; 145 - 92e: 82 8b std Z+18, r24 ; 0x12 + 948: 81 e9 ldi r24, 0x91 ; 145 + 94a: 82 8b std Z+18, r24 ; 0x12 DMA.CH0.TRIGSRC = DMA_CH_TRIGSRC_USARTC0_RXC_gc; - 930: 8b e4 ldi r24, 0x4B ; 75 - 932: 83 8b std Z+19, r24 ; 0x13 + 94c: 8b e4 ldi r24, 0x4B ; 75 + 94e: 83 8b std Z+19, r24 ; 0x13 DMA.CH0.TRFCNT = HALFPACKET_SIZE; - 934: 87 e7 ldi r24, 0x77 ; 119 - 936: 91 e0 ldi r25, 0x01 ; 1 - 938: 84 8b std Z+20, r24 ; 0x14 - 93a: 95 8b std Z+21, r25 ; 0x15 + 950: 87 e7 ldi r24, 0x77 ; 119 + 952: 91 e0 ldi r25, 0x01 ; 1 + 954: 84 8b std Z+20, r24 ; 0x14 + 956: 95 8b std Z+21, r25 ; 0x15 DMA.CH0.SRCADDR0 = (( (uint16_t) &USARTC0.DATA) >> 0) & 0xFF; //Source address is ADC - 93c: 80 ea ldi r24, 0xA0 ; 160 - 93e: 80 8f std Z+24, r24 ; 0x18 + 958: 80 ea ldi r24, 0xA0 ; 160 + 95a: 80 8f std Z+24, r24 ; 0x18 DMA.CH0.SRCADDR1 = (( (uint16_t) &USARTC0.DATA) >> 8) & 0xFF; - 940: 88 e0 ldi r24, 0x08 ; 8 - 942: 81 8f std Z+25, r24 ; 0x19 + 95c: 88 e0 ldi r24, 0x08 ; 8 + 95e: 81 8f std Z+25, r24 ; 0x19 DMA.CH0.SRCADDR2 = 0x00; - 944: 12 8e std Z+26, r1 ; 0x1a + 960: 12 8e std Z+26, r1 ; 0x1a DMA.CH0.DESTADDR0 = (( (uint16_t) &isoBuf[b1_state*PACKET_SIZE]) >> 0) & 0xFF; //Dest address is isoBuf - 946: 40 91 b4 20 lds r20, 0x20B4 ; 0x8020b4 - 94a: 2e ee ldi r18, 0xEE ; 238 - 94c: 32 e0 ldi r19, 0x02 ; 2 - 94e: 42 9f mul r20, r18 - 950: c0 01 movw r24, r0 - 952: 43 9f mul r20, r19 - 954: 90 0d add r25, r0 - 956: 11 24 eor r1, r1 - 958: 8a 59 subi r24, 0x9A ; 154 - 95a: 99 4d sbci r25, 0xD9 ; 217 - 95c: 84 8f std Z+28, r24 ; 0x1c + 962: 40 91 b4 20 lds r20, 0x20B4 ; 0x8020b4 + 966: 2e ee ldi r18, 0xEE ; 238 + 968: 32 e0 ldi r19, 0x02 ; 2 + 96a: 42 9f mul r20, r18 + 96c: c0 01 movw r24, r0 + 96e: 43 9f mul r20, r19 + 970: 90 0d add r25, r0 + 972: 11 24 eor r1, r1 + 974: 86 59 subi r24, 0x96 ; 150 + 976: 99 4d sbci r25, 0xD9 ; 217 + 978: 84 8f std Z+28, r24 ; 0x1c DMA.CH0.DESTADDR1 = (( (uint16_t) &isoBuf[b1_state*PACKET_SIZE]) >> 8) & 0xFF; - 95e: 40 91 b4 20 lds r20, 0x20B4 ; 0x8020b4 - 962: 42 9f mul r20, r18 - 964: c0 01 movw r24, r0 - 966: 43 9f mul r20, r19 - 968: 90 0d add r25, r0 - 96a: 11 24 eor r1, r1 - 96c: 8a 59 subi r24, 0x9A ; 154 - 96e: 99 4d sbci r25, 0xD9 ; 217 - 970: 95 8f std Z+29, r25 ; 0x1d + 97a: 40 91 b4 20 lds r20, 0x20B4 ; 0x8020b4 + 97e: 42 9f mul r20, r18 + 980: c0 01 movw r24, r0 + 982: 43 9f mul r20, r19 + 984: 90 0d add r25, r0 + 986: 11 24 eor r1, r1 + 988: 86 59 subi r24, 0x96 ; 150 + 98a: 99 4d sbci r25, 0xD9 ; 217 + 98c: 95 8f std Z+29, r25 ; 0x1d DMA.CH0.DESTADDR2 = 0x00; - 972: 16 8e std Z+30, r1 ; 0x1e + 98e: 16 8e std Z+30, r1 ; 0x1e //Must enable last for REPCNT won't work! DMA.CH0.CTRLA |= DMA_CH_ENABLE_bm; //Enable! - 974: 80 89 ldd r24, Z+16 ; 0x10 - 976: 80 68 ori r24, 0x80 ; 128 - 978: 80 8b std Z+16, r24 ; 0x10 - 97a: 08 95 ret + 990: 80 89 ldd r24, Z+16 ; 0x10 + 992: 80 68 ori r24, 0x80 ; 128 + 994: 80 8b std Z+16, r24 ; 0x10 + 996: 08 95 ret -0000097c : +00000998 : } void tiny_dma_set_mode_4(void){ - 97c: cf 93 push r28 + 998: cf 93 push r28 global_mode = 4; - 97e: c4 e0 ldi r28, 0x04 ; 4 - 980: c0 93 00 20 sts 0x2000, r28 ; 0x802000 <__data_start> + 99a: c4 e0 ldi r28, 0x04 ; 4 + 99c: c0 93 00 20 sts 0x2000, r28 ; 0x802000 <__data_start> tiny_dma_flush(); - 984: 94 dd rcall .-1240 ; 0x4ae + 9a0: 94 dd rcall .-1240 ; 0x4ca //AUX channel (to keep it tx, therefore always rx) DMA.CH1.CTRLA = 0x00; - 986: e0 e0 ldi r30, 0x00 ; 0 - 988: f1 e0 ldi r31, 0x01 ; 1 - 98a: 10 a2 std Z+32, r1 ; 0x20 + 9a2: e0 e0 ldi r30, 0x00 ; 0 + 9a4: f1 e0 ldi r31, 0x01 ; 1 + 9a6: 10 a2 std Z+32, r1 ; 0x20 DMA.CH1.CTRLA = DMA_CH_RESET_bm; - 98c: 80 e4 ldi r24, 0x40 ; 64 - 98e: 80 a3 std Z+32, r24 ; 0x20 + 9a8: 80 e4 ldi r24, 0x40 ; 64 + 9aa: 80 a3 std Z+32, r24 ; 0x20 DMA.CH1.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm; //Do not repeat! - 990: c0 a3 std Z+32, r28 ; 0x20 + 9ac: c0 a3 std Z+32, r28 ; 0x20 DMA.CH1.CTRLB = 0x00; //No int - 992: 11 a2 std Z+33, r1 ; 0x21 + 9ae: 11 a2 std Z+33, r1 ; 0x21 DMA.CH1.ADDRCTRL = DMA_CH_SRCDIR_FIXED_gc | DMA_CH_DESTDIR_FIXED_gc; //Source and address fixed. - 994: 12 a2 std Z+34, r1 ; 0x22 + 9b0: 12 a2 std Z+34, r1 ; 0x22 DMA.CH1.TRIGSRC = DMA_CH_TRIGSRC_USARTC0_RXC_gc; - 996: 8b e4 ldi r24, 0x4B ; 75 - 998: 83 a3 std Z+35, r24 ; 0x23 + 9b2: 8b e4 ldi r24, 0x4B ; 75 + 9b4: 83 a3 std Z+35, r24 ; 0x23 DMA.CH1.TRFCNT = 0; - 99a: 14 a2 std Z+36, r1 ; 0x24 - 99c: 15 a2 std Z+37, r1 ; 0x25 + 9b6: 14 a2 std Z+36, r1 ; 0x24 + 9b8: 15 a2 std Z+37, r1 ; 0x25 DMA.CH1.REPCNT = 0; - 99e: 16 a2 std Z+38, r1 ; 0x26 + 9ba: 16 a2 std Z+38, r1 ; 0x26 DMA.CH1.SRCADDR0 = (( (uint16_t) &dummy) >> 0) & 0xFF; - 9a0: 81 e0 ldi r24, 0x01 ; 1 - 9a2: 90 e2 ldi r25, 0x20 ; 32 - 9a4: 80 a7 std Z+40, r24 ; 0x28 + 9bc: 81 e0 ldi r24, 0x01 ; 1 + 9be: 90 e2 ldi r25, 0x20 ; 32 + 9c0: 80 a7 std Z+40, r24 ; 0x28 DMA.CH1.SRCADDR1 = (( (uint16_t) &dummy) >> 8) & 0xFF; - 9a6: 91 a7 std Z+41, r25 ; 0x29 + 9c2: 91 a7 std Z+41, r25 ; 0x29 DMA.CH1.SRCADDR2 = 0x00; - 9a8: 12 a6 std Z+42, r1 ; 0x2a + 9c4: 12 a6 std Z+42, r1 ; 0x2a DMA.CH1.DESTADDR0 = (( (uint16_t) &USARTC0.DATA) >> 0) & 0xFF; - 9aa: 80 ea ldi r24, 0xA0 ; 160 - 9ac: 84 a7 std Z+44, r24 ; 0x2c + 9c6: 80 ea ldi r24, 0xA0 ; 160 + 9c8: 84 a7 std Z+44, r24 ; 0x2c DMA.CH1.DESTADDR1 = (( (uint16_t) &USARTC0.DATA) >> 8) & 0xFF; - 9ae: 88 e0 ldi r24, 0x08 ; 8 - 9b0: 85 a7 std Z+45, r24 ; 0x2d + 9ca: 88 e0 ldi r24, 0x08 ; 8 + 9cc: 85 a7 std Z+45, r24 ; 0x2d DMA.CH1.DESTADDR2 = 0x00; - 9b2: 16 a6 std Z+46, r1 ; 0x2e + 9ce: 16 a6 std Z+46, r1 ; 0x2e //Must enable last for REPCNT won't work! DMA.CH1.CTRLA |= DMA_CH_REPEAT_bm | DMA_CH_ENABLE_bm; //Enable! - 9b4: 80 a1 ldd r24, Z+32 ; 0x20 - 9b6: 80 6a ori r24, 0xA0 ; 160 - 9b8: 80 a3 std Z+32, r24 ; 0x20 + 9d0: 80 a1 ldd r24, Z+32 ; 0x20 + 9d2: 80 6a ori r24, 0xA0 ; 160 + 9d4: 80 a3 std Z+32, r24 ; 0x20 DMA.CH2.REPCNT = 0; //Repeat forever! - 9ba: 16 aa std Z+54, r1 ; 0x36 + 9d6: 16 aa std Z+54, r1 ; 0x36 DMA.CH2.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm | DMA_CH_REPEAT_bm; - 9bc: 84 e2 ldi r24, 0x24 ; 36 - 9be: 80 ab std Z+48, r24 ; 0x30 + 9d8: 84 e2 ldi r24, 0x24 ; 36 + 9da: 80 ab std Z+48, r24 ; 0x30 DMA.CH2.CTRLB = 0x00; //No interrupt for DacBuf!! - 9c0: 11 aa std Z+49, r1 ; 0x31 + 9dc: 11 aa std Z+49, r1 ; 0x31 DMA.CH2.ADDRCTRL = DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc | DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc; //Dest reloads after each burst, with byte incrementing. Src reloads at end of block, also incrementing address. - 9c2: 89 e5 ldi r24, 0x59 ; 89 - 9c4: 82 ab std Z+50, r24 ; 0x32 + 9de: 89 e5 ldi r24, 0x59 ; 89 + 9e0: 82 ab std Z+50, r24 ; 0x32 DMA.CH2.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH1_gc; //Triggered from TCC0 when it hits PER - 9c6: 82 e0 ldi r24, 0x02 ; 2 - 9c8: 83 ab std Z+51, r24 ; 0x33 + 9e2: 82 e0 ldi r24, 0x02 ; 2 + 9e4: 83 ab std Z+51, r24 ; 0x33 DMA.CH2.TRFCNT = auxDacBufLen; - 9ca: 80 91 02 20 lds r24, 0x2002 ; 0x802002 - 9ce: 90 91 03 20 lds r25, 0x2003 ; 0x802003 - 9d2: 84 ab std Z+52, r24 ; 0x34 - 9d4: 95 ab std Z+53, r25 ; 0x35 + 9e6: 80 91 02 20 lds r24, 0x2002 ; 0x802002 + 9ea: 90 91 03 20 lds r25, 0x2003 ; 0x802003 + 9ee: 84 ab std Z+52, r24 ; 0x34 + 9f0: 95 ab std Z+53, r25 ; 0x35 DMA.CH2.SRCADDR0 = (( (uint16_t) &dacBuf_CH2[0]) >> 0) & 0xFF; //Source address is dacbuf - 9d6: 86 e6 ldi r24, 0x66 ; 102 - 9d8: 94 e2 ldi r25, 0x24 ; 36 - 9da: 80 af std Z+56, r24 ; 0x38 + 9f2: 8a e6 ldi r24, 0x6A ; 106 + 9f4: 94 e2 ldi r25, 0x24 ; 36 + 9f6: 80 af std Z+56, r24 ; 0x38 DMA.CH2.SRCADDR1 = (( (uint16_t) &dacBuf_CH2[0]) >> 8) & 0xFF; - 9dc: 91 af std Z+57, r25 ; 0x39 + 9f8: 91 af std Z+57, r25 ; 0x39 DMA.CH2.SRCADDR2 = 0x00; - 9de: 12 ae std Z+58, r1 ; 0x3a + 9fa: 12 ae std Z+58, r1 ; 0x3a DMA.CH2.DESTADDR0 = (( (uint16_t) &DACB.CH1DATAH) >> 0) & 0xFF; //Dest address is high byte of DAC register - 9e0: 8b e3 ldi r24, 0x3B ; 59 - 9e2: 84 af std Z+60, r24 ; 0x3c + 9fc: 8b e3 ldi r24, 0x3B ; 59 + 9fe: 84 af std Z+60, r24 ; 0x3c DMA.CH2.DESTADDR1 = (( (uint16_t) &DACB.CH1DATAH) >> 8) & 0xFF; - 9e4: 83 e0 ldi r24, 0x03 ; 3 - 9e6: 80 93 3d 01 sts 0x013D, r24 ; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d> + a00: 83 e0 ldi r24, 0x03 ; 3 + a02: 80 93 3d 01 sts 0x013D, r24 ; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d> DMA.CH2.DESTADDR2 = 0x00; - 9ea: 10 92 3e 01 sts 0x013E, r1 ; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e> + a06: 10 92 3e 01 sts 0x013E, r1 ; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e> //Must enable last for REPCNT won't work! DMA.CH2.CTRLA |= DMA_CH_ENABLE_bm; //Enable! - 9ee: 80 a9 ldd r24, Z+48 ; 0x30 - 9f0: 80 68 ori r24, 0x80 ; 128 - 9f2: 80 ab std Z+48, r24 ; 0x30 + a0a: 80 a9 ldd r24, Z+48 ; 0x30 + a0c: 80 68 ori r24, 0x80 ; 128 + a0e: 80 ab std Z+48, r24 ; 0x30 } - 9f4: cf 91 pop r28 - 9f6: 08 95 ret + a10: cf 91 pop r28 + a12: 08 95 ret -000009f8 : +00000a14 : void tiny_dma_loop_mode_4(void){ - 9f8: cf 93 push r28 + a14: cf 93 push r28 //Actual data being transferred DMA.CH0.CTRLA = 0x00; - 9fa: e0 e0 ldi r30, 0x00 ; 0 - 9fc: f1 e0 ldi r31, 0x01 ; 1 - 9fe: 10 8a std Z+16, r1 ; 0x10 + a16: e0 e0 ldi r30, 0x00 ; 0 + a18: f1 e0 ldi r31, 0x01 ; 1 + a1a: 10 8a std Z+16, r1 ; 0x10 DMA.CH0.CTRLA = DMA_CH_RESET_bm; - a00: b0 e4 ldi r27, 0x40 ; 64 - a02: b0 8b std Z+16, r27 ; 0x10 + a1c: b0 e4 ldi r27, 0x40 ; 64 + a1e: b0 8b std Z+16, r27 ; 0x10 DMA.CH0.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm; //Do not repeat! - a04: a4 e0 ldi r26, 0x04 ; 4 - a06: a0 8b std Z+16, r26 ; 0x10 + a20: a4 e0 ldi r26, 0x04 ; 4 + a22: a0 8b std Z+16, r26 ; 0x10 DMA.CH0.CTRLB = 0x00; //No interrupt - a08: 11 8a std Z+17, r1 ; 0x11 + a24: 11 8a std Z+17, r1 ; 0x11 DMA.CH0.ADDRCTRL = DMA_CH_SRCRELOAD_BURST_gc | DMA_CH_SRCDIR_INC_gc | DMA_CH_DESTDIR_INC_gc; //Source reloads after each burst, with byte incrementing. Dest does not reload, but does increment address. - a0a: 51 e9 ldi r21, 0x91 ; 145 - a0c: 52 8b std Z+18, r21 ; 0x12 + a26: 51 e9 ldi r21, 0x91 ; 145 + a28: 52 8b std Z+18, r21 ; 0x12 DMA.CH0.TRIGSRC = DMA_CH_TRIGSRC_USARTC0_RXC_gc; - a0e: 8b e4 ldi r24, 0x4B ; 75 - a10: 83 8b std Z+19, r24 ; 0x13 + a2a: 8b e4 ldi r24, 0x4B ; 75 + a2c: 83 8b std Z+19, r24 ; 0x13 DMA.CH0.TRFCNT = HALFPACKET_SIZE; - a12: 67 e7 ldi r22, 0x77 ; 119 - a14: 71 e0 ldi r23, 0x01 ; 1 - a16: 64 8b std Z+20, r22 ; 0x14 - a18: 75 8b std Z+21, r23 ; 0x15 + a2e: 67 e7 ldi r22, 0x77 ; 119 + a30: 71 e0 ldi r23, 0x01 ; 1 + a32: 64 8b std Z+20, r22 ; 0x14 + a34: 75 8b std Z+21, r23 ; 0x15 DMA.CH0.SRCADDR0 = (( (uint16_t) &USARTC0.DATA) >> 0) & 0xFF; //Source address is ADC - a1a: 80 ea ldi r24, 0xA0 ; 160 - a1c: 80 8f std Z+24, r24 ; 0x18 + a36: 80 ea ldi r24, 0xA0 ; 160 + a38: 80 8f std Z+24, r24 ; 0x18 DMA.CH0.SRCADDR1 = (( (uint16_t) &USARTC0.DATA) >> 8) & 0xFF; - a1e: 48 e0 ldi r20, 0x08 ; 8 - a20: 41 8f std Z+25, r20 ; 0x19 + a3a: 48 e0 ldi r20, 0x08 ; 8 + a3c: 41 8f std Z+25, r20 ; 0x19 DMA.CH0.SRCADDR2 = 0x00; - a22: 12 8e std Z+26, r1 ; 0x1a + a3e: 12 8e std Z+26, r1 ; 0x1a DMA.CH0.DESTADDR0 = (( (uint16_t) &isoBuf[b1_state*PACKET_SIZE]) >> 0) & 0xFF; //Dest address is isoBuf - a24: c0 91 b4 20 lds r28, 0x20B4 ; 0x8020b4 - a28: 8e ee ldi r24, 0xEE ; 238 - a2a: 92 e0 ldi r25, 0x02 ; 2 - a2c: c8 9f mul r28, r24 - a2e: 90 01 movw r18, r0 - a30: c9 9f mul r28, r25 - a32: 30 0d add r19, r0 - a34: 11 24 eor r1, r1 - a36: 2a 59 subi r18, 0x9A ; 154 - a38: 39 4d sbci r19, 0xD9 ; 217 - a3a: 24 8f std Z+28, r18 ; 0x1c + a40: c0 91 b4 20 lds r28, 0x20B4 ; 0x8020b4 + a44: 8e ee ldi r24, 0xEE ; 238 + a46: 92 e0 ldi r25, 0x02 ; 2 + a48: c8 9f mul r28, r24 + a4a: 90 01 movw r18, r0 + a4c: c9 9f mul r28, r25 + a4e: 30 0d add r19, r0 + a50: 11 24 eor r1, r1 + a52: 26 59 subi r18, 0x96 ; 150 + a54: 39 4d sbci r19, 0xD9 ; 217 + a56: 24 8f std Z+28, r18 ; 0x1c DMA.CH0.DESTADDR1 = (( (uint16_t) &isoBuf[b1_state*PACKET_SIZE]) >> 8) & 0xFF; - a3c: c0 91 b4 20 lds r28, 0x20B4 ; 0x8020b4 - a40: c8 9f mul r28, r24 - a42: 90 01 movw r18, r0 - a44: c9 9f mul r28, r25 - a46: 30 0d add r19, r0 - a48: 11 24 eor r1, r1 - a4a: 2a 59 subi r18, 0x9A ; 154 - a4c: 39 4d sbci r19, 0xD9 ; 217 - a4e: 35 8f std Z+29, r19 ; 0x1d + a58: c0 91 b4 20 lds r28, 0x20B4 ; 0x8020b4 + a5c: c8 9f mul r28, r24 + a5e: 90 01 movw r18, r0 + a60: c9 9f mul r28, r25 + a62: 30 0d add r19, r0 + a64: 11 24 eor r1, r1 + a66: 26 59 subi r18, 0x96 ; 150 + a68: 39 4d sbci r19, 0xD9 ; 217 + a6a: 35 8f std Z+29, r19 ; 0x1d DMA.CH0.DESTADDR2 = 0x00; - a50: 16 8e std Z+30, r1 ; 0x1e + a6c: 16 8e std Z+30, r1 ; 0x1e //Must enable last for REPCNT won't work! DMA.CH0.CTRLA |= DMA_CH_ENABLE_bm; //Enable! - a52: 20 89 ldd r18, Z+16 ; 0x10 - a54: 20 68 ori r18, 0x80 ; 128 - a56: 20 8b std Z+16, r18 ; 0x10 + a6e: 20 89 ldd r18, Z+16 ; 0x10 + a70: 20 68 ori r18, 0x80 ; 128 + a72: 20 8b std Z+16, r18 ; 0x10 //Actual data being transferred DMA.CH3.CTRLA = 0x00; - a58: e0 e4 ldi r30, 0x40 ; 64 - a5a: f1 e0 ldi r31, 0x01 ; 1 - a5c: 10 82 st Z, r1 + a74: e0 e4 ldi r30, 0x40 ; 64 + a76: f1 e0 ldi r31, 0x01 ; 1 + a78: 10 82 st Z, r1 DMA.CH3.CTRLA = DMA_CH_RESET_bm; - a5e: b0 83 st Z, r27 + a7a: b0 83 st Z, r27 DMA.CH3.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm; //Do not repeat! - a60: a0 83 st Z, r26 + a7c: a0 83 st Z, r26 DMA.CH3.CTRLB = 0x00; //No interrupt - a62: 10 92 41 01 sts 0x0141, r1 ; 0x800141 <__TEXT_REGION_LENGTH__+0x700141> + a7e: 10 92 41 01 sts 0x0141, r1 ; 0x800141 <__TEXT_REGION_LENGTH__+0x700141> DMA.CH3.ADDRCTRL = DMA_CH_SRCRELOAD_BURST_gc | DMA_CH_SRCDIR_INC_gc | DMA_CH_DESTDIR_INC_gc; //Source reloads after each burst, with byte incrementing. Dest does not reload, but does increment address. - a66: 50 93 42 01 sts 0x0142, r21 ; 0x800142 <__TEXT_REGION_LENGTH__+0x700142> + a82: 50 93 42 01 sts 0x0142, r21 ; 0x800142 <__TEXT_REGION_LENGTH__+0x700142> DMA.CH3.TRIGSRC = DMA_CH_TRIGSRC_SPIC_gc; - a6a: 2a e4 ldi r18, 0x4A ; 74 - a6c: 20 93 43 01 sts 0x0143, r18 ; 0x800143 <__TEXT_REGION_LENGTH__+0x700143> + a86: 2a e4 ldi r18, 0x4A ; 74 + a88: 20 93 43 01 sts 0x0143, r18 ; 0x800143 <__TEXT_REGION_LENGTH__+0x700143> DMA.CH3.TRFCNT = HALFPACKET_SIZE; - a70: 60 93 44 01 sts 0x0144, r22 ; 0x800144 <__TEXT_REGION_LENGTH__+0x700144> - a74: 70 93 45 01 sts 0x0145, r23 ; 0x800145 <__TEXT_REGION_LENGTH__+0x700145> + a8c: 60 93 44 01 sts 0x0144, r22 ; 0x800144 <__TEXT_REGION_LENGTH__+0x700144> + a90: 70 93 45 01 sts 0x0145, r23 ; 0x800145 <__TEXT_REGION_LENGTH__+0x700145> DMA.CH3.SRCADDR0 = (( (uint16_t) &SPIC.DATA) >> 0) & 0xFF; //Source address is ADC - a78: 23 ec ldi r18, 0xC3 ; 195 - a7a: 20 93 48 01 sts 0x0148, r18 ; 0x800148 <__TEXT_REGION_LENGTH__+0x700148> + a94: 23 ec ldi r18, 0xC3 ; 195 + a96: 20 93 48 01 sts 0x0148, r18 ; 0x800148 <__TEXT_REGION_LENGTH__+0x700148> DMA.CH3.SRCADDR1 = (( (uint16_t) &SPIC.DATA) >> 8) & 0xFF; - a7e: 40 93 49 01 sts 0x0149, r20 ; 0x800149 <__TEXT_REGION_LENGTH__+0x700149> + a9a: 40 93 49 01 sts 0x0149, r20 ; 0x800149 <__TEXT_REGION_LENGTH__+0x700149> DMA.CH3.SRCADDR2 = 0x00; - a82: 10 92 4a 01 sts 0x014A, r1 ; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a> + a9e: 10 92 4a 01 sts 0x014A, r1 ; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a> DMA.CH3.DESTADDR0 = (( (uint16_t) &isoBuf[b1_state*PACKET_SIZE+HALFPACKET_SIZE]) >> 0) & 0xFF; //Dest address is isoBuf - a86: 40 91 b4 20 lds r20, 0x20B4 ; 0x8020b4 - a8a: 48 9f mul r20, r24 - a8c: 90 01 movw r18, r0 - a8e: 49 9f mul r20, r25 - a90: 30 0d add r19, r0 - a92: 11 24 eor r1, r1 - a94: 23 52 subi r18, 0x23 ; 35 - a96: 38 4d sbci r19, 0xD8 ; 216 - a98: 20 93 4c 01 sts 0x014C, r18 ; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c> + aa2: 40 91 b4 20 lds r20, 0x20B4 ; 0x8020b4 + aa6: 48 9f mul r20, r24 + aa8: 90 01 movw r18, r0 + aaa: 49 9f mul r20, r25 + aac: 30 0d add r19, r0 + aae: 11 24 eor r1, r1 + ab0: 2f 51 subi r18, 0x1F ; 31 + ab2: 38 4d sbci r19, 0xD8 ; 216 + ab4: 20 93 4c 01 sts 0x014C, r18 ; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c> DMA.CH3.DESTADDR1 = (( (uint16_t) &isoBuf[b1_state*PACKET_SIZE+HALFPACKET_SIZE]) >> 8) & 0xFF; - a9c: 40 91 b4 20 lds r20, 0x20B4 ; 0x8020b4 - aa0: 48 9f mul r20, r24 - aa2: 90 01 movw r18, r0 - aa4: 49 9f mul r20, r25 - aa6: 30 0d add r19, r0 - aa8: 11 24 eor r1, r1 - aaa: c9 01 movw r24, r18 - aac: 83 52 subi r24, 0x23 ; 35 - aae: 98 4d sbci r25, 0xD8 ; 216 - ab0: 90 93 4d 01 sts 0x014D, r25 ; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d> + ab8: 40 91 b4 20 lds r20, 0x20B4 ; 0x8020b4 + abc: 48 9f mul r20, r24 + abe: 90 01 movw r18, r0 + ac0: 49 9f mul r20, r25 + ac2: 30 0d add r19, r0 + ac4: 11 24 eor r1, r1 + ac6: c9 01 movw r24, r18 + ac8: 8f 51 subi r24, 0x1F ; 31 + aca: 98 4d sbci r25, 0xD8 ; 216 + acc: 90 93 4d 01 sts 0x014D, r25 ; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d> DMA.CH3.DESTADDR2 = 0x00; - ab4: 10 92 4e 01 sts 0x014E, r1 ; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e> + ad0: 10 92 4e 01 sts 0x014E, r1 ; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e> //Must enable last for REPCNT won't work! DMA.CH3.CTRLA |= DMA_CH_ENABLE_bm; //Enable! - ab8: 80 81 ld r24, Z - aba: 80 68 ori r24, 0x80 ; 128 - abc: 80 83 st Z, r24 + ad4: 80 81 ld r24, Z + ad6: 80 68 ori r24, 0x80 ; 128 + ad8: 80 83 st Z, r24 } - abe: cf 91 pop r28 - ac0: 08 95 ret + ada: cf 91 pop r28 + adc: 08 95 ret -00000ac2 : +00000ade : void tiny_dma_set_mode_5(void){ global_mode = 5; - ac2: 85 e0 ldi r24, 0x05 ; 5 - ac4: 80 93 00 20 sts 0x2000, r24 ; 0x802000 <__data_start> + ade: 85 e0 ldi r24, 0x05 ; 5 + ae0: 80 93 00 20 sts 0x2000, r24 ; 0x802000 <__data_start> tiny_dma_flush(); - ac8: f2 dc rcall .-1564 ; 0x4ae + ae4: f2 dc rcall .-1564 ; 0x4ca DMA.CH2.REPCNT = 0; //Repeat forever! - aca: e0 e0 ldi r30, 0x00 ; 0 - acc: f1 e0 ldi r31, 0x01 ; 1 - ace: 16 aa std Z+54, r1 ; 0x36 + ae6: e0 e0 ldi r30, 0x00 ; 0 + ae8: f1 e0 ldi r31, 0x01 ; 1 + aea: 16 aa std Z+54, r1 ; 0x36 DMA.CH2.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm | DMA_CH_REPEAT_bm; - ad0: 44 e2 ldi r20, 0x24 ; 36 - ad2: 40 ab std Z+48, r20 ; 0x30 + aec: 34 e2 ldi r19, 0x24 ; 36 + aee: 30 ab std Z+48, r19 ; 0x30 DMA.CH2.CTRLB = 0x00; //Hi interrupt on block complete - ad4: 11 aa std Z+49, r1 ; 0x31 + af0: 11 aa std Z+49, r1 ; 0x31 DMA.CH2.ADDRCTRL = DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc | DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc; //Dest reloads after each burst, with byte incrementing. Src reloads at end of block, also incrementing address. - ad6: 39 e5 ldi r19, 0x59 ; 89 - ad8: 32 ab std Z+50, r19 ; 0x32 + af2: 29 e5 ldi r18, 0x59 ; 89 + af4: 22 ab std Z+50, r18 ; 0x32 DMA.CH2.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH2_gc; //Triggered from TCC0 when it hits PER - ada: 83 e0 ldi r24, 0x03 ; 3 - adc: 83 ab std Z+51, r24 ; 0x33 + af6: 83 e0 ldi r24, 0x03 ; 3 + af8: 83 ab std Z+51, r24 ; 0x33 DMA.CH2.TRFCNT = dacBuf_len; - ade: 60 91 04 20 lds r22, 0x2004 ; 0x802004 - ae2: 70 91 05 20 lds r23, 0x2005 ; 0x802005 - ae6: 64 ab std Z+52, r22 ; 0x34 - ae8: 75 ab std Z+53, r23 ; 0x35 + afa: 40 91 04 20 lds r20, 0x2004 ; 0x802004 + afe: 50 91 05 20 lds r21, 0x2005 ; 0x802005 + b02: 44 ab std Z+52, r20 ; 0x34 + b04: 55 ab std Z+53, r21 ; 0x35 DMA.CH2.SRCADDR0 = (( (uint16_t) &dacBuf_CH1[0]) >> 0) & 0xFF; //Source address is dacbuf - aea: 66 e5 ldi r22, 0x56 ; 86 - aec: 72 e2 ldi r23, 0x22 ; 34 - aee: 60 af std Z+56, r22 ; 0x38 + b06: 4a e5 ldi r20, 0x5A ; 90 + b08: 52 e2 ldi r21, 0x22 ; 34 + b0a: 40 af std Z+56, r20 ; 0x38 DMA.CH2.SRCADDR1 = (( (uint16_t) &dacBuf_CH1[0]) >> 8) & 0xFF; - af0: 71 af std Z+57, r23 ; 0x39 + b0c: 51 af std Z+57, r21 ; 0x39 DMA.CH2.SRCADDR2 = 0x00; - af2: 12 ae std Z+58, r1 ; 0x3a + b0e: 12 ae std Z+58, r1 ; 0x3a DMA.CH2.DESTADDR0 = (( (uint16_t) &DACB.CH0DATAH) >> 0) & 0xFF; //Dest address is high byte of DAC register - af4: 29 e3 ldi r18, 0x39 ; 57 - af6: 24 af std Z+60, r18 ; 0x3c + b10: 99 e3 ldi r25, 0x39 ; 57 + b12: 94 af std Z+60, r25 ; 0x3c DMA.CH2.DESTADDR1 = (( (uint16_t) &DACB.CH0DATAH) >> 8) & 0xFF; - af8: 80 93 3d 01 sts 0x013D, r24 ; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d> + b14: 80 93 3d 01 sts 0x013D, r24 ; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d> DMA.CH2.DESTADDR2 = 0x00; - afc: 10 92 3e 01 sts 0x013E, r1 ; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e> + b18: 10 92 3e 01 sts 0x013E, r1 ; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e> //Must enable last for REPCNT won't work! DMA.CH2.CTRLA |= DMA_CH_ENABLE_bm; //Enable! - b00: 90 a9 ldd r25, Z+48 ; 0x30 - b02: 90 68 ori r25, 0x80 ; 128 - b04: 90 ab std Z+48, r25 ; 0x30 + b1c: 90 a9 ldd r25, Z+48 ; 0x30 + b1e: 90 68 ori r25, 0x80 ; 128 + b20: 90 ab std Z+48, r25 ; 0x30 DMA.CH3.REPCNT = 0; //Repeat forever! - b06: 10 92 46 01 sts 0x0146, r1 ; 0x800146 <__TEXT_REGION_LENGTH__+0x700146> + b22: 10 92 46 01 sts 0x0146, r1 ; 0x800146 <__TEXT_REGION_LENGTH__+0x700146> DMA.CH3.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm | DMA_CH_REPEAT_bm; - b0a: e0 e4 ldi r30, 0x40 ; 64 - b0c: f1 e0 ldi r31, 0x01 ; 1 - b0e: 40 83 st Z, r20 + b26: e0 e4 ldi r30, 0x40 ; 64 + b28: f1 e0 ldi r31, 0x01 ; 1 + b2a: 30 83 st Z, r19 DMA.CH3.CTRLB = 0x00; //No interrupt for DacBuf!! - b10: 10 92 41 01 sts 0x0141, r1 ; 0x800141 <__TEXT_REGION_LENGTH__+0x700141> + b2c: 10 92 41 01 sts 0x0141, r1 ; 0x800141 <__TEXT_REGION_LENGTH__+0x700141> DMA.CH3.ADDRCTRL = DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc | DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc; //Dest reloads after each burst, with byte incrementing. Src reloads at end of block, also incrementing address. - b14: 30 93 42 01 sts 0x0142, r19 ; 0x800142 <__TEXT_REGION_LENGTH__+0x700142> + b30: 20 93 42 01 sts 0x0142, r18 ; 0x800142 <__TEXT_REGION_LENGTH__+0x700142> DMA.CH3.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH2_gc; //Triggered from TCC0 when it hits PER - b18: 80 93 43 01 sts 0x0143, r24 ; 0x800143 <__TEXT_REGION_LENGTH__+0x700143> + b34: 80 93 43 01 sts 0x0143, r24 ; 0x800143 <__TEXT_REGION_LENGTH__+0x700143> DMA.CH3.TRFCNT = dacBuf_len; - b1c: 40 91 04 20 lds r20, 0x2004 ; 0x802004 - b20: 50 91 05 20 lds r21, 0x2005 ; 0x802005 - b24: 40 93 44 01 sts 0x0144, r20 ; 0x800144 <__TEXT_REGION_LENGTH__+0x700144> - b28: 50 93 45 01 sts 0x0145, r21 ; 0x800145 <__TEXT_REGION_LENGTH__+0x700145> + b38: 20 91 04 20 lds r18, 0x2004 ; 0x802004 + b3c: 30 91 05 20 lds r19, 0x2005 ; 0x802005 + b40: 20 93 44 01 sts 0x0144, r18 ; 0x800144 <__TEXT_REGION_LENGTH__+0x700144> + b44: 30 93 45 01 sts 0x0145, r19 ; 0x800145 <__TEXT_REGION_LENGTH__+0x700145> - DMA.CH3.SRCADDR0 = (( (uint16_t) &isoBuf[0]) >> 0) & 0xFF; //Source address is dacbuf - b2c: 46 e6 ldi r20, 0x66 ; 102 - b2e: 56 e2 ldi r21, 0x26 ; 38 - b30: 40 93 48 01 sts 0x0148, r20 ; 0x800148 <__TEXT_REGION_LENGTH__+0x700148> - DMA.CH3.SRCADDR1 = (( (uint16_t) &isoBuf[0]) >> 8) & 0xFF; - b34: 50 93 49 01 sts 0x0149, r21 ; 0x800149 <__TEXT_REGION_LENGTH__+0x700149> + DMA.CH3.SRCADDR0 = (( (uint16_t) &dacBuf_CH2[0]) >> 0) & 0xFF; //Source address is dacbuf + b48: 2a e6 ldi r18, 0x6A ; 106 + b4a: 34 e2 ldi r19, 0x24 ; 36 + b4c: 20 93 48 01 sts 0x0148, r18 ; 0x800148 <__TEXT_REGION_LENGTH__+0x700148> + DMA.CH3.SRCADDR1 = (( (uint16_t) &dacBuf_CH2[0]) >> 8) & 0xFF; + b50: 30 93 49 01 sts 0x0149, r19 ; 0x800149 <__TEXT_REGION_LENGTH__+0x700149> DMA.CH3.SRCADDR2 = 0x00; - b38: 10 92 4a 01 sts 0x014A, r1 ; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a> + b54: 10 92 4a 01 sts 0x014A, r1 ; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a> - DMA.CH3.DESTADDR0 = (( (uint16_t) &DACB.CH0DATAH) >> 0) & 0xFF; //Dest address is high byte of DAC register - b3c: 20 93 4c 01 sts 0x014C, r18 ; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c> - DMA.CH3.DESTADDR1 = (( (uint16_t) &DACB.CH0DATAH) >> 8) & 0xFF; - b40: 80 93 4d 01 sts 0x014D, r24 ; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d> + DMA.CH3.DESTADDR0 = (( (uint16_t) &DACB.CH1DATAH) >> 0) & 0xFF; //Dest address is high byte of DAC register + b58: 9b e3 ldi r25, 0x3B ; 59 + b5a: 90 93 4c 01 sts 0x014C, r25 ; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c> + DMA.CH3.DESTADDR1 = (( (uint16_t) &DACB.CH1DATAH) >> 8) & 0xFF; + b5e: 80 93 4d 01 sts 0x014D, r24 ; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d> DMA.CH3.DESTADDR2 = 0x00; - b44: 10 92 4e 01 sts 0x014E, r1 ; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e> + b62: 10 92 4e 01 sts 0x014E, r1 ; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e> //Must enable last for REPCNT won't work! DMA.CH3.CTRLA |= DMA_CH_ENABLE_bm; //Enable! - b48: 80 81 ld r24, Z - b4a: 80 68 ori r24, 0x80 ; 128 - b4c: 80 83 st Z, r24 - b4e: 08 95 ret + b66: 80 81 ld r24, Z + b68: 80 68 ori r24, 0x80 ; 128 + b6a: 80 83 st Z, r24 + b6c: 08 95 ret -00000b50 : +00000b6e : } void tiny_dma_set_mode_6(void){ global_mode = 6; - b50: 86 e0 ldi r24, 0x06 ; 6 - b52: 80 93 00 20 sts 0x2000, r24 ; 0x802000 <__data_start> + b6e: 86 e0 ldi r24, 0x06 ; 6 + b70: 80 93 00 20 sts 0x2000, r24 ; 0x802000 <__data_start> tiny_dma_flush(); - b56: ab dc rcall .-1706 ; 0x4ae + b74: aa dc rcall .-1708 ; 0x4ca DMA.CH2.REPCNT = 0; //Repeat forever! - b58: e0 e0 ldi r30, 0x00 ; 0 - b5a: f1 e0 ldi r31, 0x01 ; 1 - b5c: 16 aa std Z+54, r1 ; 0x36 + b76: e0 e0 ldi r30, 0x00 ; 0 + b78: f1 e0 ldi r31, 0x01 ; 1 + b7a: 16 aa std Z+54, r1 ; 0x36 DMA.CH2.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm | DMA_CH_REPEAT_bm; - b5e: 34 e2 ldi r19, 0x24 ; 36 - b60: 30 ab std Z+48, r19 ; 0x30 + b7c: 34 e2 ldi r19, 0x24 ; 36 + b7e: 30 ab std Z+48, r19 ; 0x30 DMA.CH2.CTRLB = 0x00; //Hi interrupt on block complete - b62: 11 aa std Z+49, r1 ; 0x31 + b80: 11 aa std Z+49, r1 ; 0x31 DMA.CH2.ADDRCTRL = DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc | DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc; //Dest reloads after each burst, with byte incrementing. Src reloads at end of block, also incrementing address. - b64: 29 e5 ldi r18, 0x59 ; 89 - b66: 22 ab std Z+50, r18 ; 0x32 + b82: 29 e5 ldi r18, 0x59 ; 89 + b84: 22 ab std Z+50, r18 ; 0x32 DMA.CH2.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH2_gc; //Triggered from TCC0 when it hits PER - b68: 83 e0 ldi r24, 0x03 ; 3 - b6a: 83 ab std Z+51, r24 ; 0x33 + b86: 83 e0 ldi r24, 0x03 ; 3 + b88: 83 ab std Z+51, r24 ; 0x33 DMA.CH2.TRFCNT = dacBuf_len; - b6c: 40 91 04 20 lds r20, 0x2004 ; 0x802004 - b70: 50 91 05 20 lds r21, 0x2005 ; 0x802005 - b74: 44 ab std Z+52, r20 ; 0x34 - b76: 55 ab std Z+53, r21 ; 0x35 + b8a: 40 91 04 20 lds r20, 0x2004 ; 0x802004 + b8e: 50 91 05 20 lds r21, 0x2005 ; 0x802005 + b92: 44 ab std Z+52, r20 ; 0x34 + b94: 55 ab std Z+53, r21 ; 0x35 DMA.CH2.SRCADDR0 = (( (uint16_t) &dacBuf_CH1[0]) >> 0) & 0xFF; //Source address is dacbuf - b78: 46 e5 ldi r20, 0x56 ; 86 - b7a: 52 e2 ldi r21, 0x22 ; 34 - b7c: 40 af std Z+56, r20 ; 0x38 + b96: 4a e5 ldi r20, 0x5A ; 90 + b98: 52 e2 ldi r21, 0x22 ; 34 + b9a: 40 af std Z+56, r20 ; 0x38 DMA.CH2.SRCADDR1 = (( (uint16_t) &dacBuf_CH1[0]) >> 8) & 0xFF; - b7e: 51 af std Z+57, r21 ; 0x39 + b9c: 51 af std Z+57, r21 ; 0x39 DMA.CH2.SRCADDR2 = 0x00; - b80: 12 ae std Z+58, r1 ; 0x3a + b9e: 12 ae std Z+58, r1 ; 0x3a DMA.CH2.DESTADDR0 = (( (uint16_t) &DACB.CH0DATAH) >> 0) & 0xFF; //Dest address is high byte of DAC register - b82: 99 e3 ldi r25, 0x39 ; 57 - b84: 94 af std Z+60, r25 ; 0x3c + ba0: 99 e3 ldi r25, 0x39 ; 57 + ba2: 94 af std Z+60, r25 ; 0x3c DMA.CH2.DESTADDR1 = (( (uint16_t) &DACB.CH0DATAH) >> 8) & 0xFF; - b86: 80 93 3d 01 sts 0x013D, r24 ; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d> + ba4: 80 93 3d 01 sts 0x013D, r24 ; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d> DMA.CH2.DESTADDR2 = 0x00; - b8a: 10 92 3e 01 sts 0x013E, r1 ; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e> + ba8: 10 92 3e 01 sts 0x013E, r1 ; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e> //Must enable last for REPCNT won't work! DMA.CH2.CTRLA |= DMA_CH_ENABLE_bm; //Enable! - b8e: 90 a9 ldd r25, Z+48 ; 0x30 - b90: 90 68 ori r25, 0x80 ; 128 - b92: 90 ab std Z+48, r25 ; 0x30 + bac: 90 a9 ldd r25, Z+48 ; 0x30 + bae: 90 68 ori r25, 0x80 ; 128 + bb0: 90 ab std Z+48, r25 ; 0x30 DMA.CH3.REPCNT = 0; //Repeat forever! - b94: 10 92 46 01 sts 0x0146, r1 ; 0x800146 <__TEXT_REGION_LENGTH__+0x700146> + bb2: 10 92 46 01 sts 0x0146, r1 ; 0x800146 <__TEXT_REGION_LENGTH__+0x700146> DMA.CH3.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm | DMA_CH_REPEAT_bm; - b98: e0 e4 ldi r30, 0x40 ; 64 - b9a: f1 e0 ldi r31, 0x01 ; 1 - b9c: 30 83 st Z, r19 + bb6: e0 e4 ldi r30, 0x40 ; 64 + bb8: f1 e0 ldi r31, 0x01 ; 1 + bba: 30 83 st Z, r19 DMA.CH3.CTRLB = 0x00; //No interrupt for DacBuf!! - b9e: 10 92 41 01 sts 0x0141, r1 ; 0x800141 <__TEXT_REGION_LENGTH__+0x700141> + bbc: 10 92 41 01 sts 0x0141, r1 ; 0x800141 <__TEXT_REGION_LENGTH__+0x700141> DMA.CH3.ADDRCTRL = DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc | DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc; //Dest reloads after each burst, with byte incrementing. Src reloads at end of block, also incrementing address. - ba2: 20 93 42 01 sts 0x0142, r18 ; 0x800142 <__TEXT_REGION_LENGTH__+0x700142> + bc0: 20 93 42 01 sts 0x0142, r18 ; 0x800142 <__TEXT_REGION_LENGTH__+0x700142> DMA.CH3.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH1_gc; //Triggered from TCC0 when it hits PER - ba6: 92 e0 ldi r25, 0x02 ; 2 - ba8: 90 93 43 01 sts 0x0143, r25 ; 0x800143 <__TEXT_REGION_LENGTH__+0x700143> + bc4: 92 e0 ldi r25, 0x02 ; 2 + bc6: 90 93 43 01 sts 0x0143, r25 ; 0x800143 <__TEXT_REGION_LENGTH__+0x700143> DMA.CH3.TRFCNT = auxDacBufLen; - bac: 20 91 02 20 lds r18, 0x2002 ; 0x802002 - bb0: 30 91 03 20 lds r19, 0x2003 ; 0x802003 - bb4: 20 93 44 01 sts 0x0144, r18 ; 0x800144 <__TEXT_REGION_LENGTH__+0x700144> - bb8: 30 93 45 01 sts 0x0145, r19 ; 0x800145 <__TEXT_REGION_LENGTH__+0x700145> + bca: 20 91 02 20 lds r18, 0x2002 ; 0x802002 + bce: 30 91 03 20 lds r19, 0x2003 ; 0x802003 + bd2: 20 93 44 01 sts 0x0144, r18 ; 0x800144 <__TEXT_REGION_LENGTH__+0x700144> + bd6: 30 93 45 01 sts 0x0145, r19 ; 0x800145 <__TEXT_REGION_LENGTH__+0x700145> DMA.CH3.SRCADDR0 = (( (uint16_t) &dacBuf_CH2[0]) >> 0) & 0xFF; //Source address is dacbuf - bbc: 26 e6 ldi r18, 0x66 ; 102 - bbe: 34 e2 ldi r19, 0x24 ; 36 - bc0: 20 93 48 01 sts 0x0148, r18 ; 0x800148 <__TEXT_REGION_LENGTH__+0x700148> + bda: 2a e6 ldi r18, 0x6A ; 106 + bdc: 34 e2 ldi r19, 0x24 ; 36 + bde: 20 93 48 01 sts 0x0148, r18 ; 0x800148 <__TEXT_REGION_LENGTH__+0x700148> DMA.CH3.SRCADDR1 = (( (uint16_t) &dacBuf_CH2[0]) >> 8) & 0xFF; - bc4: 30 93 49 01 sts 0x0149, r19 ; 0x800149 <__TEXT_REGION_LENGTH__+0x700149> + be2: 30 93 49 01 sts 0x0149, r19 ; 0x800149 <__TEXT_REGION_LENGTH__+0x700149> DMA.CH3.SRCADDR2 = 0x00; - bc8: 10 92 4a 01 sts 0x014A, r1 ; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a> + be6: 10 92 4a 01 sts 0x014A, r1 ; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a> DMA.CH3.DESTADDR0 = (( (uint16_t) &DACB.CH1DATAH) >> 0) & 0xFF; //Dest address is high byte of DAC register - bcc: 9b e3 ldi r25, 0x3B ; 59 - bce: 90 93 4c 01 sts 0x014C, r25 ; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c> + bea: 9b e3 ldi r25, 0x3B ; 59 + bec: 90 93 4c 01 sts 0x014C, r25 ; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c> DMA.CH3.DESTADDR1 = (( (uint16_t) &DACB.CH1DATAH) >> 8) & 0xFF; - bd2: 80 93 4d 01 sts 0x014D, r24 ; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d> + bf0: 80 93 4d 01 sts 0x014D, r24 ; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d> DMA.CH3.DESTADDR2 = 0x00; - bd6: 10 92 4e 01 sts 0x014E, r1 ; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e> + bf4: 10 92 4e 01 sts 0x014E, r1 ; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e> //Must enable last for REPCNT won't work! DMA.CH3.CTRLA |= DMA_CH_ENABLE_bm; //Enable! - bda: 80 81 ld r24, Z - bdc: 80 68 ori r24, 0x80 ; 128 - bde: 80 83 st Z, r24 - be0: 08 95 ret + bf8: 80 81 ld r24, Z + bfa: 80 68 ori r24, 0x80 ; 128 + bfc: 80 83 st Z, r24 + bfe: 08 95 ret -00000be2 : +00000c00 : } void tiny_dma_loop_mode_6(void){ DMA.CH0.CTRLA = 0x00; - be2: e0 e0 ldi r30, 0x00 ; 0 - be4: f1 e0 ldi r31, 0x01 ; 1 - be6: 10 8a std Z+16, r1 ; 0x10 + c00: e0 e0 ldi r30, 0x00 ; 0 + c02: f1 e0 ldi r31, 0x01 ; 1 + c04: 10 8a std Z+16, r1 ; 0x10 DMA.CH0.CTRLA = DMA_CH_RESET_bm; - be8: 80 e4 ldi r24, 0x40 ; 64 - bea: 80 8b std Z+16, r24 ; 0x10 + c06: 80 e4 ldi r24, 0x40 ; 64 + c08: 80 8b std Z+16, r24 ; 0x10 DMA.CH0.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm; //Do not repeat! - bec: 84 e0 ldi r24, 0x04 ; 4 - bee: 80 8b std Z+16, r24 ; 0x10 + c0a: 84 e0 ldi r24, 0x04 ; 4 + c0c: 80 8b std Z+16, r24 ; 0x10 DMA.CH0.CTRLB = 0x00; //No interrupt! - bf0: 11 8a std Z+17, r1 ; 0x11 + c0e: 11 8a std Z+17, r1 ; 0x11 DMA.CH0.ADDRCTRL = DMA_CH_SRCRELOAD_BURST_gc | DMA_CH_SRCDIR_INC_gc | DMA_CH_DESTDIR_INC_gc; //Source reloads after each burst, with byte incrementing. Dest does not reload, but does increment address. - bf2: 81 e9 ldi r24, 0x91 ; 145 - bf4: 82 8b std Z+18, r24 ; 0x12 + c10: 81 e9 ldi r24, 0x91 ; 145 + c12: 82 8b std Z+18, r24 ; 0x12 DMA.CH0.TRIGSRC = DMA_CH_TRIGSRC_ADCA_CH0_gc; //Triggered from ADCA channel 0 - bf6: 80 e1 ldi r24, 0x10 ; 16 - bf8: 83 8b std Z+19, r24 ; 0x13 + c14: 80 e1 ldi r24, 0x10 ; 16 + c16: 83 8b std Z+19, r24 ; 0x13 DMA.CH0.TRFCNT = PACKET_SIZE; - bfa: 2e ee ldi r18, 0xEE ; 238 - bfc: 32 e0 ldi r19, 0x02 ; 2 - bfe: 24 8b std Z+20, r18 ; 0x14 - c00: 35 8b std Z+21, r19 ; 0x15 + c18: 2e ee ldi r18, 0xEE ; 238 + c1a: 32 e0 ldi r19, 0x02 ; 2 + c1c: 24 8b std Z+20, r18 ; 0x14 + c1e: 35 8b std Z+21, r19 ; 0x15 DMA.CH0.SRCADDR0 = (( (uint16_t) &ADCA.CH0.RESL) >> 0) & 0xFF; //Source address is ADC - c02: 84 e2 ldi r24, 0x24 ; 36 - c04: 80 8f std Z+24, r24 ; 0x18 + c20: 84 e2 ldi r24, 0x24 ; 36 + c22: 80 8f std Z+24, r24 ; 0x18 DMA.CH0.SRCADDR1 = (( (uint16_t) &ADCA.CH0.RESL) >> 8) & 0xFF; - c06: 82 e0 ldi r24, 0x02 ; 2 - c08: 81 8f std Z+25, r24 ; 0x19 + c24: 82 e0 ldi r24, 0x02 ; 2 + c26: 81 8f std Z+25, r24 ; 0x19 DMA.CH0.SRCADDR2 = 0x00; - c0a: 12 8e std Z+26, r1 ; 0x1a + c28: 12 8e std Z+26, r1 ; 0x1a DMA.CH0.DESTADDR0 = (( (uint16_t) &isoBuf[b1_state * PACKET_SIZE]) >> 0) & 0xFF; //Dest address is isoBuf - c0c: 40 91 b4 20 lds r20, 0x20B4 ; 0x8020b4 - c10: 42 9f mul r20, r18 - c12: c0 01 movw r24, r0 - c14: 43 9f mul r20, r19 - c16: 90 0d add r25, r0 - c18: 11 24 eor r1, r1 - c1a: 8a 59 subi r24, 0x9A ; 154 - c1c: 99 4d sbci r25, 0xD9 ; 217 - c1e: 84 8f std Z+28, r24 ; 0x1c + c2a: 40 91 b4 20 lds r20, 0x20B4 ; 0x8020b4 + c2e: 42 9f mul r20, r18 + c30: c0 01 movw r24, r0 + c32: 43 9f mul r20, r19 + c34: 90 0d add r25, r0 + c36: 11 24 eor r1, r1 + c38: 86 59 subi r24, 0x96 ; 150 + c3a: 99 4d sbci r25, 0xD9 ; 217 + c3c: 84 8f std Z+28, r24 ; 0x1c DMA.CH0.DESTADDR1 = (( (uint16_t) &isoBuf[b1_state * PACKET_SIZE]) >> 8) & 0xFF; - c20: 40 91 b4 20 lds r20, 0x20B4 ; 0x8020b4 - c24: 42 9f mul r20, r18 - c26: c0 01 movw r24, r0 - c28: 43 9f mul r20, r19 - c2a: 90 0d add r25, r0 - c2c: 11 24 eor r1, r1 - c2e: 8a 59 subi r24, 0x9A ; 154 - c30: 99 4d sbci r25, 0xD9 ; 217 - c32: 95 8f std Z+29, r25 ; 0x1d + c3e: 40 91 b4 20 lds r20, 0x20B4 ; 0x8020b4 + c42: 42 9f mul r20, r18 + c44: c0 01 movw r24, r0 + c46: 43 9f mul r20, r19 + c48: 90 0d add r25, r0 + c4a: 11 24 eor r1, r1 + c4c: 86 59 subi r24, 0x96 ; 150 + c4e: 99 4d sbci r25, 0xD9 ; 217 + c50: 95 8f std Z+29, r25 ; 0x1d DMA.CH0.DESTADDR2 = 0x00; - c34: 16 8e std Z+30, r1 ; 0x1e + c52: 16 8e std Z+30, r1 ; 0x1e //Must enable last for REPCNT won't work! DMA.CH0.CTRLA |= DMA_CH_ENABLE_bm; //Enable! - c36: 80 89 ldd r24, Z+16 ; 0x10 - c38: 80 68 ori r24, 0x80 ; 128 - c3a: 80 8b std Z+16, r24 ; 0x10 - c3c: 08 95 ret + c54: 80 89 ldd r24, Z+16 ; 0x10 + c56: 80 68 ori r24, 0x80 ; 128 + c58: 80 8b std Z+16, r24 ; 0x10 + c5a: 08 95 ret -00000c3e : +00000c5c : } void tiny_dma_set_mode_7(void){ global_mode = 7; - c3e: 87 e0 ldi r24, 0x07 ; 7 - c40: 80 93 00 20 sts 0x2000, r24 ; 0x802000 <__data_start> + c5c: 87 e0 ldi r24, 0x07 ; 7 + c5e: 80 93 00 20 sts 0x2000, r24 ; 0x802000 <__data_start> tiny_dma_flush(); - c44: 34 dc rcall .-1944 ; 0x4ae + c62: 33 dc rcall .-1946 ; 0x4ca DMA.CH2.REPCNT = 0; //Repeat forever! - c46: e0 e0 ldi r30, 0x00 ; 0 - c48: f1 e0 ldi r31, 0x01 ; 1 - c4a: 16 aa std Z+54, r1 ; 0x36 + c64: e0 e0 ldi r30, 0x00 ; 0 + c66: f1 e0 ldi r31, 0x01 ; 1 + c68: 16 aa std Z+54, r1 ; 0x36 DMA.CH2.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm | DMA_CH_REPEAT_bm; - c4c: 34 e2 ldi r19, 0x24 ; 36 - c4e: 30 ab std Z+48, r19 ; 0x30 + c6a: 34 e2 ldi r19, 0x24 ; 36 + c6c: 30 ab std Z+48, r19 ; 0x30 DMA.CH2.CTRLB = 0x00; //Hi interrupt on block complete - c50: 11 aa std Z+49, r1 ; 0x31 + c6e: 11 aa std Z+49, r1 ; 0x31 DMA.CH2.ADDRCTRL = DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc | DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc; //Dest reloads after each burst, with byte incrementing. Src reloads at end of block, also incrementing address. - c52: 29 e5 ldi r18, 0x59 ; 89 - c54: 22 ab std Z+50, r18 ; 0x32 + c70: 29 e5 ldi r18, 0x59 ; 89 + c72: 22 ab std Z+50, r18 ; 0x32 DMA.CH2.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH2_gc; //Triggered from TCC0 when it hits PER - c56: 83 e0 ldi r24, 0x03 ; 3 - c58: 83 ab std Z+51, r24 ; 0x33 + c74: 83 e0 ldi r24, 0x03 ; 3 + c76: 83 ab std Z+51, r24 ; 0x33 DMA.CH2.TRFCNT = dacBuf_len; - c5a: 40 91 04 20 lds r20, 0x2004 ; 0x802004 - c5e: 50 91 05 20 lds r21, 0x2005 ; 0x802005 - c62: 44 ab std Z+52, r20 ; 0x34 - c64: 55 ab std Z+53, r21 ; 0x35 + c78: 40 91 04 20 lds r20, 0x2004 ; 0x802004 + c7c: 50 91 05 20 lds r21, 0x2005 ; 0x802005 + c80: 44 ab std Z+52, r20 ; 0x34 + c82: 55 ab std Z+53, r21 ; 0x35 DMA.CH2.SRCADDR0 = (( (uint16_t) &dacBuf_CH1[0]) >> 0) & 0xFF; //Source address is dacbuf - c66: 46 e5 ldi r20, 0x56 ; 86 - c68: 52 e2 ldi r21, 0x22 ; 34 - c6a: 40 af std Z+56, r20 ; 0x38 + c84: 4a e5 ldi r20, 0x5A ; 90 + c86: 52 e2 ldi r21, 0x22 ; 34 + c88: 40 af std Z+56, r20 ; 0x38 DMA.CH2.SRCADDR1 = (( (uint16_t) &dacBuf_CH1[0]) >> 8) & 0xFF; - c6c: 51 af std Z+57, r21 ; 0x39 + c8a: 51 af std Z+57, r21 ; 0x39 DMA.CH2.SRCADDR2 = 0x00; - c6e: 12 ae std Z+58, r1 ; 0x3a + c8c: 12 ae std Z+58, r1 ; 0x3a DMA.CH2.DESTADDR0 = (( (uint16_t) &DACB.CH0DATAH) >> 0) & 0xFF; //Dest address is high byte of DAC register - c70: 99 e3 ldi r25, 0x39 ; 57 - c72: 94 af std Z+60, r25 ; 0x3c + c8e: 99 e3 ldi r25, 0x39 ; 57 + c90: 94 af std Z+60, r25 ; 0x3c DMA.CH2.DESTADDR1 = (( (uint16_t) &DACB.CH0DATAH) >> 8) & 0xFF; - c74: 80 93 3d 01 sts 0x013D, r24 ; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d> + c92: 80 93 3d 01 sts 0x013D, r24 ; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d> DMA.CH2.DESTADDR2 = 0x00; - c78: 10 92 3e 01 sts 0x013E, r1 ; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e> + c96: 10 92 3e 01 sts 0x013E, r1 ; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e> //Must enable last for REPCNT won't work! DMA.CH2.CTRLA |= DMA_CH_ENABLE_bm; //Enable! - c7c: 90 a9 ldd r25, Z+48 ; 0x30 - c7e: 90 68 ori r25, 0x80 ; 128 - c80: 90 ab std Z+48, r25 ; 0x30 + c9a: 90 a9 ldd r25, Z+48 ; 0x30 + c9c: 90 68 ori r25, 0x80 ; 128 + c9e: 90 ab std Z+48, r25 ; 0x30 DMA.CH3.REPCNT = 0; //Repeat forever! - c82: 10 92 46 01 sts 0x0146, r1 ; 0x800146 <__TEXT_REGION_LENGTH__+0x700146> + ca0: 10 92 46 01 sts 0x0146, r1 ; 0x800146 <__TEXT_REGION_LENGTH__+0x700146> DMA.CH3.CTRLA = DMA_CH_BURSTLEN_1BYTE_gc | DMA_CH_SINGLE_bm | DMA_CH_REPEAT_bm; - c86: e0 e4 ldi r30, 0x40 ; 64 - c88: f1 e0 ldi r31, 0x01 ; 1 - c8a: 30 83 st Z, r19 + ca4: e0 e4 ldi r30, 0x40 ; 64 + ca6: f1 e0 ldi r31, 0x01 ; 1 + ca8: 30 83 st Z, r19 DMA.CH3.CTRLB = 0x00; //No interrupt for DacBuf!! - c8c: 10 92 41 01 sts 0x0141, r1 ; 0x800141 <__TEXT_REGION_LENGTH__+0x700141> + caa: 10 92 41 01 sts 0x0141, r1 ; 0x800141 <__TEXT_REGION_LENGTH__+0x700141> DMA.CH3.ADDRCTRL = DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc | DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc; //Dest reloads after each burst, with byte incrementing. Src reloads at end of block, also incrementing address. - c90: 20 93 42 01 sts 0x0142, r18 ; 0x800142 <__TEXT_REGION_LENGTH__+0x700142> + cae: 20 93 42 01 sts 0x0142, r18 ; 0x800142 <__TEXT_REGION_LENGTH__+0x700142> DMA.CH3.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH1_gc; //Triggered from TCC0 when it hits PER - c94: 92 e0 ldi r25, 0x02 ; 2 - c96: 90 93 43 01 sts 0x0143, r25 ; 0x800143 <__TEXT_REGION_LENGTH__+0x700143> + cb2: 92 e0 ldi r25, 0x02 ; 2 + cb4: 90 93 43 01 sts 0x0143, r25 ; 0x800143 <__TEXT_REGION_LENGTH__+0x700143> DMA.CH3.TRFCNT = auxDacBufLen; - c9a: 20 91 02 20 lds r18, 0x2002 ; 0x802002 - c9e: 30 91 03 20 lds r19, 0x2003 ; 0x802003 - ca2: 20 93 44 01 sts 0x0144, r18 ; 0x800144 <__TEXT_REGION_LENGTH__+0x700144> - ca6: 30 93 45 01 sts 0x0145, r19 ; 0x800145 <__TEXT_REGION_LENGTH__+0x700145> + cb8: 20 91 02 20 lds r18, 0x2002 ; 0x802002 + cbc: 30 91 03 20 lds r19, 0x2003 ; 0x802003 + cc0: 20 93 44 01 sts 0x0144, r18 ; 0x800144 <__TEXT_REGION_LENGTH__+0x700144> + cc4: 30 93 45 01 sts 0x0145, r19 ; 0x800145 <__TEXT_REGION_LENGTH__+0x700145> DMA.CH3.SRCADDR0 = (( (uint16_t) &dacBuf_CH2[0]) >> 0) & 0xFF; //Source address is dacbuf - caa: 26 e6 ldi r18, 0x66 ; 102 - cac: 34 e2 ldi r19, 0x24 ; 36 - cae: 20 93 48 01 sts 0x0148, r18 ; 0x800148 <__TEXT_REGION_LENGTH__+0x700148> + cc8: 2a e6 ldi r18, 0x6A ; 106 + cca: 34 e2 ldi r19, 0x24 ; 36 + ccc: 20 93 48 01 sts 0x0148, r18 ; 0x800148 <__TEXT_REGION_LENGTH__+0x700148> DMA.CH3.SRCADDR1 = (( (uint16_t) &dacBuf_CH2[0]) >> 8) & 0xFF; - cb2: 30 93 49 01 sts 0x0149, r19 ; 0x800149 <__TEXT_REGION_LENGTH__+0x700149> + cd0: 30 93 49 01 sts 0x0149, r19 ; 0x800149 <__TEXT_REGION_LENGTH__+0x700149> DMA.CH3.SRCADDR2 = 0x00; - cb6: 10 92 4a 01 sts 0x014A, r1 ; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a> + cd4: 10 92 4a 01 sts 0x014A, r1 ; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a> DMA.CH3.DESTADDR0 = (( (uint16_t) &DACB.CH1DATAH) >> 0) & 0xFF; //Dest address is high byte of DAC register - cba: 9b e3 ldi r25, 0x3B ; 59 - cbc: 90 93 4c 01 sts 0x014C, r25 ; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c> + cd8: 9b e3 ldi r25, 0x3B ; 59 + cda: 90 93 4c 01 sts 0x014C, r25 ; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c> DMA.CH3.DESTADDR1 = (( (uint16_t) &DACB.CH1DATAH) >> 8) & 0xFF; - cc0: 80 93 4d 01 sts 0x014D, r24 ; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d> + cde: 80 93 4d 01 sts 0x014D, r24 ; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d> DMA.CH3.DESTADDR2 = 0x00; - cc4: 10 92 4e 01 sts 0x014E, r1 ; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e> + ce2: 10 92 4e 01 sts 0x014E, r1 ; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e> //Must enable last for REPCNT won't work! DMA.CH3.CTRLA |= DMA_CH_ENABLE_bm; //Enable! - cc8: 80 81 ld r24, Z - cca: 80 68 ori r24, 0x80 ; 128 - ccc: 80 83 st Z, r24 - cce: 08 95 ret + ce6: 80 81 ld r24, Z + ce8: 80 68 ori r24, 0x80 ; 128 + cea: 80 83 st Z, r24 + cec: 08 95 ret -00000cd0 : +00000cee : } void tiny_dma_loop_mode_7(void){ DMA.CH0.CTRLA = 0x00; - cd0: e0 e0 ldi r30, 0x00 ; 0 - cd2: f1 e0 ldi r31, 0x01 ; 1 - cd4: 10 8a std Z+16, r1 ; 0x10 + cee: e0 e0 ldi r30, 0x00 ; 0 + cf0: f1 e0 ldi r31, 0x01 ; 1 + cf2: 10 8a std Z+16, r1 ; 0x10 DMA.CH0.CTRLA = DMA_CH_RESET_bm; - cd6: 80 e4 ldi r24, 0x40 ; 64 - cd8: 80 8b std Z+16, r24 ; 0x10 + cf4: 80 e4 ldi r24, 0x40 ; 64 + cf6: 80 8b std Z+16, r24 ; 0x10 DMA.CH0.CTRLA = DMA_CH_BURSTLEN_2BYTE_gc | DMA_CH_SINGLE_bm; //Do not repeat! - cda: 85 e0 ldi r24, 0x05 ; 5 - cdc: 80 8b std Z+16, r24 ; 0x10 + cf8: 85 e0 ldi r24, 0x05 ; 5 + cfa: 80 8b std Z+16, r24 ; 0x10 DMA.CH0.CTRLB = 0x00; //No interrupt! - cde: 11 8a std Z+17, r1 ; 0x11 + cfc: 11 8a std Z+17, r1 ; 0x11 DMA.CH0.ADDRCTRL = DMA_CH_SRCRELOAD_BURST_gc | DMA_CH_SRCDIR_INC_gc | DMA_CH_DESTDIR_INC_gc; //Source reloads after each burst, with byte incrementing. Dest does not reload, but does increment address. - ce0: 81 e9 ldi r24, 0x91 ; 145 - ce2: 82 8b std Z+18, r24 ; 0x12 + cfe: 81 e9 ldi r24, 0x91 ; 145 + d00: 82 8b std Z+18, r24 ; 0x12 DMA.CH0.TRIGSRC = DMA_CH_TRIGSRC_ADCA_CH0_gc; //Triggered from ADCA channel 0 - ce4: 80 e1 ldi r24, 0x10 ; 16 - ce6: 83 8b std Z+19, r24 ; 0x13 + d02: 80 e1 ldi r24, 0x10 ; 16 + d04: 83 8b std Z+19, r24 ; 0x13 DMA.CH0.TRFCNT = PACKET_SIZE; - ce8: 2e ee ldi r18, 0xEE ; 238 - cea: 32 e0 ldi r19, 0x02 ; 2 - cec: 24 8b std Z+20, r18 ; 0x14 - cee: 35 8b std Z+21, r19 ; 0x15 + d06: 2e ee ldi r18, 0xEE ; 238 + d08: 32 e0 ldi r19, 0x02 ; 2 + d0a: 24 8b std Z+20, r18 ; 0x14 + d0c: 35 8b std Z+21, r19 ; 0x15 DMA.CH0.SRCADDR0 = (( (uint16_t) &ADCA.CH0.RESL) >> 0) & 0xFF; //Source address is ADC - cf0: 84 e2 ldi r24, 0x24 ; 36 - cf2: 80 8f std Z+24, r24 ; 0x18 + d0e: 84 e2 ldi r24, 0x24 ; 36 + d10: 80 8f std Z+24, r24 ; 0x18 DMA.CH0.SRCADDR1 = (( (uint16_t) &ADCA.CH0.RESL) >> 8) & 0xFF; - cf4: 82 e0 ldi r24, 0x02 ; 2 - cf6: 81 8f std Z+25, r24 ; 0x19 + d12: 82 e0 ldi r24, 0x02 ; 2 + d14: 81 8f std Z+25, r24 ; 0x19 DMA.CH0.SRCADDR2 = 0x00; - cf8: 12 8e std Z+26, r1 ; 0x1a + d16: 12 8e std Z+26, r1 ; 0x1a DMA.CH0.DESTADDR0 = (( (uint16_t) &isoBuf[b1_state * PACKET_SIZE]) >> 0) & 0xFF; //Dest address is isoBuf - cfa: 40 91 b4 20 lds r20, 0x20B4 ; 0x8020b4 - cfe: 42 9f mul r20, r18 - d00: c0 01 movw r24, r0 - d02: 43 9f mul r20, r19 - d04: 90 0d add r25, r0 - d06: 11 24 eor r1, r1 - d08: 8a 59 subi r24, 0x9A ; 154 - d0a: 99 4d sbci r25, 0xD9 ; 217 - d0c: 84 8f std Z+28, r24 ; 0x1c + d18: 40 91 b4 20 lds r20, 0x20B4 ; 0x8020b4 + d1c: 42 9f mul r20, r18 + d1e: c0 01 movw r24, r0 + d20: 43 9f mul r20, r19 + d22: 90 0d add r25, r0 + d24: 11 24 eor r1, r1 + d26: 86 59 subi r24, 0x96 ; 150 + d28: 99 4d sbci r25, 0xD9 ; 217 + d2a: 84 8f std Z+28, r24 ; 0x1c DMA.CH0.DESTADDR1 = (( (uint16_t) &isoBuf[b1_state * PACKET_SIZE]) >> 8) & 0xFF; - d0e: 40 91 b4 20 lds r20, 0x20B4 ; 0x8020b4 - d12: 42 9f mul r20, r18 - d14: c0 01 movw r24, r0 - d16: 43 9f mul r20, r19 - d18: 90 0d add r25, r0 - d1a: 11 24 eor r1, r1 - d1c: 8a 59 subi r24, 0x9A ; 154 - d1e: 99 4d sbci r25, 0xD9 ; 217 - d20: 95 8f std Z+29, r25 ; 0x1d + d2c: 40 91 b4 20 lds r20, 0x20B4 ; 0x8020b4 + d30: 42 9f mul r20, r18 + d32: c0 01 movw r24, r0 + d34: 43 9f mul r20, r19 + d36: 90 0d add r25, r0 + d38: 11 24 eor r1, r1 + d3a: 86 59 subi r24, 0x96 ; 150 + d3c: 99 4d sbci r25, 0xD9 ; 217 + d3e: 95 8f std Z+29, r25 ; 0x1d DMA.CH0.DESTADDR2 = 0x00; - d22: 16 8e std Z+30, r1 ; 0x1e + d40: 16 8e std Z+30, r1 ; 0x1e //Must enable last for REPCNT won't work! DMA.CH0.CTRLA |= DMA_CH_ENABLE_bm; //Enable! - d24: 80 89 ldd r24, Z+16 ; 0x10 - d26: 80 68 ori r24, 0x80 ; 128 - d28: 80 8b std Z+16, r24 ; 0x10 - d2a: 08 95 ret + d42: 80 89 ldd r24, Z+16 ; 0x10 + d44: 80 68 ori r24, 0x80 ; 128 + d46: 80 8b std Z+16, r24 ; 0x10 + d48: 08 95 ret -00000d2c : +00000d4a : #define PSU_PER 3000 #define jump 6 void tiny_timer_setup(void){ //Turn everything on! PR.PRPC &= 0b11111100; //Enable TCC0, TCC1 - d2c: e0 e7 ldi r30, 0x70 ; 112 - d2e: f0 e0 ldi r31, 0x00 ; 0 - d30: 83 81 ldd r24, Z+3 ; 0x03 - d32: 8c 7f andi r24, 0xFC ; 252 - d34: 83 83 std Z+3, r24 ; 0x03 + d4a: e0 e7 ldi r30, 0x70 ; 112 + d4c: f0 e0 ldi r31, 0x00 ; 0 + d4e: 83 81 ldd r24, Z+3 ; 0x03 + d50: 8c 7f andi r24, 0xFC ; 252 + d52: 83 83 std Z+3, r24 ; 0x03 PR.PRPD &= 0b11111100; //Enable TCD0, TCD1 - d36: 84 81 ldd r24, Z+4 ; 0x04 - d38: 8c 7f andi r24, 0xFC ; 252 - d3a: 84 83 std Z+4, r24 ; 0x04 + d54: 84 81 ldd r24, Z+4 ; 0x04 + d56: 8c 7f andi r24, 0xFC ; 252 + d58: 84 83 std Z+4, r24 ; 0x04 PR.PRGEN &= 0b11111101; //Enable EVSYS - d3c: 80 81 ld r24, Z - d3e: 8d 7f andi r24, 0xFD ; 253 - d40: 80 83 st Z, r24 + d5a: 80 81 ld r24, Z + d5c: 8d 7f andi r24, 0xFD ; 253 + d5e: 80 83 st Z, r24 //Set up EVSYS EVSYS.CH2MUX = TCDAC_OVF; - d42: e0 e8 ldi r30, 0x80 ; 128 - d44: f1 e0 ldi r31, 0x01 ; 1 - d46: 80 ec ldi r24, 0xC0 ; 192 - d48: 82 83 std Z+2, r24 ; 0x02 + d60: e0 e8 ldi r30, 0x80 ; 128 + d62: f1 e0 ldi r31, 0x01 ; 1 + d64: 80 ec ldi r24, 0xC0 ; 192 + d66: 82 83 std Z+2, r24 ; 0x02 EVSYS.CH2CTRL = 0x00; //No filtering or Quadrature stuff - d4a: 12 86 std Z+10, r1 ; 0x0a + d68: 12 86 std Z+10, r1 ; 0x0a EVSYS.CH1MUX = TCDAC_AUX_OVF; - d4c: 88 ec ldi r24, 0xC8 ; 200 - d4e: 81 83 std Z+1, r24 ; 0x01 + d6a: 88 ec ldi r24, 0xC8 ; 200 + d6c: 81 83 std Z+1, r24 ; 0x01 EVSYS.CH1CTRL = 0x00; //No filtering or Quadrature stuff - d50: 11 86 std Z+9, r1 ; 0x09 + d6e: 11 86 std Z+9, r1 ; 0x09 //Waveform (50Hz sin wave) TC_DAC.CTRLA = 0x04; //Some clk setting - not 100% sure since it was SW generated - d52: e0 e0 ldi r30, 0x00 ; 0 - d54: f8 e0 ldi r31, 0x08 ; 8 - d56: 34 e0 ldi r19, 0x04 ; 4 - d58: 30 83 st Z, r19 + d70: e0 e0 ldi r30, 0x00 ; 0 + d72: f8 e0 ldi r31, 0x08 ; 8 + d74: 34 e0 ldi r19, 0x04 ; 4 + d76: 30 83 st Z, r19 TC_DAC.CTRLB = TC_WGMODE_SINGLESLOPE_gc; //No enable is set - d5a: 23 e0 ldi r18, 0x03 ; 3 - d5c: 21 83 std Z+1, r18 ; 0x01 + d78: 23 e0 ldi r18, 0x03 ; 3 + d7a: 21 83 std Z+1, r18 ; 0x01 TC_DAC.CTRLE = TC_BYTEM_NORMAL_gc; - d5e: 14 82 std Z+4, r1 ; 0x04 + d7c: 14 82 std Z+4, r1 ; 0x04 TC_DAC.PER = 469; - d60: 85 ed ldi r24, 0xD5 ; 213 - d62: 91 e0 ldi r25, 0x01 ; 1 - d64: 86 a3 std Z+38, r24 ; 0x26 - d66: 97 a3 std Z+39, r25 ; 0x27 + d7e: 85 ed ldi r24, 0xD5 ; 213 + d80: 91 e0 ldi r25, 0x01 ; 1 + d82: 86 a3 std Z+38, r24 ; 0x26 + d84: 97 a3 std Z+39, r25 ; 0x27 TC_DAC.INTCTRLA = 0x00; - d68: 16 82 std Z+6, r1 ; 0x06 + d86: 16 82 std Z+6, r1 ; 0x06 //Aux channel (blank 50Hz) TC_AUXDAC.CTRLA = 0x04; //Some clk setting - not 100% sure since it was SW generated - d6a: e0 e4 ldi r30, 0x40 ; 64 - d6c: f8 e0 ldi r31, 0x08 ; 8 - d6e: 30 83 st Z, r19 + d88: e0 e4 ldi r30, 0x40 ; 64 + d8a: f8 e0 ldi r31, 0x08 ; 8 + d8c: 30 83 st Z, r19 TC_AUXDAC.CTRLB = TC_WGMODE_SINGLESLOPE_gc; //No enable is set - d70: 21 83 std Z+1, r18 ; 0x01 + d8e: 21 83 std Z+1, r18 ; 0x01 TC_AUXDAC.CTRLE = TC_BYTEM_NORMAL_gc; - d72: 14 82 std Z+4, r1 ; 0x04 + d90: 14 82 std Z+4, r1 ; 0x04 TC_AUXDAC.PER = 469; - d74: 86 a3 std Z+38, r24 ; 0x26 - d76: 97 a3 std Z+39, r25 ; 0x27 + d92: 86 a3 std Z+38, r24 ; 0x26 + d94: 97 a3 std Z+39, r25 ; 0x27 TC_AUXDAC.INTCTRLA = 0x00; - d78: 16 82 std Z+6, r1 ; 0x06 + d96: 16 82 std Z+6, r1 ; 0x06 //PSU PORTD.DIR |= 0b00010000; - d7a: e0 e6 ldi r30, 0x60 ; 96 - d7c: f6 e0 ldi r31, 0x06 ; 6 - d7e: 80 81 ld r24, Z - d80: 80 61 ori r24, 0x10 ; 16 - d82: 80 83 st Z, r24 + d98: e0 e6 ldi r30, 0x60 ; 96 + d9a: f6 e0 ldi r31, 0x06 ; 6 + d9c: 80 81 ld r24, Z + d9e: 80 61 ori r24, 0x10 ; 16 + da0: 80 83 st Z, r24 TC_PSU.CTRLB = 0x10 | TC_WGMODE_SINGLESLOPE_gc; //CCAEN is set - d84: e0 e4 ldi r30, 0x40 ; 64 - d86: f9 e0 ldi r31, 0x09 ; 9 - d88: 83 e1 ldi r24, 0x13 ; 19 - d8a: 81 83 std Z+1, r24 ; 0x01 + da2: e0 e4 ldi r30, 0x40 ; 64 + da4: f9 e0 ldi r31, 0x09 ; 9 + da6: 83 e1 ldi r24, 0x13 ; 19 + da8: 81 83 std Z+1, r24 ; 0x01 TC_PSU.CTRLE = TC_BYTEM_NORMAL_gc; - d8c: 14 82 std Z+4, r1 ; 0x04 + daa: 14 82 std Z+4, r1 ; 0x04 TC_PSU.INTCTRLA = TC_OVFINTLVL_LO_gc; - d8e: 81 e0 ldi r24, 0x01 ; 1 - d90: 86 83 std Z+6, r24 ; 0x06 + dac: 81 e0 ldi r24, 0x01 ; 1 + dae: 86 83 std Z+6, r24 ; 0x06 TC_PSU.PER = PSU_PER; // Max value of CNT - d92: 28 eb ldi r18, 0xB8 ; 184 - d94: 3b e0 ldi r19, 0x0B ; 11 - d96: 26 a3 std Z+38, r18 ; 0x26 - d98: 37 a3 std Z+39, r19 ; 0x27 + db0: 28 eb ldi r18, 0xB8 ; 184 + db2: 3b e0 ldi r19, 0x0B ; 11 + db4: 26 a3 std Z+38, r18 ; 0x26 + db6: 37 a3 std Z+39, r19 ; 0x27 TC_PSU.CCA = 0; //Initial Duty cycle of 0% - d9a: 10 a6 std Z+40, r1 ; 0x28 - d9c: 11 a6 std Z+41, r1 ; 0x29 + db8: 10 a6 std Z+40, r1 ; 0x28 + dba: 11 a6 std Z+41, r1 ; 0x29 TC_PSU.CTRLA = TC_CLKSEL_DIV1_gc; - d9e: 80 83 st Z, r24 - da0: 08 95 ret + dbc: 80 83 st Z, r24 + dbe: 08 95 ret -00000da2 <__vector_83>: +00000dc0 <__vector_83>: TCC1.PER = 1800; // Max value of CNT TCC1.CTRLA = TC_CLKSEL_DIV1_gc; */ } ISR(TC_PSU_OVF){ - da2: 1f 92 push r1 - da4: 0f 92 push r0 - da6: 0f b6 in r0, 0x3f ; 63 - da8: 0f 92 push r0 - daa: 11 24 eor r1, r1 - dac: 2f 93 push r18 - dae: 3f 93 push r19 - db0: 4f 93 push r20 - db2: 5f 93 push r21 - db4: 8f 93 push r24 - db6: 9f 93 push r25 - db8: ef 93 push r30 - dba: ff 93 push r31 - dbc: cf 93 push r28 - dbe: df 93 push r29 dc0: 1f 92 push r1 - dc2: cd b7 in r28, 0x3d ; 61 - dc4: de b7 in r29, 0x3e ; 62 + dc2: 0f 92 push r0 + dc4: 0f b6 in r0, 0x3f ; 63 + dc6: 0f 92 push r0 + dc8: 11 24 eor r1, r1 + dca: 2f 93 push r18 + dcc: 3f 93 push r19 + dce: 4f 93 push r20 + dd0: 5f 93 push r21 + dd2: 8f 93 push r24 + dd4: 9f 93 push r25 + dd6: ef 93 push r30 + dd8: ff 93 push r31 + dda: cf 93 push r28 + ddc: df 93 push r29 + dde: 1f 92 push r1 + de0: cd b7 in r28, 0x3d ; 61 + de2: de b7 in r29, 0x3e ; 62 char tempvar; char err; volatile char nothing; if (global_mode == 7){ - dc6: 80 91 00 20 lds r24, 0x2000 ; 0x802000 <__data_start> - dca: 87 30 cpi r24, 0x07 ; 7 - dcc: 31 f4 brne .+12 ; 0xdda <__vector_83+0x38> + de4: 80 91 00 20 lds r24, 0x2000 ; 0x802000 <__data_start> + de8: 87 30 cpi r24, 0x07 ; 7 + dea: 31 f4 brne .+12 ; 0xdf8 <__vector_83+0x38> nothing = ADCA.CH1.RESL; - dce: e0 e0 ldi r30, 0x00 ; 0 - dd0: f2 e0 ldi r31, 0x02 ; 2 - dd2: 84 a5 ldd r24, Z+44 ; 0x2c - dd4: 89 83 std Y+1, r24 ; 0x01 + dec: e0 e0 ldi r30, 0x00 ; 0 + dee: f2 e0 ldi r31, 0x02 ; 2 + df0: 84 a5 ldd r24, Z+44 ; 0x2c + df2: 89 83 std Y+1, r24 ; 0x01 tempvar = ADCA.CH1.RESH; - dd6: 95 a5 ldd r25, Z+45 ; 0x2d - dd8: 02 c0 rjmp .+4 ; 0xdde <__vector_83+0x3c> + df4: 95 a5 ldd r25, Z+45 ; 0x2d + df6: 02 c0 rjmp .+4 ; 0xdfc <__vector_83+0x3c> } else{ tempvar = ADCA.CH1.RESL; - dda: 90 91 2c 02 lds r25, 0x022C ; 0x80022c <__TEXT_REGION_LENGTH__+0x70022c> + df8: 90 91 2c 02 lds r25, 0x022C ; 0x80022c <__TEXT_REGION_LENGTH__+0x70022c> } //tempvar = (global_mode == 7 ? (char) ADCA.CH1.RESH : (char) ADCA.CH1.RESL); //test_byte = tempvar; err = (char) (PSU_target - tempvar); - dde: 80 91 b2 20 lds r24, 0x20B2 ; 0x8020b2 <__data_end> - de2: 89 1b sub r24, r25 + dfc: 80 91 b2 20 lds r24, 0x20B2 ; 0x8020b2 <__data_end> + e00: 89 1b sub r24, r25 if ((err > 1) & ((unsigned short) TC_PSU.CCA < PSU_PER - jump) ){ - de4: 20 91 68 09 lds r18, 0x0968 ; 0x800968 <__TEXT_REGION_LENGTH__+0x700968> - de8: 30 91 69 09 lds r19, 0x0969 ; 0x800969 <__TEXT_REGION_LENGTH__+0x700969> - dec: 91 e0 ldi r25, 0x01 ; 1 - dee: 82 30 cpi r24, 0x02 ; 2 - df0: 0c f4 brge .+2 ; 0xdf4 <__vector_83+0x52> - df2: 90 e0 ldi r25, 0x00 ; 0 - df4: 99 23 and r25, r25 - df6: c9 f0 breq .+50 ; 0xe2a <__vector_83+0x88> - df8: 91 e0 ldi r25, 0x01 ; 1 - dfa: 22 3b cpi r18, 0xB2 ; 178 - dfc: 3b 40 sbci r19, 0x0B ; 11 - dfe: 08 f0 brcs .+2 ; 0xe02 <__vector_83+0x60> - e00: 90 e0 ldi r25, 0x00 ; 0 - e02: 99 23 and r25, r25 - e04: 91 f0 breq .+36 ; 0xe2a <__vector_83+0x88> + e02: 20 91 68 09 lds r18, 0x0968 ; 0x800968 <__TEXT_REGION_LENGTH__+0x700968> + e06: 30 91 69 09 lds r19, 0x0969 ; 0x800969 <__TEXT_REGION_LENGTH__+0x700969> + e0a: 91 e0 ldi r25, 0x01 ; 1 + e0c: 82 30 cpi r24, 0x02 ; 2 + e0e: 0c f4 brge .+2 ; 0xe12 <__vector_83+0x52> + e10: 90 e0 ldi r25, 0x00 ; 0 + e12: 99 23 and r25, r25 + e14: c9 f0 breq .+50 ; 0xe48 <__vector_83+0x88> + e16: 91 e0 ldi r25, 0x01 ; 1 + e18: 22 3b cpi r18, 0xB2 ; 178 + e1a: 3b 40 sbci r19, 0x0B ; 11 + e1c: 08 f0 brcs .+2 ; 0xe20 <__vector_83+0x60> + e1e: 90 e0 ldi r25, 0x00 ; 0 + e20: 99 23 and r25, r25 + e22: 91 f0 breq .+36 ; 0xe48 <__vector_83+0x88> TC_PSU.CCABUF = TC_PSU.CCA + ((err > 8) ? jump : 1); - e06: 20 91 68 09 lds r18, 0x0968 ; 0x800968 <__TEXT_REGION_LENGTH__+0x700968> - e0a: 30 91 69 09 lds r19, 0x0969 ; 0x800969 <__TEXT_REGION_LENGTH__+0x700969> - e0e: 89 30 cpi r24, 0x09 ; 9 - e10: 1c f4 brge .+6 ; 0xe18 <__vector_83+0x76> - e12: 81 e0 ldi r24, 0x01 ; 1 - e14: 90 e0 ldi r25, 0x00 ; 0 - e16: 02 c0 rjmp .+4 ; 0xe1c <__vector_83+0x7a> - e18: 86 e0 ldi r24, 0x06 ; 6 - e1a: 90 e0 ldi r25, 0x00 ; 0 - e1c: 82 0f add r24, r18 - e1e: 93 1f adc r25, r19 - e20: 80 93 78 09 sts 0x0978, r24 ; 0x800978 <__TEXT_REGION_LENGTH__+0x700978> - e24: 90 93 79 09 sts 0x0979, r25 ; 0x800979 <__TEXT_REGION_LENGTH__+0x700979> - e28: 23 c0 rjmp .+70 ; 0xe70 <__vector_83+0xce> + e24: 20 91 68 09 lds r18, 0x0968 ; 0x800968 <__TEXT_REGION_LENGTH__+0x700968> + e28: 30 91 69 09 lds r19, 0x0969 ; 0x800969 <__TEXT_REGION_LENGTH__+0x700969> + e2c: 89 30 cpi r24, 0x09 ; 9 + e2e: 1c f4 brge .+6 ; 0xe36 <__vector_83+0x76> + e30: 81 e0 ldi r24, 0x01 ; 1 + e32: 90 e0 ldi r25, 0x00 ; 0 + e34: 02 c0 rjmp .+4 ; 0xe3a <__vector_83+0x7a> + e36: 86 e0 ldi r24, 0x06 ; 6 + e38: 90 e0 ldi r25, 0x00 ; 0 + e3a: 82 0f add r24, r18 + e3c: 93 1f adc r25, r19 + e3e: 80 93 78 09 sts 0x0978, r24 ; 0x800978 <__TEXT_REGION_LENGTH__+0x700978> + e42: 90 93 79 09 sts 0x0979, r25 ; 0x800979 <__TEXT_REGION_LENGTH__+0x700979> + e46: 23 c0 rjmp .+70 ; 0xe8e <__vector_83+0xce> } else if ((err < -1) & ((unsigned short) TC_PSU.CCA > jump)){ - e2a: 20 91 68 09 lds r18, 0x0968 ; 0x800968 <__TEXT_REGION_LENGTH__+0x700968> - e2e: 30 91 69 09 lds r19, 0x0969 ; 0x800969 <__TEXT_REGION_LENGTH__+0x700969> - e32: 91 e0 ldi r25, 0x01 ; 1 - e34: 8f 3f cpi r24, 0xFF ; 255 - e36: 0c f0 brlt .+2 ; 0xe3a <__vector_83+0x98> - e38: 90 e0 ldi r25, 0x00 ; 0 - e3a: 99 23 and r25, r25 - e3c: c9 f0 breq .+50 ; 0xe70 <__vector_83+0xce> - e3e: 91 e0 ldi r25, 0x01 ; 1 - e40: 27 30 cpi r18, 0x07 ; 7 - e42: 31 05 cpc r19, r1 - e44: 08 f4 brcc .+2 ; 0xe48 <__vector_83+0xa6> - e46: 90 e0 ldi r25, 0x00 ; 0 - e48: 99 23 and r25, r25 - e4a: 91 f0 breq .+36 ; 0xe70 <__vector_83+0xce> + e48: 20 91 68 09 lds r18, 0x0968 ; 0x800968 <__TEXT_REGION_LENGTH__+0x700968> + e4c: 30 91 69 09 lds r19, 0x0969 ; 0x800969 <__TEXT_REGION_LENGTH__+0x700969> + e50: 91 e0 ldi r25, 0x01 ; 1 + e52: 8f 3f cpi r24, 0xFF ; 255 + e54: 0c f0 brlt .+2 ; 0xe58 <__vector_83+0x98> + e56: 90 e0 ldi r25, 0x00 ; 0 + e58: 99 23 and r25, r25 + e5a: c9 f0 breq .+50 ; 0xe8e <__vector_83+0xce> + e5c: 91 e0 ldi r25, 0x01 ; 1 + e5e: 27 30 cpi r18, 0x07 ; 7 + e60: 31 05 cpc r19, r1 + e62: 08 f4 brcc .+2 ; 0xe66 <__vector_83+0xa6> + e64: 90 e0 ldi r25, 0x00 ; 0 + e66: 99 23 and r25, r25 + e68: 91 f0 breq .+36 ; 0xe8e <__vector_83+0xce> TC_PSU.CCABUF = TC_PSU.CCA - ((err < -8) ? jump : 1); - e4c: 20 91 68 09 lds r18, 0x0968 ; 0x800968 <__TEXT_REGION_LENGTH__+0x700968> - e50: 30 91 69 09 lds r19, 0x0969 ; 0x800969 <__TEXT_REGION_LENGTH__+0x700969> - e54: 88 3f cpi r24, 0xF8 ; 248 - e56: 1c f0 brlt .+6 ; 0xe5e <__vector_83+0xbc> - e58: 81 e0 ldi r24, 0x01 ; 1 - e5a: 90 e0 ldi r25, 0x00 ; 0 - e5c: 02 c0 rjmp .+4 ; 0xe62 <__vector_83+0xc0> - e5e: 86 e0 ldi r24, 0x06 ; 6 - e60: 90 e0 ldi r25, 0x00 ; 0 - e62: a9 01 movw r20, r18 - e64: 48 1b sub r20, r24 - e66: 59 0b sbc r21, r25 - e68: 40 93 78 09 sts 0x0978, r20 ; 0x800978 <__TEXT_REGION_LENGTH__+0x700978> - e6c: 50 93 79 09 sts 0x0979, r21 ; 0x800979 <__TEXT_REGION_LENGTH__+0x700979> + e6a: 20 91 68 09 lds r18, 0x0968 ; 0x800968 <__TEXT_REGION_LENGTH__+0x700968> + e6e: 30 91 69 09 lds r19, 0x0969 ; 0x800969 <__TEXT_REGION_LENGTH__+0x700969> + e72: 88 3f cpi r24, 0xF8 ; 248 + e74: 1c f0 brlt .+6 ; 0xe7c <__vector_83+0xbc> + e76: 81 e0 ldi r24, 0x01 ; 1 + e78: 90 e0 ldi r25, 0x00 ; 0 + e7a: 02 c0 rjmp .+4 ; 0xe80 <__vector_83+0xc0> + e7c: 86 e0 ldi r24, 0x06 ; 6 + e7e: 90 e0 ldi r25, 0x00 ; 0 + e80: a9 01 movw r20, r18 + e82: 48 1b sub r20, r24 + e84: 59 0b sbc r21, r25 + e86: 40 93 78 09 sts 0x0978, r20 ; 0x800978 <__TEXT_REGION_LENGTH__+0x700978> + e8a: 50 93 79 09 sts 0x0979, r21 ; 0x800979 <__TEXT_REGION_LENGTH__+0x700979> } - e70: 0f 90 pop r0 - e72: df 91 pop r29 - e74: cf 91 pop r28 - e76: ff 91 pop r31 - e78: ef 91 pop r30 - e7a: 9f 91 pop r25 - e7c: 8f 91 pop r24 - e7e: 5f 91 pop r21 - e80: 4f 91 pop r20 - e82: 3f 91 pop r19 - e84: 2f 91 pop r18 - e86: 0f 90 pop r0 - e88: 0f be out 0x3f, r0 ; 63 - e8a: 0f 90 pop r0 - e8c: 1f 90 pop r1 - e8e: 18 95 reti + e8e: 0f 90 pop r0 + e90: df 91 pop r29 + e92: cf 91 pop r28 + e94: ff 91 pop r31 + e96: ef 91 pop r30 + e98: 9f 91 pop r25 + e9a: 8f 91 pop r24 + e9c: 5f 91 pop r21 + e9e: 4f 91 pop r20 + ea0: 3f 91 pop r19 + ea2: 2f 91 pop r18 + ea4: 0f 90 pop r0 + ea6: 0f be out 0x3f, r0 ; 63 + ea8: 0f 90 pop r0 + eaa: 1f 90 pop r1 + eac: 18 95 reti -00000e90 : +00000eae : #include "tiny_uart.h" #include "globals.h" void tiny_uart_setup(void){ PR.PRPC &= 0b11101111; - e90: e0 e7 ldi r30, 0x70 ; 112 - e92: f0 e0 ldi r31, 0x00 ; 0 - e94: 83 81 ldd r24, Z+3 ; 0x03 - e96: 8f 7e andi r24, 0xEF ; 239 - e98: 83 83 std Z+3, r24 ; 0x03 + eae: e0 e7 ldi r30, 0x70 ; 112 + eb0: f0 e0 ldi r31, 0x00 ; 0 + eb2: 83 81 ldd r24, Z+3 ; 0x03 + eb4: 8f 7e andi r24, 0xEF ; 239 + eb6: 83 83 std Z+3, r24 ; 0x03 //PR.PRPE &= 0b11111110; ??? PORTC.DIR |= 0b01001010; - e9a: e0 e4 ldi r30, 0x40 ; 64 - e9c: f6 e0 ldi r31, 0x06 ; 6 - e9e: 80 81 ld r24, Z - ea0: 8a 64 ori r24, 0x4A ; 74 - ea2: 80 83 st Z, r24 + eb8: e0 e4 ldi r30, 0x40 ; 64 + eba: f6 e0 ldi r31, 0x06 ; 6 + ebc: 80 81 ld r24, Z + ebe: 8a 64 ori r24, 0x4A ; 74 + ec0: 80 83 st Z, r24 PORTC.OUT = 0xff; - ea4: 8f ef ldi r24, 0xFF ; 255 - ea6: 84 83 std Z+4, r24 ; 0x04 + ec2: 8f ef ldi r24, 0xFF ; 255 + ec4: 84 83 std Z+4, r24 ; 0x04 PORTC.PIN2CTRL = PORT_INVEN_bm | PORT_OPC_PULLUP_gc; - ea8: 88 e5 ldi r24, 0x58 ; 88 - eaa: 82 8b std Z+18, r24 ; 0x12 + ec6: 88 e5 ldi r24, 0x58 ; 88 + ec8: 82 8b std Z+18, r24 ; 0x12 //PORTC.REMAP = 0x10; //Remap USART to [7:4] #ifndef VERO PORTC.REMAP = 0x20; //Swap MOSI and SCK - for small boards only!!! - eac: 80 e2 ldi r24, 0x20 ; 32 - eae: 86 87 std Z+14, r24 ; 0x0e + eca: 80 e2 ldi r24, 0x20 ; 32 + ecc: 86 87 std Z+14, r24 ; 0x0e #endif USARTC0.CTRLC = USART_CMODE_MSPI_gc | 0b00000100; //LSB received first, UPCHA disabled - eb0: e0 ea ldi r30, 0xA0 ; 160 - eb2: f8 e0 ldi r31, 0x08 ; 8 - eb4: 84 ec ldi r24, 0xC4 ; 196 - eb6: 85 83 std Z+5, r24 ; 0x05 + ece: e0 ea ldi r30, 0xA0 ; 160 + ed0: f8 e0 ldi r31, 0x08 ; 8 + ed2: 84 ec ldi r24, 0xC4 ; 196 + ed4: 85 83 std Z+5, r24 ; 0x05 USARTC0.BAUDCTRLA = 3; //BSEL = fper/(2fbaud) -1; 24/(2*3) - 1 = 3 - eb8: 83 e0 ldi r24, 0x03 ; 3 - eba: 86 83 std Z+6, r24 ; 0x06 + ed6: 83 e0 ldi r24, 0x03 ; 3 + ed8: 86 83 std Z+6, r24 ; 0x06 USARTC0.BAUDCTRLB = 0x00;//USART_BSCALE0_bm; - ebc: 17 82 std Z+7, r1 ; 0x07 + eda: 17 82 std Z+7, r1 ; 0x07 USARTC0.CTRLB = USART_RXEN_bm | USART_TXEN_bm; - ebe: 88 e1 ldi r24, 0x18 ; 24 - ec0: 84 83 std Z+4, r24 ; 0x04 - ec2: 08 95 ret + edc: 88 e1 ldi r24, 0x18 ; 24 + ede: 84 83 std Z+4, r24 ; 0x04 + ee0: 08 95 ret -00000ec4 : +00000ee2 : } void tiny_spi_setup(void){ //Power Reduction disable PR.PRPC &= 0b11110111; - ec4: e0 e7 ldi r30, 0x70 ; 112 - ec6: f0 e0 ldi r31, 0x00 ; 0 - ec8: 83 81 ldd r24, Z+3 ; 0x03 - eca: 87 7f andi r24, 0xF7 ; 247 - ecc: 83 83 std Z+3, r24 ; 0x03 + ee2: e0 e7 ldi r30, 0x70 ; 112 + ee4: f0 e0 ldi r31, 0x00 ; 0 + ee6: 83 81 ldd r24, Z+3 ; 0x03 + ee8: 87 7f andi r24, 0xF7 ; 247 + eea: 83 83 std Z+3, r24 ; 0x03 //SPI enable SPIC.CTRL = SPI_ENABLE_bm; //Slave mode - ece: e0 ec ldi r30, 0xC0 ; 192 - ed0: f8 e0 ldi r31, 0x08 ; 8 - ed2: 80 e4 ldi r24, 0x40 ; 64 - ed4: 80 83 st Z, r24 + eec: e0 ec ldi r30, 0xC0 ; 192 + eee: f8 e0 ldi r31, 0x08 ; 8 + ef0: 80 e4 ldi r24, 0x40 ; 64 + ef2: 80 83 st Z, r24 SPIC.INTCTRL = SPI_INTLVL_HI_gc; - ed6: 83 e0 ldi r24, 0x03 ; 3 - ed8: 81 83 std Z+1, r24 ; 0x01 + ef4: 83 e0 ldi r24, 0x03 ; 3 + ef6: 81 83 std Z+1, r24 ; 0x01 #ifdef VERO PORTC.PIN5CTRL = PORT_INVEN_bm | PORT_OPC_PULLUP_gc; #else PORTC.PIN7CTRL = PORT_INVEN_bm | PORT_OPC_PULLUP_gc; //Pin5 if not swapped - eda: 88 e5 ldi r24, 0x58 ; 88 - edc: 80 93 57 06 sts 0x0657, r24 ; 0x800657 <__TEXT_REGION_LENGTH__+0x700657> - ee0: 08 95 ret + ef8: 88 e5 ldi r24, 0x58 ; 88 + efa: 80 93 57 06 sts 0x0657, r24 ; 0x800657 <__TEXT_REGION_LENGTH__+0x700657> + efe: 08 95 ret -00000ee2 <__vector_24>: +00000f00 <__vector_24>: #endif return; } ISR(SPIC_INT_vect){ - ee2: 1f 92 push r1 - ee4: 0f 92 push r0 - ee6: 0f b6 in r0, 0x3f ; 63 - ee8: 0f 92 push r0 - eea: 11 24 eor r1, r1 + f00: 1f 92 push r1 + f02: 0f 92 push r0 + f04: 0f b6 in r0, 0x3f ; 63 + f06: 0f 92 push r0 + f08: 11 24 eor r1, r1 asm("nop"); - eec: 00 00 nop + f0a: 00 00 nop } - eee: 0f 90 pop r0 - ef0: 0f be out 0x3f, r0 ; 63 - ef2: 0f 90 pop r0 - ef4: 1f 90 pop r1 - ef6: 18 95 reti + f0c: 0f 90 pop r0 + f0e: 0f be out 0x3f, r0 ; 63 + f10: 0f 90 pop r0 + f12: 1f 90 pop r1 + f14: 18 95 reti -00000ef8 : +00000f16 : } static inline void cpu_irq_restore(irqflags_t flags) { barrier(); SREG = flags; - ef8: 0f 93 push r16 - efa: 1f 93 push r17 - efc: cf 93 push r28 - efe: df 93 push r29 - f00: 00 d0 rcall .+0 ; 0xf02 - f02: 00 d0 rcall .+0 ; 0xf04 - f04: cd b7 in r28, 0x3d ; 61 - f06: de b7 in r29, 0x3e ; 62 - f08: 8f ef ldi r24, 0xFF ; 255 - f0a: 80 93 70 00 sts 0x0070, r24 ; 0x800070 <__TEXT_REGION_LENGTH__+0x700070> - f0e: 80 93 71 00 sts 0x0071, r24 ; 0x800071 <__TEXT_REGION_LENGTH__+0x700071> - f12: 80 93 72 00 sts 0x0072, r24 ; 0x800072 <__TEXT_REGION_LENGTH__+0x700072> - f16: 80 93 73 00 sts 0x0073, r24 ; 0x800073 <__TEXT_REGION_LENGTH__+0x700073> - f1a: 80 93 74 00 sts 0x0074, r24 ; 0x800074 <__TEXT_REGION_LENGTH__+0x700074> - f1e: 80 93 75 00 sts 0x0075, r24 ; 0x800075 <__TEXT_REGION_LENGTH__+0x700075> - f22: 80 93 76 00 sts 0x0076, r24 ; 0x800076 <__TEXT_REGION_LENGTH__+0x700076> - f26: 64 e0 ldi r22, 0x04 ; 4 - f28: 81 e4 ldi r24, 0x41 ; 65 - f2a: 90 e0 ldi r25, 0x00 ; 0 - f2c: a6 d5 rcall .+2892 ; 0x1a7a - f2e: 6c e1 ldi r22, 0x1C ; 28 - f30: 70 e0 ldi r23, 0x00 ; 0 - f32: 82 e0 ldi r24, 0x02 ; 2 - f34: a8 d5 rcall .+2896 ; 0x1a86 - f36: 8a 83 std Y+2, r24 ; 0x02 - f38: 6d e1 ldi r22, 0x1D ; 29 - f3a: 70 e0 ldi r23, 0x00 ; 0 - f3c: 82 e0 ldi r24, 0x02 ; 2 - f3e: a3 d5 rcall .+2886 ; 0x1a86 - f40: 89 83 std Y+1, r24 ; 0x01 - f42: 89 81 ldd r24, Y+1 ; 0x01 - f44: 9a 81 ldd r25, Y+2 ; 0x02 - f46: 01 96 adiw r24, 0x01 ; 1 - f48: 21 f4 brne .+8 ; 0xf52 - f4a: 80 e4 ldi r24, 0x40 ; 64 - f4c: 93 e2 ldi r25, 0x23 ; 35 - f4e: 89 83 std Y+1, r24 ; 0x01 - f50: 9a 83 std Y+2, r25 ; 0x02 - f52: 89 81 ldd r24, Y+1 ; 0x01 - f54: 9a 81 ldd r25, Y+2 ; 0x02 - f56: 8b 83 std Y+3, r24 ; 0x03 - f58: 9c 83 std Y+4, r25 ; 0x04 - f5a: e0 e6 ldi r30, 0x60 ; 96 - f5c: f0 e0 ldi r31, 0x00 ; 0 - f5e: 82 83 std Z+2, r24 ; 0x02 - f60: 8c 81 ldd r24, Y+4 ; 0x04 - f62: 83 83 std Z+3, r24 ; 0x03 - f64: 9f b7 in r25, 0x3f ; 63 - f66: f8 94 cli - f68: e0 e5 ldi r30, 0x50 ; 80 - f6a: f0 e0 ldi r31, 0x00 ; 0 - f6c: 80 81 ld r24, Z - f6e: 82 60 ori r24, 0x02 ; 2 - f70: 80 83 st Z, r24 - f72: 9f bf out 0x3f, r25 ; 63 - f74: 81 81 ldd r24, Z+1 ; 0x01 - f76: 81 ff sbrs r24, 1 - f78: fd cf rjmp .-6 ; 0xf74 - f7a: 9f b7 in r25, 0x3f ; 63 - f7c: f8 94 cli - f7e: 00 e5 ldi r16, 0x50 ; 80 - f80: 10 e0 ldi r17, 0x00 ; 0 - f82: d8 01 movw r26, r16 - f84: 16 96 adiw r26, 0x06 ; 6 - f86: 8c 91 ld r24, X - f88: 16 97 sbiw r26, 0x06 ; 6 - f8a: 89 7f andi r24, 0xF9 ; 249 - f8c: 16 96 adiw r26, 0x06 ; 6 - f8e: 8c 93 st X, r24 - f90: 16 97 sbiw r26, 0x06 ; 6 - f92: e0 e6 ldi r30, 0x60 ; 96 - f94: f0 e0 ldi r31, 0x00 ; 0 - f96: 80 e8 ldi r24, 0x80 ; 128 - f98: 85 83 std Z+5, r24 ; 0x05 - f9a: 8b eb ldi r24, 0xBB ; 187 - f9c: 86 83 std Z+6, r24 ; 0x06 - f9e: 16 96 adiw r26, 0x06 ; 6 - fa0: 8c 91 ld r24, X - fa2: 16 97 sbiw r26, 0x06 ; 6 - fa4: 84 60 ori r24, 0x04 ; 4 - fa6: 16 96 adiw r26, 0x06 ; 6 - fa8: 8c 93 st X, r24 - faa: 80 81 ld r24, Z - fac: 81 60 ori r24, 0x01 ; 1 - fae: 80 83 st Z, r24 - fb0: 9f bf out 0x3f, r25 ; 63 - fb2: 61 e0 ldi r22, 0x01 ; 1 - fb4: 80 e4 ldi r24, 0x40 ; 64 - fb6: 90 e0 ldi r25, 0x00 ; 0 - fb8: 60 d5 rcall .+2752 ; 0x1a7a - fba: 9f b7 in r25, 0x3f ; 63 - fbc: f8 94 cli - fbe: f8 01 movw r30, r16 - fc0: 80 81 ld r24, Z - fc2: 8e 7f andi r24, 0xFE ; 254 - fc4: 80 83 st Z, r24 - fc6: 9f bf out 0x3f, r25 ; 63 - fc8: 24 96 adiw r28, 0x04 ; 4 - fca: cd bf out 0x3d, r28 ; 61 - fcc: de bf out 0x3e, r29 ; 62 - fce: df 91 pop r29 - fd0: cf 91 pop r28 - fd2: 1f 91 pop r17 - fd4: 0f 91 pop r16 - fd6: 08 95 ret - -00000fd8 : + f16: 0f 93 push r16 + f18: 1f 93 push r17 + f1a: cf 93 push r28 + f1c: df 93 push r29 + f1e: 00 d0 rcall .+0 ; 0xf20 + f20: 00 d0 rcall .+0 ; 0xf22 + f22: cd b7 in r28, 0x3d ; 61 + f24: de b7 in r29, 0x3e ; 62 + f26: 8f ef ldi r24, 0xFF ; 255 + f28: 80 93 70 00 sts 0x0070, r24 ; 0x800070 <__TEXT_REGION_LENGTH__+0x700070> + f2c: 80 93 71 00 sts 0x0071, r24 ; 0x800071 <__TEXT_REGION_LENGTH__+0x700071> + f30: 80 93 72 00 sts 0x0072, r24 ; 0x800072 <__TEXT_REGION_LENGTH__+0x700072> + f34: 80 93 73 00 sts 0x0073, r24 ; 0x800073 <__TEXT_REGION_LENGTH__+0x700073> + f38: 80 93 74 00 sts 0x0074, r24 ; 0x800074 <__TEXT_REGION_LENGTH__+0x700074> + f3c: 80 93 75 00 sts 0x0075, r24 ; 0x800075 <__TEXT_REGION_LENGTH__+0x700075> + f40: 80 93 76 00 sts 0x0076, r24 ; 0x800076 <__TEXT_REGION_LENGTH__+0x700076> + f44: 64 e0 ldi r22, 0x04 ; 4 + f46: 81 e4 ldi r24, 0x41 ; 65 + f48: 90 e0 ldi r25, 0x00 ; 0 + f4a: a6 d5 rcall .+2892 ; 0x1a98 + f4c: 6c e1 ldi r22, 0x1C ; 28 + f4e: 70 e0 ldi r23, 0x00 ; 0 + f50: 82 e0 ldi r24, 0x02 ; 2 + f52: a8 d5 rcall .+2896 ; 0x1aa4 + f54: 8a 83 std Y+2, r24 ; 0x02 + f56: 6d e1 ldi r22, 0x1D ; 29 + f58: 70 e0 ldi r23, 0x00 ; 0 + f5a: 82 e0 ldi r24, 0x02 ; 2 + f5c: a3 d5 rcall .+2886 ; 0x1aa4 + f5e: 89 83 std Y+1, r24 ; 0x01 + f60: 89 81 ldd r24, Y+1 ; 0x01 + f62: 9a 81 ldd r25, Y+2 ; 0x02 + f64: 01 96 adiw r24, 0x01 ; 1 + f66: 21 f4 brne .+8 ; 0xf70 + f68: 80 e4 ldi r24, 0x40 ; 64 + f6a: 93 e2 ldi r25, 0x23 ; 35 + f6c: 89 83 std Y+1, r24 ; 0x01 + f6e: 9a 83 std Y+2, r25 ; 0x02 + f70: 89 81 ldd r24, Y+1 ; 0x01 + f72: 9a 81 ldd r25, Y+2 ; 0x02 + f74: 8b 83 std Y+3, r24 ; 0x03 + f76: 9c 83 std Y+4, r25 ; 0x04 + f78: e0 e6 ldi r30, 0x60 ; 96 + f7a: f0 e0 ldi r31, 0x00 ; 0 + f7c: 82 83 std Z+2, r24 ; 0x02 + f7e: 8c 81 ldd r24, Y+4 ; 0x04 + f80: 83 83 std Z+3, r24 ; 0x03 + f82: 9f b7 in r25, 0x3f ; 63 + f84: f8 94 cli + f86: e0 e5 ldi r30, 0x50 ; 80 + f88: f0 e0 ldi r31, 0x00 ; 0 + f8a: 80 81 ld r24, Z + f8c: 82 60 ori r24, 0x02 ; 2 + f8e: 80 83 st Z, r24 + f90: 9f bf out 0x3f, r25 ; 63 + f92: 81 81 ldd r24, Z+1 ; 0x01 + f94: 81 ff sbrs r24, 1 + f96: fd cf rjmp .-6 ; 0xf92 + f98: 9f b7 in r25, 0x3f ; 63 + f9a: f8 94 cli + f9c: 00 e5 ldi r16, 0x50 ; 80 + f9e: 10 e0 ldi r17, 0x00 ; 0 + fa0: d8 01 movw r26, r16 + fa2: 16 96 adiw r26, 0x06 ; 6 + fa4: 8c 91 ld r24, X + fa6: 16 97 sbiw r26, 0x06 ; 6 + fa8: 89 7f andi r24, 0xF9 ; 249 + faa: 16 96 adiw r26, 0x06 ; 6 + fac: 8c 93 st X, r24 + fae: 16 97 sbiw r26, 0x06 ; 6 + fb0: e0 e6 ldi r30, 0x60 ; 96 + fb2: f0 e0 ldi r31, 0x00 ; 0 + fb4: 80 e8 ldi r24, 0x80 ; 128 + fb6: 85 83 std Z+5, r24 ; 0x05 + fb8: 8b eb ldi r24, 0xBB ; 187 + fba: 86 83 std Z+6, r24 ; 0x06 + fbc: 16 96 adiw r26, 0x06 ; 6 + fbe: 8c 91 ld r24, X + fc0: 16 97 sbiw r26, 0x06 ; 6 + fc2: 84 60 ori r24, 0x04 ; 4 + fc4: 16 96 adiw r26, 0x06 ; 6 + fc6: 8c 93 st X, r24 + fc8: 80 81 ld r24, Z + fca: 81 60 ori r24, 0x01 ; 1 + fcc: 80 83 st Z, r24 + fce: 9f bf out 0x3f, r25 ; 63 + fd0: 61 e0 ldi r22, 0x01 ; 1 + fd2: 80 e4 ldi r24, 0x40 ; 64 + fd4: 90 e0 ldi r25, 0x00 ; 0 + fd6: 60 d5 rcall .+2752 ; 0x1a98 fd8: 9f b7 in r25, 0x3f ; 63 fda: f8 94 cli - fdc: e8 2f mov r30, r24 - fde: f0 e0 ldi r31, 0x00 ; 0 - fe0: e0 59 subi r30, 0x90 ; 144 - fe2: ff 4f sbci r31, 0xFF ; 255 - fe4: 60 95 com r22 - fe6: 80 81 ld r24, Z - fe8: 68 23 and r22, r24 - fea: 60 83 st Z, r22 - fec: 9f bf out 0x3f, r25 ; 63 - fee: 08 95 ret + fdc: f8 01 movw r30, r16 + fde: 80 81 ld r24, Z + fe0: 8e 7f andi r24, 0xFE ; 254 + fe2: 80 83 st Z, r24 + fe4: 9f bf out 0x3f, r25 ; 63 + fe6: 24 96 adiw r28, 0x04 ; 4 + fe8: cd bf out 0x3d, r28 ; 61 + fea: de bf out 0x3e, r29 ; 62 + fec: df 91 pop r29 + fee: cf 91 pop r28 + ff0: 1f 91 pop r17 + ff2: 0f 91 pop r16 + ff4: 08 95 ret -00000ff0 : +00000ff6 : + ff6: 9f b7 in r25, 0x3f ; 63 + ff8: f8 94 cli + ffa: e8 2f mov r30, r24 + ffc: f0 e0 ldi r31, 0x00 ; 0 + ffe: e0 59 subi r30, 0x90 ; 144 + 1000: ff 4f sbci r31, 0xFF ; 255 + 1002: 60 95 com r22 + 1004: 80 81 ld r24, Z + 1006: 68 23 and r22, r24 + 1008: 60 83 st Z, r22 + 100a: 9f bf out 0x3f, r25 ; 63 + 100c: 08 95 ret + +0000100e : /* * Enable or disable prescaler depending on if the USB frequency is 6 * MHz or 48 MHz. Only 6 MHz USB frequency requires prescaling. */ if (frequency == 6) { - ff0: 86 30 cpi r24, 0x06 ; 6 - ff2: 11 f0 breq .+4 ; 0xff8 + 100e: 86 30 cpi r24, 0x06 ; 6 + 1010: 11 f0 breq .+4 ; 0x1016 prescaler = CLK_USBPSDIV_8_gc; } else { prescaler = 0; - ff4: 60 e0 ldi r22, 0x00 ; 0 - ff6: 01 c0 rjmp .+2 ; 0xffa + 1012: 60 e0 ldi r22, 0x00 ; 0 + 1014: 01 c0 rjmp .+2 ; 0x1018 /* * Enable or disable prescaler depending on if the USB frequency is 6 * MHz or 48 MHz. Only 6 MHz USB frequency requires prescaling. */ if (frequency == 6) { prescaler = CLK_USBPSDIV_8_gc; - ff8: 68 e1 ldi r22, 0x18 ; 24 + 1016: 68 e1 ldi r22, 0x18 ; 24 static inline bool osc_is_ready(uint8_t id) { Assert(id != OSC_ID_USBSOF); return OSC.STATUS & id; - ffa: 80 91 51 00 lds r24, 0x0051 ; 0x800051 <__TEXT_REGION_LENGTH__+0x700051> + 1018: 80 91 51 00 lds r24, 0x0051 ; 0x800051 <__TEXT_REGION_LENGTH__+0x700051> /* * Switch to the system clock selected by the user. */ switch (CONFIG_USBCLK_SOURCE) { case USBCLK_SRC_RCOSC: if (!osc_is_ready(OSC_ID_RC32MHZ)) { - ffe: 81 fd sbrc r24, 1 - 1000: 26 c0 rjmp .+76 ; 0x104e + 101c: 81 fd sbrc r24, 1 + 101e: 26 c0 rjmp .+76 ; 0x106c typedef uint8_t irqflags_t; static inline irqflags_t cpu_irq_save(void) { irqflags_t flags = SREG; - 1002: 9f b7 in r25, 0x3f ; 63 + 1020: 9f b7 in r25, 0x3f ; 63 cpu_irq_disable(); - 1004: f8 94 cli + 1022: f8 94 cli irqflags_t flags; Assert(id != OSC_ID_USBSOF); flags = cpu_irq_save(); OSC.CTRL |= id; - 1006: e0 e5 ldi r30, 0x50 ; 80 - 1008: f0 e0 ldi r31, 0x00 ; 0 - 100a: 80 81 ld r24, Z - 100c: 82 60 ori r24, 0x02 ; 2 - 100e: 80 83 st Z, r24 + 1024: e0 e5 ldi r30, 0x50 ; 80 + 1026: f0 e0 ldi r31, 0x00 ; 0 + 1028: 80 81 ld r24, Z + 102a: 82 60 ori r24, 0x02 ; 2 + 102c: 80 83 st Z, r24 } static inline void cpu_irq_restore(irqflags_t flags) { barrier(); SREG = flags; - 1010: 9f bf out 0x3f, r25 ; 63 + 102e: 9f bf out 0x3f, r25 ; 63 static inline bool osc_is_ready(uint8_t id) { Assert(id != OSC_ID_USBSOF); return OSC.STATUS & id; - 1012: 81 81 ldd r24, Z+1 ; 0x01 + 1030: 81 81 ldd r24, Z+1 ; 0x01 * * \param id A number identifying the oscillator to wait for. */ static inline void osc_wait_ready(uint8_t id) { while (!osc_is_ready(id)) { - 1014: 81 ff sbrs r24, 1 - 1016: fd cf rjmp .-6 ; 0x1012 + 1032: 81 ff sbrs r24, 1 + 1034: fd cf rjmp .-6 ; 0x1030 typedef uint8_t irqflags_t; static inline irqflags_t cpu_irq_save(void) { irqflags_t flags = SREG; - 1018: 9f b7 in r25, 0x3f ; 63 + 1036: 9f b7 in r25, 0x3f ; 63 cpu_irq_disable(); - 101a: f8 94 cli + 1038: f8 94 cli # if !XMEGA_E || (ref_id == OSC_ID_USBSOF) #endif ); OSC.DFLLCTRL &= ~(OSC_RC32MCREF_gm); - 101c: a0 e5 ldi r26, 0x50 ; 80 - 101e: b0 e0 ldi r27, 0x00 ; 0 - 1020: 16 96 adiw r26, 0x06 ; 6 - 1022: 8c 91 ld r24, X - 1024: 16 97 sbiw r26, 0x06 ; 6 - 1026: 89 7f andi r24, 0xF9 ; 249 - 1028: 16 96 adiw r26, 0x06 ; 6 - 102a: 8c 93 st X, r24 - 102c: 16 97 sbiw r26, 0x06 ; 6 + 103a: a0 e5 ldi r26, 0x50 ; 80 + 103c: b0 e0 ldi r27, 0x00 ; 0 + 103e: 16 96 adiw r26, 0x06 ; 6 + 1040: 8c 91 ld r24, X + 1042: 16 97 sbiw r26, 0x06 ; 6 + 1044: 89 7f andi r24, 0xF9 ; 249 + 1046: 16 96 adiw r26, 0x06 ; 6 + 1048: 8c 93 st X, r24 + 104a: 16 97 sbiw r26, 0x06 ; 6 else if (ref_id == OSC_ID_USBSOF) { /* * Calibrate 32MRC at 48MHz using USB SOF * 48MHz / 1kHz = 0xBB80 */ DFLLRC32M.COMP1 = 0x80; - 102e: e0 e6 ldi r30, 0x60 ; 96 - 1030: f0 e0 ldi r31, 0x00 ; 0 - 1032: 80 e8 ldi r24, 0x80 ; 128 - 1034: 85 83 std Z+5, r24 ; 0x05 + 104c: e0 e6 ldi r30, 0x60 ; 96 + 104e: f0 e0 ldi r31, 0x00 ; 0 + 1050: 80 e8 ldi r24, 0x80 ; 128 + 1052: 85 83 std Z+5, r24 ; 0x05 DFLLRC32M.COMP2 = 0xBB; - 1036: 8b eb ldi r24, 0xBB ; 187 - 1038: 86 83 std Z+6, r24 ; 0x06 + 1054: 8b eb ldi r24, 0xBB ; 187 + 1056: 86 83 std Z+6, r24 ; 0x06 OSC.DFLLCTRL |= OSC_RC32MCREF_USBSOF_gc; - 103a: 16 96 adiw r26, 0x06 ; 6 - 103c: 8c 91 ld r24, X - 103e: 16 97 sbiw r26, 0x06 ; 6 - 1040: 84 60 ori r24, 0x04 ; 4 - 1042: 16 96 adiw r26, 0x06 ; 6 - 1044: 8c 93 st X, r24 + 1058: 16 96 adiw r26, 0x06 ; 6 + 105a: 8c 91 ld r24, X + 105c: 16 97 sbiw r26, 0x06 ; 6 + 105e: 84 60 ori r24, 0x04 ; 4 + 1060: 16 96 adiw r26, 0x06 ; 6 + 1062: 8c 93 st X, r24 OSC.DFLLCTRL &= ~(OSC_RC32MCREF_bm); # endif } #endif DFLLRC32M.CTRL |= DFLL_ENABLE_bm; - 1046: 80 81 ld r24, Z - 1048: 81 60 ori r24, 0x01 ; 1 - 104a: 80 83 st Z, r24 + 1064: 80 81 ld r24, Z + 1066: 81 60 ori r24, 0x01 ; 1 + 1068: 80 83 st Z, r24 } static inline void cpu_irq_restore(irqflags_t flags) { barrier(); SREG = flags; - 104c: 9f bf out 0x3f, r25 ; 63 + 106a: 9f bf out 0x3f, r25 ; 63 } osc_enable_autocalibration(OSC_ID_RC32MHZ, CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC); #endif } ccp_write_io((uint8_t *)&CLK.USBCTRL, (prescaler) - 104e: 63 60 ori r22, 0x03 ; 3 - 1050: 84 e4 ldi r24, 0x44 ; 68 - 1052: 90 e0 ldi r25, 0x00 ; 0 - 1054: 12 d5 rcall .+2596 ; 0x1a7a + 106c: 63 60 ori r22, 0x03 ; 3 + 106e: 84 e4 ldi r24, 0x44 ; 68 + 1070: 90 e0 ldi r25, 0x00 ; 0 + 1072: 12 d5 rcall .+2596 ; 0x1a98 default: Assert(false); break; } sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_USB); - 1056: 60 e4 ldi r22, 0x40 ; 64 - 1058: 80 e0 ldi r24, 0x00 ; 0 - 105a: be cf rjmp .-132 ; 0xfd8 - 105c: 08 95 ret + 1074: 60 e4 ldi r22, 0x40 ; 64 + 1076: 80 e0 ldi r24, 0x00 ; 0 + 1078: be cf rjmp .-132 ; 0xff6 + 107a: 08 95 ret -0000105e : +0000107c : return udd_ep_run(UDI_VENDOR_EP_BULK_OUT, false, buf, buf_size, callback); } - 105e: 80 91 b6 20 lds r24, 0x20B6 ; 0x8020b6 - 1062: 08 95 ret + 107c: 80 91 b6 20 lds r24, 0x20B6 ; 0x8020b6 + 1080: 08 95 ret -00001064 : - 1064: 28 d1 rcall .+592 ; 0x12b6 - 1066: fc 01 movw r30, r24 - 1068: 83 81 ldd r24, Z+3 ; 0x03 - 106a: 80 93 b6 20 sts 0x20B6, r24 ; 0x8020b6 - 106e: 81 11 cpse r24, r1 - 1070: 02 c0 rjmp .+4 ; 0x1076 - 1072: 6e c9 rjmp .-3364 ; 0x350 - 1074: 08 95 ret - 1076: 81 e0 ldi r24, 0x01 ; 1 - 1078: 08 95 ret +00001082 : + 1082: 28 d1 rcall .+592 ; 0x12d4 + 1084: fc 01 movw r30, r24 + 1086: 83 81 ldd r24, Z+3 ; 0x03 + 1088: 80 93 b6 20 sts 0x20B6, r24 ; 0x8020b6 + 108c: 81 11 cpse r24, r1 + 108e: 02 c0 rjmp .+4 ; 0x1094 + 1090: 6d c9 rjmp .-3366 ; 0x36c + 1092: 08 95 ret + 1094: 81 e0 ldi r24, 0x01 ; 1 + 1096: 08 95 ret -0000107a : - 107a: 80 91 b6 20 lds r24, 0x20B6 ; 0x8020b6 - 107e: 81 30 cpi r24, 0x01 ; 1 - 1080: 09 f4 brne .+2 ; 0x1084 - 1082: 72 c9 rjmp .-3356 ; 0x368 - 1084: 08 95 ret +00001098 : + 1098: 80 91 b6 20 lds r24, 0x20B6 ; 0x8020b6 + 109c: 81 30 cpi r24, 0x01 ; 1 + 109e: 09 f4 brne .+2 ; 0x10a2 + 10a0: 71 c9 rjmp .-3358 ; 0x384 + 10a2: 08 95 ret -00001086 : - 1086: 80 91 56 24 lds r24, 0x2456 ; 0x802456 - 108a: 88 23 and r24, r24 - 108c: 4c f4 brge .+18 ; 0x10a0 - 108e: 80 76 andi r24, 0x60 ; 96 - 1090: 80 34 cpi r24, 0x40 ; 64 - 1092: a9 f4 brne .+42 ; 0x10be - 1094: 80 91 57 24 lds r24, 0x2457 ; 0x802457 - 1098: 81 11 cpse r24, r1 - 109a: 13 c0 rjmp .+38 ; 0x10c2 - 109c: 6a c9 rjmp .-3372 ; 0x372 - 109e: 08 95 ret - 10a0: 80 76 andi r24, 0x60 ; 96 - 10a2: 80 34 cpi r24, 0x40 ; 64 - 10a4: 81 f4 brne .+32 ; 0x10c6 - 10a6: 80 91 57 24 lds r24, 0x2457 ; 0x802457 - 10aa: 81 11 cpse r24, r1 - 10ac: 0e c0 rjmp .+28 ; 0x10ca - 10ae: 80 91 5c 24 lds r24, 0x245C ; 0x80245c - 10b2: 90 91 5d 24 lds r25, 0x245D ; 0x80245d - 10b6: 89 2b or r24, r25 - 10b8: 51 f0 breq .+20 ; 0x10ce - 10ba: 59 c9 rjmp .-3406 ; 0x36e +000010a4 : + 10a4: 80 91 5a 24 lds r24, 0x245A ; 0x80245a + 10a8: 88 23 and r24, r24 + 10aa: 4c f4 brge .+18 ; 0x10be + 10ac: 80 76 andi r24, 0x60 ; 96 + 10ae: 80 34 cpi r24, 0x40 ; 64 + 10b0: a9 f4 brne .+42 ; 0x10dc + 10b2: 80 91 5b 24 lds r24, 0x245B ; 0x80245b + 10b6: 81 11 cpse r24, r1 + 10b8: 13 c0 rjmp .+38 ; 0x10e0 + 10ba: 69 c9 rjmp .-3374 ; 0x38e 10bc: 08 95 ret - 10be: 80 e0 ldi r24, 0x00 ; 0 - 10c0: 08 95 ret - 10c2: 80 e0 ldi r24, 0x00 ; 0 - 10c4: 08 95 ret - 10c6: 80 e0 ldi r24, 0x00 ; 0 - 10c8: 08 95 ret - 10ca: 80 e0 ldi r24, 0x00 ; 0 - 10cc: 08 95 ret - 10ce: 80 e0 ldi r24, 0x00 ; 0 - 10d0: 08 95 ret + 10be: 80 76 andi r24, 0x60 ; 96 + 10c0: 80 34 cpi r24, 0x40 ; 64 + 10c2: 81 f4 brne .+32 ; 0x10e4 + 10c4: 80 91 5b 24 lds r24, 0x245B ; 0x80245b + 10c8: 81 11 cpse r24, r1 + 10ca: 0e c0 rjmp .+28 ; 0x10e8 + 10cc: 80 91 60 24 lds r24, 0x2460 ; 0x802460 + 10d0: 90 91 61 24 lds r25, 0x2461 ; 0x802461 + 10d4: 89 2b or r24, r25 + 10d6: 51 f0 breq .+20 ; 0x10ec + 10d8: 58 c9 rjmp .-3408 ; 0x38a + 10da: 08 95 ret + 10dc: 80 e0 ldi r24, 0x00 ; 0 + 10de: 08 95 ret + 10e0: 80 e0 ldi r24, 0x00 ; 0 + 10e2: 08 95 ret + 10e4: 80 e0 ldi r24, 0x00 ; 0 + 10e6: 08 95 ret + 10e8: 80 e0 ldi r24, 0x00 ; 0 + 10ea: 08 95 ret + 10ec: 80 e0 ldi r24, 0x00 ; 0 + 10ee: 08 95 ret -000010d2 : +000010f0 : * * \return \c 1 if function was successfully done, otherwise \c 0. */ bool udi_vendor_iso_in_run(uint8_t * buf, iram_size_t buf_size, udd_callback_trans_t callback) { - 10d2: 0f 93 push r16 - 10d4: 1f 93 push r17 - 10d6: 9b 01 movw r18, r22 + 10f0: 0f 93 push r16 + 10f2: 1f 93 push r17 + 10f4: 9b 01 movw r18, r22 return udd_ep_run(UDI_VENDOR_EP_ISO_IN, - 10d8: 8a 01 movw r16, r20 - 10da: ac 01 movw r20, r24 - 10dc: 60 e0 ldi r22, 0x00 ; 0 - 10de: 83 e8 ldi r24, 0x83 ; 131 - 10e0: 0e 94 b1 11 call 0x2362 ; 0x2362 + 10f6: 8a 01 movw r16, r20 + 10f8: ac 01 movw r20, r24 + 10fa: 60 e0 ldi r22, 0x00 ; 0 + 10fc: 83 e8 ldi r24, 0x83 ; 131 + 10fe: 0e 94 c0 11 call 0x2380 ; 0x2380 false, buf, buf_size, callback); } - 10e4: 1f 91 pop r17 - 10e6: 0f 91 pop r16 - 10e8: 08 95 ret + 1102: 1f 91 pop r17 + 1104: 0f 91 pop r16 + 1106: 08 95 ret -000010ea : +00001108 : /*! \brief Stop the USB Device stack */ void udc_stop(void) { udd_disable(); udc_reset(); - 10ea: e0 91 bb 20 lds r30, 0x20BB ; 0x8020bb - 10ee: f0 91 bc 20 lds r31, 0x20BC ; 0x8020bc - 10f2: 01 90 ld r0, Z+ - 10f4: f0 81 ld r31, Z - 10f6: e0 2d mov r30, r0 - 10f8: 22 81 ldd r18, Z+2 ; 0x02 - 10fa: 33 81 ldd r19, Z+3 ; 0x03 - 10fc: 2e 0f add r18, r30 - 10fe: 3f 1f adc r19, r31 - 1100: fc 01 movw r30, r24 - 1102: 40 81 ld r20, Z - 1104: e4 0f add r30, r20 - 1106: f1 1d adc r31, r1 - 1108: e2 17 cp r30, r18 - 110a: f3 07 cpc r31, r19 - 110c: b8 f4 brcc .+46 ; 0x113c - 110e: 81 81 ldd r24, Z+1 ; 0x01 - 1110: 84 30 cpi r24, 0x04 ; 4 - 1112: b9 f0 breq .+46 ; 0x1142 - 1114: 86 13 cpse r24, r22 - 1116: 09 c0 rjmp .+18 ; 0x112a - 1118: 05 c0 rjmp .+10 ; 0x1124 - 111a: 81 81 ldd r24, Z+1 ; 0x01 - 111c: 84 30 cpi r24, 0x04 ; 4 - 111e: a1 f0 breq .+40 ; 0x1148 - 1120: 86 13 cpse r24, r22 - 1122: 03 c0 rjmp .+6 ; 0x112a - 1124: 8e 2f mov r24, r30 - 1126: 9f 2f mov r25, r31 - 1128: 08 95 ret - 112a: 80 81 ld r24, Z - 112c: e8 0f add r30, r24 - 112e: f1 1d adc r31, r1 - 1130: e2 17 cp r30, r18 - 1132: f3 07 cpc r31, r19 - 1134: 90 f3 brcs .-28 ; 0x111a - 1136: 80 e0 ldi r24, 0x00 ; 0 - 1138: 90 e0 ldi r25, 0x00 ; 0 - 113a: 08 95 ret - 113c: 80 e0 ldi r24, 0x00 ; 0 - 113e: 90 e0 ldi r25, 0x00 ; 0 - 1140: 08 95 ret - 1142: 80 e0 ldi r24, 0x00 ; 0 - 1144: 90 e0 ldi r25, 0x00 ; 0 + 1108: e0 91 bb 20 lds r30, 0x20BB ; 0x8020bb + 110c: f0 91 bc 20 lds r31, 0x20BC ; 0x8020bc + 1110: 01 90 ld r0, Z+ + 1112: f0 81 ld r31, Z + 1114: e0 2d mov r30, r0 + 1116: 22 81 ldd r18, Z+2 ; 0x02 + 1118: 33 81 ldd r19, Z+3 ; 0x03 + 111a: 2e 0f add r18, r30 + 111c: 3f 1f adc r19, r31 + 111e: fc 01 movw r30, r24 + 1120: 40 81 ld r20, Z + 1122: e4 0f add r30, r20 + 1124: f1 1d adc r31, r1 + 1126: e2 17 cp r30, r18 + 1128: f3 07 cpc r31, r19 + 112a: b8 f4 brcc .+46 ; 0x115a + 112c: 81 81 ldd r24, Z+1 ; 0x01 + 112e: 84 30 cpi r24, 0x04 ; 4 + 1130: b9 f0 breq .+46 ; 0x1160 + 1132: 86 13 cpse r24, r22 + 1134: 09 c0 rjmp .+18 ; 0x1148 + 1136: 05 c0 rjmp .+10 ; 0x1142 + 1138: 81 81 ldd r24, Z+1 ; 0x01 + 113a: 84 30 cpi r24, 0x04 ; 4 + 113c: a1 f0 breq .+40 ; 0x1166 + 113e: 86 13 cpse r24, r22 + 1140: 03 c0 rjmp .+6 ; 0x1148 + 1142: 8e 2f mov r24, r30 + 1144: 9f 2f mov r25, r31 1146: 08 95 ret - 1148: 80 e0 ldi r24, 0x00 ; 0 - 114a: 90 e0 ldi r25, 0x00 ; 0 - 114c: 08 95 ret - -0000114e : - 114e: 80 91 58 24 lds r24, 0x2458 ; 0x802458 - 1152: 8f 77 andi r24, 0x7F ; 127 - 1154: 0c 94 df 10 jmp 0x21be ; 0x21be + 1148: 80 81 ld r24, Z + 114a: e8 0f add r30, r24 + 114c: f1 1d adc r31, r1 + 114e: e2 17 cp r30, r18 + 1150: f3 07 cpc r31, r19 + 1152: 90 f3 brcs .-28 ; 0x1138 + 1154: 80 e0 ldi r24, 0x00 ; 0 + 1156: 90 e0 ldi r25, 0x00 ; 0 1158: 08 95 ret + 115a: 80 e0 ldi r24, 0x00 ; 0 + 115c: 90 e0 ldi r25, 0x00 ; 0 + 115e: 08 95 ret + 1160: 80 e0 ldi r24, 0x00 ; 0 + 1162: 90 e0 ldi r25, 0x00 ; 0 + 1164: 08 95 ret + 1166: 80 e0 ldi r24, 0x00 ; 0 + 1168: 90 e0 ldi r25, 0x00 ; 0 + 116a: 08 95 ret -0000115a : - 115a: 90 91 be 20 lds r25, 0x20BE ; 0x8020be - 115e: 99 23 and r25, r25 - 1160: 81 f1 breq .+96 ; 0x11c2 - 1162: e0 91 bb 20 lds r30, 0x20BB ; 0x8020bb - 1166: f0 91 bc 20 lds r31, 0x20BC ; 0x8020bc - 116a: 01 90 ld r0, Z+ - 116c: f0 81 ld r31, Z - 116e: e0 2d mov r30, r0 - 1170: 94 81 ldd r25, Z+4 ; 0x04 - 1172: 89 17 cp r24, r25 - 1174: 40 f5 brcc .+80 ; 0x11c6 - 1176: e0 93 b9 20 sts 0x20B9, r30 ; 0x8020b9 - 117a: f0 93 ba 20 sts 0x20BA, r31 ; 0x8020ba - 117e: 22 81 ldd r18, Z+2 ; 0x02 - 1180: 33 81 ldd r19, Z+3 ; 0x03 - 1182: 2e 0f add r18, r30 - 1184: 3f 1f adc r19, r31 - 1186: e2 17 cp r30, r18 - 1188: f3 07 cpc r31, r19 - 118a: f8 f4 brcc .+62 ; 0x11ca - 118c: 91 81 ldd r25, Z+1 ; 0x01 - 118e: 94 30 cpi r25, 0x04 ; 4 - 1190: 61 f4 brne .+24 ; 0x11aa - 1192: 92 81 ldd r25, Z+2 ; 0x02 - 1194: 98 13 cpse r25, r24 - 1196: 09 c0 rjmp .+18 ; 0x11aa - 1198: 93 81 ldd r25, Z+3 ; 0x03 - 119a: 96 13 cpse r25, r22 - 119c: 06 c0 rjmp .+12 ; 0x11aa - 119e: e0 93 b9 20 sts 0x20B9, r30 ; 0x8020b9 - 11a2: f0 93 ba 20 sts 0x20BA, r31 ; 0x8020ba - 11a6: 81 e0 ldi r24, 0x01 ; 1 - 11a8: 08 95 ret - 11aa: 90 81 ld r25, Z - 11ac: e9 0f add r30, r25 - 11ae: f1 1d adc r31, r1 - 11b0: e2 17 cp r30, r18 - 11b2: f3 07 cpc r31, r19 - 11b4: 58 f3 brcs .-42 ; 0x118c - 11b6: e0 93 b9 20 sts 0x20B9, r30 ; 0x8020b9 - 11ba: f0 93 ba 20 sts 0x20BA, r31 ; 0x8020ba - 11be: 80 e0 ldi r24, 0x00 ; 0 - 11c0: 08 95 ret - 11c2: 80 e0 ldi r24, 0x00 ; 0 - 11c4: 08 95 ret - 11c6: 80 e0 ldi r24, 0x00 ; 0 - 11c8: 08 95 ret - 11ca: 80 e0 ldi r24, 0x00 ; 0 - 11cc: 08 95 ret +0000116c : + 116c: 80 91 5c 24 lds r24, 0x245C ; 0x80245c + 1170: 8f 77 andi r24, 0x7F ; 127 + 1172: 0c 94 ee 10 jmp 0x21dc ; 0x21dc + 1176: 08 95 ret -000011ce : - 11ce: ef 92 push r14 - 11d0: ff 92 push r15 - 11d2: 1f 93 push r17 - 11d4: cf 93 push r28 - 11d6: df 93 push r29 - 11d8: c8 2f mov r28, r24 - 11da: 60 e0 ldi r22, 0x00 ; 0 - 11dc: be df rcall .-132 ; 0x115a - 11de: 18 2f mov r17, r24 - 11e0: 88 23 and r24, r24 - 11e2: 81 f1 breq .+96 ; 0x1244 - 11e4: a0 91 bb 20 lds r26, 0x20BB ; 0x8020bb - 11e8: b0 91 bc 20 lds r27, 0x20BC ; 0x8020bc - 11ec: ec 2f mov r30, r28 - 11ee: f0 e0 ldi r31, 0x00 ; 0 - 11f0: ee 0f add r30, r30 - 11f2: ff 1f adc r31, r31 - 11f4: 12 96 adiw r26, 0x02 ; 2 - 11f6: 8d 91 ld r24, X+ - 11f8: 9c 91 ld r25, X - 11fa: 13 97 sbiw r26, 0x03 ; 3 - 11fc: e8 0f add r30, r24 - 11fe: f9 1f adc r31, r25 - 1200: e0 80 ld r14, Z - 1202: f1 80 ldd r15, Z+1 ; 0x01 - 1204: d7 01 movw r26, r14 - 1206: 16 96 adiw r26, 0x06 ; 6 - 1208: ed 91 ld r30, X+ - 120a: fc 91 ld r31, X - 120c: 17 97 sbiw r26, 0x07 ; 7 - 120e: 09 95 icall - 1210: 68 2f mov r22, r24 - 1212: 8c 2f mov r24, r28 - 1214: a2 df rcall .-188 ; 0x115a - 1216: 18 2f mov r17, r24 - 1218: 88 23 and r24, r24 - 121a: a1 f0 breq .+40 ; 0x1244 - 121c: c0 91 b9 20 lds r28, 0x20B9 ; 0x8020b9 - 1220: d0 91 ba 20 lds r29, 0x20BA ; 0x8020ba - 1224: 65 e0 ldi r22, 0x05 ; 5 - 1226: ce 01 movw r24, r28 - 1228: 60 df rcall .-320 ; 0x10ea - 122a: ec 01 movw r28, r24 - 122c: 89 2b or r24, r25 - 122e: 21 f0 breq .+8 ; 0x1238 - 1230: 8a 81 ldd r24, Y+2 ; 0x02 - 1232: 0e 94 b4 12 call 0x2568 ; 0x2568 - 1236: f6 cf rjmp .-20 ; 0x1224 - 1238: d7 01 movw r26, r14 - 123a: 12 96 adiw r26, 0x02 ; 2 - 123c: ed 91 ld r30, X+ - 123e: fc 91 ld r31, X - 1240: 13 97 sbiw r26, 0x03 ; 3 - 1242: 09 95 icall - 1244: 81 2f mov r24, r17 - 1246: df 91 pop r29 - 1248: cf 91 pop r28 - 124a: 1f 91 pop r17 - 124c: ff 90 pop r15 - 124e: ef 90 pop r14 - 1250: 08 95 ret +00001178 : + 1178: 90 91 be 20 lds r25, 0x20BE ; 0x8020be + 117c: 99 23 and r25, r25 + 117e: 81 f1 breq .+96 ; 0x11e0 + 1180: e0 91 bb 20 lds r30, 0x20BB ; 0x8020bb + 1184: f0 91 bc 20 lds r31, 0x20BC ; 0x8020bc + 1188: 01 90 ld r0, Z+ + 118a: f0 81 ld r31, Z + 118c: e0 2d mov r30, r0 + 118e: 94 81 ldd r25, Z+4 ; 0x04 + 1190: 89 17 cp r24, r25 + 1192: 40 f5 brcc .+80 ; 0x11e4 + 1194: e0 93 b9 20 sts 0x20B9, r30 ; 0x8020b9 + 1198: f0 93 ba 20 sts 0x20BA, r31 ; 0x8020ba + 119c: 22 81 ldd r18, Z+2 ; 0x02 + 119e: 33 81 ldd r19, Z+3 ; 0x03 + 11a0: 2e 0f add r18, r30 + 11a2: 3f 1f adc r19, r31 + 11a4: e2 17 cp r30, r18 + 11a6: f3 07 cpc r31, r19 + 11a8: f8 f4 brcc .+62 ; 0x11e8 + 11aa: 91 81 ldd r25, Z+1 ; 0x01 + 11ac: 94 30 cpi r25, 0x04 ; 4 + 11ae: 61 f4 brne .+24 ; 0x11c8 + 11b0: 92 81 ldd r25, Z+2 ; 0x02 + 11b2: 98 13 cpse r25, r24 + 11b4: 09 c0 rjmp .+18 ; 0x11c8 + 11b6: 93 81 ldd r25, Z+3 ; 0x03 + 11b8: 96 13 cpse r25, r22 + 11ba: 06 c0 rjmp .+12 ; 0x11c8 + 11bc: e0 93 b9 20 sts 0x20B9, r30 ; 0x8020b9 + 11c0: f0 93 ba 20 sts 0x20BA, r31 ; 0x8020ba + 11c4: 81 e0 ldi r24, 0x01 ; 1 + 11c6: 08 95 ret + 11c8: 90 81 ld r25, Z + 11ca: e9 0f add r30, r25 + 11cc: f1 1d adc r31, r1 + 11ce: e2 17 cp r30, r18 + 11d0: f3 07 cpc r31, r19 + 11d2: 58 f3 brcs .-42 ; 0x11aa + 11d4: e0 93 b9 20 sts 0x20B9, r30 ; 0x8020b9 + 11d8: f0 93 ba 20 sts 0x20BA, r31 ; 0x8020ba + 11dc: 80 e0 ldi r24, 0x00 ; 0 + 11de: 08 95 ret + 11e0: 80 e0 ldi r24, 0x00 ; 0 + 11e2: 08 95 ret + 11e4: 80 e0 ldi r24, 0x00 ; 0 + 11e6: 08 95 ret + 11e8: 80 e0 ldi r24, 0x00 ; 0 + 11ea: 08 95 ret -00001252 : - 1252: 1f 93 push r17 - 1254: cf 93 push r28 - 1256: df 93 push r29 - 1258: 18 2f mov r17, r24 - 125a: 7f df rcall .-258 ; 0x115a - 125c: 88 23 and r24, r24 - 125e: 39 f1 breq .+78 ; 0x12ae - 1260: c0 91 b9 20 lds r28, 0x20B9 ; 0x8020b9 - 1264: d0 91 ba 20 lds r29, 0x20BA ; 0x8020ba - 1268: 65 e0 ldi r22, 0x05 ; 5 - 126a: ce 01 movw r24, r28 - 126c: 3e df rcall .-388 ; 0x10ea - 126e: ec 01 movw r28, r24 - 1270: 89 2b or r24, r25 - 1272: 41 f0 breq .+16 ; 0x1284 - 1274: 4c 81 ldd r20, Y+4 ; 0x04 - 1276: 5d 81 ldd r21, Y+5 ; 0x05 - 1278: 6b 81 ldd r22, Y+3 ; 0x03 - 127a: 8a 81 ldd r24, Y+2 ; 0x02 - 127c: ad d7 rcall .+3930 ; 0x21d8 - 127e: 81 11 cpse r24, r1 - 1280: f3 cf rjmp .-26 ; 0x1268 - 1282: 15 c0 rjmp .+42 ; 0x12ae - 1284: a0 91 bb 20 lds r26, 0x20BB ; 0x8020bb - 1288: b0 91 bc 20 lds r27, 0x20BC ; 0x8020bc - 128c: e1 2f mov r30, r17 - 128e: f0 e0 ldi r31, 0x00 ; 0 - 1290: ee 0f add r30, r30 - 1292: ff 1f adc r31, r31 - 1294: 12 96 adiw r26, 0x02 ; 2 - 1296: 8d 91 ld r24, X+ - 1298: 9c 91 ld r25, X - 129a: 13 97 sbiw r26, 0x03 ; 3 - 129c: e8 0f add r30, r24 - 129e: f9 1f adc r31, r25 - 12a0: 01 90 ld r0, Z+ - 12a2: f0 81 ld r31, Z - 12a4: e0 2d mov r30, r0 - 12a6: 01 90 ld r0, Z+ - 12a8: f0 81 ld r31, Z - 12aa: e0 2d mov r30, r0 - 12ac: 09 95 icall - 12ae: df 91 pop r29 - 12b0: cf 91 pop r28 - 12b2: 1f 91 pop r17 - 12b4: 08 95 ret +000011ec : + 11ec: ef 92 push r14 + 11ee: ff 92 push r15 + 11f0: 1f 93 push r17 + 11f2: cf 93 push r28 + 11f4: df 93 push r29 + 11f6: c8 2f mov r28, r24 + 11f8: 60 e0 ldi r22, 0x00 ; 0 + 11fa: be df rcall .-132 ; 0x1178 + 11fc: 18 2f mov r17, r24 + 11fe: 88 23 and r24, r24 + 1200: 81 f1 breq .+96 ; 0x1262 + 1202: a0 91 bb 20 lds r26, 0x20BB ; 0x8020bb + 1206: b0 91 bc 20 lds r27, 0x20BC ; 0x8020bc + 120a: ec 2f mov r30, r28 + 120c: f0 e0 ldi r31, 0x00 ; 0 + 120e: ee 0f add r30, r30 + 1210: ff 1f adc r31, r31 + 1212: 12 96 adiw r26, 0x02 ; 2 + 1214: 8d 91 ld r24, X+ + 1216: 9c 91 ld r25, X + 1218: 13 97 sbiw r26, 0x03 ; 3 + 121a: e8 0f add r30, r24 + 121c: f9 1f adc r31, r25 + 121e: e0 80 ld r14, Z + 1220: f1 80 ldd r15, Z+1 ; 0x01 + 1222: d7 01 movw r26, r14 + 1224: 16 96 adiw r26, 0x06 ; 6 + 1226: ed 91 ld r30, X+ + 1228: fc 91 ld r31, X + 122a: 17 97 sbiw r26, 0x07 ; 7 + 122c: 09 95 icall + 122e: 68 2f mov r22, r24 + 1230: 8c 2f mov r24, r28 + 1232: a2 df rcall .-188 ; 0x1178 + 1234: 18 2f mov r17, r24 + 1236: 88 23 and r24, r24 + 1238: a1 f0 breq .+40 ; 0x1262 + 123a: c0 91 b9 20 lds r28, 0x20B9 ; 0x8020b9 + 123e: d0 91 ba 20 lds r29, 0x20BA ; 0x8020ba + 1242: 65 e0 ldi r22, 0x05 ; 5 + 1244: ce 01 movw r24, r28 + 1246: 60 df rcall .-320 ; 0x1108 + 1248: ec 01 movw r28, r24 + 124a: 89 2b or r24, r25 + 124c: 21 f0 breq .+8 ; 0x1256 + 124e: 8a 81 ldd r24, Y+2 ; 0x02 + 1250: 0e 94 c3 12 call 0x2586 ; 0x2586 + 1254: f6 cf rjmp .-20 ; 0x1242 + 1256: d7 01 movw r26, r14 + 1258: 12 96 adiw r26, 0x02 ; 2 + 125a: ed 91 ld r30, X+ + 125c: fc 91 ld r31, X + 125e: 13 97 sbiw r26, 0x03 ; 3 + 1260: 09 95 icall + 1262: 81 2f mov r24, r17 + 1264: df 91 pop r29 + 1266: cf 91 pop r28 + 1268: 1f 91 pop r17 + 126a: ff 90 pop r15 + 126c: ef 90 pop r14 + 126e: 08 95 ret -000012b6 : - 12b6: 80 91 b9 20 lds r24, 0x20B9 ; 0x8020b9 - 12ba: 90 91 ba 20 lds r25, 0x20BA ; 0x8020ba - 12be: 08 95 ret +00001270 : + 1270: 1f 93 push r17 + 1272: cf 93 push r28 + 1274: df 93 push r29 + 1276: 18 2f mov r17, r24 + 1278: 7f df rcall .-258 ; 0x1178 + 127a: 88 23 and r24, r24 + 127c: 39 f1 breq .+78 ; 0x12cc + 127e: c0 91 b9 20 lds r28, 0x20B9 ; 0x8020b9 + 1282: d0 91 ba 20 lds r29, 0x20BA ; 0x8020ba + 1286: 65 e0 ldi r22, 0x05 ; 5 + 1288: ce 01 movw r24, r28 + 128a: 3e df rcall .-388 ; 0x1108 + 128c: ec 01 movw r28, r24 + 128e: 89 2b or r24, r25 + 1290: 41 f0 breq .+16 ; 0x12a2 + 1292: 4c 81 ldd r20, Y+4 ; 0x04 + 1294: 5d 81 ldd r21, Y+5 ; 0x05 + 1296: 6b 81 ldd r22, Y+3 ; 0x03 + 1298: 8a 81 ldd r24, Y+2 ; 0x02 + 129a: ad d7 rcall .+3930 ; 0x21f6 + 129c: 81 11 cpse r24, r1 + 129e: f3 cf rjmp .-26 ; 0x1286 + 12a0: 15 c0 rjmp .+42 ; 0x12cc + 12a2: a0 91 bb 20 lds r26, 0x20BB ; 0x8020bb + 12a6: b0 91 bc 20 lds r27, 0x20BC ; 0x8020bc + 12aa: e1 2f mov r30, r17 + 12ac: f0 e0 ldi r31, 0x00 ; 0 + 12ae: ee 0f add r30, r30 + 12b0: ff 1f adc r31, r31 + 12b2: 12 96 adiw r26, 0x02 ; 2 + 12b4: 8d 91 ld r24, X+ + 12b6: 9c 91 ld r25, X + 12b8: 13 97 sbiw r26, 0x03 ; 3 + 12ba: e8 0f add r30, r24 + 12bc: f9 1f adc r31, r25 + 12be: 01 90 ld r0, Z+ + 12c0: f0 81 ld r31, Z + 12c2: e0 2d mov r30, r0 + 12c4: 01 90 ld r0, Z+ + 12c6: f0 81 ld r31, Z + 12c8: e0 2d mov r30, r0 + 12ca: 09 95 icall + 12cc: df 91 pop r29 + 12ce: cf 91 pop r28 + 12d0: 1f 91 pop r17 + 12d2: 08 95 ret -000012c0 : - 12c0: f9 c6 rjmp .+3570 ; 0x20b4 - 12c2: 08 95 ret +000012d4 : + 12d4: 80 91 b9 20 lds r24, 0x20B9 ; 0x8020b9 + 12d8: 90 91 ba 20 lds r25, 0x20BA ; 0x8020ba + 12dc: 08 95 ret -000012c4 : - 12c4: cf 93 push r28 - 12c6: 80 91 be 20 lds r24, 0x20BE ; 0x8020be - 12ca: 88 23 and r24, r24 - 12cc: c1 f0 breq .+48 ; 0x12fe - 12ce: e0 91 bb 20 lds r30, 0x20BB ; 0x8020bb - 12d2: f0 91 bc 20 lds r31, 0x20BC ; 0x8020bc - 12d6: 01 90 ld r0, Z+ - 12d8: f0 81 ld r31, Z - 12da: e0 2d mov r30, r0 - 12dc: 84 81 ldd r24, Z+4 ; 0x04 - 12de: 88 23 and r24, r24 - 12e0: 71 f0 breq .+28 ; 0x12fe - 12e2: c0 e0 ldi r28, 0x00 ; 0 - 12e4: 8c 2f mov r24, r28 - 12e6: 73 df rcall .-282 ; 0x11ce - 12e8: cf 5f subi r28, 0xFF ; 255 - 12ea: e0 91 bb 20 lds r30, 0x20BB ; 0x8020bb - 12ee: f0 91 bc 20 lds r31, 0x20BC ; 0x8020bc - 12f2: 01 90 ld r0, Z+ - 12f4: f0 81 ld r31, Z - 12f6: e0 2d mov r30, r0 - 12f8: 84 81 ldd r24, Z+4 ; 0x04 - 12fa: c8 17 cp r28, r24 - 12fc: 98 f3 brcs .-26 ; 0x12e4 - 12fe: 10 92 be 20 sts 0x20BE, r1 ; 0x8020be - 1302: 10 92 c2 20 sts 0x20C2, r1 ; 0x8020c2 - 1306: 10 92 c3 20 sts 0x20C3, r1 ; 0x8020c3 - 130a: cf 91 pop r28 - 130c: 08 95 ret +000012de : + 12de: f9 c6 rjmp .+3570 ; 0x20d2 + 12e0: 08 95 ret -0000130e : +000012e2 : + 12e2: cf 93 push r28 + 12e4: 80 91 be 20 lds r24, 0x20BE ; 0x8020be + 12e8: 88 23 and r24, r24 + 12ea: c1 f0 breq .+48 ; 0x131c + 12ec: e0 91 bb 20 lds r30, 0x20BB ; 0x8020bb + 12f0: f0 91 bc 20 lds r31, 0x20BC ; 0x8020bc + 12f4: 01 90 ld r0, Z+ + 12f6: f0 81 ld r31, Z + 12f8: e0 2d mov r30, r0 + 12fa: 84 81 ldd r24, Z+4 ; 0x04 + 12fc: 88 23 and r24, r24 + 12fe: 71 f0 breq .+28 ; 0x131c + 1300: c0 e0 ldi r28, 0x00 ; 0 + 1302: 8c 2f mov r24, r28 + 1304: 73 df rcall .-282 ; 0x11ec + 1306: cf 5f subi r28, 0xFF ; 255 + 1308: e0 91 bb 20 lds r30, 0x20BB ; 0x8020bb + 130c: f0 91 bc 20 lds r31, 0x20BC ; 0x8020bc + 1310: 01 90 ld r0, Z+ + 1312: f0 81 ld r31, Z + 1314: e0 2d mov r30, r0 + 1316: 84 81 ldd r24, Z+4 ; 0x04 + 1318: c8 17 cp r28, r24 + 131a: 98 f3 brcs .-26 ; 0x1302 + 131c: 10 92 be 20 sts 0x20BE, r1 ; 0x8020be + 1320: 10 92 c2 20 sts 0x20C2, r1 ; 0x8020c2 + 1324: 10 92 c3 20 sts 0x20C3, r1 ; 0x8020c3 + 1328: cf 91 pop r28 + 132a: 08 95 ret + +0000132c : CPU_TO_LE16(USB_DEV_STATUS_BUS_POWERED); #endif } void udc_sof_notify(void) { - 130e: cf 93 push r28 + 132c: cf 93 push r28 uint8_t iface_num; if (udc_num_configuration) { - 1310: 80 91 be 20 lds r24, 0x20BE ; 0x8020be - 1314: 88 23 and r24, r24 - 1316: 49 f1 breq .+82 ; 0x136a + 132e: 80 91 be 20 lds r24, 0x20BE ; 0x8020be + 1332: 88 23 and r24, r24 + 1334: 49 f1 breq .+82 ; 0x1388 for (iface_num = 0; iface_num < udc_ptr_conf->desc->bNumInterfaces; - 1318: a0 91 bb 20 lds r26, 0x20BB ; 0x8020bb - 131c: b0 91 bc 20 lds r27, 0x20BC ; 0x8020bc - 1320: ed 91 ld r30, X+ - 1322: fc 91 ld r31, X - 1324: 11 97 sbiw r26, 0x01 ; 1 + 1336: a0 91 bb 20 lds r26, 0x20BB ; 0x8020bb + 133a: b0 91 bc 20 lds r27, 0x20BC ; 0x8020bc + 133e: ed 91 ld r30, X+ + 1340: fc 91 ld r31, X + 1342: 11 97 sbiw r26, 0x01 ; 1 void udc_sof_notify(void) { uint8_t iface_num; if (udc_num_configuration) { for (iface_num = 0; - 1326: 84 81 ldd r24, Z+4 ; 0x04 - 1328: 88 23 and r24, r24 - 132a: f9 f0 breq .+62 ; 0x136a - 132c: c0 e0 ldi r28, 0x00 ; 0 + 1344: 84 81 ldd r24, Z+4 ; 0x04 + 1346: 88 23 and r24, r24 + 1348: f9 f0 breq .+62 ; 0x1388 + 134a: c0 e0 ldi r28, 0x00 ; 0 iface_num < udc_ptr_conf->desc->bNumInterfaces; iface_num++) { if (udc_ptr_conf->udi_apis[iface_num]->sof_notify != NULL) { - 132e: ec 2f mov r30, r28 - 1330: f0 e0 ldi r31, 0x00 ; 0 - 1332: ee 0f add r30, r30 - 1334: ff 1f adc r31, r31 - 1336: 12 96 adiw r26, 0x02 ; 2 - 1338: 8d 91 ld r24, X+ - 133a: 9c 91 ld r25, X - 133c: 13 97 sbiw r26, 0x03 ; 3 - 133e: e8 0f add r30, r24 - 1340: f9 1f adc r31, r25 - 1342: 01 90 ld r0, Z+ - 1344: f0 81 ld r31, Z - 1346: e0 2d mov r30, r0 - 1348: 00 84 ldd r0, Z+8 ; 0x08 - 134a: f1 85 ldd r31, Z+9 ; 0x09 - 134c: e0 2d mov r30, r0 - 134e: 30 97 sbiw r30, 0x00 ; 0 - 1350: 09 f0 breq .+2 ; 0x1354 + 134c: ec 2f mov r30, r28 + 134e: f0 e0 ldi r31, 0x00 ; 0 + 1350: ee 0f add r30, r30 + 1352: ff 1f adc r31, r31 + 1354: 12 96 adiw r26, 0x02 ; 2 + 1356: 8d 91 ld r24, X+ + 1358: 9c 91 ld r25, X + 135a: 13 97 sbiw r26, 0x03 ; 3 + 135c: e8 0f add r30, r24 + 135e: f9 1f adc r31, r25 + 1360: 01 90 ld r0, Z+ + 1362: f0 81 ld r31, Z + 1364: e0 2d mov r30, r0 + 1366: 00 84 ldd r0, Z+8 ; 0x08 + 1368: f1 85 ldd r31, Z+9 ; 0x09 + 136a: e0 2d mov r30, r0 + 136c: 30 97 sbiw r30, 0x00 ; 0 + 136e: 09 f0 breq .+2 ; 0x1372 udc_ptr_conf->udi_apis[iface_num]->sof_notify(); - 1352: 09 95 icall + 1370: 09 95 icall uint8_t iface_num; if (udc_num_configuration) { for (iface_num = 0; iface_num < udc_ptr_conf->desc->bNumInterfaces; iface_num++) { - 1354: cf 5f subi r28, 0xFF ; 255 + 1372: cf 5f subi r28, 0xFF ; 255 { uint8_t iface_num; if (udc_num_configuration) { for (iface_num = 0; iface_num < udc_ptr_conf->desc->bNumInterfaces; - 1356: a0 91 bb 20 lds r26, 0x20BB ; 0x8020bb - 135a: b0 91 bc 20 lds r27, 0x20BC ; 0x8020bc - 135e: ed 91 ld r30, X+ - 1360: fc 91 ld r31, X - 1362: 11 97 sbiw r26, 0x01 ; 1 + 1374: a0 91 bb 20 lds r26, 0x20BB ; 0x8020bb + 1378: b0 91 bc 20 lds r27, 0x20BC ; 0x8020bc + 137c: ed 91 ld r30, X+ + 137e: fc 91 ld r31, X + 1380: 11 97 sbiw r26, 0x01 ; 1 void udc_sof_notify(void) { uint8_t iface_num; if (udc_num_configuration) { for (iface_num = 0; - 1364: 84 81 ldd r24, Z+4 ; 0x04 - 1366: c8 17 cp r28, r24 - 1368: 10 f3 brcs .-60 ; 0x132e + 1382: 84 81 ldd r24, Z+4 ; 0x04 + 1384: c8 17 cp r28, r24 + 1386: 10 f3 brcs .-60 ; 0x134c if (udc_ptr_conf->udi_apis[iface_num]->sof_notify != NULL) { udc_ptr_conf->udi_apis[iface_num]->sof_notify(); } } } } - 136a: cf 91 pop r28 - 136c: 08 95 ret + 1388: cf 91 pop r28 + 138a: 08 95 ret -0000136e : +0000138c : * sent to a specific application callback. * * \return true if the request is supported, else the request is stalled by UDD */ bool udc_process_setup(void) { - 136e: 0f 93 push r16 - 1370: 1f 93 push r17 - 1372: cf 93 push r28 - 1374: df 93 push r29 + 138c: 0f 93 push r16 + 138e: 1f 93 push r17 + 1390: cf 93 push r28 + 1392: df 93 push r29 // By default no data (receive/send) and no callbacks registered udd_g_ctrlreq.payload_size = 0; - 1376: e6 e5 ldi r30, 0x56 ; 86 - 1378: f4 e2 ldi r31, 0x24 ; 36 - 137a: 12 86 std Z+10, r1 ; 0x0a - 137c: 13 86 std Z+11, r1 ; 0x0b + 1394: ea e5 ldi r30, 0x5A ; 90 + 1396: f4 e2 ldi r31, 0x24 ; 36 + 1398: 12 86 std Z+10, r1 ; 0x0a + 139a: 13 86 std Z+11, r1 ; 0x0b udd_g_ctrlreq.callback = NULL; - 137e: 14 86 std Z+12, r1 ; 0x0c - 1380: 15 86 std Z+13, r1 ; 0x0d + 139c: 14 86 std Z+12, r1 ; 0x0c + 139e: 15 86 std Z+13, r1 ; 0x0d udd_g_ctrlreq.over_under_run = NULL; - 1382: 16 86 std Z+14, r1 ; 0x0e - 1384: 17 86 std Z+15, r1 ; 0x0f + 13a0: 16 86 std Z+14, r1 ; 0x0e + 13a2: 17 86 std Z+15, r1 ; 0x0f if (Udd_setup_is_in()) { - 1386: 80 81 ld r24, Z - 1388: 88 23 and r24, r24 - 138a: 3c f4 brge .+14 ; 0x139a + 13a4: 80 81 ld r24, Z + 13a6: 88 23 and r24, r24 + 13a8: 3c f4 brge .+14 ; 0x13b8 if (udd_g_ctrlreq.req.wLength == 0) { - 138c: 20 91 5c 24 lds r18, 0x245C ; 0x80245c - 1390: 30 91 5d 24 lds r19, 0x245D ; 0x80245d - 1394: 23 2b or r18, r19 - 1396: 09 f4 brne .+2 ; 0x139a - 1398: 64 c3 rjmp .+1736 ; 0x1a62 + 13aa: 20 91 60 24 lds r18, 0x2460 ; 0x802460 + 13ae: 30 91 61 24 lds r19, 0x2461 ; 0x802461 + 13b2: 23 2b or r18, r19 + 13b4: 09 f4 brne .+2 ; 0x13b8 + 13b6: 64 c3 rjmp .+1736 ; 0x1a80 return false; // Error from USB host } } if (Udd_setup_type() == USB_REQ_TYPE_VENDOR){ - 139a: 80 76 andi r24, 0x60 ; 96 - 139c: 80 34 cpi r24, 0x40 ; 64 - 139e: 09 f0 breq .+2 ; 0x13a2 - 13a0: 02 c1 rjmp .+516 ; 0x15a6 + 13b8: 80 76 andi r24, 0x60 ; 96 + 13ba: 80 34 cpi r24, 0x40 ; 64 + 13bc: 09 f0 breq .+2 ; 0x13c0 + 13be: 02 c1 rjmp .+516 ; 0x15c4 } return false; } static bool udc_reqvend(void){ switch (udd_g_ctrlreq.req.bRequest){ - 13a2: e0 91 57 24 lds r30, 0x2457 ; 0x802457 - 13a6: 8e 2f mov r24, r30 - 13a8: 90 e0 ldi r25, 0x00 ; 0 - 13aa: fc 01 movw r30, r24 - 13ac: e0 5a subi r30, 0xA0 ; 160 - 13ae: f1 09 sbc r31, r1 - 13b0: e8 30 cpi r30, 0x08 ; 8 - 13b2: f1 05 cpc r31, r1 - 13b4: 08 f0 brcs .+2 ; 0x13b8 - 13b6: ee c0 rjmp .+476 ; 0x1594 - 13b8: ea 5f subi r30, 0xFA ; 250 - 13ba: fe 4f sbci r31, 0xFE ; 254 - 13bc: 0c 94 b5 14 jmp 0x296a ; 0x296a <__tablejump2__> + 13c0: e0 91 5b 24 lds r30, 0x245B ; 0x80245b + 13c4: 8e 2f mov r24, r30 + 13c6: 90 e0 ldi r25, 0x00 ; 0 + 13c8: fc 01 movw r30, r24 + 13ca: e0 5a subi r30, 0xA0 ; 160 + 13cc: f1 09 sbc r31, r1 + 13ce: e8 30 cpi r30, 0x08 ; 8 + 13d0: f1 05 cpc r31, r1 + 13d2: 08 f0 brcs .+2 ; 0x13d6 + 13d4: ee c0 rjmp .+476 ; 0x15b2 + 13d6: ea 5f subi r30, 0xFA ; 250 + 13d8: fe 4f sbci r31, 0xFE ; 254 + 13da: 0c 94 c4 14 jmp 0x2988 ; 0x2988 <__tablejump2__> case 0xa0: //Break! (Debug command) asm("nop"); - 13c0: 00 00 nop - 13c2: 53 c3 rjmp .+1702 ; 0x1a6a + 13de: 00 00 nop + 13e0: 53 c3 rjmp .+1702 ; 0x1a88 return 1; case 0xa1: //Receive waveform for signal gen TC_DAC.CTRLA = 0x00; - 13c4: e0 e0 ldi r30, 0x00 ; 0 - 13c6: f8 e0 ldi r31, 0x08 ; 8 - 13c8: 10 82 st Z, r1 + 13e2: e0 e0 ldi r30, 0x00 ; 0 + 13e4: f8 e0 ldi r31, 0x08 ; 8 + 13e6: 10 82 st Z, r1 TC_DAC.PERBUF = udd_g_ctrlreq.req.wValue; - 13ca: c6 e5 ldi r28, 0x56 ; 86 - 13cc: d4 e2 ldi r29, 0x24 ; 36 - 13ce: 8a 81 ldd r24, Y+2 ; 0x02 - 13d0: 9b 81 ldd r25, Y+3 ; 0x03 - 13d2: 86 ab std Z+54, r24 ; 0x36 - 13d4: 97 ab std Z+55, r25 ; 0x37 + 13e8: ca e5 ldi r28, 0x5A ; 90 + 13ea: d4 e2 ldi r29, 0x24 ; 36 + 13ec: 8a 81 ldd r24, Y+2 ; 0x02 + 13ee: 9b 81 ldd r25, Y+3 ; 0x03 + 13f0: 86 ab std Z+54, r24 ; 0x36 + 13f2: 97 ab std Z+55, r25 ; 0x37 TC_DAC.CTRLA = (unsigned char) udd_g_ctrlreq.req.wIndex & 0x0F; - 13d6: 8c 81 ldd r24, Y+4 ; 0x04 - 13d8: 8f 70 andi r24, 0x0F ; 15 - 13da: 80 83 st Z, r24 + 13f4: 8c 81 ldd r24, Y+4 ; 0x04 + 13f6: 8f 70 andi r24, 0x0F ; 15 + 13f8: 80 83 st Z, r24 udd_set_setup_payload(dacBuf_CH1, udd_g_ctrlreq.req.wLength); - 13dc: 6e 81 ldd r22, Y+6 ; 0x06 - 13de: 7f 81 ldd r23, Y+7 ; 0x07 - 13e0: 86 e5 ldi r24, 0x56 ; 86 - 13e2: 92 e2 ldi r25, 0x22 ; 34 - 13e4: f2 d6 rcall .+3556 ; 0x21ca + 13fa: 6e 81 ldd r22, Y+6 ; 0x06 + 13fc: 7f 81 ldd r23, Y+7 ; 0x07 + 13fe: 8a e5 ldi r24, 0x5A ; 90 + 1400: 92 e2 ldi r25, 0x22 ; 34 + 1402: f2 d6 rcall .+3556 ; 0x21e8 if(dacBuf_len != udd_g_ctrlreq.req.wLength){ - 13e6: 8e 81 ldd r24, Y+6 ; 0x06 - 13e8: 9f 81 ldd r25, Y+7 ; 0x07 - 13ea: 20 91 04 20 lds r18, 0x2004 ; 0x802004 - 13ee: 30 91 05 20 lds r19, 0x2005 ; 0x802005 - 13f2: 82 17 cp r24, r18 - 13f4: 93 07 cpc r25, r19 - 13f6: 09 f4 brne .+2 ; 0x13fa - 13f8: 38 c3 rjmp .+1648 ; 0x1a6a + 1404: 8e 81 ldd r24, Y+6 ; 0x06 + 1406: 9f 81 ldd r25, Y+7 ; 0x07 + 1408: 20 91 04 20 lds r18, 0x2004 ; 0x802004 + 140c: 30 91 05 20 lds r19, 0x2005 ; 0x802005 + 1410: 82 17 cp r24, r18 + 1412: 93 07 cpc r25, r19 + 1414: 09 f4 brne .+2 ; 0x1418 + 1416: 38 c3 rjmp .+1648 ; 0x1a88 dacBuf_len = udd_g_ctrlreq.req.wLength; - 13fa: 80 93 04 20 sts 0x2004, r24 ; 0x802004 - 13fe: 90 93 05 20 sts 0x2005, r25 ; 0x802005 + 1418: 80 93 04 20 sts 0x2004, r24 ; 0x802004 + 141c: 90 93 05 20 sts 0x2005, r25 ; 0x802005 switch(global_mode){ - 1402: e0 91 00 20 lds r30, 0x2000 ; 0x802000 <__data_start> - 1406: 8e 2f mov r24, r30 - 1408: 90 e0 ldi r25, 0x00 ; 0 - 140a: 88 30 cpi r24, 0x08 ; 8 - 140c: 91 05 cpc r25, r1 - 140e: 08 f0 brcs .+2 ; 0x1412 - 1410: c3 c0 rjmp .+390 ; 0x1598 - 1412: fc 01 movw r30, r24 - 1414: e2 5f subi r30, 0xF2 ; 242 - 1416: fe 4f sbci r31, 0xFE ; 254 - 1418: 0c 94 b5 14 jmp 0x296a ; 0x296a <__tablejump2__> + 1420: e0 91 00 20 lds r30, 0x2000 ; 0x802000 <__data_start> + 1424: 8e 2f mov r24, r30 + 1426: 90 e0 ldi r25, 0x00 ; 0 + 1428: 88 30 cpi r24, 0x08 ; 8 + 142a: 91 05 cpc r25, r1 + 142c: 08 f0 brcs .+2 ; 0x1430 + 142e: c3 c0 rjmp .+390 ; 0x15b6 + 1430: fc 01 movw r30, r24 + 1432: e2 5f subi r30, 0xF2 ; 242 + 1434: fe 4f sbci r31, 0xFE ; 254 + 1436: 0c 94 c4 14 jmp 0x2988 ; 0x2988 <__tablejump2__> case 0: tiny_dma_set_mode_0(); - 141c: 5a d8 rcall .-3916 ; 0x4d2 - 141e: 25 c3 rjmp .+1610 ; 0x1a6a + 143a: 59 d8 rcall .-3918 ; 0x4ee + 143c: 25 c3 rjmp .+1610 ; 0x1a88 break; case 1: tiny_dma_set_mode_1(); - 1420: d0 d8 rcall .-3680 ; 0x5c2 - 1422: 23 c3 rjmp .+1606 ; 0x1a6a + 143e: cf d8 rcall .-3682 ; 0x5de + 1440: 23 c3 rjmp .+1606 ; 0x1a88 break; case 2: tiny_dma_set_mode_2(); - 1424: 73 d9 rcall .-3354 ; 0x70c - 1426: 21 c3 rjmp .+1602 ; 0x1a6a + 1442: 72 d9 rcall .-3356 ; 0x728 + 1444: 21 c3 rjmp .+1602 ; 0x1a88 break; case 3: tiny_dma_set_mode_3(); - 1428: 13 da rcall .-3034 ; 0x850 - 142a: 1f c3 rjmp .+1598 ; 0x1a6a + 1446: 12 da rcall .-3036 ; 0x86c + 1448: 1f c3 rjmp .+1598 ; 0x1a88 break; case 4: tiny_dma_set_mode_4(); - 142c: a7 da rcall .-2738 ; 0x97c - 142e: 1d c3 rjmp .+1594 ; 0x1a6a + 144a: a6 da rcall .-2740 ; 0x998 + 144c: 1d c3 rjmp .+1594 ; 0x1a88 break; case 5: tiny_dma_set_mode_5(); - 1430: 48 db rcall .-2416 ; 0xac2 - 1432: 1b c3 rjmp .+1590 ; 0x1a6a + 144e: 47 db rcall .-2418 ; 0xade + 1450: 1b c3 rjmp .+1590 ; 0x1a88 break; case 6: tiny_dma_set_mode_6(); - 1434: 8d db rcall .-2278 ; 0xb50 - 1436: 19 c3 rjmp .+1586 ; 0x1a6a + 1452: 8d db rcall .-2278 ; 0xb6e + 1454: 19 c3 rjmp .+1586 ; 0x1a88 break; case 7: tiny_dma_set_mode_7(); - 1438: 02 dc rcall .-2044 ; 0xc3e - 143a: 17 c3 rjmp .+1582 ; 0x1a6a + 1456: 02 dc rcall .-2044 ; 0xc5c + 1458: 17 c3 rjmp .+1582 ; 0x1a88 break; } } return 1; case 0xa2: //CH2 waveform TC_AUXDAC.CTRLA = 0x00; - 143c: e0 e4 ldi r30, 0x40 ; 64 - 143e: f8 e0 ldi r31, 0x08 ; 8 - 1440: 10 82 st Z, r1 + 145a: e0 e4 ldi r30, 0x40 ; 64 + 145c: f8 e0 ldi r31, 0x08 ; 8 + 145e: 10 82 st Z, r1 auxDacBufLen = udd_g_ctrlreq.req.wLength; - 1442: c6 e5 ldi r28, 0x56 ; 86 - 1444: d4 e2 ldi r29, 0x24 ; 36 - 1446: 6e 81 ldd r22, Y+6 ; 0x06 - 1448: 7f 81 ldd r23, Y+7 ; 0x07 - 144a: 60 93 02 20 sts 0x2002, r22 ; 0x802002 - 144e: 70 93 03 20 sts 0x2003, r23 ; 0x802003 + 1460: ca e5 ldi r28, 0x5A ; 90 + 1462: d4 e2 ldi r29, 0x24 ; 36 + 1464: 6e 81 ldd r22, Y+6 ; 0x06 + 1466: 7f 81 ldd r23, Y+7 ; 0x07 + 1468: 60 93 02 20 sts 0x2002, r22 ; 0x802002 + 146c: 70 93 03 20 sts 0x2003, r23 ; 0x802003 TC_AUXDAC.PERBUF = udd_g_ctrlreq.req.wValue; - 1452: 8a 81 ldd r24, Y+2 ; 0x02 - 1454: 9b 81 ldd r25, Y+3 ; 0x03 - 1456: 86 ab std Z+54, r24 ; 0x36 - 1458: 97 ab std Z+55, r25 ; 0x37 + 1470: 8a 81 ldd r24, Y+2 ; 0x02 + 1472: 9b 81 ldd r25, Y+3 ; 0x03 + 1474: 86 ab std Z+54, r24 ; 0x36 + 1476: 97 ab std Z+55, r25 ; 0x37 TC_AUXDAC.CTRLA = (unsigned char) udd_g_ctrlreq.req.wIndex & 0x0F; - 145a: 8c 81 ldd r24, Y+4 ; 0x04 - 145c: 8f 70 andi r24, 0x0F ; 15 - 145e: 80 83 st Z, r24 + 1478: 8c 81 ldd r24, Y+4 ; 0x04 + 147a: 8f 70 andi r24, 0x0F ; 15 + 147c: 80 83 st Z, r24 udd_set_setup_payload(dacBuf_CH2, udd_g_ctrlreq.req.wLength); - 1460: 86 e6 ldi r24, 0x66 ; 102 - 1462: 94 e2 ldi r25, 0x24 ; 36 - 1464: b2 d6 rcall .+3428 ; 0x21ca + 147e: 8a e6 ldi r24, 0x6A ; 106 + 1480: 94 e2 ldi r25, 0x24 ; 36 + 1482: b2 d6 rcall .+3428 ; 0x21e8 if(dacBuf_len != udd_g_ctrlreq.req.wLength){ - 1466: 8e 81 ldd r24, Y+6 ; 0x06 - 1468: 9f 81 ldd r25, Y+7 ; 0x07 - 146a: 20 91 04 20 lds r18, 0x2004 ; 0x802004 - 146e: 30 91 05 20 lds r19, 0x2005 ; 0x802005 - 1472: 82 17 cp r24, r18 - 1474: 93 07 cpc r25, r19 - 1476: 09 f4 brne .+2 ; 0x147a - 1478: f8 c2 rjmp .+1520 ; 0x1a6a + 1484: 8e 81 ldd r24, Y+6 ; 0x06 + 1486: 9f 81 ldd r25, Y+7 ; 0x07 + 1488: 20 91 04 20 lds r18, 0x2004 ; 0x802004 + 148c: 30 91 05 20 lds r19, 0x2005 ; 0x802005 + 1490: 82 17 cp r24, r18 + 1492: 93 07 cpc r25, r19 + 1494: 09 f4 brne .+2 ; 0x1498 + 1496: f8 c2 rjmp .+1520 ; 0x1a88 dacBuf_len = udd_g_ctrlreq.req.wLength; - 147a: 80 93 04 20 sts 0x2004, r24 ; 0x802004 - 147e: 90 93 05 20 sts 0x2005, r25 ; 0x802005 + 1498: 80 93 04 20 sts 0x2004, r24 ; 0x802004 + 149c: 90 93 05 20 sts 0x2005, r25 ; 0x802005 switch(global_mode){ - 1482: e0 91 00 20 lds r30, 0x2000 ; 0x802000 <__data_start> - 1486: 8e 2f mov r24, r30 - 1488: 90 e0 ldi r25, 0x00 ; 0 - 148a: 88 30 cpi r24, 0x08 ; 8 - 148c: 91 05 cpc r25, r1 - 148e: 08 f0 brcs .+2 ; 0x1492 - 1490: 85 c0 rjmp .+266 ; 0x159c - 1492: fc 01 movw r30, r24 - 1494: ea 5e subi r30, 0xEA ; 234 - 1496: fe 4f sbci r31, 0xFE ; 254 - 1498: 0c 94 b5 14 jmp 0x296a ; 0x296a <__tablejump2__> + 14a0: e0 91 00 20 lds r30, 0x2000 ; 0x802000 <__data_start> + 14a4: 8e 2f mov r24, r30 + 14a6: 90 e0 ldi r25, 0x00 ; 0 + 14a8: 88 30 cpi r24, 0x08 ; 8 + 14aa: 91 05 cpc r25, r1 + 14ac: 08 f0 brcs .+2 ; 0x14b0 + 14ae: 85 c0 rjmp .+266 ; 0x15ba + 14b0: fc 01 movw r30, r24 + 14b2: ea 5e subi r30, 0xEA ; 234 + 14b4: fe 4f sbci r31, 0xFE ; 254 + 14b6: 0c 94 c4 14 jmp 0x2988 ; 0x2988 <__tablejump2__> case 0: tiny_dma_set_mode_0(); - 149c: 1a d8 rcall .-4044 ; 0x4d2 - 149e: e5 c2 rjmp .+1482 ; 0x1a6a + 14ba: 19 d8 rcall .-4046 ; 0x4ee + 14bc: e5 c2 rjmp .+1482 ; 0x1a88 break; case 1: tiny_dma_set_mode_1(); - 14a0: 90 d8 rcall .-3808 ; 0x5c2 - 14a2: e3 c2 rjmp .+1478 ; 0x1a6a + 14be: 8f d8 rcall .-3810 ; 0x5de + 14c0: e3 c2 rjmp .+1478 ; 0x1a88 break; case 2: tiny_dma_set_mode_2(); - 14a4: 33 d9 rcall .-3482 ; 0x70c - 14a6: e1 c2 rjmp .+1474 ; 0x1a6a + 14c2: 32 d9 rcall .-3484 ; 0x728 + 14c4: e1 c2 rjmp .+1474 ; 0x1a88 break; case 3: tiny_dma_set_mode_3(); - 14a8: d3 d9 rcall .-3162 ; 0x850 - 14aa: df c2 rjmp .+1470 ; 0x1a6a + 14c6: d2 d9 rcall .-3164 ; 0x86c + 14c8: df c2 rjmp .+1470 ; 0x1a88 break; case 4: tiny_dma_set_mode_4(); - 14ac: 67 da rcall .-2866 ; 0x97c - 14ae: dd c2 rjmp .+1466 ; 0x1a6a + 14ca: 66 da rcall .-2868 ; 0x998 + 14cc: dd c2 rjmp .+1466 ; 0x1a88 break; case 5: tiny_dma_set_mode_5(); - 14b0: 08 db rcall .-2544 ; 0xac2 - 14b2: db c2 rjmp .+1462 ; 0x1a6a + 14ce: 07 db rcall .-2546 ; 0xade + 14d0: db c2 rjmp .+1462 ; 0x1a88 break; case 6: tiny_dma_set_mode_6(); - 14b4: 4d db rcall .-2406 ; 0xb50 - 14b6: d9 c2 rjmp .+1458 ; 0x1a6a + 14d2: 4d db rcall .-2406 ; 0xb6e + 14d4: d9 c2 rjmp .+1458 ; 0x1a88 break; case 7: tiny_dma_set_mode_7(); - 14b8: c2 db rcall .-2172 ; 0xc3e - 14ba: d7 c2 rjmp .+1454 ; 0x1a6a + 14d6: c2 db rcall .-2172 ; 0xc5c + 14d8: d7 c2 rjmp .+1454 ; 0x1a88 break; } } return 1; case 0xa3: //PSU voltage control TC_PSU.CCA = 0; - 14bc: 10 92 68 09 sts 0x0968, r1 ; 0x800968 <__TEXT_REGION_LENGTH__+0x700968> - 14c0: 10 92 69 09 sts 0x0969, r1 ; 0x800969 <__TEXT_REGION_LENGTH__+0x700969> + 14da: 10 92 68 09 sts 0x0968, r1 ; 0x800968 <__TEXT_REGION_LENGTH__+0x700968> + 14de: 10 92 69 09 sts 0x0969, r1 ; 0x800969 <__TEXT_REGION_LENGTH__+0x700969> PSU_target = udd_g_ctrlreq.req.wValue; - 14c4: 80 91 58 24 lds r24, 0x2458 ; 0x802458 - 14c8: 80 93 b2 20 sts 0x20B2, r24 ; 0x8020b2 <__data_end> - 14cc: ce c2 rjmp .+1436 ; 0x1a6a + 14e2: 80 91 5c 24 lds r24, 0x245C ; 0x80245c + 14e6: 80 93 b2 20 sts 0x20B2, r24 ; 0x8020b2 <__data_end> + 14ea: ce c2 rjmp .+1436 ; 0x1a88 return 1; case 0xa4: //Triple mode PORTB.OUT = udd_g_ctrlreq.req.wValue; - 14ce: 80 91 58 24 lds r24, 0x2458 ; 0x802458 - 14d2: 80 93 24 06 sts 0x0624, r24 ; 0x800624 <__TEXT_REGION_LENGTH__+0x700624> - 14d6: c9 c2 rjmp .+1426 ; 0x1a6a + 14ec: 80 91 5c 24 lds r24, 0x245C ; 0x80245c + 14f0: 80 93 24 06 sts 0x0624, r24 ; 0x800624 <__TEXT_REGION_LENGTH__+0x700624> + 14f4: c9 c2 rjmp .+1426 ; 0x1a88 return 1; case 0xa5: //Control Gain and Scope modes switch(udd_g_ctrlreq.req.wValue){ - 14d8: e0 91 58 24 lds r30, 0x2458 ; 0x802458 - 14dc: f0 91 59 24 lds r31, 0x2459 ; 0x802459 - 14e0: e8 30 cpi r30, 0x08 ; 8 - 14e2: f1 05 cpc r31, r1 - 14e4: 08 f0 brcs .+2 ; 0x14e8 - 14e6: 5c c0 rjmp .+184 ; 0x15a0 - 14e8: e2 5e subi r30, 0xE2 ; 226 - 14ea: fe 4f sbci r31, 0xFE ; 254 - 14ec: 0c 94 b5 14 jmp 0x296a ; 0x296a <__tablejump2__> + 14f6: e0 91 5c 24 lds r30, 0x245C ; 0x80245c + 14fa: f0 91 5d 24 lds r31, 0x245D ; 0x80245d + 14fe: e8 30 cpi r30, 0x08 ; 8 + 1500: f1 05 cpc r31, r1 + 1502: 08 f0 brcs .+2 ; 0x1506 + 1504: 5c c0 rjmp .+184 ; 0x15be + 1506: e2 5e subi r30, 0xE2 ; 226 + 1508: fe 4f sbci r31, 0xFE ; 254 + 150a: 0c 94 c4 14 jmp 0x2988 ; 0x2988 <__tablejump2__> case 0: //Mode 0 tiny_adc_setup(0, 0); - 14f0: 60 e0 ldi r22, 0x00 ; 0 - 14f2: 80 e0 ldi r24, 0x00 ; 0 - 14f4: 0e 94 ed 01 call 0x3da ; 0x3da + 150e: 60 e0 ldi r22, 0x00 ; 0 + 1510: 80 e0 ldi r24, 0x00 ; 0 + 1512: 0e 94 fb 01 call 0x3f6 ; 0x3f6 tiny_adc_ch0setup(udd_g_ctrlreq.req.wIndex); - 14f8: 80 91 5a 24 lds r24, 0x245A ; 0x80245a - 14fc: 0e 94 bb 01 call 0x376 ; 0x376 + 1516: 80 91 5e 24 lds r24, 0x245E ; 0x80245e + 151a: 0e 94 c9 01 call 0x392 ; 0x392 tiny_dma_set_mode_0(); - 1500: 0e 94 69 02 call 0x4d2 ; 0x4d2 - 1504: b2 c2 rjmp .+1380 ; 0x1a6a + 151e: 0e 94 77 02 call 0x4ee ; 0x4ee + 1522: b2 c2 rjmp .+1380 ; 0x1a88 break; case 1: //Mode 1 tiny_adc_setup(0, 0); - 1506: 60 e0 ldi r22, 0x00 ; 0 - 1508: 80 e0 ldi r24, 0x00 ; 0 - 150a: 0e 94 ed 01 call 0x3da ; 0x3da + 1524: 60 e0 ldi r22, 0x00 ; 0 + 1526: 80 e0 ldi r24, 0x00 ; 0 + 1528: 0e 94 fb 01 call 0x3f6 ; 0x3f6 tiny_adc_ch0setup(udd_g_ctrlreq.req.wIndex); - 150e: 80 91 5a 24 lds r24, 0x245A ; 0x80245a - 1512: 0e 94 bb 01 call 0x376 ; 0x376 + 152c: 80 91 5e 24 lds r24, 0x245E ; 0x80245e + 1530: 0e 94 c9 01 call 0x392 ; 0x392 tiny_dma_set_mode_1(); - 1516: 55 d8 rcall .-3926 ; 0x5c2 - 1518: a8 c2 rjmp .+1360 ; 0x1a6a + 1534: 54 d8 rcall .-3928 ; 0x5de + 1536: a8 c2 rjmp .+1360 ; 0x1a88 break; case 2: //Mode 2 tiny_adc_setup(1, 1); - 151a: 61 e0 ldi r22, 0x01 ; 1 - 151c: 81 e0 ldi r24, 0x01 ; 1 - 151e: 0e 94 ed 01 call 0x3da ; 0x3da + 1538: 61 e0 ldi r22, 0x01 ; 1 + 153a: 81 e0 ldi r24, 0x01 ; 1 + 153c: 0e 94 fb 01 call 0x3f6 ; 0x3f6 tiny_adc_ch0setup(udd_g_ctrlreq.req.wIndex); - 1522: c6 e5 ldi r28, 0x56 ; 86 - 1524: d4 e2 ldi r29, 0x24 ; 36 - 1526: 8c 81 ldd r24, Y+4 ; 0x04 - 1528: 0e 94 bb 01 call 0x376 ; 0x376 + 1540: ca e5 ldi r28, 0x5A ; 90 + 1542: d4 e2 ldi r29, 0x24 ; 36 + 1544: 8c 81 ldd r24, Y+4 ; 0x04 + 1546: 0e 94 c9 01 call 0x392 ; 0x392 tiny_adc_ch1setup(udd_g_ctrlreq.req.wIndex>>8); - 152c: 8d 81 ldd r24, Y+5 ; 0x05 - 152e: 0e 94 d0 01 call 0x3a0 ; 0x3a0 + 154a: 8d 81 ldd r24, Y+5 ; 0x05 + 154c: 0e 94 de 01 call 0x3bc ; 0x3bc tiny_dma_set_mode_2(); - 1532: ec d8 rcall .-3624 ; 0x70c - 1534: 9a c2 rjmp .+1332 ; 0x1a6a + 1550: eb d8 rcall .-3626 ; 0x728 + 1552: 9a c2 rjmp .+1332 ; 0x1a88 break; case 3: //Mode 3 tiny_dma_set_mode_3(); - 1536: 8c d9 rcall .-3304 ; 0x850 - 1538: 98 c2 rjmp .+1328 ; 0x1a6a + 1554: 8b d9 rcall .-3306 ; 0x86c + 1556: 98 c2 rjmp .+1328 ; 0x1a88 break; case 4: //Mode 4 tiny_dma_set_mode_4(); - 153a: 20 da rcall .-3008 ; 0x97c - 153c: 96 c2 rjmp .+1324 ; 0x1a6a + 1558: 1f da rcall .-3010 ; 0x998 + 155a: 96 c2 rjmp .+1324 ; 0x1a88 break; case 5: //Mode 5 tiny_adc_setup(0, 0); - 153e: 60 e0 ldi r22, 0x00 ; 0 - 1540: 80 e0 ldi r24, 0x00 ; 0 - 1542: 0e 94 ed 01 call 0x3da ; 0x3da + 155c: 60 e0 ldi r22, 0x00 ; 0 + 155e: 80 e0 ldi r24, 0x00 ; 0 + 1560: 0e 94 fb 01 call 0x3f6 ; 0x3f6 tiny_adc_ch0setup(udd_g_ctrlreq.req.wIndex); - 1546: 80 91 5a 24 lds r24, 0x245A ; 0x80245a - 154a: 0e 94 bb 01 call 0x376 ; 0x376 + 1564: 80 91 5e 24 lds r24, 0x245E ; 0x80245e + 1568: 0e 94 c9 01 call 0x392 ; 0x392 tiny_dma_set_mode_5(); - 154e: b9 da rcall .-2702 ; 0xac2 - 1550: 8c c2 rjmp .+1304 ; 0x1a6a + 156c: b8 da rcall .-2704 ; 0xade + 156e: 8c c2 rjmp .+1304 ; 0x1a88 break; case 6: //Mode 6 tiny_adc_setup(0, 1); - 1552: 61 e0 ldi r22, 0x01 ; 1 - 1554: 80 e0 ldi r24, 0x00 ; 0 - 1556: 0e 94 ed 01 call 0x3da ; 0x3da + 1570: 61 e0 ldi r22, 0x01 ; 1 + 1572: 80 e0 ldi r24, 0x00 ; 0 + 1574: 0e 94 fb 01 call 0x3f6 ; 0x3f6 tiny_adc_ch0setup(udd_g_ctrlreq.req.wIndex); - 155a: 80 91 5a 24 lds r24, 0x245A ; 0x80245a - 155e: 0e 94 bb 01 call 0x376 ; 0x376 + 1578: 80 91 5e 24 lds r24, 0x245E ; 0x80245e + 157c: 0e 94 c9 01 call 0x392 ; 0x392 tiny_dma_set_mode_6(); - 1562: f6 da rcall .-2580 ; 0xb50 - 1564: 82 c2 rjmp .+1284 ; 0x1a6a + 1580: f6 da rcall .-2580 ; 0xb6e + 1582: 82 c2 rjmp .+1284 ; 0x1a88 break; case 7: //Mode 7 tiny_adc_setup(0, 2); - 1566: 62 e0 ldi r22, 0x02 ; 2 - 1568: 80 e0 ldi r24, 0x00 ; 0 - 156a: 0e 94 ed 01 call 0x3da ; 0x3da + 1584: 62 e0 ldi r22, 0x02 ; 2 + 1586: 80 e0 ldi r24, 0x00 ; 0 + 1588: 0e 94 fb 01 call 0x3f6 ; 0x3f6 tiny_adc_ch0setup(udd_g_ctrlreq.req.wIndex | 0x80); - 156e: 80 91 5a 24 lds r24, 0x245A ; 0x80245a - 1572: 80 68 ori r24, 0x80 ; 128 - 1574: 0e 94 bb 01 call 0x376 ; 0x376 + 158c: 80 91 5e 24 lds r24, 0x245E ; 0x80245e + 1590: 80 68 ori r24, 0x80 ; 128 + 1592: 0e 94 c9 01 call 0x392 ; 0x392 tiny_dma_set_mode_7(); - 1578: 62 db rcall .-2364 ; 0xc3e - 157a: 77 c2 rjmp .+1262 ; 0x1a6a + 1596: 62 db rcall .-2364 ; 0xc5c + 1598: 77 c2 rjmp .+1262 ; 0x1a88 default: return 0; } return 1; case 0xa6: //Digital out??? PORTE.OUT = udd_g_ctrlreq.req.wValue; - 157c: 80 91 58 24 lds r24, 0x2458 ; 0x802458 - 1580: 80 93 84 06 sts 0x0684, r24 ; 0x800684 <__TEXT_REGION_LENGTH__+0x700684> - 1584: 72 c2 rjmp .+1252 ; 0x1a6a + 159a: 80 91 5c 24 lds r24, 0x245C ; 0x80245c + 159e: 80 93 84 06 sts 0x0684, r24 ; 0x800684 <__TEXT_REGION_LENGTH__+0x700684> + 15a2: 72 c2 rjmp .+1252 ; 0x1a88 case 0xa7: //Soft Reset //Code here from SprinterSB //http://www.avrfreaks.net/comment/872674 //I don't understand it, but it seems to do the job __asm volatile ("cli" "\n\t" - 1586: e9 e7 ldi r30, 0x79 ; 121 - 1588: f0 e0 ldi r31, 0x00 ; 0 - 158a: 91 e0 ldi r25, 0x01 ; 1 - 158c: 88 ed ldi r24, 0xD8 ; 216 - 158e: f8 94 cli - 1590: 84 bf out 0x34, r24 ; 52 - 1592: 90 83 st Z, r25 + 15a4: e9 e7 ldi r30, 0x79 ; 121 + 15a6: f0 e0 ldi r31, 0x00 ; 0 + 15a8: 91 e0 ldi r25, 0x01 ; 1 + 15aa: 88 ed ldi r24, 0xD8 ; 216 + 15ac: f8 94 cli + 15ae: 84 bf out 0x34, r24 ; 52 + 15b0: 90 83 st Z, r25 [swrst] "r" ((uint8_t) RST_SWRST_bm), [rst] "e" (&RST.CTRL) : "memory"); __builtin_unreachable(); default: return 0; - 1594: 80 e0 ldi r24, 0x00 ; 0 - 1596: 05 c0 rjmp .+10 ; 0x15a2 + 15b2: 80 e0 ldi r24, 0x00 ; 0 + 15b4: 05 c0 rjmp .+10 ; 0x15c0 case 7: tiny_dma_set_mode_7(); break; } } return 1; - 1598: 81 e0 ldi r24, 0x01 ; 1 - 159a: 03 c0 rjmp .+6 ; 0x15a2 + 15b6: 81 e0 ldi r24, 0x01 ; 1 + 15b8: 03 c0 rjmp .+6 ; 0x15c0 case 7: tiny_dma_set_mode_7(); break; } } return 1; - 159c: 81 e0 ldi r24, 0x01 ; 1 - 159e: 01 c0 rjmp .+2 ; 0x15a2 + 15ba: 81 e0 ldi r24, 0x01 ; 1 + 15bc: 01 c0 rjmp .+2 ; 0x15c0 tiny_adc_setup(0, 2); tiny_adc_ch0setup(udd_g_ctrlreq.req.wIndex | 0x80); tiny_dma_set_mode_7(); break; default: return 0; - 15a0: 80 e0 ldi r24, 0x00 ; 0 + 15be: 80 e0 ldi r24, 0x00 ; 0 return false; // Error from USB host } } if (Udd_setup_type() == USB_REQ_TYPE_VENDOR){ if (udc_reqvend()) { - 15a2: 81 11 cpse r24, r1 - 15a4: 65 c2 rjmp .+1226 ; 0x1a70 + 15c0: 81 11 cpse r24, r1 + 15c2: 65 c2 rjmp .+1226 ; 0x1a8e return true; } } // If standard request then try to decode it in UDC if (Udd_setup_type() == USB_REQ_TYPE_STANDARD) { - 15a6: 80 91 56 24 lds r24, 0x2456 ; 0x802456 - 15aa: 98 2f mov r25, r24 - 15ac: 90 76 andi r25, 0x60 ; 96 - 15ae: 09 f0 breq .+2 ; 0x15b2 - 15b0: e1 c1 rjmp .+962 ; 0x1974 + 15c4: 80 91 5a 24 lds r24, 0x245A ; 0x80245a + 15c8: 98 2f mov r25, r24 + 15ca: 90 76 andi r25, 0x60 ; 96 + 15cc: 09 f0 breq .+2 ; 0x15d0 + 15ce: e1 c1 rjmp .+962 ; 0x1992 * * \return true if the request is supported */ static bool udc_reqstd(void) { if (Udd_setup_is_in()) { - 15b2: 88 23 and r24, r24 - 15b4: 0c f0 brlt .+2 ; 0x15b8 - 15b6: 05 c1 rjmp .+522 ; 0x17c2 + 15d0: 88 23 and r24, r24 + 15d2: 0c f0 brlt .+2 ; 0x15d6 + 15d4: 05 c1 rjmp .+522 ; 0x17e0 // GET Standard Requests if (udd_g_ctrlreq.req.wLength == 0) { - 15b8: 20 91 5c 24 lds r18, 0x245C ; 0x80245c - 15bc: 30 91 5d 24 lds r19, 0x245D ; 0x80245d - 15c0: 21 15 cp r18, r1 - 15c2: 31 05 cpc r19, r1 - 15c4: 09 f4 brne .+2 ; 0x15c8 - 15c6: d6 c1 rjmp .+940 ; 0x1974 + 15d6: 20 91 60 24 lds r18, 0x2460 ; 0x802460 + 15da: 30 91 61 24 lds r19, 0x2461 ; 0x802461 + 15de: 21 15 cp r18, r1 + 15e0: 31 05 cpc r19, r1 + 15e2: 09 f4 brne .+2 ; 0x15e6 + 15e4: d6 c1 rjmp .+940 ; 0x1992 return false; // Error for USB host } if (USB_REQ_RECIP_DEVICE == Udd_setup_recipient()) { - 15c8: 8f 71 andi r24, 0x1F ; 31 - 15ca: 09 f0 breq .+2 ; 0x15ce - 15cc: a3 c0 rjmp .+326 ; 0x1714 + 15e6: 8f 71 andi r24, 0x1F ; 31 + 15e8: 09 f0 breq .+2 ; 0x15ec + 15ea: a3 c0 rjmp .+326 ; 0x1732 // Standard Get Device request switch (udd_g_ctrlreq.req.bRequest) { - 15ce: 90 91 57 24 lds r25, 0x2457 ; 0x802457 - 15d2: 96 30 cpi r25, 0x06 ; 6 - 15d4: 79 f0 breq .+30 ; 0x15f4 - 15d6: 98 30 cpi r25, 0x08 ; 8 - 15d8: 09 f4 brne .+2 ; 0x15dc - 15da: 92 c0 rjmp .+292 ; 0x1700 - 15dc: 91 11 cpse r25, r1 - 15de: 9a c0 rjmp .+308 ; 0x1714 + 15ec: 90 91 5b 24 lds r25, 0x245B ; 0x80245b + 15f0: 96 30 cpi r25, 0x06 ; 6 + 15f2: 79 f0 breq .+30 ; 0x1612 + 15f4: 98 30 cpi r25, 0x08 ; 8 + 15f6: 09 f4 brne .+2 ; 0x15fa + 15f8: 92 c0 rjmp .+292 ; 0x171e + 15fa: 91 11 cpse r25, r1 + 15fc: 9a c0 rjmp .+308 ; 0x1732 * * \return true if success */ static bool udc_req_std_dev_get_status(void) { if (udd_g_ctrlreq.req.wLength != sizeof(udc_device_status)) { - 15e0: 22 30 cpi r18, 0x02 ; 2 - 15e2: 31 05 cpc r19, r1 - 15e4: 09 f0 breq .+2 ; 0x15e8 - 15e6: c6 c1 rjmp .+908 ; 0x1974 + 15fe: 22 30 cpi r18, 0x02 ; 2 + 1600: 31 05 cpc r19, r1 + 1602: 09 f0 breq .+2 ; 0x1606 + 1604: c6 c1 rjmp .+908 ; 0x1992 return false; } udd_set_setup_payload( (uint8_t *) & udc_device_status, - 15e8: 62 e0 ldi r22, 0x02 ; 2 - 15ea: 70 e0 ldi r23, 0x00 ; 0 - 15ec: 82 ec ldi r24, 0xC2 ; 194 - 15ee: 90 e2 ldi r25, 0x20 ; 32 - 15f0: ec d5 rcall .+3032 ; 0x21ca - 15f2: 3d c2 rjmp .+1146 ; 0x1a6e + 1606: 62 e0 ldi r22, 0x02 ; 2 + 1608: 70 e0 ldi r23, 0x00 ; 0 + 160a: 82 ec ldi r24, 0xC2 ; 194 + 160c: 90 e2 ldi r25, 0x20 ; 32 + 160e: ec d5 rcall .+3032 ; 0x21e8 + 1610: 3d c2 rjmp .+1146 ; 0x1a8c */ static bool udc_req_std_dev_get_descriptor(void) { uint8_t conf_num; conf_num = udd_g_ctrlreq.req.wValue & 0xff; - 15f4: 80 91 58 24 lds r24, 0x2458 ; 0x802458 - 15f8: 90 91 59 24 lds r25, 0x2459 ; 0x802459 + 1612: 80 91 5c 24 lds r24, 0x245C ; 0x80245c + 1616: 90 91 5d 24 lds r25, 0x245D ; 0x80245d // Check descriptor ID switch ((uint8_t) (udd_g_ctrlreq.req.wValue >> 8)) { - 15fc: 29 2f mov r18, r25 - 15fe: 33 27 eor r19, r19 - 1600: 22 30 cpi r18, 0x02 ; 2 - 1602: 31 05 cpc r19, r1 - 1604: a9 f0 breq .+42 ; 0x1630 - 1606: 24 f4 brge .+8 ; 0x1610 - 1608: 21 30 cpi r18, 0x01 ; 1 - 160a: 31 05 cpc r19, r1 - 160c: 41 f0 breq .+16 ; 0x161e - 160e: a9 c1 rjmp .+850 ; 0x1962 - 1610: 23 30 cpi r18, 0x03 ; 3 - 1612: 31 05 cpc r19, r1 - 1614: d9 f1 breq .+118 ; 0x168c - 1616: 2f 30 cpi r18, 0x0F ; 15 - 1618: 31 05 cpc r19, r1 - 161a: 51 f1 breq .+84 ; 0x1670 - 161c: a2 c1 rjmp .+836 ; 0x1962 + 161a: 29 2f mov r18, r25 + 161c: 33 27 eor r19, r19 + 161e: 22 30 cpi r18, 0x02 ; 2 + 1620: 31 05 cpc r19, r1 + 1622: a9 f0 breq .+42 ; 0x164e + 1624: 24 f4 brge .+8 ; 0x162e + 1626: 21 30 cpi r18, 0x01 ; 1 + 1628: 31 05 cpc r19, r1 + 162a: 41 f0 breq .+16 ; 0x163c + 162c: a9 c1 rjmp .+850 ; 0x1980 + 162e: 23 30 cpi r18, 0x03 ; 3 + 1630: 31 05 cpc r19, r1 + 1632: d9 f1 breq .+118 ; 0x16aa + 1634: 2f 30 cpi r18, 0x0F ; 15 + 1636: 31 05 cpc r19, r1 + 1638: 51 f1 breq .+84 ; 0x168e + 163a: a2 c1 rjmp .+836 ; 0x1980 } else #endif { udd_set_setup_payload( (uint8_t *) udc_config.confdev_lsfs, udc_config.confdev_lsfs->bLength); - 161e: 80 91 10 20 lds r24, 0x2010 ; 0x802010 - 1622: 90 91 11 20 lds r25, 0x2011 ; 0x802011 + 163c: 80 91 10 20 lds r24, 0x2010 ; 0x802010 + 1640: 90 91 11 20 lds r25, 0x2011 ; 0x802011 (uint8_t *) udc_config.confdev_hs, udc_config.confdev_hs->bLength); } else #endif { udd_set_setup_payload( - 1626: dc 01 movw r26, r24 - 1628: 6c 91 ld r22, X - 162a: 70 e0 ldi r23, 0x00 ; 0 - 162c: ce d5 rcall .+2972 ; 0x21ca - 162e: 59 c0 rjmp .+178 ; 0x16e2 + 1644: dc 01 movw r26, r24 + 1646: 6c 91 ld r22, X + 1648: 70 e0 ldi r23, 0x00 ; 0 + 164a: ce d5 rcall .+2972 ; 0x21e8 + 164c: 59 c0 rjmp .+178 ; 0x1700 le16_to_cpu(udc_config.conf_hs[conf_num].desc->wTotalLength)); } else #endif { // FS descriptor if (conf_num >= udc_config.confdev_lsfs-> - 1630: e0 91 10 20 lds r30, 0x2010 ; 0x802010 - 1634: f0 91 11 20 lds r31, 0x2011 ; 0x802011 - 1638: 21 89 ldd r18, Z+17 ; 0x11 - 163a: 82 17 cp r24, r18 - 163c: 08 f0 brcs .+2 ; 0x1640 - 163e: 9a c1 rjmp .+820 ; 0x1974 + 164e: e0 91 10 20 lds r30, 0x2010 ; 0x802010 + 1652: f0 91 11 20 lds r31, 0x2011 ; 0x802011 + 1656: 21 89 ldd r18, Z+17 ; 0x11 + 1658: 82 17 cp r24, r18 + 165a: 08 f0 brcs .+2 ; 0x165e + 165c: 9a c1 rjmp .+820 ; 0x1992 bNumConfigurations) { return false; } udd_set_setup_payload( (uint8_t *)udc_config.conf_lsfs[conf_num].desc, le16_to_cpu(udc_config.conf_lsfs[conf_num].desc->wTotalLength)); - 1640: 99 27 eor r25, r25 - 1642: 88 0f add r24, r24 - 1644: 99 1f adc r25, r25 - 1646: 88 0f add r24, r24 - 1648: 99 1f adc r25, r25 - 164a: e0 91 12 20 lds r30, 0x2012 ; 0x802012 - 164e: f0 91 13 20 lds r31, 0x2013 ; 0x802013 - 1652: e8 0f add r30, r24 - 1654: f9 1f adc r31, r25 - 1656: 80 81 ld r24, Z - 1658: 91 81 ldd r25, Z+1 ; 0x01 + 165e: 99 27 eor r25, r25 + 1660: 88 0f add r24, r24 + 1662: 99 1f adc r25, r25 + 1664: 88 0f add r24, r24 + 1666: 99 1f adc r25, r25 + 1668: e0 91 12 20 lds r30, 0x2012 ; 0x802012 + 166c: f0 91 13 20 lds r31, 0x2013 ; 0x802013 + 1670: e8 0f add r30, r24 + 1672: f9 1f adc r31, r25 + 1674: 80 81 ld r24, Z + 1676: 91 81 ldd r25, Z+1 ; 0x01 // FS descriptor if (conf_num >= udc_config.confdev_lsfs-> bNumConfigurations) { return false; } udd_set_setup_payload( - 165a: fc 01 movw r30, r24 - 165c: 62 81 ldd r22, Z+2 ; 0x02 - 165e: 73 81 ldd r23, Z+3 ; 0x03 - 1660: b4 d5 rcall .+2920 ; 0x21ca + 1678: fc 01 movw r30, r24 + 167a: 62 81 ldd r22, Z+2 ; 0x02 + 167c: 73 81 ldd r23, Z+3 ; 0x03 + 167e: b4 d5 rcall .+2920 ; 0x21e8 (uint8_t *)udc_config.conf_lsfs[conf_num].desc, le16_to_cpu(udc_config.conf_lsfs[conf_num].desc->wTotalLength)); } ((usb_conf_desc_t *) udd_g_ctrlreq.payload)->bDescriptorType = - 1662: e0 91 5e 24 lds r30, 0x245E ; 0x80245e - 1666: f0 91 5f 24 lds r31, 0x245F ; 0x80245f - 166a: 82 e0 ldi r24, 0x02 ; 2 - 166c: 81 83 std Z+1, r24 ; 0x01 - 166e: 39 c0 rjmp .+114 ; 0x16e2 + 1680: e0 91 62 24 lds r30, 0x2462 ; 0x802462 + 1684: f0 91 63 24 lds r31, 0x2463 ; 0x802463 + 1688: 82 e0 ldi r24, 0x02 ; 2 + 168a: 81 83 std Z+1, r24 ; 0x01 + 168c: 39 c0 rjmp .+114 ; 0x1700 break; #endif case USB_DT_BOS: // Device BOS descriptor requested if (udc_config.conf_bos == NULL) { - 1670: 80 91 14 20 lds r24, 0x2014 ; 0x802014 - 1674: 90 91 15 20 lds r25, 0x2015 ; 0x802015 - 1678: 00 97 sbiw r24, 0x00 ; 0 - 167a: 09 f4 brne .+2 ; 0x167e - 167c: 7b c1 rjmp .+758 ; 0x1974 + 168e: 80 91 14 20 lds r24, 0x2014 ; 0x802014 + 1692: 90 91 15 20 lds r25, 0x2015 ; 0x802015 + 1696: 00 97 sbiw r24, 0x00 ; 0 + 1698: 09 f4 brne .+2 ; 0x169c + 169a: 7b c1 rjmp .+758 ; 0x1992 return false; } udd_set_setup_payload( (uint8_t *) udc_config.conf_bos, - 167e: dc 01 movw r26, r24 - 1680: 12 96 adiw r26, 0x02 ; 2 - 1682: 6d 91 ld r22, X+ - 1684: 7c 91 ld r23, X - 1686: 13 97 sbiw r26, 0x03 ; 3 - 1688: a0 d5 rcall .+2880 ; 0x21ca - 168a: 2b c0 rjmp .+86 ; 0x16e2 + 169c: dc 01 movw r26, r24 + 169e: 12 96 adiw r26, 0x02 ; 2 + 16a0: 6d 91 ld r22, X+ + 16a2: 7c 91 ld r23, X + 16a4: 13 97 sbiw r26, 0x03 ; 3 + 16a6: a0 d5 rcall .+2880 ; 0x21e8 + 16a8: 2b c0 rjmp .+86 ; 0x1700 uint8_t i; const uint8_t *str; uint8_t str_length = 0; // Link payload pointer to the string corresponding at request switch (udd_g_ctrlreq.req.wValue & 0xff) { - 168c: 99 27 eor r25, r25 - 168e: 81 30 cpi r24, 0x01 ; 1 - 1690: 91 05 cpc r25, r1 - 1692: 71 f0 breq .+28 ; 0x16b0 - 1694: 38 f0 brcs .+14 ; 0x16a4 - 1696: 02 97 sbiw r24, 0x02 ; 2 - 1698: 09 f0 breq .+2 ; 0x169c - 169a: 6c c1 rjmp .+728 ; 0x1974 + 16aa: 99 27 eor r25, r25 + 16ac: 81 30 cpi r24, 0x01 ; 1 + 16ae: 91 05 cpc r25, r1 + 16b0: 71 f0 breq .+28 ; 0x16ce + 16b2: 38 f0 brcs .+14 ; 0x16c2 + 16b4: 02 97 sbiw r24, 0x02 ; 2 + 16b6: 09 f0 breq .+2 ; 0x16ba + 16b8: 6c c1 rjmp .+728 ; 0x1992 break; #endif #ifdef USB_DEVICE_PRODUCT_NAME case 2: str_length = USB_DEVICE_PRODUCT_NAME_SIZE; str = udc_string_product_name; - 169c: 8a e8 ldi r24, 0x8A ; 138 - 169e: 90 e2 ldi r25, 0x20 ; 32 + 16ba: 8a e8 ldi r24, 0x8A ; 138 + 16bc: 90 e2 ldi r25, 0x20 ; 32 str = udc_string_manufacturer_name; break; #endif #ifdef USB_DEVICE_PRODUCT_NAME case 2: str_length = USB_DEVICE_PRODUCT_NAME_SIZE; - 16a0: 28 e1 ldi r18, 0x18 ; 24 - 16a2: 09 c0 rjmp .+18 ; 0x16b6 + 16be: 28 e1 ldi r18, 0x18 ; 24 + 16c0: 09 c0 rjmp .+18 ; 0x16d4 uint8_t str_length = 0; // Link payload pointer to the string corresponding at request switch (udd_g_ctrlreq.req.wValue & 0xff) { case 0: udd_set_setup_payload((uint8_t *) &udc_string_desc_languageid, - 16a4: 64 e0 ldi r22, 0x04 ; 4 - 16a6: 70 e0 ldi r23, 0x00 ; 0 - 16a8: 8e ea ldi r24, 0xAE ; 174 - 16aa: 90 e2 ldi r25, 0x20 ; 32 - 16ac: 8e d5 rcall .+2844 ; 0x21ca - 16ae: 19 c0 rjmp .+50 ; 0x16e2 + 16c2: 64 e0 ldi r22, 0x04 ; 4 + 16c4: 70 e0 ldi r23, 0x00 ; 0 + 16c6: 8e ea ldi r24, 0xAE ; 174 + 16c8: 90 e2 ldi r25, 0x20 ; 32 + 16ca: 8e d5 rcall .+2844 ; 0x21e8 + 16cc: 19 c0 rjmp .+50 ; 0x1700 break; #ifdef USB_DEVICE_MANUFACTURE_NAME case 1: str_length = USB_DEVICE_MANUFACTURE_NAME_SIZE; str = udc_string_manufacturer_name; - 16b0: 83 ea ldi r24, 0xA3 ; 163 - 16b2: 90 e2 ldi r25, 0x20 ; 32 + 16ce: 83 ea ldi r24, 0xA3 ; 163 + 16d0: 90 e2 ldi r25, 0x20 ; 32 sizeof(udc_string_desc_languageid)); break; #ifdef USB_DEVICE_MANUFACTURE_NAME case 1: str_length = USB_DEVICE_MANUFACTURE_NAME_SIZE; - 16b4: 29 e0 ldi r18, 0x09 ; 9 - 16b6: 38 2f mov r19, r24 - 16b8: aa e5 ldi r26, 0x5A ; 90 - 16ba: b0 e2 ldi r27, 0x20 ; 32 + 16d2: 29 e0 ldi r18, 0x09 ; 9 + 16d4: 38 2f mov r19, r24 + 16d6: aa e5 ldi r26, 0x5A ; 90 + 16d8: b0 e2 ldi r27, 0x20 ; 32 str = udc_string_manufacturer_name; break; #endif #ifdef USB_DEVICE_PRODUCT_NAME case 2: str_length = USB_DEVICE_PRODUCT_NAME_SIZE; - 16bc: e8 2f mov r30, r24 - 16be: f9 2f mov r31, r25 + 16da: e8 2f mov r30, r24 + 16dc: f9 2f mov r31, r25 return false; } if (str_length) { for(i = 0; i < str_length; i++) { udc_string_desc.string[i] = cpu_to_le16((le16_t)str[i]); - 16c0: 81 91 ld r24, Z+ - 16c2: 90 e0 ldi r25, 0x00 ; 0 - 16c4: 8d 93 st X+, r24 - 16c6: 9d 93 st X+, r25 - 16c8: 8e 2f mov r24, r30 - 16ca: 83 1b sub r24, r19 + 16de: 81 91 ld r24, Z+ + 16e0: 90 e0 ldi r25, 0x00 ; 0 + 16e2: 8d 93 st X+, r24 + 16e4: 9d 93 st X+, r25 + 16e6: 8e 2f mov r24, r30 + 16e8: 83 1b sub r24, r19 #endif return false; } if (str_length) { for(i = 0; i < str_length; i++) { - 16cc: 82 17 cp r24, r18 - 16ce: c0 f3 brcs .-16 ; 0x16c0 + 16ea: 82 17 cp r24, r18 + 16ec: c0 f3 brcs .-16 ; 0x16de udc_string_desc.string[i] = cpu_to_le16((le16_t)str[i]); } udc_string_desc.header.bLength = 2 + (str_length) * 2; - 16d0: 62 2f mov r22, r18 - 16d2: 66 0f add r22, r22 - 16d4: 6e 5f subi r22, 0xFE ; 254 - 16d6: 60 93 58 20 sts 0x2058, r22 ; 0x802058 + 16ee: 62 2f mov r22, r18 + 16f0: 66 0f add r22, r22 + 16f2: 6e 5f subi r22, 0xFE ; 254 + 16f4: 60 93 58 20 sts 0x2058, r22 ; 0x802058 udd_set_setup_payload( - 16da: 70 e0 ldi r23, 0x00 ; 0 - 16dc: 88 e5 ldi r24, 0x58 ; 88 - 16de: 90 e2 ldi r25, 0x20 ; 32 - 16e0: 74 d5 rcall .+2792 ; 0x21ca + 16f8: 70 e0 ldi r23, 0x00 ; 0 + 16fa: 88 e5 ldi r24, 0x58 ; 88 + 16fc: 90 e2 ldi r25, 0x20 ; 32 + 16fe: 74 d5 rcall .+2792 ; 0x21e8 default: // Unknown descriptor requested return false; } // if the descriptor is larger than length requested, then reduce it if (udd_g_ctrlreq.req.wLength < udd_g_ctrlreq.payload_size) { - 16e2: e6 e5 ldi r30, 0x56 ; 86 - 16e4: f4 e2 ldi r31, 0x24 ; 36 - 16e6: 86 81 ldd r24, Z+6 ; 0x06 - 16e8: 97 81 ldd r25, Z+7 ; 0x07 - 16ea: 22 85 ldd r18, Z+10 ; 0x0a - 16ec: 33 85 ldd r19, Z+11 ; 0x0b - 16ee: 82 17 cp r24, r18 - 16f0: 93 07 cpc r25, r19 - 16f2: 08 f0 brcs .+2 ; 0x16f6 - 16f4: bc c1 rjmp .+888 ; 0x1a6e + 1700: ea e5 ldi r30, 0x5A ; 90 + 1702: f4 e2 ldi r31, 0x24 ; 36 + 1704: 86 81 ldd r24, Z+6 ; 0x06 + 1706: 97 81 ldd r25, Z+7 ; 0x07 + 1708: 22 85 ldd r18, Z+10 ; 0x0a + 170a: 33 85 ldd r19, Z+11 ; 0x0b + 170c: 82 17 cp r24, r18 + 170e: 93 07 cpc r25, r19 + 1710: 08 f0 brcs .+2 ; 0x1714 + 1712: bc c1 rjmp .+888 ; 0x1a8c udd_g_ctrlreq.payload_size = udd_g_ctrlreq.req.wLength; - 16f6: 80 93 60 24 sts 0x2460, r24 ; 0x802460 - 16fa: 90 93 61 24 sts 0x2461, r25 ; 0x802461 - 16fe: b7 c1 rjmp .+878 ; 0x1a6e + 1714: 80 93 64 24 sts 0x2464, r24 ; 0x802464 + 1718: 90 93 65 24 sts 0x2465, r25 ; 0x802465 + 171c: b7 c1 rjmp .+878 ; 0x1a8c * * \return true if success */ static bool udc_req_std_dev_get_configuration(void) { if (udd_g_ctrlreq.req.wLength != 1) { - 1700: 21 30 cpi r18, 0x01 ; 1 - 1702: 31 05 cpc r19, r1 - 1704: 09 f0 breq .+2 ; 0x1708 - 1706: 36 c1 rjmp .+620 ; 0x1974 + 171e: 21 30 cpi r18, 0x01 ; 1 + 1720: 31 05 cpc r19, r1 + 1722: 09 f0 breq .+2 ; 0x1726 + 1724: 36 c1 rjmp .+620 ; 0x1992 return false; } udd_set_setup_payload(&udc_num_configuration,1); - 1708: 61 e0 ldi r22, 0x01 ; 1 - 170a: 70 e0 ldi r23, 0x00 ; 0 - 170c: 8e eb ldi r24, 0xBE ; 190 - 170e: 90 e2 ldi r25, 0x20 ; 32 - 1710: 5c d5 rcall .+2744 ; 0x21ca - 1712: ad c1 rjmp .+858 ; 0x1a6e + 1726: 61 e0 ldi r22, 0x01 ; 1 + 1728: 70 e0 ldi r23, 0x00 ; 0 + 172a: 8e eb ldi r24, 0xBE ; 190 + 172c: 90 e2 ldi r25, 0x20 ; 32 + 172e: 5c d5 rcall .+2744 ; 0x21e8 + 1730: ad c1 rjmp .+858 ; 0x1a8c default: break; } } if (USB_REQ_RECIP_INTERFACE == Udd_setup_recipient()) { - 1714: 81 30 cpi r24, 0x01 ; 1 - 1716: e1 f5 brne .+120 ; 0x1790 + 1732: 81 30 cpi r24, 0x01 ; 1 + 1734: e1 f5 brne .+120 ; 0x17ae // Standard Get Interface request switch (udd_g_ctrlreq.req.bRequest) { - 1718: 90 91 57 24 lds r25, 0x2457 ; 0x802457 - 171c: 9a 30 cpi r25, 0x0A ; 10 - 171e: c1 f5 brne .+112 ; 0x1790 + 1736: 90 91 5b 24 lds r25, 0x245B ; 0x80245b + 173a: 9a 30 cpi r25, 0x0A ; 10 + 173c: c1 f5 brne .+112 ; 0x17ae static bool udc_req_std_iface_get_setting(void) { uint8_t iface_num; udi_api_t UDC_DESC_STORAGE *udi_api; if (udd_g_ctrlreq.req.wLength != 1) { - 1720: 21 30 cpi r18, 0x01 ; 1 - 1722: 31 05 cpc r19, r1 - 1724: 09 f0 breq .+2 ; 0x1728 - 1726: 26 c1 rjmp .+588 ; 0x1974 + 173e: 21 30 cpi r18, 0x01 ; 1 + 1740: 31 05 cpc r19, r1 + 1742: 09 f0 breq .+2 ; 0x1746 + 1744: 26 c1 rjmp .+588 ; 0x1992 return false; // Error in request } if (!udc_num_configuration) { - 1728: 80 91 be 20 lds r24, 0x20BE ; 0x8020be - 172c: 88 23 and r24, r24 - 172e: 09 f4 brne .+2 ; 0x1732 - 1730: 21 c1 rjmp .+578 ; 0x1974 + 1746: 80 91 be 20 lds r24, 0x20BE ; 0x8020be + 174a: 88 23 and r24, r24 + 174c: 09 f4 brne .+2 ; 0x1750 + 174e: 21 c1 rjmp .+578 ; 0x1992 return false; // The device is not is configured state yet } // Check the interface number included in the request iface_num = udd_g_ctrlreq.req.wIndex & 0xFF; - 1732: c0 91 5a 24 lds r28, 0x245A ; 0x80245a - 1736: d0 91 5b 24 lds r29, 0x245B ; 0x80245b + 1750: c0 91 5e 24 lds r28, 0x245E ; 0x80245e + 1754: d0 91 5f 24 lds r29, 0x245F ; 0x80245f if (iface_num >= udc_ptr_conf->desc->bNumInterfaces) { - 173a: 00 91 bb 20 lds r16, 0x20BB ; 0x8020bb - 173e: 10 91 bc 20 lds r17, 0x20BC ; 0x8020bc - 1742: d8 01 movw r26, r16 - 1744: ed 91 ld r30, X+ - 1746: fc 91 ld r31, X - 1748: 84 81 ldd r24, Z+4 ; 0x04 - 174a: c8 17 cp r28, r24 - 174c: 08 f0 brcs .+2 ; 0x1750 - 174e: 12 c1 rjmp .+548 ; 0x1974 + 1758: 00 91 bb 20 lds r16, 0x20BB ; 0x8020bb + 175c: 10 91 bc 20 lds r17, 0x20BC ; 0x8020bc + 1760: d8 01 movw r26, r16 + 1762: ed 91 ld r30, X+ + 1764: fc 91 ld r31, X + 1766: 84 81 ldd r24, Z+4 ; 0x04 + 1768: c8 17 cp r28, r24 + 176a: 08 f0 brcs .+2 ; 0x176e + 176c: 12 c1 rjmp .+548 ; 0x1992 return false; } // Select first alternate setting of the interface to update udc_ptr_iface // before call iface->getsetting() if (!udc_update_iface_desc(iface_num, 0)) { - 1750: 60 e0 ldi r22, 0x00 ; 0 - 1752: 8c 2f mov r24, r28 - 1754: 02 dd rcall .-1532 ; 0x115a - 1756: 88 23 and r24, r24 - 1758: 09 f4 brne .+2 ; 0x175c - 175a: 0c c1 rjmp .+536 ; 0x1974 + 176e: 60 e0 ldi r22, 0x00 ; 0 + 1770: 8c 2f mov r24, r28 + 1772: 02 dd rcall .-1532 ; 0x1178 + 1774: 88 23 and r24, r24 + 1776: 09 f4 brne .+2 ; 0x177a + 1778: 0c c1 rjmp .+536 ; 0x1992 return false; } // Get alternate setting from UDI udi_api = udc_ptr_conf->udi_apis[iface_num]; - 175c: ce 01 movw r24, r28 - 175e: 99 27 eor r25, r25 - 1760: 88 0f add r24, r24 - 1762: 99 1f adc r25, r25 - 1764: d8 01 movw r26, r16 - 1766: 12 96 adiw r26, 0x02 ; 2 - 1768: ed 91 ld r30, X+ - 176a: fc 91 ld r31, X - 176c: 13 97 sbiw r26, 0x03 ; 3 - 176e: e8 0f add r30, r24 - 1770: f9 1f adc r31, r25 + 177a: ce 01 movw r24, r28 + 177c: 99 27 eor r25, r25 + 177e: 88 0f add r24, r24 + 1780: 99 1f adc r25, r25 + 1782: d8 01 movw r26, r16 + 1784: 12 96 adiw r26, 0x02 ; 2 + 1786: ed 91 ld r30, X+ + 1788: fc 91 ld r31, X + 178a: 13 97 sbiw r26, 0x03 ; 3 + 178c: e8 0f add r30, r24 + 178e: f9 1f adc r31, r25 udc_iface_setting = udi_api->getsetting(); - 1772: 01 90 ld r0, Z+ - 1774: f0 81 ld r31, Z - 1776: e0 2d mov r30, r0 - 1778: 86 81 ldd r24, Z+6 ; 0x06 - 177a: 97 81 ldd r25, Z+7 ; 0x07 - 177c: fc 01 movw r30, r24 - 177e: 09 95 icall - 1780: 80 93 c0 20 sts 0x20C0, r24 ; 0x8020c0 + 1790: 01 90 ld r0, Z+ + 1792: f0 81 ld r31, Z + 1794: e0 2d mov r30, r0 + 1796: 86 81 ldd r24, Z+6 ; 0x06 + 1798: 97 81 ldd r25, Z+7 ; 0x07 + 179a: fc 01 movw r30, r24 + 179c: 09 95 icall + 179e: 80 93 c0 20 sts 0x20C0, r24 ; 0x8020c0 // Link value to payload pointer of request udd_set_setup_payload(&udc_iface_setting,1); - 1784: 61 e0 ldi r22, 0x01 ; 1 - 1786: 70 e0 ldi r23, 0x00 ; 0 - 1788: 80 ec ldi r24, 0xC0 ; 192 - 178a: 90 e2 ldi r25, 0x20 ; 32 - 178c: 1e d5 rcall .+2620 ; 0x21ca - 178e: 6f c1 rjmp .+734 ; 0x1a6e + 17a2: 61 e0 ldi r22, 0x01 ; 1 + 17a4: 70 e0 ldi r23, 0x00 ; 0 + 17a6: 80 ec ldi r24, 0xC0 ; 192 + 17a8: 90 e2 ldi r25, 0x20 ; 32 + 17aa: 1e d5 rcall .+2620 ; 0x21e8 + 17ac: 6f c1 rjmp .+734 ; 0x1a8c default: break; } } #if (0!=USB_DEVICE_MAX_EP) if (USB_REQ_RECIP_ENDPOINT == Udd_setup_recipient()) { - 1790: 82 30 cpi r24, 0x02 ; 2 - 1792: 09 f0 breq .+2 ; 0x1796 - 1794: ef c0 rjmp .+478 ; 0x1974 + 17ae: 82 30 cpi r24, 0x02 ; 2 + 17b0: 09 f0 breq .+2 ; 0x17b4 + 17b2: ef c0 rjmp .+478 ; 0x1992 // Standard Get Endpoint request switch (udd_g_ctrlreq.req.bRequest) { - 1796: 80 91 57 24 lds r24, 0x2457 ; 0x802457 - 179a: 81 11 cpse r24, r1 - 179c: e4 c0 rjmp .+456 ; 0x1966 + 17b4: 80 91 5b 24 lds r24, 0x245B ; 0x80245b + 17b8: 81 11 cpse r24, r1 + 17ba: e4 c0 rjmp .+456 ; 0x1984 */ static bool udc_req_std_ep_get_status(void) { static le16_t udc_ep_status; if (udd_g_ctrlreq.req.wLength != sizeof(udc_ep_status)) { - 179e: 22 30 cpi r18, 0x02 ; 2 - 17a0: 31 05 cpc r19, r1 - 17a2: 09 f0 breq .+2 ; 0x17a6 - 17a4: e7 c0 rjmp .+462 ; 0x1974 + 17bc: 22 30 cpi r18, 0x02 ; 2 + 17be: 31 05 cpc r19, r1 + 17c0: 09 f0 breq .+2 ; 0x17c4 + 17c2: e7 c0 rjmp .+462 ; 0x1992 return false; } udc_ep_status = udd_ep_is_halted(udd_g_ctrlreq.req. - 17a6: 80 91 5a 24 lds r24, 0x245A ; 0x80245a - 17aa: 8b d5 rcall .+2838 ; 0x22c2 - 17ac: 90 e0 ldi r25, 0x00 ; 0 - 17ae: 80 93 b7 20 sts 0x20B7, r24 ; 0x8020b7 - 17b2: 90 93 b8 20 sts 0x20B8, r25 ; 0x8020b8 + 17c4: 80 91 5e 24 lds r24, 0x245E ; 0x80245e + 17c8: 8b d5 rcall .+2838 ; 0x22e0 + 17ca: 90 e0 ldi r25, 0x00 ; 0 + 17cc: 80 93 b7 20 sts 0x20B7, r24 ; 0x8020b7 + 17d0: 90 93 b8 20 sts 0x20B8, r25 ; 0x8020b8 wIndex & 0xFF) ? CPU_TO_LE16(USB_EP_STATUS_HALTED) : 0; udd_set_setup_payload( (uint8_t *) & udc_ep_status, - 17b6: 62 e0 ldi r22, 0x02 ; 2 - 17b8: 70 e0 ldi r23, 0x00 ; 0 - 17ba: 87 eb ldi r24, 0xB7 ; 183 - 17bc: 90 e2 ldi r25, 0x20 ; 32 - 17be: 05 d5 rcall .+2570 ; 0x21ca - 17c0: 56 c1 rjmp .+684 ; 0x1a6e + 17d4: 62 e0 ldi r22, 0x02 ; 2 + 17d6: 70 e0 ldi r23, 0x00 ; 0 + 17d8: 87 eb ldi r24, 0xB7 ; 183 + 17da: 90 e2 ldi r25, 0x20 ; 32 + 17dc: 05 d5 rcall .+2570 ; 0x21e8 + 17de: 56 c1 rjmp .+684 ; 0x1a8c } } #endif } else { // SET Standard Requests if (USB_REQ_RECIP_DEVICE == Udd_setup_recipient()) { - 17c2: 8f 71 andi r24, 0x1F ; 31 - 17c4: 09 f0 breq .+2 ; 0x17c8 - 17c6: 83 c0 rjmp .+262 ; 0x18ce + 17e0: 8f 71 andi r24, 0x1F ; 31 + 17e2: 09 f0 breq .+2 ; 0x17e6 + 17e4: 83 c0 rjmp .+262 ; 0x18ec // Standard Set Device request switch (udd_g_ctrlreq.req.bRequest) { - 17c8: 90 91 57 24 lds r25, 0x2457 ; 0x802457 - 17cc: 93 30 cpi r25, 0x03 ; 3 - 17ce: 09 f4 brne .+2 ; 0x17d2 - 17d0: cc c0 rjmp .+408 ; 0x196a - 17d2: 18 f4 brcc .+6 ; 0x17da - 17d4: 91 30 cpi r25, 0x01 ; 1 - 17d6: a1 f0 breq .+40 ; 0x1800 - 17d8: 7a c0 rjmp .+244 ; 0x18ce - 17da: 95 30 cpi r25, 0x05 ; 5 - 17dc: 19 f0 breq .+6 ; 0x17e4 - 17de: 99 30 cpi r25, 0x09 ; 9 - 17e0: 39 f1 breq .+78 ; 0x1830 - 17e2: 75 c0 rjmp .+234 ; 0x18ce + 17e6: 90 91 5b 24 lds r25, 0x245B ; 0x80245b + 17ea: 93 30 cpi r25, 0x03 ; 3 + 17ec: 09 f4 brne .+2 ; 0x17f0 + 17ee: cc c0 rjmp .+408 ; 0x1988 + 17f0: 18 f4 brcc .+6 ; 0x17f8 + 17f2: 91 30 cpi r25, 0x01 ; 1 + 17f4: a1 f0 breq .+40 ; 0x181e + 17f6: 7a c0 rjmp .+244 ; 0x18ec + 17f8: 95 30 cpi r25, 0x05 ; 5 + 17fa: 19 f0 breq .+6 ; 0x1802 + 17fc: 99 30 cpi r25, 0x09 ; 9 + 17fe: 39 f1 breq .+78 ; 0x184e + 1800: 75 c0 rjmp .+234 ; 0x18ec * * \return true if success */ static bool udc_req_std_dev_set_address(void) { if (udd_g_ctrlreq.req.wLength) { - 17e4: 80 91 5c 24 lds r24, 0x245C ; 0x80245c - 17e8: 90 91 5d 24 lds r25, 0x245D ; 0x80245d - 17ec: 89 2b or r24, r25 - 17ee: 09 f0 breq .+2 ; 0x17f2 - 17f0: c1 c0 rjmp .+386 ; 0x1974 + 1802: 80 91 60 24 lds r24, 0x2460 ; 0x802460 + 1806: 90 91 61 24 lds r25, 0x2461 ; 0x802461 + 180a: 89 2b or r24, r25 + 180c: 09 f0 breq .+2 ; 0x1810 + 180e: c1 c0 rjmp .+386 ; 0x1992 return false; } // The address must be changed at the end of setup request after the handshake // then we use a callback to change address udd_g_ctrlreq.callback = udc_valid_address; - 17f2: 87 ea ldi r24, 0xA7 ; 167 - 17f4: 98 e0 ldi r25, 0x08 ; 8 - 17f6: 80 93 62 24 sts 0x2462, r24 ; 0x802462 - 17fa: 90 93 63 24 sts 0x2463, r25 ; 0x802463 - 17fe: 37 c1 rjmp .+622 ; 0x1a6e + 1810: 86 eb ldi r24, 0xB6 ; 182 + 1812: 98 e0 ldi r25, 0x08 ; 8 + 1814: 80 93 66 24 sts 0x2466, r24 ; 0x802466 + 1818: 90 93 67 24 sts 0x2467, r25 ; 0x802467 + 181c: 37 c1 rjmp .+622 ; 0x1a8c * * \return true if success */ static bool udc_req_std_dev_clear_feature(void) { if (udd_g_ctrlreq.req.wLength) { - 1800: 80 91 5c 24 lds r24, 0x245C ; 0x80245c - 1804: 90 91 5d 24 lds r25, 0x245D ; 0x80245d - 1808: 89 2b or r24, r25 - 180a: 09 f0 breq .+2 ; 0x180e - 180c: b3 c0 rjmp .+358 ; 0x1974 + 181e: 80 91 60 24 lds r24, 0x2460 ; 0x802460 + 1822: 90 91 61 24 lds r25, 0x2461 ; 0x802461 + 1826: 89 2b or r24, r25 + 1828: 09 f0 breq .+2 ; 0x182c + 182a: b3 c0 rjmp .+358 ; 0x1992 return false; } if (udd_g_ctrlreq.req.wValue == USB_DEV_FEATURE_REMOTE_WAKEUP) { - 180e: 80 91 58 24 lds r24, 0x2458 ; 0x802458 - 1812: 90 91 59 24 lds r25, 0x2459 ; 0x802459 - 1816: 01 97 sbiw r24, 0x01 ; 1 - 1818: 09 f0 breq .+2 ; 0x181c - 181a: ac c0 rjmp .+344 ; 0x1974 + 182c: 80 91 5c 24 lds r24, 0x245C ; 0x80245c + 1830: 90 91 5d 24 lds r25, 0x245D ; 0x80245d + 1834: 01 97 sbiw r24, 0x01 ; 1 + 1836: 09 f0 breq .+2 ; 0x183a + 1838: ac c0 rjmp .+344 ; 0x1992 udc_device_status &= CPU_TO_LE16(~(uint32_t)USB_DEV_STATUS_REMOTEWAKEUP); - 181c: 80 91 c2 20 lds r24, 0x20C2 ; 0x8020c2 - 1820: 90 91 c3 20 lds r25, 0x20C3 ; 0x8020c3 - 1824: 8d 7f andi r24, 0xFD ; 253 - 1826: 80 93 c2 20 sts 0x20C2, r24 ; 0x8020c2 - 182a: 90 93 c3 20 sts 0x20C3, r25 ; 0x8020c3 - 182e: 1f c1 rjmp .+574 ; 0x1a6e + 183a: 80 91 c2 20 lds r24, 0x20C2 ; 0x8020c2 + 183e: 90 91 c3 20 lds r25, 0x20C3 ; 0x8020c3 + 1842: 8d 7f andi r24, 0xFD ; 253 + 1844: 80 93 c2 20 sts 0x20C2, r24 ; 0x8020c2 + 1848: 90 93 c3 20 sts 0x20C3, r25 ; 0x8020c3 + 184c: 1f c1 rjmp .+574 ; 0x1a8c static bool udc_req_std_dev_set_configuration(void) { uint8_t iface_num; // Check request length if (udd_g_ctrlreq.req.wLength) { - 1830: 80 91 5c 24 lds r24, 0x245C ; 0x80245c - 1834: 90 91 5d 24 lds r25, 0x245D ; 0x80245d - 1838: 89 2b or r24, r25 - 183a: 09 f0 breq .+2 ; 0x183e - 183c: 9b c0 rjmp .+310 ; 0x1974 + 184e: 80 91 60 24 lds r24, 0x2460 ; 0x802460 + 1852: 90 91 61 24 lds r25, 0x2461 ; 0x802461 + 1856: 89 2b or r24, r25 + 1858: 09 f0 breq .+2 ; 0x185c + 185a: 9b c0 rjmp .+310 ; 0x1992 return false; } // Authorize configuration only if the address is valid if (!udd_getaddress()) { - 183e: c2 d4 rcall .+2436 ; 0x21c4 - 1840: 88 23 and r24, r24 - 1842: 09 f4 brne .+2 ; 0x1846 - 1844: 97 c0 rjmp .+302 ; 0x1974 + 185c: c2 d4 rcall .+2436 ; 0x21e2 + 185e: 88 23 and r24, r24 + 1860: 09 f4 brne .+2 ; 0x1864 + 1862: 97 c0 rjmp .+302 ; 0x1992 } } else #endif { // FS descriptor if ((udd_g_ctrlreq.req.wValue & 0xFF) > - 1846: 20 91 58 24 lds r18, 0x2458 ; 0x802458 - 184a: 30 91 59 24 lds r19, 0x2459 ; 0x802459 - 184e: 33 27 eor r19, r19 + 1864: 20 91 5c 24 lds r18, 0x245C ; 0x80245c + 1868: 30 91 5d 24 lds r19, 0x245D ; 0x80245d + 186c: 33 27 eor r19, r19 udc_config.confdev_lsfs->bNumConfigurations) { - 1850: e0 91 10 20 lds r30, 0x2010 ; 0x802010 - 1854: f0 91 11 20 lds r31, 0x2011 ; 0x802011 + 186e: e0 91 10 20 lds r30, 0x2010 ; 0x802010 + 1872: f0 91 11 20 lds r31, 0x2011 ; 0x802011 } } else #endif { // FS descriptor if ((udd_g_ctrlreq.req.wValue & 0xFF) > - 1858: 81 89 ldd r24, Z+17 ; 0x11 - 185a: 90 e0 ldi r25, 0x00 ; 0 - 185c: 82 17 cp r24, r18 - 185e: 93 07 cpc r25, r19 - 1860: 08 f4 brcc .+2 ; 0x1864 - 1862: 88 c0 rjmp .+272 ; 0x1974 + 1876: 81 89 ldd r24, Z+17 ; 0x11 + 1878: 90 e0 ldi r25, 0x00 ; 0 + 187a: 82 17 cp r24, r18 + 187c: 93 07 cpc r25, r19 + 187e: 08 f4 brcc .+2 ; 0x1882 + 1880: 88 c0 rjmp .+272 ; 0x1992 return false; } } // Reset current configuration udc_reset(); - 1864: 2f dd rcall .-1442 ; 0x12c4 + 1882: 2f dd rcall .-1442 ; 0x12e2 // Enable new configuration udc_num_configuration = udd_g_ctrlreq.req.wValue & 0xFF; - 1866: 80 91 58 24 lds r24, 0x2458 ; 0x802458 - 186a: 90 91 59 24 lds r25, 0x2459 ; 0x802459 - 186e: 80 93 be 20 sts 0x20BE, r24 ; 0x8020be + 1884: 80 91 5c 24 lds r24, 0x245C ; 0x80245c + 1888: 90 91 5d 24 lds r25, 0x245D ; 0x80245d + 188c: 80 93 be 20 sts 0x20BE, r24 ; 0x8020be if (udc_num_configuration == 0) { - 1872: 88 23 and r24, r24 - 1874: 09 f4 brne .+2 ; 0x1878 - 1876: fb c0 rjmp .+502 ; 0x1a6e + 1890: 88 23 and r24, r24 + 1892: 09 f4 brne .+2 ; 0x1896 + 1894: fb c0 rjmp .+502 ; 0x1a8c udc_ptr_conf = &udc_config.conf_hs[udc_num_configuration - 1]; } else #endif { // FS descriptor udc_ptr_conf = &udc_config.conf_lsfs[udc_num_configuration - 1]; - 1878: 99 27 eor r25, r25 - 187a: 81 50 subi r24, 0x01 ; 1 - 187c: 90 4c sbci r25, 0xC0 ; 192 - 187e: 88 0f add r24, r24 - 1880: 99 1f adc r25, r25 - 1882: 88 0f add r24, r24 - 1884: 99 1f adc r25, r25 - 1886: e0 91 12 20 lds r30, 0x2012 ; 0x802012 - 188a: f0 91 13 20 lds r31, 0x2013 ; 0x802013 - 188e: e8 0f add r30, r24 - 1890: f9 1f adc r31, r25 - 1892: e0 93 bb 20 sts 0x20BB, r30 ; 0x8020bb - 1896: f0 93 bc 20 sts 0x20BC, r31 ; 0x8020bc + 1896: 99 27 eor r25, r25 + 1898: 81 50 subi r24, 0x01 ; 1 + 189a: 90 4c sbci r25, 0xC0 ; 192 + 189c: 88 0f add r24, r24 + 189e: 99 1f adc r25, r25 + 18a0: 88 0f add r24, r24 + 18a2: 99 1f adc r25, r25 + 18a4: e0 91 12 20 lds r30, 0x2012 ; 0x802012 + 18a8: f0 91 13 20 lds r31, 0x2013 ; 0x802013 + 18ac: e8 0f add r30, r24 + 18ae: f9 1f adc r31, r25 + 18b0: e0 93 bb 20 sts 0x20BB, r30 ; 0x8020bb + 18b4: f0 93 bc 20 sts 0x20BC, r31 ; 0x8020bc } // Enable all interfaces of the selected configuration for (iface_num = 0; iface_num < udc_ptr_conf->desc->bNumInterfaces; - 189a: 01 90 ld r0, Z+ - 189c: f0 81 ld r31, Z - 189e: e0 2d mov r30, r0 - 18a0: 84 81 ldd r24, Z+4 ; 0x04 - 18a2: 88 23 and r24, r24 - 18a4: 09 f4 brne .+2 ; 0x18a8 - 18a6: e3 c0 rjmp .+454 ; 0x1a6e - 18a8: c0 e0 ldi r28, 0x00 ; 0 + 18b8: 01 90 ld r0, Z+ + 18ba: f0 81 ld r31, Z + 18bc: e0 2d mov r30, r0 + 18be: 84 81 ldd r24, Z+4 ; 0x04 + 18c0: 88 23 and r24, r24 + 18c2: 09 f4 brne .+2 ; 0x18c6 + 18c4: e3 c0 rjmp .+454 ; 0x1a8c + 18c6: c0 e0 ldi r28, 0x00 ; 0 iface_num++) { if (!udc_iface_enable(iface_num, 0)) { - 18aa: 60 e0 ldi r22, 0x00 ; 0 - 18ac: 8c 2f mov r24, r28 - 18ae: d1 dc rcall .-1630 ; 0x1252 - 18b0: 88 23 and r24, r24 - 18b2: 09 f4 brne .+2 ; 0x18b6 - 18b4: 5f c0 rjmp .+190 ; 0x1974 + 18c8: 60 e0 ldi r22, 0x00 ; 0 + 18ca: 8c 2f mov r24, r28 + 18cc: d1 dc rcall .-1630 ; 0x1270 + 18ce: 88 23 and r24, r24 + 18d0: 09 f4 brne .+2 ; 0x18d4 + 18d2: 5f c0 rjmp .+190 ; 0x1992 // FS descriptor udc_ptr_conf = &udc_config.conf_lsfs[udc_num_configuration - 1]; } // Enable all interfaces of the selected configuration for (iface_num = 0; iface_num < udc_ptr_conf->desc->bNumInterfaces; iface_num++) { - 18b6: cf 5f subi r28, 0xFF ; 255 + 18d4: cf 5f subi r28, 0xFF ; 255 { // FS descriptor udc_ptr_conf = &udc_config.conf_lsfs[udc_num_configuration - 1]; } // Enable all interfaces of the selected configuration for (iface_num = 0; iface_num < udc_ptr_conf->desc->bNumInterfaces; - 18b8: e0 91 bb 20 lds r30, 0x20BB ; 0x8020bb - 18bc: f0 91 bc 20 lds r31, 0x20BC ; 0x8020bc - 18c0: 01 90 ld r0, Z+ - 18c2: f0 81 ld r31, Z - 18c4: e0 2d mov r30, r0 - 18c6: 84 81 ldd r24, Z+4 ; 0x04 - 18c8: c8 17 cp r28, r24 - 18ca: 78 f3 brcs .-34 ; 0x18aa - 18cc: d0 c0 rjmp .+416 ; 0x1a6e + 18d6: e0 91 bb 20 lds r30, 0x20BB ; 0x8020bb + 18da: f0 91 bc 20 lds r31, 0x20BC ; 0x8020bc + 18de: 01 90 ld r0, Z+ + 18e0: f0 81 ld r31, Z + 18e2: e0 2d mov r30, r0 + 18e4: 84 81 ldd r24, Z+4 ; 0x04 + 18e6: c8 17 cp r28, r24 + 18e8: 78 f3 brcs .-34 ; 0x18c8 + 18ea: d0 c0 rjmp .+416 ; 0x1a8c default: break; } } if (USB_REQ_RECIP_INTERFACE == Udd_setup_recipient()) { - 18ce: 81 30 cpi r24, 0x01 ; 1 - 18d0: e1 f4 brne .+56 ; 0x190a + 18ec: 81 30 cpi r24, 0x01 ; 1 + 18ee: e1 f4 brne .+56 ; 0x1928 // Standard Set Interface request switch (udd_g_ctrlreq.req.bRequest) { - 18d2: 90 91 57 24 lds r25, 0x2457 ; 0x802457 - 18d6: 9b 30 cpi r25, 0x0B ; 11 - 18d8: c1 f4 brne .+48 ; 0x190a + 18f0: 90 91 5b 24 lds r25, 0x245B ; 0x80245b + 18f4: 9b 30 cpi r25, 0x0B ; 11 + 18f6: c1 f4 brne .+48 ; 0x1928 */ static bool udc_req_std_iface_set_setting(void) { uint8_t iface_num, setting_num; if (udd_g_ctrlreq.req.wLength) { - 18da: 80 91 5c 24 lds r24, 0x245C ; 0x80245c - 18de: 90 91 5d 24 lds r25, 0x245D ; 0x80245d - 18e2: 89 2b or r24, r25 - 18e4: 09 f0 breq .+2 ; 0x18e8 - 18e6: 46 c0 rjmp .+140 ; 0x1974 + 18f8: 80 91 60 24 lds r24, 0x2460 ; 0x802460 + 18fc: 90 91 61 24 lds r25, 0x2461 ; 0x802461 + 1900: 89 2b or r24, r25 + 1902: 09 f0 breq .+2 ; 0x1906 + 1904: 46 c0 rjmp .+140 ; 0x1992 return false; // Error in request } if (!udc_num_configuration) { - 18e8: 80 91 be 20 lds r24, 0x20BE ; 0x8020be - 18ec: 88 23 and r24, r24 - 18ee: 09 f4 brne .+2 ; 0x18f2 - 18f0: 41 c0 rjmp .+130 ; 0x1974 + 1906: 80 91 be 20 lds r24, 0x20BE ; 0x8020be + 190a: 88 23 and r24, r24 + 190c: 09 f4 brne .+2 ; 0x1910 + 190e: 41 c0 rjmp .+130 ; 0x1992 return false; // The device is not is configured state yet } iface_num = udd_g_ctrlreq.req.wIndex & 0xFF; - 18f2: e6 e5 ldi r30, 0x56 ; 86 - 18f4: f4 e2 ldi r31, 0x24 ; 36 - 18f6: c4 81 ldd r28, Z+4 ; 0x04 + 1910: ea e5 ldi r30, 0x5A ; 90 + 1912: f4 e2 ldi r31, 0x24 ; 36 + 1914: c4 81 ldd r28, Z+4 ; 0x04 setting_num = udd_g_ctrlreq.req.wValue & 0xFF; - 18f8: d2 81 ldd r29, Z+2 ; 0x02 + 1916: d2 81 ldd r29, Z+2 ; 0x02 // Disable current setting if (!udc_iface_disable(iface_num)) { - 18fa: 8c 2f mov r24, r28 - 18fc: 68 dc rcall .-1840 ; 0x11ce - 18fe: 88 23 and r24, r24 - 1900: c9 f1 breq .+114 ; 0x1974 + 1918: 8c 2f mov r24, r28 + 191a: 68 dc rcall .-1840 ; 0x11ec + 191c: 88 23 and r24, r24 + 191e: c9 f1 breq .+114 ; 0x1992 return false; } // Enable new setting return udc_iface_enable(iface_num, setting_num); - 1902: 6d 2f mov r22, r29 - 1904: 8c 2f mov r24, r28 - 1906: a5 dc rcall .-1718 ; 0x1252 - 1908: 33 c0 rjmp .+102 ; 0x1970 + 1920: 6d 2f mov r22, r29 + 1922: 8c 2f mov r24, r28 + 1924: a5 dc rcall .-1718 ; 0x1270 + 1926: 33 c0 rjmp .+102 ; 0x198e default: break; } } #if (0!=USB_DEVICE_MAX_EP) if (USB_REQ_RECIP_ENDPOINT == Udd_setup_recipient()) { - 190a: 82 30 cpi r24, 0x02 ; 2 - 190c: 99 f5 brne .+102 ; 0x1974 + 1928: 82 30 cpi r24, 0x02 ; 2 + 192a: 99 f5 brne .+102 ; 0x1992 // Standard Set Endpoint request switch (udd_g_ctrlreq.req.bRequest) { - 190e: 80 91 57 24 lds r24, 0x2457 ; 0x802457 - 1912: 81 30 cpi r24, 0x01 ; 1 - 1914: 19 f0 breq .+6 ; 0x191c - 1916: 83 30 cpi r24, 0x03 ; 3 - 1918: 89 f0 breq .+34 ; 0x193c - 191a: 29 c0 rjmp .+82 ; 0x196e + 192c: 80 91 5b 24 lds r24, 0x245B ; 0x80245b + 1930: 81 30 cpi r24, 0x01 ; 1 + 1932: 19 f0 breq .+6 ; 0x193a + 1934: 83 30 cpi r24, 0x03 ; 3 + 1936: 89 f0 breq .+34 ; 0x195a + 1938: 29 c0 rjmp .+82 ; 0x198c * * \return true if success */ static bool udc_req_std_ep_clear_feature(void) { if (udd_g_ctrlreq.req.wLength) { - 191c: 80 91 5c 24 lds r24, 0x245C ; 0x80245c - 1920: 90 91 5d 24 lds r25, 0x245D ; 0x80245d - 1924: 89 2b or r24, r25 - 1926: 31 f5 brne .+76 ; 0x1974 + 193a: 80 91 60 24 lds r24, 0x2460 ; 0x802460 + 193e: 90 91 61 24 lds r25, 0x2461 ; 0x802461 + 1942: 89 2b or r24, r25 + 1944: 31 f5 brne .+76 ; 0x1992 return false; } if (udd_g_ctrlreq.req.wValue == USB_EP_FEATURE_HALT) { - 1928: 80 91 58 24 lds r24, 0x2458 ; 0x802458 - 192c: 90 91 59 24 lds r25, 0x2459 ; 0x802459 - 1930: 89 2b or r24, r25 - 1932: 01 f5 brne .+64 ; 0x1974 + 1946: 80 91 5c 24 lds r24, 0x245C ; 0x80245c + 194a: 90 91 5d 24 lds r25, 0x245D ; 0x80245d + 194e: 89 2b or r24, r25 + 1950: 01 f5 brne .+64 ; 0x1992 return udd_ep_clear_halt(udd_g_ctrlreq.req.wIndex & 0xFF); - 1934: 80 91 5a 24 lds r24, 0x245A ; 0x80245a - 1938: df d4 rcall .+2494 ; 0x22f8 - 193a: 1a c0 rjmp .+52 ; 0x1970 + 1952: 80 91 5e 24 lds r24, 0x245E ; 0x80245e + 1956: df d4 rcall .+2494 ; 0x2316 + 1958: 1a c0 rjmp .+52 ; 0x198e * \return true if success */ #if (0!=USB_DEVICE_MAX_EP) static bool udc_req_std_ep_set_feature(void) { if (udd_g_ctrlreq.req.wLength) { - 193c: 80 91 5c 24 lds r24, 0x245C ; 0x80245c - 1940: 90 91 5d 24 lds r25, 0x245D ; 0x80245d - 1944: 89 2b or r24, r25 - 1946: b1 f4 brne .+44 ; 0x1974 + 195a: 80 91 60 24 lds r24, 0x2460 ; 0x802460 + 195e: 90 91 61 24 lds r25, 0x2461 ; 0x802461 + 1962: 89 2b or r24, r25 + 1964: b1 f4 brne .+44 ; 0x1992 return false; } if (udd_g_ctrlreq.req.wValue == USB_EP_FEATURE_HALT) { - 1948: 80 91 58 24 lds r24, 0x2458 ; 0x802458 - 194c: 90 91 59 24 lds r25, 0x2459 ; 0x802459 - 1950: 89 2b or r24, r25 - 1952: 81 f4 brne .+32 ; 0x1974 + 1966: 80 91 5c 24 lds r24, 0x245C ; 0x80245c + 196a: 90 91 5d 24 lds r25, 0x245D ; 0x80245d + 196e: 89 2b or r24, r25 + 1970: 81 f4 brne .+32 ; 0x1992 udd_ep_abort(udd_g_ctrlreq.req.wIndex & 0xFF); - 1954: c6 e5 ldi r28, 0x56 ; 86 - 1956: d4 e2 ldi r29, 0x24 ; 36 - 1958: 8c 81 ldd r24, Y+4 ; 0x04 - 195a: bd d5 rcall .+2938 ; 0x24d6 + 1972: ca e5 ldi r28, 0x5A ; 90 + 1974: d4 e2 ldi r29, 0x24 ; 36 + 1976: 8c 81 ldd r24, Y+4 ; 0x04 + 1978: bd d5 rcall .+2938 ; 0x24f4 return udd_ep_set_halt(udd_g_ctrlreq.req.wIndex & 0xFF); - 195c: 8c 81 ldd r24, Y+4 ; 0x04 - 195e: 20 d6 rcall .+3136 ; 0x25a0 - 1960: 07 c0 rjmp .+14 ; 0x1970 + 197a: 8c 81 ldd r24, Y+4 ; 0x04 + 197c: 20 d6 rcall .+3136 ; 0x25be + 197e: 07 c0 rjmp .+14 ; 0x198e } break; default: // Unknown descriptor requested return false; - 1962: 80 e0 ldi r24, 0x00 ; 0 - 1964: 05 c0 rjmp .+10 ; 0x1970 + 1980: 80 e0 ldi r24, 0x00 ; 0 + 1982: 05 c0 rjmp .+10 ; 0x198e break; } } #endif } return false; - 1966: 80 e0 ldi r24, 0x00 ; 0 - 1968: 03 c0 rjmp .+6 ; 0x1970 + 1984: 80 e0 ldi r24, 0x00 ; 0 + 1986: 03 c0 rjmp .+6 ; 0x198e case USB_REQ_SET_ADDRESS: return udc_req_std_dev_set_address(); case USB_REQ_CLEAR_FEATURE: return udc_req_std_dev_clear_feature(); case USB_REQ_SET_FEATURE: return udc_req_std_dev_set_feature(); - 196a: 80 e0 ldi r24, 0x00 ; 0 - 196c: 01 c0 rjmp .+2 ; 0x1970 + 1988: 80 e0 ldi r24, 0x00 ; 0 + 198a: 01 c0 rjmp .+2 ; 0x198e break; } } #endif } return false; - 196e: 80 e0 ldi r24, 0x00 ; 0 + 198c: 80 e0 ldi r24, 0x00 ; 0 } } // If standard request then try to decode it in UDC if (Udd_setup_type() == USB_REQ_TYPE_STANDARD) { if (udc_reqstd()) { - 1970: 81 11 cpse r24, r1 - 1972: 7e c0 rjmp .+252 ; 0x1a70 + 198e: 81 11 cpse r24, r1 + 1990: 7e c0 rjmp .+252 ; 0x1a8e return true; } } // If interface request then try to decode it in UDI if (Udd_setup_recipient() == USB_REQ_RECIP_INTERFACE) { - 1974: 80 91 56 24 lds r24, 0x2456 ; 0x802456 - 1978: 8f 71 andi r24, 0x1F ; 31 - 197a: 81 30 cpi r24, 0x01 ; 1 - 197c: 71 f5 brne .+92 ; 0x19da + 1992: 80 91 5a 24 lds r24, 0x245A ; 0x80245a + 1996: 8f 71 andi r24, 0x1F ; 31 + 1998: 81 30 cpi r24, 0x01 ; 1 + 199a: 71 f5 brne .+92 ; 0x19f8 static bool udc_req_iface(void) { uint8_t iface_num; udi_api_t UDC_DESC_STORAGE *udi_api; if (0 == udc_num_configuration) { - 197e: 80 91 be 20 lds r24, 0x20BE ; 0x8020be - 1982: 88 23 and r24, r24 - 1984: 51 f1 breq .+84 ; 0x19da + 199c: 80 91 be 20 lds r24, 0x20BE ; 0x8020be + 19a0: 88 23 and r24, r24 + 19a2: 51 f1 breq .+84 ; 0x19f8 return false; // The device is not is configured state yet } // Check interface number iface_num = udd_g_ctrlreq.req.wIndex & 0xFF; - 1986: 00 91 5a 24 lds r16, 0x245A ; 0x80245a - 198a: 10 91 5b 24 lds r17, 0x245B ; 0x80245b + 19a4: 00 91 5e 24 lds r16, 0x245E ; 0x80245e + 19a8: 10 91 5f 24 lds r17, 0x245F ; 0x80245f if (iface_num >= udc_ptr_conf->desc->bNumInterfaces) { - 198e: c0 91 bb 20 lds r28, 0x20BB ; 0x8020bb - 1992: d0 91 bc 20 lds r29, 0x20BC ; 0x8020bc - 1996: e8 81 ld r30, Y - 1998: f9 81 ldd r31, Y+1 ; 0x01 - 199a: 84 81 ldd r24, Z+4 ; 0x04 - 199c: 08 17 cp r16, r24 - 199e: e8 f4 brcc .+58 ; 0x19da + 19ac: c0 91 bb 20 lds r28, 0x20BB ; 0x8020bb + 19b0: d0 91 bc 20 lds r29, 0x20BC ; 0x8020bc + 19b4: e8 81 ld r30, Y + 19b6: f9 81 ldd r31, Y+1 ; 0x01 + 19b8: 84 81 ldd r24, Z+4 ; 0x04 + 19ba: 08 17 cp r16, r24 + 19bc: e8 f4 brcc .+58 ; 0x19f8 } //* To update udc_ptr_iface with the selected interface in request // Select first alternate setting of interface to update udc_ptr_iface // before calling udi_api->getsetting() if (!udc_update_iface_desc(iface_num, 0)) { - 19a0: 60 e0 ldi r22, 0x00 ; 0 - 19a2: 80 2f mov r24, r16 - 19a4: da db rcall .-2124 ; 0x115a - 19a6: 88 23 and r24, r24 - 19a8: c1 f0 breq .+48 ; 0x19da + 19be: 60 e0 ldi r22, 0x00 ; 0 + 19c0: 80 2f mov r24, r16 + 19c2: da db rcall .-2124 ; 0x1178 + 19c4: 88 23 and r24, r24 + 19c6: c1 f0 breq .+48 ; 0x19f8 return false; } // Select the interface with the current alternate setting udi_api = udc_ptr_conf->udi_apis[iface_num]; - 19aa: f8 01 movw r30, r16 - 19ac: ff 27 eor r31, r31 - 19ae: cf 01 movw r24, r30 - 19b0: 88 0f add r24, r24 - 19b2: 99 1f adc r25, r25 - 19b4: ea 81 ldd r30, Y+2 ; 0x02 - 19b6: fb 81 ldd r31, Y+3 ; 0x03 - 19b8: e8 0f add r30, r24 - 19ba: f9 1f adc r31, r25 - 19bc: c0 81 ld r28, Z - 19be: d1 81 ldd r29, Z+1 ; 0x01 + 19c8: f8 01 movw r30, r16 + 19ca: ff 27 eor r31, r31 + 19cc: cf 01 movw r24, r30 + 19ce: 88 0f add r24, r24 + 19d0: 99 1f adc r25, r25 + 19d2: ea 81 ldd r30, Y+2 ; 0x02 + 19d4: fb 81 ldd r31, Y+3 ; 0x03 + 19d6: e8 0f add r30, r24 + 19d8: f9 1f adc r31, r25 + 19da: c0 81 ld r28, Z + 19dc: d1 81 ldd r29, Z+1 ; 0x01 if (!udc_update_iface_desc(iface_num, udi_api->getsetting())) { - 19c0: ee 81 ldd r30, Y+6 ; 0x06 - 19c2: ff 81 ldd r31, Y+7 ; 0x07 - 19c4: 09 95 icall - 19c6: 68 2f mov r22, r24 - 19c8: 80 2f mov r24, r16 - 19ca: c7 db rcall .-2162 ; 0x115a - 19cc: 88 23 and r24, r24 - 19ce: 29 f0 breq .+10 ; 0x19da + 19de: ee 81 ldd r30, Y+6 ; 0x06 + 19e0: ff 81 ldd r31, Y+7 ; 0x07 + 19e2: 09 95 icall + 19e4: 68 2f mov r22, r24 + 19e6: 80 2f mov r24, r16 + 19e8: c7 db rcall .-2162 ; 0x1178 + 19ea: 88 23 and r24, r24 + 19ec: 29 f0 breq .+10 ; 0x19f8 return false; } // Send the SETUP request to the UDI corresponding to the interface number return udi_api->setup(); - 19d0: ec 81 ldd r30, Y+4 ; 0x04 - 19d2: fd 81 ldd r31, Y+5 ; 0x05 - 19d4: 09 95 icall + 19ee: ec 81 ldd r30, Y+4 ; 0x04 + 19f0: fd 81 ldd r31, Y+5 ; 0x05 + 19f2: 09 95 icall } } // If interface request then try to decode it in UDI if (Udd_setup_recipient() == USB_REQ_RECIP_INTERFACE) { if (udc_req_iface()) { - 19d6: 81 11 cpse r24, r1 - 19d8: 4b c0 rjmp .+150 ; 0x1a70 + 19f4: 81 11 cpse r24, r1 + 19f6: 4b c0 rjmp .+150 ; 0x1a8e return true; } } // If endpoint request then try to decode it in UDI if (Udd_setup_recipient() == USB_REQ_RECIP_ENDPOINT) { - 19da: 80 91 56 24 lds r24, 0x2456 ; 0x802456 - 19de: 8f 71 andi r24, 0x1F ; 31 - 19e0: 82 30 cpi r24, 0x02 ; 2 - 19e2: 09 f0 breq .+2 ; 0x19e6 - 19e4: 40 c0 rjmp .+128 ; 0x1a66 + 19f8: 80 91 5a 24 lds r24, 0x245A ; 0x80245a + 19fc: 8f 71 andi r24, 0x1F ; 31 + 19fe: 82 30 cpi r24, 0x02 ; 2 + 1a00: 09 f0 breq .+2 ; 0x1a04 + 1a02: 40 c0 rjmp .+128 ; 0x1a84 static bool udc_req_ep(void) { uint8_t iface_num; udi_api_t UDC_DESC_STORAGE *udi_api; if (0 == udc_num_configuration) { - 19e6: 80 91 be 20 lds r24, 0x20BE ; 0x8020be - 19ea: 88 23 and r24, r24 - 19ec: b1 f1 breq .+108 ; 0x1a5a + 1a04: 80 91 be 20 lds r24, 0x20BE ; 0x8020be + 1a08: 88 23 and r24, r24 + 1a0a: b1 f1 breq .+108 ; 0x1a78 return false; // The device is not is configured state yet } // Send this request on all enabled interfaces iface_num = udd_g_ctrlreq.req.wIndex & 0xFF; for (iface_num = 0; iface_num < udc_ptr_conf->desc->bNumInterfaces; - 19ee: a0 91 bb 20 lds r26, 0x20BB ; 0x8020bb - 19f2: b0 91 bc 20 lds r27, 0x20BC ; 0x8020bc - 19f6: ed 91 ld r30, X+ - 19f8: fc 91 ld r31, X - 19fa: 11 97 sbiw r26, 0x01 ; 1 - 19fc: 84 81 ldd r24, Z+4 ; 0x04 - 19fe: 88 23 and r24, r24 - 1a00: 71 f1 breq .+92 ; 0x1a5e - 1a02: c0 e0 ldi r28, 0x00 ; 0 + 1a0c: a0 91 bb 20 lds r26, 0x20BB ; 0x8020bb + 1a10: b0 91 bc 20 lds r27, 0x20BC ; 0x8020bc + 1a14: ed 91 ld r30, X+ + 1a16: fc 91 ld r31, X + 1a18: 11 97 sbiw r26, 0x01 ; 1 + 1a1a: 84 81 ldd r24, Z+4 ; 0x04 + 1a1c: 88 23 and r24, r24 + 1a1e: 71 f1 breq .+92 ; 0x1a7c + 1a20: c0 e0 ldi r28, 0x00 ; 0 iface_num++) { // Select the interface with the current alternate setting udi_api = udc_ptr_conf->udi_apis[iface_num]; - 1a04: ec 2f mov r30, r28 - 1a06: f0 e0 ldi r31, 0x00 ; 0 - 1a08: ee 0f add r30, r30 - 1a0a: ff 1f adc r31, r31 - 1a0c: 12 96 adiw r26, 0x02 ; 2 - 1a0e: 8d 91 ld r24, X+ - 1a10: 9c 91 ld r25, X - 1a12: 13 97 sbiw r26, 0x03 ; 3 - 1a14: e8 0f add r30, r24 - 1a16: f9 1f adc r31, r25 - 1a18: 00 81 ld r16, Z - 1a1a: 11 81 ldd r17, Z+1 ; 0x01 + 1a22: ec 2f mov r30, r28 + 1a24: f0 e0 ldi r31, 0x00 ; 0 + 1a26: ee 0f add r30, r30 + 1a28: ff 1f adc r31, r31 + 1a2a: 12 96 adiw r26, 0x02 ; 2 + 1a2c: 8d 91 ld r24, X+ + 1a2e: 9c 91 ld r25, X + 1a30: 13 97 sbiw r26, 0x03 ; 3 + 1a32: e8 0f add r30, r24 + 1a34: f9 1f adc r31, r25 + 1a36: 00 81 ld r16, Z + 1a38: 11 81 ldd r17, Z+1 ; 0x01 if (!udc_update_iface_desc(iface_num, udi_api->getsetting())) { - 1a1c: d8 01 movw r26, r16 - 1a1e: 16 96 adiw r26, 0x06 ; 6 - 1a20: ed 91 ld r30, X+ - 1a22: fc 91 ld r31, X - 1a24: 17 97 sbiw r26, 0x07 ; 7 - 1a26: 09 95 icall - 1a28: 68 2f mov r22, r24 - 1a2a: 8c 2f mov r24, r28 - 1a2c: 96 db rcall .-2260 ; 0x115a - 1a2e: 88 23 and r24, r24 - 1a30: f9 f0 breq .+62 ; 0x1a70 + 1a3a: d8 01 movw r26, r16 + 1a3c: 16 96 adiw r26, 0x06 ; 6 + 1a3e: ed 91 ld r30, X+ + 1a40: fc 91 ld r31, X + 1a42: 17 97 sbiw r26, 0x07 ; 7 + 1a44: 09 95 icall + 1a46: 68 2f mov r22, r24 + 1a48: 8c 2f mov r24, r28 + 1a4a: 96 db rcall .-2260 ; 0x1178 + 1a4c: 88 23 and r24, r24 + 1a4e: f9 f0 breq .+62 ; 0x1a8e return false; } // Send the SETUP request to the UDI if (udi_api->setup()) { - 1a32: d8 01 movw r26, r16 - 1a34: 14 96 adiw r26, 0x04 ; 4 - 1a36: ed 91 ld r30, X+ - 1a38: fc 91 ld r31, X - 1a3a: 15 97 sbiw r26, 0x05 ; 5 - 1a3c: 09 95 icall - 1a3e: 81 11 cpse r24, r1 - 1a40: 17 c0 rjmp .+46 ; 0x1a70 + 1a50: d8 01 movw r26, r16 + 1a52: 14 96 adiw r26, 0x04 ; 4 + 1a54: ed 91 ld r30, X+ + 1a56: fc 91 ld r31, X + 1a58: 15 97 sbiw r26, 0x05 ; 5 + 1a5a: 09 95 icall + 1a5c: 81 11 cpse r24, r1 + 1a5e: 17 c0 rjmp .+46 ; 0x1a8e return false; // The device is not is configured state yet } // Send this request on all enabled interfaces iface_num = udd_g_ctrlreq.req.wIndex & 0xFF; for (iface_num = 0; iface_num < udc_ptr_conf->desc->bNumInterfaces; iface_num++) { - 1a42: cf 5f subi r28, 0xFF ; 255 + 1a60: cf 5f subi r28, 0xFF ; 255 if (0 == udc_num_configuration) { return false; // The device is not is configured state yet } // Send this request on all enabled interfaces iface_num = udd_g_ctrlreq.req.wIndex & 0xFF; for (iface_num = 0; iface_num < udc_ptr_conf->desc->bNumInterfaces; - 1a44: a0 91 bb 20 lds r26, 0x20BB ; 0x8020bb - 1a48: b0 91 bc 20 lds r27, 0x20BC ; 0x8020bc - 1a4c: ed 91 ld r30, X+ - 1a4e: fc 91 ld r31, X - 1a50: 11 97 sbiw r26, 0x01 ; 1 - 1a52: 94 81 ldd r25, Z+4 ; 0x04 - 1a54: c9 17 cp r28, r25 - 1a56: b0 f2 brcs .-84 ; 0x1a04 - 1a58: 0b c0 rjmp .+22 ; 0x1a70 + 1a62: a0 91 bb 20 lds r26, 0x20BB ; 0x8020bb + 1a66: b0 91 bc 20 lds r27, 0x20BC ; 0x8020bc + 1a6a: ed 91 ld r30, X+ + 1a6c: fc 91 ld r31, X + 1a6e: 11 97 sbiw r26, 0x01 ; 1 + 1a70: 94 81 ldd r25, Z+4 ; 0x04 + 1a72: c9 17 cp r28, r25 + 1a74: b0 f2 brcs .-84 ; 0x1a22 + 1a76: 0b c0 rjmp .+22 ; 0x1a8e { uint8_t iface_num; udi_api_t UDC_DESC_STORAGE *udi_api; if (0 == udc_num_configuration) { return false; // The device is not is configured state yet - 1a5a: 80 e0 ldi r24, 0x00 ; 0 - 1a5c: 09 c0 rjmp .+18 ; 0x1a70 + 1a78: 80 e0 ldi r24, 0x00 ; 0 + 1a7a: 09 c0 rjmp .+18 ; 0x1a8e // Send the SETUP request to the UDI if (udi_api->setup()) { return true; } } return false; - 1a5e: 80 e0 ldi r24, 0x00 ; 0 - 1a60: 07 c0 rjmp .+14 ; 0x1a70 + 1a7c: 80 e0 ldi r24, 0x00 ; 0 + 1a7e: 07 c0 rjmp .+14 ; 0x1a8e udd_g_ctrlreq.callback = NULL; udd_g_ctrlreq.over_under_run = NULL; if (Udd_setup_is_in()) { if (udd_g_ctrlreq.req.wLength == 0) { return false; // Error from USB host - 1a62: 80 e0 ldi r24, 0x00 ; 0 - 1a64: 05 c0 rjmp .+10 ; 0x1a70 + 1a80: 80 e0 ldi r24, 0x00 ; 0 + 1a82: 05 c0 rjmp .+10 ; 0x1a8e // Here SETUP request unknown by UDC and UDIs #ifdef USB_DEVICE_SPECIFIC_REQUEST // Try to decode it in specific callback return USB_DEVICE_SPECIFIC_REQUEST(); // Ex: Vendor request,... #else return false; - 1a66: 80 e0 ldi r24, 0x00 ; 0 - 1a68: 03 c0 rjmp .+6 ; 0x1a70 + 1a84: 80 e0 ldi r24, 0x00 ; 0 + 1a86: 03 c0 rjmp .+6 ; 0x1a8e } } if (Udd_setup_type() == USB_REQ_TYPE_VENDOR){ if (udc_reqvend()) { return true; - 1a6a: 81 e0 ldi r24, 0x01 ; 1 - 1a6c: 01 c0 rjmp .+2 ; 0x1a70 + 1a88: 81 e0 ldi r24, 0x01 ; 1 + 1a8a: 01 c0 rjmp .+2 ; 0x1a8e } // If standard request then try to decode it in UDC if (Udd_setup_type() == USB_REQ_TYPE_STANDARD) { if (udc_reqstd()) { return true; - 1a6e: 81 e0 ldi r24, 0x01 ; 1 + 1a8c: 81 e0 ldi r24, 0x01 ; 1 // Try to decode it in specific callback return USB_DEVICE_SPECIFIC_REQUEST(); // Ex: Vendor request,... #else return false; #endif } - 1a70: df 91 pop r29 - 1a72: cf 91 pop r28 - 1a74: 1f 91 pop r17 - 1a76: 0f 91 pop r16 - 1a78: 08 95 ret + 1a8e: df 91 pop r29 + 1a90: cf 91 pop r28 + 1a92: 1f 91 pop r17 + 1a94: 0f 91 pop r16 + 1a96: 08 95 ret -00001a7a : +00001a98 : PUBLIC_FUNCTION(ccp_write_io) #if defined(__GNUC__) out RAMPZ, r1 // Reset bits 23:16 of Z - 1a7a: 1b be out 0x3b, r1 ; 59 + 1a98: 1b be out 0x3b, r1 ; 59 movw r30, r24 // Load addr into Z - 1a7c: fc 01 movw r30, r24 + 1a9a: fc 01 movw r30, r24 ldi r18, CCP_IOREG // Load magic CCP value - 1a7e: 28 ed ldi r18, 0xD8 ; 216 + 1a9c: 28 ed ldi r18, 0xD8 ; 216 out CCP, r18 // Start CCP handshake - 1a80: 24 bf out 0x34, r18 ; 52 + 1a9e: 24 bf out 0x34, r18 ; 52 st Z, r22 // Write value to I/O register - 1a82: 60 83 st Z, r22 + 1aa0: 60 83 st Z, r22 ret // Return to caller - 1a84: 08 95 ret + 1aa2: 08 95 ret -00001a86 : +00001aa4 : #endif #ifndef __DOXYGEN__ PUBLIC_FUNCTION(nvm_read_byte) #if defined(__GNUC__) lds r20, NVM_CMD ; Store NVM command register - 1a86: 40 91 ca 01 lds r20, 0x01CA ; 0x8001ca <__TEXT_REGION_LENGTH__+0x7001ca> + 1aa4: 40 91 ca 01 lds r20, 0x01CA ; 0x8001ca <__TEXT_REGION_LENGTH__+0x7001ca> mov ZL, r22 ; Load byte index into low byte of Z. - 1a8a: e6 2f mov r30, r22 + 1aa8: e6 2f mov r30, r22 mov ZH, r23 ; Load high byte into Z. - 1a8c: f7 2f mov r31, r23 + 1aaa: f7 2f mov r31, r23 sts NVM_CMD, r24 ; Load prepared command into NVM Command register. - 1a8e: 80 93 ca 01 sts 0x01CA, r24 ; 0x8001ca <__TEXT_REGION_LENGTH__+0x7001ca> + 1aac: 80 93 ca 01 sts 0x01CA, r24 ; 0x8001ca <__TEXT_REGION_LENGTH__+0x7001ca> lpm r24, Z ; Perform an LPM to read out byte - 1a92: 84 91 lpm r24, Z + 1ab0: 84 91 lpm r24, Z sts NVM_CMD, r20 ; Restore NVM command register - 1a94: 40 93 ca 01 sts 0x01CA, r20 ; 0x8001ca <__TEXT_REGION_LENGTH__+0x7001ca> + 1ab2: 40 93 ca 01 sts 0x01CA, r20 ; 0x8001ca <__TEXT_REGION_LENGTH__+0x7001ca> sts NVM_CMD, r16 ; Load prepared command into NVM Command register. lpm r16, Z ; Perform an LPM to read out byte sts NVM_CMD, r20 ; Restore NVM command register #endif ret - 1a98: 08 95 ret + 1ab6: 08 95 ret -00001a9a : +00001ab8 : } else { // endpoint not halted then call directly callback callback(); } return true; } - 1a9a: 81 11 cpse r24, r1 - 1a9c: 22 c0 rjmp .+68 ; 0x1ae2 - 1a9e: 90 91 54 22 lds r25, 0x2254 ; 0x802254 - 1aa2: 99 23 and r25, r25 - 1aa4: d9 f0 breq .+54 ; 0x1adc - 1aa6: 90 91 43 2c lds r25, 0x2C43 ; 0x802c43 - 1aaa: 91 11 cpse r25, r1 - 1aac: 01 c0 rjmp .+2 ; 0x1ab0 - 1aae: ff cf rjmp .-2 ; 0x1aae - 1ab0: 2f b7 in r18, 0x3f ; 63 - 1ab2: f8 94 cli - 1ab4: e2 e4 ldi r30, 0x42 ; 66 - 1ab6: fc e2 ldi r31, 0x2C ; 44 - 1ab8: 91 81 ldd r25, Z+1 ; 0x01 - 1aba: 91 50 subi r25, 0x01 ; 1 - 1abc: 91 83 std Z+1, r25 ; 0x01 - 1abe: 2f bf out 0x3f, r18 ; 63 - 1ac0: 0d c0 rjmp .+26 ; 0x1adc - 1ac2: 90 91 43 2c lds r25, 0x2C43 ; 0x802c43 - 1ac6: 9f 3f cpi r25, 0xFF ; 255 - 1ac8: 09 f4 brne .+2 ; 0x1acc - 1aca: ff cf rjmp .-2 ; 0x1aca - 1acc: 2f b7 in r18, 0x3f ; 63 - 1ace: f8 94 cli - 1ad0: e2 e4 ldi r30, 0x42 ; 66 - 1ad2: fc e2 ldi r31, 0x2C ; 44 - 1ad4: 91 81 ldd r25, Z+1 ; 0x01 - 1ad6: 9f 5f subi r25, 0xFF ; 255 - 1ad8: 91 83 std Z+1, r25 ; 0x01 - 1ada: 2f bf out 0x3f, r18 ; 63 - 1adc: 80 93 54 22 sts 0x2254, r24 ; 0x802254 - 1ae0: 08 95 ret - 1ae2: 90 91 54 22 lds r25, 0x2254 ; 0x802254 - 1ae6: 99 23 and r25, r25 - 1ae8: 61 f3 breq .-40 ; 0x1ac2 - 1aea: f8 cf rjmp .-16 ; 0x1adc + 1ab8: 81 11 cpse r24, r1 + 1aba: 22 c0 rjmp .+68 ; 0x1b00 + 1abc: 90 91 54 22 lds r25, 0x2254 ; 0x802254 + 1ac0: 99 23 and r25, r25 + 1ac2: d9 f0 breq .+54 ; 0x1afa + 1ac4: 90 91 47 2c lds r25, 0x2C47 ; 0x802c47 + 1ac8: 91 11 cpse r25, r1 + 1aca: 01 c0 rjmp .+2 ; 0x1ace + 1acc: ff cf rjmp .-2 ; 0x1acc + 1ace: 2f b7 in r18, 0x3f ; 63 + 1ad0: f8 94 cli + 1ad2: e6 e4 ldi r30, 0x46 ; 70 + 1ad4: fc e2 ldi r31, 0x2C ; 44 + 1ad6: 91 81 ldd r25, Z+1 ; 0x01 + 1ad8: 91 50 subi r25, 0x01 ; 1 + 1ada: 91 83 std Z+1, r25 ; 0x01 + 1adc: 2f bf out 0x3f, r18 ; 63 + 1ade: 0d c0 rjmp .+26 ; 0x1afa + 1ae0: 90 91 47 2c lds r25, 0x2C47 ; 0x802c47 + 1ae4: 9f 3f cpi r25, 0xFF ; 255 + 1ae6: 09 f4 brne .+2 ; 0x1aea + 1ae8: ff cf rjmp .-2 ; 0x1ae8 + 1aea: 2f b7 in r18, 0x3f ; 63 + 1aec: f8 94 cli + 1aee: e6 e4 ldi r30, 0x46 ; 70 + 1af0: fc e2 ldi r31, 0x2C ; 44 + 1af2: 91 81 ldd r25, Z+1 ; 0x01 + 1af4: 9f 5f subi r25, 0xFF ; 255 + 1af6: 91 83 std Z+1, r25 ; 0x01 + 1af8: 2f bf out 0x3f, r18 ; 63 + 1afa: 80 93 54 22 sts 0x2254, r24 ; 0x802254 + 1afe: 08 95 ret + 1b00: 90 91 54 22 lds r25, 0x2254 ; 0x802254 + 1b04: 99 23 and r25, r25 + 1b06: 61 f3 breq .-40 ; 0x1ae0 + 1b08: f8 cf rjmp .-16 ; 0x1afa -00001aec : - 1aec: 0f 93 push r16 - 1aee: e8 ec ldi r30, 0xC8 ; 200 - 1af0: f4 e0 ldi r31, 0x04 ; 4 - 1af2: 80 81 ld r24, Z - 1af4: 8f 7d andi r24, 0xDF ; 223 - 1af6: 80 83 st Z, r24 - 1af8: 80 81 ld r24, Z - 1afa: 8f 7d andi r24, 0xDF ; 223 - 1afc: 80 83 st Z, r24 - 1afe: e8 e1 ldi r30, 0x18 ; 24 - 1b00: f2 e2 ldi r31, 0x22 ; 34 - 1b02: 02 e0 ldi r16, 0x02 ; 2 - 1b04: 05 93 las Z, r16 - 1b06: 10 92 1a 22 sts 0x221A, r1 ; 0x80221a - 1b0a: 10 92 1b 22 sts 0x221B, r1 ; 0x80221b - 1b0e: 00 e2 ldi r16, 0x20 ; 32 - 1b10: 06 93 lac Z, r16 - 1b12: 00 e4 ldi r16, 0x40 ; 64 - 1b14: 06 93 lac Z, r16 - 1b16: e0 e1 ldi r30, 0x10 ; 16 - 1b18: f2 e2 ldi r31, 0x22 ; 34 - 1b1a: 00 e2 ldi r16, 0x20 ; 32 - 1b1c: 06 93 lac Z, r16 - 1b1e: 00 e4 ldi r16, 0x40 ; 64 - 1b20: 06 93 lac Z, r16 - 1b22: e6 e5 ldi r30, 0x56 ; 86 - 1b24: f4 e2 ldi r31, 0x24 ; 36 - 1b26: 14 86 std Z+12, r1 ; 0x0c - 1b28: 15 86 std Z+13, r1 ; 0x0d - 1b2a: 16 86 std Z+14, r1 ; 0x0e - 1b2c: 17 86 std Z+15, r1 ; 0x0f - 1b2e: 12 86 std Z+10, r1 ; 0x0a - 1b30: 13 86 std Z+11, r1 ; 0x0b - 1b32: 10 92 ff 21 sts 0x21FF, r1 ; 0x8021ff - 1b36: 0f 91 pop r16 - 1b38: 08 95 ret +00001b0a : + 1b0a: 0f 93 push r16 + 1b0c: e8 ec ldi r30, 0xC8 ; 200 + 1b0e: f4 e0 ldi r31, 0x04 ; 4 + 1b10: 80 81 ld r24, Z + 1b12: 8f 7d andi r24, 0xDF ; 223 + 1b14: 80 83 st Z, r24 + 1b16: 80 81 ld r24, Z + 1b18: 8f 7d andi r24, 0xDF ; 223 + 1b1a: 80 83 st Z, r24 + 1b1c: e8 e1 ldi r30, 0x18 ; 24 + 1b1e: f2 e2 ldi r31, 0x22 ; 34 + 1b20: 02 e0 ldi r16, 0x02 ; 2 + 1b22: 05 93 las Z, r16 + 1b24: 10 92 1a 22 sts 0x221A, r1 ; 0x80221a + 1b28: 10 92 1b 22 sts 0x221B, r1 ; 0x80221b + 1b2c: 00 e2 ldi r16, 0x20 ; 32 + 1b2e: 06 93 lac Z, r16 + 1b30: 00 e4 ldi r16, 0x40 ; 64 + 1b32: 06 93 lac Z, r16 + 1b34: e0 e1 ldi r30, 0x10 ; 16 + 1b36: f2 e2 ldi r31, 0x22 ; 34 + 1b38: 00 e2 ldi r16, 0x20 ; 32 + 1b3a: 06 93 lac Z, r16 + 1b3c: 00 e4 ldi r16, 0x40 ; 64 + 1b3e: 06 93 lac Z, r16 + 1b40: ea e5 ldi r30, 0x5A ; 90 + 1b42: f4 e2 ldi r31, 0x24 ; 36 + 1b44: 14 86 std Z+12, r1 ; 0x0c + 1b46: 15 86 std Z+13, r1 ; 0x0d + 1b48: 16 86 std Z+14, r1 ; 0x0e + 1b4a: 17 86 std Z+15, r1 ; 0x0f + 1b4c: 12 86 std Z+10, r1 ; 0x0a + 1b4e: 13 86 std Z+11, r1 ; 0x0b + 1b50: 10 92 ff 21 sts 0x21FF, r1 ; 0x8021ff + 1b54: 0f 91 pop r16 + 1b56: 08 95 ret -00001b3a : - 1b3a: 0f 93 push r16 - 1b3c: 85 e0 ldi r24, 0x05 ; 5 - 1b3e: 80 93 ff 21 sts 0x21FF, r24 ; 0x8021ff - 1b42: e9 e1 ldi r30, 0x19 ; 25 - 1b44: f2 e2 ldi r31, 0x22 ; 34 - 1b46: 04 e0 ldi r16, 0x04 ; 4 - 1b48: 05 93 las Z, r16 - 1b4a: e1 e1 ldi r30, 0x11 ; 17 - 1b4c: f2 e2 ldi r31, 0x22 ; 34 - 1b4e: 04 e0 ldi r16, 0x04 ; 4 - 1b50: 05 93 las Z, r16 - 1b52: 0f 91 pop r16 - 1b54: 08 95 ret +00001b58 : + 1b58: 0f 93 push r16 + 1b5a: 85 e0 ldi r24, 0x05 ; 5 + 1b5c: 80 93 ff 21 sts 0x21FF, r24 ; 0x8021ff + 1b60: e9 e1 ldi r30, 0x19 ; 25 + 1b62: f2 e2 ldi r31, 0x22 ; 34 + 1b64: 04 e0 ldi r16, 0x04 ; 4 + 1b66: 05 93 las Z, r16 + 1b68: e1 e1 ldi r30, 0x11 ; 17 + 1b6a: f2 e2 ldi r31, 0x22 ; 34 + 1b6c: 04 e0 ldi r16, 0x04 ; 4 + 1b6e: 05 93 las Z, r16 + 1b70: 0f 91 pop r16 + 1b72: 08 95 ret -00001b56 : - 1b56: 0f 93 push r16 - 1b58: 83 e0 ldi r24, 0x03 ; 3 - 1b5a: 80 93 ff 21 sts 0x21FF, r24 ; 0x8021ff - 1b5e: 10 92 1a 22 sts 0x221A, r1 ; 0x80221a - 1b62: 10 92 1b 22 sts 0x221B, r1 ; 0x80221b - 1b66: e8 e1 ldi r30, 0x18 ; 24 - 1b68: f2 e2 ldi r31, 0x22 ; 34 - 1b6a: 02 e0 ldi r16, 0x02 ; 2 - 1b6c: 06 93 lac Z, r16 - 1b6e: 0f 91 pop r16 - 1b70: 08 95 ret +00001b74 : + 1b74: 0f 93 push r16 + 1b76: 83 e0 ldi r24, 0x03 ; 3 + 1b78: 80 93 ff 21 sts 0x21FF, r24 ; 0x8021ff + 1b7c: 10 92 1a 22 sts 0x221A, r1 ; 0x80221a + 1b80: 10 92 1b 22 sts 0x221B, r1 ; 0x80221b + 1b84: e8 e1 ldi r30, 0x18 ; 24 + 1b86: f2 e2 ldi r31, 0x22 ; 34 + 1b88: 02 e0 ldi r16, 0x02 ; 2 + 1b8a: 06 93 lac Z, r16 + 1b8c: 0f 91 pop r16 + 1b8e: 08 95 ret -00001b72 : - 1b72: e0 91 62 24 lds r30, 0x2462 ; 0x802462 - 1b76: f0 91 63 24 lds r31, 0x2463 ; 0x802463 - 1b7a: 30 97 sbiw r30, 0x00 ; 0 - 1b7c: 09 f0 breq .+2 ; 0x1b80 - 1b7e: 09 95 icall - 1b80: 08 95 ret +00001b90 : + 1b90: e0 91 66 24 lds r30, 0x2466 ; 0x802466 + 1b94: f0 91 67 24 lds r31, 0x2467 ; 0x802467 + 1b98: 30 97 sbiw r30, 0x00 ; 0 + 1b9a: 09 f0 breq .+2 ; 0x1b9e + 1b9c: 09 95 icall + 1b9e: 08 95 ret -00001b82 : - 1b82: 0f 93 push r16 - 1b84: cf 93 push r28 - 1b86: df 93 push r29 - 1b88: 80 91 ff 21 lds r24, 0x21FF ; 0x8021ff - 1b8c: 83 30 cpi r24, 0x03 ; 3 - 1b8e: 19 f4 brne .+6 ; 0x1b96 - 1b90: f0 df rcall .-32 ; 0x1b72 - 1b92: ac df rcall .-168 ; 0x1aec - 1b94: 5e c0 rjmp .+188 ; 0x1c52 - 1b96: 80 91 fb 21 lds r24, 0x21FB ; 0x8021fb - 1b9a: 90 91 fc 21 lds r25, 0x21FC ; 0x8021fc - 1b9e: c0 91 60 24 lds r28, 0x2460 ; 0x802460 - 1ba2: d0 91 61 24 lds r29, 0x2461 ; 0x802461 - 1ba6: c8 1b sub r28, r24 - 1ba8: d9 0b sbc r29, r25 - 1baa: 71 f5 brne .+92 ; 0x1c08 - 1bac: 20 91 fd 21 lds r18, 0x21FD ; 0x8021fd - 1bb0: 30 91 fe 21 lds r19, 0x21FE ; 0x8021fe - 1bb4: 82 0f add r24, r18 - 1bb6: 93 1f adc r25, r19 - 1bb8: 80 93 fd 21 sts 0x21FD, r24 ; 0x8021fd - 1bbc: 90 93 fe 21 sts 0x21FE, r25 ; 0x8021fe - 1bc0: 20 91 5c 24 lds r18, 0x245C ; 0x80245c - 1bc4: 30 91 5d 24 lds r19, 0x245D ; 0x80245d - 1bc8: 82 17 cp r24, r18 - 1bca: 93 07 cpc r25, r19 - 1bcc: 21 f0 breq .+8 ; 0x1bd6 - 1bce: 80 91 c4 20 lds r24, 0x20C4 ; 0x8020c4 - 1bd2: 88 23 and r24, r24 - 1bd4: 41 f0 breq .+16 ; 0x1be6 - 1bd6: 84 e0 ldi r24, 0x04 ; 4 - 1bd8: 80 93 ff 21 sts 0x21FF, r24 ; 0x8021ff - 1bdc: e0 e1 ldi r30, 0x10 ; 16 - 1bde: f2 e2 ldi r31, 0x22 ; 34 - 1be0: 02 e0 ldi r16, 0x02 ; 2 - 1be2: 06 93 lac Z, r16 - 1be4: 36 c0 rjmp .+108 ; 0x1c52 - 1be6: e0 91 64 24 lds r30, 0x2464 ; 0x802464 - 1bea: f0 91 65 24 lds r31, 0x2465 ; 0x802465 - 1bee: 30 97 sbiw r30, 0x00 ; 0 - 1bf0: 99 f0 breq .+38 ; 0x1c18 - 1bf2: 09 95 icall - 1bf4: 88 23 and r24, r24 - 1bf6: 81 f0 breq .+32 ; 0x1c18 - 1bf8: 10 92 fb 21 sts 0x21FB, r1 ; 0x8021fb - 1bfc: 10 92 fc 21 sts 0x21FC, r1 ; 0x8021fc - 1c00: c0 91 60 24 lds r28, 0x2460 ; 0x802460 - 1c04: d0 91 61 24 lds r29, 0x2461 ; 0x802461 - 1c08: c0 34 cpi r28, 0x40 ; 64 - 1c0a: d1 05 cpc r29, r1 - 1c0c: 28 f0 brcs .+10 ; 0x1c18 - 1c0e: 10 92 c4 20 sts 0x20C4, r1 ; 0x8020c4 - 1c12: c0 e4 ldi r28, 0x40 ; 64 - 1c14: d0 e0 ldi r29, 0x00 ; 0 - 1c16: 03 c0 rjmp .+6 ; 0x1c1e - 1c18: 81 e0 ldi r24, 0x01 ; 1 - 1c1a: 80 93 c4 20 sts 0x20C4, r24 ; 0x8020c4 - 1c1e: e0 e0 ldi r30, 0x00 ; 0 - 1c20: f2 e2 ldi r31, 0x22 ; 34 - 1c22: c2 8f std Z+26, r28 ; 0x1a - 1c24: d3 8f std Z+27, r29 ; 0x1b - 1c26: 80 91 fb 21 lds r24, 0x21FB ; 0x8021fb - 1c2a: 90 91 fc 21 lds r25, 0x21FC ; 0x8021fc - 1c2e: 20 91 5e 24 lds r18, 0x245E ; 0x80245e - 1c32: 30 91 5f 24 lds r19, 0x245F ; 0x80245f - 1c36: 28 0f add r18, r24 - 1c38: 39 1f adc r19, r25 - 1c3a: 24 8f std Z+28, r18 ; 0x1c - 1c3c: 35 8f std Z+29, r19 ; 0x1d - 1c3e: c8 0f add r28, r24 - 1c40: d9 1f adc r29, r25 - 1c42: c0 93 fb 21 sts 0x21FB, r28 ; 0x8021fb - 1c46: d0 93 fc 21 sts 0x21FC, r29 ; 0x8021fc - 1c4a: e8 e1 ldi r30, 0x18 ; 24 - 1c4c: f2 e2 ldi r31, 0x22 ; 34 - 1c4e: 02 e0 ldi r16, 0x02 ; 2 - 1c50: 06 93 lac Z, r16 - 1c52: df 91 pop r29 - 1c54: cf 91 pop r28 - 1c56: 0f 91 pop r16 - 1c58: 08 95 ret +00001ba0 : + 1ba0: 0f 93 push r16 + 1ba2: cf 93 push r28 + 1ba4: df 93 push r29 + 1ba6: 80 91 ff 21 lds r24, 0x21FF ; 0x8021ff + 1baa: 83 30 cpi r24, 0x03 ; 3 + 1bac: 19 f4 brne .+6 ; 0x1bb4 + 1bae: f0 df rcall .-32 ; 0x1b90 + 1bb0: ac df rcall .-168 ; 0x1b0a + 1bb2: 5e c0 rjmp .+188 ; 0x1c70 + 1bb4: 80 91 fb 21 lds r24, 0x21FB ; 0x8021fb + 1bb8: 90 91 fc 21 lds r25, 0x21FC ; 0x8021fc + 1bbc: c0 91 64 24 lds r28, 0x2464 ; 0x802464 + 1bc0: d0 91 65 24 lds r29, 0x2465 ; 0x802465 + 1bc4: c8 1b sub r28, r24 + 1bc6: d9 0b sbc r29, r25 + 1bc8: 71 f5 brne .+92 ; 0x1c26 + 1bca: 20 91 fd 21 lds r18, 0x21FD ; 0x8021fd + 1bce: 30 91 fe 21 lds r19, 0x21FE ; 0x8021fe + 1bd2: 82 0f add r24, r18 + 1bd4: 93 1f adc r25, r19 + 1bd6: 80 93 fd 21 sts 0x21FD, r24 ; 0x8021fd + 1bda: 90 93 fe 21 sts 0x21FE, r25 ; 0x8021fe + 1bde: 20 91 60 24 lds r18, 0x2460 ; 0x802460 + 1be2: 30 91 61 24 lds r19, 0x2461 ; 0x802461 + 1be6: 82 17 cp r24, r18 + 1be8: 93 07 cpc r25, r19 + 1bea: 21 f0 breq .+8 ; 0x1bf4 + 1bec: 80 91 c4 20 lds r24, 0x20C4 ; 0x8020c4 + 1bf0: 88 23 and r24, r24 + 1bf2: 41 f0 breq .+16 ; 0x1c04 + 1bf4: 84 e0 ldi r24, 0x04 ; 4 + 1bf6: 80 93 ff 21 sts 0x21FF, r24 ; 0x8021ff + 1bfa: e0 e1 ldi r30, 0x10 ; 16 + 1bfc: f2 e2 ldi r31, 0x22 ; 34 + 1bfe: 02 e0 ldi r16, 0x02 ; 2 + 1c00: 06 93 lac Z, r16 + 1c02: 36 c0 rjmp .+108 ; 0x1c70 + 1c04: e0 91 68 24 lds r30, 0x2468 ; 0x802468 + 1c08: f0 91 69 24 lds r31, 0x2469 ; 0x802469 + 1c0c: 30 97 sbiw r30, 0x00 ; 0 + 1c0e: 99 f0 breq .+38 ; 0x1c36 + 1c10: 09 95 icall + 1c12: 88 23 and r24, r24 + 1c14: 81 f0 breq .+32 ; 0x1c36 + 1c16: 10 92 fb 21 sts 0x21FB, r1 ; 0x8021fb + 1c1a: 10 92 fc 21 sts 0x21FC, r1 ; 0x8021fc + 1c1e: c0 91 64 24 lds r28, 0x2464 ; 0x802464 + 1c22: d0 91 65 24 lds r29, 0x2465 ; 0x802465 + 1c26: c0 34 cpi r28, 0x40 ; 64 + 1c28: d1 05 cpc r29, r1 + 1c2a: 28 f0 brcs .+10 ; 0x1c36 + 1c2c: 10 92 c4 20 sts 0x20C4, r1 ; 0x8020c4 + 1c30: c0 e4 ldi r28, 0x40 ; 64 + 1c32: d0 e0 ldi r29, 0x00 ; 0 + 1c34: 03 c0 rjmp .+6 ; 0x1c3c + 1c36: 81 e0 ldi r24, 0x01 ; 1 + 1c38: 80 93 c4 20 sts 0x20C4, r24 ; 0x8020c4 + 1c3c: e0 e0 ldi r30, 0x00 ; 0 + 1c3e: f2 e2 ldi r31, 0x22 ; 34 + 1c40: c2 8f std Z+26, r28 ; 0x1a + 1c42: d3 8f std Z+27, r29 ; 0x1b + 1c44: 80 91 fb 21 lds r24, 0x21FB ; 0x8021fb + 1c48: 90 91 fc 21 lds r25, 0x21FC ; 0x8021fc + 1c4c: 20 91 62 24 lds r18, 0x2462 ; 0x802462 + 1c50: 30 91 63 24 lds r19, 0x2463 ; 0x802463 + 1c54: 28 0f add r18, r24 + 1c56: 39 1f adc r19, r25 + 1c58: 24 8f std Z+28, r18 ; 0x1c + 1c5a: 35 8f std Z+29, r19 ; 0x1d + 1c5c: c8 0f add r28, r24 + 1c5e: d9 1f adc r29, r25 + 1c60: c0 93 fb 21 sts 0x21FB, r28 ; 0x8021fb + 1c64: d0 93 fc 21 sts 0x21FC, r29 ; 0x8021fc + 1c68: e8 e1 ldi r30, 0x18 ; 24 + 1c6a: f2 e2 ldi r31, 0x22 ; 34 + 1c6c: 02 e0 ldi r16, 0x02 ; 2 + 1c6e: 06 93 lac Z, r16 + 1c70: df 91 pop r29 + 1c72: cf 91 pop r28 + 1c74: 0f 91 pop r16 + 1c76: 08 95 ret -00001c5a : - 1c5a: fc 01 movw r30, r24 - 1c5c: 81 81 ldd r24, Z+1 ; 0x01 - 1c5e: e8 2f mov r30, r24 - 1c60: e7 70 andi r30, 0x07 ; 7 - 1c62: 8e 2f mov r24, r30 - 1c64: 90 e0 ldi r25, 0x00 ; 0 - 1c66: fc 01 movw r30, r24 - 1c68: 31 97 sbiw r30, 0x01 ; 1 - 1c6a: e7 30 cpi r30, 0x07 ; 7 - 1c6c: f1 05 cpc r31, r1 - 1c6e: c0 f4 brcc .+48 ; 0x1ca0 - 1c70: ea 5d subi r30, 0xDA ; 218 - 1c72: fe 4f sbci r31, 0xFE ; 254 - 1c74: 7a c6 rjmp .+3316 ; 0x296a <__tablejump2__> - 1c76: 80 e1 ldi r24, 0x10 ; 16 - 1c78: 90 e0 ldi r25, 0x00 ; 0 - 1c7a: 08 95 ret - 1c7c: 80 e2 ldi r24, 0x20 ; 32 - 1c7e: 90 e0 ldi r25, 0x00 ; 0 - 1c80: 08 95 ret - 1c82: 80 e4 ldi r24, 0x40 ; 64 - 1c84: 90 e0 ldi r25, 0x00 ; 0 - 1c86: 08 95 ret - 1c88: 80 e8 ldi r24, 0x80 ; 128 - 1c8a: 90 e0 ldi r25, 0x00 ; 0 - 1c8c: 08 95 ret - 1c8e: 80 e0 ldi r24, 0x00 ; 0 - 1c90: 91 e0 ldi r25, 0x01 ; 1 - 1c92: 08 95 ret - 1c94: 80 e0 ldi r24, 0x00 ; 0 - 1c96: 92 e0 ldi r25, 0x02 ; 2 +00001c78 : + 1c78: fc 01 movw r30, r24 + 1c7a: 81 81 ldd r24, Z+1 ; 0x01 + 1c7c: e8 2f mov r30, r24 + 1c7e: e7 70 andi r30, 0x07 ; 7 + 1c80: 8e 2f mov r24, r30 + 1c82: 90 e0 ldi r25, 0x00 ; 0 + 1c84: fc 01 movw r30, r24 + 1c86: 31 97 sbiw r30, 0x01 ; 1 + 1c88: e7 30 cpi r30, 0x07 ; 7 + 1c8a: f1 05 cpc r31, r1 + 1c8c: c0 f4 brcc .+48 ; 0x1cbe + 1c8e: ea 5d subi r30, 0xDA ; 218 + 1c90: fe 4f sbci r31, 0xFE ; 254 + 1c92: 7a c6 rjmp .+3316 ; 0x2988 <__tablejump2__> + 1c94: 80 e1 ldi r24, 0x10 ; 16 + 1c96: 90 e0 ldi r25, 0x00 ; 0 1c98: 08 95 ret - 1c9a: 8f ef ldi r24, 0xFF ; 255 - 1c9c: 93 e0 ldi r25, 0x03 ; 3 + 1c9a: 80 e2 ldi r24, 0x20 ; 32 + 1c9c: 90 e0 ldi r25, 0x00 ; 0 1c9e: 08 95 ret - 1ca0: 88 e0 ldi r24, 0x08 ; 8 + 1ca0: 80 e4 ldi r24, 0x40 ; 64 1ca2: 90 e0 ldi r25, 0x00 ; 0 1ca4: 08 95 ret + 1ca6: 80 e8 ldi r24, 0x80 ; 128 + 1ca8: 90 e0 ldi r25, 0x00 ; 0 + 1caa: 08 95 ret + 1cac: 80 e0 ldi r24, 0x00 ; 0 + 1cae: 91 e0 ldi r25, 0x01 ; 1 + 1cb0: 08 95 ret + 1cb2: 80 e0 ldi r24, 0x00 ; 0 + 1cb4: 92 e0 ldi r25, 0x02 ; 2 + 1cb6: 08 95 ret + 1cb8: 8f ef ldi r24, 0xFF ; 255 + 1cba: 93 e0 ldi r25, 0x03 ; 3 + 1cbc: 08 95 ret + 1cbe: 88 e0 ldi r24, 0x08 ; 8 + 1cc0: 90 e0 ldi r25, 0x00 ; 0 + 1cc2: 08 95 ret -00001ca6 : - 1ca6: 28 2f mov r18, r24 - 1ca8: 2f 70 andi r18, 0x0F ; 15 - 1caa: 30 e0 ldi r19, 0x00 ; 0 - 1cac: 22 0f add r18, r18 - 1cae: 33 1f adc r19, r19 - 1cb0: 08 2e mov r0, r24 - 1cb2: 00 0c add r0, r0 - 1cb4: 99 0b sbc r25, r25 - 1cb6: 88 27 eor r24, r24 - 1cb8: 99 0f add r25, r25 - 1cba: 88 1f adc r24, r24 - 1cbc: 99 27 eor r25, r25 - 1cbe: 82 0f add r24, r18 - 1cc0: 93 1f adc r25, r19 - 1cc2: 02 97 sbiw r24, 0x02 ; 2 - 1cc4: 9c 01 movw r18, r24 - 1cc6: 22 0f add r18, r18 - 1cc8: 33 1f adc r19, r19 +00001cc4 : + 1cc4: 28 2f mov r18, r24 + 1cc6: 2f 70 andi r18, 0x0F ; 15 + 1cc8: 30 e0 ldi r19, 0x00 ; 0 1cca: 22 0f add r18, r18 1ccc: 33 1f adc r19, r19 - 1cce: 22 0f add r18, r18 - 1cd0: 33 1f adc r19, r19 - 1cd2: 82 0f add r24, r18 - 1cd4: 93 1f adc r25, r19 - 1cd6: 8b 57 subi r24, 0x7B ; 123 - 1cd8: 9e 4d sbci r25, 0xDE ; 222 - 1cda: 08 95 ret + 1cce: 08 2e mov r0, r24 + 1cd0: 00 0c add r0, r0 + 1cd2: 99 0b sbc r25, r25 + 1cd4: 88 27 eor r24, r24 + 1cd6: 99 0f add r25, r25 + 1cd8: 88 1f adc r24, r24 + 1cda: 99 27 eor r25, r25 + 1cdc: 82 0f add r24, r18 + 1cde: 93 1f adc r25, r19 + 1ce0: 02 97 sbiw r24, 0x02 ; 2 + 1ce2: 9c 01 movw r18, r24 + 1ce4: 22 0f add r18, r18 + 1ce6: 33 1f adc r19, r19 + 1ce8: 22 0f add r18, r18 + 1cea: 33 1f adc r19, r19 + 1cec: 22 0f add r18, r18 + 1cee: 33 1f adc r19, r19 + 1cf0: 82 0f add r24, r18 + 1cf2: 93 1f adc r25, r19 + 1cf4: 8b 57 subi r24, 0x7B ; 123 + 1cf6: 9e 4d sbci r25, 0xDE ; 222 + 1cf8: 08 95 ret -00001cdc : - 1cdc: 0f 93 push r16 - 1cde: cf 93 push r28 - 1ce0: 80 91 cc 04 lds r24, 0x04CC ; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc> - 1ce4: 80 ff sbrs r24, 0 - 1ce6: 62 c0 rjmp .+196 ; 0x1dac - 1ce8: 81 e0 ldi r24, 0x01 ; 1 - 1cea: 80 93 cc 04 sts 0x04CC, r24 ; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc> - 1cee: e0 e1 ldi r30, 0x10 ; 16 - 1cf0: f2 e2 ldi r31, 0x22 ; 34 - 1cf2: 00 e8 ldi r16, 0x80 ; 128 - 1cf4: 06 93 lac Z, r16 - 1cf6: e8 e1 ldi r30, 0x18 ; 24 - 1cf8: f2 e2 ldi r31, 0x22 ; 34 - 1cfa: 00 e8 ldi r16, 0x80 ; 128 - 1cfc: 06 93 lac Z, r16 - 1cfe: 80 93 ca 04 sts 0x04CA, r24 ; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca> - 1d02: e0 e1 ldi r30, 0x10 ; 16 - 1d04: f2 e2 ldi r31, 0x22 ; 34 - 1d06: 00 e1 ldi r16, 0x10 ; 16 - 1d08: 06 93 lac Z, r16 - 1d0a: 80 91 ff 21 lds r24, 0x21FF ; 0x8021ff - 1d0e: 88 23 and r24, r24 - 1d10: 29 f0 breq .+10 ; 0x1d1c - 1d12: 83 50 subi r24, 0x03 ; 3 - 1d14: 82 30 cpi r24, 0x02 ; 2 - 1d16: 08 f4 brcc .+2 ; 0x1d1a - 1d18: 2c df rcall .-424 ; 0x1b72 - 1d1a: e8 de rcall .-560 ; 0x1aec - 1d1c: 80 91 12 22 lds r24, 0x2212 ; 0x802212 - 1d20: 90 91 13 22 lds r25, 0x2213 ; 0x802213 - 1d24: 08 97 sbiw r24, 0x08 ; 8 - 1d26: 09 f0 breq .+2 ; 0x1d2a - 1d28: 43 c0 rjmp .+134 ; 0x1db0 - 1d2a: 88 e0 ldi r24, 0x08 ; 8 - 1d2c: eb eb ldi r30, 0xBB ; 187 - 1d2e: f1 e2 ldi r31, 0x21 ; 33 - 1d30: a6 e5 ldi r26, 0x56 ; 86 - 1d32: b4 e2 ldi r27, 0x24 ; 36 - 1d34: 01 90 ld r0, Z+ - 1d36: 0d 92 st X+, r0 - 1d38: 8a 95 dec r24 - 1d3a: e1 f7 brne .-8 ; 0x1d34 - 1d3c: e8 ec ldi r30, 0xC8 ; 200 - 1d3e: f4 e0 ldi r31, 0x04 ; 4 - 1d40: 80 81 ld r24, Z - 1d42: 80 62 ori r24, 0x20 ; 32 - 1d44: 80 83 st Z, r24 - 1d46: 80 81 ld r24, Z - 1d48: 80 62 ori r24, 0x20 ; 32 - 1d4a: 80 83 st Z, r24 - 1d4c: 10 db rcall .-2528 ; 0x136e - 1d4e: c8 2f mov r28, r24 - 1d50: 81 11 cpse r24, r1 - 1d52: 03 c0 rjmp .+6 ; 0x1d5a - 1d54: f2 de rcall .-540 ; 0x1b3a - 1d56: c1 e0 ldi r28, 0x01 ; 1 - 1d58: 2c c0 rjmp .+88 ; 0x1db2 - 1d5a: 80 91 56 24 lds r24, 0x2456 ; 0x802456 - 1d5e: 88 23 and r24, r24 - 1d60: 6c f4 brge .+26 ; 0x1d7c - 1d62: 10 92 fd 21 sts 0x21FD, r1 ; 0x8021fd - 1d66: 10 92 fe 21 sts 0x21FE, r1 ; 0x8021fe - 1d6a: 10 92 fb 21 sts 0x21FB, r1 ; 0x8021fb - 1d6e: 10 92 fc 21 sts 0x21FC, r1 ; 0x8021fc - 1d72: 82 e0 ldi r24, 0x02 ; 2 - 1d74: 80 93 ff 21 sts 0x21FF, r24 ; 0x8021ff - 1d78: 04 df rcall .-504 ; 0x1b82 - 1d7a: 1b c0 rjmp .+54 ; 0x1db2 - 1d7c: 80 91 5c 24 lds r24, 0x245C ; 0x80245c - 1d80: 90 91 5d 24 lds r25, 0x245D ; 0x80245d - 1d84: 89 2b or r24, r25 - 1d86: 11 f4 brne .+4 ; 0x1d8c - 1d88: e6 de rcall .-564 ; 0x1b56 - 1d8a: 13 c0 rjmp .+38 ; 0x1db2 - 1d8c: 10 92 fd 21 sts 0x21FD, r1 ; 0x8021fd - 1d90: 10 92 fe 21 sts 0x21FE, r1 ; 0x8021fe - 1d94: 10 92 fb 21 sts 0x21FB, r1 ; 0x8021fb - 1d98: 10 92 fc 21 sts 0x21FC, r1 ; 0x8021fc - 1d9c: 81 e0 ldi r24, 0x01 ; 1 - 1d9e: 80 93 ff 21 sts 0x21FF, r24 ; 0x8021ff - 1da2: e0 e1 ldi r30, 0x10 ; 16 - 1da4: f2 e2 ldi r31, 0x22 ; 34 - 1da6: 02 e0 ldi r16, 0x02 ; 2 - 1da8: 06 93 lac Z, r16 - 1daa: 03 c0 rjmp .+6 ; 0x1db2 - 1dac: c0 e0 ldi r28, 0x00 ; 0 - 1dae: 01 c0 rjmp .+2 ; 0x1db2 - 1db0: c1 e0 ldi r28, 0x01 ; 1 - 1db2: 8c 2f mov r24, r28 - 1db4: cf 91 pop r28 - 1db6: 0f 91 pop r16 - 1db8: 08 95 ret +00001cfa : + 1cfa: 0f 93 push r16 + 1cfc: cf 93 push r28 + 1cfe: 80 91 cc 04 lds r24, 0x04CC ; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc> + 1d02: 80 ff sbrs r24, 0 + 1d04: 62 c0 rjmp .+196 ; 0x1dca + 1d06: 81 e0 ldi r24, 0x01 ; 1 + 1d08: 80 93 cc 04 sts 0x04CC, r24 ; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc> + 1d0c: e0 e1 ldi r30, 0x10 ; 16 + 1d0e: f2 e2 ldi r31, 0x22 ; 34 + 1d10: 00 e8 ldi r16, 0x80 ; 128 + 1d12: 06 93 lac Z, r16 + 1d14: e8 e1 ldi r30, 0x18 ; 24 + 1d16: f2 e2 ldi r31, 0x22 ; 34 + 1d18: 00 e8 ldi r16, 0x80 ; 128 + 1d1a: 06 93 lac Z, r16 + 1d1c: 80 93 ca 04 sts 0x04CA, r24 ; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca> + 1d20: e0 e1 ldi r30, 0x10 ; 16 + 1d22: f2 e2 ldi r31, 0x22 ; 34 + 1d24: 00 e1 ldi r16, 0x10 ; 16 + 1d26: 06 93 lac Z, r16 + 1d28: 80 91 ff 21 lds r24, 0x21FF ; 0x8021ff + 1d2c: 88 23 and r24, r24 + 1d2e: 29 f0 breq .+10 ; 0x1d3a + 1d30: 83 50 subi r24, 0x03 ; 3 + 1d32: 82 30 cpi r24, 0x02 ; 2 + 1d34: 08 f4 brcc .+2 ; 0x1d38 + 1d36: 2c df rcall .-424 ; 0x1b90 + 1d38: e8 de rcall .-560 ; 0x1b0a + 1d3a: 80 91 12 22 lds r24, 0x2212 ; 0x802212 + 1d3e: 90 91 13 22 lds r25, 0x2213 ; 0x802213 + 1d42: 08 97 sbiw r24, 0x08 ; 8 + 1d44: 09 f0 breq .+2 ; 0x1d48 + 1d46: 43 c0 rjmp .+134 ; 0x1dce + 1d48: 88 e0 ldi r24, 0x08 ; 8 + 1d4a: eb eb ldi r30, 0xBB ; 187 + 1d4c: f1 e2 ldi r31, 0x21 ; 33 + 1d4e: aa e5 ldi r26, 0x5A ; 90 + 1d50: b4 e2 ldi r27, 0x24 ; 36 + 1d52: 01 90 ld r0, Z+ + 1d54: 0d 92 st X+, r0 + 1d56: 8a 95 dec r24 + 1d58: e1 f7 brne .-8 ; 0x1d52 + 1d5a: e8 ec ldi r30, 0xC8 ; 200 + 1d5c: f4 e0 ldi r31, 0x04 ; 4 + 1d5e: 80 81 ld r24, Z + 1d60: 80 62 ori r24, 0x20 ; 32 + 1d62: 80 83 st Z, r24 + 1d64: 80 81 ld r24, Z + 1d66: 80 62 ori r24, 0x20 ; 32 + 1d68: 80 83 st Z, r24 + 1d6a: 10 db rcall .-2528 ; 0x138c + 1d6c: c8 2f mov r28, r24 + 1d6e: 81 11 cpse r24, r1 + 1d70: 03 c0 rjmp .+6 ; 0x1d78 + 1d72: f2 de rcall .-540 ; 0x1b58 + 1d74: c1 e0 ldi r28, 0x01 ; 1 + 1d76: 2c c0 rjmp .+88 ; 0x1dd0 + 1d78: 80 91 5a 24 lds r24, 0x245A ; 0x80245a + 1d7c: 88 23 and r24, r24 + 1d7e: 6c f4 brge .+26 ; 0x1d9a + 1d80: 10 92 fd 21 sts 0x21FD, r1 ; 0x8021fd + 1d84: 10 92 fe 21 sts 0x21FE, r1 ; 0x8021fe + 1d88: 10 92 fb 21 sts 0x21FB, r1 ; 0x8021fb + 1d8c: 10 92 fc 21 sts 0x21FC, r1 ; 0x8021fc + 1d90: 82 e0 ldi r24, 0x02 ; 2 + 1d92: 80 93 ff 21 sts 0x21FF, r24 ; 0x8021ff + 1d96: 04 df rcall .-504 ; 0x1ba0 + 1d98: 1b c0 rjmp .+54 ; 0x1dd0 + 1d9a: 80 91 60 24 lds r24, 0x2460 ; 0x802460 + 1d9e: 90 91 61 24 lds r25, 0x2461 ; 0x802461 + 1da2: 89 2b or r24, r25 + 1da4: 11 f4 brne .+4 ; 0x1daa + 1da6: e6 de rcall .-564 ; 0x1b74 + 1da8: 13 c0 rjmp .+38 ; 0x1dd0 + 1daa: 10 92 fd 21 sts 0x21FD, r1 ; 0x8021fd + 1dae: 10 92 fe 21 sts 0x21FE, r1 ; 0x8021fe + 1db2: 10 92 fb 21 sts 0x21FB, r1 ; 0x8021fb + 1db6: 10 92 fc 21 sts 0x21FC, r1 ; 0x8021fc + 1dba: 81 e0 ldi r24, 0x01 ; 1 + 1dbc: 80 93 ff 21 sts 0x21FF, r24 ; 0x8021ff + 1dc0: e0 e1 ldi r30, 0x10 ; 16 + 1dc2: f2 e2 ldi r31, 0x22 ; 34 + 1dc4: 02 e0 ldi r16, 0x02 ; 2 + 1dc6: 06 93 lac Z, r16 + 1dc8: 03 c0 rjmp .+6 ; 0x1dd0 + 1dca: c0 e0 ldi r28, 0x00 ; 0 + 1dcc: 01 c0 rjmp .+2 ; 0x1dd0 + 1dce: c1 e0 ldi r28, 0x01 ; 1 + 1dd0: 8c 2f mov r24, r28 + 1dd2: cf 91 pop r28 + 1dd4: 0f 91 pop r16 + 1dd6: 08 95 ret -00001dba : - 1dba: 8f 92 push r8 - 1dbc: 9f 92 push r9 - 1dbe: af 92 push r10 - 1dc0: bf 92 push r11 - 1dc2: df 92 push r13 - 1dc4: ef 92 push r14 - 1dc6: ff 92 push r15 - 1dc8: 0f 93 push r16 - 1dca: 1f 93 push r17 - 1dcc: cf 93 push r28 - 1dce: df 93 push r29 - 1dd0: d8 2e mov r13, r24 - 1dd2: 69 df rcall .-302 ; 0x1ca6 - 1dd4: 8c 01 movw r16, r24 - 1dd6: bd 2c mov r11, r13 - 1dd8: bb 1c adc r11, r11 - 1dda: bb 24 eor r11, r11 - 1ddc: bb 1c adc r11, r11 - 1dde: cd 2d mov r28, r13 - 1de0: cf 70 andi r28, 0x0F ; 15 - 1de2: d0 e0 ldi r29, 0x00 ; 0 - 1de4: cc 0f add r28, r28 - 1de6: dd 1f adc r29, r29 - 1de8: cb 0d add r28, r11 - 1dea: d1 1d adc r29, r1 - 1dec: ce 01 movw r24, r28 - 1dee: 88 0f add r24, r24 - 1df0: 99 1f adc r25, r25 - 1df2: 88 0f add r24, r24 - 1df4: 99 1f adc r25, r25 - 1df6: 88 0f add r24, r24 - 1df8: 99 1f adc r25, r25 - 1dfa: 9c 01 movw r18, r24 - 1dfc: 20 5f subi r18, 0xF0 ; 240 - 1dfe: 3d 4d sbci r19, 0xDD ; 221 - 1e00: 79 01 movw r14, r18 - 1e02: c9 01 movw r24, r18 - 1e04: 2a df rcall .-428 ; 0x1c5a - 1e06: 4c 01 movw r8, r24 - 1e08: bb 20 and r11, r11 - 1e0a: 09 f4 brne .+2 ; 0x1e0e - 1e0c: 70 c0 rjmp .+224 ; 0x1eee - 1e0e: fe 01 movw r30, r28 - 1e10: ee 0f add r30, r30 - 1e12: ff 1f adc r31, r31 - 1e14: ee 0f add r30, r30 - 1e16: ff 1f adc r31, r31 - 1e18: ee 0f add r30, r30 - 1e1a: ff 1f adc r31, r31 - 1e1c: e0 50 subi r30, 0x00 ; 0 - 1e1e: fe 4d sbci r31, 0xDE ; 222 - 1e20: 26 89 ldd r18, Z+22 ; 0x16 - 1e22: 37 89 ldd r19, Z+23 ; 0x17 - 1e24: d8 01 movw r26, r16 - 1e26: 15 96 adiw r26, 0x05 ; 5 - 1e28: 8d 91 ld r24, X+ - 1e2a: 9c 91 ld r25, X - 1e2c: 16 97 sbiw r26, 0x06 ; 6 - 1e2e: 82 0f add r24, r18 - 1e30: 93 1f adc r25, r19 - 1e32: 15 96 adiw r26, 0x05 ; 5 - 1e34: 8d 93 st X+, r24 - 1e36: 9c 93 st X, r25 - 1e38: 16 97 sbiw r26, 0x06 ; 6 - 1e3a: 13 96 adiw r26, 0x03 ; 3 - 1e3c: 2d 91 ld r18, X+ - 1e3e: 3c 91 ld r19, X - 1e40: 14 97 sbiw r26, 0x04 ; 4 - 1e42: 82 17 cp r24, r18 - 1e44: 93 07 cpc r25, r19 - 1e46: 09 f4 brne .+2 ; 0x1e4a - 1e48: 3c c0 rjmp .+120 ; 0x1ec2 - 1e4a: 28 1b sub r18, r24 - 1e4c: 39 0b sbc r19, r25 - 1e4e: 21 15 cp r18, r1 - 1e50: b4 e0 ldi r27, 0x04 ; 4 - 1e52: 3b 07 cpc r19, r27 - 1e54: 38 f0 brcs .+14 ; 0x1e64 - 1e56: 2f ef ldi r18, 0xFF ; 255 - 1e58: 33 e0 ldi r19, 0x03 ; 3 - 1e5a: c9 01 movw r24, r18 - 1e5c: b4 01 movw r22, r8 - 1e5e: 71 d5 rcall .+2786 ; 0x2942 <__udivmodhi4> - 1e60: 28 1b sub r18, r24 - 1e62: 39 0b sbc r19, r25 - 1e64: f8 01 movw r30, r16 - 1e66: 80 81 ld r24, Z - 1e68: 81 ff sbrs r24, 1 - 1e6a: 09 c0 rjmp .+18 ; 0x1e7e - 1e6c: c9 01 movw r24, r18 - 1e6e: b4 01 movw r22, r8 - 1e70: 68 d5 rcall .+2768 ; 0x2942 <__udivmodhi4> - 1e72: 41 e0 ldi r20, 0x01 ; 1 - 1e74: 89 2b or r24, r25 - 1e76: 09 f0 breq .+2 ; 0x1e7a - 1e78: 40 e0 ldi r20, 0x00 ; 0 - 1e7a: 84 2f mov r24, r20 - 1e7c: 01 c0 rjmp .+2 ; 0x1e80 - 1e7e: 80 e0 ldi r24, 0x00 ; 0 - 1e80: d8 01 movw r26, r16 - 1e82: 9c 91 ld r25, X - 1e84: 80 fb bst r24, 0 - 1e86: 91 f9 bld r25, 1 - 1e88: 9c 93 st X, r25 - 1e8a: cc 0f add r28, r28 - 1e8c: dd 1f adc r29, r29 - 1e8e: cc 0f add r28, r28 - 1e90: dd 1f adc r29, r29 - 1e92: cc 0f add r28, r28 - 1e94: dd 1f adc r29, r29 - 1e96: c0 50 subi r28, 0x00 ; 0 - 1e98: de 4d sbci r29, 0xDE ; 222 - 1e9a: 1e 8a std Y+22, r1 ; 0x16 - 1e9c: 1f 8a std Y+23, r1 ; 0x17 - 1e9e: 2a 8b std Y+18, r18 ; 0x12 - 1ea0: 3b 8b std Y+19, r19 ; 0x13 - 1ea2: 11 96 adiw r26, 0x01 ; 1 - 1ea4: 2d 91 ld r18, X+ - 1ea6: 3c 91 ld r19, X - 1ea8: 12 97 sbiw r26, 0x02 ; 2 - 1eaa: 15 96 adiw r26, 0x05 ; 5 - 1eac: 8d 91 ld r24, X+ - 1eae: 9c 91 ld r25, X - 1eb0: 16 97 sbiw r26, 0x06 ; 6 - 1eb2: 82 0f add r24, r18 - 1eb4: 93 1f adc r25, r19 - 1eb6: 8c 8b std Y+20, r24 ; 0x14 - 1eb8: 9d 8b std Y+21, r25 ; 0x15 - 1eba: f7 01 movw r30, r14 - 1ebc: 02 e0 ldi r16, 0x02 ; 2 - 1ebe: 06 93 lac Z, r16 - 1ec0: ca c0 rjmp .+404 ; 0x2056 - 1ec2: d8 01 movw r26, r16 - 1ec4: 8c 91 ld r24, X - 1ec6: 81 ff sbrs r24, 1 - 1ec8: b3 c0 rjmp .+358 ; 0x2030 - 1eca: 8d 7f andi r24, 0xFD ; 253 - 1ecc: 8c 93 st X, r24 - 1ece: cc 0f add r28, r28 - 1ed0: dd 1f adc r29, r29 - 1ed2: cc 0f add r28, r28 - 1ed4: dd 1f adc r29, r29 - 1ed6: cc 0f add r28, r28 - 1ed8: dd 1f adc r29, r29 - 1eda: c0 50 subi r28, 0x00 ; 0 - 1edc: de 4d sbci r29, 0xDE ; 222 - 1ede: 1e 8a std Y+22, r1 ; 0x16 - 1ee0: 1f 8a std Y+23, r1 ; 0x17 - 1ee2: 1a 8a std Y+18, r1 ; 0x12 - 1ee4: 1b 8a std Y+19, r1 ; 0x13 - 1ee6: f7 01 movw r30, r14 - 1ee8: 02 e0 ldi r16, 0x02 ; 2 - 1eea: 06 93 lac Z, r16 - 1eec: b4 c0 rjmp .+360 ; 0x2056 - 1eee: fe 01 movw r30, r28 - 1ef0: ee 0f add r30, r30 - 1ef2: ff 1f adc r31, r31 - 1ef4: ee 0f add r30, r30 - 1ef6: ff 1f adc r31, r31 - 1ef8: ee 0f add r30, r30 - 1efa: ff 1f adc r31, r31 - 1efc: e0 50 subi r30, 0x00 ; 0 - 1efe: fe 4d sbci r31, 0xDE ; 222 - 1f00: a2 88 ldd r10, Z+18 ; 0x12 - 1f02: b3 88 ldd r11, Z+19 ; 0x13 - 1f04: d8 01 movw r26, r16 - 1f06: 8c 91 ld r24, X - 1f08: 82 ff sbrs r24, 2 - 1f0a: 19 c0 rjmp .+50 ; 0x1f3e - 1f0c: 11 96 adiw r26, 0x01 ; 1 - 1f0e: ed 91 ld r30, X+ - 1f10: fc 91 ld r31, X - 1f12: 12 97 sbiw r26, 0x02 ; 2 - 1f14: 15 96 adiw r26, 0x05 ; 5 - 1f16: 2d 91 ld r18, X+ - 1f18: 3c 91 ld r19, X - 1f1a: 16 97 sbiw r26, 0x06 ; 6 - 1f1c: 13 96 adiw r26, 0x03 ; 3 - 1f1e: 8d 91 ld r24, X+ - 1f20: 9c 91 ld r25, X - 1f22: 14 97 sbiw r26, 0x04 ; 4 - 1f24: b4 01 movw r22, r8 - 1f26: 0d d5 rcall .+2586 ; 0x2942 <__udivmodhi4> - 1f28: b0 e4 ldi r27, 0x40 ; 64 - 1f2a: db 9e mul r13, r27 - 1f2c: b0 01 movw r22, r0 - 1f2e: 11 24 eor r1, r1 - 1f30: 6b 57 subi r22, 0x7B ; 123 - 1f32: 7f 4d sbci r23, 0xDF ; 223 - 1f34: ac 01 movw r20, r24 - 1f36: cf 01 movw r24, r30 - 1f38: 82 0f add r24, r18 - 1f3a: 93 1f adc r25, r19 - 1f3c: 1c d5 rcall .+2616 ; 0x2976 - 1f3e: f8 01 movw r30, r16 - 1f40: 25 81 ldd r18, Z+5 ; 0x05 - 1f42: 36 81 ldd r19, Z+6 ; 0x06 - 1f44: 2a 0d add r18, r10 - 1f46: 3b 1d adc r19, r11 - 1f48: 25 83 std Z+5, r18 ; 0x05 - 1f4a: 36 83 std Z+6, r19 ; 0x06 - 1f4c: 83 81 ldd r24, Z+3 ; 0x03 - 1f4e: 94 81 ldd r25, Z+4 ; 0x04 - 1f50: 82 17 cp r24, r18 - 1f52: 93 07 cpc r25, r19 - 1f54: 68 f4 brcc .+26 ; 0x1f70 - 1f56: 85 83 std Z+5, r24 ; 0x05 - 1f58: 96 83 std Z+6, r25 ; 0x06 - 1f5a: cc 0f add r28, r28 - 1f5c: dd 1f adc r29, r29 - 1f5e: cc 0f add r28, r28 - 1f60: dd 1f adc r29, r29 - 1f62: cc 0f add r28, r28 - 1f64: dd 1f adc r29, r29 - 1f66: c0 50 subi r28, 0x00 ; 0 - 1f68: de 4d sbci r29, 0xDE ; 222 - 1f6a: 8e 89 ldd r24, Y+22 ; 0x16 - 1f6c: 9f 89 ldd r25, Y+23 ; 0x17 - 1f6e: 60 c0 rjmp .+192 ; 0x2030 - 1f70: fe 01 movw r30, r28 - 1f72: ee 0f add r30, r30 - 1f74: ff 1f adc r31, r31 - 1f76: ee 0f add r30, r30 - 1f78: ff 1f adc r31, r31 - 1f7a: ee 0f add r30, r30 - 1f7c: ff 1f adc r31, r31 - 1f7e: e0 50 subi r30, 0x00 ; 0 - 1f80: fe 4d sbci r31, 0xDE ; 222 - 1f82: 46 89 ldd r20, Z+22 ; 0x16 - 1f84: 57 89 ldd r21, Z+23 ; 0x17 - 1f86: 4a 15 cp r20, r10 - 1f88: 5b 05 cpc r21, r11 - 1f8a: 09 f0 breq .+2 ; 0x1f8e - 1f8c: 51 c0 rjmp .+162 ; 0x2030 - 1f8e: 28 17 cp r18, r24 - 1f90: 39 07 cpc r19, r25 - 1f92: 09 f4 brne .+2 ; 0x1f96 - 1f94: 4d c0 rjmp .+154 ; 0x2030 - 1f96: ac 01 movw r20, r24 - 1f98: 42 1b sub r20, r18 - 1f9a: 53 0b sbc r21, r19 - 1f9c: 9a 01 movw r18, r20 - 1f9e: 21 15 cp r18, r1 - 1fa0: 54 e0 ldi r21, 0x04 ; 4 - 1fa2: 35 07 cpc r19, r21 - 1fa4: 50 f0 brcs .+20 ; 0x1fba - 1fa6: 2f ef ldi r18, 0xFF ; 255 - 1fa8: 33 e0 ldi r19, 0x03 ; 3 - 1faa: c9 01 movw r24, r18 - 1fac: b4 01 movw r22, r8 - 1fae: c9 d4 rcall .+2450 ; 0x2942 <__udivmodhi4> - 1fb0: d9 01 movw r26, r18 - 1fb2: a8 1b sub r26, r24 - 1fb4: b9 0b sbc r27, r25 - 1fb6: cd 01 movw r24, r26 - 1fb8: 07 c0 rjmp .+14 ; 0x1fc8 - 1fba: c9 01 movw r24, r18 - 1fbc: b4 01 movw r22, r8 - 1fbe: c1 d4 rcall .+2434 ; 0x2942 <__udivmodhi4> - 1fc0: f9 01 movw r30, r18 - 1fc2: e8 1b sub r30, r24 - 1fc4: f9 0b sbc r31, r25 - 1fc6: cf 01 movw r24, r30 - 1fc8: fe 01 movw r30, r28 - 1fca: ee 0f add r30, r30 - 1fcc: ff 1f adc r31, r31 - 1fce: ee 0f add r30, r30 - 1fd0: ff 1f adc r31, r31 - 1fd2: ee 0f add r30, r30 - 1fd4: ff 1f adc r31, r31 - 1fd6: e0 50 subi r30, 0x00 ; 0 - 1fd8: fe 4d sbci r31, 0xDE ; 222 - 1fda: 12 8a std Z+18, r1 ; 0x12 - 1fdc: 13 8a std Z+19, r1 ; 0x13 - 1fde: 88 15 cp r24, r8 - 1fe0: 99 05 cpc r25, r9 - 1fe2: 78 f4 brcc .+30 ; 0x2002 - 1fe4: d8 01 movw r26, r16 - 1fe6: 8c 91 ld r24, X - 1fe8: 84 60 ori r24, 0x04 ; 4 - 1fea: 8c 93 st X, r24 - 1fec: b0 e4 ldi r27, 0x40 ; 64 - 1fee: db 9e mul r13, r27 - 1ff0: c0 01 movw r24, r0 - 1ff2: 11 24 eor r1, r1 - 1ff4: 8b 57 subi r24, 0x7B ; 123 - 1ff6: 9f 4d sbci r25, 0xDF ; 223 - 1ff8: 84 8b std Z+20, r24 ; 0x14 - 1ffa: 95 8b std Z+21, r25 ; 0x15 - 1ffc: 86 8a std Z+22, r8 ; 0x16 - 1ffe: 97 8a std Z+23, r9 ; 0x17 - 2000: 13 c0 rjmp .+38 ; 0x2028 - 2002: f8 01 movw r30, r16 - 2004: 41 81 ldd r20, Z+1 ; 0x01 - 2006: 52 81 ldd r21, Z+2 ; 0x02 - 2008: 25 81 ldd r18, Z+5 ; 0x05 - 200a: 36 81 ldd r19, Z+6 ; 0x06 - 200c: 24 0f add r18, r20 - 200e: 35 1f adc r19, r21 - 2010: cc 0f add r28, r28 - 2012: dd 1f adc r29, r29 - 2014: cc 0f add r28, r28 - 2016: dd 1f adc r29, r29 - 2018: cc 0f add r28, r28 - 201a: dd 1f adc r29, r29 - 201c: c0 50 subi r28, 0x00 ; 0 - 201e: de 4d sbci r29, 0xDE ; 222 - 2020: 2c 8b std Y+20, r18 ; 0x14 - 2022: 3d 8b std Y+21, r19 ; 0x15 - 2024: 8e 8b std Y+22, r24 ; 0x16 - 2026: 9f 8b std Y+23, r25 ; 0x17 - 2028: f7 01 movw r30, r14 - 202a: 02 e0 ldi r16, 0x02 ; 2 - 202c: 06 93 lac Z, r16 - 202e: 13 c0 rjmp .+38 ; 0x2056 - 2030: d8 01 movw r26, r16 - 2032: 8c 91 ld r24, X - 2034: 80 ff sbrs r24, 0 - 2036: 0f c0 rjmp .+30 ; 0x2056 - 2038: 8e 7f andi r24, 0xFE ; 254 - 203a: 8c 93 st X, r24 - 203c: 17 96 adiw r26, 0x07 ; 7 - 203e: ed 91 ld r30, X+ - 2040: fc 91 ld r31, X - 2042: 18 97 sbiw r26, 0x08 ; 8 - 2044: 30 97 sbiw r30, 0x00 ; 0 - 2046: 39 f0 breq .+14 ; 0x2056 - 2048: 15 96 adiw r26, 0x05 ; 5 - 204a: 6d 91 ld r22, X+ - 204c: 7c 91 ld r23, X - 204e: 16 97 sbiw r26, 0x06 ; 6 - 2050: 4d 2d mov r20, r13 - 2052: 80 e0 ldi r24, 0x00 ; 0 - 2054: 09 95 icall - 2056: df 91 pop r29 - 2058: cf 91 pop r28 - 205a: 1f 91 pop r17 - 205c: 0f 91 pop r16 - 205e: ff 90 pop r15 - 2060: ef 90 pop r14 - 2062: df 90 pop r13 - 2064: bf 90 pop r11 - 2066: af 90 pop r10 - 2068: 9f 90 pop r9 - 206a: 8f 90 pop r8 - 206c: 08 95 ret +00001dd8 : + 1dd8: 8f 92 push r8 + 1dda: 9f 92 push r9 + 1ddc: af 92 push r10 + 1dde: bf 92 push r11 + 1de0: df 92 push r13 + 1de2: ef 92 push r14 + 1de4: ff 92 push r15 + 1de6: 0f 93 push r16 + 1de8: 1f 93 push r17 + 1dea: cf 93 push r28 + 1dec: df 93 push r29 + 1dee: d8 2e mov r13, r24 + 1df0: 69 df rcall .-302 ; 0x1cc4 + 1df2: 8c 01 movw r16, r24 + 1df4: bd 2c mov r11, r13 + 1df6: bb 1c adc r11, r11 + 1df8: bb 24 eor r11, r11 + 1dfa: bb 1c adc r11, r11 + 1dfc: cd 2d mov r28, r13 + 1dfe: cf 70 andi r28, 0x0F ; 15 + 1e00: d0 e0 ldi r29, 0x00 ; 0 + 1e02: cc 0f add r28, r28 + 1e04: dd 1f adc r29, r29 + 1e06: cb 0d add r28, r11 + 1e08: d1 1d adc r29, r1 + 1e0a: ce 01 movw r24, r28 + 1e0c: 88 0f add r24, r24 + 1e0e: 99 1f adc r25, r25 + 1e10: 88 0f add r24, r24 + 1e12: 99 1f adc r25, r25 + 1e14: 88 0f add r24, r24 + 1e16: 99 1f adc r25, r25 + 1e18: 9c 01 movw r18, r24 + 1e1a: 20 5f subi r18, 0xF0 ; 240 + 1e1c: 3d 4d sbci r19, 0xDD ; 221 + 1e1e: 79 01 movw r14, r18 + 1e20: c9 01 movw r24, r18 + 1e22: 2a df rcall .-428 ; 0x1c78 + 1e24: 4c 01 movw r8, r24 + 1e26: bb 20 and r11, r11 + 1e28: 09 f4 brne .+2 ; 0x1e2c + 1e2a: 70 c0 rjmp .+224 ; 0x1f0c + 1e2c: fe 01 movw r30, r28 + 1e2e: ee 0f add r30, r30 + 1e30: ff 1f adc r31, r31 + 1e32: ee 0f add r30, r30 + 1e34: ff 1f adc r31, r31 + 1e36: ee 0f add r30, r30 + 1e38: ff 1f adc r31, r31 + 1e3a: e0 50 subi r30, 0x00 ; 0 + 1e3c: fe 4d sbci r31, 0xDE ; 222 + 1e3e: 26 89 ldd r18, Z+22 ; 0x16 + 1e40: 37 89 ldd r19, Z+23 ; 0x17 + 1e42: d8 01 movw r26, r16 + 1e44: 15 96 adiw r26, 0x05 ; 5 + 1e46: 8d 91 ld r24, X+ + 1e48: 9c 91 ld r25, X + 1e4a: 16 97 sbiw r26, 0x06 ; 6 + 1e4c: 82 0f add r24, r18 + 1e4e: 93 1f adc r25, r19 + 1e50: 15 96 adiw r26, 0x05 ; 5 + 1e52: 8d 93 st X+, r24 + 1e54: 9c 93 st X, r25 + 1e56: 16 97 sbiw r26, 0x06 ; 6 + 1e58: 13 96 adiw r26, 0x03 ; 3 + 1e5a: 2d 91 ld r18, X+ + 1e5c: 3c 91 ld r19, X + 1e5e: 14 97 sbiw r26, 0x04 ; 4 + 1e60: 82 17 cp r24, r18 + 1e62: 93 07 cpc r25, r19 + 1e64: 09 f4 brne .+2 ; 0x1e68 + 1e66: 3c c0 rjmp .+120 ; 0x1ee0 + 1e68: 28 1b sub r18, r24 + 1e6a: 39 0b sbc r19, r25 + 1e6c: 21 15 cp r18, r1 + 1e6e: b4 e0 ldi r27, 0x04 ; 4 + 1e70: 3b 07 cpc r19, r27 + 1e72: 38 f0 brcs .+14 ; 0x1e82 + 1e74: 2f ef ldi r18, 0xFF ; 255 + 1e76: 33 e0 ldi r19, 0x03 ; 3 + 1e78: c9 01 movw r24, r18 + 1e7a: b4 01 movw r22, r8 + 1e7c: 71 d5 rcall .+2786 ; 0x2960 <__udivmodhi4> + 1e7e: 28 1b sub r18, r24 + 1e80: 39 0b sbc r19, r25 + 1e82: f8 01 movw r30, r16 + 1e84: 80 81 ld r24, Z + 1e86: 81 ff sbrs r24, 1 + 1e88: 09 c0 rjmp .+18 ; 0x1e9c + 1e8a: c9 01 movw r24, r18 + 1e8c: b4 01 movw r22, r8 + 1e8e: 68 d5 rcall .+2768 ; 0x2960 <__udivmodhi4> + 1e90: 41 e0 ldi r20, 0x01 ; 1 + 1e92: 89 2b or r24, r25 + 1e94: 09 f0 breq .+2 ; 0x1e98 + 1e96: 40 e0 ldi r20, 0x00 ; 0 + 1e98: 84 2f mov r24, r20 + 1e9a: 01 c0 rjmp .+2 ; 0x1e9e + 1e9c: 80 e0 ldi r24, 0x00 ; 0 + 1e9e: d8 01 movw r26, r16 + 1ea0: 9c 91 ld r25, X + 1ea2: 80 fb bst r24, 0 + 1ea4: 91 f9 bld r25, 1 + 1ea6: 9c 93 st X, r25 + 1ea8: cc 0f add r28, r28 + 1eaa: dd 1f adc r29, r29 + 1eac: cc 0f add r28, r28 + 1eae: dd 1f adc r29, r29 + 1eb0: cc 0f add r28, r28 + 1eb2: dd 1f adc r29, r29 + 1eb4: c0 50 subi r28, 0x00 ; 0 + 1eb6: de 4d sbci r29, 0xDE ; 222 + 1eb8: 1e 8a std Y+22, r1 ; 0x16 + 1eba: 1f 8a std Y+23, r1 ; 0x17 + 1ebc: 2a 8b std Y+18, r18 ; 0x12 + 1ebe: 3b 8b std Y+19, r19 ; 0x13 + 1ec0: 11 96 adiw r26, 0x01 ; 1 + 1ec2: 2d 91 ld r18, X+ + 1ec4: 3c 91 ld r19, X + 1ec6: 12 97 sbiw r26, 0x02 ; 2 + 1ec8: 15 96 adiw r26, 0x05 ; 5 + 1eca: 8d 91 ld r24, X+ + 1ecc: 9c 91 ld r25, X + 1ece: 16 97 sbiw r26, 0x06 ; 6 + 1ed0: 82 0f add r24, r18 + 1ed2: 93 1f adc r25, r19 + 1ed4: 8c 8b std Y+20, r24 ; 0x14 + 1ed6: 9d 8b std Y+21, r25 ; 0x15 + 1ed8: f7 01 movw r30, r14 + 1eda: 02 e0 ldi r16, 0x02 ; 2 + 1edc: 06 93 lac Z, r16 + 1ede: ca c0 rjmp .+404 ; 0x2074 + 1ee0: d8 01 movw r26, r16 + 1ee2: 8c 91 ld r24, X + 1ee4: 81 ff sbrs r24, 1 + 1ee6: b3 c0 rjmp .+358 ; 0x204e + 1ee8: 8d 7f andi r24, 0xFD ; 253 + 1eea: 8c 93 st X, r24 + 1eec: cc 0f add r28, r28 + 1eee: dd 1f adc r29, r29 + 1ef0: cc 0f add r28, r28 + 1ef2: dd 1f adc r29, r29 + 1ef4: cc 0f add r28, r28 + 1ef6: dd 1f adc r29, r29 + 1ef8: c0 50 subi r28, 0x00 ; 0 + 1efa: de 4d sbci r29, 0xDE ; 222 + 1efc: 1e 8a std Y+22, r1 ; 0x16 + 1efe: 1f 8a std Y+23, r1 ; 0x17 + 1f00: 1a 8a std Y+18, r1 ; 0x12 + 1f02: 1b 8a std Y+19, r1 ; 0x13 + 1f04: f7 01 movw r30, r14 + 1f06: 02 e0 ldi r16, 0x02 ; 2 + 1f08: 06 93 lac Z, r16 + 1f0a: b4 c0 rjmp .+360 ; 0x2074 + 1f0c: fe 01 movw r30, r28 + 1f0e: ee 0f add r30, r30 + 1f10: ff 1f adc r31, r31 + 1f12: ee 0f add r30, r30 + 1f14: ff 1f adc r31, r31 + 1f16: ee 0f add r30, r30 + 1f18: ff 1f adc r31, r31 + 1f1a: e0 50 subi r30, 0x00 ; 0 + 1f1c: fe 4d sbci r31, 0xDE ; 222 + 1f1e: a2 88 ldd r10, Z+18 ; 0x12 + 1f20: b3 88 ldd r11, Z+19 ; 0x13 + 1f22: d8 01 movw r26, r16 + 1f24: 8c 91 ld r24, X + 1f26: 82 ff sbrs r24, 2 + 1f28: 19 c0 rjmp .+50 ; 0x1f5c + 1f2a: 11 96 adiw r26, 0x01 ; 1 + 1f2c: ed 91 ld r30, X+ + 1f2e: fc 91 ld r31, X + 1f30: 12 97 sbiw r26, 0x02 ; 2 + 1f32: 15 96 adiw r26, 0x05 ; 5 + 1f34: 2d 91 ld r18, X+ + 1f36: 3c 91 ld r19, X + 1f38: 16 97 sbiw r26, 0x06 ; 6 + 1f3a: 13 96 adiw r26, 0x03 ; 3 + 1f3c: 8d 91 ld r24, X+ + 1f3e: 9c 91 ld r25, X + 1f40: 14 97 sbiw r26, 0x04 ; 4 + 1f42: b4 01 movw r22, r8 + 1f44: 0d d5 rcall .+2586 ; 0x2960 <__udivmodhi4> + 1f46: b0 e4 ldi r27, 0x40 ; 64 + 1f48: db 9e mul r13, r27 + 1f4a: b0 01 movw r22, r0 + 1f4c: 11 24 eor r1, r1 + 1f4e: 6b 57 subi r22, 0x7B ; 123 + 1f50: 7f 4d sbci r23, 0xDF ; 223 + 1f52: ac 01 movw r20, r24 + 1f54: cf 01 movw r24, r30 + 1f56: 82 0f add r24, r18 + 1f58: 93 1f adc r25, r19 + 1f5a: 1c d5 rcall .+2616 ; 0x2994 + 1f5c: f8 01 movw r30, r16 + 1f5e: 25 81 ldd r18, Z+5 ; 0x05 + 1f60: 36 81 ldd r19, Z+6 ; 0x06 + 1f62: 2a 0d add r18, r10 + 1f64: 3b 1d adc r19, r11 + 1f66: 25 83 std Z+5, r18 ; 0x05 + 1f68: 36 83 std Z+6, r19 ; 0x06 + 1f6a: 83 81 ldd r24, Z+3 ; 0x03 + 1f6c: 94 81 ldd r25, Z+4 ; 0x04 + 1f6e: 82 17 cp r24, r18 + 1f70: 93 07 cpc r25, r19 + 1f72: 68 f4 brcc .+26 ; 0x1f8e + 1f74: 85 83 std Z+5, r24 ; 0x05 + 1f76: 96 83 std Z+6, r25 ; 0x06 + 1f78: cc 0f add r28, r28 + 1f7a: dd 1f adc r29, r29 + 1f7c: cc 0f add r28, r28 + 1f7e: dd 1f adc r29, r29 + 1f80: cc 0f add r28, r28 + 1f82: dd 1f adc r29, r29 + 1f84: c0 50 subi r28, 0x00 ; 0 + 1f86: de 4d sbci r29, 0xDE ; 222 + 1f88: 8e 89 ldd r24, Y+22 ; 0x16 + 1f8a: 9f 89 ldd r25, Y+23 ; 0x17 + 1f8c: 60 c0 rjmp .+192 ; 0x204e + 1f8e: fe 01 movw r30, r28 + 1f90: ee 0f add r30, r30 + 1f92: ff 1f adc r31, r31 + 1f94: ee 0f add r30, r30 + 1f96: ff 1f adc r31, r31 + 1f98: ee 0f add r30, r30 + 1f9a: ff 1f adc r31, r31 + 1f9c: e0 50 subi r30, 0x00 ; 0 + 1f9e: fe 4d sbci r31, 0xDE ; 222 + 1fa0: 46 89 ldd r20, Z+22 ; 0x16 + 1fa2: 57 89 ldd r21, Z+23 ; 0x17 + 1fa4: 4a 15 cp r20, r10 + 1fa6: 5b 05 cpc r21, r11 + 1fa8: 09 f0 breq .+2 ; 0x1fac + 1faa: 51 c0 rjmp .+162 ; 0x204e + 1fac: 28 17 cp r18, r24 + 1fae: 39 07 cpc r19, r25 + 1fb0: 09 f4 brne .+2 ; 0x1fb4 + 1fb2: 4d c0 rjmp .+154 ; 0x204e + 1fb4: ac 01 movw r20, r24 + 1fb6: 42 1b sub r20, r18 + 1fb8: 53 0b sbc r21, r19 + 1fba: 9a 01 movw r18, r20 + 1fbc: 21 15 cp r18, r1 + 1fbe: 54 e0 ldi r21, 0x04 ; 4 + 1fc0: 35 07 cpc r19, r21 + 1fc2: 50 f0 brcs .+20 ; 0x1fd8 + 1fc4: 2f ef ldi r18, 0xFF ; 255 + 1fc6: 33 e0 ldi r19, 0x03 ; 3 + 1fc8: c9 01 movw r24, r18 + 1fca: b4 01 movw r22, r8 + 1fcc: c9 d4 rcall .+2450 ; 0x2960 <__udivmodhi4> + 1fce: d9 01 movw r26, r18 + 1fd0: a8 1b sub r26, r24 + 1fd2: b9 0b sbc r27, r25 + 1fd4: cd 01 movw r24, r26 + 1fd6: 07 c0 rjmp .+14 ; 0x1fe6 + 1fd8: c9 01 movw r24, r18 + 1fda: b4 01 movw r22, r8 + 1fdc: c1 d4 rcall .+2434 ; 0x2960 <__udivmodhi4> + 1fde: f9 01 movw r30, r18 + 1fe0: e8 1b sub r30, r24 + 1fe2: f9 0b sbc r31, r25 + 1fe4: cf 01 movw r24, r30 + 1fe6: fe 01 movw r30, r28 + 1fe8: ee 0f add r30, r30 + 1fea: ff 1f adc r31, r31 + 1fec: ee 0f add r30, r30 + 1fee: ff 1f adc r31, r31 + 1ff0: ee 0f add r30, r30 + 1ff2: ff 1f adc r31, r31 + 1ff4: e0 50 subi r30, 0x00 ; 0 + 1ff6: fe 4d sbci r31, 0xDE ; 222 + 1ff8: 12 8a std Z+18, r1 ; 0x12 + 1ffa: 13 8a std Z+19, r1 ; 0x13 + 1ffc: 88 15 cp r24, r8 + 1ffe: 99 05 cpc r25, r9 + 2000: 78 f4 brcc .+30 ; 0x2020 + 2002: d8 01 movw r26, r16 + 2004: 8c 91 ld r24, X + 2006: 84 60 ori r24, 0x04 ; 4 + 2008: 8c 93 st X, r24 + 200a: b0 e4 ldi r27, 0x40 ; 64 + 200c: db 9e mul r13, r27 + 200e: c0 01 movw r24, r0 + 2010: 11 24 eor r1, r1 + 2012: 8b 57 subi r24, 0x7B ; 123 + 2014: 9f 4d sbci r25, 0xDF ; 223 + 2016: 84 8b std Z+20, r24 ; 0x14 + 2018: 95 8b std Z+21, r25 ; 0x15 + 201a: 86 8a std Z+22, r8 ; 0x16 + 201c: 97 8a std Z+23, r9 ; 0x17 + 201e: 13 c0 rjmp .+38 ; 0x2046 + 2020: f8 01 movw r30, r16 + 2022: 41 81 ldd r20, Z+1 ; 0x01 + 2024: 52 81 ldd r21, Z+2 ; 0x02 + 2026: 25 81 ldd r18, Z+5 ; 0x05 + 2028: 36 81 ldd r19, Z+6 ; 0x06 + 202a: 24 0f add r18, r20 + 202c: 35 1f adc r19, r21 + 202e: cc 0f add r28, r28 + 2030: dd 1f adc r29, r29 + 2032: cc 0f add r28, r28 + 2034: dd 1f adc r29, r29 + 2036: cc 0f add r28, r28 + 2038: dd 1f adc r29, r29 + 203a: c0 50 subi r28, 0x00 ; 0 + 203c: de 4d sbci r29, 0xDE ; 222 + 203e: 2c 8b std Y+20, r18 ; 0x14 + 2040: 3d 8b std Y+21, r19 ; 0x15 + 2042: 8e 8b std Y+22, r24 ; 0x16 + 2044: 9f 8b std Y+23, r25 ; 0x17 + 2046: f7 01 movw r30, r14 + 2048: 02 e0 ldi r16, 0x02 ; 2 + 204a: 06 93 lac Z, r16 + 204c: 13 c0 rjmp .+38 ; 0x2074 + 204e: d8 01 movw r26, r16 + 2050: 8c 91 ld r24, X + 2052: 80 ff sbrs r24, 0 + 2054: 0f c0 rjmp .+30 ; 0x2074 + 2056: 8e 7f andi r24, 0xFE ; 254 + 2058: 8c 93 st X, r24 + 205a: 17 96 adiw r26, 0x07 ; 7 + 205c: ed 91 ld r30, X+ + 205e: fc 91 ld r31, X + 2060: 18 97 sbiw r26, 0x08 ; 8 + 2062: 30 97 sbiw r30, 0x00 ; 0 + 2064: 39 f0 breq .+14 ; 0x2074 + 2066: 15 96 adiw r26, 0x05 ; 5 + 2068: 6d 91 ld r22, X+ + 206a: 7c 91 ld r23, X + 206c: 16 97 sbiw r26, 0x06 ; 6 + 206e: 4d 2d mov r20, r13 + 2070: 80 e0 ldi r24, 0x00 ; 0 + 2072: 09 95 icall + 2074: df 91 pop r29 + 2076: cf 91 pop r28 + 2078: 1f 91 pop r17 + 207a: 0f 91 pop r16 + 207c: ff 90 pop r15 + 207e: ef 90 pop r14 + 2080: df 90 pop r13 + 2082: bf 90 pop r11 + 2084: af 90 pop r10 + 2086: 9f 90 pop r9 + 2088: 8f 90 pop r8 + 208a: 08 95 ret -0000206e : - 206e: cf 93 push r28 - 2070: cf b7 in r28, 0x3f ; 63 - 2072: f8 94 cli - 2074: 81 e0 ldi r24, 0x01 ; 1 - 2076: 11 dd rcall .-1502 ; 0x1a9a - 2078: ea ec ldi r30, 0xCA ; 202 - 207a: f4 e0 ldi r31, 0x04 ; 4 - 207c: 80 e4 ldi r24, 0x40 ; 64 - 207e: 80 83 st Z, r24 - 2080: 80 e2 ldi r24, 0x20 ; 32 - 2082: 80 83 st Z, r24 - 2084: e1 ec ldi r30, 0xC1 ; 193 - 2086: f4 e0 ldi r31, 0x04 ; 4 - 2088: 80 81 ld r24, Z - 208a: 81 60 ori r24, 0x01 ; 1 - 208c: 80 83 st Z, r24 - 208e: a9 ec ldi r26, 0xC9 ; 201 - 2090: b4 e0 ldi r27, 0x04 ; 4 - 2092: 8c 91 ld r24, X - 2094: 82 60 ori r24, 0x02 ; 2 - 2096: 8c 93 st X, r24 - 2098: e8 ec ldi r30, 0xC8 ; 200 - 209a: f4 e0 ldi r31, 0x04 ; 4 - 209c: 80 81 ld r24, Z - 209e: 80 64 ori r24, 0x40 ; 64 +0000208c : + 208c: cf 93 push r28 + 208e: cf b7 in r28, 0x3f ; 63 + 2090: f8 94 cli + 2092: 81 e0 ldi r24, 0x01 ; 1 + 2094: 11 dd rcall .-1502 ; 0x1ab8 + 2096: ea ec ldi r30, 0xCA ; 202 + 2098: f4 e0 ldi r31, 0x04 ; 4 + 209a: 80 e4 ldi r24, 0x40 ; 64 + 209c: 80 83 st Z, r24 + 209e: 80 e2 ldi r24, 0x20 ; 32 20a0: 80 83 st Z, r24 - 20a2: 8c 91 ld r24, X - 20a4: 81 60 ori r24, 0x01 ; 1 - 20a6: 8c 93 st X, r24 - 20a8: 80 81 ld r24, Z - 20aa: 80 68 ori r24, 0x80 ; 128 - 20ac: 80 83 st Z, r24 - 20ae: cf bf out 0x3f, r28 ; 63 - 20b0: cf 91 pop r28 - 20b2: 08 95 ret + 20a2: e1 ec ldi r30, 0xC1 ; 193 + 20a4: f4 e0 ldi r31, 0x04 ; 4 + 20a6: 80 81 ld r24, Z + 20a8: 81 60 ori r24, 0x01 ; 1 + 20aa: 80 83 st Z, r24 + 20ac: a9 ec ldi r26, 0xC9 ; 201 + 20ae: b4 e0 ldi r27, 0x04 ; 4 + 20b0: 8c 91 ld r24, X + 20b2: 82 60 ori r24, 0x02 ; 2 + 20b4: 8c 93 st X, r24 + 20b6: e8 ec ldi r30, 0xC8 ; 200 + 20b8: f4 e0 ldi r31, 0x04 ; 4 + 20ba: 80 81 ld r24, Z + 20bc: 80 64 ori r24, 0x40 ; 64 + 20be: 80 83 st Z, r24 + 20c0: 8c 91 ld r24, X + 20c2: 81 60 ori r24, 0x01 ; 1 + 20c4: 8c 93 st X, r24 + 20c6: 80 81 ld r24, Z + 20c8: 80 68 ori r24, 0x80 ; 128 + 20ca: 80 83 st Z, r24 + 20cc: cf bf out 0x3f, r28 ; 63 + 20ce: cf 91 pop r28 + 20d0: 08 95 ret -000020b4 : - 20b4: cf 93 push r28 - 20b6: df 93 push r29 - 20b8: c0 e6 ldi r28, 0x60 ; 96 - 20ba: d0 e0 ldi r29, 0x00 ; 0 - 20bc: 18 82 st Y, r1 - 20be: 80 e3 ldi r24, 0x30 ; 48 - 20c0: 0e 94 f8 07 call 0xff0 ; 0xff0 - 20c4: e0 ec ldi r30, 0xC0 ; 192 - 20c6: f4 e0 ldi r31, 0x04 ; 4 - 20c8: 80 81 ld r24, Z - 20ca: 80 64 ori r24, 0x40 ; 64 - 20cc: 80 83 st Z, r24 - 20ce: 81 e0 ldi r24, 0x01 ; 1 - 20d0: 88 83 st Y, r24 - 20d2: cf b7 in r28, 0x3f ; 63 - 20d4: f8 94 cli - 20d6: 80 e0 ldi r24, 0x00 ; 0 - 20d8: 90 e0 ldi r25, 0x00 ; 0 - 20da: fc 01 movw r30, r24 - 20dc: ee 0f add r30, r30 - 20de: ff 1f adc r31, r31 - 20e0: ee 0f add r30, r30 - 20e2: ff 1f adc r31, r31 - 20e4: ee 0f add r30, r30 - 20e6: ff 1f adc r31, r31 - 20e8: e0 50 subi r30, 0x00 ; 0 - 20ea: fe 4d sbci r31, 0xDE ; 222 - 20ec: 11 8a std Z+17, r1 ; 0x11 - 20ee: 01 96 adiw r24, 0x01 ; 1 - 20f0: 88 30 cpi r24, 0x08 ; 8 - 20f2: 91 05 cpc r25, r1 - 20f4: 91 f7 brne .-28 ; 0x20da - 20f6: e5 e8 ldi r30, 0x85 ; 133 - 20f8: f1 e2 ldi r31, 0x21 ; 33 - 20fa: 80 81 ld r24, Z - 20fc: 8e 7f andi r24, 0xFE ; 254 - 20fe: 80 83 st Z, r24 - 2100: ee e8 ldi r30, 0x8E ; 142 - 2102: f1 e2 ldi r31, 0x21 ; 33 - 2104: 80 81 ld r24, Z - 2106: 8e 7f andi r24, 0xFE ; 254 - 2108: 80 83 st Z, r24 - 210a: e7 e9 ldi r30, 0x97 ; 151 - 210c: f1 e2 ldi r31, 0x21 ; 33 - 210e: 80 81 ld r24, Z - 2110: 8e 7f andi r24, 0xFE ; 254 - 2112: 80 83 st Z, r24 - 2114: e0 ea ldi r30, 0xA0 ; 160 +000020d2 : + 20d2: cf 93 push r28 + 20d4: df 93 push r29 + 20d6: c0 e6 ldi r28, 0x60 ; 96 + 20d8: d0 e0 ldi r29, 0x00 ; 0 + 20da: 18 82 st Y, r1 + 20dc: 80 e3 ldi r24, 0x30 ; 48 + 20de: 0e 94 07 08 call 0x100e ; 0x100e + 20e2: e0 ec ldi r30, 0xC0 ; 192 + 20e4: f4 e0 ldi r31, 0x04 ; 4 + 20e6: 80 81 ld r24, Z + 20e8: 80 64 ori r24, 0x40 ; 64 + 20ea: 80 83 st Z, r24 + 20ec: 81 e0 ldi r24, 0x01 ; 1 + 20ee: 88 83 st Y, r24 + 20f0: cf b7 in r28, 0x3f ; 63 + 20f2: f8 94 cli + 20f4: 80 e0 ldi r24, 0x00 ; 0 + 20f6: 90 e0 ldi r25, 0x00 ; 0 + 20f8: fc 01 movw r30, r24 + 20fa: ee 0f add r30, r30 + 20fc: ff 1f adc r31, r31 + 20fe: ee 0f add r30, r30 + 2100: ff 1f adc r31, r31 + 2102: ee 0f add r30, r30 + 2104: ff 1f adc r31, r31 + 2106: e0 50 subi r30, 0x00 ; 0 + 2108: fe 4d sbci r31, 0xDE ; 222 + 210a: 11 8a std Z+17, r1 ; 0x11 + 210c: 01 96 adiw r24, 0x01 ; 1 + 210e: 88 30 cpi r24, 0x08 ; 8 + 2110: 91 05 cpc r25, r1 + 2112: 91 f7 brne .-28 ; 0x20f8 + 2114: e5 e8 ldi r30, 0x85 ; 133 2116: f1 e2 ldi r31, 0x21 ; 33 2118: 80 81 ld r24, Z 211a: 8e 7f andi r24, 0xFE ; 254 211c: 80 83 st Z, r24 - 211e: e9 ea ldi r30, 0xA9 ; 169 + 211e: ee e8 ldi r30, 0x8E ; 142 2120: f1 e2 ldi r31, 0x21 ; 33 2122: 80 81 ld r24, Z 2124: 8e 7f andi r24, 0xFE ; 254 2126: 80 83 st Z, r24 - 2128: e2 eb ldi r30, 0xB2 ; 178 + 2128: e7 e9 ldi r30, 0x97 ; 151 212a: f1 e2 ldi r31, 0x21 ; 33 212c: 80 81 ld r24, Z 212e: 8e 7f andi r24, 0xFE ; 254 2130: 80 83 st Z, r24 - 2132: 6a e1 ldi r22, 0x1A ; 26 - 2134: 70 e0 ldi r23, 0x00 ; 0 - 2136: 82 e0 ldi r24, 0x02 ; 2 - 2138: a6 dc rcall .-1716 ; 0x1a86 - 213a: 8f 3f cpi r24, 0xFF ; 255 - 213c: 19 f0 breq .+6 ; 0x2144 - 213e: 80 93 fa 04 sts 0x04FA, r24 ; 0x8004fa <__TEXT_REGION_LENGTH__+0x7004fa> - 2142: 03 c0 rjmp .+6 ; 0x214a - 2144: 8f e1 ldi r24, 0x1F ; 31 - 2146: 80 93 fa 04 sts 0x04FA, r24 ; 0x8004fa <__TEXT_REGION_LENGTH__+0x7004fa> - 214a: 6b e1 ldi r22, 0x1B ; 27 - 214c: 70 e0 ldi r23, 0x00 ; 0 - 214e: 82 e0 ldi r24, 0x02 ; 2 - 2150: 9a dc rcall .-1740 ; 0x1a86 - 2152: 8f 3f cpi r24, 0xFF ; 255 - 2154: 19 f0 breq .+6 ; 0x215c - 2156: 80 93 fb 04 sts 0x04FB, r24 ; 0x8004fb <__TEXT_REGION_LENGTH__+0x7004fb> - 215a: 03 c0 rjmp .+6 ; 0x2162 - 215c: 8f e1 ldi r24, 0x1F ; 31 - 215e: 80 93 fb 04 sts 0x04FB, r24 ; 0x8004fb <__TEXT_REGION_LENGTH__+0x7004fb> - 2162: e0 ec ldi r30, 0xC0 ; 192 - 2164: f4 e0 ldi r31, 0x04 ; 4 - 2166: 80 81 ld r24, Z - 2168: 83 60 ori r24, 0x03 ; 3 - 216a: 80 83 st Z, r24 - 216c: 80 81 ld r24, Z - 216e: 80 68 ori r24, 0x80 ; 128 - 2170: 80 83 st Z, r24 - 2172: 80 81 ld r24, Z - 2174: 80 61 ori r24, 0x10 ; 16 - 2176: 80 83 st Z, r24 - 2178: 80 e1 ldi r24, 0x10 ; 16 - 217a: 92 e2 ldi r25, 0x22 ; 34 - 217c: 86 83 std Z+6, r24 ; 0x06 - 217e: 97 83 std Z+7, r25 ; 0x07 - 2180: 80 81 ld r24, Z - 2182: 80 62 ori r24, 0x20 ; 32 - 2184: 80 83 st Z, r24 - 2186: 8f ef ldi r24, 0xFF ; 255 - 2188: 80 93 c5 04 sts 0x04C5, r24 ; 0x8004c5 <__TEXT_REGION_LENGTH__+0x7004c5> - 218c: e8 ec ldi r30, 0xC8 ; 200 - 218e: f4 e0 ldi r31, 0x04 ; 4 + 2132: e0 ea ldi r30, 0xA0 ; 160 + 2134: f1 e2 ldi r31, 0x21 ; 33 + 2136: 80 81 ld r24, Z + 2138: 8e 7f andi r24, 0xFE ; 254 + 213a: 80 83 st Z, r24 + 213c: e9 ea ldi r30, 0xA9 ; 169 + 213e: f1 e2 ldi r31, 0x21 ; 33 + 2140: 80 81 ld r24, Z + 2142: 8e 7f andi r24, 0xFE ; 254 + 2144: 80 83 st Z, r24 + 2146: e2 eb ldi r30, 0xB2 ; 178 + 2148: f1 e2 ldi r31, 0x21 ; 33 + 214a: 80 81 ld r24, Z + 214c: 8e 7f andi r24, 0xFE ; 254 + 214e: 80 83 st Z, r24 + 2150: 6a e1 ldi r22, 0x1A ; 26 + 2152: 70 e0 ldi r23, 0x00 ; 0 + 2154: 82 e0 ldi r24, 0x02 ; 2 + 2156: a6 dc rcall .-1716 ; 0x1aa4 + 2158: 8f 3f cpi r24, 0xFF ; 255 + 215a: 19 f0 breq .+6 ; 0x2162 + 215c: 80 93 fa 04 sts 0x04FA, r24 ; 0x8004fa <__TEXT_REGION_LENGTH__+0x7004fa> + 2160: 03 c0 rjmp .+6 ; 0x2168 + 2162: 8f e1 ldi r24, 0x1F ; 31 + 2164: 80 93 fa 04 sts 0x04FA, r24 ; 0x8004fa <__TEXT_REGION_LENGTH__+0x7004fa> + 2168: 6b e1 ldi r22, 0x1B ; 27 + 216a: 70 e0 ldi r23, 0x00 ; 0 + 216c: 82 e0 ldi r24, 0x02 ; 2 + 216e: 9a dc rcall .-1740 ; 0x1aa4 + 2170: 8f 3f cpi r24, 0xFF ; 255 + 2172: 19 f0 breq .+6 ; 0x217a + 2174: 80 93 fb 04 sts 0x04FB, r24 ; 0x8004fb <__TEXT_REGION_LENGTH__+0x7004fb> + 2178: 03 c0 rjmp .+6 ; 0x2180 + 217a: 8f e1 ldi r24, 0x1F ; 31 + 217c: 80 93 fb 04 sts 0x04FB, r24 ; 0x8004fb <__TEXT_REGION_LENGTH__+0x7004fb> + 2180: e0 ec ldi r30, 0xC0 ; 192 + 2182: f4 e0 ldi r31, 0x04 ; 4 + 2184: 80 81 ld r24, Z + 2186: 83 60 ori r24, 0x03 ; 3 + 2188: 80 83 st Z, r24 + 218a: 80 81 ld r24, Z + 218c: 80 68 ori r24, 0x80 ; 128 + 218e: 80 83 st Z, r24 2190: 80 81 ld r24, Z - 2192: 82 60 ori r24, 0x02 ; 2 + 2192: 80 61 ori r24, 0x10 ; 16 2194: 80 83 st Z, r24 - 2196: 10 92 54 22 sts 0x2254, r1 ; 0x802254 - 219a: 80 91 47 2c lds r24, 0x2C47 ; 0x802c47 - 219e: 8f 3f cpi r24, 0xFF ; 255 - 21a0: 09 f4 brne .+2 ; 0x21a4 - 21a2: ff cf rjmp .-2 ; 0x21a2 - 21a4: 9f b7 in r25, 0x3f ; 63 - 21a6: f8 94 cli - 21a8: e2 e4 ldi r30, 0x42 ; 66 - 21aa: fc e2 ldi r31, 0x2C ; 44 - 21ac: 85 81 ldd r24, Z+5 ; 0x05 - 21ae: 8f 5f subi r24, 0xFF ; 255 - 21b0: 85 83 std Z+5, r24 ; 0x05 - 21b2: 9f bf out 0x3f, r25 ; 63 - 21b4: 5c df rcall .-328 ; 0x206e - 21b6: cf bf out 0x3f, r28 ; 63 - 21b8: df 91 pop r29 - 21ba: cf 91 pop r28 - 21bc: 08 95 ret + 2196: 80 e1 ldi r24, 0x10 ; 16 + 2198: 92 e2 ldi r25, 0x22 ; 34 + 219a: 86 83 std Z+6, r24 ; 0x06 + 219c: 97 83 std Z+7, r25 ; 0x07 + 219e: 80 81 ld r24, Z + 21a0: 80 62 ori r24, 0x20 ; 32 + 21a2: 80 83 st Z, r24 + 21a4: 8f ef ldi r24, 0xFF ; 255 + 21a6: 80 93 c5 04 sts 0x04C5, r24 ; 0x8004c5 <__TEXT_REGION_LENGTH__+0x7004c5> + 21aa: e8 ec ldi r30, 0xC8 ; 200 + 21ac: f4 e0 ldi r31, 0x04 ; 4 + 21ae: 80 81 ld r24, Z + 21b0: 82 60 ori r24, 0x02 ; 2 + 21b2: 80 83 st Z, r24 + 21b4: 10 92 54 22 sts 0x2254, r1 ; 0x802254 + 21b8: 80 91 4b 2c lds r24, 0x2C4B ; 0x802c4b + 21bc: 8f 3f cpi r24, 0xFF ; 255 + 21be: 09 f4 brne .+2 ; 0x21c2 + 21c0: ff cf rjmp .-2 ; 0x21c0 + 21c2: 9f b7 in r25, 0x3f ; 63 + 21c4: f8 94 cli + 21c6: e6 e4 ldi r30, 0x46 ; 70 + 21c8: fc e2 ldi r31, 0x2C ; 44 + 21ca: 85 81 ldd r24, Z+5 ; 0x05 + 21cc: 8f 5f subi r24, 0xFF ; 255 + 21ce: 85 83 std Z+5, r24 ; 0x05 + 21d0: 9f bf out 0x3f, r25 ; 63 + 21d2: 5c df rcall .-328 ; 0x208c + 21d4: cf bf out 0x3f, r28 ; 63 + 21d6: df 91 pop r29 + 21d8: cf 91 pop r28 + 21da: 08 95 ret -000021be : - 21be: 80 93 c3 04 sts 0x04C3, r24 ; 0x8004c3 <__TEXT_REGION_LENGTH__+0x7004c3> - 21c2: 08 95 ret +000021dc : + 21dc: 80 93 c3 04 sts 0x04C3, r24 ; 0x8004c3 <__TEXT_REGION_LENGTH__+0x7004c3> + 21e0: 08 95 ret -000021c4 : - 21c4: 80 91 c3 04 lds r24, 0x04C3 ; 0x8004c3 <__TEXT_REGION_LENGTH__+0x7004c3> - 21c8: 08 95 ret +000021e2 : + 21e2: 80 91 c3 04 lds r24, 0x04C3 ; 0x8004c3 <__TEXT_REGION_LENGTH__+0x7004c3> + 21e6: 08 95 ret -000021ca : - 21ca: e6 e5 ldi r30, 0x56 ; 86 - 21cc: f4 e2 ldi r31, 0x24 ; 36 - 21ce: 80 87 std Z+8, r24 ; 0x08 - 21d0: 91 87 std Z+9, r25 ; 0x09 - 21d2: 62 87 std Z+10, r22 ; 0x0a - 21d4: 73 87 std Z+11, r23 ; 0x0b - 21d6: 08 95 ret +000021e8 : + 21e8: ea e5 ldi r30, 0x5A ; 90 + 21ea: f4 e2 ldi r31, 0x24 ; 36 + 21ec: 80 87 std Z+8, r24 ; 0x08 + 21ee: 91 87 std Z+9, r25 ; 0x09 + 21f0: 62 87 std Z+10, r22 ; 0x0a + 21f2: 73 87 std Z+11, r23 ; 0x0b + 21f4: 08 95 ret -000021d8 : - 21d8: 28 2f mov r18, r24 - 21da: 2f 70 andi r18, 0x0F ; 15 - 21dc: 30 e0 ldi r19, 0x00 ; 0 - 21de: 22 0f add r18, r18 - 21e0: 33 1f adc r19, r19 - 21e2: 08 2e mov r0, r24 - 21e4: 00 0c add r0, r0 - 21e6: 99 0b sbc r25, r25 - 21e8: 88 27 eor r24, r24 - 21ea: 99 0f add r25, r25 - 21ec: 88 1f adc r24, r24 - 21ee: 99 27 eor r25, r25 - 21f0: 82 0f add r24, r18 - 21f2: 93 1f adc r25, r19 - 21f4: fc 01 movw r30, r24 - 21f6: ee 0f add r30, r30 - 21f8: ff 1f adc r31, r31 - 21fa: ee 0f add r30, r30 - 21fc: ff 1f adc r31, r31 - 21fe: ee 0f add r30, r30 - 2200: ff 1f adc r31, r31 - 2202: e0 50 subi r30, 0x00 ; 0 - 2204: fe 4d sbci r31, 0xDE ; 222 - 2206: 21 89 ldd r18, Z+17 ; 0x11 - 2208: 20 7c andi r18, 0xC0 ; 192 - 220a: 09 f0 breq .+2 ; 0x220e - 220c: 58 c0 rjmp .+176 ; 0x22be - 220e: 63 70 andi r22, 0x03 ; 3 - 2210: 61 30 cpi r22, 0x01 ; 1 - 2212: 11 f0 breq .+4 ; 0x2218 - 2214: 18 f4 brcc .+6 ; 0x221c - 2216: 04 c0 rjmp .+8 ; 0x2220 - 2218: 20 ec ldi r18, 0xC0 ; 192 - 221a: 03 c0 rjmp .+6 ; 0x2222 - 221c: 20 e8 ldi r18, 0x80 ; 128 - 221e: 01 c0 rjmp .+2 ; 0x2222 - 2220: 20 e4 ldi r18, 0x40 ; 64 - 2222: 40 38 cpi r20, 0x80 ; 128 - 2224: 51 05 cpc r21, r1 - 2226: e9 f0 breq .+58 ; 0x2262 - 2228: 50 f4 brcc .+20 ; 0x223e - 222a: 40 32 cpi r20, 0x20 ; 32 - 222c: 51 05 cpc r21, r1 - 222e: a9 f0 breq .+42 ; 0x225a - 2230: 40 34 cpi r20, 0x40 ; 64 - 2232: 51 05 cpc r21, r1 - 2234: a1 f0 breq .+40 ; 0x225e - 2236: 40 31 cpi r20, 0x10 ; 16 - 2238: 51 05 cpc r21, r1 - 223a: d9 f4 brne .+54 ; 0x2272 - 223c: 0c c0 rjmp .+24 ; 0x2256 - 223e: 41 15 cp r20, r1 - 2240: 32 e0 ldi r19, 0x02 ; 2 - 2242: 53 07 cpc r21, r19 - 2244: 91 f0 breq .+36 ; 0x226a - 2246: 4f 3f cpi r20, 0xFF ; 255 - 2248: 33 e0 ldi r19, 0x03 ; 3 - 224a: 53 07 cpc r21, r19 - 224c: 81 f0 breq .+32 ; 0x226e - 224e: 41 15 cp r20, r1 - 2250: 51 40 sbci r21, 0x01 ; 1 - 2252: 79 f4 brne .+30 ; 0x2272 - 2254: 08 c0 rjmp .+16 ; 0x2266 - 2256: 41 e0 ldi r20, 0x01 ; 1 - 2258: 0d c0 rjmp .+26 ; 0x2274 - 225a: 42 e0 ldi r20, 0x02 ; 2 - 225c: 0b c0 rjmp .+22 ; 0x2274 - 225e: 43 e0 ldi r20, 0x03 ; 3 - 2260: 09 c0 rjmp .+18 ; 0x2274 - 2262: 44 e0 ldi r20, 0x04 ; 4 - 2264: 07 c0 rjmp .+14 ; 0x2274 - 2266: 45 e0 ldi r20, 0x05 ; 5 - 2268: 05 c0 rjmp .+10 ; 0x2274 - 226a: 46 e0 ldi r20, 0x06 ; 6 - 226c: 03 c0 rjmp .+6 ; 0x2274 - 226e: 47 e0 ldi r20, 0x07 ; 7 - 2270: 01 c0 rjmp .+2 ; 0x2274 - 2272: 40 e0 ldi r20, 0x00 ; 0 - 2274: fc 01 movw r30, r24 - 2276: ee 0f add r30, r30 - 2278: ff 1f adc r31, r31 - 227a: ee 0f add r30, r30 - 227c: ff 1f adc r31, r31 - 227e: ee 0f add r30, r30 - 2280: ff 1f adc r31, r31 - 2282: e0 50 subi r30, 0x00 ; 0 - 2284: fe 4d sbci r31, 0xDE ; 222 - 2286: 11 8a std Z+17, r1 ; 0x11 - 2288: dc 01 movw r26, r24 - 228a: aa 0f add r26, r26 - 228c: bb 1f adc r27, r27 - 228e: aa 0f add r26, r26 - 2290: bb 1f adc r27, r27 - 2292: aa 0f add r26, r26 - 2294: bb 1f adc r27, r27 - 2296: a0 5f subi r26, 0xF0 ; 240 - 2298: bd 4d sbci r27, 0xDD ; 221 - 229a: 36 e0 ldi r19, 0x06 ; 6 - 229c: 3c 93 st X, r19 - 229e: 24 2b or r18, r20 - 22a0: 21 8b std Z+17, r18 ; 0x11 - 22a2: 88 0f add r24, r24 - 22a4: 99 1f adc r25, r25 - 22a6: 88 0f add r24, r24 - 22a8: 99 1f adc r25, r25 - 22aa: 88 0f add r24, r24 - 22ac: 99 1f adc r25, r25 - 22ae: fc 01 movw r30, r24 - 22b0: e0 50 subi r30, 0x00 ; 0 - 22b2: fe 4d sbci r31, 0xDE ; 222 - 22b4: 81 89 ldd r24, Z+17 ; 0x11 - 22b6: 80 62 ori r24, 0x20 ; 32 - 22b8: 81 8b std Z+17, r24 ; 0x11 - 22ba: 81 e0 ldi r24, 0x01 ; 1 - 22bc: 08 95 ret - 22be: 80 e0 ldi r24, 0x00 ; 0 - 22c0: 08 95 ret +000021f6 : + 21f6: 28 2f mov r18, r24 + 21f8: 2f 70 andi r18, 0x0F ; 15 + 21fa: 30 e0 ldi r19, 0x00 ; 0 + 21fc: 22 0f add r18, r18 + 21fe: 33 1f adc r19, r19 + 2200: 08 2e mov r0, r24 + 2202: 00 0c add r0, r0 + 2204: 99 0b sbc r25, r25 + 2206: 88 27 eor r24, r24 + 2208: 99 0f add r25, r25 + 220a: 88 1f adc r24, r24 + 220c: 99 27 eor r25, r25 + 220e: 82 0f add r24, r18 + 2210: 93 1f adc r25, r19 + 2212: fc 01 movw r30, r24 + 2214: ee 0f add r30, r30 + 2216: ff 1f adc r31, r31 + 2218: ee 0f add r30, r30 + 221a: ff 1f adc r31, r31 + 221c: ee 0f add r30, r30 + 221e: ff 1f adc r31, r31 + 2220: e0 50 subi r30, 0x00 ; 0 + 2222: fe 4d sbci r31, 0xDE ; 222 + 2224: 21 89 ldd r18, Z+17 ; 0x11 + 2226: 20 7c andi r18, 0xC0 ; 192 + 2228: 09 f0 breq .+2 ; 0x222c + 222a: 58 c0 rjmp .+176 ; 0x22dc + 222c: 63 70 andi r22, 0x03 ; 3 + 222e: 61 30 cpi r22, 0x01 ; 1 + 2230: 11 f0 breq .+4 ; 0x2236 + 2232: 18 f4 brcc .+6 ; 0x223a + 2234: 04 c0 rjmp .+8 ; 0x223e + 2236: 20 ec ldi r18, 0xC0 ; 192 + 2238: 03 c0 rjmp .+6 ; 0x2240 + 223a: 20 e8 ldi r18, 0x80 ; 128 + 223c: 01 c0 rjmp .+2 ; 0x2240 + 223e: 20 e4 ldi r18, 0x40 ; 64 + 2240: 40 38 cpi r20, 0x80 ; 128 + 2242: 51 05 cpc r21, r1 + 2244: e9 f0 breq .+58 ; 0x2280 + 2246: 50 f4 brcc .+20 ; 0x225c + 2248: 40 32 cpi r20, 0x20 ; 32 + 224a: 51 05 cpc r21, r1 + 224c: a9 f0 breq .+42 ; 0x2278 + 224e: 40 34 cpi r20, 0x40 ; 64 + 2250: 51 05 cpc r21, r1 + 2252: a1 f0 breq .+40 ; 0x227c + 2254: 40 31 cpi r20, 0x10 ; 16 + 2256: 51 05 cpc r21, r1 + 2258: d9 f4 brne .+54 ; 0x2290 + 225a: 0c c0 rjmp .+24 ; 0x2274 + 225c: 41 15 cp r20, r1 + 225e: 32 e0 ldi r19, 0x02 ; 2 + 2260: 53 07 cpc r21, r19 + 2262: 91 f0 breq .+36 ; 0x2288 + 2264: 4f 3f cpi r20, 0xFF ; 255 + 2266: 33 e0 ldi r19, 0x03 ; 3 + 2268: 53 07 cpc r21, r19 + 226a: 81 f0 breq .+32 ; 0x228c + 226c: 41 15 cp r20, r1 + 226e: 51 40 sbci r21, 0x01 ; 1 + 2270: 79 f4 brne .+30 ; 0x2290 + 2272: 08 c0 rjmp .+16 ; 0x2284 + 2274: 41 e0 ldi r20, 0x01 ; 1 + 2276: 0d c0 rjmp .+26 ; 0x2292 + 2278: 42 e0 ldi r20, 0x02 ; 2 + 227a: 0b c0 rjmp .+22 ; 0x2292 + 227c: 43 e0 ldi r20, 0x03 ; 3 + 227e: 09 c0 rjmp .+18 ; 0x2292 + 2280: 44 e0 ldi r20, 0x04 ; 4 + 2282: 07 c0 rjmp .+14 ; 0x2292 + 2284: 45 e0 ldi r20, 0x05 ; 5 + 2286: 05 c0 rjmp .+10 ; 0x2292 + 2288: 46 e0 ldi r20, 0x06 ; 6 + 228a: 03 c0 rjmp .+6 ; 0x2292 + 228c: 47 e0 ldi r20, 0x07 ; 7 + 228e: 01 c0 rjmp .+2 ; 0x2292 + 2290: 40 e0 ldi r20, 0x00 ; 0 + 2292: fc 01 movw r30, r24 + 2294: ee 0f add r30, r30 + 2296: ff 1f adc r31, r31 + 2298: ee 0f add r30, r30 + 229a: ff 1f adc r31, r31 + 229c: ee 0f add r30, r30 + 229e: ff 1f adc r31, r31 + 22a0: e0 50 subi r30, 0x00 ; 0 + 22a2: fe 4d sbci r31, 0xDE ; 222 + 22a4: 11 8a std Z+17, r1 ; 0x11 + 22a6: dc 01 movw r26, r24 + 22a8: aa 0f add r26, r26 + 22aa: bb 1f adc r27, r27 + 22ac: aa 0f add r26, r26 + 22ae: bb 1f adc r27, r27 + 22b0: aa 0f add r26, r26 + 22b2: bb 1f adc r27, r27 + 22b4: a0 5f subi r26, 0xF0 ; 240 + 22b6: bd 4d sbci r27, 0xDD ; 221 + 22b8: 36 e0 ldi r19, 0x06 ; 6 + 22ba: 3c 93 st X, r19 + 22bc: 24 2b or r18, r20 + 22be: 21 8b std Z+17, r18 ; 0x11 + 22c0: 88 0f add r24, r24 + 22c2: 99 1f adc r25, r25 + 22c4: 88 0f add r24, r24 + 22c6: 99 1f adc r25, r25 + 22c8: 88 0f add r24, r24 + 22ca: 99 1f adc r25, r25 + 22cc: fc 01 movw r30, r24 + 22ce: e0 50 subi r30, 0x00 ; 0 + 22d0: fe 4d sbci r31, 0xDE ; 222 + 22d2: 81 89 ldd r24, Z+17 ; 0x11 + 22d4: 80 62 ori r24, 0x20 ; 32 + 22d6: 81 8b std Z+17, r24 ; 0x11 + 22d8: 81 e0 ldi r24, 0x01 ; 1 + 22da: 08 95 ret + 22dc: 80 e0 ldi r24, 0x00 ; 0 + 22de: 08 95 ret -000022c2 : - 22c2: e8 2f mov r30, r24 - 22c4: ef 70 andi r30, 0x0F ; 15 - 22c6: f0 e0 ldi r31, 0x00 ; 0 - 22c8: ee 0f add r30, r30 - 22ca: ff 1f adc r31, r31 - 22cc: 08 2e mov r0, r24 - 22ce: 00 0c add r0, r0 - 22d0: 99 0b sbc r25, r25 - 22d2: 88 27 eor r24, r24 - 22d4: 99 0f add r25, r25 - 22d6: 88 1f adc r24, r24 - 22d8: 99 27 eor r25, r25 - 22da: e8 0f add r30, r24 - 22dc: f9 1f adc r31, r25 - 22de: ee 0f add r30, r30 - 22e0: ff 1f adc r31, r31 - 22e2: ee 0f add r30, r30 - 22e4: ff 1f adc r31, r31 +000022e0 : + 22e0: e8 2f mov r30, r24 + 22e2: ef 70 andi r30, 0x0F ; 15 + 22e4: f0 e0 ldi r31, 0x00 ; 0 22e6: ee 0f add r30, r30 22e8: ff 1f adc r31, r31 - 22ea: e0 50 subi r30, 0x00 ; 0 - 22ec: fe 4d sbci r31, 0xDE ; 222 - 22ee: 81 89 ldd r24, Z+17 ; 0x11 - 22f0: 82 fb bst r24, 2 - 22f2: 88 27 eor r24, r24 - 22f4: 80 f9 bld r24, 0 - 22f6: 08 95 ret + 22ea: 08 2e mov r0, r24 + 22ec: 00 0c add r0, r0 + 22ee: 99 0b sbc r25, r25 + 22f0: 88 27 eor r24, r24 + 22f2: 99 0f add r25, r25 + 22f4: 88 1f adc r24, r24 + 22f6: 99 27 eor r25, r25 + 22f8: e8 0f add r30, r24 + 22fa: f9 1f adc r31, r25 + 22fc: ee 0f add r30, r30 + 22fe: ff 1f adc r31, r31 + 2300: ee 0f add r30, r30 + 2302: ff 1f adc r31, r31 + 2304: ee 0f add r30, r30 + 2306: ff 1f adc r31, r31 + 2308: e0 50 subi r30, 0x00 ; 0 + 230a: fe 4d sbci r31, 0xDE ; 222 + 230c: 81 89 ldd r24, Z+17 ; 0x11 + 230e: 82 fb bst r24, 2 + 2310: 88 27 eor r24, r24 + 2312: 80 f9 bld r24, 0 + 2314: 08 95 ret -000022f8 : - 22f8: 28 2f mov r18, r24 - 22fa: 2f 70 andi r18, 0x0F ; 15 - 22fc: 30 e0 ldi r19, 0x00 ; 0 - 22fe: a9 01 movw r20, r18 - 2300: 44 0f add r20, r20 - 2302: 55 1f adc r21, r21 - 2304: 28 2f mov r18, r24 - 2306: 08 2e mov r0, r24 - 2308: 00 0c add r0, r0 - 230a: 33 0b sbc r19, r19 - 230c: 22 27 eor r18, r18 - 230e: 33 0f add r19, r19 - 2310: 22 1f adc r18, r18 - 2312: 33 27 eor r19, r19 - 2314: 24 0f add r18, r20 - 2316: 35 1f adc r19, r21 - 2318: f9 01 movw r30, r18 - 231a: ee 0f add r30, r30 - 231c: ff 1f adc r31, r31 - 231e: ee 0f add r30, r30 - 2320: ff 1f adc r31, r31 - 2322: ee 0f add r30, r30 - 2324: ff 1f adc r31, r31 - 2326: e0 50 subi r30, 0x00 ; 0 - 2328: fe 4d sbci r31, 0xDE ; 222 - 232a: 91 89 ldd r25, Z+17 ; 0x11 - 232c: 92 ff sbrs r25, 2 - 232e: 17 c0 rjmp .+46 ; 0x235e - 2330: 22 0f add r18, r18 - 2332: 33 1f adc r19, r19 - 2334: 22 0f add r18, r18 - 2336: 33 1f adc r19, r19 - 2338: 22 0f add r18, r18 - 233a: 33 1f adc r19, r19 - 233c: f9 01 movw r30, r18 - 233e: e0 50 subi r30, 0x00 ; 0 - 2340: fe 4d sbci r31, 0xDE ; 222 - 2342: 91 89 ldd r25, Z+17 ; 0x11 - 2344: 9b 7f andi r25, 0xFB ; 251 - 2346: 91 8b std Z+17, r25 ; 0x11 - 2348: ae dc rcall .-1700 ; 0x1ca6 - 234a: fc 01 movw r30, r24 - 234c: 80 81 ld r24, Z - 234e: 80 ff sbrs r24, 0 - 2350: 06 c0 rjmp .+12 ; 0x235e - 2352: 8e 7f andi r24, 0xFE ; 254 - 2354: 80 83 st Z, r24 - 2356: 07 80 ldd r0, Z+7 ; 0x07 - 2358: f0 85 ldd r31, Z+8 ; 0x08 - 235a: e0 2d mov r30, r0 - 235c: 09 95 icall - 235e: 81 e0 ldi r24, 0x01 ; 1 - 2360: 08 95 ret +00002316 : + 2316: 28 2f mov r18, r24 + 2318: 2f 70 andi r18, 0x0F ; 15 + 231a: 30 e0 ldi r19, 0x00 ; 0 + 231c: a9 01 movw r20, r18 + 231e: 44 0f add r20, r20 + 2320: 55 1f adc r21, r21 + 2322: 28 2f mov r18, r24 + 2324: 08 2e mov r0, r24 + 2326: 00 0c add r0, r0 + 2328: 33 0b sbc r19, r19 + 232a: 22 27 eor r18, r18 + 232c: 33 0f add r19, r19 + 232e: 22 1f adc r18, r18 + 2330: 33 27 eor r19, r19 + 2332: 24 0f add r18, r20 + 2334: 35 1f adc r19, r21 + 2336: f9 01 movw r30, r18 + 2338: ee 0f add r30, r30 + 233a: ff 1f adc r31, r31 + 233c: ee 0f add r30, r30 + 233e: ff 1f adc r31, r31 + 2340: ee 0f add r30, r30 + 2342: ff 1f adc r31, r31 + 2344: e0 50 subi r30, 0x00 ; 0 + 2346: fe 4d sbci r31, 0xDE ; 222 + 2348: 91 89 ldd r25, Z+17 ; 0x11 + 234a: 92 ff sbrs r25, 2 + 234c: 17 c0 rjmp .+46 ; 0x237c + 234e: 22 0f add r18, r18 + 2350: 33 1f adc r19, r19 + 2352: 22 0f add r18, r18 + 2354: 33 1f adc r19, r19 + 2356: 22 0f add r18, r18 + 2358: 33 1f adc r19, r19 + 235a: f9 01 movw r30, r18 + 235c: e0 50 subi r30, 0x00 ; 0 + 235e: fe 4d sbci r31, 0xDE ; 222 + 2360: 91 89 ldd r25, Z+17 ; 0x11 + 2362: 9b 7f andi r25, 0xFB ; 251 + 2364: 91 8b std Z+17, r25 ; 0x11 + 2366: ae dc rcall .-1700 ; 0x1cc4 + 2368: fc 01 movw r30, r24 + 236a: 80 81 ld r24, Z + 236c: 80 ff sbrs r24, 0 + 236e: 06 c0 rjmp .+12 ; 0x237c + 2370: 8e 7f andi r24, 0xFE ; 254 + 2372: 80 83 st Z, r24 + 2374: 07 80 ldd r0, Z+7 ; 0x07 + 2376: f0 85 ldd r31, Z+8 ; 0x08 + 2378: e0 2d mov r30, r0 + 237a: 09 95 icall + 237c: 81 e0 ldi r24, 0x01 ; 1 + 237e: 08 95 ret -00002362 : - 2362: 7f 92 push r7 - 2364: 8f 92 push r8 - 2366: 9f 92 push r9 - 2368: af 92 push r10 - 236a: bf 92 push r11 - 236c: cf 92 push r12 - 236e: df 92 push r13 - 2370: ef 92 push r14 - 2372: ff 92 push r15 - 2374: 0f 93 push r16 - 2376: 1f 93 push r17 - 2378: cf 93 push r28 - 237a: df 93 push r29 - 237c: 98 2e mov r9, r24 - 237e: 86 2e mov r8, r22 - 2380: 6a 01 movw r12, r20 - 2382: 79 01 movw r14, r18 - 2384: 90 dc rcall .-1760 ; 0x1ca6 - 2386: 5c 01 movw r10, r24 - 2388: 79 2c mov r7, r9 - 238a: 77 1c adc r7, r7 - 238c: 77 24 eor r7, r7 - 238e: 77 1c adc r7, r7 - 2390: c9 2d mov r28, r9 - 2392: cf 70 andi r28, 0x0F ; 15 - 2394: d0 e0 ldi r29, 0x00 ; 0 - 2396: cc 0f add r28, r28 - 2398: dd 1f adc r29, r29 - 239a: c7 0d add r28, r7 - 239c: d1 1d adc r29, r1 - 239e: fe 01 movw r30, r28 - 23a0: ee 0f add r30, r30 - 23a2: ff 1f adc r31, r31 - 23a4: ee 0f add r30, r30 - 23a6: ff 1f adc r31, r31 - 23a8: ee 0f add r30, r30 - 23aa: ff 1f adc r31, r31 - 23ac: e0 50 subi r30, 0x00 ; 0 - 23ae: fe 4d sbci r31, 0xDE ; 222 - 23b0: 81 89 ldd r24, Z+17 ; 0x11 - 23b2: 80 7c andi r24, 0xC0 ; 192 - 23b4: 09 f4 brne .+2 ; 0x23b8 - 23b6: 7d c0 rjmp .+250 ; 0x24b2 - 23b8: fe 01 movw r30, r28 - 23ba: ee 0f add r30, r30 - 23bc: ff 1f adc r31, r31 +00002380 : + 2380: 7f 92 push r7 + 2382: 8f 92 push r8 + 2384: 9f 92 push r9 + 2386: af 92 push r10 + 2388: bf 92 push r11 + 238a: cf 92 push r12 + 238c: df 92 push r13 + 238e: ef 92 push r14 + 2390: ff 92 push r15 + 2392: 0f 93 push r16 + 2394: 1f 93 push r17 + 2396: cf 93 push r28 + 2398: df 93 push r29 + 239a: 98 2e mov r9, r24 + 239c: 86 2e mov r8, r22 + 239e: 6a 01 movw r12, r20 + 23a0: 79 01 movw r14, r18 + 23a2: 90 dc rcall .-1760 ; 0x1cc4 + 23a4: 5c 01 movw r10, r24 + 23a6: 79 2c mov r7, r9 + 23a8: 77 1c adc r7, r7 + 23aa: 77 24 eor r7, r7 + 23ac: 77 1c adc r7, r7 + 23ae: c9 2d mov r28, r9 + 23b0: cf 70 andi r28, 0x0F ; 15 + 23b2: d0 e0 ldi r29, 0x00 ; 0 + 23b4: cc 0f add r28, r28 + 23b6: dd 1f adc r29, r29 + 23b8: c7 0d add r28, r7 + 23ba: d1 1d adc r29, r1 + 23bc: fe 01 movw r30, r28 23be: ee 0f add r30, r30 23c0: ff 1f adc r31, r31 23c2: ee 0f add r30, r30 23c4: ff 1f adc r31, r31 - 23c6: e0 50 subi r30, 0x00 ; 0 - 23c8: fe 4d sbci r31, 0xDE ; 222 - 23ca: 81 89 ldd r24, Z+17 ; 0x11 - 23cc: 80 7c andi r24, 0xC0 ; 192 - 23ce: 80 3c cpi r24, 0xC0 ; 192 - 23d0: 61 f0 breq .+24 ; 0x23ea - 23d2: fe 01 movw r30, r28 - 23d4: ee 0f add r30, r30 - 23d6: ff 1f adc r31, r31 + 23c6: ee 0f add r30, r30 + 23c8: ff 1f adc r31, r31 + 23ca: e0 50 subi r30, 0x00 ; 0 + 23cc: fe 4d sbci r31, 0xDE ; 222 + 23ce: 81 89 ldd r24, Z+17 ; 0x11 + 23d0: 80 7c andi r24, 0xC0 ; 192 + 23d2: 09 f4 brne .+2 ; 0x23d6 + 23d4: 7d c0 rjmp .+250 ; 0x24d0 + 23d6: fe 01 movw r30, r28 23d8: ee 0f add r30, r30 23da: ff 1f adc r31, r31 23dc: ee 0f add r30, r30 23de: ff 1f adc r31, r31 - 23e0: e0 50 subi r30, 0x00 ; 0 - 23e2: fe 4d sbci r31, 0xDE ; 222 - 23e4: 81 89 ldd r24, Z+17 ; 0x11 - 23e6: 82 fd sbrc r24, 2 - 23e8: 66 c0 rjmp .+204 ; 0x24b6 - 23ea: 8f b7 in r24, 0x3f ; 63 - 23ec: f8 94 cli - 23ee: f5 01 movw r30, r10 - 23f0: 90 81 ld r25, Z - 23f2: 90 ff sbrs r25, 0 - 23f4: 03 c0 rjmp .+6 ; 0x23fc - 23f6: 8f bf out 0x3f, r24 ; 63 - 23f8: 71 2c mov r7, r1 - 23fa: 5e c0 rjmp .+188 ; 0x24b8 - 23fc: f5 01 movw r30, r10 - 23fe: 90 81 ld r25, Z - 2400: 91 60 ori r25, 0x01 ; 1 - 2402: 90 83 st Z, r25 - 2404: 8f bf out 0x3f, r24 ; 63 - 2406: c1 82 std Z+1, r12 ; 0x01 - 2408: d2 82 std Z+2, r13 ; 0x02 - 240a: e3 82 std Z+3, r14 ; 0x03 - 240c: f4 82 std Z+4, r15 ; 0x04 - 240e: 15 82 std Z+5, r1 ; 0x05 - 2410: 16 82 std Z+6, r1 ; 0x06 - 2412: 07 83 std Z+7, r16 ; 0x07 - 2414: 10 87 std Z+8, r17 ; 0x08 - 2416: 81 10 cpse r8, r1 - 2418: 06 c0 rjmp .+12 ; 0x2426 - 241a: 91 e0 ldi r25, 0x01 ; 1 - 241c: e1 14 cp r14, r1 - 241e: f1 04 cpc r15, r1 - 2420: 19 f0 breq .+6 ; 0x2428 - 2422: 90 e0 ldi r25, 0x00 ; 0 - 2424: 01 c0 rjmp .+2 ; 0x2428 - 2426: 91 e0 ldi r25, 0x01 ; 1 - 2428: f5 01 movw r30, r10 - 242a: 80 81 ld r24, Z - 242c: 90 fb bst r25, 0 - 242e: 81 f9 bld r24, 1 - 2430: 8b 7f andi r24, 0xFB ; 251 - 2432: 80 83 st Z, r24 - 2434: 77 20 and r7, r7 - 2436: 59 f0 breq .+22 ; 0x244e - 2438: cc 0f add r28, r28 - 243a: dd 1f adc r29, r29 - 243c: cc 0f add r28, r28 - 243e: dd 1f adc r29, r29 - 2440: cc 0f add r28, r28 - 2442: dd 1f adc r29, r29 - 2444: c0 50 subi r28, 0x00 ; 0 - 2446: de 4d sbci r29, 0xDE ; 222 - 2448: 1e 8a std Y+22, r1 ; 0x16 - 244a: 1f 8a std Y+23, r1 ; 0x17 - 244c: 2d c0 rjmp .+90 ; 0x24a8 - 244e: fe 01 movw r30, r28 - 2450: ee 0f add r30, r30 - 2452: ff 1f adc r31, r31 - 2454: ee 0f add r30, r30 - 2456: ff 1f adc r31, r31 - 2458: ee 0f add r30, r30 - 245a: ff 1f adc r31, r31 - 245c: e0 50 subi r30, 0x00 ; 0 - 245e: fe 4d sbci r31, 0xDE ; 222 - 2460: 81 89 ldd r24, Z+17 ; 0x11 - 2462: 80 7c andi r24, 0xC0 ; 192 - 2464: 80 3c cpi r24, 0xC0 ; 192 - 2466: a1 f4 brne .+40 ; 0x2490 - 2468: ce 01 movw r24, r28 - 246a: 88 0f add r24, r24 - 246c: 99 1f adc r25, r25 - 246e: 88 0f add r24, r24 - 2470: 99 1f adc r25, r25 - 2472: 88 0f add r24, r24 - 2474: 99 1f adc r25, r25 - 2476: 80 5f subi r24, 0xF0 ; 240 - 2478: 9d 4d sbci r25, 0xDD ; 221 - 247a: ef db rcall .-2082 ; 0x1c5a - 247c: bc 01 movw r22, r24 - 247e: c7 01 movw r24, r14 - 2480: 60 d2 rcall .+1216 ; 0x2942 <__udivmodhi4> - 2482: 89 2b or r24, r25 - 2484: 29 f0 breq .+10 ; 0x2490 - 2486: f5 01 movw r30, r10 - 2488: 80 81 ld r24, Z - 248a: 8e 7f andi r24, 0xFE ; 254 - 248c: 80 83 st Z, r24 - 248e: 14 c0 rjmp .+40 ; 0x24b8 - 2490: cc 0f add r28, r28 - 2492: dd 1f adc r29, r29 - 2494: cc 0f add r28, r28 - 2496: dd 1f adc r29, r29 - 2498: cc 0f add r28, r28 - 249a: dd 1f adc r29, r29 - 249c: c0 50 subi r28, 0x00 ; 0 - 249e: de 4d sbci r29, 0xDE ; 222 - 24a0: 1a 8a std Y+18, r1 ; 0x12 - 24a2: 1b 8a std Y+19, r1 ; 0x13 - 24a4: 1e 8a std Y+22, r1 ; 0x16 - 24a6: 1f 8a std Y+23, r1 ; 0x17 - 24a8: 89 2d mov r24, r9 - 24aa: 87 dc rcall .-1778 ; 0x1dba - 24ac: 77 24 eor r7, r7 - 24ae: 73 94 inc r7 - 24b0: 03 c0 rjmp .+6 ; 0x24b8 - 24b2: 71 2c mov r7, r1 - 24b4: 01 c0 rjmp .+2 ; 0x24b8 - 24b6: 71 2c mov r7, r1 - 24b8: 87 2d mov r24, r7 - 24ba: df 91 pop r29 - 24bc: cf 91 pop r28 - 24be: 1f 91 pop r17 - 24c0: 0f 91 pop r16 - 24c2: ff 90 pop r15 - 24c4: ef 90 pop r14 - 24c6: df 90 pop r13 - 24c8: cf 90 pop r12 - 24ca: bf 90 pop r11 - 24cc: af 90 pop r10 - 24ce: 9f 90 pop r9 - 24d0: 8f 90 pop r8 - 24d2: 7f 90 pop r7 - 24d4: 08 95 ret + 23e0: ee 0f add r30, r30 + 23e2: ff 1f adc r31, r31 + 23e4: e0 50 subi r30, 0x00 ; 0 + 23e6: fe 4d sbci r31, 0xDE ; 222 + 23e8: 81 89 ldd r24, Z+17 ; 0x11 + 23ea: 80 7c andi r24, 0xC0 ; 192 + 23ec: 80 3c cpi r24, 0xC0 ; 192 + 23ee: 61 f0 breq .+24 ; 0x2408 + 23f0: fe 01 movw r30, r28 + 23f2: ee 0f add r30, r30 + 23f4: ff 1f adc r31, r31 + 23f6: ee 0f add r30, r30 + 23f8: ff 1f adc r31, r31 + 23fa: ee 0f add r30, r30 + 23fc: ff 1f adc r31, r31 + 23fe: e0 50 subi r30, 0x00 ; 0 + 2400: fe 4d sbci r31, 0xDE ; 222 + 2402: 81 89 ldd r24, Z+17 ; 0x11 + 2404: 82 fd sbrc r24, 2 + 2406: 66 c0 rjmp .+204 ; 0x24d4 + 2408: 8f b7 in r24, 0x3f ; 63 + 240a: f8 94 cli + 240c: f5 01 movw r30, r10 + 240e: 90 81 ld r25, Z + 2410: 90 ff sbrs r25, 0 + 2412: 03 c0 rjmp .+6 ; 0x241a + 2414: 8f bf out 0x3f, r24 ; 63 + 2416: 71 2c mov r7, r1 + 2418: 5e c0 rjmp .+188 ; 0x24d6 + 241a: f5 01 movw r30, r10 + 241c: 90 81 ld r25, Z + 241e: 91 60 ori r25, 0x01 ; 1 + 2420: 90 83 st Z, r25 + 2422: 8f bf out 0x3f, r24 ; 63 + 2424: c1 82 std Z+1, r12 ; 0x01 + 2426: d2 82 std Z+2, r13 ; 0x02 + 2428: e3 82 std Z+3, r14 ; 0x03 + 242a: f4 82 std Z+4, r15 ; 0x04 + 242c: 15 82 std Z+5, r1 ; 0x05 + 242e: 16 82 std Z+6, r1 ; 0x06 + 2430: 07 83 std Z+7, r16 ; 0x07 + 2432: 10 87 std Z+8, r17 ; 0x08 + 2434: 81 10 cpse r8, r1 + 2436: 06 c0 rjmp .+12 ; 0x2444 + 2438: 91 e0 ldi r25, 0x01 ; 1 + 243a: e1 14 cp r14, r1 + 243c: f1 04 cpc r15, r1 + 243e: 19 f0 breq .+6 ; 0x2446 + 2440: 90 e0 ldi r25, 0x00 ; 0 + 2442: 01 c0 rjmp .+2 ; 0x2446 + 2444: 91 e0 ldi r25, 0x01 ; 1 + 2446: f5 01 movw r30, r10 + 2448: 80 81 ld r24, Z + 244a: 90 fb bst r25, 0 + 244c: 81 f9 bld r24, 1 + 244e: 8b 7f andi r24, 0xFB ; 251 + 2450: 80 83 st Z, r24 + 2452: 77 20 and r7, r7 + 2454: 59 f0 breq .+22 ; 0x246c + 2456: cc 0f add r28, r28 + 2458: dd 1f adc r29, r29 + 245a: cc 0f add r28, r28 + 245c: dd 1f adc r29, r29 + 245e: cc 0f add r28, r28 + 2460: dd 1f adc r29, r29 + 2462: c0 50 subi r28, 0x00 ; 0 + 2464: de 4d sbci r29, 0xDE ; 222 + 2466: 1e 8a std Y+22, r1 ; 0x16 + 2468: 1f 8a std Y+23, r1 ; 0x17 + 246a: 2d c0 rjmp .+90 ; 0x24c6 + 246c: fe 01 movw r30, r28 + 246e: ee 0f add r30, r30 + 2470: ff 1f adc r31, r31 + 2472: ee 0f add r30, r30 + 2474: ff 1f adc r31, r31 + 2476: ee 0f add r30, r30 + 2478: ff 1f adc r31, r31 + 247a: e0 50 subi r30, 0x00 ; 0 + 247c: fe 4d sbci r31, 0xDE ; 222 + 247e: 81 89 ldd r24, Z+17 ; 0x11 + 2480: 80 7c andi r24, 0xC0 ; 192 + 2482: 80 3c cpi r24, 0xC0 ; 192 + 2484: a1 f4 brne .+40 ; 0x24ae + 2486: ce 01 movw r24, r28 + 2488: 88 0f add r24, r24 + 248a: 99 1f adc r25, r25 + 248c: 88 0f add r24, r24 + 248e: 99 1f adc r25, r25 + 2490: 88 0f add r24, r24 + 2492: 99 1f adc r25, r25 + 2494: 80 5f subi r24, 0xF0 ; 240 + 2496: 9d 4d sbci r25, 0xDD ; 221 + 2498: ef db rcall .-2082 ; 0x1c78 + 249a: bc 01 movw r22, r24 + 249c: c7 01 movw r24, r14 + 249e: 60 d2 rcall .+1216 ; 0x2960 <__udivmodhi4> + 24a0: 89 2b or r24, r25 + 24a2: 29 f0 breq .+10 ; 0x24ae + 24a4: f5 01 movw r30, r10 + 24a6: 80 81 ld r24, Z + 24a8: 8e 7f andi r24, 0xFE ; 254 + 24aa: 80 83 st Z, r24 + 24ac: 14 c0 rjmp .+40 ; 0x24d6 + 24ae: cc 0f add r28, r28 + 24b0: dd 1f adc r29, r29 + 24b2: cc 0f add r28, r28 + 24b4: dd 1f adc r29, r29 + 24b6: cc 0f add r28, r28 + 24b8: dd 1f adc r29, r29 + 24ba: c0 50 subi r28, 0x00 ; 0 + 24bc: de 4d sbci r29, 0xDE ; 222 + 24be: 1a 8a std Y+18, r1 ; 0x12 + 24c0: 1b 8a std Y+19, r1 ; 0x13 + 24c2: 1e 8a std Y+22, r1 ; 0x16 + 24c4: 1f 8a std Y+23, r1 ; 0x17 + 24c6: 89 2d mov r24, r9 + 24c8: 87 dc rcall .-1778 ; 0x1dd8 + 24ca: 77 24 eor r7, r7 + 24cc: 73 94 inc r7 + 24ce: 03 c0 rjmp .+6 ; 0x24d6 + 24d0: 71 2c mov r7, r1 + 24d2: 01 c0 rjmp .+2 ; 0x24d6 + 24d4: 71 2c mov r7, r1 + 24d6: 87 2d mov r24, r7 + 24d8: df 91 pop r29 + 24da: cf 91 pop r28 + 24dc: 1f 91 pop r17 + 24de: 0f 91 pop r16 + 24e0: ff 90 pop r15 + 24e2: ef 90 pop r14 + 24e4: df 90 pop r13 + 24e6: cf 90 pop r12 + 24e8: bf 90 pop r11 + 24ea: af 90 pop r10 + 24ec: 9f 90 pop r9 + 24ee: 8f 90 pop r8 + 24f0: 7f 90 pop r7 + 24f2: 08 95 ret -000024d6 : - 24d6: ff 92 push r15 - 24d8: 0f 93 push r16 - 24da: 1f 93 push r17 - 24dc: cf 93 push r28 - 24de: df 93 push r29 - 24e0: 18 2f mov r17, r24 - 24e2: f8 2e mov r15, r24 - 24e4: ff 1c adc r15, r15 - 24e6: ff 24 eor r15, r15 - 24e8: ff 1c adc r15, r15 - 24ea: c8 2f mov r28, r24 - 24ec: cf 70 andi r28, 0x0F ; 15 - 24ee: d0 e0 ldi r29, 0x00 ; 0 - 24f0: cc 0f add r28, r28 - 24f2: dd 1f adc r29, r29 - 24f4: cf 0d add r28, r15 - 24f6: d1 1d adc r29, r1 - 24f8: d6 db rcall .-2132 ; 0x1ca6 - 24fa: dc 01 movw r26, r24 - 24fc: fe 01 movw r30, r28 - 24fe: ee 0f add r30, r30 - 2500: ff 1f adc r31, r31 - 2502: ee 0f add r30, r30 - 2504: ff 1f adc r31, r31 - 2506: ee 0f add r30, r30 - 2508: ff 1f adc r31, r31 - 250a: e0 5f subi r30, 0xF0 ; 240 - 250c: fd 4d sbci r31, 0xDD ; 221 - 250e: 02 e0 ldi r16, 0x02 ; 2 - 2510: 05 93 las Z, r16 - 2512: 8c 91 ld r24, X - 2514: 80 ff sbrs r24, 0 - 2516: 22 c0 rjmp .+68 ; 0x255c - 2518: 8e 7f andi r24, 0xFE ; 254 - 251a: 8c 93 st X, r24 - 251c: 17 96 adiw r26, 0x07 ; 7 - 251e: ed 91 ld r30, X+ - 2520: fc 91 ld r31, X - 2522: 18 97 sbiw r26, 0x08 ; 8 - 2524: 30 97 sbiw r30, 0x00 ; 0 - 2526: d1 f0 breq .+52 ; 0x255c - 2528: ff 20 and r15, r15 - 252a: 59 f0 breq .+22 ; 0x2542 - 252c: cc 0f add r28, r28 - 252e: dd 1f adc r29, r29 - 2530: cc 0f add r28, r28 - 2532: dd 1f adc r29, r29 - 2534: cc 0f add r28, r28 - 2536: dd 1f adc r29, r29 - 2538: c0 50 subi r28, 0x00 ; 0 - 253a: de 4d sbci r29, 0xDE ; 222 - 253c: 6e 89 ldd r22, Y+22 ; 0x16 - 253e: 7f 89 ldd r23, Y+23 ; 0x17 - 2540: 0a c0 rjmp .+20 ; 0x2556 - 2542: cc 0f add r28, r28 - 2544: dd 1f adc r29, r29 - 2546: cc 0f add r28, r28 - 2548: dd 1f adc r29, r29 +000024f4 : + 24f4: ff 92 push r15 + 24f6: 0f 93 push r16 + 24f8: 1f 93 push r17 + 24fa: cf 93 push r28 + 24fc: df 93 push r29 + 24fe: 18 2f mov r17, r24 + 2500: f8 2e mov r15, r24 + 2502: ff 1c adc r15, r15 + 2504: ff 24 eor r15, r15 + 2506: ff 1c adc r15, r15 + 2508: c8 2f mov r28, r24 + 250a: cf 70 andi r28, 0x0F ; 15 + 250c: d0 e0 ldi r29, 0x00 ; 0 + 250e: cc 0f add r28, r28 + 2510: dd 1f adc r29, r29 + 2512: cf 0d add r28, r15 + 2514: d1 1d adc r29, r1 + 2516: d6 db rcall .-2132 ; 0x1cc4 + 2518: dc 01 movw r26, r24 + 251a: fe 01 movw r30, r28 + 251c: ee 0f add r30, r30 + 251e: ff 1f adc r31, r31 + 2520: ee 0f add r30, r30 + 2522: ff 1f adc r31, r31 + 2524: ee 0f add r30, r30 + 2526: ff 1f adc r31, r31 + 2528: e0 5f subi r30, 0xF0 ; 240 + 252a: fd 4d sbci r31, 0xDD ; 221 + 252c: 02 e0 ldi r16, 0x02 ; 2 + 252e: 05 93 las Z, r16 + 2530: 8c 91 ld r24, X + 2532: 80 ff sbrs r24, 0 + 2534: 22 c0 rjmp .+68 ; 0x257a + 2536: 8e 7f andi r24, 0xFE ; 254 + 2538: 8c 93 st X, r24 + 253a: 17 96 adiw r26, 0x07 ; 7 + 253c: ed 91 ld r30, X+ + 253e: fc 91 ld r31, X + 2540: 18 97 sbiw r26, 0x08 ; 8 + 2542: 30 97 sbiw r30, 0x00 ; 0 + 2544: d1 f0 breq .+52 ; 0x257a + 2546: ff 20 and r15, r15 + 2548: 59 f0 breq .+22 ; 0x2560 254a: cc 0f add r28, r28 254c: dd 1f adc r29, r29 - 254e: c0 50 subi r28, 0x00 ; 0 - 2550: de 4d sbci r29, 0xDE ; 222 - 2552: 6a 89 ldd r22, Y+18 ; 0x12 - 2554: 7b 89 ldd r23, Y+19 ; 0x13 - 2556: 41 2f mov r20, r17 - 2558: 81 e0 ldi r24, 0x01 ; 1 - 255a: 09 95 icall - 255c: df 91 pop r29 - 255e: cf 91 pop r28 - 2560: 1f 91 pop r17 - 2562: 0f 91 pop r16 - 2564: ff 90 pop r15 - 2566: 08 95 ret + 254e: cc 0f add r28, r28 + 2550: dd 1f adc r29, r29 + 2552: cc 0f add r28, r28 + 2554: dd 1f adc r29, r29 + 2556: c0 50 subi r28, 0x00 ; 0 + 2558: de 4d sbci r29, 0xDE ; 222 + 255a: 6e 89 ldd r22, Y+22 ; 0x16 + 255c: 7f 89 ldd r23, Y+23 ; 0x17 + 255e: 0a c0 rjmp .+20 ; 0x2574 + 2560: cc 0f add r28, r28 + 2562: dd 1f adc r29, r29 + 2564: cc 0f add r28, r28 + 2566: dd 1f adc r29, r29 + 2568: cc 0f add r28, r28 + 256a: dd 1f adc r29, r29 + 256c: c0 50 subi r28, 0x00 ; 0 + 256e: de 4d sbci r29, 0xDE ; 222 + 2570: 6a 89 ldd r22, Y+18 ; 0x12 + 2572: 7b 89 ldd r23, Y+19 ; 0x13 + 2574: 41 2f mov r20, r17 + 2576: 81 e0 ldi r24, 0x01 ; 1 + 2578: 09 95 icall + 257a: df 91 pop r29 + 257c: cf 91 pop r28 + 257e: 1f 91 pop r17 + 2580: 0f 91 pop r16 + 2582: ff 90 pop r15 + 2584: 08 95 ret -00002568 : - 2568: cf 93 push r28 - 256a: c8 2f mov r28, r24 - 256c: b4 df rcall .-152 ; 0x24d6 - 256e: ec 2f mov r30, r28 - 2570: ef 70 andi r30, 0x0F ; 15 - 2572: f0 e0 ldi r31, 0x00 ; 0 - 2574: ee 0f add r30, r30 - 2576: ff 1f adc r31, r31 - 2578: 8c 2f mov r24, r28 - 257a: cc 0f add r28, r28 - 257c: 99 0b sbc r25, r25 - 257e: 88 27 eor r24, r24 - 2580: 99 0f add r25, r25 - 2582: 88 1f adc r24, r24 - 2584: 99 27 eor r25, r25 - 2586: e8 0f add r30, r24 - 2588: f9 1f adc r31, r25 - 258a: ee 0f add r30, r30 - 258c: ff 1f adc r31, r31 - 258e: ee 0f add r30, r30 - 2590: ff 1f adc r31, r31 +00002586 : + 2586: cf 93 push r28 + 2588: c8 2f mov r28, r24 + 258a: b4 df rcall .-152 ; 0x24f4 + 258c: ec 2f mov r30, r28 + 258e: ef 70 andi r30, 0x0F ; 15 + 2590: f0 e0 ldi r31, 0x00 ; 0 2592: ee 0f add r30, r30 2594: ff 1f adc r31, r31 - 2596: e0 50 subi r30, 0x00 ; 0 - 2598: fe 4d sbci r31, 0xDE ; 222 - 259a: 11 8a std Z+17, r1 ; 0x11 - 259c: cf 91 pop r28 - 259e: 08 95 ret - -000025a0 : - 25a0: 0f 93 push r16 - 25a2: e8 2f mov r30, r24 - 25a4: ef 70 andi r30, 0x0F ; 15 - 25a6: f0 e0 ldi r31, 0x00 ; 0 + 2596: 8c 2f mov r24, r28 + 2598: cc 0f add r28, r28 + 259a: 99 0b sbc r25, r25 + 259c: 88 27 eor r24, r24 + 259e: 99 0f add r25, r25 + 25a0: 88 1f adc r24, r24 + 25a2: 99 27 eor r25, r25 + 25a4: e8 0f add r30, r24 + 25a6: f9 1f adc r31, r25 25a8: ee 0f add r30, r30 25aa: ff 1f adc r31, r31 - 25ac: 28 2f mov r18, r24 - 25ae: 08 2e mov r0, r24 - 25b0: 00 0c add r0, r0 - 25b2: 33 0b sbc r19, r19 - 25b4: 22 27 eor r18, r18 - 25b6: 33 0f add r19, r19 - 25b8: 22 1f adc r18, r18 - 25ba: 33 27 eor r19, r19 - 25bc: e2 0f add r30, r18 - 25be: f3 1f adc r31, r19 - 25c0: df 01 movw r26, r30 - 25c2: aa 0f add r26, r26 - 25c4: bb 1f adc r27, r27 - 25c6: aa 0f add r26, r26 - 25c8: bb 1f adc r27, r27 - 25ca: aa 0f add r26, r26 - 25cc: bb 1f adc r27, r27 - 25ce: a0 50 subi r26, 0x00 ; 0 - 25d0: be 4d sbci r27, 0xDE ; 222 - 25d2: 51 96 adiw r26, 0x11 ; 17 - 25d4: 9c 91 ld r25, X - 25d6: 51 97 sbiw r26, 0x11 ; 17 - 25d8: 94 60 ori r25, 0x04 ; 4 - 25da: 51 96 adiw r26, 0x11 ; 17 - 25dc: 9c 93 st X, r25 - 25de: ee 0f add r30, r30 - 25e0: ff 1f adc r31, r31 - 25e2: ee 0f add r30, r30 - 25e4: ff 1f adc r31, r31 - 25e6: ee 0f add r30, r30 - 25e8: ff 1f adc r31, r31 - 25ea: e0 5f subi r30, 0xF0 ; 240 - 25ec: fd 4d sbci r31, 0xDD ; 221 - 25ee: 01 e0 ldi r16, 0x01 ; 1 - 25f0: 06 93 lac Z, r16 - 25f2: 71 df rcall .-286 ; 0x24d6 - 25f4: 81 e0 ldi r24, 0x01 ; 1 - 25f6: 0f 91 pop r16 - 25f8: 08 95 ret + 25ac: ee 0f add r30, r30 + 25ae: ff 1f adc r31, r31 + 25b0: ee 0f add r30, r30 + 25b2: ff 1f adc r31, r31 + 25b4: e0 50 subi r30, 0x00 ; 0 + 25b6: fe 4d sbci r31, 0xDE ; 222 + 25b8: 11 8a std Z+17, r1 ; 0x11 + 25ba: cf 91 pop r28 + 25bc: 08 95 ret -000025fa <__vector_125>: +000025be : + 25be: 0f 93 push r16 + 25c0: e8 2f mov r30, r24 + 25c2: ef 70 andi r30, 0x0F ; 15 + 25c4: f0 e0 ldi r31, 0x00 ; 0 + 25c6: ee 0f add r30, r30 + 25c8: ff 1f adc r31, r31 + 25ca: 28 2f mov r18, r24 + 25cc: 08 2e mov r0, r24 + 25ce: 00 0c add r0, r0 + 25d0: 33 0b sbc r19, r19 + 25d2: 22 27 eor r18, r18 + 25d4: 33 0f add r19, r19 + 25d6: 22 1f adc r18, r18 + 25d8: 33 27 eor r19, r19 + 25da: e2 0f add r30, r18 + 25dc: f3 1f adc r31, r19 + 25de: df 01 movw r26, r30 + 25e0: aa 0f add r26, r26 + 25e2: bb 1f adc r27, r27 + 25e4: aa 0f add r26, r26 + 25e6: bb 1f adc r27, r27 + 25e8: aa 0f add r26, r26 + 25ea: bb 1f adc r27, r27 + 25ec: a0 50 subi r26, 0x00 ; 0 + 25ee: be 4d sbci r27, 0xDE ; 222 + 25f0: 51 96 adiw r26, 0x11 ; 17 + 25f2: 9c 91 ld r25, X + 25f4: 51 97 sbiw r26, 0x11 ; 17 + 25f6: 94 60 ori r25, 0x04 ; 4 + 25f8: 51 96 adiw r26, 0x11 ; 17 + 25fa: 9c 93 st X, r25 + 25fc: ee 0f add r30, r30 + 25fe: ff 1f adc r31, r31 + 2600: ee 0f add r30, r30 + 2602: ff 1f adc r31, r31 + 2604: ee 0f add r30, r30 + 2606: ff 1f adc r31, r31 + 2608: e0 5f subi r30, 0xF0 ; 240 + 260a: fd 4d sbci r31, 0xDD ; 221 + 260c: 01 e0 ldi r16, 0x01 ; 1 + 260e: 06 93 lac Z, r16 + 2610: 71 df rcall .-286 ; 0x24f4 + 2612: 81 e0 ldi r24, 0x01 ; 1 + 2614: 0f 91 pop r16 + 2616: 08 95 ret + +00002618 <__vector_125>: * USB bus event interrupt includes : * - USB line events SOF, reset, suspend, resume, wakeup * - endpoint control errors underflow, overflow, stall */ ISR(USB_BUSEVENT_vect) { - 25fa: 1f 92 push r1 - 25fc: 0f 92 push r0 - 25fe: 0f b6 in r0, 0x3f ; 63 - 2600: 0f 92 push r0 - 2602: 11 24 eor r1, r1 - 2604: 0f 93 push r16 - 2606: 2f 93 push r18 - 2608: 3f 93 push r19 - 260a: 4f 93 push r20 - 260c: 5f 93 push r21 - 260e: 6f 93 push r22 - 2610: 7f 93 push r23 - 2612: 8f 93 push r24 - 2614: 9f 93 push r25 - 2616: af 93 push r26 - 2618: bf 93 push r27 - 261a: ef 93 push r30 - 261c: ff 93 push r31 + 2618: 1f 92 push r1 + 261a: 0f 92 push r0 + 261c: 0f b6 in r0, 0x3f ; 63 + 261e: 0f 92 push r0 + 2620: 11 24 eor r1, r1 + 2622: 0f 93 push r16 + 2624: 2f 93 push r18 + 2626: 3f 93 push r19 + 2628: 4f 93 push r20 + 262a: 5f 93 push r21 + 262c: 6f 93 push r22 + 262e: 7f 93 push r23 + 2630: 8f 93 push r24 + 2632: 9f 93 push r25 + 2634: af 93 push r26 + 2636: bf 93 push r27 + 2638: ef 93 push r30 + 263a: ff 93 push r31 if (udd_is_start_of_frame_event()) { - 261e: 80 91 cb 04 lds r24, 0x04CB ; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb> - 2622: 88 23 and r24, r24 - 2624: 44 f4 brge .+16 ; 0x2636 <__vector_125+0x3c> + 263c: 80 91 cb 04 lds r24, 0x04CB ; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb> + 2640: 88 23 and r24, r24 + 2642: 44 f4 brge .+16 ; 0x2654 <__vector_125+0x3c> udd_ack_start_of_frame_event(); - 2626: 80 e8 ldi r24, 0x80 ; 128 - 2628: 80 93 ca 04 sts 0x04CA, r24 ; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca> + 2644: 80 e8 ldi r24, 0x80 ; 128 + 2646: 80 93 ca 04 sts 0x04CA, r24 ; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca> udc_sof_notify(); - 262c: 0e 94 87 09 call 0x130e ; 0x130e + 264a: 0e 94 96 09 call 0x132c ; 0x132c #ifdef UDC_SOF_EVENT UDC_SOF_EVENT(); - 2630: 0e 94 87 01 call 0x30e ; 0x30e + 264e: 0e 94 95 01 call 0x32a ; 0x32a #endif goto udd_interrupt_bus_event_end; - 2634: 8a c0 rjmp .+276 ; 0x274a <__vector_125+0x150> + 2652: 8a c0 rjmp .+276 ; 0x2768 <__vector_125+0x150> } static bool udd_ctrl_interrupt_error(void) { // Underflow only managed for control endpoint if (udd_is_underflow_event()) { - 2636: 80 91 cb 04 lds r24, 0x04CB ; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb> - 263a: 82 ff sbrs r24, 2 - 263c: 20 c0 rjmp .+64 ; 0x267e <__vector_125+0x84> + 2654: 80 91 cb 04 lds r24, 0x04CB ; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb> + 2658: 82 ff sbrs r24, 2 + 265a: 20 c0 rjmp .+64 ; 0x269c <__vector_125+0x84> udd_ack_underflow_event(); - 263e: 84 e0 ldi r24, 0x04 ; 4 - 2640: 80 93 ca 04 sts 0x04CA, r24 ; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca> + 265c: 84 e0 ldi r24, 0x04 ; 4 + 265e: 80 93 ca 04 sts 0x04CA, r24 ; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca> if (udd_control_in_underflow()) { - 2644: 80 91 18 22 lds r24, 0x2218 ; 0x802218 - 2648: 86 ff sbrs r24, 6 - 264a: 7f c0 rjmp .+254 ; 0x274a <__vector_125+0x150> + 2662: 80 91 18 22 lds r24, 0x2218 ; 0x802218 + 2666: 86 ff sbrs r24, 6 + 2668: 7f c0 rjmp .+254 ; 0x2768 <__vector_125+0x150> udd_control_out_clear_NACK0(); } static void udd_ctrl_underflow(void) { if (udd_is_tc_event() || udd_ctrl_interrupt_tc_setup()) { - 264c: 80 91 cc 04 lds r24, 0x04CC ; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc> - 2650: 81 fd sbrc r24, 1 - 2652: 7b c0 rjmp .+246 ; 0x274a <__vector_125+0x150> - 2654: 43 db rcall .-2426 ; 0x1cdc - 2656: 81 11 cpse r24, r1 - 2658: 78 c0 rjmp .+240 ; 0x274a <__vector_125+0x150> + 266a: 80 91 cc 04 lds r24, 0x04CC ; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc> + 266e: 81 fd sbrc r24, 1 + 2670: 7b c0 rjmp .+246 ; 0x2768 <__vector_125+0x150> + 2672: 43 db rcall .-2426 ; 0x1cfa + 2674: 81 11 cpse r24, r1 + 2676: 78 c0 rjmp .+240 ; 0x2768 <__vector_125+0x150> return; // underflow ignored if a transfer complete has been no processed } if (UDD_EPCTRL_DATA_OUT == udd_ep_control_state) { - 265a: 80 91 ff 21 lds r24, 0x21FF ; 0x8021ff - 265e: 81 30 cpi r24, 0x01 ; 1 - 2660: 11 f4 brne .+4 ; 0x2666 <__vector_125+0x6c> + 2678: 80 91 ff 21 lds r24, 0x21FF ; 0x8021ff + 267c: 81 30 cpi r24, 0x01 ; 1 + 267e: 11 f4 brne .+4 ; 0x2684 <__vector_125+0x6c> // Host want to stop OUT transaction // then stop to wait OUT data phase and wait IN ZLP handshake udd_ctrl_send_zlp_in(); - 2662: 79 da rcall .-2830 ; 0x1b56 - 2664: 72 c0 rjmp .+228 ; 0x274a <__vector_125+0x150> + 2680: 79 da rcall .-2830 ; 0x1b74 + 2682: 72 c0 rjmp .+228 ; 0x2768 <__vector_125+0x150> } else if (UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP == udd_ep_control_state) { - 2666: 84 30 cpi r24, 0x04 ; 4 - 2668: 09 f0 breq .+2 ; 0x266c <__vector_125+0x72> - 266a: 6f c0 rjmp .+222 ; 0x274a <__vector_125+0x150> + 2684: 84 30 cpi r24, 0x04 ; 4 + 2686: 09 f0 breq .+2 ; 0x268a <__vector_125+0x72> + 2688: 6f c0 rjmp .+222 ; 0x2768 <__vector_125+0x150> // A OUT handshake is waiting by device, // but host want extra IN data then stall extra IN data and following status stage udd_control_in_enable_stall(); - 266c: e9 e1 ldi r30, 0x19 ; 25 - 266e: f2 e2 ldi r31, 0x22 ; 34 - 2670: 04 e0 ldi r16, 0x04 ; 4 - 2672: 05 93 las Z, r16 + 268a: e9 e1 ldi r30, 0x19 ; 25 + 268c: f2 e2 ldi r31, 0x22 ; 34 + 268e: 04 e0 ldi r16, 0x04 ; 4 + 2690: 05 93 las Z, r16 udd_control_out_enable_stall(); - 2674: e1 e1 ldi r30, 0x11 ; 17 - 2676: f2 e2 ldi r31, 0x22 ; 34 - 2678: 04 e0 ldi r16, 0x04 ; 4 - 267a: 05 93 las Z, r16 - 267c: 66 c0 rjmp .+204 ; 0x274a <__vector_125+0x150> + 2692: e1 e1 ldi r30, 0x11 ; 17 + 2694: f2 e2 ldi r31, 0x22 ; 34 + 2696: 04 e0 ldi r16, 0x04 ; 4 + 2698: 05 93 las Z, r16 + 269a: 66 c0 rjmp .+204 ; 0x2768 <__vector_125+0x150> udd_ctrl_underflow(); } return true; } // Overflow only managed for control endpoint if (udd_is_overflow_event()) { - 267e: 80 91 cb 04 lds r24, 0x04CB ; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb> - 2682: 81 ff sbrs r24, 1 - 2684: 5d c0 rjmp .+186 ; 0x2740 <__vector_125+0x146> + 269c: 80 91 cb 04 lds r24, 0x04CB ; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb> + 26a0: 81 ff sbrs r24, 1 + 26a2: 5d c0 rjmp .+186 ; 0x275e <__vector_125+0x146> udd_ack_overflow_event(); - 2686: 82 e0 ldi r24, 0x02 ; 2 - 2688: 80 93 ca 04 sts 0x04CA, r24 ; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca> + 26a4: 82 e0 ldi r24, 0x02 ; 2 + 26a6: 80 93 ca 04 sts 0x04CA, r24 ; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca> if (udd_control_out_overflow()) { - 268c: 80 91 10 22 lds r24, 0x2210 ; 0x802210 - 2690: 86 ff sbrs r24, 6 - 2692: 5b c0 rjmp .+182 ; 0x274a <__vector_125+0x150> + 26aa: 80 91 10 22 lds r24, 0x2210 ; 0x802210 + 26ae: 86 ff sbrs r24, 6 + 26b0: 5b c0 rjmp .+182 ; 0x2768 <__vector_125+0x150> } } static void udd_ctrl_overflow(void) { if (udd_is_tc_event() || udd_ctrl_interrupt_tc_setup()) { - 2694: 80 91 cc 04 lds r24, 0x04CC ; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc> - 2698: 81 fd sbrc r24, 1 - 269a: 57 c0 rjmp .+174 ; 0x274a <__vector_125+0x150> - 269c: 1f db rcall .-2498 ; 0x1cdc - 269e: 81 11 cpse r24, r1 - 26a0: 54 c0 rjmp .+168 ; 0x274a <__vector_125+0x150> + 26b2: 80 91 cc 04 lds r24, 0x04CC ; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc> + 26b6: 81 fd sbrc r24, 1 + 26b8: 57 c0 rjmp .+174 ; 0x2768 <__vector_125+0x150> + 26ba: 1f db rcall .-2498 ; 0x1cfa + 26bc: 81 11 cpse r24, r1 + 26be: 54 c0 rjmp .+168 ; 0x2768 <__vector_125+0x150> return; // overflow ignored if a transfer complete has been no processed } if (UDD_EPCTRL_DATA_IN == udd_ep_control_state) { - 26a2: 80 91 ff 21 lds r24, 0x21FF ; 0x8021ff - 26a6: 82 30 cpi r24, 0x02 ; 2 - 26a8: 41 f4 brne .+16 ; 0x26ba <__vector_125+0xc0> + 26c0: 80 91 ff 21 lds r24, 0x21FF ; 0x8021ff + 26c4: 82 30 cpi r24, 0x02 ; 2 + 26c6: 41 f4 brne .+16 ; 0x26d8 <__vector_125+0xc0> udd_control_in_clear_NACK0(); } static void udd_ctrl_send_zlp_out(void) { udd_ep_control_state = UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP; - 26aa: 84 e0 ldi r24, 0x04 ; 4 - 26ac: 80 93 ff 21 sts 0x21FF, r24 ; 0x8021ff + 26c8: 84 e0 ldi r24, 0x04 ; 4 + 26ca: 80 93 ff 21 sts 0x21FF, r24 ; 0x8021ff // Valid reception of OUT packet on control endpoint udd_control_out_clear_NACK0(); - 26b0: e0 e1 ldi r30, 0x10 ; 16 - 26b2: f2 e2 ldi r31, 0x22 ; 34 - 26b4: 02 e0 ldi r16, 0x02 ; 2 - 26b6: 06 93 lac Z, r16 - 26b8: 48 c0 rjmp .+144 ; 0x274a <__vector_125+0x150> + 26ce: e0 e1 ldi r30, 0x10 ; 16 + 26d0: f2 e2 ldi r31, 0x22 ; 34 + 26d2: 02 e0 ldi r16, 0x02 ; 2 + 26d4: 06 93 lac Z, r16 + 26d6: 48 c0 rjmp .+144 ; 0x2768 <__vector_125+0x150> } if (UDD_EPCTRL_DATA_IN == udd_ep_control_state) { // Host want to stop IN transaction // then stop to wait IN data phase and wait OUT ZLP handshake udd_ctrl_send_zlp_out(); } else if (UDD_EPCTRL_HANDSHAKE_WAIT_IN_ZLP == udd_ep_control_state) { - 26ba: 83 30 cpi r24, 0x03 ; 3 - 26bc: 09 f0 breq .+2 ; 0x26c0 <__vector_125+0xc6> - 26be: 45 c0 rjmp .+138 ; 0x274a <__vector_125+0x150> + 26d8: 83 30 cpi r24, 0x03 ; 3 + 26da: 09 f0 breq .+2 ; 0x26de <__vector_125+0xc6> + 26dc: 45 c0 rjmp .+138 ; 0x2768 <__vector_125+0x150> // A IN handshake is waiting by device, // but host want extra OUT data then stall extra OUT data and following status stage udd_control_in_enable_stall(); - 26c0: e9 e1 ldi r30, 0x19 ; 25 - 26c2: f2 e2 ldi r31, 0x22 ; 34 - 26c4: 04 e0 ldi r16, 0x04 ; 4 - 26c6: 05 93 las Z, r16 + 26de: e9 e1 ldi r30, 0x19 ; 25 + 26e0: f2 e2 ldi r31, 0x22 ; 34 + 26e2: 04 e0 ldi r16, 0x04 ; 4 + 26e4: 05 93 las Z, r16 udd_control_out_enable_stall(); - 26c8: e1 e1 ldi r30, 0x11 ; 17 - 26ca: f2 e2 ldi r31, 0x22 ; 34 - 26cc: 04 e0 ldi r16, 0x04 ; 4 - 26ce: 05 93 las Z, r16 - 26d0: 3c c0 rjmp .+120 ; 0x274a <__vector_125+0x150> + 26e6: e1 e1 ldi r30, 0x11 ; 17 + 26e8: f2 e2 ldi r31, 0x22 ; 34 + 26ea: 04 e0 ldi r16, 0x04 ; 4 + 26ec: 05 93 las Z, r16 + 26ee: 3c c0 rjmp .+120 ; 0x2768 <__vector_125+0x150> if (udd_ctrl_interrupt_error()) { goto udd_interrupt_bus_event_end; } if (udd_is_reset_event()) { udd_ack_reset_event(); - 26d2: 80 e1 ldi r24, 0x10 ; 16 - 26d4: 80 93 ca 04 sts 0x04CA, r24 ; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca> + 26f0: 80 e1 ldi r24, 0x10 ; 16 + 26f2: 80 93 ca 04 sts 0x04CA, r24 ; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca> #if (0!=USB_DEVICE_MAX_EP) // Abort all endpoint jobs on going uint8_t i; for (i = 1; i < USB_DEVICE_MAX_EP; i++) { udd_ep_abort(i); - 26d8: 81 e0 ldi r24, 0x01 ; 1 - 26da: fd de rcall .-518 ; 0x24d6 + 26f6: 81 e0 ldi r24, 0x01 ; 1 + 26f8: fd de rcall .-518 ; 0x24f4 udd_ep_abort(i | USB_EP_DIR_IN); - 26dc: 81 e8 ldi r24, 0x81 ; 129 - 26de: fb de rcall .-522 ; 0x24d6 + 26fa: 81 e8 ldi r24, 0x81 ; 129 + 26fc: fb de rcall .-522 ; 0x24f4 udd_ack_reset_event(); #if (0!=USB_DEVICE_MAX_EP) // Abort all endpoint jobs on going uint8_t i; for (i = 1; i < USB_DEVICE_MAX_EP; i++) { udd_ep_abort(i); - 26e0: 82 e0 ldi r24, 0x02 ; 2 - 26e2: f9 de rcall .-526 ; 0x24d6 + 26fe: 82 e0 ldi r24, 0x02 ; 2 + 2700: f9 de rcall .-526 ; 0x24f4 udd_ep_abort(i | USB_EP_DIR_IN); - 26e4: 82 e8 ldi r24, 0x82 ; 130 - 26e6: f7 de rcall .-530 ; 0x24d6 + 2702: 82 e8 ldi r24, 0x82 ; 130 + 2704: f7 de rcall .-530 ; 0x24f4 } #endif udc_reset(); - 26e8: 0e 94 62 09 call 0x12c4 ; 0x12c4 + 2706: 0e 94 71 09 call 0x12e2 ; 0x12e2 // Reset USB address to 0 udd_set_device_address(0); - 26ec: 10 92 c3 04 sts 0x04C3, r1 ; 0x8004c3 <__TEXT_REGION_LENGTH__+0x7004c3> + 270a: 10 92 c3 04 sts 0x04C3, r1 ; 0x8004c3 <__TEXT_REGION_LENGTH__+0x7004c3> #endif } // Enable endpoint ep_ctrl = udd_ep_get_ctrl(ep); udd_endpoint_disable(ep_ctrl); - 26f0: e0 e0 ldi r30, 0x00 ; 0 - 26f2: f2 e2 ldi r31, 0x22 ; 34 - 26f4: 11 8a std Z+17, r1 ; 0x11 + 270e: e0 e0 ldi r30, 0x00 ; 0 + 2710: f2 e2 ldi r31, 0x22 ; 34 + 2712: 11 8a std Z+17, r1 ; 0x11 udd_endpoint_clear_status(ep_ctrl); - 26f6: 96 e0 ldi r25, 0x06 ; 6 - 26f8: 90 8b std Z+16, r25 ; 0x10 + 2714: 96 e0 ldi r25, 0x06 ; 6 + 2716: 90 8b std Z+16, r25 ; 0x10 udd_endpoint_set_control(ep_ctrl, (uint8_t) type | (uint8_t) size); - 26fa: 83 e4 ldi r24, 0x43 ; 67 - 26fc: 81 8b std Z+17, r24 ; 0x11 + 2718: 83 e4 ldi r24, 0x43 ; 67 + 271a: 81 8b std Z+17, r24 ; 0x11 #endif } // Enable endpoint ep_ctrl = udd_ep_get_ctrl(ep); udd_endpoint_disable(ep_ctrl); - 26fe: 11 8e std Z+25, r1 ; 0x19 + 271c: 11 8e std Z+25, r1 ; 0x19 udd_endpoint_clear_status(ep_ctrl); - 2700: 90 8f std Z+24, r25 ; 0x18 + 271e: 90 8f std Z+24, r25 ; 0x18 udd_endpoint_set_control(ep_ctrl, (uint8_t) type | (uint8_t) size); - 2702: 81 8f std Z+25, r24 ; 0x19 + 2720: 81 8f std Z+25, r24 ; 0x19 udd_set_device_address(0); // Alloc and configure control endpoint udd_ep_init(0, USB_EP_TYPE_CONTROL, USB_DEVICE_EP_CTRL_SIZE); udd_ep_init(0 | USB_EP_DIR_IN, USB_EP_TYPE_CONTROL, USB_DEVICE_EP_CTRL_SIZE); udd_control_out_set_buf(&udd_ctrl_buffer); - 2704: 8b eb ldi r24, 0xBB ; 187 - 2706: 91 e2 ldi r25, 0x21 ; 33 - 2708: 84 8b std Z+20, r24 ; 0x14 - 270a: 95 8b std Z+21, r25 ; 0x15 + 2722: 8b eb ldi r24, 0xBB ; 187 + 2724: 91 e2 ldi r25, 0x21 ; 33 + 2726: 84 8b std Z+20, r24 ; 0x14 + 2728: 95 8b std Z+21, r25 ; 0x15 // Reset endpoint control management udd_ctrl_init(); - 270c: ef d9 rcall .-3106 ; 0x1aec + 272a: ef d9 rcall .-3106 ; 0x1b0a goto udd_interrupt_bus_event_end; - 270e: 1d c0 rjmp .+58 ; 0x274a <__vector_125+0x150> + 272c: 1d c0 rjmp .+58 ; 0x2768 <__vector_125+0x150> } if (udd_is_suspend_event()) { - 2710: 80 91 cb 04 lds r24, 0x04CB ; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb> - 2714: 86 ff sbrs r24, 6 - 2716: 08 c0 rjmp .+16 ; 0x2728 <__vector_125+0x12e> + 272e: 80 91 cb 04 lds r24, 0x04CB ; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb> + 2732: 86 ff sbrs r24, 6 + 2734: 08 c0 rjmp .+16 ; 0x2746 <__vector_125+0x12e> udd_ack_suspend_event(); - 2718: 80 e4 ldi r24, 0x40 ; 64 - 271a: 80 93 ca 04 sts 0x04CA, r24 ; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca> + 2736: 80 e4 ldi r24, 0x40 ; 64 + 2738: 80 93 ca 04 sts 0x04CA, r24 ; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca> udd_sleep_mode(false); // Enter in SUSPEND mode - 271e: 80 e0 ldi r24, 0x00 ; 0 - 2720: bc d9 rcall .-3208 ; 0x1a9a + 273c: 80 e0 ldi r24, 0x00 ; 0 + 273e: bc d9 rcall .-3208 ; 0x1ab8 #ifdef UDC_SUSPEND_EVENT UDC_SUSPEND_EVENT(); - 2722: 0e 94 85 01 call 0x30a ; 0x30a + 2740: 0e 94 93 01 call 0x326 ; 0x326 #endif goto udd_interrupt_bus_event_end; - 2726: 11 c0 rjmp .+34 ; 0x274a <__vector_125+0x150> + 2744: 11 c0 rjmp .+34 ; 0x2768 <__vector_125+0x150> } if (udd_is_resume_event()) { - 2728: 80 91 cb 04 lds r24, 0x04CB ; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb> - 272c: 85 ff sbrs r24, 5 - 272e: 0d c0 rjmp .+26 ; 0x274a <__vector_125+0x150> + 2746: 80 91 cb 04 lds r24, 0x04CB ; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb> + 274a: 85 ff sbrs r24, 5 + 274c: 0d c0 rjmp .+26 ; 0x2768 <__vector_125+0x150> udd_ack_resume_event(); - 2730: 80 e2 ldi r24, 0x20 ; 32 - 2732: 80 93 ca 04 sts 0x04CA, r24 ; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca> + 274e: 80 e2 ldi r24, 0x20 ; 32 + 2750: 80 93 ca 04 sts 0x04CA, r24 ; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca> udd_sleep_mode(true); // Enter in power reduction mode - 2736: 81 e0 ldi r24, 0x01 ; 1 - 2738: b0 d9 rcall .-3232 ; 0x1a9a + 2754: 81 e0 ldi r24, 0x01 ; 1 + 2756: b0 d9 rcall .-3232 ; 0x1ab8 #ifdef UDC_RESUME_EVENT UDC_RESUME_EVENT(); - 273a: 0e 94 86 01 call 0x30c ; 0x30c + 2758: 0e 94 94 01 call 0x328 ; 0x328 #endif goto udd_interrupt_bus_event_end; - 273e: 05 c0 rjmp .+10 ; 0x274a <__vector_125+0x150> + 275c: 05 c0 rjmp .+10 ; 0x2768 <__vector_125+0x150> } if (udd_ctrl_interrupt_error()) { goto udd_interrupt_bus_event_end; } if (udd_is_reset_event()) { - 2740: 80 91 cb 04 lds r24, 0x04CB ; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb> - 2744: 84 fd sbrc r24, 4 - 2746: c5 cf rjmp .-118 ; 0x26d2 <__vector_125+0xd8> - 2748: e3 cf rjmp .-58 ; 0x2710 <__vector_125+0x116> + 275e: 80 91 cb 04 lds r24, 0x04CB ; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb> + 2762: 84 fd sbrc r24, 4 + 2764: c5 cf rjmp .-118 ; 0x26f0 <__vector_125+0xd8> + 2766: e3 cf rjmp .-58 ; 0x272e <__vector_125+0x116> goto udd_interrupt_bus_event_end; } udd_interrupt_bus_event_end: return; } - 274a: ff 91 pop r31 - 274c: ef 91 pop r30 - 274e: bf 91 pop r27 - 2750: af 91 pop r26 - 2752: 9f 91 pop r25 - 2754: 8f 91 pop r24 - 2756: 7f 91 pop r23 - 2758: 6f 91 pop r22 - 275a: 5f 91 pop r21 - 275c: 4f 91 pop r20 - 275e: 3f 91 pop r19 - 2760: 2f 91 pop r18 - 2762: 0f 91 pop r16 - 2764: 0f 90 pop r0 - 2766: 0f be out 0x3f, r0 ; 63 - 2768: 0f 90 pop r0 - 276a: 1f 90 pop r1 - 276c: 18 95 reti + 2768: ff 91 pop r31 + 276a: ef 91 pop r30 + 276c: bf 91 pop r27 + 276e: af 91 pop r26 + 2770: 9f 91 pop r25 + 2772: 8f 91 pop r24 + 2774: 7f 91 pop r23 + 2776: 6f 91 pop r22 + 2778: 5f 91 pop r21 + 277a: 4f 91 pop r20 + 277c: 3f 91 pop r19 + 277e: 2f 91 pop r18 + 2780: 0f 91 pop r16 + 2782: 0f 90 pop r0 + 2784: 0f be out 0x3f, r0 ; 63 + 2786: 0f 90 pop r0 + 2788: 1f 90 pop r1 + 278a: 18 95 reti -0000276e <__vector_126>: +0000278c <__vector_126>: * \brief Function called by USB transfer complete interrupt * * USB transfer complete interrupt includes events about endpoint transfer on all endpoints. */ ISR(USB_TRNCOMPL_vect) { - 276e: 1f 92 push r1 - 2770: 0f 92 push r0 - 2772: 0f b6 in r0, 0x3f ; 63 - 2774: 0f 92 push r0 - 2776: 11 24 eor r1, r1 - 2778: 0f 93 push r16 - 277a: 1f 93 push r17 - 277c: 2f 93 push r18 - 277e: 3f 93 push r19 - 2780: 4f 93 push r20 - 2782: 5f 93 push r21 - 2784: 6f 93 push r22 - 2786: 7f 93 push r23 - 2788: 8f 93 push r24 - 278a: 9f 93 push r25 - 278c: af 93 push r26 - 278e: bf 93 push r27 - 2790: cf 93 push r28 - 2792: df 93 push r29 - 2794: ef 93 push r30 - 2796: ff 93 push r31 + 278c: 1f 92 push r1 + 278e: 0f 92 push r0 + 2790: 0f b6 in r0, 0x3f ; 63 + 2792: 0f 92 push r0 + 2794: 11 24 eor r1, r1 + 2796: 0f 93 push r16 + 2798: 1f 93 push r17 + 279a: 2f 93 push r18 + 279c: 3f 93 push r19 + 279e: 4f 93 push r20 + 27a0: 5f 93 push r21 + 27a2: 6f 93 push r22 + 27a4: 7f 93 push r23 + 27a6: 8f 93 push r24 + 27a8: 9f 93 push r25 + 27aa: af 93 push r26 + 27ac: bf 93 push r27 + 27ae: cf 93 push r28 + 27b0: df 93 push r29 + 27b2: ef 93 push r30 + 27b4: ff 93 push r31 int8_t rp; UDD_EP_t *ep_ctrl; udd_ep_id_t ep; #endif if (!udd_is_tc_event()) { - 2798: 80 91 cc 04 lds r24, 0x04CC ; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc> - 279c: 81 fd sbrc r24, 1 - 279e: 03 c0 rjmp .+6 ; 0x27a6 <__vector_126+0x38> + 27b6: 80 91 cc 04 lds r24, 0x04CC ; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc> + 27ba: 81 fd sbrc r24, 1 + 27bc: 03 c0 rjmp .+6 ; 0x27c4 <__vector_126+0x38> // If no other transfer complete // then check reception of SETUP packet on control endpoint if (udd_ctrl_interrupt_tc_setup()) { - 27a0: 9d da rcall .-2758 ; 0x1cdc - 27a2: 81 11 cpse r24, r1 - 27a4: b9 c0 rjmp .+370 ; 0x2918 <__vector_126+0x1aa> + 27be: 9d da rcall .-2758 ; 0x1cfa + 27c0: 81 11 cpse r24, r1 + 27c2: b9 c0 rjmp .+370 ; 0x2936 <__vector_126+0x1aa> goto udd_interrupt_tc_end; } Assert(false); } // Check IN/OUT transfer complete on all endpoints udd_ack_tc_event(); - 27a6: 82 e0 ldi r24, 0x02 ; 2 - 27a8: 80 93 cc 04 sts 0x04CC, r24 ; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc> + 27c4: 82 e0 ldi r24, 0x02 ; 2 + 27c6: 80 93 cc 04 sts 0x04CC, r24 ; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc> #if (0!=USB_DEVICE_MAX_EP) //** Decode TC FIFO // Compute ep addr rp = udd_get_fifo_rp(); - 27ac: 80 91 c5 04 lds r24, 0x04C5 ; 0x8004c5 <__TEXT_REGION_LENGTH__+0x7004c5> + 27ca: 80 91 c5 04 lds r24, 0x04C5 ; 0x8004c5 <__TEXT_REGION_LENGTH__+0x7004c5> i_fifo = 2 * (1 + ~rp); - 27b0: 81 95 neg r24 - 27b2: 88 0f add r24, r24 + 27ce: 81 95 neg r24 + 27d0: 88 0f add r24, r24 ad = ((uint16_t) udd_sram.ep_ctrl) - i_fifo; - 27b4: e0 e1 ldi r30, 0x10 ; 16 - 27b6: f2 e2 ldi r31, 0x22 ; 34 - 27b8: e8 1b sub r30, r24 - 27ba: f1 09 sbc r31, r1 + 27d2: e0 e1 ldi r30, 0x10 ; 16 + 27d4: f2 e2 ldi r31, 0x22 ; 34 + 27d6: e8 1b sub r30, r24 + 27d8: f1 09 sbc r31, r1 p_ad = (uint16_t *) ad; // Compute ep ep_index = (((uint16_t) * p_ad - ((uint16_t) udd_sram.ep_ctrl)) >> 3); - 27bc: 20 81 ld r18, Z - 27be: 31 81 ldd r19, Z+1 ; 0x01 - 27c0: 20 51 subi r18, 0x10 ; 16 - 27c2: 32 42 sbci r19, 0x22 ; 34 - 27c4: 36 95 lsr r19 - 27c6: 27 95 ror r18 - 27c8: 36 95 lsr r19 - 27ca: 27 95 ror r18 - 27cc: 36 95 lsr r19 - 27ce: 27 95 ror r18 + 27da: 20 81 ld r18, Z + 27dc: 31 81 ldd r19, Z+1 ; 0x01 + 27de: 20 51 subi r18, 0x10 ; 16 + 27e0: 32 42 sbci r19, 0x22 ; 34 + 27e2: 36 95 lsr r19 + 27e4: 27 95 ror r18 + 27e6: 36 95 lsr r19 + 27e8: 27 95 ror r18 + 27ea: 36 95 lsr r19 + 27ec: 27 95 ror r18 ep = (ep_index / 2) + ((ep_index & 1) ? USB_EP_DIR_IN : 0); - 27d0: 82 2f mov r24, r18 - 27d2: 86 95 lsr r24 - 27d4: 20 fd sbrc r18, 0 - 27d6: 02 c0 rjmp .+4 ; 0x27dc <__vector_126+0x6e> - 27d8: 90 e0 ldi r25, 0x00 ; 0 - 27da: 01 c0 rjmp .+2 ; 0x27de <__vector_126+0x70> - 27dc: 90 e8 ldi r25, 0x80 ; 128 - 27de: 89 0f add r24, r25 + 27ee: 82 2f mov r24, r18 + 27f0: 86 95 lsr r24 + 27f2: 20 fd sbrc r18, 0 + 27f4: 02 c0 rjmp .+4 ; 0x27fa <__vector_126+0x6e> + 27f6: 90 e0 ldi r25, 0x00 ; 0 + 27f8: 01 c0 rjmp .+2 ; 0x27fc <__vector_126+0x70> + 27fa: 90 e8 ldi r25, 0x80 ; 128 + 27fc: 89 0f add r24, r25 udd_endpoint_set_control(ep_ctrl, (uint8_t) type | (uint8_t) size); } static UDD_EP_t *udd_ep_get_ctrl(udd_ep_id_t ep) { return &udd_sram.ep_ctrl[(2 * (ep & USB_EP_ADDR_MASK) + - 27e0: e8 2f mov r30, r24 - 27e2: ef 70 andi r30, 0x0F ; 15 - 27e4: f0 e0 ldi r31, 0x00 ; 0 - 27e6: ee 0f add r30, r30 - 27e8: ff 1f adc r31, r31 + 27fe: e8 2f mov r30, r24 + 2800: ef 70 andi r30, 0x0F ; 15 + 2802: f0 e0 ldi r31, 0x00 ; 0 + 2804: ee 0f add r30, r30 + 2806: ff 1f adc r31, r31 ((ep & USB_EP_DIR_IN) ? 1 : 0))]; - 27ea: 28 2f mov r18, r24 - 27ec: 08 2e mov r0, r24 - 27ee: 00 0c add r0, r0 - 27f0: 33 0b sbc r19, r19 - 27f2: 22 27 eor r18, r18 - 27f4: 33 0f add r19, r19 - 27f6: 22 1f adc r18, r18 - 27f8: 33 27 eor r19, r19 + 2808: 28 2f mov r18, r24 + 280a: 08 2e mov r0, r24 + 280c: 00 0c add r0, r0 + 280e: 33 0b sbc r19, r19 + 2810: 22 27 eor r18, r18 + 2812: 33 0f add r19, r19 + 2814: 22 1f adc r18, r18 + 2816: 33 27 eor r19, r19 udd_endpoint_set_control(ep_ctrl, (uint8_t) type | (uint8_t) size); } static UDD_EP_t *udd_ep_get_ctrl(udd_ep_id_t ep) { return &udd_sram.ep_ctrl[(2 * (ep & USB_EP_ADDR_MASK) + - 27fa: e2 0f add r30, r18 - 27fc: f3 1f adc r31, r19 + 2818: e2 0f add r30, r18 + 281a: f3 1f adc r31, r19 ep = (ep_index / 2) + ((ep_index & 1) ? USB_EP_DIR_IN : 0); Assert(USB_DEVICE_MAX_EP >= (ep & USB_EP_ADDR_MASK)); // Ack IT TC of endpoint ep_ctrl = udd_ep_get_ctrl(ep); if (!udd_endpoint_transfer_complete(ep_ctrl)) { - 27fe: df 01 movw r26, r30 - 2800: aa 0f add r26, r26 - 2802: bb 1f adc r27, r27 - 2804: aa 0f add r26, r26 - 2806: bb 1f adc r27, r27 - 2808: aa 0f add r26, r26 - 280a: bb 1f adc r27, r27 - 280c: a0 5f subi r26, 0xF0 ; 240 - 280e: bd 4d sbci r27, 0xDD ; 221 - 2810: 9c 91 ld r25, X - 2812: 95 ff sbrs r25, 5 - 2814: 81 c0 rjmp .+258 ; 0x2918 <__vector_126+0x1aa> + 281c: df 01 movw r26, r30 + 281e: aa 0f add r26, r26 + 2820: bb 1f adc r27, r27 + 2822: aa 0f add r26, r26 + 2824: bb 1f adc r27, r27 + 2826: aa 0f add r26, r26 + 2828: bb 1f adc r27, r27 + 282a: a0 5f subi r26, 0xF0 ; 240 + 282c: bd 4d sbci r27, 0xDD ; 221 + 282e: 9c 91 ld r25, X + 2830: 95 ff sbrs r25, 5 + 2832: 81 c0 rjmp .+258 ; 0x2936 <__vector_126+0x1aa> return; // Error, TC is generated by Multipacket transfer } udd_endpoint_ack_transfer_complete(ep_ctrl); - 2816: fd 01 movw r30, r26 - 2818: 00 e2 ldi r16, 0x20 ; 32 - 281a: 06 93 lac Z, r16 + 2834: fd 01 movw r30, r26 + 2836: 00 e2 ldi r16, 0x20 ; 32 + 2838: 06 93 lac Z, r16 // Check status on control endpoint if (ep == 0) { - 281c: 81 11 cpse r24, r1 - 281e: 77 c0 rjmp .+238 ; 0x290e <__vector_126+0x1a0> + 283a: 81 11 cpse r24, r1 + 283c: 77 c0 rjmp .+238 ; 0x292c <__vector_126+0x1a0> static void udd_ctrl_out_received(void) { uint16_t nb_data; if (UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP == udd_ep_control_state) { - 2820: 80 91 ff 21 lds r24, 0x21FF ; 0x8021ff - 2824: 84 30 cpi r24, 0x04 ; 4 - 2826: 19 f4 brne .+6 ; 0x282e <__vector_126+0xc0> + 283e: 80 91 ff 21 lds r24, 0x21FF ; 0x8021ff + 2842: 84 30 cpi r24, 0x04 ; 4 + 2844: 19 f4 brne .+6 ; 0x284c <__vector_126+0xc0> // Valid end of setup request udd_ctrl_endofrequest(); - 2828: a4 d9 rcall .-3256 ; 0x1b72 + 2846: a4 d9 rcall .-3256 ; 0x1b90 // Reinitializes control endpoint management udd_ctrl_init(); - 282a: 60 d9 rcall .-3392 ; 0x1aec - 282c: 75 c0 rjmp .+234 ; 0x2918 <__vector_126+0x1aa> + 2848: 60 d9 rcall .-3392 ; 0x1b0a + 284a: 75 c0 rjmp .+234 ; 0x2936 <__vector_126+0x1aa> return; } Assert(udd_ep_control_state == UDD_EPCTRL_DATA_OUT); // Read data received during OUT phase nb_data = udd_control_out_get_bytecnt(); - 282e: 00 91 12 22 lds r16, 0x2212 ; 0x802212 - 2832: 10 91 13 22 lds r17, 0x2213 ; 0x802213 + 284c: 00 91 12 22 lds r16, 0x2212 ; 0x802212 + 2850: 10 91 13 22 lds r17, 0x2213 ; 0x802213 if (udd_g_ctrlreq.payload_size < (udd_ctrl_payload_nb_trans + nb_data)) { - 2836: 80 91 60 24 lds r24, 0x2460 ; 0x802460 - 283a: 90 91 61 24 lds r25, 0x2461 ; 0x802461 - 283e: c0 91 fb 21 lds r28, 0x21FB ; 0x8021fb - 2842: d0 91 fc 21 lds r29, 0x21FC ; 0x8021fc - 2846: 9e 01 movw r18, r28 - 2848: 20 0f add r18, r16 - 284a: 31 1f adc r19, r17 - 284c: 82 17 cp r24, r18 - 284e: 93 07 cpc r25, r19 - 2850: 18 f4 brcc .+6 ; 0x2858 <__vector_126+0xea> + 2854: 80 91 64 24 lds r24, 0x2464 ; 0x802464 + 2858: 90 91 65 24 lds r25, 0x2465 ; 0x802465 + 285c: c0 91 fb 21 lds r28, 0x21FB ; 0x8021fb + 2860: d0 91 fc 21 lds r29, 0x21FC ; 0x8021fc + 2864: 9e 01 movw r18, r28 + 2866: 20 0f add r18, r16 + 2868: 31 1f adc r19, r17 + 286a: 82 17 cp r24, r18 + 286c: 93 07 cpc r25, r19 + 286e: 18 f4 brcc .+6 ; 0x2876 <__vector_126+0xea> // Payload buffer too small, ignore data remaining nb_data = udd_g_ctrlreq.payload_size - udd_ctrl_payload_nb_trans; - 2852: 8c 01 movw r16, r24 - 2854: 0c 1b sub r16, r28 - 2856: 1d 0b sbc r17, r29 + 2870: 8c 01 movw r16, r24 + 2872: 0c 1b sub r16, r28 + 2874: 1d 0b sbc r17, r29 } memcpy((uint8_t *) (udd_g_ctrlreq.payload + udd_ctrl_payload_nb_trans), - 2858: 80 91 5e 24 lds r24, 0x245E ; 0x80245e - 285c: 90 91 5f 24 lds r25, 0x245F ; 0x80245f - 2860: a8 01 movw r20, r16 - 2862: 6b eb ldi r22, 0xBB ; 187 - 2864: 71 e2 ldi r23, 0x21 ; 33 - 2866: 8c 0f add r24, r28 - 2868: 9d 1f adc r25, r29 - 286a: 85 d0 rcall .+266 ; 0x2976 + 2876: 80 91 62 24 lds r24, 0x2462 ; 0x802462 + 287a: 90 91 63 24 lds r25, 0x2463 ; 0x802463 + 287e: a8 01 movw r20, r16 + 2880: 6b eb ldi r22, 0xBB ; 187 + 2882: 71 e2 ldi r23, 0x21 ; 33 + 2884: 8c 0f add r24, r28 + 2886: 9d 1f adc r25, r29 + 2888: 85 d0 rcall .+266 ; 0x2994 udd_ctrl_buffer, nb_data); udd_ctrl_payload_nb_trans += nb_data; - 286c: c0 0f add r28, r16 - 286e: d1 1f adc r29, r17 - 2870: c0 93 fb 21 sts 0x21FB, r28 ; 0x8021fb - 2874: d0 93 fc 21 sts 0x21FC, r29 ; 0x8021fc + 288a: c0 0f add r28, r16 + 288c: d1 1f adc r29, r17 + 288e: c0 93 fb 21 sts 0x21FB, r28 ; 0x8021fb + 2892: d0 93 fc 21 sts 0x21FC, r29 ; 0x8021fc if ((USB_DEVICE_EP_CTRL_SIZE != nb_data) || (udd_g_ctrlreq.req.wLength - 2878: 00 34 cpi r16, 0x40 ; 64 - 287a: 11 05 cpc r17, r1 - 287c: 69 f4 brne .+26 ; 0x2898 <__vector_126+0x12a> + 2896: 00 34 cpi r16, 0x40 ; 64 + 2898: 11 05 cpc r17, r1 + 289a: 69 f4 brne .+26 ; 0x28b6 <__vector_126+0x12a> <= (udd_ctrl_prev_payload_nb_trans + udd_ctrl_payload_nb_trans))) { - 287e: 80 91 fd 21 lds r24, 0x21FD ; 0x8021fd - 2882: 90 91 fe 21 lds r25, 0x21FE ; 0x8021fe - 2886: 8c 0f add r24, r28 - 2888: 9d 1f adc r25, r29 + 289c: 80 91 fd 21 lds r24, 0x21FD ; 0x8021fd + 28a0: 90 91 fe 21 lds r25, 0x21FE ; 0x8021fe + 28a4: 8c 0f add r24, r28 + 28a6: 9d 1f adc r25, r29 memcpy((uint8_t *) (udd_g_ctrlreq.payload + udd_ctrl_payload_nb_trans), udd_ctrl_buffer, nb_data); udd_ctrl_payload_nb_trans += nb_data; if ((USB_DEVICE_EP_CTRL_SIZE != nb_data) || (udd_g_ctrlreq.req.wLength - 288a: 20 91 5c 24 lds r18, 0x245C ; 0x80245c - 288e: 30 91 5d 24 lds r19, 0x245D ; 0x80245d - 2892: 82 17 cp r24, r18 - 2894: 93 07 cpc r25, r19 - 2896: 80 f0 brcs .+32 ; 0x28b8 <__vector_126+0x14a> + 28a8: 20 91 60 24 lds r18, 0x2460 ; 0x802460 + 28ac: 30 91 61 24 lds r19, 0x2461 ; 0x802461 + 28b0: 82 17 cp r24, r18 + 28b2: 93 07 cpc r25, r19 + 28b4: 80 f0 brcs .+32 ; 0x28d6 <__vector_126+0x14a> // End of reception because it is a short packet // or all data are transfered // Before send ZLP, call intermediate callback // in case of data receive generate a stall udd_g_ctrlreq.payload_size = udd_ctrl_payload_nb_trans; - 2898: e6 e5 ldi r30, 0x56 ; 86 - 289a: f4 e2 ldi r31, 0x24 ; 36 - 289c: c2 87 std Z+10, r28 ; 0x0a - 289e: d3 87 std Z+11, r29 ; 0x0b + 28b6: ea e5 ldi r30, 0x5A ; 90 + 28b8: f4 e2 ldi r31, 0x24 ; 36 + 28ba: c2 87 std Z+10, r28 ; 0x0a + 28bc: d3 87 std Z+11, r29 ; 0x0b if (NULL != udd_g_ctrlreq.over_under_run) { - 28a0: 06 84 ldd r0, Z+14 ; 0x0e - 28a2: f7 85 ldd r31, Z+15 ; 0x0f - 28a4: e0 2d mov r30, r0 - 28a6: 30 97 sbiw r30, 0x00 ; 0 - 28a8: 29 f0 breq .+10 ; 0x28b4 <__vector_126+0x146> + 28be: 06 84 ldd r0, Z+14 ; 0x0e + 28c0: f7 85 ldd r31, Z+15 ; 0x0f + 28c2: e0 2d mov r30, r0 + 28c4: 30 97 sbiw r30, 0x00 ; 0 + 28c6: 29 f0 breq .+10 ; 0x28d2 <__vector_126+0x146> if (!udd_g_ctrlreq.over_under_run()) { - 28aa: 09 95 icall - 28ac: 81 11 cpse r24, r1 - 28ae: 02 c0 rjmp .+4 ; 0x28b4 <__vector_126+0x146> + 28c8: 09 95 icall + 28ca: 81 11 cpse r24, r1 + 28cc: 02 c0 rjmp .+4 ; 0x28d2 <__vector_126+0x146> // Stall ZLP udd_ctrl_stall_data(); - 28b0: 44 d9 rcall .-3448 ; 0x1b3a - 28b2: 32 c0 rjmp .+100 ; 0x2918 <__vector_126+0x1aa> + 28ce: 44 d9 rcall .-3448 ; 0x1b58 + 28d0: 32 c0 rjmp .+100 ; 0x2936 <__vector_126+0x1aa> return; } } // Send IN ZLP to ACK setup request udd_ctrl_send_zlp_in(); - 28b4: 50 d9 rcall .-3424 ; 0x1b56 - 28b6: 30 c0 rjmp .+96 ; 0x2918 <__vector_126+0x1aa> + 28d2: 50 d9 rcall .-3424 ; 0x1b74 + 28d4: 30 c0 rjmp .+96 ; 0x2936 <__vector_126+0x1aa> return; } if (udd_g_ctrlreq.payload_size == udd_ctrl_payload_nb_trans) { - 28b8: 80 91 60 24 lds r24, 0x2460 ; 0x802460 - 28bc: 90 91 61 24 lds r25, 0x2461 ; 0x802461 - 28c0: c8 17 cp r28, r24 - 28c2: d9 07 cpc r29, r25 - 28c4: f9 f4 brne .+62 ; 0x2904 <__vector_126+0x196> + 28d6: 80 91 64 24 lds r24, 0x2464 ; 0x802464 + 28da: 90 91 65 24 lds r25, 0x2465 ; 0x802465 + 28de: c8 17 cp r28, r24 + 28e0: d9 07 cpc r29, r25 + 28e2: f9 f4 brne .+62 ; 0x2922 <__vector_126+0x196> // Overrun then request a new payload buffer if (!udd_g_ctrlreq.over_under_run) { - 28c6: e0 91 64 24 lds r30, 0x2464 ; 0x802464 - 28ca: f0 91 65 24 lds r31, 0x2465 ; 0x802465 - 28ce: 30 97 sbiw r30, 0x00 ; 0 - 28d0: 11 f4 brne .+4 ; 0x28d6 <__vector_126+0x168> + 28e4: e0 91 68 24 lds r30, 0x2468 ; 0x802468 + 28e8: f0 91 69 24 lds r31, 0x2469 ; 0x802469 + 28ec: 30 97 sbiw r30, 0x00 ; 0 + 28ee: 11 f4 brne .+4 ; 0x28f4 <__vector_126+0x168> // No callback available to request a new payload buffer udd_ctrl_stall_data(); - 28d2: 33 d9 rcall .-3482 ; 0x1b3a - 28d4: 21 c0 rjmp .+66 ; 0x2918 <__vector_126+0x1aa> + 28f0: 33 d9 rcall .-3482 ; 0x1b58 + 28f2: 21 c0 rjmp .+66 ; 0x2936 <__vector_126+0x1aa> return; } if (!udd_g_ctrlreq.over_under_run()) { - 28d6: 09 95 icall - 28d8: 81 11 cpse r24, r1 - 28da: 02 c0 rjmp .+4 ; 0x28e0 <__vector_126+0x172> + 28f4: 09 95 icall + 28f6: 81 11 cpse r24, r1 + 28f8: 02 c0 rjmp .+4 ; 0x28fe <__vector_126+0x172> // No new payload buffer delivered udd_ctrl_stall_data(); - 28dc: 2e d9 rcall .-3492 ; 0x1b3a - 28de: 1c c0 rjmp .+56 ; 0x2918 <__vector_126+0x1aa> + 28fa: 2e d9 rcall .-3492 ; 0x1b58 + 28fc: 1c c0 rjmp .+56 ; 0x2936 <__vector_126+0x1aa> return; } // New payload buffer available // Update number of total data received udd_ctrl_prev_payload_nb_trans += udd_ctrl_payload_nb_trans; - 28e0: 20 91 fd 21 lds r18, 0x21FD ; 0x8021fd - 28e4: 30 91 fe 21 lds r19, 0x21FE ; 0x8021fe - 28e8: 80 91 fb 21 lds r24, 0x21FB ; 0x8021fb - 28ec: 90 91 fc 21 lds r25, 0x21FC ; 0x8021fc - 28f0: 82 0f add r24, r18 - 28f2: 93 1f adc r25, r19 - 28f4: 80 93 fd 21 sts 0x21FD, r24 ; 0x8021fd - 28f8: 90 93 fe 21 sts 0x21FE, r25 ; 0x8021fe + 28fe: 20 91 fd 21 lds r18, 0x21FD ; 0x8021fd + 2902: 30 91 fe 21 lds r19, 0x21FE ; 0x8021fe + 2906: 80 91 fb 21 lds r24, 0x21FB ; 0x8021fb + 290a: 90 91 fc 21 lds r25, 0x21FC ; 0x8021fc + 290e: 82 0f add r24, r18 + 2910: 93 1f adc r25, r19 + 2912: 80 93 fd 21 sts 0x21FD, r24 ; 0x8021fd + 2916: 90 93 fe 21 sts 0x21FE, r25 ; 0x8021fe // Reinit reception on payload buffer udd_ctrl_payload_nb_trans = 0; - 28fc: 10 92 fb 21 sts 0x21FB, r1 ; 0x8021fb - 2900: 10 92 fc 21 sts 0x21FC, r1 ; 0x8021fc + 291a: 10 92 fb 21 sts 0x21FB, r1 ; 0x8021fb + 291e: 10 92 fc 21 sts 0x21FC, r1 ; 0x8021fc } // Free buffer of OUT control endpoint to authorize next reception udd_control_out_clear_NACK0(); - 2904: e0 e1 ldi r30, 0x10 ; 16 - 2906: f2 e2 ldi r31, 0x22 ; 34 - 2908: 02 e0 ldi r16, 0x02 ; 2 - 290a: 06 93 lac Z, r16 - 290c: 05 c0 rjmp .+10 ; 0x2918 <__vector_126+0x1aa> + 2922: e0 e1 ldi r30, 0x10 ; 16 + 2924: f2 e2 ldi r31, 0x22 ; 34 + 2926: 02 e0 ldi r16, 0x02 ; 2 + 2928: 06 93 lac Z, r16 + 292a: 05 c0 rjmp .+10 ; 0x2936 <__vector_126+0x1aa> // Check status on control endpoint if (ep == 0) { udd_ctrl_out_received(); goto udd_interrupt_tc_end; // Interrupt acked by control endpoint managed } if (ep == (0 | USB_EP_DIR_IN)) { - 290e: 80 38 cpi r24, 0x80 ; 128 - 2910: 11 f4 brne .+4 ; 0x2916 <__vector_126+0x1a8> + 292c: 80 38 cpi r24, 0x80 ; 128 + 292e: 11 f4 brne .+4 ; 0x2934 <__vector_126+0x1a8> udd_ctrl_in_sent(); - 2912: 37 d9 rcall .-3474 ; 0x1b82 + 2930: 37 d9 rcall .-3474 ; 0x1ba0 goto udd_interrupt_tc_end; // Interrupt acked by control endpoint managed - 2914: 01 c0 rjmp .+2 ; 0x2918 <__vector_126+0x1aa> + 2932: 01 c0 rjmp .+2 ; 0x2936 <__vector_126+0x1aa> } Assert(udd_ep_is_valid(ep)); // Manage end of transfer on endpoint bulk/interrupt/isochronous udd_ep_trans_complet(ep); - 2916: 51 da rcall .-2910 ; 0x1dba + 2934: 51 da rcall .-2910 ; 0x1dd8 } #endif udd_interrupt_tc_end: return; } - 2918: ff 91 pop r31 - 291a: ef 91 pop r30 - 291c: df 91 pop r29 - 291e: cf 91 pop r28 - 2920: bf 91 pop r27 - 2922: af 91 pop r26 - 2924: 9f 91 pop r25 - 2926: 8f 91 pop r24 - 2928: 7f 91 pop r23 - 292a: 6f 91 pop r22 - 292c: 5f 91 pop r21 - 292e: 4f 91 pop r20 - 2930: 3f 91 pop r19 - 2932: 2f 91 pop r18 - 2934: 1f 91 pop r17 - 2936: 0f 91 pop r16 - 2938: 0f 90 pop r0 - 293a: 0f be out 0x3f, r0 ; 63 - 293c: 0f 90 pop r0 - 293e: 1f 90 pop r1 - 2940: 18 95 reti + 2936: ff 91 pop r31 + 2938: ef 91 pop r30 + 293a: df 91 pop r29 + 293c: cf 91 pop r28 + 293e: bf 91 pop r27 + 2940: af 91 pop r26 + 2942: 9f 91 pop r25 + 2944: 8f 91 pop r24 + 2946: 7f 91 pop r23 + 2948: 6f 91 pop r22 + 294a: 5f 91 pop r21 + 294c: 4f 91 pop r20 + 294e: 3f 91 pop r19 + 2950: 2f 91 pop r18 + 2952: 1f 91 pop r17 + 2954: 0f 91 pop r16 + 2956: 0f 90 pop r0 + 2958: 0f be out 0x3f, r0 ; 63 + 295a: 0f 90 pop r0 + 295c: 1f 90 pop r1 + 295e: 18 95 reti -00002942 <__udivmodhi4>: - 2942: aa 1b sub r26, r26 - 2944: bb 1b sub r27, r27 - 2946: 51 e1 ldi r21, 0x11 ; 17 - 2948: 07 c0 rjmp .+14 ; 0x2958 <__udivmodhi4_ep> +00002960 <__udivmodhi4>: + 2960: aa 1b sub r26, r26 + 2962: bb 1b sub r27, r27 + 2964: 51 e1 ldi r21, 0x11 ; 17 + 2966: 07 c0 rjmp .+14 ; 0x2976 <__udivmodhi4_ep> -0000294a <__udivmodhi4_loop>: - 294a: aa 1f adc r26, r26 - 294c: bb 1f adc r27, r27 - 294e: a6 17 cp r26, r22 - 2950: b7 07 cpc r27, r23 - 2952: 10 f0 brcs .+4 ; 0x2958 <__udivmodhi4_ep> - 2954: a6 1b sub r26, r22 - 2956: b7 0b sbc r27, r23 +00002968 <__udivmodhi4_loop>: + 2968: aa 1f adc r26, r26 + 296a: bb 1f adc r27, r27 + 296c: a6 17 cp r26, r22 + 296e: b7 07 cpc r27, r23 + 2970: 10 f0 brcs .+4 ; 0x2976 <__udivmodhi4_ep> + 2972: a6 1b sub r26, r22 + 2974: b7 0b sbc r27, r23 -00002958 <__udivmodhi4_ep>: - 2958: 88 1f adc r24, r24 - 295a: 99 1f adc r25, r25 - 295c: 5a 95 dec r21 - 295e: a9 f7 brne .-22 ; 0x294a <__udivmodhi4_loop> - 2960: 80 95 com r24 - 2962: 90 95 com r25 - 2964: bc 01 movw r22, r24 - 2966: cd 01 movw r24, r26 - 2968: 08 95 ret - -0000296a <__tablejump2__>: - 296a: ee 0f add r30, r30 - 296c: ff 1f adc r31, r31 - 296e: 05 90 lpm r0, Z+ - 2970: f4 91 lpm r31, Z - 2972: e0 2d mov r30, r0 - 2974: 09 94 ijmp - -00002976 : - 2976: fb 01 movw r30, r22 - 2978: dc 01 movw r26, r24 - 297a: 02 c0 rjmp .+4 ; 0x2980 - 297c: 01 90 ld r0, Z+ - 297e: 0d 92 st X+, r0 - 2980: 41 50 subi r20, 0x01 ; 1 - 2982: 50 40 sbci r21, 0x00 ; 0 - 2984: d8 f7 brcc .-10 ; 0x297c +00002976 <__udivmodhi4_ep>: + 2976: 88 1f adc r24, r24 + 2978: 99 1f adc r25, r25 + 297a: 5a 95 dec r21 + 297c: a9 f7 brne .-22 ; 0x2968 <__udivmodhi4_loop> + 297e: 80 95 com r24 + 2980: 90 95 com r25 + 2982: bc 01 movw r22, r24 + 2984: cd 01 movw r24, r26 2986: 08 95 ret -00002988 <_exit>: - 2988: f8 94 cli +00002988 <__tablejump2__>: + 2988: ee 0f add r30, r30 + 298a: ff 1f adc r31, r31 + 298c: 05 90 lpm r0, Z+ + 298e: f4 91 lpm r31, Z + 2990: e0 2d mov r30, r0 + 2992: 09 94 ijmp -0000298a <__stop_program>: - 298a: ff cf rjmp .-2 ; 0x298a <__stop_program> +00002994 : + 2994: fb 01 movw r30, r22 + 2996: dc 01 movw r26, r24 + 2998: 02 c0 rjmp .+4 ; 0x299e + 299a: 01 90 ld r0, Z+ + 299c: 0d 92 st X+, r0 + 299e: 41 50 subi r20, 0x01 ; 1 + 29a0: 50 40 sbci r21, 0x00 ; 0 + 29a2: d8 f7 brcc .-10 ; 0x299a + 29a4: 08 95 ret + +000029a6 <_exit>: + 29a6: f8 94 cli + +000029a8 <__stop_program>: + 29a8: ff cf rjmp .-2 ; 0x29a8 <__stop_program> diff --git a/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.map b/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.map index 339cb3d3..46dc130c 100644 --- a/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.map +++ b/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.map @@ -16,6 +16,7 @@ c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/.. Allocating common symbols Common symbol size file +debug_counter 0x4 src/main.o dacBuf_CH1 0x200 src/main.o udd_g_ctrlreq 0x10 src/main.o sleepmgr_locks 0x6 src/ASF/common/services/sleepmgr/xmega/sleepmgr.o @@ -1927,7 +1928,7 @@ END GROUP .rela.plt *(.rela.plt) -.text 0x00000000 0x298c +.text 0x00000000 0x29aa *(.vectors) .vectors 0x00000000 0x1fc C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/XMEGAA_DFP/1.0.39/gcc/dev/atxmega32a4u/avrxmega2/crtatxmega32a4u.o 0x00000000 __vector_default @@ -2126,243 +2127,243 @@ END GROUP .text.iso_callback 0x000002a4 0x22 src/main.o 0x000002a4 iso_callback - .text.main 0x000002c6 0x44 src/main.o + .text.main 0x000002c6 0x60 src/main.o 0x000002c6 main .text.main_suspend_action - 0x0000030a 0x2 src/main.o - 0x0000030a main_suspend_action + 0x00000326 0x2 src/main.o + 0x00000326 main_suspend_action .text.main_resume_action - 0x0000030c 0x2 src/main.o - 0x0000030c main_resume_action + 0x00000328 0x2 src/main.o + 0x00000328 main_resume_action .text.main_sof_action - 0x0000030e 0x42 src/main.o - 0x0000030e main_sof_action + 0x0000032a 0x42 src/main.o + 0x0000032a main_sof_action .text.main_vendor_enable - 0x00000350 0x18 src/main.o - 0x00000350 main_vendor_enable + 0x0000036c 0x18 src/main.o + 0x0000036c main_vendor_enable .text.main_vendor_disable - 0x00000368 0x6 src/main.o - 0x00000368 main_vendor_disable + 0x00000384 0x6 src/main.o + 0x00000384 main_vendor_disable .text.main_setup_out_received - 0x0000036e 0x4 src/main.o - 0x0000036e main_setup_out_received + 0x0000038a 0x4 src/main.o + 0x0000038a main_setup_out_received .text.main_setup_in_received - 0x00000372 0x4 src/main.o - 0x00000372 main_setup_in_received + 0x0000038e 0x4 src/main.o + 0x0000038e main_setup_in_received .text.tiny_adc_ch0setup - 0x00000376 0x2a src/tiny_adc.o - 0x00000376 tiny_adc_ch0setup + 0x00000392 0x2a src/tiny_adc.o + 0x00000392 tiny_adc_ch0setup .text.tiny_adc_ch1setup - 0x000003a0 0x14 src/tiny_adc.o - 0x000003a0 tiny_adc_ch1setup + 0x000003bc 0x14 src/tiny_adc.o + 0x000003bc tiny_adc_ch1setup .text.tiny_adc_pid_setup - 0x000003b4 0x14 src/tiny_adc.o - 0x000003b4 tiny_adc_pid_setup + 0x000003d0 0x14 src/tiny_adc.o + 0x000003d0 tiny_adc_pid_setup .text.ReadCalibrationByte - 0x000003c8 0x12 src/tiny_adc.o - 0x000003c8 ReadCalibrationByte + 0x000003e4 0x12 src/tiny_adc.o + 0x000003e4 ReadCalibrationByte .text.tiny_adc_setup - 0x000003da 0x7a src/tiny_adc.o - 0x000003da tiny_adc_setup + 0x000003f6 0x7a src/tiny_adc.o + 0x000003f6 tiny_adc_setup .text.tiny_dac_setup - 0x00000454 0x48 src/tiny_dac.o - 0x00000454 tiny_dac_setup + 0x00000470 0x48 src/tiny_dac.o + 0x00000470 tiny_dac_setup .text.tiny_dma_setup - 0x0000049c 0x12 src/tiny_dma.o - 0x0000049c tiny_dma_setup + 0x000004b8 0x12 src/tiny_dma.o + 0x000004b8 tiny_dma_setup .text.tiny_dma_flush - 0x000004ae 0x24 src/tiny_dma.o - 0x000004ae tiny_dma_flush + 0x000004ca 0x24 src/tiny_dma.o + 0x000004ca tiny_dma_flush .text.tiny_dma_set_mode_0 - 0x000004d2 0x90 src/tiny_dma.o - 0x000004d2 tiny_dma_set_mode_0 + 0x000004ee 0x90 src/tiny_dma.o + 0x000004ee tiny_dma_set_mode_0 .text.tiny_dma_loop_mode_0 - 0x00000562 0x60 src/tiny_dma.o - 0x00000562 tiny_dma_loop_mode_0 + 0x0000057e 0x60 src/tiny_dma.o + 0x0000057e tiny_dma_loop_mode_0 .text.tiny_dma_set_mode_1 - 0x000005c2 0x9c src/tiny_dma.o - 0x000005c2 tiny_dma_set_mode_1 + 0x000005de 0x9c src/tiny_dma.o + 0x000005de tiny_dma_set_mode_1 .text.tiny_dma_loop_mode_1 - 0x0000065e 0xae src/tiny_dma.o - 0x0000065e tiny_dma_loop_mode_1 + 0x0000067a 0xae src/tiny_dma.o + 0x0000067a tiny_dma_loop_mode_1 .text.tiny_dma_set_mode_2 - 0x0000070c 0x94 src/tiny_dma.o - 0x0000070c tiny_dma_set_mode_2 + 0x00000728 0x94 src/tiny_dma.o + 0x00000728 tiny_dma_set_mode_2 .text.tiny_dma_loop_mode_2 - 0x000007a0 0xb0 src/tiny_dma.o - 0x000007a0 tiny_dma_loop_mode_2 + 0x000007bc 0xb0 src/tiny_dma.o + 0x000007bc tiny_dma_loop_mode_2 .text.tiny_dma_set_mode_3 - 0x00000850 0xcc src/tiny_dma.o - 0x00000850 tiny_dma_set_mode_3 + 0x0000086c 0xcc src/tiny_dma.o + 0x0000086c tiny_dma_set_mode_3 .text.tiny_dma_loop_mode_3 - 0x0000091c 0x60 src/tiny_dma.o - 0x0000091c tiny_dma_loop_mode_3 + 0x00000938 0x60 src/tiny_dma.o + 0x00000938 tiny_dma_loop_mode_3 .text.tiny_dma_set_mode_4 - 0x0000097c 0x7c src/tiny_dma.o - 0x0000097c tiny_dma_set_mode_4 + 0x00000998 0x7c src/tiny_dma.o + 0x00000998 tiny_dma_set_mode_4 .text.tiny_dma_loop_mode_4 - 0x000009f8 0xca src/tiny_dma.o - 0x000009f8 tiny_dma_loop_mode_4 + 0x00000a14 0xca src/tiny_dma.o + 0x00000a14 tiny_dma_loop_mode_4 .text.tiny_dma_set_mode_5 - 0x00000ac2 0x8e src/tiny_dma.o - 0x00000ac2 tiny_dma_set_mode_5 + 0x00000ade 0x90 src/tiny_dma.o + 0x00000ade tiny_dma_set_mode_5 .text.tiny_dma_set_mode_6 - 0x00000b50 0x92 src/tiny_dma.o - 0x00000b50 tiny_dma_set_mode_6 + 0x00000b6e 0x92 src/tiny_dma.o + 0x00000b6e tiny_dma_set_mode_6 .text.tiny_dma_loop_mode_6 - 0x00000be2 0x5c src/tiny_dma.o - 0x00000be2 tiny_dma_loop_mode_6 + 0x00000c00 0x5c src/tiny_dma.o + 0x00000c00 tiny_dma_loop_mode_6 .text.tiny_dma_set_mode_7 - 0x00000c3e 0x92 src/tiny_dma.o - 0x00000c3e tiny_dma_set_mode_7 + 0x00000c5c 0x92 src/tiny_dma.o + 0x00000c5c tiny_dma_set_mode_7 .text.tiny_dma_loop_mode_7 - 0x00000cd0 0x5c src/tiny_dma.o - 0x00000cd0 tiny_dma_loop_mode_7 + 0x00000cee 0x5c src/tiny_dma.o + 0x00000cee tiny_dma_loop_mode_7 .text.tiny_timer_setup - 0x00000d2c 0x76 src/tiny_timer.o - 0x00000d2c tiny_timer_setup + 0x00000d4a 0x76 src/tiny_timer.o + 0x00000d4a tiny_timer_setup .text.__vector_83 - 0x00000da2 0xee src/tiny_timer.o - 0x00000da2 __vector_83 + 0x00000dc0 0xee src/tiny_timer.o + 0x00000dc0 __vector_83 .text.tiny_uart_setup - 0x00000e90 0x34 src/tiny_uart.o - 0x00000e90 tiny_uart_setup + 0x00000eae 0x34 src/tiny_uart.o + 0x00000eae tiny_uart_setup .text.tiny_spi_setup - 0x00000ec4 0x1e src/tiny_uart.o - 0x00000ec4 tiny_spi_setup + 0x00000ee2 0x1e src/tiny_uart.o + 0x00000ee2 tiny_spi_setup .text.__vector_24 - 0x00000ee2 0x16 src/tiny_uart.o - 0x00000ee2 __vector_24 + 0x00000f00 0x16 src/tiny_uart.o + 0x00000f00 __vector_24 .text.sysclk_init - 0x00000ef8 0xe0 src/ASF/common/services/clock/xmega/sysclk.o - 0x00000ef8 sysclk_init + 0x00000f16 0xe0 src/ASF/common/services/clock/xmega/sysclk.o + 0x00000f16 sysclk_init .text.sysclk_enable_module - 0x00000fd8 0x18 src/ASF/common/services/clock/xmega/sysclk.o - 0x00000fd8 sysclk_enable_module + 0x00000ff6 0x18 src/ASF/common/services/clock/xmega/sysclk.o + 0x00000ff6 sysclk_enable_module .text.sysclk_enable_usb - 0x00000ff0 0x6e src/ASF/common/services/clock/xmega/sysclk.o - 0x00000ff0 sysclk_enable_usb + 0x0000100e 0x6e src/ASF/common/services/clock/xmega/sysclk.o + 0x0000100e sysclk_enable_usb .text.udi_vendor_getsetting - 0x0000105e 0x6 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o - 0x0000105e udi_vendor_getsetting + 0x0000107c 0x6 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o + 0x0000107c udi_vendor_getsetting .text.udi_vendor_enable - 0x00001064 0x16 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o - 0x00001064 udi_vendor_enable + 0x00001082 0x16 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o + 0x00001082 udi_vendor_enable .text.udi_vendor_disable - 0x0000107a 0xc src/ASF/common/services/usb/class/vendor/device/udi_vendor.o - 0x0000107a udi_vendor_disable + 0x00001098 0xc src/ASF/common/services/usb/class/vendor/device/udi_vendor.o + 0x00001098 udi_vendor_disable .text.udi_vendor_setup - 0x00001086 0x4c src/ASF/common/services/usb/class/vendor/device/udi_vendor.o - 0x00001086 udi_vendor_setup + 0x000010a4 0x4c src/ASF/common/services/usb/class/vendor/device/udi_vendor.o + 0x000010a4 udi_vendor_setup .text.udi_vendor_iso_in_run - 0x000010d2 0x18 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o - 0x000010d2 udi_vendor_iso_in_run + 0x000010f0 0x18 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o + 0x000010f0 udi_vendor_iso_in_run .text.udc_next_desc_in_iface - 0x000010ea 0x64 src/ASF/common/services/usb/udc/udc.o + 0x00001108 0x64 src/ASF/common/services/usb/udc/udc.o .text.udc_valid_address - 0x0000114e 0xc src/ASF/common/services/usb/udc/udc.o + 0x0000116c 0xc src/ASF/common/services/usb/udc/udc.o .text.udc_update_iface_desc - 0x0000115a 0x74 src/ASF/common/services/usb/udc/udc.o + 0x00001178 0x74 src/ASF/common/services/usb/udc/udc.o .text.udc_iface_disable - 0x000011ce 0x84 src/ASF/common/services/usb/udc/udc.o + 0x000011ec 0x84 src/ASF/common/services/usb/udc/udc.o .text.udc_iface_enable - 0x00001252 0x64 src/ASF/common/services/usb/udc/udc.o + 0x00001270 0x64 src/ASF/common/services/usb/udc/udc.o .text.udc_get_interface_desc - 0x000012b6 0xa src/ASF/common/services/usb/udc/udc.o - 0x000012b6 udc_get_interface_desc + 0x000012d4 0xa src/ASF/common/services/usb/udc/udc.o + 0x000012d4 udc_get_interface_desc .text.udc_start - 0x000012c0 0x4 src/ASF/common/services/usb/udc/udc.o - 0x000012c0 udc_start + 0x000012de 0x4 src/ASF/common/services/usb/udc/udc.o + 0x000012de udc_start .text.udc_reset - 0x000012c4 0x4a src/ASF/common/services/usb/udc/udc.o - 0x000012c4 udc_reset + 0x000012e2 0x4a src/ASF/common/services/usb/udc/udc.o + 0x000012e2 udc_reset .text.udc_sof_notify - 0x0000130e 0x60 src/ASF/common/services/usb/udc/udc.o - 0x0000130e udc_sof_notify + 0x0000132c 0x60 src/ASF/common/services/usb/udc/udc.o + 0x0000132c udc_sof_notify .text.udc_process_setup - 0x0000136e 0x70c src/ASF/common/services/usb/udc/udc.o - 0x0000136e udc_process_setup + 0x0000138c 0x70c src/ASF/common/services/usb/udc/udc.o + 0x0000138c udc_process_setup .text.ccp_write_io - 0x00001a7a 0xc src/ASF/xmega/drivers/cpu/ccp.o - 0x00001a7a ccp_write_io + 0x00001a98 0xc src/ASF/xmega/drivers/cpu/ccp.o + 0x00001a98 ccp_write_io .text.nvm_read_byte - 0x00001a86 0x14 src/ASF/xmega/drivers/nvm/nvm_asm.o - 0x00001a86 nvm_read_byte + 0x00001aa4 0x14 src/ASF/xmega/drivers/nvm/nvm_asm.o + 0x00001aa4 nvm_read_byte .text.udd_sleep_mode - 0x00001a9a 0x52 src/ASF/xmega/drivers/usb/usb_device.o + 0x00001ab8 0x52 src/ASF/xmega/drivers/usb/usb_device.o .text.udd_ctrl_init - 0x00001aec 0x4e src/ASF/xmega/drivers/usb/usb_device.o + 0x00001b0a 0x4e src/ASF/xmega/drivers/usb/usb_device.o .text.udd_ctrl_stall_data - 0x00001b3a 0x1c src/ASF/xmega/drivers/usb/usb_device.o + 0x00001b58 0x1c src/ASF/xmega/drivers/usb/usb_device.o .text.udd_ctrl_send_zlp_in - 0x00001b56 0x1c src/ASF/xmega/drivers/usb/usb_device.o + 0x00001b74 0x1c src/ASF/xmega/drivers/usb/usb_device.o .text.udd_ctrl_endofrequest - 0x00001b72 0x10 src/ASF/xmega/drivers/usb/usb_device.o + 0x00001b90 0x10 src/ASF/xmega/drivers/usb/usb_device.o .text.udd_ctrl_in_sent - 0x00001b82 0xd8 src/ASF/xmega/drivers/usb/usb_device.o + 0x00001ba0 0xd8 src/ASF/xmega/drivers/usb/usb_device.o .text.udd_ep_get_size - 0x00001c5a 0x4c src/ASF/xmega/drivers/usb/usb_device.o + 0x00001c78 0x4c src/ASF/xmega/drivers/usb/usb_device.o .text.udd_ep_get_job - 0x00001ca6 0x36 src/ASF/xmega/drivers/usb/usb_device.o + 0x00001cc4 0x36 src/ASF/xmega/drivers/usb/usb_device.o .text.udd_ctrl_interrupt_tc_setup - 0x00001cdc 0xde src/ASF/xmega/drivers/usb/usb_device.o + 0x00001cfa 0xde src/ASF/xmega/drivers/usb/usb_device.o .text.udd_ep_trans_complet - 0x00001dba 0x2b4 src/ASF/xmega/drivers/usb/usb_device.o + 0x00001dd8 0x2b4 src/ASF/xmega/drivers/usb/usb_device.o .text.udd_attach - 0x0000206e 0x46 src/ASF/xmega/drivers/usb/usb_device.o - 0x0000206e udd_attach + 0x0000208c 0x46 src/ASF/xmega/drivers/usb/usb_device.o + 0x0000208c udd_attach .text.udd_enable - 0x000020b4 0x10a src/ASF/xmega/drivers/usb/usb_device.o - 0x000020b4 udd_enable + 0x000020d2 0x10a src/ASF/xmega/drivers/usb/usb_device.o + 0x000020d2 udd_enable .text.udd_set_address - 0x000021be 0x6 src/ASF/xmega/drivers/usb/usb_device.o - 0x000021be udd_set_address + 0x000021dc 0x6 src/ASF/xmega/drivers/usb/usb_device.o + 0x000021dc udd_set_address .text.udd_getaddress - 0x000021c4 0x6 src/ASF/xmega/drivers/usb/usb_device.o - 0x000021c4 udd_getaddress + 0x000021e2 0x6 src/ASF/xmega/drivers/usb/usb_device.o + 0x000021e2 udd_getaddress .text.udd_set_setup_payload - 0x000021ca 0xe src/ASF/xmega/drivers/usb/usb_device.o - 0x000021ca udd_set_setup_payload + 0x000021e8 0xe src/ASF/xmega/drivers/usb/usb_device.o + 0x000021e8 udd_set_setup_payload .text.udd_ep_alloc - 0x000021d8 0xea src/ASF/xmega/drivers/usb/usb_device.o - 0x000021d8 udd_ep_alloc + 0x000021f6 0xea src/ASF/xmega/drivers/usb/usb_device.o + 0x000021f6 udd_ep_alloc .text.udd_ep_is_halted - 0x000022c2 0x36 src/ASF/xmega/drivers/usb/usb_device.o - 0x000022c2 udd_ep_is_halted + 0x000022e0 0x36 src/ASF/xmega/drivers/usb/usb_device.o + 0x000022e0 udd_ep_is_halted .text.udd_ep_clear_halt - 0x000022f8 0x6a src/ASF/xmega/drivers/usb/usb_device.o - 0x000022f8 udd_ep_clear_halt + 0x00002316 0x6a src/ASF/xmega/drivers/usb/usb_device.o + 0x00002316 udd_ep_clear_halt .text.udd_ep_run - 0x00002362 0x174 src/ASF/xmega/drivers/usb/usb_device.o - 0x00002362 udd_ep_run + 0x00002380 0x174 src/ASF/xmega/drivers/usb/usb_device.o + 0x00002380 udd_ep_run .text.udd_ep_abort - 0x000024d6 0x92 src/ASF/xmega/drivers/usb/usb_device.o - 0x000024d6 udd_ep_abort + 0x000024f4 0x92 src/ASF/xmega/drivers/usb/usb_device.o + 0x000024f4 udd_ep_abort .text.udd_ep_free - 0x00002568 0x38 src/ASF/xmega/drivers/usb/usb_device.o - 0x00002568 udd_ep_free + 0x00002586 0x38 src/ASF/xmega/drivers/usb/usb_device.o + 0x00002586 udd_ep_free .text.udd_ep_set_halt - 0x000025a0 0x5a src/ASF/xmega/drivers/usb/usb_device.o - 0x000025a0 udd_ep_set_halt + 0x000025be 0x5a src/ASF/xmega/drivers/usb/usb_device.o + 0x000025be udd_ep_set_halt .text.__vector_125 - 0x000025fa 0x174 src/ASF/xmega/drivers/usb/usb_device.o - 0x000025fa __vector_125 + 0x00002618 0x174 src/ASF/xmega/drivers/usb/usb_device.o + 0x00002618 __vector_125 .text.__vector_126 - 0x0000276e 0x1d4 src/ASF/xmega/drivers/usb/usb_device.o - 0x0000276e __vector_126 + 0x0000278c 0x1d4 src/ASF/xmega/drivers/usb/usb_device.o + 0x0000278c __vector_126 .text.libgcc.div - 0x00002942 0x28 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_udivmodhi4.o) - 0x00002942 __udivmodhi4 - .text.libgcc 0x0000296a 0xc c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_tablejump2.o) - 0x0000296a __tablejump2__ + 0x00002960 0x28 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_udivmodhi4.o) + 0x00002960 __udivmodhi4 + .text.libgcc 0x00002988 0xc c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_tablejump2.o) + 0x00002988 __tablejump2__ .text.avr-libc - 0x00002976 0x12 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/../../../../avr/lib/avrxmega2\libc.a(memcpy.o) - 0x00002976 memcpy - 0x00002988 . = ALIGN (0x2) + 0x00002994 0x12 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/../../../../avr/lib/avrxmega2\libc.a(memcpy.o) + 0x00002994 memcpy + 0x000029a6 . = ALIGN (0x2) *(.fini9) - .fini9 0x00002988 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_exit.o) - 0x00002988 _exit - 0x00002988 exit + .fini9 0x000029a6 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_exit.o) + 0x000029a6 _exit + 0x000029a6 exit *(.fini9) *(.fini8) *(.fini8) @@ -2381,11 +2382,11 @@ END GROUP *(.fini1) *(.fini1) *(.fini0) - .fini0 0x00002988 0x4 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_exit.o) + .fini0 0x000029a6 0x4 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_exit.o) *(.fini0) - 0x0000298c _etext = . + 0x000029aa _etext = . -.data 0x00802000 0xb2 load address 0x0000298c +.data 0x00802000 0xb2 load address 0x000029aa 0x00802000 PROVIDE (__data_start, .) *(.data) *(.data*) @@ -2434,7 +2435,7 @@ END GROUP 0x008020b2 _edata = . 0x008020b2 PROVIDE (__data_end, .) -.bss 0x008020b2 0xb96 +.bss 0x008020b2 0xb9a 0x008020b2 PROVIDE (__bss_start, .) *(.bss) *(.bss*) @@ -2482,22 +2483,23 @@ END GROUP 0x00802254 0x1 src/ASF/xmega/drivers/usb/usb_device.o *(COMMON) *fill* 0x00802255 0x1 - COMMON 0x00802256 0x9ec src/main.o - 0x00802256 dacBuf_CH1 - 0x00802456 udd_g_ctrlreq - 0x00802466 dacBuf_CH2 - 0x00802666 isoBuf - COMMON 0x00802c42 0x6 src/ASF/common/services/sleepmgr/xmega/sleepmgr.o - 0x00802c42 sleepmgr_locks - 0x00802c48 PROVIDE (__bss_end, .) - 0x0000298c __data_load_start = LOADADDR (.data) - 0x00002a3e __data_load_end = (__data_load_start + SIZEOF (.data)) + COMMON 0x00802256 0x9f0 src/main.o + 0x00802256 debug_counter + 0x0080225a dacBuf_CH1 + 0x0080245a udd_g_ctrlreq + 0x0080246a dacBuf_CH2 + 0x0080266a isoBuf + COMMON 0x00802c46 0x6 src/ASF/common/services/sleepmgr/xmega/sleepmgr.o + 0x00802c46 sleepmgr_locks + 0x00802c4c PROVIDE (__bss_end, .) + 0x000029aa __data_load_start = LOADADDR (.data) + 0x00002a5c __data_load_end = (__data_load_start + SIZEOF (.data)) -.noinit 0x00802c48 0x0 +.noinit 0x00802c4c 0x0 [!provide] PROVIDE (__noinit_start, .) *(.noinit*) [!provide] PROVIDE (__noinit_end, .) - 0x00802c48 _end = . + 0x00802c4c _end = . [!provide] PROVIDE (__heap_start, .) .eeprom 0x00810000 0x0 @@ -2613,24 +2615,24 @@ END GROUP .debug_pubnames *(.debug_pubnames) -.debug_info 0x00000000 0xa277 +.debug_info 0x00000000 0xa294 *(.debug_info .gnu.linkonce.wi.*) .debug_info 0x00000000 0x290 src/tiny_dig.o .debug_info 0x00000290 0xff src/ASF/common/boards/user_board/init.o - .debug_info 0x0000038f 0x7cf src/main.o - .debug_info 0x00000b5e 0x9b6 src/tiny_adc.o - .debug_info 0x00001514 0x5f0 src/tiny_dac.o - .debug_info 0x00001b04 0x10d5 src/tiny_dma.o - .debug_info 0x00002bd9 0x17b4 src/tiny_timer.o - .debug_info 0x0000438d 0x4b2 src/tiny_uart.o - .debug_info 0x0000483f 0xc3d src/ASF/common/services/clock/xmega/sysclk.o - .debug_info 0x0000547c 0x121 src/ASF/common/services/sleepmgr/xmega/sleepmgr.o - .debug_info 0x0000559d 0x62f src/ASF/common/services/usb/class/vendor/device/udi_vendor.o - .debug_info 0x00005bcc 0x5fc src/ASF/common/services/usb/class/vendor/device/udi_vendor_desc.o - .debug_info 0x000061c8 0x214e src/ASF/common/services/usb/udc/udc.o - .debug_info 0x00008316 0x91 src/ASF/xmega/drivers/cpu/ccp.o - .debug_info 0x000083a7 0x91 src/ASF/xmega/drivers/nvm/nvm_asm.o - .debug_info 0x00008438 0x1e3f src/ASF/xmega/drivers/usb/usb_device.o + .debug_info 0x0000038f 0x7ec src/main.o + .debug_info 0x00000b7b 0x9b6 src/tiny_adc.o + .debug_info 0x00001531 0x5f0 src/tiny_dac.o + .debug_info 0x00001b21 0x10d5 src/tiny_dma.o + .debug_info 0x00002bf6 0x17b4 src/tiny_timer.o + .debug_info 0x000043aa 0x4b2 src/tiny_uart.o + .debug_info 0x0000485c 0xc3d src/ASF/common/services/clock/xmega/sysclk.o + .debug_info 0x00005499 0x121 src/ASF/common/services/sleepmgr/xmega/sleepmgr.o + .debug_info 0x000055ba 0x62f src/ASF/common/services/usb/class/vendor/device/udi_vendor.o + .debug_info 0x00005be9 0x5fc src/ASF/common/services/usb/class/vendor/device/udi_vendor_desc.o + .debug_info 0x000061e5 0x214e src/ASF/common/services/usb/udc/udc.o + .debug_info 0x00008333 0x91 src/ASF/xmega/drivers/cpu/ccp.o + .debug_info 0x000083c4 0x91 src/ASF/xmega/drivers/nvm/nvm_asm.o + .debug_info 0x00008455 0x1e3f src/ASF/xmega/drivers/usb/usb_device.o .debug_abbrev 0x00000000 0x1ba2 *(.debug_abbrev) @@ -2651,24 +2653,24 @@ END GROUP .debug_abbrev 0x000015bc 0x12 src/ASF/xmega/drivers/nvm/nvm_asm.o .debug_abbrev 0x000015ce 0x5d4 src/ASF/xmega/drivers/usb/usb_device.o -.debug_line 0x00000000 0x89d2 +.debug_line 0x00000000 0x894e *(.debug_line .debug_line.* .debug_line_end) .debug_line 0x00000000 0x7b8 src/tiny_dig.o .debug_line 0x000007b8 0x78d src/ASF/common/boards/user_board/init.o - .debug_line 0x00000f45 0xa09 src/main.o - .debug_line 0x0000194e 0x956 src/tiny_adc.o - .debug_line 0x000022a4 0x806 src/tiny_dac.o - .debug_line 0x00002aaa 0x125a src/tiny_dma.o - .debug_line 0x00003d04 0x8bb src/tiny_timer.o - .debug_line 0x000045bf 0x83f src/tiny_uart.o - .debug_line 0x00004dfe 0x738 src/ASF/common/services/clock/xmega/sysclk.o - .debug_line 0x00005536 0x455 src/ASF/common/services/sleepmgr/xmega/sleepmgr.o - .debug_line 0x0000598b 0x625 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o - .debug_line 0x00005fb0 0x4f1 src/ASF/common/services/usb/class/vendor/device/udi_vendor_desc.o - .debug_line 0x000064a1 0xeae src/ASF/common/services/usb/udc/udc.o - .debug_line 0x0000734f 0x6e src/ASF/xmega/drivers/cpu/ccp.o - .debug_line 0x000073bd 0x11f src/ASF/xmega/drivers/nvm/nvm_asm.o - .debug_line 0x000074dc 0x14f6 src/ASF/xmega/drivers/usb/usb_device.o + .debug_line 0x00000f45 0x985 src/main.o + .debug_line 0x000018ca 0x956 src/tiny_adc.o + .debug_line 0x00002220 0x806 src/tiny_dac.o + .debug_line 0x00002a26 0x125a src/tiny_dma.o + .debug_line 0x00003c80 0x8bb src/tiny_timer.o + .debug_line 0x0000453b 0x83f src/tiny_uart.o + .debug_line 0x00004d7a 0x738 src/ASF/common/services/clock/xmega/sysclk.o + .debug_line 0x000054b2 0x455 src/ASF/common/services/sleepmgr/xmega/sleepmgr.o + .debug_line 0x00005907 0x625 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o + .debug_line 0x00005f2c 0x4f1 src/ASF/common/services/usb/class/vendor/device/udi_vendor_desc.o + .debug_line 0x0000641d 0xeae src/ASF/common/services/usb/udc/udc.o + .debug_line 0x000072cb 0x6e src/ASF/xmega/drivers/cpu/ccp.o + .debug_line 0x00007339 0x11f src/ASF/xmega/drivers/nvm/nvm_asm.o + .debug_line 0x00007458 0x14f6 src/ASF/xmega/drivers/usb/usb_device.o .debug_frame 0x00000000 0x9d0 *(.debug_frame) @@ -2685,35 +2687,35 @@ END GROUP .debug_frame 0x000004e4 0x114 src/ASF/common/services/usb/udc/udc.o .debug_frame 0x000005f8 0x3d8 src/ASF/xmega/drivers/usb/usb_device.o -.debug_str 0x00000000 0x2f5e7 +.debug_str 0x00000000 0x2f5f5 *(.debug_str) .debug_str 0x00000000 0x27632 src/tiny_dig.o 0x27ca5 (size before relaxing) .debug_str 0x00027632 0x36 src/ASF/common/boards/user_board/init.o 0x27ad2 (size before relaxing) - .debug_str 0x00027668 0x94a src/main.o - 0x28596 (size before relaxing) - .debug_str 0x00027fb2 0xd0f src/tiny_adc.o + .debug_str 0x00027668 0x961 src/main.o + 0x285ad (size before relaxing) + .debug_str 0x00027fc9 0xd0f src/tiny_adc.o 0x28e7c (size before relaxing) - .debug_str 0x00028cc1 0x1a6 src/tiny_dac.o + .debug_str 0x00028cd8 0x1a6 src/tiny_dac.o 0x282cf (size before relaxing) - .debug_str 0x00028e67 0xcbc src/tiny_dma.o + .debug_str 0x00028e7e 0xcbc src/tiny_dma.o 0x29184 (size before relaxing) - .debug_str 0x00029b23 0x1166 src/tiny_timer.o + .debug_str 0x00029b3a 0x1166 src/tiny_timer.o 0x29573 (size before relaxing) - .debug_str 0x0002ac89 0x19d src/tiny_uart.o + .debug_str 0x0002aca0 0x19d src/tiny_uart.o 0x283ac (size before relaxing) - .debug_str 0x0002ae26 0x41c src/ASF/common/services/clock/xmega/sysclk.o + .debug_str 0x0002ae3d 0x41c src/ASF/common/services/clock/xmega/sysclk.o 0x2598f (size before relaxing) - .debug_str 0x0002b242 0x96 src/ASF/common/services/sleepmgr/xmega/sleepmgr.o + .debug_str 0x0002b259 0x96 src/ASF/common/services/sleepmgr/xmega/sleepmgr.o 0x24246 (size before relaxing) - .debug_str 0x0002b2d8 0x1ce src/ASF/common/services/usb/class/vendor/device/udi_vendor.o + .debug_str 0x0002b2ef 0x1ce src/ASF/common/services/usb/class/vendor/device/udi_vendor.o 0x2672f (size before relaxing) - .debug_str 0x0002b4a6 0x3f7 src/ASF/common/services/usb/class/vendor/device/udi_vendor_desc.o + .debug_str 0x0002b4bd 0x3f7 src/ASF/common/services/usb/class/vendor/device/udi_vendor_desc.o 0x26732 (size before relaxing) - .debug_str 0x0002b89d 0x7ee src/ASF/common/services/usb/udc/udc.o + .debug_str 0x0002b8b4 0x7e5 src/ASF/common/services/usb/udc/udc.o 0x291fa (size before relaxing) - .debug_str 0x0002c08b 0x355c src/ASF/xmega/drivers/usb/usb_device.o + .debug_str 0x0002c099 0x355c src/ASF/xmega/drivers/usb/usb_device.o 0x2b810 (size before relaxing) .debug_loc 0x00000000 0x2105 diff --git a/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.srec b/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.srec index 924f74e9..c5e43a77 100644 --- a/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.srec +++ b/AVR Code/USB_BULK_TEST/Debug/USB_BULK_TEST.srec @@ -5,7 +5,7 @@ S113002038C1000036C1000034C1000032C10000F4 S113003030C100002EC100002CC100002AC1000004 S113004028C1000026C1000024C1000022C1000014 S113005020C100001EC100001CC100001AC1000024 -S113006040C7000016C1000014C1000012C1000006 +S11300604FC7000016C1000014C1000012C10000F7 S113007010C100000EC100000CC100000AC1000044 S113008008C1000006C1000004C1000002C1000054 S113009000C10000FEC00000FCC00000FAC0000067 @@ -19,7 +19,7 @@ S1130100C8C00000C6C00000C4C00000C2C00000D7 S1130110C0C00000BEC00000BCC00000BAC00000E7 S1130120B8C00000B6C00000B4C00000B2C00000F7 S1130130B0C00000AEC00000ACC00000AAC0000007 -S1130140A8C00000A6C00000A4C000002AC6000089 +S1130140A8C00000A6C00000A4C0000039C600007A S1130150A0C000009EC000009CC000009AC0000027 S113016098C0000096C0000094C0000092C0000037 S113017090C000008EC000008CC000008AC0000047 @@ -30,650 +30,652 @@ S11301B070C000006EC000006CC000006AC0000087 S11301C068C0000066C0000064C0000062C0000097 S11301D060C000005EC000005CC000005AC00000A7 S11301E058C0000056C0000054C0000052C00000B7 -S11301F050C000000C94FD120C94B71393019501A8 -S1130200970199019B01A0019D019F01E009E20969 -S11302101E0A5E0A670A6C0ABE0AC30A0E0A100A9C -S1130220120A140A160A180A1A0A1C0A4E0A500A52 -S1130230520A540A560A580A5A0A5C0A780A830A65 -S11302408D0A9B0A9D0A9F0AA90AB30A3B0E3E0E19 -S1130250410E440E470E4A0E4D0E11241FBECFEF21 -S1130260CDBFDFE2DEBF10E2A0E0B0E2ECE8F9E2ED +S11301F050C000000C940C130C94C613A101A3016D +S1130200A501A701A901AE01AB01AD01EF09F109F7 +S11302102D0A6D0A760A7B0ACD0AD20A1D0A1F0A24 +S1130220210A230A250A270A290A2B0A5D0A5F0ADA +S1130230610A630A650A670A690A6B0A870A920AED +S11302409C0AAA0AAC0AAE0AB80AC20A4A0E4D0EA1 +S1130250500E530E560E590E5C0E11241FBECFEFD6 +S1130260CDBFDFE2DEBF10E2A0E0B0E2EAEAF9E2ED S113027002C005900D92A23BB107D9F72CE2A2EB84 -S1130280B0E201C01D92A834B207E1F71CD00C946F -S1130290C414B6CEE0E8F6E08FE0808385E0848382 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index 9428af82..8b01caf8 100644 --- a/AVR Code/USB_BULK_TEST/Release/USB_BULK_TEST.lss +++ b/AVR Code/USB_BULK_TEST/Release/USB_BULK_TEST.lss @@ -3,25 +3,25 @@ USB_BULK_TEST.elf: file format elf32-avr Sections: Idx Name Size VMA LMA File off Algn - 0 .text 0000252e 00000000 00000000 00000094 2**1 + 0 .text 00002512 00000000 00000000 00000094 2**1 CONTENTS, ALLOC, LOAD, READONLY, CODE - 1 .data 000000c0 00802000 0000252e 000025c4 2**2 + 1 .data 000000c0 00802000 00002512 000025a8 2**2 CONTENTS, ALLOC, LOAD, DATA - 2 .bss 00000b98 008020c0 008020c0 00002684 2**2 + 2 .bss 00000b9c 008020c0 008020c0 00002668 2**2 ALLOC - 3 .comment 00000030 00000000 00000000 00002684 2**0 + 3 .comment 00000030 00000000 00000000 00002668 2**0 CONTENTS, READONLY - 4 .note.gnu.avr.deviceinfo 00000040 00000000 00000000 000026b4 2**2 + 4 .note.gnu.avr.deviceinfo 00000040 00000000 00000000 00002698 2**2 CONTENTS, READONLY - 5 .debug_aranges 00000048 00000000 00000000 000026f8 2**3 + 5 .debug_aranges 00000048 00000000 00000000 000026d8 2**3 CONTENTS, READONLY, DEBUGGING - 6 .debug_info 00000126 00000000 00000000 00002740 2**0 + 6 .debug_info 00000126 00000000 00000000 00002720 2**0 CONTENTS, READONLY, DEBUGGING - 7 .debug_abbrev 00000026 00000000 00000000 00002866 2**0 + 7 .debug_abbrev 00000026 00000000 00000000 00002846 2**0 CONTENTS, READONLY, DEBUGGING - 8 .debug_line 0000018d 00000000 00000000 0000288c 2**0 + 8 .debug_line 0000018d 00000000 00000000 0000286c 2**0 CONTENTS, READONLY, DEBUGGING - 9 .debug_ranges 00000020 00000000 00000000 00002a20 2**3 + 9 .debug_ranges 00000020 00000000 00000000 00002a00 2**3 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: @@ -75,7 +75,7 @@ Disassembly of section .text: 5a: 00 00 nop 5c: 0b c1 rjmp .+534 ; 0x274 <__bad_interrupt> 5e: 00 00 nop - 60: 0d c7 rjmp .+3610 ; 0xe7c <__vector_24> + 60: ff c6 rjmp .+3582 ; 0xe60 <__vector_24> 62: 00 00 nop 64: 07 c1 rjmp .+526 ; 0x274 <__bad_interrupt> 66: 00 00 nop @@ -193,7 +193,7 @@ Disassembly of section .text: 146: 00 00 nop 148: 95 c0 rjmp .+298 ; 0x274 <__bad_interrupt> 14a: 00 00 nop - 14c: 0e c6 rjmp .+3100 ; 0xd6a <__vector_83> + 14c: 00 c6 rjmp .+3072 ; 0xd4e <__vector_83> 14e: 00 00 nop 150: 91 c0 rjmp .+290 ; 0x274 <__bad_interrupt> 152: 00 00 nop @@ -277,40 +277,40 @@ Disassembly of section .text: 1ee: 00 00 nop 1f0: 41 c0 rjmp .+130 ; 0x274 <__bad_interrupt> 1f2: 00 00 nop - 1f4: 0c 94 eb 10 jmp 0x21d6 ; 0x21d6 <__vector_125> - 1f8: 0c 94 a0 11 jmp 0x2340 ; 0x2340 <__vector_126> - 1fc: 83 01 movw r16, r6 - 1fe: 85 01 movw r16, r10 - 200: 87 01 movw r16, r14 - 202: 89 01 movw r16, r18 - 204: 8b 01 movw r16, r22 - 206: 90 01 movw r18, r0 - 208: 8d 01 movw r16, r26 - 20a: 8f 01 movw r16, r30 - 20c: 62 09 sbc r22, r2 - 20e: 64 09 sbc r22, r4 - 210: 7a 09 sbc r23, r10 - 212: b1 09 sbc r27, r1 - 214: ba 09 sbc r27, r10 - 216: bf 09 sbc r27, r15 - 218: 0e 0a sbc r0, r30 - 21a: 13 0a sbc r1, r19 - 21c: d2 09 sbc r29, r2 - 21e: db 09 sbc r29, r11 - 220: e9 09 sbc r30, r9 - 222: eb 09 sbc r30, r11 - 224: ed 09 sbc r30, r13 - 226: f7 09 sbc r31, r7 - 228: 01 0a sbc r0, r17 - 22a: 0c 0a sbc r0, r28 - 22c: cb 09 sbc r28, r11 - 22e: d4 09 sbc r29, r4 - 230: dd 09 sbc r29, r13 - 232: eb 09 sbc r30, r11 - 234: ed 09 sbc r30, r13 - 236: ef 09 sbc r30, r15 - 238: f9 09 sbc r31, r9 - 23a: 03 0a sbc r0, r19 + 1f4: 0c 94 dd 10 jmp 0x21ba ; 0x21ba <__vector_125> + 1f8: 0c 94 92 11 jmp 0x2324 ; 0x2324 <__vector_126> + 1fc: 75 01 movw r14, r10 + 1fe: 77 01 movw r14, r14 + 200: 79 01 movw r14, r18 + 202: 7b 01 movw r14, r22 + 204: 7d 01 movw r14, r26 + 206: 82 01 movw r16, r4 + 208: 7f 01 movw r14, r30 + 20a: 81 01 movw r16, r2 + 20c: 54 09 sbc r21, r4 + 20e: 56 09 sbc r21, r6 + 210: 6c 09 sbc r22, r12 + 212: a3 09 sbc r26, r3 + 214: ac 09 sbc r26, r12 + 216: b1 09 sbc r27, r1 + 218: 00 0a sbc r0, r16 + 21a: 05 0a sbc r0, r21 + 21c: c4 09 sbc r28, r4 + 21e: cd 09 sbc r28, r13 + 220: db 09 sbc r29, r11 + 222: dd 09 sbc r29, r13 + 224: df 09 sbc r29, r15 + 226: e9 09 sbc r30, r9 + 228: f3 09 sbc r31, r3 + 22a: fe 09 sbc r31, r14 + 22c: bd 09 sbc r27, r13 + 22e: c6 09 sbc r28, r6 + 230: cf 09 sbc r28, r15 + 232: dd 09 sbc r29, r13 + 234: df 09 sbc r29, r15 + 236: e1 09 sbc r30, r1 + 238: eb 09 sbc r30, r11 + 23a: f5 09 sbc r31, r5 0000023c <__ctors_end>: 23c: 11 24 eor r1, r1 @@ -324,7 +324,7 @@ Disassembly of section .text: 248: 10 e2 ldi r17, 0x20 ; 32 24a: a0 e0 ldi r26, 0x00 ; 0 24c: b0 e2 ldi r27, 0x20 ; 32 - 24e: ee e2 ldi r30, 0x2E ; 46 + 24e: e2 e1 ldi r30, 0x12 ; 18 250: f5 e2 ldi r31, 0x25 ; 37 252: 02 c0 rjmp .+4 ; 0x258 <__do_copy_data+0x10> 254: 05 90 lpm r0, Z+ @@ -343,11 +343,11 @@ Disassembly of section .text: 266: 1d 92 st X+, r1 00000268 <.do_clear_bss_start>: - 268: a8 35 cpi r26, 0x58 ; 88 + 268: ac 35 cpi r26, 0x5C ; 92 26a: b2 07 cpc r27, r18 26c: e1 f7 brne .-8 ; 0x266 <.do_clear_bss_loop> 26e: 1b d0 rcall .+54 ; 0x2a6
- 270: 0c 94 95 12 jmp 0x252a ; 0x252a <_exit> + 270: 0c 94 87 12 jmp 0x250e ; 0x250e <_exit> 00000274 <__bad_interrupt>: 274: c5 ce rjmp .-630 ; 0x0 <__vectors> @@ -377,4027 +377,4026 @@ Disassembly of section .text: 29a: 51 e0 ldi r21, 0x01 ; 1 29c: 6e ee ldi r22, 0xEE ; 238 29e: 72 e0 ldi r23, 0x02 ; 2 - 2a0: 8a 58 subi r24, 0x8A ; 138 + 2a0: 86 58 subi r24, 0x86 ; 134 2a2: 99 4d sbci r25, 0xD9 ; 217 - 2a4: c0 c6 rjmp .+3456 ; 0x1026 + 2a4: b2 c6 rjmp .+3428 ; 0x100a 000002a6
: 2a6: 87 e0 ldi r24, 0x07 ; 7 2a8: 80 93 a2 00 sts 0x00A2, r24 ; 0x8000a2 <__TEXT_REGION_LENGTH__+0x7000a2> 2ac: 78 94 sei - 2ae: 0d d6 rcall .+3098 ; 0xeca + 2ae: ff d5 rcall .+3070 ; 0xeae 2b0: e9 df rcall .-46 ; 0x284 - 2b2: 92 d7 rcall .+3876 ; 0x11d8 - 2b4: b2 d0 rcall .+356 ; 0x41a - 2b6: d5 d0 rcall .+426 ; 0x462 + 2b2: 84 d7 rcall .+3848 ; 0x11bc + 2b4: a4 d0 rcall .+328 ; 0x3fe + 2b6: c7 d0 rcall .+398 ; 0x446 2b8: 60 e0 ldi r22, 0x00 ; 0 2ba: 80 e0 ldi r24, 0x00 ; 0 - 2bc: 7f d0 rcall .+254 ; 0x3bc - 2be: 6b d0 rcall .+214 ; 0x396 + 2bc: 71 d0 rcall .+226 ; 0x3a0 + 2be: 5d d0 rcall .+186 ; 0x37a 2c0: 8c e0 ldi r24, 0x0C ; 12 - 2c2: 5f d0 rcall .+190 ; 0x382 - 2c4: 17 d5 rcall .+2606 ; 0xcf4 - 2c6: b1 d5 rcall .+2914 ; 0xe2a - 2c8: ca d5 rcall .+2964 ; 0xe5e + 2c2: 51 d0 rcall .+162 ; 0x366 + 2c4: 09 d5 rcall .+2578 ; 0xcd8 + 2c6: a3 d5 rcall .+2886 ; 0xe0e + 2c8: bc d5 rcall .+2936 ; 0xe42 2ca: d5 df rcall .-86 ; 0x276 - ... - 2e8: f1 cf rjmp .-30 ; 0x2cc + 2cc: ff cf rjmp .-2 ; 0x2cc -000002ea : - 2ea: 08 95 ret +000002ce : + 2ce: 08 95 ret -000002ec : - 2ec: 08 95 ret +000002d0 : + 2d0: 08 95 ret -000002ee : - 2ee: e0 91 00 20 lds r30, 0x2000 ; 0x802000 <__data_start> - 2f2: 8e 2f mov r24, r30 - 2f4: 90 e0 ldi r25, 0x00 ; 0 - 2f6: 88 30 cpi r24, 0x08 ; 8 - 2f8: 91 05 cpc r25, r1 - 2fa: 90 f4 brcc .+36 ; 0x320 - 2fc: fc 01 movw r30, r24 - 2fe: e2 50 subi r30, 0x02 ; 2 - 300: ff 4f sbci r31, 0xFF ; 255 - 302: 0c 94 86 12 jmp 0x250c ; 0x250c <__tablejump2__> - 306: 10 d1 rcall .+544 ; 0x528 - 308: 0b c0 rjmp .+22 ; 0x320 - 30a: 8c d1 rcall .+792 ; 0x624 - 30c: 09 c0 rjmp .+18 ; 0x320 - 30e: 2b d2 rcall .+1110 ; 0x766 - 310: 07 c0 rjmp .+14 ; 0x320 - 312: e7 d2 rcall .+1486 ; 0x8e2 - 314: 05 c0 rjmp .+10 ; 0x320 - 316: 53 d3 rcall .+1702 ; 0x9be - 318: 03 c0 rjmp .+6 ; 0x320 - 31a: 47 d4 rcall .+2190 ; 0xbaa - 31c: 01 c0 rjmp .+2 ; 0x320 - 31e: bc d4 rcall .+2424 ; 0xc98 - 320: 90 91 c2 20 lds r25, 0x20C2 ; 0x8020c2 - 324: 81 e0 ldi r24, 0x01 ; 1 - 326: 91 11 cpse r25, r1 - 328: 80 e0 ldi r24, 0x00 ; 0 - 32a: 80 93 c2 20 sts 0x20C2, r24 ; 0x8020c2 - 32e: 08 95 ret +000002d2 : + 2d2: e0 91 00 20 lds r30, 0x2000 ; 0x802000 <__data_start> + 2d6: 8e 2f mov r24, r30 + 2d8: 90 e0 ldi r25, 0x00 ; 0 + 2da: 88 30 cpi r24, 0x08 ; 8 + 2dc: 91 05 cpc r25, r1 + 2de: 90 f4 brcc .+36 ; 0x304 + 2e0: fc 01 movw r30, r24 + 2e2: e2 50 subi r30, 0x02 ; 2 + 2e4: ff 4f sbci r31, 0xFF ; 255 + 2e6: 0c 94 78 12 jmp 0x24f0 ; 0x24f0 <__tablejump2__> + 2ea: 10 d1 rcall .+544 ; 0x50c + 2ec: 0b c0 rjmp .+22 ; 0x304 + 2ee: 8c d1 rcall .+792 ; 0x608 + 2f0: 09 c0 rjmp .+18 ; 0x304 + 2f2: 2b d2 rcall .+1110 ; 0x74a + 2f4: 07 c0 rjmp .+14 ; 0x304 + 2f6: e7 d2 rcall .+1486 ; 0x8c6 + 2f8: 05 c0 rjmp .+10 ; 0x304 + 2fa: 53 d3 rcall .+1702 ; 0x9a2 + 2fc: 03 c0 rjmp .+6 ; 0x304 + 2fe: 47 d4 rcall .+2190 ; 0xb8e + 300: 01 c0 rjmp .+2 ; 0x304 + 302: bc d4 rcall .+2424 ; 0xc7c + 304: 90 91 c2 20 lds r25, 0x20C2 ; 0x8020c2 + 308: 81 e0 ldi r24, 0x01 ; 1 + 30a: 91 11 cpse r25, r1 + 30c: 80 e0 ldi r24, 0x00 ; 0 + 30e: 80 93 c2 20 sts 0x20C2, r24 ; 0x8020c2 + 312: 08 95 ret -00000330 : - 330: 81 e0 ldi r24, 0x01 ; 1 - 332: 80 93 c3 20 sts 0x20C3, r24 ; 0x8020c3 - 336: 43 e4 ldi r20, 0x43 ; 67 - 338: 51 e0 ldi r21, 0x01 ; 1 - 33a: 6e ee ldi r22, 0xEE ; 238 - 33c: 72 e0 ldi r23, 0x02 ; 2 - 33e: 86 e7 ldi r24, 0x76 ; 118 - 340: 96 e2 ldi r25, 0x26 ; 38 - 342: 71 d6 rcall .+3298 ; 0x1026 - 344: 81 e0 ldi r24, 0x01 ; 1 - 346: 08 95 ret +00000314 : + 314: 81 e0 ldi r24, 0x01 ; 1 + 316: 80 93 c3 20 sts 0x20C3, r24 ; 0x8020c3 + 31a: 43 e4 ldi r20, 0x43 ; 67 + 31c: 51 e0 ldi r21, 0x01 ; 1 + 31e: 6e ee ldi r22, 0xEE ; 238 + 320: 72 e0 ldi r23, 0x02 ; 2 + 322: 8a e7 ldi r24, 0x7A ; 122 + 324: 96 e2 ldi r25, 0x26 ; 38 + 326: 71 d6 rcall .+3298 ; 0x100a + 328: 81 e0 ldi r24, 0x01 ; 1 + 32a: 08 95 ret -00000348 : - 348: 10 92 c3 20 sts 0x20C3, r1 ; 0x8020c3 - 34c: 08 95 ret +0000032c : + 32c: 10 92 c3 20 sts 0x20C3, r1 ; 0x8020c3 + 330: 08 95 ret -0000034e : - 34e: 81 e0 ldi r24, 0x01 ; 1 - 350: 08 95 ret +00000332 : + 332: 81 e0 ldi r24, 0x01 ; 1 + 334: 08 95 ret -00000352 : - 352: 81 e0 ldi r24, 0x01 ; 1 - 354: 08 95 ret +00000336 : + 336: 81 e0 ldi r24, 0x01 ; 1 + 338: 08 95 ret -00000356 : - 356: 10 92 20 02 sts 0x0220, r1 ; 0x800220 <__TEXT_REGION_LENGTH__+0x700220> - 35a: 98 2f mov r25, r24 - 35c: 9c 71 andi r25, 0x1C ; 28 - 35e: 93 68 ori r25, 0x83 ; 131 - 360: 90 93 20 02 sts 0x0220, r25 ; 0x800220 <__TEXT_REGION_LENGTH__+0x700220> - 364: 87 ff sbrs r24, 7 - 366: 03 c0 rjmp .+6 ; 0x36e - 368: 90 e1 ldi r25, 0x10 ; 16 - 36a: 82 e0 ldi r24, 0x02 ; 2 - 36c: 02 c0 rjmp .+4 ; 0x372 - 36e: 90 e0 ldi r25, 0x00 ; 0 - 370: 80 e0 ldi r24, 0x00 ; 0 - 372: 89 2b or r24, r25 - 374: 80 93 21 02 sts 0x0221, r24 ; 0x800221 <__TEXT_REGION_LENGTH__+0x700221> - 378: 10 92 22 02 sts 0x0222, r1 ; 0x800222 <__TEXT_REGION_LENGTH__+0x700222> - 37c: 10 92 26 02 sts 0x0226, r1 ; 0x800226 <__TEXT_REGION_LENGTH__+0x700226> - 380: 08 95 ret +0000033a : + 33a: 10 92 20 02 sts 0x0220, r1 ; 0x800220 <__TEXT_REGION_LENGTH__+0x700220> + 33e: 98 2f mov r25, r24 + 340: 9c 71 andi r25, 0x1C ; 28 + 342: 93 68 ori r25, 0x83 ; 131 + 344: 90 93 20 02 sts 0x0220, r25 ; 0x800220 <__TEXT_REGION_LENGTH__+0x700220> + 348: 87 ff sbrs r24, 7 + 34a: 03 c0 rjmp .+6 ; 0x352 + 34c: 90 e1 ldi r25, 0x10 ; 16 + 34e: 82 e0 ldi r24, 0x02 ; 2 + 350: 02 c0 rjmp .+4 ; 0x356 + 352: 90 e0 ldi r25, 0x00 ; 0 + 354: 80 e0 ldi r24, 0x00 ; 0 + 356: 89 2b or r24, r25 + 358: 80 93 21 02 sts 0x0221, r24 ; 0x800221 <__TEXT_REGION_LENGTH__+0x700221> + 35c: 10 92 22 02 sts 0x0222, r1 ; 0x800222 <__TEXT_REGION_LENGTH__+0x700222> + 360: 10 92 26 02 sts 0x0226, r1 ; 0x800226 <__TEXT_REGION_LENGTH__+0x700226> + 364: 08 95 ret -00000382 : - 382: e0 e0 ldi r30, 0x00 ; 0 - 384: f2 e0 ldi r31, 0x02 ; 2 - 386: 10 aa std Z+48, r1 ; 0x30 - 388: 83 68 ori r24, 0x83 ; 131 - 38a: 80 ab std Z+48, r24 ; 0x30 - 38c: 80 e1 ldi r24, 0x10 ; 16 - 38e: 81 ab std Z+49, r24 ; 0x31 - 390: 12 aa std Z+50, r1 ; 0x32 - 392: 16 aa std Z+54, r1 ; 0x36 - 394: 08 95 ret +00000366 : + 366: e0 e0 ldi r30, 0x00 ; 0 + 368: f2 e0 ldi r31, 0x02 ; 2 + 36a: 10 aa std Z+48, r1 ; 0x30 + 36c: 83 68 ori r24, 0x83 ; 131 + 36e: 80 ab std Z+48, r24 ; 0x30 + 370: 80 e1 ldi r24, 0x10 ; 16 + 372: 81 ab std Z+49, r24 ; 0x31 + 374: 12 aa std Z+50, r1 ; 0x32 + 376: 16 aa std Z+54, r1 ; 0x36 + 378: 08 95 ret -00000396 : - 396: e0 e0 ldi r30, 0x00 ; 0 - 398: f2 e0 ldi r31, 0x02 ; 2 - 39a: 10 a6 std Z+40, r1 ; 0x28 - 39c: 83 e8 ldi r24, 0x83 ; 131 - 39e: 80 a7 std Z+40, r24 ; 0x28 - 3a0: 8f e2 ldi r24, 0x2F ; 47 - 3a2: 81 a7 std Z+41, r24 ; 0x29 - 3a4: 12 a6 std Z+42, r1 ; 0x2a - 3a6: 16 a6 std Z+46, r1 ; 0x2e - 3a8: 08 95 ret +0000037a : + 37a: e0 e0 ldi r30, 0x00 ; 0 + 37c: f2 e0 ldi r31, 0x02 ; 2 + 37e: 10 a6 std Z+40, r1 ; 0x28 + 380: 83 e8 ldi r24, 0x83 ; 131 + 382: 80 a7 std Z+40, r24 ; 0x28 + 384: 8f e2 ldi r24, 0x2F ; 47 + 386: 81 a7 std Z+41, r24 ; 0x29 + 388: 12 a6 std Z+42, r1 ; 0x2a + 38a: 16 a6 std Z+46, r1 ; 0x2e + 38c: 08 95 ret -000003aa : - 3aa: aa ec ldi r26, 0xCA ; 202 - 3ac: b1 e0 ldi r27, 0x01 ; 1 - 3ae: 92 e0 ldi r25, 0x02 ; 2 - 3b0: 9c 93 st X, r25 - 3b2: e8 2f mov r30, r24 - 3b4: f0 e0 ldi r31, 0x00 ; 0 - 3b6: 84 91 lpm r24, Z - 3b8: 1c 92 st X, r1 - 3ba: 08 95 ret +0000038e : + 38e: aa ec ldi r26, 0xCA ; 202 + 390: b1 e0 ldi r27, 0x01 ; 1 + 392: 92 e0 ldi r25, 0x02 ; 2 + 394: 9c 93 st X, r25 + 396: e8 2f mov r30, r24 + 398: f0 e0 ldi r31, 0x00 ; 0 + 39a: 84 91 lpm r24, Z + 39c: 1c 92 st X, r1 + 39e: 08 95 ret -000003bc : - 3bc: 90 91 71 00 lds r25, 0x0071 ; 0x800071 <__TEXT_REGION_LENGTH__+0x700071> - 3c0: 9d 7f andi r25, 0xFD ; 253 - 3c2: 90 93 71 00 sts 0x0071, r25 ; 0x800071 <__TEXT_REGION_LENGTH__+0x700071> - 3c6: 10 92 00 02 sts 0x0200, r1 ; 0x800200 <__TEXT_REGION_LENGTH__+0x700200> - 3ca: 62 30 cpi r22, 0x02 ; 2 - 3cc: 11 f0 breq .+4 ; 0x3d2 - 3ce: 9c e1 ldi r25, 0x1C ; 28 - 3d0: 01 c0 rjmp .+2 ; 0x3d4 - 3d2: 9e e1 ldi r25, 0x1E ; 30 - 3d4: 90 93 01 02 sts 0x0201, r25 ; 0x800201 <__TEXT_REGION_LENGTH__+0x700201> - 3d8: 90 e4 ldi r25, 0x40 ; 64 - 3da: 90 93 02 02 sts 0x0202, r25 ; 0x800202 <__TEXT_REGION_LENGTH__+0x700202> - 3de: 81 11 cpse r24, r1 - 3e0: 02 c0 rjmp .+4 ; 0x3e6 - 3e2: 80 e4 ldi r24, 0x40 ; 64 - 3e4: 01 c0 rjmp .+2 ; 0x3e8 - 3e6: 80 ec ldi r24, 0xC0 ; 192 - 3e8: 80 93 03 02 sts 0x0203, r24 ; 0x800203 <__TEXT_REGION_LENGTH__+0x700203> - 3ec: 61 30 cpi r22, 0x01 ; 1 - 3ee: 11 f0 breq .+4 ; 0x3f4 - 3f0: 83 e0 ldi r24, 0x03 ; 3 - 3f2: 01 c0 rjmp .+2 ; 0x3f6 - 3f4: 82 e0 ldi r24, 0x02 ; 2 - 3f6: 80 93 04 02 sts 0x0204, r24 ; 0x800204 <__TEXT_REGION_LENGTH__+0x700204> - 3fa: 80 e2 ldi r24, 0x20 ; 32 - 3fc: d6 df rcall .-84 ; 0x3aa - 3fe: 80 93 0c 02 sts 0x020C, r24 ; 0x80020c <__TEXT_REGION_LENGTH__+0x70020c> - 402: 81 e2 ldi r24, 0x21 ; 33 - 404: d2 df rcall .-92 ; 0x3aa - 406: 80 93 0d 02 sts 0x020D, r24 ; 0x80020d <__TEXT_REGION_LENGTH__+0x70020d> - 40a: 10 92 18 02 sts 0x0218, r1 ; 0x800218 <__TEXT_REGION_LENGTH__+0x700218> - 40e: 10 92 19 02 sts 0x0219, r1 ; 0x800219 <__TEXT_REGION_LENGTH__+0x700219> - 412: 81 e0 ldi r24, 0x01 ; 1 - 414: 80 93 00 02 sts 0x0200, r24 ; 0x800200 <__TEXT_REGION_LENGTH__+0x700200> - 418: be cf rjmp .-132 ; 0x396 +000003a0 : + 3a0: 90 91 71 00 lds r25, 0x0071 ; 0x800071 <__TEXT_REGION_LENGTH__+0x700071> + 3a4: 9d 7f andi r25, 0xFD ; 253 + 3a6: 90 93 71 00 sts 0x0071, r25 ; 0x800071 <__TEXT_REGION_LENGTH__+0x700071> + 3aa: 10 92 00 02 sts 0x0200, r1 ; 0x800200 <__TEXT_REGION_LENGTH__+0x700200> + 3ae: 62 30 cpi r22, 0x02 ; 2 + 3b0: 11 f0 breq .+4 ; 0x3b6 + 3b2: 9c e1 ldi r25, 0x1C ; 28 + 3b4: 01 c0 rjmp .+2 ; 0x3b8 + 3b6: 9e e1 ldi r25, 0x1E ; 30 + 3b8: 90 93 01 02 sts 0x0201, r25 ; 0x800201 <__TEXT_REGION_LENGTH__+0x700201> + 3bc: 90 e4 ldi r25, 0x40 ; 64 + 3be: 90 93 02 02 sts 0x0202, r25 ; 0x800202 <__TEXT_REGION_LENGTH__+0x700202> + 3c2: 81 11 cpse r24, r1 + 3c4: 02 c0 rjmp .+4 ; 0x3ca + 3c6: 80 e4 ldi r24, 0x40 ; 64 + 3c8: 01 c0 rjmp .+2 ; 0x3cc + 3ca: 80 ec ldi r24, 0xC0 ; 192 + 3cc: 80 93 03 02 sts 0x0203, r24 ; 0x800203 <__TEXT_REGION_LENGTH__+0x700203> + 3d0: 61 30 cpi r22, 0x01 ; 1 + 3d2: 11 f0 breq .+4 ; 0x3d8 + 3d4: 83 e0 ldi r24, 0x03 ; 3 + 3d6: 01 c0 rjmp .+2 ; 0x3da + 3d8: 82 e0 ldi r24, 0x02 ; 2 + 3da: 80 93 04 02 sts 0x0204, r24 ; 0x800204 <__TEXT_REGION_LENGTH__+0x700204> + 3de: 80 e2 ldi r24, 0x20 ; 32 + 3e0: d6 df rcall .-84 ; 0x38e + 3e2: 80 93 0c 02 sts 0x020C, r24 ; 0x80020c <__TEXT_REGION_LENGTH__+0x70020c> + 3e6: 81 e2 ldi r24, 0x21 ; 33 + 3e8: d2 df rcall .-92 ; 0x38e + 3ea: 80 93 0d 02 sts 0x020D, r24 ; 0x80020d <__TEXT_REGION_LENGTH__+0x70020d> + 3ee: 10 92 18 02 sts 0x0218, r1 ; 0x800218 <__TEXT_REGION_LENGTH__+0x700218> + 3f2: 10 92 19 02 sts 0x0219, r1 ; 0x800219 <__TEXT_REGION_LENGTH__+0x700219> + 3f6: 81 e0 ldi r24, 0x01 ; 1 + 3f8: 80 93 00 02 sts 0x0200, r24 ; 0x800200 <__TEXT_REGION_LENGTH__+0x700200> + 3fc: be cf rjmp .-132 ; 0x37a -0000041a : - 41a: cf 93 push r28 - 41c: df 93 push r29 - 41e: e0 e7 ldi r30, 0x70 ; 112 - 420: f0 e0 ldi r31, 0x00 ; 0 - 422: 82 81 ldd r24, Z+2 ; 0x02 - 424: 8b 7f andi r24, 0xFB ; 251 - 426: 82 83 std Z+2, r24 ; 0x02 - 428: c0 e2 ldi r28, 0x20 ; 32 - 42a: d3 e0 ldi r29, 0x03 ; 3 - 42c: 8d e0 ldi r24, 0x0D ; 13 - 42e: 88 83 st Y, r24 - 430: 80 e4 ldi r24, 0x40 ; 64 - 432: 89 83 std Y+1, r24 ; 0x01 - 434: 89 e0 ldi r24, 0x09 ; 9 - 436: 8a 83 std Y+2, r24 ; 0x02 - 438: 83 e3 ldi r24, 0x33 ; 51 - 43a: b7 df rcall .-146 ; 0x3aa - 43c: 88 87 std Y+8, r24 ; 0x08 - 43e: 82 e3 ldi r24, 0x32 ; 50 - 440: b4 df rcall .-152 ; 0x3aa - 442: 89 87 std Y+9, r24 ; 0x09 - 444: 87 e3 ldi r24, 0x37 ; 55 - 446: b1 df rcall .-158 ; 0x3aa - 448: 8a 87 std Y+10, r24 ; 0x0a - 44a: 86 e3 ldi r24, 0x36 ; 54 - 44c: ae df rcall .-164 ; 0x3aa - 44e: 8b 87 std Y+11, r24 ; 0x0b - 450: e0 e2 ldi r30, 0x20 ; 32 - 452: f6 e0 ldi r31, 0x06 ; 6 - 454: 80 81 ld r24, Z - 456: 83 60 ori r24, 0x03 ; 3 - 458: 80 83 st Z, r24 - 45a: 14 82 std Z+4, r1 ; 0x04 - 45c: df 91 pop r29 - 45e: cf 91 pop r28 - 460: 08 95 ret +000003fe : + 3fe: cf 93 push r28 + 400: df 93 push r29 + 402: e0 e7 ldi r30, 0x70 ; 112 + 404: f0 e0 ldi r31, 0x00 ; 0 + 406: 82 81 ldd r24, Z+2 ; 0x02 + 408: 8b 7f andi r24, 0xFB ; 251 + 40a: 82 83 std Z+2, r24 ; 0x02 + 40c: c0 e2 ldi r28, 0x20 ; 32 + 40e: d3 e0 ldi r29, 0x03 ; 3 + 410: 8d e0 ldi r24, 0x0D ; 13 + 412: 88 83 st Y, r24 + 414: 80 e4 ldi r24, 0x40 ; 64 + 416: 89 83 std Y+1, r24 ; 0x01 + 418: 89 e0 ldi r24, 0x09 ; 9 + 41a: 8a 83 std Y+2, r24 ; 0x02 + 41c: 83 e3 ldi r24, 0x33 ; 51 + 41e: b7 df rcall .-146 ; 0x38e + 420: 88 87 std Y+8, r24 ; 0x08 + 422: 82 e3 ldi r24, 0x32 ; 50 + 424: b4 df rcall .-152 ; 0x38e + 426: 89 87 std Y+9, r24 ; 0x09 + 428: 87 e3 ldi r24, 0x37 ; 55 + 42a: b1 df rcall .-158 ; 0x38e + 42c: 8a 87 std Y+10, r24 ; 0x0a + 42e: 86 e3 ldi r24, 0x36 ; 54 + 430: ae df rcall .-164 ; 0x38e + 432: 8b 87 std Y+11, r24 ; 0x0b + 434: e0 e2 ldi r30, 0x20 ; 32 + 436: f6 e0 ldi r31, 0x06 ; 6 + 438: 80 81 ld r24, Z + 43a: 83 60 ori r24, 0x03 ; 3 + 43c: 80 83 st Z, r24 + 43e: 14 82 std Z+4, r1 ; 0x04 + 440: df 91 pop r29 + 442: cf 91 pop r28 + 444: 08 95 ret -00000462 : - 462: e0 e7 ldi r30, 0x70 ; 112 - 464: f0 e0 ldi r31, 0x00 ; 0 - 466: 80 81 ld r24, Z - 468: 8e 7f andi r24, 0xFE ; 254 - 46a: 80 83 st Z, r24 - 46c: 80 e8 ldi r24, 0x80 ; 128 - 46e: 80 93 00 01 sts 0x0100, r24 ; 0x800100 <__TEXT_REGION_LENGTH__+0x700100> - 472: 08 95 ret +00000446 : + 446: e0 e7 ldi r30, 0x70 ; 112 + 448: f0 e0 ldi r31, 0x00 ; 0 + 44a: 80 81 ld r24, Z + 44c: 8e 7f andi r24, 0xFE ; 254 + 44e: 80 83 st Z, r24 + 450: 80 e8 ldi r24, 0x80 ; 128 + 452: 80 93 00 01 sts 0x0100, r24 ; 0x800100 <__TEXT_REGION_LENGTH__+0x700100> + 456: 08 95 ret -00000474 : - 474: e0 e0 ldi r30, 0x00 ; 0 - 476: f1 e0 ldi r31, 0x01 ; 1 - 478: 10 8a std Z+16, r1 ; 0x10 - 47a: 80 e4 ldi r24, 0x40 ; 64 - 47c: 80 8b std Z+16, r24 ; 0x10 - 47e: 10 a2 std Z+32, r1 ; 0x20 - 480: 80 a3 std Z+32, r24 ; 0x20 - 482: 10 aa std Z+48, r1 ; 0x30 - 484: 80 ab std Z+48, r24 ; 0x30 - 486: e0 e4 ldi r30, 0x40 ; 64 - 488: f1 e0 ldi r31, 0x01 ; 1 - 48a: 10 82 st Z, r1 - 48c: 80 83 st Z, r24 - 48e: 10 92 c2 20 sts 0x20C2, r1 ; 0x8020c2 - 492: 10 92 c1 20 sts 0x20C1, r1 ; 0x8020c1 - 496: 08 95 ret +00000458 : + 458: e0 e0 ldi r30, 0x00 ; 0 + 45a: f1 e0 ldi r31, 0x01 ; 1 + 45c: 10 8a std Z+16, r1 ; 0x10 + 45e: 80 e4 ldi r24, 0x40 ; 64 + 460: 80 8b std Z+16, r24 ; 0x10 + 462: 10 a2 std Z+32, r1 ; 0x20 + 464: 80 a3 std Z+32, r24 ; 0x20 + 466: 10 aa std Z+48, r1 ; 0x30 + 468: 80 ab std Z+48, r24 ; 0x30 + 46a: e0 e4 ldi r30, 0x40 ; 64 + 46c: f1 e0 ldi r31, 0x01 ; 1 + 46e: 10 82 st Z, r1 + 470: 80 83 st Z, r24 + 472: 10 92 c2 20 sts 0x20C2, r1 ; 0x8020c2 + 476: 10 92 c1 20 sts 0x20C1, r1 ; 0x8020c1 + 47a: 08 95 ret -00000498 : - 498: 10 92 00 20 sts 0x2000, r1 ; 0x802000 <__data_start> - 49c: eb df rcall .-42 ; 0x474 - 49e: e0 e0 ldi r30, 0x00 ; 0 - 4a0: f1 e0 ldi r31, 0x01 ; 1 - 4a2: 16 aa std Z+54, r1 ; 0x36 - 4a4: 34 e2 ldi r19, 0x24 ; 36 - 4a6: 30 ab std Z+48, r19 ; 0x30 - 4a8: 11 aa std Z+49, r1 ; 0x31 - 4aa: 29 e5 ldi r18, 0x59 ; 89 - 4ac: 22 ab std Z+50, r18 ; 0x32 - 4ae: 82 e0 ldi r24, 0x02 ; 2 - 4b0: 83 ab std Z+51, r24 ; 0x33 - 4b2: 80 91 02 20 lds r24, 0x2002 ; 0x802002 - 4b6: 90 91 03 20 lds r25, 0x2003 ; 0x802003 - 4ba: 84 ab std Z+52, r24 ; 0x34 - 4bc: 95 ab std Z+53, r25 ; 0x35 - 4be: 86 e7 ldi r24, 0x76 ; 118 - 4c0: 94 e2 ldi r25, 0x24 ; 36 - 4c2: 80 af std Z+56, r24 ; 0x38 - 4c4: 91 af std Z+57, r25 ; 0x39 - 4c6: 12 ae std Z+58, r1 ; 0x3a - 4c8: 8b e3 ldi r24, 0x3B ; 59 - 4ca: 84 af std Z+60, r24 ; 0x3c - 4cc: 83 e0 ldi r24, 0x03 ; 3 - 4ce: 80 93 3d 01 sts 0x013D, r24 ; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d> - 4d2: 10 92 3e 01 sts 0x013E, r1 ; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e> - 4d6: 90 a9 ldd r25, Z+48 ; 0x30 - 4d8: 90 68 ori r25, 0x80 ; 128 - 4da: 90 ab std Z+48, r25 ; 0x30 - 4dc: 10 92 46 01 sts 0x0146, r1 ; 0x800146 <__TEXT_REGION_LENGTH__+0x700146> - 4e0: e0 e4 ldi r30, 0x40 ; 64 - 4e2: f1 e0 ldi r31, 0x01 ; 1 - 4e4: 30 83 st Z, r19 - 4e6: 10 92 41 01 sts 0x0141, r1 ; 0x800141 <__TEXT_REGION_LENGTH__+0x700141> - 4ea: 20 93 42 01 sts 0x0142, r18 ; 0x800142 <__TEXT_REGION_LENGTH__+0x700142> - 4ee: 80 93 43 01 sts 0x0143, r24 ; 0x800143 <__TEXT_REGION_LENGTH__+0x700143> - 4f2: 20 91 04 20 lds r18, 0x2004 ; 0x802004 - 4f6: 30 91 05 20 lds r19, 0x2005 ; 0x802005 - 4fa: 20 93 44 01 sts 0x0144, r18 ; 0x800144 <__TEXT_REGION_LENGTH__+0x700144> - 4fe: 30 93 45 01 sts 0x0145, r19 ; 0x800145 <__TEXT_REGION_LENGTH__+0x700145> - 502: 26 e6 ldi r18, 0x66 ; 102 - 504: 32 e2 ldi r19, 0x22 ; 34 - 506: 20 93 48 01 sts 0x0148, r18 ; 0x800148 <__TEXT_REGION_LENGTH__+0x700148> - 50a: 30 93 49 01 sts 0x0149, r19 ; 0x800149 <__TEXT_REGION_LENGTH__+0x700149> - 50e: 10 92 4a 01 sts 0x014A, r1 ; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a> - 512: 99 e3 ldi r25, 0x39 ; 57 - 514: 90 93 4c 01 sts 0x014C, r25 ; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c> - 518: 80 93 4d 01 sts 0x014D, r24 ; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d> - 51c: 10 92 4e 01 sts 0x014E, r1 ; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e> - 520: 80 81 ld r24, Z - 522: 80 68 ori r24, 0x80 ; 128 - 524: 80 83 st Z, r24 - 526: 08 95 ret +0000047c : + 47c: 10 92 00 20 sts 0x2000, r1 ; 0x802000 <__data_start> + 480: eb df rcall .-42 ; 0x458 + 482: e0 e0 ldi r30, 0x00 ; 0 + 484: f1 e0 ldi r31, 0x01 ; 1 + 486: 16 aa std Z+54, r1 ; 0x36 + 488: 34 e2 ldi r19, 0x24 ; 36 + 48a: 30 ab std Z+48, r19 ; 0x30 + 48c: 11 aa std Z+49, r1 ; 0x31 + 48e: 29 e5 ldi r18, 0x59 ; 89 + 490: 22 ab std Z+50, r18 ; 0x32 + 492: 82 e0 ldi r24, 0x02 ; 2 + 494: 83 ab std Z+51, r24 ; 0x33 + 496: 80 91 02 20 lds r24, 0x2002 ; 0x802002 + 49a: 90 91 03 20 lds r25, 0x2003 ; 0x802003 + 49e: 84 ab std Z+52, r24 ; 0x34 + 4a0: 95 ab std Z+53, r25 ; 0x35 + 4a2: 8a e7 ldi r24, 0x7A ; 122 + 4a4: 94 e2 ldi r25, 0x24 ; 36 + 4a6: 80 af std Z+56, r24 ; 0x38 + 4a8: 91 af std Z+57, r25 ; 0x39 + 4aa: 12 ae std Z+58, r1 ; 0x3a + 4ac: 8b e3 ldi r24, 0x3B ; 59 + 4ae: 84 af std Z+60, r24 ; 0x3c + 4b0: 83 e0 ldi r24, 0x03 ; 3 + 4b2: 80 93 3d 01 sts 0x013D, r24 ; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d> + 4b6: 10 92 3e 01 sts 0x013E, r1 ; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e> + 4ba: 90 a9 ldd r25, Z+48 ; 0x30 + 4bc: 90 68 ori r25, 0x80 ; 128 + 4be: 90 ab std Z+48, r25 ; 0x30 + 4c0: 10 92 46 01 sts 0x0146, r1 ; 0x800146 <__TEXT_REGION_LENGTH__+0x700146> + 4c4: e0 e4 ldi r30, 0x40 ; 64 + 4c6: f1 e0 ldi r31, 0x01 ; 1 + 4c8: 30 83 st Z, r19 + 4ca: 10 92 41 01 sts 0x0141, r1 ; 0x800141 <__TEXT_REGION_LENGTH__+0x700141> + 4ce: 20 93 42 01 sts 0x0142, r18 ; 0x800142 <__TEXT_REGION_LENGTH__+0x700142> + 4d2: 80 93 43 01 sts 0x0143, r24 ; 0x800143 <__TEXT_REGION_LENGTH__+0x700143> + 4d6: 20 91 04 20 lds r18, 0x2004 ; 0x802004 + 4da: 30 91 05 20 lds r19, 0x2005 ; 0x802005 + 4de: 20 93 44 01 sts 0x0144, r18 ; 0x800144 <__TEXT_REGION_LENGTH__+0x700144> + 4e2: 30 93 45 01 sts 0x0145, r19 ; 0x800145 <__TEXT_REGION_LENGTH__+0x700145> + 4e6: 2a e6 ldi r18, 0x6A ; 106 + 4e8: 32 e2 ldi r19, 0x22 ; 34 + 4ea: 20 93 48 01 sts 0x0148, r18 ; 0x800148 <__TEXT_REGION_LENGTH__+0x700148> + 4ee: 30 93 49 01 sts 0x0149, r19 ; 0x800149 <__TEXT_REGION_LENGTH__+0x700149> + 4f2: 10 92 4a 01 sts 0x014A, r1 ; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a> + 4f6: 99 e3 ldi r25, 0x39 ; 57 + 4f8: 90 93 4c 01 sts 0x014C, r25 ; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c> + 4fc: 80 93 4d 01 sts 0x014D, r24 ; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d> + 500: 10 92 4e 01 sts 0x014E, r1 ; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e> + 504: 80 81 ld r24, Z + 506: 80 68 ori r24, 0x80 ; 128 + 508: 80 83 st Z, r24 + 50a: 08 95 ret -00000528 : - 528: e0 e0 ldi r30, 0x00 ; 0 - 52a: f1 e0 ldi r31, 0x01 ; 1 - 52c: 10 8a std Z+16, r1 ; 0x10 - 52e: 80 e4 ldi r24, 0x40 ; 64 - 530: 80 8b std Z+16, r24 ; 0x10 - 532: 84 e0 ldi r24, 0x04 ; 4 - 534: 80 8b std Z+16, r24 ; 0x10 - 536: 11 8a std Z+17, r1 ; 0x11 - 538: 81 e9 ldi r24, 0x91 ; 145 - 53a: 82 8b std Z+18, r24 ; 0x12 - 53c: 80 e1 ldi r24, 0x10 ; 16 - 53e: 83 8b std Z+19, r24 ; 0x13 - 540: 87 e7 ldi r24, 0x77 ; 119 - 542: 91 e0 ldi r25, 0x01 ; 1 - 544: 84 8b std Z+20, r24 ; 0x14 - 546: 95 8b std Z+21, r25 ; 0x15 - 548: 84 e2 ldi r24, 0x24 ; 36 - 54a: 80 8f std Z+24, r24 ; 0x18 - 54c: 82 e0 ldi r24, 0x02 ; 2 - 54e: 81 8f std Z+25, r24 ; 0x19 - 550: 12 8e std Z+26, r1 ; 0x1a - 552: 40 91 c2 20 lds r20, 0x20C2 ; 0x8020c2 - 556: 2e ee ldi r18, 0xEE ; 238 - 558: 32 e0 ldi r19, 0x02 ; 2 - 55a: 42 9f mul r20, r18 - 55c: c0 01 movw r24, r0 - 55e: 43 9f mul r20, r19 - 560: 90 0d add r25, r0 - 562: 11 24 eor r1, r1 - 564: 8a 58 subi r24, 0x8A ; 138 - 566: 99 4d sbci r25, 0xD9 ; 217 - 568: 84 8f std Z+28, r24 ; 0x1c - 56a: 40 91 c2 20 lds r20, 0x20C2 ; 0x8020c2 - 56e: 42 9f mul r20, r18 - 570: c0 01 movw r24, r0 - 572: 43 9f mul r20, r19 - 574: 90 0d add r25, r0 - 576: 11 24 eor r1, r1 - 578: 8a 58 subi r24, 0x8A ; 138 - 57a: 99 4d sbci r25, 0xD9 ; 217 - 57c: 95 8f std Z+29, r25 ; 0x1d - 57e: 16 8e std Z+30, r1 ; 0x1e - 580: 80 89 ldd r24, Z+16 ; 0x10 - 582: 80 68 ori r24, 0x80 ; 128 - 584: 80 8b std Z+16, r24 ; 0x10 - 586: 08 95 ret +0000050c : + 50c: e0 e0 ldi r30, 0x00 ; 0 + 50e: f1 e0 ldi r31, 0x01 ; 1 + 510: 10 8a std Z+16, r1 ; 0x10 + 512: 80 e4 ldi r24, 0x40 ; 64 + 514: 80 8b std Z+16, r24 ; 0x10 + 516: 84 e0 ldi r24, 0x04 ; 4 + 518: 80 8b std Z+16, r24 ; 0x10 + 51a: 11 8a std Z+17, r1 ; 0x11 + 51c: 81 e9 ldi r24, 0x91 ; 145 + 51e: 82 8b std Z+18, r24 ; 0x12 + 520: 80 e1 ldi r24, 0x10 ; 16 + 522: 83 8b std Z+19, r24 ; 0x13 + 524: 87 e7 ldi r24, 0x77 ; 119 + 526: 91 e0 ldi r25, 0x01 ; 1 + 528: 84 8b std Z+20, r24 ; 0x14 + 52a: 95 8b std Z+21, r25 ; 0x15 + 52c: 84 e2 ldi r24, 0x24 ; 36 + 52e: 80 8f std Z+24, r24 ; 0x18 + 530: 82 e0 ldi r24, 0x02 ; 2 + 532: 81 8f std Z+25, r24 ; 0x19 + 534: 12 8e std Z+26, r1 ; 0x1a + 536: 40 91 c2 20 lds r20, 0x20C2 ; 0x8020c2 + 53a: 2e ee ldi r18, 0xEE ; 238 + 53c: 32 e0 ldi r19, 0x02 ; 2 + 53e: 42 9f mul r20, r18 + 540: c0 01 movw r24, r0 + 542: 43 9f mul r20, r19 + 544: 90 0d add r25, r0 + 546: 11 24 eor r1, r1 + 548: 86 58 subi r24, 0x86 ; 134 + 54a: 99 4d sbci r25, 0xD9 ; 217 + 54c: 84 8f std Z+28, r24 ; 0x1c + 54e: 40 91 c2 20 lds r20, 0x20C2 ; 0x8020c2 + 552: 42 9f mul r20, r18 + 554: c0 01 movw r24, r0 + 556: 43 9f mul r20, r19 + 558: 90 0d add r25, r0 + 55a: 11 24 eor r1, r1 + 55c: 86 58 subi r24, 0x86 ; 134 + 55e: 99 4d sbci r25, 0xD9 ; 217 + 560: 95 8f std Z+29, r25 ; 0x1d + 562: 16 8e std Z+30, r1 ; 0x1e + 564: 80 89 ldd r24, Z+16 ; 0x10 + 566: 80 68 ori r24, 0x80 ; 128 + 568: 80 8b std Z+16, r24 ; 0x10 + 56a: 08 95 ret -00000588 : - 588: 81 e0 ldi r24, 0x01 ; 1 - 58a: 80 93 00 20 sts 0x2000, r24 ; 0x802000 <__data_start> - 58e: 72 df rcall .-284 ; 0x474 - 590: e0 e0 ldi r30, 0x00 ; 0 - 592: f1 e0 ldi r31, 0x01 ; 1 - 594: 10 aa std Z+48, r1 ; 0x30 - 596: 80 e4 ldi r24, 0x40 ; 64 - 598: 80 ab std Z+48, r24 ; 0x30 - 59a: 84 e0 ldi r24, 0x04 ; 4 - 59c: 80 ab std Z+48, r24 ; 0x30 - 59e: 11 aa std Z+49, r1 ; 0x31 - 5a0: 12 aa std Z+50, r1 ; 0x32 - 5a2: 8b e4 ldi r24, 0x4B ; 75 - 5a4: 83 ab std Z+51, r24 ; 0x33 - 5a6: 14 aa std Z+52, r1 ; 0x34 - 5a8: 15 aa std Z+53, r1 ; 0x35 - 5aa: 16 aa std Z+54, r1 ; 0x36 - 5ac: 81 e0 ldi r24, 0x01 ; 1 - 5ae: 90 e2 ldi r25, 0x20 ; 32 - 5b0: 80 af std Z+56, r24 ; 0x38 - 5b2: 91 af std Z+57, r25 ; 0x39 - 5b4: 12 ae std Z+58, r1 ; 0x3a - 5b6: 80 ea ldi r24, 0xA0 ; 160 - 5b8: 84 af std Z+60, r24 ; 0x3c - 5ba: 88 e0 ldi r24, 0x08 ; 8 - 5bc: 80 93 3d 01 sts 0x013D, r24 ; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d> - 5c0: 10 92 3e 01 sts 0x013E, r1 ; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e> - 5c4: 80 a9 ldd r24, Z+48 ; 0x30 - 5c6: 80 6a ori r24, 0xA0 ; 160 - 5c8: 80 ab std Z+48, r24 ; 0x30 - 5ca: 85 e5 ldi r24, 0x55 ; 85 - 5cc: 80 93 a0 08 sts 0x08A0, r24 ; 0x8008a0 <__TEXT_REGION_LENGTH__+0x7008a0> - 5d0: 10 92 46 01 sts 0x0146, r1 ; 0x800146 <__TEXT_REGION_LENGTH__+0x700146> - 5d4: e0 e4 ldi r30, 0x40 ; 64 - 5d6: f1 e0 ldi r31, 0x01 ; 1 - 5d8: 84 e2 ldi r24, 0x24 ; 36 - 5da: 80 83 st Z, r24 - 5dc: 10 92 41 01 sts 0x0141, r1 ; 0x800141 <__TEXT_REGION_LENGTH__+0x700141> - 5e0: 89 e5 ldi r24, 0x59 ; 89 - 5e2: 80 93 42 01 sts 0x0142, r24 ; 0x800142 <__TEXT_REGION_LENGTH__+0x700142> - 5e6: 82 e0 ldi r24, 0x02 ; 2 - 5e8: 80 93 43 01 sts 0x0143, r24 ; 0x800143 <__TEXT_REGION_LENGTH__+0x700143> - 5ec: 80 91 02 20 lds r24, 0x2002 ; 0x802002 - 5f0: 90 91 03 20 lds r25, 0x2003 ; 0x802003 - 5f4: 80 93 44 01 sts 0x0144, r24 ; 0x800144 <__TEXT_REGION_LENGTH__+0x700144> - 5f8: 90 93 45 01 sts 0x0145, r25 ; 0x800145 <__TEXT_REGION_LENGTH__+0x700145> - 5fc: 86 e7 ldi r24, 0x76 ; 118 - 5fe: 94 e2 ldi r25, 0x24 ; 36 - 600: 80 93 48 01 sts 0x0148, r24 ; 0x800148 <__TEXT_REGION_LENGTH__+0x700148> - 604: 90 93 49 01 sts 0x0149, r25 ; 0x800149 <__TEXT_REGION_LENGTH__+0x700149> - 608: 10 92 4a 01 sts 0x014A, r1 ; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a> - 60c: 8b e3 ldi r24, 0x3B ; 59 - 60e: 80 93 4c 01 sts 0x014C, r24 ; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c> - 612: 83 e0 ldi r24, 0x03 ; 3 - 614: 80 93 4d 01 sts 0x014D, r24 ; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d> - 618: 10 92 4e 01 sts 0x014E, r1 ; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e> - 61c: 80 81 ld r24, Z - 61e: 80 68 ori r24, 0x80 ; 128 - 620: 80 83 st Z, r24 - 622: 08 95 ret +0000056c : + 56c: 81 e0 ldi r24, 0x01 ; 1 + 56e: 80 93 00 20 sts 0x2000, r24 ; 0x802000 <__data_start> + 572: 72 df rcall .-284 ; 0x458 + 574: e0 e0 ldi r30, 0x00 ; 0 + 576: f1 e0 ldi r31, 0x01 ; 1 + 578: 10 aa std Z+48, r1 ; 0x30 + 57a: 80 e4 ldi r24, 0x40 ; 64 + 57c: 80 ab std Z+48, r24 ; 0x30 + 57e: 84 e0 ldi r24, 0x04 ; 4 + 580: 80 ab std Z+48, r24 ; 0x30 + 582: 11 aa std Z+49, r1 ; 0x31 + 584: 12 aa std Z+50, r1 ; 0x32 + 586: 8b e4 ldi r24, 0x4B ; 75 + 588: 83 ab std Z+51, r24 ; 0x33 + 58a: 14 aa std Z+52, r1 ; 0x34 + 58c: 15 aa std Z+53, r1 ; 0x35 + 58e: 16 aa std Z+54, r1 ; 0x36 + 590: 81 e0 ldi r24, 0x01 ; 1 + 592: 90 e2 ldi r25, 0x20 ; 32 + 594: 80 af std Z+56, r24 ; 0x38 + 596: 91 af std Z+57, r25 ; 0x39 + 598: 12 ae std Z+58, r1 ; 0x3a + 59a: 80 ea ldi r24, 0xA0 ; 160 + 59c: 84 af std Z+60, r24 ; 0x3c + 59e: 88 e0 ldi r24, 0x08 ; 8 + 5a0: 80 93 3d 01 sts 0x013D, r24 ; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d> + 5a4: 10 92 3e 01 sts 0x013E, r1 ; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e> + 5a8: 80 a9 ldd r24, Z+48 ; 0x30 + 5aa: 80 6a ori r24, 0xA0 ; 160 + 5ac: 80 ab std Z+48, r24 ; 0x30 + 5ae: 85 e5 ldi r24, 0x55 ; 85 + 5b0: 80 93 a0 08 sts 0x08A0, r24 ; 0x8008a0 <__TEXT_REGION_LENGTH__+0x7008a0> + 5b4: 10 92 46 01 sts 0x0146, r1 ; 0x800146 <__TEXT_REGION_LENGTH__+0x700146> + 5b8: e0 e4 ldi r30, 0x40 ; 64 + 5ba: f1 e0 ldi r31, 0x01 ; 1 + 5bc: 84 e2 ldi r24, 0x24 ; 36 + 5be: 80 83 st Z, r24 + 5c0: 10 92 41 01 sts 0x0141, r1 ; 0x800141 <__TEXT_REGION_LENGTH__+0x700141> + 5c4: 89 e5 ldi r24, 0x59 ; 89 + 5c6: 80 93 42 01 sts 0x0142, r24 ; 0x800142 <__TEXT_REGION_LENGTH__+0x700142> + 5ca: 82 e0 ldi r24, 0x02 ; 2 + 5cc: 80 93 43 01 sts 0x0143, r24 ; 0x800143 <__TEXT_REGION_LENGTH__+0x700143> + 5d0: 80 91 02 20 lds r24, 0x2002 ; 0x802002 + 5d4: 90 91 03 20 lds r25, 0x2003 ; 0x802003 + 5d8: 80 93 44 01 sts 0x0144, r24 ; 0x800144 <__TEXT_REGION_LENGTH__+0x700144> + 5dc: 90 93 45 01 sts 0x0145, r25 ; 0x800145 <__TEXT_REGION_LENGTH__+0x700145> + 5e0: 8a e7 ldi r24, 0x7A ; 122 + 5e2: 94 e2 ldi r25, 0x24 ; 36 + 5e4: 80 93 48 01 sts 0x0148, r24 ; 0x800148 <__TEXT_REGION_LENGTH__+0x700148> + 5e8: 90 93 49 01 sts 0x0149, r25 ; 0x800149 <__TEXT_REGION_LENGTH__+0x700149> + 5ec: 10 92 4a 01 sts 0x014A, r1 ; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a> + 5f0: 8b e3 ldi r24, 0x3B ; 59 + 5f2: 80 93 4c 01 sts 0x014C, r24 ; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c> + 5f6: 83 e0 ldi r24, 0x03 ; 3 + 5f8: 80 93 4d 01 sts 0x014D, r24 ; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d> + 5fc: 10 92 4e 01 sts 0x014E, r1 ; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e> + 600: 80 81 ld r24, Z + 602: 80 68 ori r24, 0x80 ; 128 + 604: 80 83 st Z, r24 + 606: 08 95 ret -00000624 : - 624: e0 e0 ldi r30, 0x00 ; 0 - 626: f1 e0 ldi r31, 0x01 ; 1 - 628: 10 8a std Z+16, r1 ; 0x10 - 62a: a0 e4 ldi r26, 0x40 ; 64 - 62c: a0 8b std Z+16, r26 ; 0x10 - 62e: 74 e0 ldi r23, 0x04 ; 4 - 630: 70 8b std Z+16, r23 ; 0x10 - 632: 11 8a std Z+17, r1 ; 0x11 - 634: 61 e9 ldi r22, 0x91 ; 145 - 636: 62 8b std Z+18, r22 ; 0x12 - 638: 80 e1 ldi r24, 0x10 ; 16 - 63a: 83 8b std Z+19, r24 ; 0x13 - 63c: 47 e7 ldi r20, 0x77 ; 119 - 63e: 51 e0 ldi r21, 0x01 ; 1 - 640: 44 8b std Z+20, r20 ; 0x14 - 642: 55 8b std Z+21, r21 ; 0x15 - 644: 84 e2 ldi r24, 0x24 ; 36 - 646: 80 8f std Z+24, r24 ; 0x18 - 648: 82 e0 ldi r24, 0x02 ; 2 - 64a: 81 8f std Z+25, r24 ; 0x19 - 64c: 12 8e std Z+26, r1 ; 0x1a - 64e: b0 91 c2 20 lds r27, 0x20C2 ; 0x8020c2 - 652: 8e ee ldi r24, 0xEE ; 238 - 654: 92 e0 ldi r25, 0x02 ; 2 - 656: b8 9f mul r27, r24 - 658: 90 01 movw r18, r0 - 65a: b9 9f mul r27, r25 - 65c: 30 0d add r19, r0 - 65e: 11 24 eor r1, r1 - 660: 2a 58 subi r18, 0x8A ; 138 - 662: 39 4d sbci r19, 0xD9 ; 217 - 664: 24 8f std Z+28, r18 ; 0x1c - 666: b0 91 c2 20 lds r27, 0x20C2 ; 0x8020c2 - 66a: b8 9f mul r27, r24 - 66c: 90 01 movw r18, r0 - 66e: b9 9f mul r27, r25 - 670: 30 0d add r19, r0 - 672: 11 24 eor r1, r1 - 674: 2a 58 subi r18, 0x8A ; 138 - 676: 39 4d sbci r19, 0xD9 ; 217 - 678: 35 8f std Z+29, r19 ; 0x1d - 67a: 16 8e std Z+30, r1 ; 0x1e - 67c: 20 89 ldd r18, Z+16 ; 0x10 - 67e: 20 68 ori r18, 0x80 ; 128 - 680: 20 8b std Z+16, r18 ; 0x10 - 682: 10 a2 std Z+32, r1 ; 0x20 - 684: a0 a3 std Z+32, r26 ; 0x20 - 686: 70 a3 std Z+32, r23 ; 0x20 - 688: 11 a2 std Z+33, r1 ; 0x21 - 68a: 62 a3 std Z+34, r22 ; 0x22 - 68c: 2b e4 ldi r18, 0x4B ; 75 - 68e: 23 a3 std Z+35, r18 ; 0x23 - 690: 44 a3 std Z+36, r20 ; 0x24 - 692: 55 a3 std Z+37, r21 ; 0x25 - 694: 20 ea ldi r18, 0xA0 ; 160 - 696: 20 a7 std Z+40, r18 ; 0x28 - 698: 28 e0 ldi r18, 0x08 ; 8 - 69a: 21 a7 std Z+41, r18 ; 0x29 - 69c: 12 a6 std Z+42, r1 ; 0x2a - 69e: 40 91 c2 20 lds r20, 0x20C2 ; 0x8020c2 - 6a2: 48 9f mul r20, r24 - 6a4: 90 01 movw r18, r0 - 6a6: 49 9f mul r20, r25 - 6a8: 30 0d add r19, r0 - 6aa: 11 24 eor r1, r1 - 6ac: 23 51 subi r18, 0x13 ; 19 - 6ae: 38 4d sbci r19, 0xD8 ; 216 - 6b0: 24 a7 std Z+44, r18 ; 0x2c - 6b2: 40 91 c2 20 lds r20, 0x20C2 ; 0x8020c2 - 6b6: 48 9f mul r20, r24 - 6b8: 90 01 movw r18, r0 - 6ba: 49 9f mul r20, r25 - 6bc: 30 0d add r19, r0 - 6be: 11 24 eor r1, r1 - 6c0: c9 01 movw r24, r18 - 6c2: 83 51 subi r24, 0x13 ; 19 - 6c4: 98 4d sbci r25, 0xD8 ; 216 - 6c6: 95 a7 std Z+45, r25 ; 0x2d - 6c8: 16 a6 std Z+46, r1 ; 0x2e - 6ca: 80 a1 ldd r24, Z+32 ; 0x20 - 6cc: 80 68 ori r24, 0x80 ; 128 - 6ce: 80 a3 std Z+32, r24 ; 0x20 - 6d0: 08 95 ret +00000608 : + 608: e0 e0 ldi r30, 0x00 ; 0 + 60a: f1 e0 ldi r31, 0x01 ; 1 + 60c: 10 8a std Z+16, r1 ; 0x10 + 60e: a0 e4 ldi r26, 0x40 ; 64 + 610: a0 8b std Z+16, r26 ; 0x10 + 612: 74 e0 ldi r23, 0x04 ; 4 + 614: 70 8b std Z+16, r23 ; 0x10 + 616: 11 8a std Z+17, r1 ; 0x11 + 618: 61 e9 ldi r22, 0x91 ; 145 + 61a: 62 8b std Z+18, r22 ; 0x12 + 61c: 80 e1 ldi r24, 0x10 ; 16 + 61e: 83 8b std Z+19, r24 ; 0x13 + 620: 47 e7 ldi r20, 0x77 ; 119 + 622: 51 e0 ldi r21, 0x01 ; 1 + 624: 44 8b std Z+20, r20 ; 0x14 + 626: 55 8b std Z+21, r21 ; 0x15 + 628: 84 e2 ldi r24, 0x24 ; 36 + 62a: 80 8f std Z+24, r24 ; 0x18 + 62c: 82 e0 ldi r24, 0x02 ; 2 + 62e: 81 8f std Z+25, r24 ; 0x19 + 630: 12 8e std Z+26, r1 ; 0x1a + 632: b0 91 c2 20 lds r27, 0x20C2 ; 0x8020c2 + 636: 8e ee ldi r24, 0xEE ; 238 + 638: 92 e0 ldi r25, 0x02 ; 2 + 63a: b8 9f mul r27, r24 + 63c: 90 01 movw r18, r0 + 63e: b9 9f mul r27, r25 + 640: 30 0d add r19, r0 + 642: 11 24 eor r1, r1 + 644: 26 58 subi r18, 0x86 ; 134 + 646: 39 4d sbci r19, 0xD9 ; 217 + 648: 24 8f std Z+28, r18 ; 0x1c + 64a: b0 91 c2 20 lds r27, 0x20C2 ; 0x8020c2 + 64e: b8 9f mul r27, r24 + 650: 90 01 movw r18, r0 + 652: b9 9f mul r27, r25 + 654: 30 0d add r19, r0 + 656: 11 24 eor r1, r1 + 658: 26 58 subi r18, 0x86 ; 134 + 65a: 39 4d sbci r19, 0xD9 ; 217 + 65c: 35 8f std Z+29, r19 ; 0x1d + 65e: 16 8e std Z+30, r1 ; 0x1e + 660: 20 89 ldd r18, Z+16 ; 0x10 + 662: 20 68 ori r18, 0x80 ; 128 + 664: 20 8b std Z+16, r18 ; 0x10 + 666: 10 a2 std Z+32, r1 ; 0x20 + 668: a0 a3 std Z+32, r26 ; 0x20 + 66a: 70 a3 std Z+32, r23 ; 0x20 + 66c: 11 a2 std Z+33, r1 ; 0x21 + 66e: 62 a3 std Z+34, r22 ; 0x22 + 670: 2b e4 ldi r18, 0x4B ; 75 + 672: 23 a3 std Z+35, r18 ; 0x23 + 674: 44 a3 std Z+36, r20 ; 0x24 + 676: 55 a3 std Z+37, r21 ; 0x25 + 678: 20 ea ldi r18, 0xA0 ; 160 + 67a: 20 a7 std Z+40, r18 ; 0x28 + 67c: 28 e0 ldi r18, 0x08 ; 8 + 67e: 21 a7 std Z+41, r18 ; 0x29 + 680: 12 a6 std Z+42, r1 ; 0x2a + 682: 40 91 c2 20 lds r20, 0x20C2 ; 0x8020c2 + 686: 48 9f mul r20, r24 + 688: 90 01 movw r18, r0 + 68a: 49 9f mul r20, r25 + 68c: 30 0d add r19, r0 + 68e: 11 24 eor r1, r1 + 690: 2f 50 subi r18, 0x0F ; 15 + 692: 38 4d sbci r19, 0xD8 ; 216 + 694: 24 a7 std Z+44, r18 ; 0x2c + 696: 40 91 c2 20 lds r20, 0x20C2 ; 0x8020c2 + 69a: 48 9f mul r20, r24 + 69c: 90 01 movw r18, r0 + 69e: 49 9f mul r20, r25 + 6a0: 30 0d add r19, r0 + 6a2: 11 24 eor r1, r1 + 6a4: c9 01 movw r24, r18 + 6a6: 8f 50 subi r24, 0x0F ; 15 + 6a8: 98 4d sbci r25, 0xD8 ; 216 + 6aa: 95 a7 std Z+45, r25 ; 0x2d + 6ac: 16 a6 std Z+46, r1 ; 0x2e + 6ae: 80 a1 ldd r24, Z+32 ; 0x20 + 6b0: 80 68 ori r24, 0x80 ; 128 + 6b2: 80 a3 std Z+32, r24 ; 0x20 + 6b4: 08 95 ret -000006d2 : - 6d2: cf 93 push r28 - 6d4: c2 e0 ldi r28, 0x02 ; 2 - 6d6: c0 93 00 20 sts 0x2000, r28 ; 0x802000 <__data_start> - 6da: cc de rcall .-616 ; 0x474 - 6dc: e0 e0 ldi r30, 0x00 ; 0 - 6de: f1 e0 ldi r31, 0x01 ; 1 - 6e0: 16 aa std Z+54, r1 ; 0x36 - 6e2: 34 e2 ldi r19, 0x24 ; 36 - 6e4: 30 ab std Z+48, r19 ; 0x30 - 6e6: 11 aa std Z+49, r1 ; 0x31 - 6e8: 29 e5 ldi r18, 0x59 ; 89 - 6ea: 22 ab std Z+50, r18 ; 0x32 - 6ec: 83 e0 ldi r24, 0x03 ; 3 - 6ee: 83 ab std Z+51, r24 ; 0x33 - 6f0: 40 91 04 20 lds r20, 0x2004 ; 0x802004 - 6f4: 50 91 05 20 lds r21, 0x2005 ; 0x802005 - 6f8: 44 ab std Z+52, r20 ; 0x34 - 6fa: 55 ab std Z+53, r21 ; 0x35 - 6fc: 46 e6 ldi r20, 0x66 ; 102 - 6fe: 52 e2 ldi r21, 0x22 ; 34 - 700: 40 af std Z+56, r20 ; 0x38 - 702: 51 af std Z+57, r21 ; 0x39 - 704: 12 ae std Z+58, r1 ; 0x3a - 706: 99 e3 ldi r25, 0x39 ; 57 - 708: 94 af std Z+60, r25 ; 0x3c - 70a: 80 93 3d 01 sts 0x013D, r24 ; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d> - 70e: 10 92 3e 01 sts 0x013E, r1 ; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e> - 712: 90 a9 ldd r25, Z+48 ; 0x30 - 714: 90 68 ori r25, 0x80 ; 128 - 716: 90 ab std Z+48, r25 ; 0x30 - 718: 10 92 46 01 sts 0x0146, r1 ; 0x800146 <__TEXT_REGION_LENGTH__+0x700146> - 71c: e0 e4 ldi r30, 0x40 ; 64 - 71e: f1 e0 ldi r31, 0x01 ; 1 - 720: 30 83 st Z, r19 - 722: 10 92 41 01 sts 0x0141, r1 ; 0x800141 <__TEXT_REGION_LENGTH__+0x700141> - 726: 20 93 42 01 sts 0x0142, r18 ; 0x800142 <__TEXT_REGION_LENGTH__+0x700142> - 72a: c0 93 43 01 sts 0x0143, r28 ; 0x800143 <__TEXT_REGION_LENGTH__+0x700143> - 72e: 20 91 02 20 lds r18, 0x2002 ; 0x802002 - 732: 30 91 03 20 lds r19, 0x2003 ; 0x802003 - 736: 20 93 44 01 sts 0x0144, r18 ; 0x800144 <__TEXT_REGION_LENGTH__+0x700144> - 73a: 30 93 45 01 sts 0x0145, r19 ; 0x800145 <__TEXT_REGION_LENGTH__+0x700145> - 73e: 26 e7 ldi r18, 0x76 ; 118 - 740: 34 e2 ldi r19, 0x24 ; 36 - 742: 20 93 48 01 sts 0x0148, r18 ; 0x800148 <__TEXT_REGION_LENGTH__+0x700148> - 746: 30 93 49 01 sts 0x0149, r19 ; 0x800149 <__TEXT_REGION_LENGTH__+0x700149> - 74a: 10 92 4a 01 sts 0x014A, r1 ; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a> - 74e: 9b e3 ldi r25, 0x3B ; 59 - 750: 90 93 4c 01 sts 0x014C, r25 ; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c> - 754: 80 93 4d 01 sts 0x014D, r24 ; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d> - 758: 10 92 4e 01 sts 0x014E, r1 ; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e> - 75c: 80 81 ld r24, Z - 75e: 80 68 ori r24, 0x80 ; 128 - 760: 80 83 st Z, r24 - 762: cf 91 pop r28 - 764: 08 95 ret +000006b6 : + 6b6: cf 93 push r28 + 6b8: c2 e0 ldi r28, 0x02 ; 2 + 6ba: c0 93 00 20 sts 0x2000, r28 ; 0x802000 <__data_start> + 6be: cc de rcall .-616 ; 0x458 + 6c0: e0 e0 ldi r30, 0x00 ; 0 + 6c2: f1 e0 ldi r31, 0x01 ; 1 + 6c4: 16 aa std Z+54, r1 ; 0x36 + 6c6: 34 e2 ldi r19, 0x24 ; 36 + 6c8: 30 ab std Z+48, r19 ; 0x30 + 6ca: 11 aa std Z+49, r1 ; 0x31 + 6cc: 29 e5 ldi r18, 0x59 ; 89 + 6ce: 22 ab std Z+50, r18 ; 0x32 + 6d0: 83 e0 ldi r24, 0x03 ; 3 + 6d2: 83 ab std Z+51, r24 ; 0x33 + 6d4: 40 91 04 20 lds r20, 0x2004 ; 0x802004 + 6d8: 50 91 05 20 lds r21, 0x2005 ; 0x802005 + 6dc: 44 ab std Z+52, r20 ; 0x34 + 6de: 55 ab std Z+53, r21 ; 0x35 + 6e0: 4a e6 ldi r20, 0x6A ; 106 + 6e2: 52 e2 ldi r21, 0x22 ; 34 + 6e4: 40 af std Z+56, r20 ; 0x38 + 6e6: 51 af std Z+57, r21 ; 0x39 + 6e8: 12 ae std Z+58, r1 ; 0x3a + 6ea: 99 e3 ldi r25, 0x39 ; 57 + 6ec: 94 af std Z+60, r25 ; 0x3c + 6ee: 80 93 3d 01 sts 0x013D, r24 ; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d> + 6f2: 10 92 3e 01 sts 0x013E, r1 ; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e> + 6f6: 90 a9 ldd r25, Z+48 ; 0x30 + 6f8: 90 68 ori r25, 0x80 ; 128 + 6fa: 90 ab std Z+48, r25 ; 0x30 + 6fc: 10 92 46 01 sts 0x0146, r1 ; 0x800146 <__TEXT_REGION_LENGTH__+0x700146> + 700: e0 e4 ldi r30, 0x40 ; 64 + 702: f1 e0 ldi r31, 0x01 ; 1 + 704: 30 83 st Z, r19 + 706: 10 92 41 01 sts 0x0141, r1 ; 0x800141 <__TEXT_REGION_LENGTH__+0x700141> + 70a: 20 93 42 01 sts 0x0142, r18 ; 0x800142 <__TEXT_REGION_LENGTH__+0x700142> + 70e: c0 93 43 01 sts 0x0143, r28 ; 0x800143 <__TEXT_REGION_LENGTH__+0x700143> + 712: 20 91 02 20 lds r18, 0x2002 ; 0x802002 + 716: 30 91 03 20 lds r19, 0x2003 ; 0x802003 + 71a: 20 93 44 01 sts 0x0144, r18 ; 0x800144 <__TEXT_REGION_LENGTH__+0x700144> + 71e: 30 93 45 01 sts 0x0145, r19 ; 0x800145 <__TEXT_REGION_LENGTH__+0x700145> + 722: 2a e7 ldi r18, 0x7A ; 122 + 724: 34 e2 ldi r19, 0x24 ; 36 + 726: 20 93 48 01 sts 0x0148, r18 ; 0x800148 <__TEXT_REGION_LENGTH__+0x700148> + 72a: 30 93 49 01 sts 0x0149, r19 ; 0x800149 <__TEXT_REGION_LENGTH__+0x700149> + 72e: 10 92 4a 01 sts 0x014A, r1 ; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a> + 732: 9b e3 ldi r25, 0x3B ; 59 + 734: 90 93 4c 01 sts 0x014C, r25 ; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c> + 738: 80 93 4d 01 sts 0x014D, r24 ; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d> + 73c: 10 92 4e 01 sts 0x014E, r1 ; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e> + 740: 80 81 ld r24, Z + 742: 80 68 ori r24, 0x80 ; 128 + 744: 80 83 st Z, r24 + 746: cf 91 pop r28 + 748: 08 95 ret -00000766 : - 766: cf 93 push r28 - 768: e0 e0 ldi r30, 0x00 ; 0 - 76a: f1 e0 ldi r31, 0x01 ; 1 - 76c: 10 8a std Z+16, r1 ; 0x10 - 76e: b0 e4 ldi r27, 0x40 ; 64 - 770: b0 8b std Z+16, r27 ; 0x10 - 772: a4 e0 ldi r26, 0x04 ; 4 - 774: a0 8b std Z+16, r26 ; 0x10 - 776: 11 8a std Z+17, r1 ; 0x11 - 778: 51 e9 ldi r21, 0x91 ; 145 - 77a: 52 8b std Z+18, r21 ; 0x12 - 77c: 80 e1 ldi r24, 0x10 ; 16 - 77e: 83 8b std Z+19, r24 ; 0x13 - 780: 67 e7 ldi r22, 0x77 ; 119 - 782: 71 e0 ldi r23, 0x01 ; 1 - 784: 64 8b std Z+20, r22 ; 0x14 - 786: 75 8b std Z+21, r23 ; 0x15 - 788: 84 e2 ldi r24, 0x24 ; 36 - 78a: 80 8f std Z+24, r24 ; 0x18 - 78c: 42 e0 ldi r20, 0x02 ; 2 - 78e: 41 8f std Z+25, r20 ; 0x19 - 790: 12 8e std Z+26, r1 ; 0x1a - 792: c0 91 c2 20 lds r28, 0x20C2 ; 0x8020c2 - 796: 8e ee ldi r24, 0xEE ; 238 - 798: 92 e0 ldi r25, 0x02 ; 2 - 79a: c8 9f mul r28, r24 - 79c: 90 01 movw r18, r0 - 79e: c9 9f mul r28, r25 - 7a0: 30 0d add r19, r0 - 7a2: 11 24 eor r1, r1 - 7a4: 2a 58 subi r18, 0x8A ; 138 - 7a6: 39 4d sbci r19, 0xD9 ; 217 - 7a8: 24 8f std Z+28, r18 ; 0x1c - 7aa: c0 91 c2 20 lds r28, 0x20C2 ; 0x8020c2 - 7ae: c8 9f mul r28, r24 - 7b0: 90 01 movw r18, r0 - 7b2: c9 9f mul r28, r25 - 7b4: 30 0d add r19, r0 - 7b6: 11 24 eor r1, r1 - 7b8: 2a 58 subi r18, 0x8A ; 138 - 7ba: 39 4d sbci r19, 0xD9 ; 217 - 7bc: 35 8f std Z+29, r19 ; 0x1d - 7be: 16 8e std Z+30, r1 ; 0x1e - 7c0: 20 89 ldd r18, Z+16 ; 0x10 - 7c2: 20 68 ori r18, 0x80 ; 128 - 7c4: 20 8b std Z+16, r18 ; 0x10 - 7c6: 10 a2 std Z+32, r1 ; 0x20 - 7c8: b0 a3 std Z+32, r27 ; 0x20 - 7ca: a0 a3 std Z+32, r26 ; 0x20 - 7cc: 11 a2 std Z+33, r1 ; 0x21 - 7ce: 52 a3 std Z+34, r21 ; 0x22 - 7d0: 22 e1 ldi r18, 0x12 ; 18 - 7d2: 23 a3 std Z+35, r18 ; 0x23 - 7d4: 64 a3 std Z+36, r22 ; 0x24 - 7d6: 75 a3 std Z+37, r23 ; 0x25 - 7d8: 24 e3 ldi r18, 0x34 ; 52 - 7da: 20 a7 std Z+40, r18 ; 0x28 - 7dc: 41 a7 std Z+41, r20 ; 0x29 - 7de: 12 a6 std Z+42, r1 ; 0x2a - 7e0: 40 91 c2 20 lds r20, 0x20C2 ; 0x8020c2 - 7e4: 48 9f mul r20, r24 - 7e6: 90 01 movw r18, r0 - 7e8: 49 9f mul r20, r25 - 7ea: 30 0d add r19, r0 - 7ec: 11 24 eor r1, r1 - 7ee: 23 51 subi r18, 0x13 ; 19 - 7f0: 38 4d sbci r19, 0xD8 ; 216 - 7f2: 24 a7 std Z+44, r18 ; 0x2c - 7f4: 40 91 c2 20 lds r20, 0x20C2 ; 0x8020c2 - 7f8: 48 9f mul r20, r24 - 7fa: 90 01 movw r18, r0 - 7fc: 49 9f mul r20, r25 - 7fe: 30 0d add r19, r0 - 800: 11 24 eor r1, r1 - 802: c9 01 movw r24, r18 - 804: 83 51 subi r24, 0x13 ; 19 - 806: 98 4d sbci r25, 0xD8 ; 216 - 808: 95 a7 std Z+45, r25 ; 0x2d - 80a: 16 a6 std Z+46, r1 ; 0x2e - 80c: 80 a1 ldd r24, Z+32 ; 0x20 - 80e: 80 68 ori r24, 0x80 ; 128 +0000074a : + 74a: cf 93 push r28 + 74c: e0 e0 ldi r30, 0x00 ; 0 + 74e: f1 e0 ldi r31, 0x01 ; 1 + 750: 10 8a std Z+16, r1 ; 0x10 + 752: b0 e4 ldi r27, 0x40 ; 64 + 754: b0 8b std Z+16, r27 ; 0x10 + 756: a4 e0 ldi r26, 0x04 ; 4 + 758: a0 8b std Z+16, r26 ; 0x10 + 75a: 11 8a std Z+17, r1 ; 0x11 + 75c: 51 e9 ldi r21, 0x91 ; 145 + 75e: 52 8b std Z+18, r21 ; 0x12 + 760: 80 e1 ldi r24, 0x10 ; 16 + 762: 83 8b std Z+19, r24 ; 0x13 + 764: 67 e7 ldi r22, 0x77 ; 119 + 766: 71 e0 ldi r23, 0x01 ; 1 + 768: 64 8b std Z+20, r22 ; 0x14 + 76a: 75 8b std Z+21, r23 ; 0x15 + 76c: 84 e2 ldi r24, 0x24 ; 36 + 76e: 80 8f std Z+24, r24 ; 0x18 + 770: 42 e0 ldi r20, 0x02 ; 2 + 772: 41 8f std Z+25, r20 ; 0x19 + 774: 12 8e std Z+26, r1 ; 0x1a + 776: c0 91 c2 20 lds r28, 0x20C2 ; 0x8020c2 + 77a: 8e ee ldi r24, 0xEE ; 238 + 77c: 92 e0 ldi r25, 0x02 ; 2 + 77e: c8 9f mul r28, r24 + 780: 90 01 movw r18, r0 + 782: c9 9f mul r28, r25 + 784: 30 0d add r19, r0 + 786: 11 24 eor r1, r1 + 788: 26 58 subi r18, 0x86 ; 134 + 78a: 39 4d sbci r19, 0xD9 ; 217 + 78c: 24 8f std Z+28, r18 ; 0x1c + 78e: c0 91 c2 20 lds r28, 0x20C2 ; 0x8020c2 + 792: c8 9f mul r28, r24 + 794: 90 01 movw r18, r0 + 796: c9 9f mul r28, r25 + 798: 30 0d add r19, r0 + 79a: 11 24 eor r1, r1 + 79c: 26 58 subi r18, 0x86 ; 134 + 79e: 39 4d sbci r19, 0xD9 ; 217 + 7a0: 35 8f std Z+29, r19 ; 0x1d + 7a2: 16 8e std Z+30, r1 ; 0x1e + 7a4: 20 89 ldd r18, Z+16 ; 0x10 + 7a6: 20 68 ori r18, 0x80 ; 128 + 7a8: 20 8b std Z+16, r18 ; 0x10 + 7aa: 10 a2 std Z+32, r1 ; 0x20 + 7ac: b0 a3 std Z+32, r27 ; 0x20 + 7ae: a0 a3 std Z+32, r26 ; 0x20 + 7b0: 11 a2 std Z+33, r1 ; 0x21 + 7b2: 52 a3 std Z+34, r21 ; 0x22 + 7b4: 22 e1 ldi r18, 0x12 ; 18 + 7b6: 23 a3 std Z+35, r18 ; 0x23 + 7b8: 64 a3 std Z+36, r22 ; 0x24 + 7ba: 75 a3 std Z+37, r23 ; 0x25 + 7bc: 24 e3 ldi r18, 0x34 ; 52 + 7be: 20 a7 std Z+40, r18 ; 0x28 + 7c0: 41 a7 std Z+41, r20 ; 0x29 + 7c2: 12 a6 std Z+42, r1 ; 0x2a + 7c4: 40 91 c2 20 lds r20, 0x20C2 ; 0x8020c2 + 7c8: 48 9f mul r20, r24 + 7ca: 90 01 movw r18, r0 + 7cc: 49 9f mul r20, r25 + 7ce: 30 0d add r19, r0 + 7d0: 11 24 eor r1, r1 + 7d2: 2f 50 subi r18, 0x0F ; 15 + 7d4: 38 4d sbci r19, 0xD8 ; 216 + 7d6: 24 a7 std Z+44, r18 ; 0x2c + 7d8: 40 91 c2 20 lds r20, 0x20C2 ; 0x8020c2 + 7dc: 48 9f mul r20, r24 + 7de: 90 01 movw r18, r0 + 7e0: 49 9f mul r20, r25 + 7e2: 30 0d add r19, r0 + 7e4: 11 24 eor r1, r1 + 7e6: c9 01 movw r24, r18 + 7e8: 8f 50 subi r24, 0x0F ; 15 + 7ea: 98 4d sbci r25, 0xD8 ; 216 + 7ec: 95 a7 std Z+45, r25 ; 0x2d + 7ee: 16 a6 std Z+46, r1 ; 0x2e + 7f0: 80 a1 ldd r24, Z+32 ; 0x20 + 7f2: 80 68 ori r24, 0x80 ; 128 + 7f4: 80 a3 std Z+32, r24 ; 0x20 + 7f6: cf 91 pop r28 + 7f8: 08 95 ret + +000007fa : + 7fa: cf 93 push r28 + 7fc: c3 e0 ldi r28, 0x03 ; 3 + 7fe: c0 93 00 20 sts 0x2000, r28 ; 0x802000 <__data_start> + 802: 2a de rcall .-940 ; 0x458 + 804: e0 e0 ldi r30, 0x00 ; 0 + 806: f1 e0 ldi r31, 0x01 ; 1 + 808: 10 a2 std Z+32, r1 ; 0x20 + 80a: 80 e4 ldi r24, 0x40 ; 64 + 80c: 80 a3 std Z+32, r24 ; 0x20 + 80e: 84 e0 ldi r24, 0x04 ; 4 810: 80 a3 std Z+32, r24 ; 0x20 - 812: cf 91 pop r28 - 814: 08 95 ret + 812: 11 a2 std Z+33, r1 ; 0x21 + 814: 12 a2 std Z+34, r1 ; 0x22 + 816: 8b e4 ldi r24, 0x4B ; 75 + 818: 83 a3 std Z+35, r24 ; 0x23 + 81a: 14 a2 std Z+36, r1 ; 0x24 + 81c: 15 a2 std Z+37, r1 ; 0x25 + 81e: 16 a2 std Z+38, r1 ; 0x26 + 820: 81 e0 ldi r24, 0x01 ; 1 + 822: 90 e2 ldi r25, 0x20 ; 32 + 824: 80 a7 std Z+40, r24 ; 0x28 + 826: 91 a7 std Z+41, r25 ; 0x29 + 828: 12 a6 std Z+42, r1 ; 0x2a + 82a: 80 ea ldi r24, 0xA0 ; 160 + 82c: 84 a7 std Z+44, r24 ; 0x2c + 82e: 88 e0 ldi r24, 0x08 ; 8 + 830: 85 a7 std Z+45, r24 ; 0x2d + 832: 16 a6 std Z+46, r1 ; 0x2e + 834: 80 a1 ldd r24, Z+32 ; 0x20 + 836: 80 6a ori r24, 0xA0 ; 160 + 838: 80 a3 std Z+32, r24 ; 0x20 + 83a: 85 e5 ldi r24, 0x55 ; 85 + 83c: 80 93 a0 08 sts 0x08A0, r24 ; 0x8008a0 <__TEXT_REGION_LENGTH__+0x7008a0> + 840: 16 aa std Z+54, r1 ; 0x36 + 842: 24 e2 ldi r18, 0x24 ; 36 + 844: 20 ab std Z+48, r18 ; 0x30 + 846: 11 aa std Z+49, r1 ; 0x31 + 848: 99 e5 ldi r25, 0x59 ; 89 + 84a: 92 ab std Z+50, r25 ; 0x32 + 84c: 82 e0 ldi r24, 0x02 ; 2 + 84e: 83 ab std Z+51, r24 ; 0x33 + 850: 40 91 02 20 lds r20, 0x2002 ; 0x802002 + 854: 50 91 03 20 lds r21, 0x2003 ; 0x802003 + 858: 44 ab std Z+52, r20 ; 0x34 + 85a: 55 ab std Z+53, r21 ; 0x35 + 85c: 4a e7 ldi r20, 0x7A ; 122 + 85e: 54 e2 ldi r21, 0x24 ; 36 + 860: 40 af std Z+56, r20 ; 0x38 + 862: 51 af std Z+57, r21 ; 0x39 + 864: 12 ae std Z+58, r1 ; 0x3a + 866: 8b e3 ldi r24, 0x3B ; 59 + 868: 84 af std Z+60, r24 ; 0x3c + 86a: c0 93 3d 01 sts 0x013D, r28 ; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d> + 86e: 10 92 3e 01 sts 0x013E, r1 ; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e> + 872: 80 a9 ldd r24, Z+48 ; 0x30 + 874: 80 68 ori r24, 0x80 ; 128 + 876: 80 ab std Z+48, r24 ; 0x30 + 878: 10 92 46 01 sts 0x0146, r1 ; 0x800146 <__TEXT_REGION_LENGTH__+0x700146> + 87c: e0 e4 ldi r30, 0x40 ; 64 + 87e: f1 e0 ldi r31, 0x01 ; 1 + 880: 20 83 st Z, r18 + 882: 10 92 41 01 sts 0x0141, r1 ; 0x800141 <__TEXT_REGION_LENGTH__+0x700141> + 886: 90 93 42 01 sts 0x0142, r25 ; 0x800142 <__TEXT_REGION_LENGTH__+0x700142> + 88a: c0 93 43 01 sts 0x0143, r28 ; 0x800143 <__TEXT_REGION_LENGTH__+0x700143> + 88e: 80 91 04 20 lds r24, 0x2004 ; 0x802004 + 892: 90 91 05 20 lds r25, 0x2005 ; 0x802005 + 896: 80 93 44 01 sts 0x0144, r24 ; 0x800144 <__TEXT_REGION_LENGTH__+0x700144> + 89a: 90 93 45 01 sts 0x0145, r25 ; 0x800145 <__TEXT_REGION_LENGTH__+0x700145> + 89e: 8a e6 ldi r24, 0x6A ; 106 + 8a0: 92 e2 ldi r25, 0x22 ; 34 + 8a2: 80 93 48 01 sts 0x0148, r24 ; 0x800148 <__TEXT_REGION_LENGTH__+0x700148> + 8a6: 90 93 49 01 sts 0x0149, r25 ; 0x800149 <__TEXT_REGION_LENGTH__+0x700149> + 8aa: 10 92 4a 01 sts 0x014A, r1 ; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a> + 8ae: 89 e3 ldi r24, 0x39 ; 57 + 8b0: 80 93 4c 01 sts 0x014C, r24 ; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c> + 8b4: c0 93 4d 01 sts 0x014D, r28 ; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d> + 8b8: 10 92 4e 01 sts 0x014E, r1 ; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e> + 8bc: 80 81 ld r24, Z + 8be: 80 68 ori r24, 0x80 ; 128 + 8c0: 80 83 st Z, r24 + 8c2: cf 91 pop r28 + 8c4: 08 95 ret -00000816 : - 816: cf 93 push r28 - 818: c3 e0 ldi r28, 0x03 ; 3 - 81a: c0 93 00 20 sts 0x2000, r28 ; 0x802000 <__data_start> - 81e: 2a de rcall .-940 ; 0x474 - 820: e0 e0 ldi r30, 0x00 ; 0 - 822: f1 e0 ldi r31, 0x01 ; 1 - 824: 10 a2 std Z+32, r1 ; 0x20 - 826: 80 e4 ldi r24, 0x40 ; 64 - 828: 80 a3 std Z+32, r24 ; 0x20 - 82a: 84 e0 ldi r24, 0x04 ; 4 - 82c: 80 a3 std Z+32, r24 ; 0x20 - 82e: 11 a2 std Z+33, r1 ; 0x21 - 830: 12 a2 std Z+34, r1 ; 0x22 - 832: 8b e4 ldi r24, 0x4B ; 75 - 834: 83 a3 std Z+35, r24 ; 0x23 - 836: 14 a2 std Z+36, r1 ; 0x24 - 838: 15 a2 std Z+37, r1 ; 0x25 - 83a: 16 a2 std Z+38, r1 ; 0x26 - 83c: 81 e0 ldi r24, 0x01 ; 1 - 83e: 90 e2 ldi r25, 0x20 ; 32 - 840: 80 a7 std Z+40, r24 ; 0x28 - 842: 91 a7 std Z+41, r25 ; 0x29 - 844: 12 a6 std Z+42, r1 ; 0x2a - 846: 80 ea ldi r24, 0xA0 ; 160 - 848: 84 a7 std Z+44, r24 ; 0x2c - 84a: 88 e0 ldi r24, 0x08 ; 8 - 84c: 85 a7 std Z+45, r24 ; 0x2d - 84e: 16 a6 std Z+46, r1 ; 0x2e - 850: 80 a1 ldd r24, Z+32 ; 0x20 - 852: 80 6a ori r24, 0xA0 ; 160 - 854: 80 a3 std Z+32, r24 ; 0x20 - 856: 85 e5 ldi r24, 0x55 ; 85 - 858: 80 93 a0 08 sts 0x08A0, r24 ; 0x8008a0 <__TEXT_REGION_LENGTH__+0x7008a0> - 85c: 16 aa std Z+54, r1 ; 0x36 - 85e: 24 e2 ldi r18, 0x24 ; 36 - 860: 20 ab std Z+48, r18 ; 0x30 - 862: 11 aa std Z+49, r1 ; 0x31 - 864: 99 e5 ldi r25, 0x59 ; 89 - 866: 92 ab std Z+50, r25 ; 0x32 - 868: 82 e0 ldi r24, 0x02 ; 2 - 86a: 83 ab std Z+51, r24 ; 0x33 - 86c: 40 91 02 20 lds r20, 0x2002 ; 0x802002 - 870: 50 91 03 20 lds r21, 0x2003 ; 0x802003 - 874: 44 ab std Z+52, r20 ; 0x34 - 876: 55 ab std Z+53, r21 ; 0x35 - 878: 46 e7 ldi r20, 0x76 ; 118 - 87a: 54 e2 ldi r21, 0x24 ; 36 - 87c: 40 af std Z+56, r20 ; 0x38 - 87e: 51 af std Z+57, r21 ; 0x39 - 880: 12 ae std Z+58, r1 ; 0x3a - 882: 8b e3 ldi r24, 0x3B ; 59 - 884: 84 af std Z+60, r24 ; 0x3c - 886: c0 93 3d 01 sts 0x013D, r28 ; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d> - 88a: 10 92 3e 01 sts 0x013E, r1 ; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e> - 88e: 80 a9 ldd r24, Z+48 ; 0x30 - 890: 80 68 ori r24, 0x80 ; 128 - 892: 80 ab std Z+48, r24 ; 0x30 - 894: 10 92 46 01 sts 0x0146, r1 ; 0x800146 <__TEXT_REGION_LENGTH__+0x700146> - 898: e0 e4 ldi r30, 0x40 ; 64 - 89a: f1 e0 ldi r31, 0x01 ; 1 - 89c: 20 83 st Z, r18 - 89e: 10 92 41 01 sts 0x0141, r1 ; 0x800141 <__TEXT_REGION_LENGTH__+0x700141> - 8a2: 90 93 42 01 sts 0x0142, r25 ; 0x800142 <__TEXT_REGION_LENGTH__+0x700142> - 8a6: c0 93 43 01 sts 0x0143, r28 ; 0x800143 <__TEXT_REGION_LENGTH__+0x700143> - 8aa: 80 91 04 20 lds r24, 0x2004 ; 0x802004 - 8ae: 90 91 05 20 lds r25, 0x2005 ; 0x802005 - 8b2: 80 93 44 01 sts 0x0144, r24 ; 0x800144 <__TEXT_REGION_LENGTH__+0x700144> - 8b6: 90 93 45 01 sts 0x0145, r25 ; 0x800145 <__TEXT_REGION_LENGTH__+0x700145> - 8ba: 86 e6 ldi r24, 0x66 ; 102 - 8bc: 92 e2 ldi r25, 0x22 ; 34 - 8be: 80 93 48 01 sts 0x0148, r24 ; 0x800148 <__TEXT_REGION_LENGTH__+0x700148> - 8c2: 90 93 49 01 sts 0x0149, r25 ; 0x800149 <__TEXT_REGION_LENGTH__+0x700149> - 8c6: 10 92 4a 01 sts 0x014A, r1 ; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a> - 8ca: 89 e3 ldi r24, 0x39 ; 57 - 8cc: 80 93 4c 01 sts 0x014C, r24 ; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c> - 8d0: c0 93 4d 01 sts 0x014D, r28 ; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d> - 8d4: 10 92 4e 01 sts 0x014E, r1 ; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e> - 8d8: 80 81 ld r24, Z - 8da: 80 68 ori r24, 0x80 ; 128 - 8dc: 80 83 st Z, r24 - 8de: cf 91 pop r28 - 8e0: 08 95 ret +000008c6 : + 8c6: e0 e0 ldi r30, 0x00 ; 0 + 8c8: f1 e0 ldi r31, 0x01 ; 1 + 8ca: 10 8a std Z+16, r1 ; 0x10 + 8cc: 80 e4 ldi r24, 0x40 ; 64 + 8ce: 80 8b std Z+16, r24 ; 0x10 + 8d0: 84 e0 ldi r24, 0x04 ; 4 + 8d2: 80 8b std Z+16, r24 ; 0x10 + 8d4: 11 8a std Z+17, r1 ; 0x11 + 8d6: 81 e9 ldi r24, 0x91 ; 145 + 8d8: 82 8b std Z+18, r24 ; 0x12 + 8da: 8b e4 ldi r24, 0x4B ; 75 + 8dc: 83 8b std Z+19, r24 ; 0x13 + 8de: 87 e7 ldi r24, 0x77 ; 119 + 8e0: 91 e0 ldi r25, 0x01 ; 1 + 8e2: 84 8b std Z+20, r24 ; 0x14 + 8e4: 95 8b std Z+21, r25 ; 0x15 + 8e6: 80 ea ldi r24, 0xA0 ; 160 + 8e8: 80 8f std Z+24, r24 ; 0x18 + 8ea: 88 e0 ldi r24, 0x08 ; 8 + 8ec: 81 8f std Z+25, r24 ; 0x19 + 8ee: 12 8e std Z+26, r1 ; 0x1a + 8f0: 40 91 c2 20 lds r20, 0x20C2 ; 0x8020c2 + 8f4: 2e ee ldi r18, 0xEE ; 238 + 8f6: 32 e0 ldi r19, 0x02 ; 2 + 8f8: 42 9f mul r20, r18 + 8fa: c0 01 movw r24, r0 + 8fc: 43 9f mul r20, r19 + 8fe: 90 0d add r25, r0 + 900: 11 24 eor r1, r1 + 902: 86 58 subi r24, 0x86 ; 134 + 904: 99 4d sbci r25, 0xD9 ; 217 + 906: 84 8f std Z+28, r24 ; 0x1c + 908: 40 91 c2 20 lds r20, 0x20C2 ; 0x8020c2 + 90c: 42 9f mul r20, r18 + 90e: c0 01 movw r24, r0 + 910: 43 9f mul r20, r19 + 912: 90 0d add r25, r0 + 914: 11 24 eor r1, r1 + 916: 86 58 subi r24, 0x86 ; 134 + 918: 99 4d sbci r25, 0xD9 ; 217 + 91a: 95 8f std Z+29, r25 ; 0x1d + 91c: 16 8e std Z+30, r1 ; 0x1e + 91e: 80 89 ldd r24, Z+16 ; 0x10 + 920: 80 68 ori r24, 0x80 ; 128 + 922: 80 8b std Z+16, r24 ; 0x10 + 924: 08 95 ret -000008e2 : - 8e2: e0 e0 ldi r30, 0x00 ; 0 - 8e4: f1 e0 ldi r31, 0x01 ; 1 - 8e6: 10 8a std Z+16, r1 ; 0x10 - 8e8: 80 e4 ldi r24, 0x40 ; 64 - 8ea: 80 8b std Z+16, r24 ; 0x10 - 8ec: 84 e0 ldi r24, 0x04 ; 4 - 8ee: 80 8b std Z+16, r24 ; 0x10 - 8f0: 11 8a std Z+17, r1 ; 0x11 - 8f2: 81 e9 ldi r24, 0x91 ; 145 - 8f4: 82 8b std Z+18, r24 ; 0x12 - 8f6: 8b e4 ldi r24, 0x4B ; 75 - 8f8: 83 8b std Z+19, r24 ; 0x13 - 8fa: 87 e7 ldi r24, 0x77 ; 119 - 8fc: 91 e0 ldi r25, 0x01 ; 1 - 8fe: 84 8b std Z+20, r24 ; 0x14 - 900: 95 8b std Z+21, r25 ; 0x15 - 902: 80 ea ldi r24, 0xA0 ; 160 - 904: 80 8f std Z+24, r24 ; 0x18 - 906: 88 e0 ldi r24, 0x08 ; 8 - 908: 81 8f std Z+25, r24 ; 0x19 - 90a: 12 8e std Z+26, r1 ; 0x1a - 90c: 40 91 c2 20 lds r20, 0x20C2 ; 0x8020c2 - 910: 2e ee ldi r18, 0xEE ; 238 - 912: 32 e0 ldi r19, 0x02 ; 2 - 914: 42 9f mul r20, r18 - 916: c0 01 movw r24, r0 - 918: 43 9f mul r20, r19 - 91a: 90 0d add r25, r0 - 91c: 11 24 eor r1, r1 - 91e: 8a 58 subi r24, 0x8A ; 138 - 920: 99 4d sbci r25, 0xD9 ; 217 - 922: 84 8f std Z+28, r24 ; 0x1c - 924: 40 91 c2 20 lds r20, 0x20C2 ; 0x8020c2 - 928: 42 9f mul r20, r18 - 92a: c0 01 movw r24, r0 - 92c: 43 9f mul r20, r19 - 92e: 90 0d add r25, r0 - 930: 11 24 eor r1, r1 - 932: 8a 58 subi r24, 0x8A ; 138 - 934: 99 4d sbci r25, 0xD9 ; 217 - 936: 95 8f std Z+29, r25 ; 0x1d - 938: 16 8e std Z+30, r1 ; 0x1e - 93a: 80 89 ldd r24, Z+16 ; 0x10 - 93c: 80 68 ori r24, 0x80 ; 128 - 93e: 80 8b std Z+16, r24 ; 0x10 - 940: 08 95 ret +00000926 : + 926: cf 93 push r28 + 928: c4 e0 ldi r28, 0x04 ; 4 + 92a: c0 93 00 20 sts 0x2000, r28 ; 0x802000 <__data_start> + 92e: 94 dd rcall .-1240 ; 0x458 + 930: e0 e0 ldi r30, 0x00 ; 0 + 932: f1 e0 ldi r31, 0x01 ; 1 + 934: 10 a2 std Z+32, r1 ; 0x20 + 936: 80 e4 ldi r24, 0x40 ; 64 + 938: 80 a3 std Z+32, r24 ; 0x20 + 93a: c0 a3 std Z+32, r28 ; 0x20 + 93c: 11 a2 std Z+33, r1 ; 0x21 + 93e: 12 a2 std Z+34, r1 ; 0x22 + 940: 8b e4 ldi r24, 0x4B ; 75 + 942: 83 a3 std Z+35, r24 ; 0x23 + 944: 14 a2 std Z+36, r1 ; 0x24 + 946: 15 a2 std Z+37, r1 ; 0x25 + 948: 16 a2 std Z+38, r1 ; 0x26 + 94a: 81 e0 ldi r24, 0x01 ; 1 + 94c: 90 e2 ldi r25, 0x20 ; 32 + 94e: 80 a7 std Z+40, r24 ; 0x28 + 950: 91 a7 std Z+41, r25 ; 0x29 + 952: 12 a6 std Z+42, r1 ; 0x2a + 954: 80 ea ldi r24, 0xA0 ; 160 + 956: 84 a7 std Z+44, r24 ; 0x2c + 958: 88 e0 ldi r24, 0x08 ; 8 + 95a: 85 a7 std Z+45, r24 ; 0x2d + 95c: 16 a6 std Z+46, r1 ; 0x2e + 95e: 80 a1 ldd r24, Z+32 ; 0x20 + 960: 80 6a ori r24, 0xA0 ; 160 + 962: 80 a3 std Z+32, r24 ; 0x20 + 964: 16 aa std Z+54, r1 ; 0x36 + 966: 84 e2 ldi r24, 0x24 ; 36 + 968: 80 ab std Z+48, r24 ; 0x30 + 96a: 11 aa std Z+49, r1 ; 0x31 + 96c: 89 e5 ldi r24, 0x59 ; 89 + 96e: 82 ab std Z+50, r24 ; 0x32 + 970: 82 e0 ldi r24, 0x02 ; 2 + 972: 83 ab std Z+51, r24 ; 0x33 + 974: 80 91 02 20 lds r24, 0x2002 ; 0x802002 + 978: 90 91 03 20 lds r25, 0x2003 ; 0x802003 + 97c: 84 ab std Z+52, r24 ; 0x34 + 97e: 95 ab std Z+53, r25 ; 0x35 + 980: 8a e7 ldi r24, 0x7A ; 122 + 982: 94 e2 ldi r25, 0x24 ; 36 + 984: 80 af std Z+56, r24 ; 0x38 + 986: 91 af std Z+57, r25 ; 0x39 + 988: 12 ae std Z+58, r1 ; 0x3a + 98a: 8b e3 ldi r24, 0x3B ; 59 + 98c: 84 af std Z+60, r24 ; 0x3c + 98e: 83 e0 ldi r24, 0x03 ; 3 + 990: 80 93 3d 01 sts 0x013D, r24 ; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d> + 994: 10 92 3e 01 sts 0x013E, r1 ; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e> + 998: 80 a9 ldd r24, Z+48 ; 0x30 + 99a: 80 68 ori r24, 0x80 ; 128 + 99c: 80 ab std Z+48, r24 ; 0x30 + 99e: cf 91 pop r28 + 9a0: 08 95 ret -00000942 : - 942: cf 93 push r28 - 944: c4 e0 ldi r28, 0x04 ; 4 - 946: c0 93 00 20 sts 0x2000, r28 ; 0x802000 <__data_start> - 94a: 94 dd rcall .-1240 ; 0x474 - 94c: e0 e0 ldi r30, 0x00 ; 0 - 94e: f1 e0 ldi r31, 0x01 ; 1 - 950: 10 a2 std Z+32, r1 ; 0x20 - 952: 80 e4 ldi r24, 0x40 ; 64 - 954: 80 a3 std Z+32, r24 ; 0x20 - 956: c0 a3 std Z+32, r28 ; 0x20 - 958: 11 a2 std Z+33, r1 ; 0x21 - 95a: 12 a2 std Z+34, r1 ; 0x22 - 95c: 8b e4 ldi r24, 0x4B ; 75 - 95e: 83 a3 std Z+35, r24 ; 0x23 - 960: 14 a2 std Z+36, r1 ; 0x24 - 962: 15 a2 std Z+37, r1 ; 0x25 - 964: 16 a2 std Z+38, r1 ; 0x26 - 966: 81 e0 ldi r24, 0x01 ; 1 - 968: 90 e2 ldi r25, 0x20 ; 32 - 96a: 80 a7 std Z+40, r24 ; 0x28 - 96c: 91 a7 std Z+41, r25 ; 0x29 - 96e: 12 a6 std Z+42, r1 ; 0x2a - 970: 80 ea ldi r24, 0xA0 ; 160 - 972: 84 a7 std Z+44, r24 ; 0x2c - 974: 88 e0 ldi r24, 0x08 ; 8 - 976: 85 a7 std Z+45, r24 ; 0x2d - 978: 16 a6 std Z+46, r1 ; 0x2e - 97a: 80 a1 ldd r24, Z+32 ; 0x20 - 97c: 80 6a ori r24, 0xA0 ; 160 - 97e: 80 a3 std Z+32, r24 ; 0x20 - 980: 16 aa std Z+54, r1 ; 0x36 - 982: 84 e2 ldi r24, 0x24 ; 36 - 984: 80 ab std Z+48, r24 ; 0x30 - 986: 11 aa std Z+49, r1 ; 0x31 - 988: 89 e5 ldi r24, 0x59 ; 89 - 98a: 82 ab std Z+50, r24 ; 0x32 - 98c: 82 e0 ldi r24, 0x02 ; 2 - 98e: 83 ab std Z+51, r24 ; 0x33 - 990: 80 91 02 20 lds r24, 0x2002 ; 0x802002 - 994: 90 91 03 20 lds r25, 0x2003 ; 0x802003 - 998: 84 ab std Z+52, r24 ; 0x34 - 99a: 95 ab std Z+53, r25 ; 0x35 - 99c: 86 e7 ldi r24, 0x76 ; 118 - 99e: 94 e2 ldi r25, 0x24 ; 36 - 9a0: 80 af std Z+56, r24 ; 0x38 - 9a2: 91 af std Z+57, r25 ; 0x39 - 9a4: 12 ae std Z+58, r1 ; 0x3a - 9a6: 8b e3 ldi r24, 0x3B ; 59 - 9a8: 84 af std Z+60, r24 ; 0x3c - 9aa: 83 e0 ldi r24, 0x03 ; 3 - 9ac: 80 93 3d 01 sts 0x013D, r24 ; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d> - 9b0: 10 92 3e 01 sts 0x013E, r1 ; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e> - 9b4: 80 a9 ldd r24, Z+48 ; 0x30 - 9b6: 80 68 ori r24, 0x80 ; 128 - 9b8: 80 ab std Z+48, r24 ; 0x30 - 9ba: cf 91 pop r28 - 9bc: 08 95 ret +000009a2 : + 9a2: cf 93 push r28 + 9a4: e0 e0 ldi r30, 0x00 ; 0 + 9a6: f1 e0 ldi r31, 0x01 ; 1 + 9a8: 10 8a std Z+16, r1 ; 0x10 + 9aa: b0 e4 ldi r27, 0x40 ; 64 + 9ac: b0 8b std Z+16, r27 ; 0x10 + 9ae: a4 e0 ldi r26, 0x04 ; 4 + 9b0: a0 8b std Z+16, r26 ; 0x10 + 9b2: 11 8a std Z+17, r1 ; 0x11 + 9b4: 51 e9 ldi r21, 0x91 ; 145 + 9b6: 52 8b std Z+18, r21 ; 0x12 + 9b8: 8b e4 ldi r24, 0x4B ; 75 + 9ba: 83 8b std Z+19, r24 ; 0x13 + 9bc: 67 e7 ldi r22, 0x77 ; 119 + 9be: 71 e0 ldi r23, 0x01 ; 1 + 9c0: 64 8b std Z+20, r22 ; 0x14 + 9c2: 75 8b std Z+21, r23 ; 0x15 + 9c4: 80 ea ldi r24, 0xA0 ; 160 + 9c6: 80 8f std Z+24, r24 ; 0x18 + 9c8: 48 e0 ldi r20, 0x08 ; 8 + 9ca: 41 8f std Z+25, r20 ; 0x19 + 9cc: 12 8e std Z+26, r1 ; 0x1a + 9ce: c0 91 c2 20 lds r28, 0x20C2 ; 0x8020c2 + 9d2: 8e ee ldi r24, 0xEE ; 238 + 9d4: 92 e0 ldi r25, 0x02 ; 2 + 9d6: c8 9f mul r28, r24 + 9d8: 90 01 movw r18, r0 + 9da: c9 9f mul r28, r25 + 9dc: 30 0d add r19, r0 + 9de: 11 24 eor r1, r1 + 9e0: 26 58 subi r18, 0x86 ; 134 + 9e2: 39 4d sbci r19, 0xD9 ; 217 + 9e4: 24 8f std Z+28, r18 ; 0x1c + 9e6: c0 91 c2 20 lds r28, 0x20C2 ; 0x8020c2 + 9ea: c8 9f mul r28, r24 + 9ec: 90 01 movw r18, r0 + 9ee: c9 9f mul r28, r25 + 9f0: 30 0d add r19, r0 + 9f2: 11 24 eor r1, r1 + 9f4: 26 58 subi r18, 0x86 ; 134 + 9f6: 39 4d sbci r19, 0xD9 ; 217 + 9f8: 35 8f std Z+29, r19 ; 0x1d + 9fa: 16 8e std Z+30, r1 ; 0x1e + 9fc: 20 89 ldd r18, Z+16 ; 0x10 + 9fe: 20 68 ori r18, 0x80 ; 128 + a00: 20 8b std Z+16, r18 ; 0x10 + a02: e0 e4 ldi r30, 0x40 ; 64 + a04: f1 e0 ldi r31, 0x01 ; 1 + a06: 10 82 st Z, r1 + a08: b0 83 st Z, r27 + a0a: a0 83 st Z, r26 + a0c: 10 92 41 01 sts 0x0141, r1 ; 0x800141 <__TEXT_REGION_LENGTH__+0x700141> + a10: 50 93 42 01 sts 0x0142, r21 ; 0x800142 <__TEXT_REGION_LENGTH__+0x700142> + a14: 2a e4 ldi r18, 0x4A ; 74 + a16: 20 93 43 01 sts 0x0143, r18 ; 0x800143 <__TEXT_REGION_LENGTH__+0x700143> + a1a: 60 93 44 01 sts 0x0144, r22 ; 0x800144 <__TEXT_REGION_LENGTH__+0x700144> + a1e: 70 93 45 01 sts 0x0145, r23 ; 0x800145 <__TEXT_REGION_LENGTH__+0x700145> + a22: 23 ec ldi r18, 0xC3 ; 195 + a24: 20 93 48 01 sts 0x0148, r18 ; 0x800148 <__TEXT_REGION_LENGTH__+0x700148> + a28: 40 93 49 01 sts 0x0149, r20 ; 0x800149 <__TEXT_REGION_LENGTH__+0x700149> + a2c: 10 92 4a 01 sts 0x014A, r1 ; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a> + a30: 40 91 c2 20 lds r20, 0x20C2 ; 0x8020c2 + a34: 48 9f mul r20, r24 + a36: 90 01 movw r18, r0 + a38: 49 9f mul r20, r25 + a3a: 30 0d add r19, r0 + a3c: 11 24 eor r1, r1 + a3e: 2f 50 subi r18, 0x0F ; 15 + a40: 38 4d sbci r19, 0xD8 ; 216 + a42: 20 93 4c 01 sts 0x014C, r18 ; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c> + a46: 40 91 c2 20 lds r20, 0x20C2 ; 0x8020c2 + a4a: 48 9f mul r20, r24 + a4c: 90 01 movw r18, r0 + a4e: 49 9f mul r20, r25 + a50: 30 0d add r19, r0 + a52: 11 24 eor r1, r1 + a54: c9 01 movw r24, r18 + a56: 8f 50 subi r24, 0x0F ; 15 + a58: 98 4d sbci r25, 0xD8 ; 216 + a5a: 90 93 4d 01 sts 0x014D, r25 ; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d> + a5e: 10 92 4e 01 sts 0x014E, r1 ; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e> + a62: 80 81 ld r24, Z + a64: 80 68 ori r24, 0x80 ; 128 + a66: 80 83 st Z, r24 + a68: cf 91 pop r28 + a6a: 08 95 ret -000009be : - 9be: cf 93 push r28 - 9c0: e0 e0 ldi r30, 0x00 ; 0 - 9c2: f1 e0 ldi r31, 0x01 ; 1 - 9c4: 10 8a std Z+16, r1 ; 0x10 - 9c6: b0 e4 ldi r27, 0x40 ; 64 - 9c8: b0 8b std Z+16, r27 ; 0x10 - 9ca: a4 e0 ldi r26, 0x04 ; 4 - 9cc: a0 8b std Z+16, r26 ; 0x10 - 9ce: 11 8a std Z+17, r1 ; 0x11 - 9d0: 51 e9 ldi r21, 0x91 ; 145 - 9d2: 52 8b std Z+18, r21 ; 0x12 - 9d4: 8b e4 ldi r24, 0x4B ; 75 - 9d6: 83 8b std Z+19, r24 ; 0x13 - 9d8: 67 e7 ldi r22, 0x77 ; 119 - 9da: 71 e0 ldi r23, 0x01 ; 1 - 9dc: 64 8b std Z+20, r22 ; 0x14 - 9de: 75 8b std Z+21, r23 ; 0x15 - 9e0: 80 ea ldi r24, 0xA0 ; 160 - 9e2: 80 8f std Z+24, r24 ; 0x18 - 9e4: 48 e0 ldi r20, 0x08 ; 8 - 9e6: 41 8f std Z+25, r20 ; 0x19 - 9e8: 12 8e std Z+26, r1 ; 0x1a - 9ea: c0 91 c2 20 lds r28, 0x20C2 ; 0x8020c2 - 9ee: 8e ee ldi r24, 0xEE ; 238 - 9f0: 92 e0 ldi r25, 0x02 ; 2 - 9f2: c8 9f mul r28, r24 - 9f4: 90 01 movw r18, r0 - 9f6: c9 9f mul r28, r25 - 9f8: 30 0d add r19, r0 - 9fa: 11 24 eor r1, r1 - 9fc: 2a 58 subi r18, 0x8A ; 138 - 9fe: 39 4d sbci r19, 0xD9 ; 217 - a00: 24 8f std Z+28, r18 ; 0x1c - a02: c0 91 c2 20 lds r28, 0x20C2 ; 0x8020c2 - a06: c8 9f mul r28, r24 - a08: 90 01 movw r18, r0 - a0a: c9 9f mul r28, r25 - a0c: 30 0d add r19, r0 - a0e: 11 24 eor r1, r1 - a10: 2a 58 subi r18, 0x8A ; 138 - a12: 39 4d sbci r19, 0xD9 ; 217 - a14: 35 8f std Z+29, r19 ; 0x1d - a16: 16 8e std Z+30, r1 ; 0x1e - a18: 20 89 ldd r18, Z+16 ; 0x10 - a1a: 20 68 ori r18, 0x80 ; 128 - a1c: 20 8b std Z+16, r18 ; 0x10 - a1e: e0 e4 ldi r30, 0x40 ; 64 - a20: f1 e0 ldi r31, 0x01 ; 1 - a22: 10 82 st Z, r1 - a24: b0 83 st Z, r27 - a26: a0 83 st Z, r26 - a28: 10 92 41 01 sts 0x0141, r1 ; 0x800141 <__TEXT_REGION_LENGTH__+0x700141> - a2c: 50 93 42 01 sts 0x0142, r21 ; 0x800142 <__TEXT_REGION_LENGTH__+0x700142> - a30: 2a e4 ldi r18, 0x4A ; 74 - a32: 20 93 43 01 sts 0x0143, r18 ; 0x800143 <__TEXT_REGION_LENGTH__+0x700143> - a36: 60 93 44 01 sts 0x0144, r22 ; 0x800144 <__TEXT_REGION_LENGTH__+0x700144> - a3a: 70 93 45 01 sts 0x0145, r23 ; 0x800145 <__TEXT_REGION_LENGTH__+0x700145> - a3e: 23 ec ldi r18, 0xC3 ; 195 - a40: 20 93 48 01 sts 0x0148, r18 ; 0x800148 <__TEXT_REGION_LENGTH__+0x700148> - a44: 40 93 49 01 sts 0x0149, r20 ; 0x800149 <__TEXT_REGION_LENGTH__+0x700149> - a48: 10 92 4a 01 sts 0x014A, r1 ; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a> - a4c: 40 91 c2 20 lds r20, 0x20C2 ; 0x8020c2 - a50: 48 9f mul r20, r24 - a52: 90 01 movw r18, r0 - a54: 49 9f mul r20, r25 - a56: 30 0d add r19, r0 - a58: 11 24 eor r1, r1 - a5a: 23 51 subi r18, 0x13 ; 19 - a5c: 38 4d sbci r19, 0xD8 ; 216 - a5e: 20 93 4c 01 sts 0x014C, r18 ; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c> - a62: 40 91 c2 20 lds r20, 0x20C2 ; 0x8020c2 - a66: 48 9f mul r20, r24 - a68: 90 01 movw r18, r0 - a6a: 49 9f mul r20, r25 - a6c: 30 0d add r19, r0 - a6e: 11 24 eor r1, r1 - a70: c9 01 movw r24, r18 - a72: 83 51 subi r24, 0x13 ; 19 - a74: 98 4d sbci r25, 0xD8 ; 216 - a76: 90 93 4d 01 sts 0x014D, r25 ; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d> - a7a: 10 92 4e 01 sts 0x014E, r1 ; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e> - a7e: 80 81 ld r24, Z - a80: 80 68 ori r24, 0x80 ; 128 - a82: 80 83 st Z, r24 - a84: cf 91 pop r28 - a86: 08 95 ret +00000a6c : + a6c: 85 e0 ldi r24, 0x05 ; 5 + a6e: 80 93 00 20 sts 0x2000, r24 ; 0x802000 <__data_start> + a72: f2 dc rcall .-1564 ; 0x458 + a74: e0 e0 ldi r30, 0x00 ; 0 + a76: f1 e0 ldi r31, 0x01 ; 1 + a78: 16 aa std Z+54, r1 ; 0x36 + a7a: 34 e2 ldi r19, 0x24 ; 36 + a7c: 30 ab std Z+48, r19 ; 0x30 + a7e: 11 aa std Z+49, r1 ; 0x31 + a80: 29 e5 ldi r18, 0x59 ; 89 + a82: 22 ab std Z+50, r18 ; 0x32 + a84: 83 e0 ldi r24, 0x03 ; 3 + a86: 83 ab std Z+51, r24 ; 0x33 + a88: 40 91 04 20 lds r20, 0x2004 ; 0x802004 + a8c: 50 91 05 20 lds r21, 0x2005 ; 0x802005 + a90: 44 ab std Z+52, r20 ; 0x34 + a92: 55 ab std Z+53, r21 ; 0x35 + a94: 4a e6 ldi r20, 0x6A ; 106 + a96: 52 e2 ldi r21, 0x22 ; 34 + a98: 40 af std Z+56, r20 ; 0x38 + a9a: 51 af std Z+57, r21 ; 0x39 + a9c: 12 ae std Z+58, r1 ; 0x3a + a9e: 99 e3 ldi r25, 0x39 ; 57 + aa0: 94 af std Z+60, r25 ; 0x3c + aa2: 80 93 3d 01 sts 0x013D, r24 ; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d> + aa6: 10 92 3e 01 sts 0x013E, r1 ; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e> + aaa: 90 a9 ldd r25, Z+48 ; 0x30 + aac: 90 68 ori r25, 0x80 ; 128 + aae: 90 ab std Z+48, r25 ; 0x30 + ab0: 10 92 46 01 sts 0x0146, r1 ; 0x800146 <__TEXT_REGION_LENGTH__+0x700146> + ab4: e0 e4 ldi r30, 0x40 ; 64 + ab6: f1 e0 ldi r31, 0x01 ; 1 + ab8: 30 83 st Z, r19 + aba: 10 92 41 01 sts 0x0141, r1 ; 0x800141 <__TEXT_REGION_LENGTH__+0x700141> + abe: 20 93 42 01 sts 0x0142, r18 ; 0x800142 <__TEXT_REGION_LENGTH__+0x700142> + ac2: 80 93 43 01 sts 0x0143, r24 ; 0x800143 <__TEXT_REGION_LENGTH__+0x700143> + ac6: 20 91 04 20 lds r18, 0x2004 ; 0x802004 + aca: 30 91 05 20 lds r19, 0x2005 ; 0x802005 + ace: 20 93 44 01 sts 0x0144, r18 ; 0x800144 <__TEXT_REGION_LENGTH__+0x700144> + ad2: 30 93 45 01 sts 0x0145, r19 ; 0x800145 <__TEXT_REGION_LENGTH__+0x700145> + ad6: 2a e7 ldi r18, 0x7A ; 122 + ad8: 34 e2 ldi r19, 0x24 ; 36 + ada: 20 93 48 01 sts 0x0148, r18 ; 0x800148 <__TEXT_REGION_LENGTH__+0x700148> + ade: 30 93 49 01 sts 0x0149, r19 ; 0x800149 <__TEXT_REGION_LENGTH__+0x700149> + ae2: 10 92 4a 01 sts 0x014A, r1 ; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a> + ae6: 9b e3 ldi r25, 0x3B ; 59 + ae8: 90 93 4c 01 sts 0x014C, r25 ; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c> + aec: 80 93 4d 01 sts 0x014D, r24 ; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d> + af0: 10 92 4e 01 sts 0x014E, r1 ; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e> + af4: 80 81 ld r24, Z + af6: 80 68 ori r24, 0x80 ; 128 + af8: 80 83 st Z, r24 + afa: 08 95 ret -00000a88 : - a88: 85 e0 ldi r24, 0x05 ; 5 - a8a: 80 93 00 20 sts 0x2000, r24 ; 0x802000 <__data_start> - a8e: f2 dc rcall .-1564 ; 0x474 - a90: e0 e0 ldi r30, 0x00 ; 0 - a92: f1 e0 ldi r31, 0x01 ; 1 - a94: 16 aa std Z+54, r1 ; 0x36 - a96: 34 e2 ldi r19, 0x24 ; 36 - a98: 30 ab std Z+48, r19 ; 0x30 - a9a: 11 aa std Z+49, r1 ; 0x31 - a9c: 29 e5 ldi r18, 0x59 ; 89 - a9e: 22 ab std Z+50, r18 ; 0x32 - aa0: 83 e0 ldi r24, 0x03 ; 3 - aa2: 83 ab std Z+51, r24 ; 0x33 - aa4: 40 91 04 20 lds r20, 0x2004 ; 0x802004 - aa8: 50 91 05 20 lds r21, 0x2005 ; 0x802005 - aac: 44 ab std Z+52, r20 ; 0x34 - aae: 55 ab std Z+53, r21 ; 0x35 - ab0: 46 e6 ldi r20, 0x66 ; 102 - ab2: 52 e2 ldi r21, 0x22 ; 34 - ab4: 40 af std Z+56, r20 ; 0x38 - ab6: 51 af std Z+57, r21 ; 0x39 - ab8: 12 ae std Z+58, r1 ; 0x3a - aba: 99 e3 ldi r25, 0x39 ; 57 - abc: 94 af std Z+60, r25 ; 0x3c - abe: 80 93 3d 01 sts 0x013D, r24 ; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d> - ac2: 10 92 3e 01 sts 0x013E, r1 ; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e> - ac6: 90 a9 ldd r25, Z+48 ; 0x30 - ac8: 90 68 ori r25, 0x80 ; 128 - aca: 90 ab std Z+48, r25 ; 0x30 - acc: 10 92 46 01 sts 0x0146, r1 ; 0x800146 <__TEXT_REGION_LENGTH__+0x700146> - ad0: e0 e4 ldi r30, 0x40 ; 64 - ad2: f1 e0 ldi r31, 0x01 ; 1 - ad4: 30 83 st Z, r19 - ad6: 10 92 41 01 sts 0x0141, r1 ; 0x800141 <__TEXT_REGION_LENGTH__+0x700141> - ada: 20 93 42 01 sts 0x0142, r18 ; 0x800142 <__TEXT_REGION_LENGTH__+0x700142> - ade: 80 93 43 01 sts 0x0143, r24 ; 0x800143 <__TEXT_REGION_LENGTH__+0x700143> - ae2: 20 91 04 20 lds r18, 0x2004 ; 0x802004 - ae6: 30 91 05 20 lds r19, 0x2005 ; 0x802005 - aea: 20 93 44 01 sts 0x0144, r18 ; 0x800144 <__TEXT_REGION_LENGTH__+0x700144> - aee: 30 93 45 01 sts 0x0145, r19 ; 0x800145 <__TEXT_REGION_LENGTH__+0x700145> - af2: 26 e7 ldi r18, 0x76 ; 118 - af4: 34 e2 ldi r19, 0x24 ; 36 - af6: 20 93 48 01 sts 0x0148, r18 ; 0x800148 <__TEXT_REGION_LENGTH__+0x700148> - afa: 30 93 49 01 sts 0x0149, r19 ; 0x800149 <__TEXT_REGION_LENGTH__+0x700149> - afe: 10 92 4a 01 sts 0x014A, r1 ; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a> - b02: 9b e3 ldi r25, 0x3B ; 59 - b04: 90 93 4c 01 sts 0x014C, r25 ; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c> - b08: 80 93 4d 01 sts 0x014D, r24 ; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d> - b0c: 10 92 4e 01 sts 0x014E, r1 ; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e> - b10: 80 81 ld r24, Z - b12: 80 68 ori r24, 0x80 ; 128 - b14: 80 83 st Z, r24 - b16: 08 95 ret +00000afc : + afc: 86 e0 ldi r24, 0x06 ; 6 + afe: 80 93 00 20 sts 0x2000, r24 ; 0x802000 <__data_start> + b02: aa dc rcall .-1708 ; 0x458 + b04: e0 e0 ldi r30, 0x00 ; 0 + b06: f1 e0 ldi r31, 0x01 ; 1 + b08: 16 aa std Z+54, r1 ; 0x36 + b0a: 34 e2 ldi r19, 0x24 ; 36 + b0c: 30 ab std Z+48, r19 ; 0x30 + b0e: 11 aa std Z+49, r1 ; 0x31 + b10: 29 e5 ldi r18, 0x59 ; 89 + b12: 22 ab std Z+50, r18 ; 0x32 + b14: 83 e0 ldi r24, 0x03 ; 3 + b16: 83 ab std Z+51, r24 ; 0x33 + b18: 40 91 04 20 lds r20, 0x2004 ; 0x802004 + b1c: 50 91 05 20 lds r21, 0x2005 ; 0x802005 + b20: 44 ab std Z+52, r20 ; 0x34 + b22: 55 ab std Z+53, r21 ; 0x35 + b24: 4a e6 ldi r20, 0x6A ; 106 + b26: 52 e2 ldi r21, 0x22 ; 34 + b28: 40 af std Z+56, r20 ; 0x38 + b2a: 51 af std Z+57, r21 ; 0x39 + b2c: 12 ae std Z+58, r1 ; 0x3a + b2e: 99 e3 ldi r25, 0x39 ; 57 + b30: 94 af std Z+60, r25 ; 0x3c + b32: 80 93 3d 01 sts 0x013D, r24 ; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d> + b36: 10 92 3e 01 sts 0x013E, r1 ; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e> + b3a: 90 a9 ldd r25, Z+48 ; 0x30 + b3c: 90 68 ori r25, 0x80 ; 128 + b3e: 90 ab std Z+48, r25 ; 0x30 + b40: 10 92 46 01 sts 0x0146, r1 ; 0x800146 <__TEXT_REGION_LENGTH__+0x700146> + b44: e0 e4 ldi r30, 0x40 ; 64 + b46: f1 e0 ldi r31, 0x01 ; 1 + b48: 30 83 st Z, r19 + b4a: 10 92 41 01 sts 0x0141, r1 ; 0x800141 <__TEXT_REGION_LENGTH__+0x700141> + b4e: 20 93 42 01 sts 0x0142, r18 ; 0x800142 <__TEXT_REGION_LENGTH__+0x700142> + b52: 92 e0 ldi r25, 0x02 ; 2 + b54: 90 93 43 01 sts 0x0143, r25 ; 0x800143 <__TEXT_REGION_LENGTH__+0x700143> + b58: 20 91 02 20 lds r18, 0x2002 ; 0x802002 + b5c: 30 91 03 20 lds r19, 0x2003 ; 0x802003 + b60: 20 93 44 01 sts 0x0144, r18 ; 0x800144 <__TEXT_REGION_LENGTH__+0x700144> + b64: 30 93 45 01 sts 0x0145, r19 ; 0x800145 <__TEXT_REGION_LENGTH__+0x700145> + b68: 2a e7 ldi r18, 0x7A ; 122 + b6a: 34 e2 ldi r19, 0x24 ; 36 + b6c: 20 93 48 01 sts 0x0148, r18 ; 0x800148 <__TEXT_REGION_LENGTH__+0x700148> + b70: 30 93 49 01 sts 0x0149, r19 ; 0x800149 <__TEXT_REGION_LENGTH__+0x700149> + b74: 10 92 4a 01 sts 0x014A, r1 ; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a> + b78: 9b e3 ldi r25, 0x3B ; 59 + b7a: 90 93 4c 01 sts 0x014C, r25 ; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c> + b7e: 80 93 4d 01 sts 0x014D, r24 ; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d> + b82: 10 92 4e 01 sts 0x014E, r1 ; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e> + b86: 80 81 ld r24, Z + b88: 80 68 ori r24, 0x80 ; 128 + b8a: 80 83 st Z, r24 + b8c: 08 95 ret -00000b18 : - b18: 86 e0 ldi r24, 0x06 ; 6 - b1a: 80 93 00 20 sts 0x2000, r24 ; 0x802000 <__data_start> - b1e: aa dc rcall .-1708 ; 0x474 - b20: e0 e0 ldi r30, 0x00 ; 0 - b22: f1 e0 ldi r31, 0x01 ; 1 - b24: 16 aa std Z+54, r1 ; 0x36 - b26: 34 e2 ldi r19, 0x24 ; 36 - b28: 30 ab std Z+48, r19 ; 0x30 - b2a: 11 aa std Z+49, r1 ; 0x31 - b2c: 29 e5 ldi r18, 0x59 ; 89 - b2e: 22 ab std Z+50, r18 ; 0x32 - b30: 83 e0 ldi r24, 0x03 ; 3 - b32: 83 ab std Z+51, r24 ; 0x33 - b34: 40 91 04 20 lds r20, 0x2004 ; 0x802004 - b38: 50 91 05 20 lds r21, 0x2005 ; 0x802005 - b3c: 44 ab std Z+52, r20 ; 0x34 - b3e: 55 ab std Z+53, r21 ; 0x35 - b40: 46 e6 ldi r20, 0x66 ; 102 - b42: 52 e2 ldi r21, 0x22 ; 34 - b44: 40 af std Z+56, r20 ; 0x38 - b46: 51 af std Z+57, r21 ; 0x39 - b48: 12 ae std Z+58, r1 ; 0x3a - b4a: 99 e3 ldi r25, 0x39 ; 57 - b4c: 94 af std Z+60, r25 ; 0x3c - b4e: 80 93 3d 01 sts 0x013D, r24 ; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d> - b52: 10 92 3e 01 sts 0x013E, r1 ; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e> - b56: 90 a9 ldd r25, Z+48 ; 0x30 - b58: 90 68 ori r25, 0x80 ; 128 - b5a: 90 ab std Z+48, r25 ; 0x30 - b5c: 10 92 46 01 sts 0x0146, r1 ; 0x800146 <__TEXT_REGION_LENGTH__+0x700146> - b60: e0 e4 ldi r30, 0x40 ; 64 - b62: f1 e0 ldi r31, 0x01 ; 1 - b64: 30 83 st Z, r19 - b66: 10 92 41 01 sts 0x0141, r1 ; 0x800141 <__TEXT_REGION_LENGTH__+0x700141> - b6a: 20 93 42 01 sts 0x0142, r18 ; 0x800142 <__TEXT_REGION_LENGTH__+0x700142> - b6e: 92 e0 ldi r25, 0x02 ; 2 - b70: 90 93 43 01 sts 0x0143, r25 ; 0x800143 <__TEXT_REGION_LENGTH__+0x700143> - b74: 20 91 02 20 lds r18, 0x2002 ; 0x802002 - b78: 30 91 03 20 lds r19, 0x2003 ; 0x802003 - b7c: 20 93 44 01 sts 0x0144, r18 ; 0x800144 <__TEXT_REGION_LENGTH__+0x700144> - b80: 30 93 45 01 sts 0x0145, r19 ; 0x800145 <__TEXT_REGION_LENGTH__+0x700145> - b84: 26 e7 ldi r18, 0x76 ; 118 - b86: 34 e2 ldi r19, 0x24 ; 36 - b88: 20 93 48 01 sts 0x0148, r18 ; 0x800148 <__TEXT_REGION_LENGTH__+0x700148> - b8c: 30 93 49 01 sts 0x0149, r19 ; 0x800149 <__TEXT_REGION_LENGTH__+0x700149> - b90: 10 92 4a 01 sts 0x014A, r1 ; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a> - b94: 9b e3 ldi r25, 0x3B ; 59 - b96: 90 93 4c 01 sts 0x014C, r25 ; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c> - b9a: 80 93 4d 01 sts 0x014D, r24 ; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d> - b9e: 10 92 4e 01 sts 0x014E, r1 ; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e> - ba2: 80 81 ld r24, Z - ba4: 80 68 ori r24, 0x80 ; 128 - ba6: 80 83 st Z, r24 - ba8: 08 95 ret +00000b8e : + b8e: e0 e0 ldi r30, 0x00 ; 0 + b90: f1 e0 ldi r31, 0x01 ; 1 + b92: 10 8a std Z+16, r1 ; 0x10 + b94: 80 e4 ldi r24, 0x40 ; 64 + b96: 80 8b std Z+16, r24 ; 0x10 + b98: 84 e0 ldi r24, 0x04 ; 4 + b9a: 80 8b std Z+16, r24 ; 0x10 + b9c: 11 8a std Z+17, r1 ; 0x11 + b9e: 81 e9 ldi r24, 0x91 ; 145 + ba0: 82 8b std Z+18, r24 ; 0x12 + ba2: 80 e1 ldi r24, 0x10 ; 16 + ba4: 83 8b std Z+19, r24 ; 0x13 + ba6: 2e ee ldi r18, 0xEE ; 238 + ba8: 32 e0 ldi r19, 0x02 ; 2 + baa: 24 8b std Z+20, r18 ; 0x14 + bac: 35 8b std Z+21, r19 ; 0x15 + bae: 84 e2 ldi r24, 0x24 ; 36 + bb0: 80 8f std Z+24, r24 ; 0x18 + bb2: 82 e0 ldi r24, 0x02 ; 2 + bb4: 81 8f std Z+25, r24 ; 0x19 + bb6: 12 8e std Z+26, r1 ; 0x1a + bb8: 40 91 c2 20 lds r20, 0x20C2 ; 0x8020c2 + bbc: 42 9f mul r20, r18 + bbe: c0 01 movw r24, r0 + bc0: 43 9f mul r20, r19 + bc2: 90 0d add r25, r0 + bc4: 11 24 eor r1, r1 + bc6: 86 58 subi r24, 0x86 ; 134 + bc8: 99 4d sbci r25, 0xD9 ; 217 + bca: 84 8f std Z+28, r24 ; 0x1c + bcc: 40 91 c2 20 lds r20, 0x20C2 ; 0x8020c2 + bd0: 42 9f mul r20, r18 + bd2: c0 01 movw r24, r0 + bd4: 43 9f mul r20, r19 + bd6: 90 0d add r25, r0 + bd8: 11 24 eor r1, r1 + bda: 86 58 subi r24, 0x86 ; 134 + bdc: 99 4d sbci r25, 0xD9 ; 217 + bde: 95 8f std Z+29, r25 ; 0x1d + be0: 16 8e std Z+30, r1 ; 0x1e + be2: 80 89 ldd r24, Z+16 ; 0x10 + be4: 80 68 ori r24, 0x80 ; 128 + be6: 80 8b std Z+16, r24 ; 0x10 + be8: 08 95 ret -00000baa : - baa: e0 e0 ldi r30, 0x00 ; 0 - bac: f1 e0 ldi r31, 0x01 ; 1 - bae: 10 8a std Z+16, r1 ; 0x10 - bb0: 80 e4 ldi r24, 0x40 ; 64 - bb2: 80 8b std Z+16, r24 ; 0x10 - bb4: 84 e0 ldi r24, 0x04 ; 4 - bb6: 80 8b std Z+16, r24 ; 0x10 - bb8: 11 8a std Z+17, r1 ; 0x11 - bba: 81 e9 ldi r24, 0x91 ; 145 - bbc: 82 8b std Z+18, r24 ; 0x12 - bbe: 80 e1 ldi r24, 0x10 ; 16 - bc0: 83 8b std Z+19, r24 ; 0x13 - bc2: 2e ee ldi r18, 0xEE ; 238 - bc4: 32 e0 ldi r19, 0x02 ; 2 - bc6: 24 8b std Z+20, r18 ; 0x14 - bc8: 35 8b std Z+21, r19 ; 0x15 - bca: 84 e2 ldi r24, 0x24 ; 36 - bcc: 80 8f std Z+24, r24 ; 0x18 - bce: 82 e0 ldi r24, 0x02 ; 2 - bd0: 81 8f std Z+25, r24 ; 0x19 - bd2: 12 8e std Z+26, r1 ; 0x1a - bd4: 40 91 c2 20 lds r20, 0x20C2 ; 0x8020c2 - bd8: 42 9f mul r20, r18 - bda: c0 01 movw r24, r0 - bdc: 43 9f mul r20, r19 - bde: 90 0d add r25, r0 - be0: 11 24 eor r1, r1 - be2: 8a 58 subi r24, 0x8A ; 138 - be4: 99 4d sbci r25, 0xD9 ; 217 - be6: 84 8f std Z+28, r24 ; 0x1c - be8: 40 91 c2 20 lds r20, 0x20C2 ; 0x8020c2 - bec: 42 9f mul r20, r18 - bee: c0 01 movw r24, r0 - bf0: 43 9f mul r20, r19 - bf2: 90 0d add r25, r0 - bf4: 11 24 eor r1, r1 - bf6: 8a 58 subi r24, 0x8A ; 138 - bf8: 99 4d sbci r25, 0xD9 ; 217 - bfa: 95 8f std Z+29, r25 ; 0x1d - bfc: 16 8e std Z+30, r1 ; 0x1e - bfe: 80 89 ldd r24, Z+16 ; 0x10 - c00: 80 68 ori r24, 0x80 ; 128 - c02: 80 8b std Z+16, r24 ; 0x10 - c04: 08 95 ret +00000bea : + bea: 87 e0 ldi r24, 0x07 ; 7 + bec: 80 93 00 20 sts 0x2000, r24 ; 0x802000 <__data_start> + bf0: 33 dc rcall .-1946 ; 0x458 + bf2: e0 e0 ldi r30, 0x00 ; 0 + bf4: f1 e0 ldi r31, 0x01 ; 1 + bf6: 16 aa std Z+54, r1 ; 0x36 + bf8: 34 e2 ldi r19, 0x24 ; 36 + bfa: 30 ab std Z+48, r19 ; 0x30 + bfc: 11 aa std Z+49, r1 ; 0x31 + bfe: 29 e5 ldi r18, 0x59 ; 89 + c00: 22 ab std Z+50, r18 ; 0x32 + c02: 83 e0 ldi r24, 0x03 ; 3 + c04: 83 ab std Z+51, r24 ; 0x33 + c06: 40 91 04 20 lds r20, 0x2004 ; 0x802004 + c0a: 50 91 05 20 lds r21, 0x2005 ; 0x802005 + c0e: 44 ab std Z+52, r20 ; 0x34 + c10: 55 ab std Z+53, r21 ; 0x35 + c12: 4a e6 ldi r20, 0x6A ; 106 + c14: 52 e2 ldi r21, 0x22 ; 34 + c16: 40 af std Z+56, r20 ; 0x38 + c18: 51 af std Z+57, r21 ; 0x39 + c1a: 12 ae std Z+58, r1 ; 0x3a + c1c: 99 e3 ldi r25, 0x39 ; 57 + c1e: 94 af std Z+60, r25 ; 0x3c + c20: 80 93 3d 01 sts 0x013D, r24 ; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d> + c24: 10 92 3e 01 sts 0x013E, r1 ; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e> + c28: 90 a9 ldd r25, Z+48 ; 0x30 + c2a: 90 68 ori r25, 0x80 ; 128 + c2c: 90 ab std Z+48, r25 ; 0x30 + c2e: 10 92 46 01 sts 0x0146, r1 ; 0x800146 <__TEXT_REGION_LENGTH__+0x700146> + c32: e0 e4 ldi r30, 0x40 ; 64 + c34: f1 e0 ldi r31, 0x01 ; 1 + c36: 30 83 st Z, r19 + c38: 10 92 41 01 sts 0x0141, r1 ; 0x800141 <__TEXT_REGION_LENGTH__+0x700141> + c3c: 20 93 42 01 sts 0x0142, r18 ; 0x800142 <__TEXT_REGION_LENGTH__+0x700142> + c40: 92 e0 ldi r25, 0x02 ; 2 + c42: 90 93 43 01 sts 0x0143, r25 ; 0x800143 <__TEXT_REGION_LENGTH__+0x700143> + c46: 20 91 02 20 lds r18, 0x2002 ; 0x802002 + c4a: 30 91 03 20 lds r19, 0x2003 ; 0x802003 + c4e: 20 93 44 01 sts 0x0144, r18 ; 0x800144 <__TEXT_REGION_LENGTH__+0x700144> + c52: 30 93 45 01 sts 0x0145, r19 ; 0x800145 <__TEXT_REGION_LENGTH__+0x700145> + c56: 2a e7 ldi r18, 0x7A ; 122 + c58: 34 e2 ldi r19, 0x24 ; 36 + c5a: 20 93 48 01 sts 0x0148, r18 ; 0x800148 <__TEXT_REGION_LENGTH__+0x700148> + c5e: 30 93 49 01 sts 0x0149, r19 ; 0x800149 <__TEXT_REGION_LENGTH__+0x700149> + c62: 10 92 4a 01 sts 0x014A, r1 ; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a> + c66: 9b e3 ldi r25, 0x3B ; 59 + c68: 90 93 4c 01 sts 0x014C, r25 ; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c> + c6c: 80 93 4d 01 sts 0x014D, r24 ; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d> + c70: 10 92 4e 01 sts 0x014E, r1 ; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e> + c74: 80 81 ld r24, Z + c76: 80 68 ori r24, 0x80 ; 128 + c78: 80 83 st Z, r24 + c7a: 08 95 ret -00000c06 : - c06: 87 e0 ldi r24, 0x07 ; 7 - c08: 80 93 00 20 sts 0x2000, r24 ; 0x802000 <__data_start> - c0c: 33 dc rcall .-1946 ; 0x474 - c0e: e0 e0 ldi r30, 0x00 ; 0 - c10: f1 e0 ldi r31, 0x01 ; 1 - c12: 16 aa std Z+54, r1 ; 0x36 - c14: 34 e2 ldi r19, 0x24 ; 36 - c16: 30 ab std Z+48, r19 ; 0x30 - c18: 11 aa std Z+49, r1 ; 0x31 - c1a: 29 e5 ldi r18, 0x59 ; 89 - c1c: 22 ab std Z+50, r18 ; 0x32 - c1e: 83 e0 ldi r24, 0x03 ; 3 - c20: 83 ab std Z+51, r24 ; 0x33 - c22: 40 91 04 20 lds r20, 0x2004 ; 0x802004 - c26: 50 91 05 20 lds r21, 0x2005 ; 0x802005 - c2a: 44 ab std Z+52, r20 ; 0x34 - c2c: 55 ab std Z+53, r21 ; 0x35 - c2e: 46 e6 ldi r20, 0x66 ; 102 - c30: 52 e2 ldi r21, 0x22 ; 34 - c32: 40 af std Z+56, r20 ; 0x38 - c34: 51 af std Z+57, r21 ; 0x39 - c36: 12 ae std Z+58, r1 ; 0x3a - c38: 99 e3 ldi r25, 0x39 ; 57 - c3a: 94 af std Z+60, r25 ; 0x3c - c3c: 80 93 3d 01 sts 0x013D, r24 ; 0x80013d <__TEXT_REGION_LENGTH__+0x70013d> - c40: 10 92 3e 01 sts 0x013E, r1 ; 0x80013e <__TEXT_REGION_LENGTH__+0x70013e> - c44: 90 a9 ldd r25, Z+48 ; 0x30 - c46: 90 68 ori r25, 0x80 ; 128 - c48: 90 ab std Z+48, r25 ; 0x30 - c4a: 10 92 46 01 sts 0x0146, r1 ; 0x800146 <__TEXT_REGION_LENGTH__+0x700146> - c4e: e0 e4 ldi r30, 0x40 ; 64 - c50: f1 e0 ldi r31, 0x01 ; 1 - c52: 30 83 st Z, r19 - c54: 10 92 41 01 sts 0x0141, r1 ; 0x800141 <__TEXT_REGION_LENGTH__+0x700141> - c58: 20 93 42 01 sts 0x0142, r18 ; 0x800142 <__TEXT_REGION_LENGTH__+0x700142> - c5c: 92 e0 ldi r25, 0x02 ; 2 - c5e: 90 93 43 01 sts 0x0143, r25 ; 0x800143 <__TEXT_REGION_LENGTH__+0x700143> - c62: 20 91 02 20 lds r18, 0x2002 ; 0x802002 - c66: 30 91 03 20 lds r19, 0x2003 ; 0x802003 - c6a: 20 93 44 01 sts 0x0144, r18 ; 0x800144 <__TEXT_REGION_LENGTH__+0x700144> - c6e: 30 93 45 01 sts 0x0145, r19 ; 0x800145 <__TEXT_REGION_LENGTH__+0x700145> - c72: 26 e7 ldi r18, 0x76 ; 118 - c74: 34 e2 ldi r19, 0x24 ; 36 - c76: 20 93 48 01 sts 0x0148, r18 ; 0x800148 <__TEXT_REGION_LENGTH__+0x700148> - c7a: 30 93 49 01 sts 0x0149, r19 ; 0x800149 <__TEXT_REGION_LENGTH__+0x700149> - c7e: 10 92 4a 01 sts 0x014A, r1 ; 0x80014a <__TEXT_REGION_LENGTH__+0x70014a> - c82: 9b e3 ldi r25, 0x3B ; 59 - c84: 90 93 4c 01 sts 0x014C, r25 ; 0x80014c <__TEXT_REGION_LENGTH__+0x70014c> - c88: 80 93 4d 01 sts 0x014D, r24 ; 0x80014d <__TEXT_REGION_LENGTH__+0x70014d> - c8c: 10 92 4e 01 sts 0x014E, r1 ; 0x80014e <__TEXT_REGION_LENGTH__+0x70014e> - c90: 80 81 ld r24, Z - c92: 80 68 ori r24, 0x80 ; 128 - c94: 80 83 st Z, r24 - c96: 08 95 ret +00000c7c : + c7c: e0 e0 ldi r30, 0x00 ; 0 + c7e: f1 e0 ldi r31, 0x01 ; 1 + c80: 10 8a std Z+16, r1 ; 0x10 + c82: 80 e4 ldi r24, 0x40 ; 64 + c84: 80 8b std Z+16, r24 ; 0x10 + c86: 85 e0 ldi r24, 0x05 ; 5 + c88: 80 8b std Z+16, r24 ; 0x10 + c8a: 11 8a std Z+17, r1 ; 0x11 + c8c: 81 e9 ldi r24, 0x91 ; 145 + c8e: 82 8b std Z+18, r24 ; 0x12 + c90: 80 e1 ldi r24, 0x10 ; 16 + c92: 83 8b std Z+19, r24 ; 0x13 + c94: 2e ee ldi r18, 0xEE ; 238 + c96: 32 e0 ldi r19, 0x02 ; 2 + c98: 24 8b std Z+20, r18 ; 0x14 + c9a: 35 8b std Z+21, r19 ; 0x15 + c9c: 84 e2 ldi r24, 0x24 ; 36 + c9e: 80 8f std Z+24, r24 ; 0x18 + ca0: 82 e0 ldi r24, 0x02 ; 2 + ca2: 81 8f std Z+25, r24 ; 0x19 + ca4: 12 8e std Z+26, r1 ; 0x1a + ca6: 40 91 c2 20 lds r20, 0x20C2 ; 0x8020c2 + caa: 42 9f mul r20, r18 + cac: c0 01 movw r24, r0 + cae: 43 9f mul r20, r19 + cb0: 90 0d add r25, r0 + cb2: 11 24 eor r1, r1 + cb4: 86 58 subi r24, 0x86 ; 134 + cb6: 99 4d sbci r25, 0xD9 ; 217 + cb8: 84 8f std Z+28, r24 ; 0x1c + cba: 40 91 c2 20 lds r20, 0x20C2 ; 0x8020c2 + cbe: 42 9f mul r20, r18 + cc0: c0 01 movw r24, r0 + cc2: 43 9f mul r20, r19 + cc4: 90 0d add r25, r0 + cc6: 11 24 eor r1, r1 + cc8: 86 58 subi r24, 0x86 ; 134 + cca: 99 4d sbci r25, 0xD9 ; 217 + ccc: 95 8f std Z+29, r25 ; 0x1d + cce: 16 8e std Z+30, r1 ; 0x1e + cd0: 80 89 ldd r24, Z+16 ; 0x10 + cd2: 80 68 ori r24, 0x80 ; 128 + cd4: 80 8b std Z+16, r24 ; 0x10 + cd6: 08 95 ret -00000c98 : - c98: e0 e0 ldi r30, 0x00 ; 0 - c9a: f1 e0 ldi r31, 0x01 ; 1 - c9c: 10 8a std Z+16, r1 ; 0x10 - c9e: 80 e4 ldi r24, 0x40 ; 64 - ca0: 80 8b std Z+16, r24 ; 0x10 - ca2: 85 e0 ldi r24, 0x05 ; 5 - ca4: 80 8b std Z+16, r24 ; 0x10 - ca6: 11 8a std Z+17, r1 ; 0x11 - ca8: 81 e9 ldi r24, 0x91 ; 145 - caa: 82 8b std Z+18, r24 ; 0x12 - cac: 80 e1 ldi r24, 0x10 ; 16 - cae: 83 8b std Z+19, r24 ; 0x13 - cb0: 2e ee ldi r18, 0xEE ; 238 - cb2: 32 e0 ldi r19, 0x02 ; 2 - cb4: 24 8b std Z+20, r18 ; 0x14 - cb6: 35 8b std Z+21, r19 ; 0x15 - cb8: 84 e2 ldi r24, 0x24 ; 36 - cba: 80 8f std Z+24, r24 ; 0x18 - cbc: 82 e0 ldi r24, 0x02 ; 2 - cbe: 81 8f std Z+25, r24 ; 0x19 - cc0: 12 8e std Z+26, r1 ; 0x1a - cc2: 40 91 c2 20 lds r20, 0x20C2 ; 0x8020c2 - cc6: 42 9f mul r20, r18 - cc8: c0 01 movw r24, r0 - cca: 43 9f mul r20, r19 - ccc: 90 0d add r25, r0 - cce: 11 24 eor r1, r1 - cd0: 8a 58 subi r24, 0x8A ; 138 - cd2: 99 4d sbci r25, 0xD9 ; 217 - cd4: 84 8f std Z+28, r24 ; 0x1c - cd6: 40 91 c2 20 lds r20, 0x20C2 ; 0x8020c2 - cda: 42 9f mul r20, r18 - cdc: c0 01 movw r24, r0 - cde: 43 9f mul r20, r19 - ce0: 90 0d add r25, r0 - ce2: 11 24 eor r1, r1 - ce4: 8a 58 subi r24, 0x8A ; 138 - ce6: 99 4d sbci r25, 0xD9 ; 217 - ce8: 95 8f std Z+29, r25 ; 0x1d - cea: 16 8e std Z+30, r1 ; 0x1e - cec: 80 89 ldd r24, Z+16 ; 0x10 - cee: 80 68 ori r24, 0x80 ; 128 - cf0: 80 8b std Z+16, r24 ; 0x10 - cf2: 08 95 ret - -00000cf4 : - cf4: e0 e7 ldi r30, 0x70 ; 112 - cf6: f0 e0 ldi r31, 0x00 ; 0 - cf8: 83 81 ldd r24, Z+3 ; 0x03 - cfa: 8c 7f andi r24, 0xFC ; 252 - cfc: 83 83 std Z+3, r24 ; 0x03 - cfe: 84 81 ldd r24, Z+4 ; 0x04 - d00: 8c 7f andi r24, 0xFC ; 252 - d02: 84 83 std Z+4, r24 ; 0x04 - d04: 80 81 ld r24, Z - d06: 8d 7f andi r24, 0xFD ; 253 - d08: 80 83 st Z, r24 - d0a: e0 e8 ldi r30, 0x80 ; 128 - d0c: f1 e0 ldi r31, 0x01 ; 1 - d0e: 80 ec ldi r24, 0xC0 ; 192 - d10: 82 83 std Z+2, r24 ; 0x02 - d12: 12 86 std Z+10, r1 ; 0x0a - d14: 88 ec ldi r24, 0xC8 ; 200 - d16: 81 83 std Z+1, r24 ; 0x01 - d18: 11 86 std Z+9, r1 ; 0x09 - d1a: e0 e0 ldi r30, 0x00 ; 0 - d1c: f8 e0 ldi r31, 0x08 ; 8 - d1e: 34 e0 ldi r19, 0x04 ; 4 - d20: 30 83 st Z, r19 - d22: 23 e0 ldi r18, 0x03 ; 3 - d24: 21 83 std Z+1, r18 ; 0x01 - d26: 14 82 std Z+4, r1 ; 0x04 - d28: 85 ed ldi r24, 0xD5 ; 213 - d2a: 91 e0 ldi r25, 0x01 ; 1 - d2c: 86 a3 std Z+38, r24 ; 0x26 - d2e: 97 a3 std Z+39, r25 ; 0x27 - d30: 16 82 std Z+6, r1 ; 0x06 - d32: e0 e4 ldi r30, 0x40 ; 64 - d34: f8 e0 ldi r31, 0x08 ; 8 - d36: 30 83 st Z, r19 - d38: 21 83 std Z+1, r18 ; 0x01 - d3a: 14 82 std Z+4, r1 ; 0x04 - d3c: 86 a3 std Z+38, r24 ; 0x26 - d3e: 97 a3 std Z+39, r25 ; 0x27 - d40: 16 82 std Z+6, r1 ; 0x06 - d42: e0 e6 ldi r30, 0x60 ; 96 - d44: f6 e0 ldi r31, 0x06 ; 6 - d46: 80 81 ld r24, Z - d48: 80 61 ori r24, 0x10 ; 16 +00000cd8 : + cd8: e0 e7 ldi r30, 0x70 ; 112 + cda: f0 e0 ldi r31, 0x00 ; 0 + cdc: 83 81 ldd r24, Z+3 ; 0x03 + cde: 8c 7f andi r24, 0xFC ; 252 + ce0: 83 83 std Z+3, r24 ; 0x03 + ce2: 84 81 ldd r24, Z+4 ; 0x04 + ce4: 8c 7f andi r24, 0xFC ; 252 + ce6: 84 83 std Z+4, r24 ; 0x04 + ce8: 80 81 ld r24, Z + cea: 8d 7f andi r24, 0xFD ; 253 + cec: 80 83 st Z, r24 + cee: e0 e8 ldi r30, 0x80 ; 128 + cf0: f1 e0 ldi r31, 0x01 ; 1 + cf2: 80 ec ldi r24, 0xC0 ; 192 + cf4: 82 83 std Z+2, r24 ; 0x02 + cf6: 12 86 std Z+10, r1 ; 0x0a + cf8: 88 ec ldi r24, 0xC8 ; 200 + cfa: 81 83 std Z+1, r24 ; 0x01 + cfc: 11 86 std Z+9, r1 ; 0x09 + cfe: e0 e0 ldi r30, 0x00 ; 0 + d00: f8 e0 ldi r31, 0x08 ; 8 + d02: 34 e0 ldi r19, 0x04 ; 4 + d04: 30 83 st Z, r19 + d06: 23 e0 ldi r18, 0x03 ; 3 + d08: 21 83 std Z+1, r18 ; 0x01 + d0a: 14 82 std Z+4, r1 ; 0x04 + d0c: 85 ed ldi r24, 0xD5 ; 213 + d0e: 91 e0 ldi r25, 0x01 ; 1 + d10: 86 a3 std Z+38, r24 ; 0x26 + d12: 97 a3 std Z+39, r25 ; 0x27 + d14: 16 82 std Z+6, r1 ; 0x06 + d16: e0 e4 ldi r30, 0x40 ; 64 + d18: f8 e0 ldi r31, 0x08 ; 8 + d1a: 30 83 st Z, r19 + d1c: 21 83 std Z+1, r18 ; 0x01 + d1e: 14 82 std Z+4, r1 ; 0x04 + d20: 86 a3 std Z+38, r24 ; 0x26 + d22: 97 a3 std Z+39, r25 ; 0x27 + d24: 16 82 std Z+6, r1 ; 0x06 + d26: e0 e6 ldi r30, 0x60 ; 96 + d28: f6 e0 ldi r31, 0x06 ; 6 + d2a: 80 81 ld r24, Z + d2c: 80 61 ori r24, 0x10 ; 16 + d2e: 80 83 st Z, r24 + d30: e0 e4 ldi r30, 0x40 ; 64 + d32: f9 e0 ldi r31, 0x09 ; 9 + d34: 83 e1 ldi r24, 0x13 ; 19 + d36: 81 83 std Z+1, r24 ; 0x01 + d38: 14 82 std Z+4, r1 ; 0x04 + d3a: 81 e0 ldi r24, 0x01 ; 1 + d3c: 86 83 std Z+6, r24 ; 0x06 + d3e: 28 eb ldi r18, 0xB8 ; 184 + d40: 3b e0 ldi r19, 0x0B ; 11 + d42: 26 a3 std Z+38, r18 ; 0x26 + d44: 37 a3 std Z+39, r19 ; 0x27 + d46: 10 a6 std Z+40, r1 ; 0x28 + d48: 11 a6 std Z+41, r1 ; 0x29 d4a: 80 83 st Z, r24 - d4c: e0 e4 ldi r30, 0x40 ; 64 - d4e: f9 e0 ldi r31, 0x09 ; 9 - d50: 83 e1 ldi r24, 0x13 ; 19 - d52: 81 83 std Z+1, r24 ; 0x01 - d54: 14 82 std Z+4, r1 ; 0x04 - d56: 81 e0 ldi r24, 0x01 ; 1 - d58: 86 83 std Z+6, r24 ; 0x06 - d5a: 28 eb ldi r18, 0xB8 ; 184 - d5c: 3b e0 ldi r19, 0x0B ; 11 - d5e: 26 a3 std Z+38, r18 ; 0x26 - d60: 37 a3 std Z+39, r19 ; 0x27 - d62: 10 a6 std Z+40, r1 ; 0x28 - d64: 11 a6 std Z+41, r1 ; 0x29 - d66: 80 83 st Z, r24 - d68: 08 95 ret + d4c: 08 95 ret -00000d6a <__vector_83>: - d6a: 1f 92 push r1 - d6c: 0f 92 push r0 - d6e: 0f b6 in r0, 0x3f ; 63 - d70: 0f 92 push r0 - d72: 11 24 eor r1, r1 - d74: 2f 93 push r18 - d76: 3f 93 push r19 - d78: 4f 93 push r20 - d7a: 5f 93 push r21 - d7c: 8f 93 push r24 - d7e: 9f 93 push r25 - d80: cf 93 push r28 - d82: df 93 push r29 - d84: 1f 92 push r1 - d86: cd b7 in r28, 0x3d ; 61 - d88: de b7 in r29, 0x3e ; 62 - d8a: 80 91 00 20 lds r24, 0x2000 ; 0x802000 <__data_start> - d8e: 87 30 cpi r24, 0x07 ; 7 - d90: 31 f4 brne .+12 ; 0xd9e <__vector_83+0x34> - d92: 80 91 2c 02 lds r24, 0x022C ; 0x80022c <__TEXT_REGION_LENGTH__+0x70022c> - d96: 89 83 std Y+1, r24 ; 0x01 - d98: 90 91 2d 02 lds r25, 0x022D ; 0x80022d <__TEXT_REGION_LENGTH__+0x70022d> - d9c: 02 c0 rjmp .+4 ; 0xda2 <__vector_83+0x38> - d9e: 90 91 2c 02 lds r25, 0x022C ; 0x80022c <__TEXT_REGION_LENGTH__+0x70022c> - da2: 80 91 c0 20 lds r24, 0x20C0 ; 0x8020c0 <__data_end> - da6: 89 1b sub r24, r25 - da8: 20 91 68 09 lds r18, 0x0968 ; 0x800968 <__TEXT_REGION_LENGTH__+0x700968> - dac: 30 91 69 09 lds r19, 0x0969 ; 0x800969 <__TEXT_REGION_LENGTH__+0x700969> - db0: 82 30 cpi r24, 0x02 ; 2 - db2: 8c f0 brlt .+34 ; 0xdd6 <__vector_83+0x6c> - db4: 22 3b cpi r18, 0xB2 ; 178 - db6: 3b 40 sbci r19, 0x0B ; 11 - db8: 70 f4 brcc .+28 ; 0xdd6 <__vector_83+0x6c> +00000d4e <__vector_83>: + d4e: 1f 92 push r1 + d50: 0f 92 push r0 + d52: 0f b6 in r0, 0x3f ; 63 + d54: 0f 92 push r0 + d56: 11 24 eor r1, r1 + d58: 2f 93 push r18 + d5a: 3f 93 push r19 + d5c: 4f 93 push r20 + d5e: 5f 93 push r21 + d60: 8f 93 push r24 + d62: 9f 93 push r25 + d64: cf 93 push r28 + d66: df 93 push r29 + d68: 1f 92 push r1 + d6a: cd b7 in r28, 0x3d ; 61 + d6c: de b7 in r29, 0x3e ; 62 + d6e: 80 91 00 20 lds r24, 0x2000 ; 0x802000 <__data_start> + d72: 87 30 cpi r24, 0x07 ; 7 + d74: 31 f4 brne .+12 ; 0xd82 <__vector_83+0x34> + d76: 80 91 2c 02 lds r24, 0x022C ; 0x80022c <__TEXT_REGION_LENGTH__+0x70022c> + d7a: 89 83 std Y+1, r24 ; 0x01 + d7c: 90 91 2d 02 lds r25, 0x022D ; 0x80022d <__TEXT_REGION_LENGTH__+0x70022d> + d80: 02 c0 rjmp .+4 ; 0xd86 <__vector_83+0x38> + d82: 90 91 2c 02 lds r25, 0x022C ; 0x80022c <__TEXT_REGION_LENGTH__+0x70022c> + d86: 80 91 c0 20 lds r24, 0x20C0 ; 0x8020c0 <__data_end> + d8a: 89 1b sub r24, r25 + d8c: 20 91 68 09 lds r18, 0x0968 ; 0x800968 <__TEXT_REGION_LENGTH__+0x700968> + d90: 30 91 69 09 lds r19, 0x0969 ; 0x800969 <__TEXT_REGION_LENGTH__+0x700969> + d94: 82 30 cpi r24, 0x02 ; 2 + d96: 8c f0 brlt .+34 ; 0xdba <__vector_83+0x6c> + d98: 22 3b cpi r18, 0xB2 ; 178 + d9a: 3b 40 sbci r19, 0x0B ; 11 + d9c: 70 f4 brcc .+28 ; 0xdba <__vector_83+0x6c> + d9e: 20 91 68 09 lds r18, 0x0968 ; 0x800968 <__TEXT_REGION_LENGTH__+0x700968> + da2: 30 91 69 09 lds r19, 0x0969 ; 0x800969 <__TEXT_REGION_LENGTH__+0x700969> + da6: 89 30 cpi r24, 0x09 ; 9 + da8: 1c f4 brge .+6 ; 0xdb0 <__vector_83+0x62> + daa: 81 e0 ldi r24, 0x01 ; 1 + dac: 90 e0 ldi r25, 0x00 ; 0 + dae: 02 c0 rjmp .+4 ; 0xdb4 <__vector_83+0x66> + db0: 86 e0 ldi r24, 0x06 ; 6 + db2: 90 e0 ldi r25, 0x00 ; 0 + db4: 82 0f add r24, r18 + db6: 93 1f adc r25, r19 + db8: 18 c0 rjmp .+48 ; 0xdea <__vector_83+0x9c> dba: 20 91 68 09 lds r18, 0x0968 ; 0x800968 <__TEXT_REGION_LENGTH__+0x700968> dbe: 30 91 69 09 lds r19, 0x0969 ; 0x800969 <__TEXT_REGION_LENGTH__+0x700969> - dc2: 89 30 cpi r24, 0x09 ; 9 - dc4: 1c f4 brge .+6 ; 0xdcc <__vector_83+0x62> - dc6: 81 e0 ldi r24, 0x01 ; 1 - dc8: 90 e0 ldi r25, 0x00 ; 0 - dca: 02 c0 rjmp .+4 ; 0xdd0 <__vector_83+0x66> - dcc: 86 e0 ldi r24, 0x06 ; 6 - dce: 90 e0 ldi r25, 0x00 ; 0 - dd0: 82 0f add r24, r18 - dd2: 93 1f adc r25, r19 - dd4: 18 c0 rjmp .+48 ; 0xe06 <__vector_83+0x9c> - dd6: 20 91 68 09 lds r18, 0x0968 ; 0x800968 <__TEXT_REGION_LENGTH__+0x700968> - dda: 30 91 69 09 lds r19, 0x0969 ; 0x800969 <__TEXT_REGION_LENGTH__+0x700969> - dde: 8f 3f cpi r24, 0xFF ; 255 - de0: b4 f4 brge .+44 ; 0xe0e <__vector_83+0xa4> - de2: 27 30 cpi r18, 0x07 ; 7 - de4: 31 05 cpc r19, r1 - de6: 98 f0 brcs .+38 ; 0xe0e <__vector_83+0xa4> - de8: 20 91 68 09 lds r18, 0x0968 ; 0x800968 <__TEXT_REGION_LENGTH__+0x700968> - dec: 30 91 69 09 lds r19, 0x0969 ; 0x800969 <__TEXT_REGION_LENGTH__+0x700969> - df0: 88 3f cpi r24, 0xF8 ; 248 - df2: 1c f0 brlt .+6 ; 0xdfa <__vector_83+0x90> - df4: 81 e0 ldi r24, 0x01 ; 1 - df6: 90 e0 ldi r25, 0x00 ; 0 - df8: 02 c0 rjmp .+4 ; 0xdfe <__vector_83+0x94> - dfa: 86 e0 ldi r24, 0x06 ; 6 - dfc: 90 e0 ldi r25, 0x00 ; 0 - dfe: a9 01 movw r20, r18 - e00: 48 1b sub r20, r24 - e02: 59 0b sbc r21, r25 - e04: ca 01 movw r24, r20 - e06: 80 93 78 09 sts 0x0978, r24 ; 0x800978 <__TEXT_REGION_LENGTH__+0x700978> - e0a: 90 93 79 09 sts 0x0979, r25 ; 0x800979 <__TEXT_REGION_LENGTH__+0x700979> - e0e: 0f 90 pop r0 - e10: df 91 pop r29 - e12: cf 91 pop r28 - e14: 9f 91 pop r25 - e16: 8f 91 pop r24 - e18: 5f 91 pop r21 - e1a: 4f 91 pop r20 - e1c: 3f 91 pop r19 - e1e: 2f 91 pop r18 - e20: 0f 90 pop r0 - e22: 0f be out 0x3f, r0 ; 63 - e24: 0f 90 pop r0 - e26: 1f 90 pop r1 - e28: 18 95 reti + dc2: 8f 3f cpi r24, 0xFF ; 255 + dc4: b4 f4 brge .+44 ; 0xdf2 <__vector_83+0xa4> + dc6: 27 30 cpi r18, 0x07 ; 7 + dc8: 31 05 cpc r19, r1 + dca: 98 f0 brcs .+38 ; 0xdf2 <__vector_83+0xa4> + dcc: 20 91 68 09 lds r18, 0x0968 ; 0x800968 <__TEXT_REGION_LENGTH__+0x700968> + dd0: 30 91 69 09 lds r19, 0x0969 ; 0x800969 <__TEXT_REGION_LENGTH__+0x700969> + dd4: 88 3f cpi r24, 0xF8 ; 248 + dd6: 1c f0 brlt .+6 ; 0xdde <__vector_83+0x90> + dd8: 81 e0 ldi r24, 0x01 ; 1 + dda: 90 e0 ldi r25, 0x00 ; 0 + ddc: 02 c0 rjmp .+4 ; 0xde2 <__vector_83+0x94> + dde: 86 e0 ldi r24, 0x06 ; 6 + de0: 90 e0 ldi r25, 0x00 ; 0 + de2: a9 01 movw r20, r18 + de4: 48 1b sub r20, r24 + de6: 59 0b sbc r21, r25 + de8: ca 01 movw r24, r20 + dea: 80 93 78 09 sts 0x0978, r24 ; 0x800978 <__TEXT_REGION_LENGTH__+0x700978> + dee: 90 93 79 09 sts 0x0979, r25 ; 0x800979 <__TEXT_REGION_LENGTH__+0x700979> + df2: 0f 90 pop r0 + df4: df 91 pop r29 + df6: cf 91 pop r28 + df8: 9f 91 pop r25 + dfa: 8f 91 pop r24 + dfc: 5f 91 pop r21 + dfe: 4f 91 pop r20 + e00: 3f 91 pop r19 + e02: 2f 91 pop r18 + e04: 0f 90 pop r0 + e06: 0f be out 0x3f, r0 ; 63 + e08: 0f 90 pop r0 + e0a: 1f 90 pop r1 + e0c: 18 95 reti -00000e2a : - e2a: e0 e7 ldi r30, 0x70 ; 112 - e2c: f0 e0 ldi r31, 0x00 ; 0 - e2e: 83 81 ldd r24, Z+3 ; 0x03 - e30: 8f 7e andi r24, 0xEF ; 239 - e32: 83 83 std Z+3, r24 ; 0x03 - e34: e0 e4 ldi r30, 0x40 ; 64 - e36: f6 e0 ldi r31, 0x06 ; 6 - e38: 80 81 ld r24, Z - e3a: 8a 64 ori r24, 0x4A ; 74 - e3c: 80 83 st Z, r24 - e3e: 8f ef ldi r24, 0xFF ; 255 - e40: 84 83 std Z+4, r24 ; 0x04 - e42: 88 e5 ldi r24, 0x58 ; 88 - e44: 82 8b std Z+18, r24 ; 0x12 - e46: 80 e2 ldi r24, 0x20 ; 32 - e48: 86 87 std Z+14, r24 ; 0x0e - e4a: e0 ea ldi r30, 0xA0 ; 160 - e4c: f8 e0 ldi r31, 0x08 ; 8 - e4e: 84 ec ldi r24, 0xC4 ; 196 - e50: 85 83 std Z+5, r24 ; 0x05 - e52: 83 e0 ldi r24, 0x03 ; 3 - e54: 86 83 std Z+6, r24 ; 0x06 - e56: 17 82 std Z+7, r1 ; 0x07 - e58: 88 e1 ldi r24, 0x18 ; 24 - e5a: 84 83 std Z+4, r24 ; 0x04 - e5c: 08 95 ret +00000e0e : + e0e: e0 e7 ldi r30, 0x70 ; 112 + e10: f0 e0 ldi r31, 0x00 ; 0 + e12: 83 81 ldd r24, Z+3 ; 0x03 + e14: 8f 7e andi r24, 0xEF ; 239 + e16: 83 83 std Z+3, r24 ; 0x03 + e18: e0 e4 ldi r30, 0x40 ; 64 + e1a: f6 e0 ldi r31, 0x06 ; 6 + e1c: 80 81 ld r24, Z + e1e: 8a 64 ori r24, 0x4A ; 74 + e20: 80 83 st Z, r24 + e22: 8f ef ldi r24, 0xFF ; 255 + e24: 84 83 std Z+4, r24 ; 0x04 + e26: 88 e5 ldi r24, 0x58 ; 88 + e28: 82 8b std Z+18, r24 ; 0x12 + e2a: 80 e2 ldi r24, 0x20 ; 32 + e2c: 86 87 std Z+14, r24 ; 0x0e + e2e: e0 ea ldi r30, 0xA0 ; 160 + e30: f8 e0 ldi r31, 0x08 ; 8 + e32: 84 ec ldi r24, 0xC4 ; 196 + e34: 85 83 std Z+5, r24 ; 0x05 + e36: 83 e0 ldi r24, 0x03 ; 3 + e38: 86 83 std Z+6, r24 ; 0x06 + e3a: 17 82 std Z+7, r1 ; 0x07 + e3c: 88 e1 ldi r24, 0x18 ; 24 + e3e: 84 83 std Z+4, r24 ; 0x04 + e40: 08 95 ret -00000e5e : - e5e: e0 e7 ldi r30, 0x70 ; 112 - e60: f0 e0 ldi r31, 0x00 ; 0 - e62: 83 81 ldd r24, Z+3 ; 0x03 - e64: 87 7f andi r24, 0xF7 ; 247 - e66: 83 83 std Z+3, r24 ; 0x03 - e68: e0 ec ldi r30, 0xC0 ; 192 - e6a: f8 e0 ldi r31, 0x08 ; 8 - e6c: 80 e4 ldi r24, 0x40 ; 64 - e6e: 80 83 st Z, r24 - e70: 83 e0 ldi r24, 0x03 ; 3 - e72: 81 83 std Z+1, r24 ; 0x01 - e74: 88 e5 ldi r24, 0x58 ; 88 - e76: 80 93 57 06 sts 0x0657, r24 ; 0x800657 <__TEXT_REGION_LENGTH__+0x700657> - e7a: 08 95 ret +00000e42 : + e42: e0 e7 ldi r30, 0x70 ; 112 + e44: f0 e0 ldi r31, 0x00 ; 0 + e46: 83 81 ldd r24, Z+3 ; 0x03 + e48: 87 7f andi r24, 0xF7 ; 247 + e4a: 83 83 std Z+3, r24 ; 0x03 + e4c: e0 ec ldi r30, 0xC0 ; 192 + e4e: f8 e0 ldi r31, 0x08 ; 8 + e50: 80 e4 ldi r24, 0x40 ; 64 + e52: 80 83 st Z, r24 + e54: 83 e0 ldi r24, 0x03 ; 3 + e56: 81 83 std Z+1, r24 ; 0x01 + e58: 88 e5 ldi r24, 0x58 ; 88 + e5a: 80 93 57 06 sts 0x0657, r24 ; 0x800657 <__TEXT_REGION_LENGTH__+0x700657> + e5e: 08 95 ret -00000e7c <__vector_24>: - e7c: 1f 92 push r1 - e7e: 0f 92 push r0 - e80: 0f b6 in r0, 0x3f ; 63 - e82: 0f 92 push r0 - e84: 11 24 eor r1, r1 - e86: 00 00 nop - e88: 0f 90 pop r0 - e8a: 0f be out 0x3f, r0 ; 63 - e8c: 0f 90 pop r0 - e8e: 1f 90 pop r1 - e90: 18 95 reti +00000e60 <__vector_24>: + e60: 1f 92 push r1 + e62: 0f 92 push r0 + e64: 0f b6 in r0, 0x3f ; 63 + e66: 0f 92 push r0 + e68: 11 24 eor r1, r1 + e6a: 00 00 nop + e6c: 0f 90 pop r0 + e6e: 0f be out 0x3f, r0 ; 63 + e70: 0f 90 pop r0 + e72: 1f 90 pop r1 + e74: 18 95 reti -00000e92 : - e92: 9f b7 in r25, 0x3f ; 63 - e94: f8 94 cli - e96: a0 e5 ldi r26, 0x50 ; 80 - e98: b0 e0 ldi r27, 0x00 ; 0 - e9a: 16 96 adiw r26, 0x06 ; 6 - e9c: 8c 91 ld r24, X - e9e: 16 97 sbiw r26, 0x06 ; 6 - ea0: 89 7f andi r24, 0xF9 ; 249 - ea2: 16 96 adiw r26, 0x06 ; 6 - ea4: 8c 93 st X, r24 - ea6: 16 97 sbiw r26, 0x06 ; 6 - ea8: e0 e6 ldi r30, 0x60 ; 96 - eaa: f0 e0 ldi r31, 0x00 ; 0 - eac: 80 e8 ldi r24, 0x80 ; 128 - eae: 85 83 std Z+5, r24 ; 0x05 - eb0: 8b eb ldi r24, 0xBB ; 187 - eb2: 86 83 std Z+6, r24 ; 0x06 - eb4: 16 96 adiw r26, 0x06 ; 6 - eb6: 8c 91 ld r24, X - eb8: 16 97 sbiw r26, 0x06 ; 6 - eba: 84 60 ori r24, 0x04 ; 4 - ebc: 16 96 adiw r26, 0x06 ; 6 - ebe: 8c 93 st X, r24 - ec0: 80 81 ld r24, Z - ec2: 81 60 ori r24, 0x01 ; 1 - ec4: 80 83 st Z, r24 - ec6: 9f bf out 0x3f, r25 ; 63 - ec8: 08 95 ret +00000e76 : + e76: 9f b7 in r25, 0x3f ; 63 + e78: f8 94 cli + e7a: a0 e5 ldi r26, 0x50 ; 80 + e7c: b0 e0 ldi r27, 0x00 ; 0 + e7e: 16 96 adiw r26, 0x06 ; 6 + e80: 8c 91 ld r24, X + e82: 16 97 sbiw r26, 0x06 ; 6 + e84: 89 7f andi r24, 0xF9 ; 249 + e86: 16 96 adiw r26, 0x06 ; 6 + e88: 8c 93 st X, r24 + e8a: 16 97 sbiw r26, 0x06 ; 6 + e8c: e0 e6 ldi r30, 0x60 ; 96 + e8e: f0 e0 ldi r31, 0x00 ; 0 + e90: 80 e8 ldi r24, 0x80 ; 128 + e92: 85 83 std Z+5, r24 ; 0x05 + e94: 8b eb ldi r24, 0xBB ; 187 + e96: 86 83 std Z+6, r24 ; 0x06 + e98: 16 96 adiw r26, 0x06 ; 6 + e9a: 8c 91 ld r24, X + e9c: 16 97 sbiw r26, 0x06 ; 6 + e9e: 84 60 ori r24, 0x04 ; 4 + ea0: 16 96 adiw r26, 0x06 ; 6 + ea2: 8c 93 st X, r24 + ea4: 80 81 ld r24, Z + ea6: 81 60 ori r24, 0x01 ; 1 + ea8: 80 83 st Z, r24 + eaa: 9f bf out 0x3f, r25 ; 63 + eac: 08 95 ret -00000eca : - eca: cf 93 push r28 - ecc: df 93 push r29 - ece: 00 d0 rcall .+0 ; 0xed0 - ed0: 00 d0 rcall .+0 ; 0xed2 - ed2: cd b7 in r28, 0x3d ; 61 - ed4: de b7 in r29, 0x3e ; 62 - ed6: 8f ef ldi r24, 0xFF ; 255 - ed8: 80 93 70 00 sts 0x0070, r24 ; 0x800070 <__TEXT_REGION_LENGTH__+0x700070> - edc: 80 93 71 00 sts 0x0071, r24 ; 0x800071 <__TEXT_REGION_LENGTH__+0x700071> - ee0: 80 93 72 00 sts 0x0072, r24 ; 0x800072 <__TEXT_REGION_LENGTH__+0x700072> - ee4: 80 93 73 00 sts 0x0073, r24 ; 0x800073 <__TEXT_REGION_LENGTH__+0x700073> - ee8: 80 93 74 00 sts 0x0074, r24 ; 0x800074 <__TEXT_REGION_LENGTH__+0x700074> - eec: 80 93 75 00 sts 0x0075, r24 ; 0x800075 <__TEXT_REGION_LENGTH__+0x700075> - ef0: 80 93 76 00 sts 0x0076, r24 ; 0x800076 <__TEXT_REGION_LENGTH__+0x700076> - ef4: 64 e0 ldi r22, 0x04 ; 4 - ef6: 81 e4 ldi r24, 0x41 ; 65 - ef8: 90 e0 ldi r25, 0x00 ; 0 - efa: e4 d4 rcall .+2504 ; 0x18c4 - efc: 6c e1 ldi r22, 0x1C ; 28 - efe: 70 e0 ldi r23, 0x00 ; 0 - f00: 82 e0 ldi r24, 0x02 ; 2 - f02: e6 d4 rcall .+2508 ; 0x18d0 - f04: 8c 83 std Y+4, r24 ; 0x04 - f06: 6d e1 ldi r22, 0x1D ; 29 - f08: 70 e0 ldi r23, 0x00 ; 0 - f0a: 82 e0 ldi r24, 0x02 ; 2 - f0c: e1 d4 rcall .+2498 ; 0x18d0 - f0e: 8b 83 std Y+3, r24 ; 0x03 - f10: 8b 81 ldd r24, Y+3 ; 0x03 - f12: 9c 81 ldd r25, Y+4 ; 0x04 - f14: 01 96 adiw r24, 0x01 ; 1 - f16: 21 f4 brne .+8 ; 0xf20 - f18: 80 e4 ldi r24, 0x40 ; 64 - f1a: 93 e2 ldi r25, 0x23 ; 35 - f1c: 8b 83 std Y+3, r24 ; 0x03 - f1e: 9c 83 std Y+4, r25 ; 0x04 - f20: 8b 81 ldd r24, Y+3 ; 0x03 - f22: 9c 81 ldd r25, Y+4 ; 0x04 - f24: 89 83 std Y+1, r24 ; 0x01 - f26: 9a 83 std Y+2, r25 ; 0x02 - f28: 80 93 62 00 sts 0x0062, r24 ; 0x800062 <__TEXT_REGION_LENGTH__+0x700062> - f2c: 8a 81 ldd r24, Y+2 ; 0x02 - f2e: 80 93 63 00 sts 0x0063, r24 ; 0x800063 <__TEXT_REGION_LENGTH__+0x700063> - f32: 9f b7 in r25, 0x3f ; 63 - f34: f8 94 cli - f36: 80 91 50 00 lds r24, 0x0050 ; 0x800050 <__TEXT_REGION_LENGTH__+0x700050> - f3a: 82 60 ori r24, 0x02 ; 2 - f3c: 80 93 50 00 sts 0x0050, r24 ; 0x800050 <__TEXT_REGION_LENGTH__+0x700050> - f40: 9f bf out 0x3f, r25 ; 63 - f42: 80 91 51 00 lds r24, 0x0051 ; 0x800051 <__TEXT_REGION_LENGTH__+0x700051> - f46: 81 ff sbrs r24, 1 - f48: fc cf rjmp .-8 ; 0xf42 - f4a: a3 df rcall .-186 ; 0xe92 - f4c: 61 e0 ldi r22, 0x01 ; 1 - f4e: 80 e4 ldi r24, 0x40 ; 64 - f50: 90 e0 ldi r25, 0x00 ; 0 - f52: b8 d4 rcall .+2416 ; 0x18c4 +00000eae : + eae: cf 93 push r28 + eb0: df 93 push r29 + eb2: 00 d0 rcall .+0 ; 0xeb4 + eb4: 00 d0 rcall .+0 ; 0xeb6 + eb6: cd b7 in r28, 0x3d ; 61 + eb8: de b7 in r29, 0x3e ; 62 + eba: 8f ef ldi r24, 0xFF ; 255 + ebc: 80 93 70 00 sts 0x0070, r24 ; 0x800070 <__TEXT_REGION_LENGTH__+0x700070> + ec0: 80 93 71 00 sts 0x0071, r24 ; 0x800071 <__TEXT_REGION_LENGTH__+0x700071> + ec4: 80 93 72 00 sts 0x0072, r24 ; 0x800072 <__TEXT_REGION_LENGTH__+0x700072> + ec8: 80 93 73 00 sts 0x0073, r24 ; 0x800073 <__TEXT_REGION_LENGTH__+0x700073> + ecc: 80 93 74 00 sts 0x0074, r24 ; 0x800074 <__TEXT_REGION_LENGTH__+0x700074> + ed0: 80 93 75 00 sts 0x0075, r24 ; 0x800075 <__TEXT_REGION_LENGTH__+0x700075> + ed4: 80 93 76 00 sts 0x0076, r24 ; 0x800076 <__TEXT_REGION_LENGTH__+0x700076> + ed8: 64 e0 ldi r22, 0x04 ; 4 + eda: 81 e4 ldi r24, 0x41 ; 65 + edc: 90 e0 ldi r25, 0x00 ; 0 + ede: e4 d4 rcall .+2504 ; 0x18a8 + ee0: 6c e1 ldi r22, 0x1C ; 28 + ee2: 70 e0 ldi r23, 0x00 ; 0 + ee4: 82 e0 ldi r24, 0x02 ; 2 + ee6: e6 d4 rcall .+2508 ; 0x18b4 + ee8: 8c 83 std Y+4, r24 ; 0x04 + eea: 6d e1 ldi r22, 0x1D ; 29 + eec: 70 e0 ldi r23, 0x00 ; 0 + eee: 82 e0 ldi r24, 0x02 ; 2 + ef0: e1 d4 rcall .+2498 ; 0x18b4 + ef2: 8b 83 std Y+3, r24 ; 0x03 + ef4: 8b 81 ldd r24, Y+3 ; 0x03 + ef6: 9c 81 ldd r25, Y+4 ; 0x04 + ef8: 01 96 adiw r24, 0x01 ; 1 + efa: 21 f4 brne .+8 ; 0xf04 + efc: 80 e4 ldi r24, 0x40 ; 64 + efe: 93 e2 ldi r25, 0x23 ; 35 + f00: 8b 83 std Y+3, r24 ; 0x03 + f02: 9c 83 std Y+4, r25 ; 0x04 + f04: 8b 81 ldd r24, Y+3 ; 0x03 + f06: 9c 81 ldd r25, Y+4 ; 0x04 + f08: 89 83 std Y+1, r24 ; 0x01 + f0a: 9a 83 std Y+2, r25 ; 0x02 + f0c: 80 93 62 00 sts 0x0062, r24 ; 0x800062 <__TEXT_REGION_LENGTH__+0x700062> + f10: 8a 81 ldd r24, Y+2 ; 0x02 + f12: 80 93 63 00 sts 0x0063, r24 ; 0x800063 <__TEXT_REGION_LENGTH__+0x700063> + f16: 9f b7 in r25, 0x3f ; 63 + f18: f8 94 cli + f1a: 80 91 50 00 lds r24, 0x0050 ; 0x800050 <__TEXT_REGION_LENGTH__+0x700050> + f1e: 82 60 ori r24, 0x02 ; 2 + f20: 80 93 50 00 sts 0x0050, r24 ; 0x800050 <__TEXT_REGION_LENGTH__+0x700050> + f24: 9f bf out 0x3f, r25 ; 63 + f26: 80 91 51 00 lds r24, 0x0051 ; 0x800051 <__TEXT_REGION_LENGTH__+0x700051> + f2a: 81 ff sbrs r24, 1 + f2c: fc cf rjmp .-8 ; 0xf26 + f2e: a3 df rcall .-186 ; 0xe76 + f30: 61 e0 ldi r22, 0x01 ; 1 + f32: 80 e4 ldi r24, 0x40 ; 64 + f34: 90 e0 ldi r25, 0x00 ; 0 + f36: b8 d4 rcall .+2416 ; 0x18a8 + f38: 9f b7 in r25, 0x3f ; 63 + f3a: f8 94 cli + f3c: 80 91 50 00 lds r24, 0x0050 ; 0x800050 <__TEXT_REGION_LENGTH__+0x700050> + f40: 8e 7f andi r24, 0xFE ; 254 + f42: 80 93 50 00 sts 0x0050, r24 ; 0x800050 <__TEXT_REGION_LENGTH__+0x700050> + f46: 9f bf out 0x3f, r25 ; 63 + f48: 24 96 adiw r28, 0x04 ; 4 + f4a: cd bf out 0x3d, r28 ; 61 + f4c: de bf out 0x3e, r29 ; 62 + f4e: df 91 pop r29 + f50: cf 91 pop r28 + f52: 08 95 ret + +00000f54 : f54: 9f b7 in r25, 0x3f ; 63 f56: f8 94 cli - f58: 80 91 50 00 lds r24, 0x0050 ; 0x800050 <__TEXT_REGION_LENGTH__+0x700050> - f5c: 8e 7f andi r24, 0xFE ; 254 - f5e: 80 93 50 00 sts 0x0050, r24 ; 0x800050 <__TEXT_REGION_LENGTH__+0x700050> - f62: 9f bf out 0x3f, r25 ; 63 - f64: 24 96 adiw r28, 0x04 ; 4 - f66: cd bf out 0x3d, r28 ; 61 - f68: de bf out 0x3e, r29 ; 62 - f6a: df 91 pop r29 - f6c: cf 91 pop r28 - f6e: 08 95 ret + f58: e8 2f mov r30, r24 + f5a: f0 e0 ldi r31, 0x00 ; 0 + f5c: e0 59 subi r30, 0x90 ; 144 + f5e: ff 4f sbci r31, 0xFF ; 255 + f60: 60 95 com r22 + f62: 80 81 ld r24, Z + f64: 68 23 and r22, r24 + f66: 60 83 st Z, r22 + f68: 9f bf out 0x3f, r25 ; 63 + f6a: 08 95 ret -00000f70 : - f70: 9f b7 in r25, 0x3f ; 63 - f72: f8 94 cli - f74: e8 2f mov r30, r24 - f76: f0 e0 ldi r31, 0x00 ; 0 - f78: e0 59 subi r30, 0x90 ; 144 - f7a: ff 4f sbci r31, 0xFF ; 255 - f7c: 60 95 com r22 - f7e: 80 81 ld r24, Z - f80: 68 23 and r22, r24 - f82: 60 83 st Z, r22 - f84: 9f bf out 0x3f, r25 ; 63 - f86: 08 95 ret +00000f6c : + f6c: cf 93 push r28 + f6e: 86 30 cpi r24, 0x06 ; 6 + f70: 11 f0 breq .+4 ; 0xf76 + f72: c0 e0 ldi r28, 0x00 ; 0 + f74: 01 c0 rjmp .+2 ; 0xf78 + f76: c8 e1 ldi r28, 0x18 ; 24 + f78: 80 91 51 00 lds r24, 0x0051 ; 0x800051 <__TEXT_REGION_LENGTH__+0x700051> + f7c: 81 fd sbrc r24, 1 + f7e: 0d c0 rjmp .+26 ; 0xf9a + f80: 9f b7 in r25, 0x3f ; 63 + f82: f8 94 cli + f84: 80 91 50 00 lds r24, 0x0050 ; 0x800050 <__TEXT_REGION_LENGTH__+0x700050> + f88: 82 60 ori r24, 0x02 ; 2 + f8a: 80 93 50 00 sts 0x0050, r24 ; 0x800050 <__TEXT_REGION_LENGTH__+0x700050> + f8e: 9f bf out 0x3f, r25 ; 63 + f90: 80 91 51 00 lds r24, 0x0051 ; 0x800051 <__TEXT_REGION_LENGTH__+0x700051> + f94: 81 ff sbrs r24, 1 + f96: fc cf rjmp .-8 ; 0xf90 + f98: 6e df rcall .-292 ; 0xe76 + f9a: 6c 2f mov r22, r28 + f9c: 63 60 ori r22, 0x03 ; 3 + f9e: 84 e4 ldi r24, 0x44 ; 68 + fa0: 90 e0 ldi r25, 0x00 ; 0 + fa2: 82 d4 rcall .+2308 ; 0x18a8 + fa4: 60 e4 ldi r22, 0x40 ; 64 + fa6: 80 e0 ldi r24, 0x00 ; 0 + fa8: cf 91 pop r28 + faa: d4 cf rjmp .-88 ; 0xf54 -00000f88 : - f88: cf 93 push r28 - f8a: 86 30 cpi r24, 0x06 ; 6 - f8c: 11 f0 breq .+4 ; 0xf92 - f8e: c0 e0 ldi r28, 0x00 ; 0 - f90: 01 c0 rjmp .+2 ; 0xf94 - f92: c8 e1 ldi r28, 0x18 ; 24 - f94: 80 91 51 00 lds r24, 0x0051 ; 0x800051 <__TEXT_REGION_LENGTH__+0x700051> - f98: 81 fd sbrc r24, 1 - f9a: 0d c0 rjmp .+26 ; 0xfb6 - f9c: 9f b7 in r25, 0x3f ; 63 - f9e: f8 94 cli - fa0: 80 91 50 00 lds r24, 0x0050 ; 0x800050 <__TEXT_REGION_LENGTH__+0x700050> - fa4: 82 60 ori r24, 0x02 ; 2 - fa6: 80 93 50 00 sts 0x0050, r24 ; 0x800050 <__TEXT_REGION_LENGTH__+0x700050> - faa: 9f bf out 0x3f, r25 ; 63 - fac: 80 91 51 00 lds r24, 0x0051 ; 0x800051 <__TEXT_REGION_LENGTH__+0x700051> - fb0: 81 ff sbrs r24, 1 - fb2: fc cf rjmp .-8 ; 0xfac - fb4: 6e df rcall .-292 ; 0xe92 - fb6: 6c 2f mov r22, r28 - fb8: 63 60 ori r22, 0x03 ; 3 - fba: 84 e4 ldi r24, 0x44 ; 68 - fbc: 90 e0 ldi r25, 0x00 ; 0 - fbe: 82 d4 rcall .+2308 ; 0x18c4 - fc0: 60 e4 ldi r22, 0x40 ; 64 - fc2: 80 e0 ldi r24, 0x00 ; 0 - fc4: cf 91 pop r28 - fc6: d4 cf rjmp .-88 ; 0xf70 +00000fac : + fac: 80 91 c4 20 lds r24, 0x20C4 ; 0x8020c4 + fb0: 08 95 ret -00000fc8 : - fc8: 80 91 c4 20 lds r24, 0x20C4 ; 0x8020c4 - fcc: 08 95 ret +00000fb2 : + fb2: 80 91 c4 20 lds r24, 0x20C4 ; 0x8020c4 + fb6: 81 30 cpi r24, 0x01 ; 1 + fb8: 09 f4 brne .+2 ; 0xfbc + fba: b8 c9 rjmp .-3216 ; 0x32c + fbc: 08 95 ret -00000fce : - fce: 80 91 c4 20 lds r24, 0x20C4 ; 0x8020c4 - fd2: 81 30 cpi r24, 0x01 ; 1 - fd4: 09 f4 brne .+2 ; 0xfd8 - fd6: b8 c9 rjmp .-3216 ; 0x348 - fd8: 08 95 ret +00000fbe : + fbe: f9 d0 rcall .+498 ; 0x11b2 + fc0: fc 01 movw r30, r24 + fc2: 83 81 ldd r24, Z+3 ; 0x03 + fc4: 80 93 c4 20 sts 0x20C4, r24 ; 0x8020c4 + fc8: 81 11 cpse r24, r1 + fca: 01 c0 rjmp .+2 ; 0xfce + fcc: a3 c9 rjmp .-3258 ; 0x314 + fce: 81 e0 ldi r24, 0x01 ; 1 + fd0: 08 95 ret -00000fda : - fda: f9 d0 rcall .+498 ; 0x11ce - fdc: fc 01 movw r30, r24 - fde: 83 81 ldd r24, Z+3 ; 0x03 - fe0: 80 93 c4 20 sts 0x20C4, r24 ; 0x8020c4 - fe4: 81 11 cpse r24, r1 - fe6: 01 c0 rjmp .+2 ; 0xfea - fe8: a3 c9 rjmp .-3258 ; 0x330 - fea: 81 e0 ldi r24, 0x01 ; 1 - fec: 08 95 ret +00000fd2 : + fd2: 90 91 6a 24 lds r25, 0x246A ; 0x80246a + fd6: 89 2f mov r24, r25 + fd8: 80 76 andi r24, 0x60 ; 96 + fda: 97 ff sbrs r25, 7 + fdc: 07 c0 rjmp .+14 ; 0xfec + fde: 80 34 cpi r24, 0x40 ; 64 + fe0: 91 f4 brne .+36 ; 0x1006 + fe2: 80 91 6b 24 lds r24, 0x246B ; 0x80246b + fe6: 81 11 cpse r24, r1 + fe8: 0e c0 rjmp .+28 ; 0x1006 + fea: a5 c9 rjmp .-3254 ; 0x336 + fec: 80 34 cpi r24, 0x40 ; 64 + fee: 59 f4 brne .+22 ; 0x1006 + ff0: 80 91 6b 24 lds r24, 0x246B ; 0x80246b + ff4: 81 11 cpse r24, r1 + ff6: 07 c0 rjmp .+14 ; 0x1006 + ff8: 80 91 70 24 lds r24, 0x2470 ; 0x802470 + ffc: 90 91 71 24 lds r25, 0x2471 ; 0x802471 + 1000: 89 2b or r24, r25 + 1002: 09 f0 breq .+2 ; 0x1006 + 1004: 96 c9 rjmp .-3284 ; 0x332 + 1006: 80 e0 ldi r24, 0x00 ; 0 + 1008: 08 95 ret -00000fee : - fee: 90 91 66 24 lds r25, 0x2466 ; 0x802466 - ff2: 89 2f mov r24, r25 - ff4: 80 76 andi r24, 0x60 ; 96 - ff6: 97 ff sbrs r25, 7 - ff8: 07 c0 rjmp .+14 ; 0x1008 - ffa: 80 34 cpi r24, 0x40 ; 64 - ffc: 91 f4 brne .+36 ; 0x1022 - ffe: 80 91 67 24 lds r24, 0x2467 ; 0x802467 - 1002: 81 11 cpse r24, r1 - 1004: 0e c0 rjmp .+28 ; 0x1022 - 1006: a5 c9 rjmp .-3254 ; 0x352 - 1008: 80 34 cpi r24, 0x40 ; 64 - 100a: 59 f4 brne .+22 ; 0x1022 - 100c: 80 91 67 24 lds r24, 0x2467 ; 0x802467 - 1010: 81 11 cpse r24, r1 - 1012: 07 c0 rjmp .+14 ; 0x1022 - 1014: 80 91 6c 24 lds r24, 0x246C ; 0x80246c - 1018: 90 91 6d 24 lds r25, 0x246D ; 0x80246d - 101c: 89 2b or r24, r25 - 101e: 09 f0 breq .+2 ; 0x1022 - 1020: 96 c9 rjmp .-3284 ; 0x34e - 1022: 80 e0 ldi r24, 0x00 ; 0 - 1024: 08 95 ret +0000100a : + 100a: 0f 93 push r16 + 100c: 1f 93 push r17 + 100e: 9b 01 movw r18, r22 + 1010: 8a 01 movw r16, r20 + 1012: ac 01 movw r20, r24 + 1014: 60 e0 ldi r22, 0x00 ; 0 + 1016: 83 e8 ldi r24, 0x83 ; 131 + 1018: fb d7 rcall .+4086 ; 0x2010 + 101a: 1f 91 pop r17 + 101c: 0f 91 pop r16 + 101e: 08 95 ret -00001026 : - 1026: 0f 93 push r16 - 1028: 1f 93 push r17 - 102a: 9b 01 movw r18, r22 - 102c: 8a 01 movw r16, r20 - 102e: ac 01 movw r20, r24 - 1030: 60 e0 ldi r22, 0x00 ; 0 - 1032: 83 e8 ldi r24, 0x83 ; 131 - 1034: fb d7 rcall .+4086 ; 0x202c - 1036: 1f 91 pop r17 - 1038: 0f 91 pop r16 - 103a: 08 95 ret +00001020 : + 1020: 80 91 6c 24 lds r24, 0x246C ; 0x80246c + 1024: 8f 77 andi r24, 0x7F ; 127 + 1026: 76 c7 rjmp .+3820 ; 0x1f14 -0000103c : - 103c: 80 91 68 24 lds r24, 0x2468 ; 0x802468 - 1040: 8f 77 andi r24, 0x7F ; 127 - 1042: 76 c7 rjmp .+3820 ; 0x1f30 +00001028 : + 1028: 90 91 cc 20 lds r25, 0x20CC ; 0x8020cc + 102c: 91 11 cpse r25, r1 + 102e: 02 c0 rjmp .+4 ; 0x1034 + 1030: 80 e0 ldi r24, 0x00 ; 0 + 1032: 08 95 ret + 1034: e0 91 c9 20 lds r30, 0x20C9 ; 0x8020c9 + 1038: f0 91 ca 20 lds r31, 0x20CA ; 0x8020ca + 103c: 01 90 ld r0, Z+ + 103e: f0 81 ld r31, Z + 1040: e0 2d mov r30, r0 + 1042: 94 81 ldd r25, Z+4 ; 0x04 + 1044: 89 17 cp r24, r25 + 1046: a0 f7 brcc .-24 ; 0x1030 + 1048: e0 93 c7 20 sts 0x20C7, r30 ; 0x8020c7 + 104c: f0 93 c8 20 sts 0x20C8, r31 ; 0x8020c8 + 1050: 22 81 ldd r18, Z+2 ; 0x02 + 1052: 33 81 ldd r19, Z+3 ; 0x03 + 1054: 2e 0f add r18, r30 + 1056: 3f 1f adc r19, r31 + 1058: e2 17 cp r30, r18 + 105a: f3 07 cpc r31, r19 + 105c: 98 f4 brcc .+38 ; 0x1084 + 105e: 91 81 ldd r25, Z+1 ; 0x01 + 1060: 94 30 cpi r25, 0x04 ; 4 + 1062: 61 f4 brne .+24 ; 0x107c + 1064: 92 81 ldd r25, Z+2 ; 0x02 + 1066: 89 13 cpse r24, r25 + 1068: 09 c0 rjmp .+18 ; 0x107c + 106a: 93 81 ldd r25, Z+3 ; 0x03 + 106c: 69 13 cpse r22, r25 + 106e: 06 c0 rjmp .+12 ; 0x107c + 1070: e0 93 c7 20 sts 0x20C7, r30 ; 0x8020c7 + 1074: f0 93 c8 20 sts 0x20C8, r31 ; 0x8020c8 + 1078: 81 e0 ldi r24, 0x01 ; 1 + 107a: 08 95 ret + 107c: 90 81 ld r25, Z + 107e: e9 0f add r30, r25 + 1080: f1 1d adc r31, r1 + 1082: ea cf rjmp .-44 ; 0x1058 + 1084: e0 93 c7 20 sts 0x20C7, r30 ; 0x8020c7 + 1088: f0 93 c8 20 sts 0x20C8, r31 ; 0x8020c8 + 108c: d1 cf rjmp .-94 ; 0x1030 -00001044 : - 1044: 90 91 cc 20 lds r25, 0x20CC ; 0x8020cc - 1048: 91 11 cpse r25, r1 - 104a: 02 c0 rjmp .+4 ; 0x1050 - 104c: 80 e0 ldi r24, 0x00 ; 0 - 104e: 08 95 ret - 1050: e0 91 c9 20 lds r30, 0x20C9 ; 0x8020c9 - 1054: f0 91 ca 20 lds r31, 0x20CA ; 0x8020ca - 1058: 01 90 ld r0, Z+ - 105a: f0 81 ld r31, Z - 105c: e0 2d mov r30, r0 - 105e: 94 81 ldd r25, Z+4 ; 0x04 - 1060: 89 17 cp r24, r25 - 1062: a0 f7 brcc .-24 ; 0x104c - 1064: e0 93 c7 20 sts 0x20C7, r30 ; 0x8020c7 - 1068: f0 93 c8 20 sts 0x20C8, r31 ; 0x8020c8 - 106c: 22 81 ldd r18, Z+2 ; 0x02 - 106e: 33 81 ldd r19, Z+3 ; 0x03 - 1070: 2e 0f add r18, r30 - 1072: 3f 1f adc r19, r31 - 1074: e2 17 cp r30, r18 - 1076: f3 07 cpc r31, r19 - 1078: 98 f4 brcc .+38 ; 0x10a0 - 107a: 91 81 ldd r25, Z+1 ; 0x01 - 107c: 94 30 cpi r25, 0x04 ; 4 - 107e: 61 f4 brne .+24 ; 0x1098 - 1080: 92 81 ldd r25, Z+2 ; 0x02 - 1082: 89 13 cpse r24, r25 - 1084: 09 c0 rjmp .+18 ; 0x1098 - 1086: 93 81 ldd r25, Z+3 ; 0x03 - 1088: 69 13 cpse r22, r25 - 108a: 06 c0 rjmp .+12 ; 0x1098 - 108c: e0 93 c7 20 sts 0x20C7, r30 ; 0x8020c7 - 1090: f0 93 c8 20 sts 0x20C8, r31 ; 0x8020c8 - 1094: 81 e0 ldi r24, 0x01 ; 1 - 1096: 08 95 ret - 1098: 90 81 ld r25, Z - 109a: e9 0f add r30, r25 - 109c: f1 1d adc r31, r1 - 109e: ea cf rjmp .-44 ; 0x1074 - 10a0: e0 93 c7 20 sts 0x20C7, r30 ; 0x8020c7 - 10a4: f0 93 c8 20 sts 0x20C8, r31 ; 0x8020c8 - 10a8: d1 cf rjmp .-94 ; 0x104c +0000108e : + 108e: e0 91 c9 20 lds r30, 0x20C9 ; 0x8020c9 + 1092: f0 91 ca 20 lds r31, 0x20CA ; 0x8020ca + 1096: 01 90 ld r0, Z+ + 1098: f0 81 ld r31, Z + 109a: e0 2d mov r30, r0 + 109c: 22 81 ldd r18, Z+2 ; 0x02 + 109e: 33 81 ldd r19, Z+3 ; 0x03 + 10a0: 2e 0f add r18, r30 + 10a2: 3f 1f adc r19, r31 + 10a4: fc 01 movw r30, r24 + 10a6: 40 81 ld r20, Z + 10a8: e4 0f add r30, r20 + 10aa: f1 1d adc r31, r1 + 10ac: e2 17 cp r30, r18 + 10ae: f3 07 cpc r31, r19 + 10b0: 48 f4 brcc .+18 ; 0x10c4 + 10b2: 81 81 ldd r24, Z+1 ; 0x01 + 10b4: 84 30 cpi r24, 0x04 ; 4 + 10b6: 31 f0 breq .+12 ; 0x10c4 + 10b8: 85 30 cpi r24, 0x05 ; 5 + 10ba: 39 f0 breq .+14 ; 0x10ca + 10bc: 80 81 ld r24, Z + 10be: e8 0f add r30, r24 + 10c0: f1 1d adc r31, r1 + 10c2: f4 cf rjmp .-24 ; 0x10ac + 10c4: 80 e0 ldi r24, 0x00 ; 0 + 10c6: 90 e0 ldi r25, 0x00 ; 0 + 10c8: 08 95 ret + 10ca: cf 01 movw r24, r30 + 10cc: 08 95 ret -000010aa : - 10aa: e0 91 c9 20 lds r30, 0x20C9 ; 0x8020c9 - 10ae: f0 91 ca 20 lds r31, 0x20CA ; 0x8020ca - 10b2: 01 90 ld r0, Z+ - 10b4: f0 81 ld r31, Z - 10b6: e0 2d mov r30, r0 - 10b8: 22 81 ldd r18, Z+2 ; 0x02 - 10ba: 33 81 ldd r19, Z+3 ; 0x03 - 10bc: 2e 0f add r18, r30 - 10be: 3f 1f adc r19, r31 - 10c0: fc 01 movw r30, r24 - 10c2: 40 81 ld r20, Z - 10c4: e4 0f add r30, r20 - 10c6: f1 1d adc r31, r1 - 10c8: e2 17 cp r30, r18 - 10ca: f3 07 cpc r31, r19 - 10cc: 48 f4 brcc .+18 ; 0x10e0 - 10ce: 81 81 ldd r24, Z+1 ; 0x01 - 10d0: 84 30 cpi r24, 0x04 ; 4 - 10d2: 31 f0 breq .+12 ; 0x10e0 - 10d4: 85 30 cpi r24, 0x05 ; 5 - 10d6: 39 f0 breq .+14 ; 0x10e6 - 10d8: 80 81 ld r24, Z - 10da: e8 0f add r30, r24 - 10dc: f1 1d adc r31, r1 - 10de: f4 cf rjmp .-24 ; 0x10c8 - 10e0: 80 e0 ldi r24, 0x00 ; 0 - 10e2: 90 e0 ldi r25, 0x00 ; 0 - 10e4: 08 95 ret - 10e6: cf 01 movw r24, r30 - 10e8: 08 95 ret +000010ce : + 10ce: 1f 93 push r17 + 10d0: cf 93 push r28 + 10d2: df 93 push r29 + 10d4: 18 2f mov r17, r24 + 10d6: a8 df rcall .-176 ; 0x1028 + 10d8: 88 23 and r24, r24 + 10da: 39 f1 breq .+78 ; 0x112a + 10dc: c0 91 c7 20 lds r28, 0x20C7 ; 0x8020c7 + 10e0: d0 91 c8 20 lds r29, 0x20C8 ; 0x8020c8 + 10e4: ce 01 movw r24, r28 + 10e6: d3 df rcall .-90 ; 0x108e + 10e8: ec 01 movw r28, r24 + 10ea: 89 2b or r24, r25 + 10ec: 41 f0 breq .+16 ; 0x10fe + 10ee: 4c 81 ldd r20, Y+4 ; 0x04 + 10f0: 5d 81 ldd r21, Y+5 ; 0x05 + 10f2: 6b 81 ldd r22, Y+3 ; 0x03 + 10f4: 8a 81 ldd r24, Y+2 ; 0x02 + 10f6: 1b d7 rcall .+3638 ; 0x1f2e + 10f8: 81 11 cpse r24, r1 + 10fa: f4 cf rjmp .-24 ; 0x10e4 + 10fc: 16 c0 rjmp .+44 ; 0x112a + 10fe: e0 91 c9 20 lds r30, 0x20C9 ; 0x8020c9 + 1102: f0 91 ca 20 lds r31, 0x20CA ; 0x8020ca + 1106: 92 81 ldd r25, Z+2 ; 0x02 + 1108: 83 81 ldd r24, Z+3 ; 0x03 + 110a: e9 2f mov r30, r25 + 110c: f8 2f mov r31, r24 + 110e: e1 0f add r30, r17 + 1110: f1 1d adc r31, r1 + 1112: e1 0f add r30, r17 + 1114: f1 1d adc r31, r1 + 1116: 01 90 ld r0, Z+ + 1118: f0 81 ld r31, Z + 111a: e0 2d mov r30, r0 + 111c: 01 90 ld r0, Z+ + 111e: f0 81 ld r31, Z + 1120: e0 2d mov r30, r0 + 1122: df 91 pop r29 + 1124: cf 91 pop r28 + 1126: 1f 91 pop r17 + 1128: 09 94 ijmp + 112a: 80 e0 ldi r24, 0x00 ; 0 + 112c: df 91 pop r29 + 112e: cf 91 pop r28 + 1130: 1f 91 pop r17 + 1132: 08 95 ret -000010ea : - 10ea: 1f 93 push r17 - 10ec: cf 93 push r28 - 10ee: df 93 push r29 - 10f0: 18 2f mov r17, r24 - 10f2: a8 df rcall .-176 ; 0x1044 - 10f4: 88 23 and r24, r24 - 10f6: 39 f1 breq .+78 ; 0x1146 - 10f8: c0 91 c7 20 lds r28, 0x20C7 ; 0x8020c7 - 10fc: d0 91 c8 20 lds r29, 0x20C8 ; 0x8020c8 - 1100: ce 01 movw r24, r28 - 1102: d3 df rcall .-90 ; 0x10aa - 1104: ec 01 movw r28, r24 - 1106: 89 2b or r24, r25 - 1108: 41 f0 breq .+16 ; 0x111a - 110a: 4c 81 ldd r20, Y+4 ; 0x04 - 110c: 5d 81 ldd r21, Y+5 ; 0x05 - 110e: 6b 81 ldd r22, Y+3 ; 0x03 - 1110: 8a 81 ldd r24, Y+2 ; 0x02 - 1112: 1b d7 rcall .+3638 ; 0x1f4a - 1114: 81 11 cpse r24, r1 - 1116: f4 cf rjmp .-24 ; 0x1100 - 1118: 16 c0 rjmp .+44 ; 0x1146 - 111a: e0 91 c9 20 lds r30, 0x20C9 ; 0x8020c9 - 111e: f0 91 ca 20 lds r31, 0x20CA ; 0x8020ca - 1122: 92 81 ldd r25, Z+2 ; 0x02 - 1124: 83 81 ldd r24, Z+3 ; 0x03 - 1126: e9 2f mov r30, r25 - 1128: f8 2f mov r31, r24 - 112a: e1 0f add r30, r17 - 112c: f1 1d adc r31, r1 - 112e: e1 0f add r30, r17 - 1130: f1 1d adc r31, r1 - 1132: 01 90 ld r0, Z+ - 1134: f0 81 ld r31, Z - 1136: e0 2d mov r30, r0 - 1138: 01 90 ld r0, Z+ - 113a: f0 81 ld r31, Z - 113c: e0 2d mov r30, r0 - 113e: df 91 pop r29 - 1140: cf 91 pop r28 - 1142: 1f 91 pop r17 - 1144: 09 94 ijmp - 1146: 80 e0 ldi r24, 0x00 ; 0 - 1148: df 91 pop r29 - 114a: cf 91 pop r28 - 114c: 1f 91 pop r17 - 114e: 08 95 ret +00001134 : + 1134: ef 92 push r14 + 1136: ff 92 push r15 + 1138: 1f 93 push r17 + 113a: cf 93 push r28 + 113c: df 93 push r29 + 113e: c8 2f mov r28, r24 + 1140: 60 e0 ldi r22, 0x00 ; 0 + 1142: 72 df rcall .-284 ; 0x1028 + 1144: 81 11 cpse r24, r1 + 1146: 02 c0 rjmp .+4 ; 0x114c + 1148: 10 e0 ldi r17, 0x00 ; 0 + 114a: 2c c0 rjmp .+88 ; 0x11a4 + 114c: e0 91 c9 20 lds r30, 0x20C9 ; 0x8020c9 + 1150: f0 91 ca 20 lds r31, 0x20CA ; 0x8020ca + 1154: 92 81 ldd r25, Z+2 ; 0x02 + 1156: 83 81 ldd r24, Z+3 ; 0x03 + 1158: e9 2f mov r30, r25 + 115a: f8 2f mov r31, r24 + 115c: ec 0f add r30, r28 + 115e: f1 1d adc r31, r1 + 1160: ec 0f add r30, r28 + 1162: f1 1d adc r31, r1 + 1164: e0 80 ld r14, Z + 1166: f1 80 ldd r15, Z+1 ; 0x01 + 1168: d7 01 movw r26, r14 + 116a: 16 96 adiw r26, 0x06 ; 6 + 116c: ed 91 ld r30, X+ + 116e: fc 91 ld r31, X + 1170: 17 97 sbiw r26, 0x07 ; 7 + 1172: 09 95 icall + 1174: 68 2f mov r22, r24 + 1176: 8c 2f mov r24, r28 + 1178: 57 df rcall .-338 ; 0x1028 + 117a: 18 2f mov r17, r24 + 117c: 88 23 and r24, r24 + 117e: 21 f3 breq .-56 ; 0x1148 + 1180: c0 91 c7 20 lds r28, 0x20C7 ; 0x8020c7 + 1184: d0 91 c8 20 lds r29, 0x20C8 ; 0x8020c8 + 1188: ce 01 movw r24, r28 + 118a: 81 df rcall .-254 ; 0x108e + 118c: ec 01 movw r28, r24 + 118e: 89 2b or r24, r25 + 1190: 19 f0 breq .+6 ; 0x1198 + 1192: 8a 81 ldd r24, Y+2 ; 0x02 + 1194: f9 d7 rcall .+4082 ; 0x2188 + 1196: f8 cf rjmp .-16 ; 0x1188 + 1198: d7 01 movw r26, r14 + 119a: 12 96 adiw r26, 0x02 ; 2 + 119c: ed 91 ld r30, X+ + 119e: fc 91 ld r31, X + 11a0: 13 97 sbiw r26, 0x03 ; 3 + 11a2: 09 95 icall + 11a4: 81 2f mov r24, r17 + 11a6: df 91 pop r29 + 11a8: cf 91 pop r28 + 11aa: 1f 91 pop r17 + 11ac: ff 90 pop r15 + 11ae: ef 90 pop r14 + 11b0: 08 95 ret -00001150 : - 1150: ef 92 push r14 - 1152: ff 92 push r15 - 1154: 1f 93 push r17 - 1156: cf 93 push r28 - 1158: df 93 push r29 - 115a: c8 2f mov r28, r24 - 115c: 60 e0 ldi r22, 0x00 ; 0 - 115e: 72 df rcall .-284 ; 0x1044 - 1160: 81 11 cpse r24, r1 - 1162: 02 c0 rjmp .+4 ; 0x1168 - 1164: 10 e0 ldi r17, 0x00 ; 0 - 1166: 2c c0 rjmp .+88 ; 0x11c0 - 1168: e0 91 c9 20 lds r30, 0x20C9 ; 0x8020c9 - 116c: f0 91 ca 20 lds r31, 0x20CA ; 0x8020ca - 1170: 92 81 ldd r25, Z+2 ; 0x02 - 1172: 83 81 ldd r24, Z+3 ; 0x03 - 1174: e9 2f mov r30, r25 - 1176: f8 2f mov r31, r24 - 1178: ec 0f add r30, r28 - 117a: f1 1d adc r31, r1 - 117c: ec 0f add r30, r28 - 117e: f1 1d adc r31, r1 - 1180: e0 80 ld r14, Z - 1182: f1 80 ldd r15, Z+1 ; 0x01 - 1184: d7 01 movw r26, r14 - 1186: 16 96 adiw r26, 0x06 ; 6 - 1188: ed 91 ld r30, X+ - 118a: fc 91 ld r31, X - 118c: 17 97 sbiw r26, 0x07 ; 7 - 118e: 09 95 icall - 1190: 68 2f mov r22, r24 - 1192: 8c 2f mov r24, r28 - 1194: 57 df rcall .-338 ; 0x1044 - 1196: 18 2f mov r17, r24 - 1198: 88 23 and r24, r24 - 119a: 21 f3 breq .-56 ; 0x1164 - 119c: c0 91 c7 20 lds r28, 0x20C7 ; 0x8020c7 - 11a0: d0 91 c8 20 lds r29, 0x20C8 ; 0x8020c8 - 11a4: ce 01 movw r24, r28 - 11a6: 81 df rcall .-254 ; 0x10aa - 11a8: ec 01 movw r28, r24 - 11aa: 89 2b or r24, r25 - 11ac: 19 f0 breq .+6 ; 0x11b4 - 11ae: 8a 81 ldd r24, Y+2 ; 0x02 - 11b0: f9 d7 rcall .+4082 ; 0x21a4 - 11b2: f8 cf rjmp .-16 ; 0x11a4 - 11b4: d7 01 movw r26, r14 - 11b6: 12 96 adiw r26, 0x02 ; 2 - 11b8: ed 91 ld r30, X+ - 11ba: fc 91 ld r31, X - 11bc: 13 97 sbiw r26, 0x03 ; 3 - 11be: 09 95 icall - 11c0: 81 2f mov r24, r17 - 11c2: df 91 pop r29 - 11c4: cf 91 pop r28 - 11c6: 1f 91 pop r17 - 11c8: ff 90 pop r15 - 11ca: ef 90 pop r14 - 11cc: 08 95 ret +000011b2 : + 11b2: 80 91 c7 20 lds r24, 0x20C7 ; 0x8020c7 + 11b6: 90 91 c8 20 lds r25, 0x20C8 ; 0x8020c8 + 11ba: 08 95 ret -000011ce : - 11ce: 80 91 c7 20 lds r24, 0x20C7 ; 0x8020c7 - 11d2: 90 91 c8 20 lds r25, 0x20C8 ; 0x8020c8 +000011bc : + 11bc: 33 c6 rjmp .+3174 ; 0x1e24 + +000011be : + 11be: cf 93 push r28 + 11c0: 80 91 cc 20 lds r24, 0x20CC ; 0x8020cc + 11c4: 81 11 cpse r24, r1 + 11c6: 08 c0 rjmp .+16 ; 0x11d8 + 11c8: 10 92 cc 20 sts 0x20CC, r1 ; 0x8020cc + 11cc: 10 92 d0 20 sts 0x20D0, r1 ; 0x8020d0 + 11d0: 10 92 d1 20 sts 0x20D1, r1 ; 0x8020d1 + 11d4: cf 91 pop r28 11d6: 08 95 ret + 11d8: c0 e0 ldi r28, 0x00 ; 0 + 11da: e0 91 c9 20 lds r30, 0x20C9 ; 0x8020c9 + 11de: f0 91 ca 20 lds r31, 0x20CA ; 0x8020ca + 11e2: 01 90 ld r0, Z+ + 11e4: f0 81 ld r31, Z + 11e6: e0 2d mov r30, r0 + 11e8: 84 81 ldd r24, Z+4 ; 0x04 + 11ea: c8 17 cp r28, r24 + 11ec: 68 f7 brcc .-38 ; 0x11c8 + 11ee: 8c 2f mov r24, r28 + 11f0: a1 df rcall .-190 ; 0x1134 + 11f2: cf 5f subi r28, 0xFF ; 255 + 11f4: f2 cf rjmp .-28 ; 0x11da -000011d8 : - 11d8: 33 c6 rjmp .+3174 ; 0x1e40 +000011f6 : + 11f6: cf 93 push r28 + 11f8: 80 91 cc 20 lds r24, 0x20CC ; 0x8020cc + 11fc: 88 23 and r24, r24 + 11fe: f1 f0 breq .+60 ; 0x123c + 1200: c0 e0 ldi r28, 0x00 ; 0 + 1202: e0 91 c9 20 lds r30, 0x20C9 ; 0x8020c9 + 1206: f0 91 ca 20 lds r31, 0x20CA ; 0x8020ca + 120a: a0 81 ld r26, Z + 120c: b1 81 ldd r27, Z+1 ; 0x01 + 120e: 14 96 adiw r26, 0x04 ; 4 + 1210: 8c 91 ld r24, X + 1212: c8 17 cp r28, r24 + 1214: 98 f4 brcc .+38 ; 0x123c + 1216: 92 81 ldd r25, Z+2 ; 0x02 + 1218: 83 81 ldd r24, Z+3 ; 0x03 + 121a: e9 2f mov r30, r25 + 121c: f8 2f mov r31, r24 + 121e: ec 0f add r30, r28 + 1220: f1 1d adc r31, r1 + 1222: ec 0f add r30, r28 + 1224: f1 1d adc r31, r1 + 1226: 01 90 ld r0, Z+ + 1228: f0 81 ld r31, Z + 122a: e0 2d mov r30, r0 + 122c: 00 84 ldd r0, Z+8 ; 0x08 + 122e: f1 85 ldd r31, Z+9 ; 0x09 + 1230: e0 2d mov r30, r0 + 1232: 30 97 sbiw r30, 0x00 ; 0 + 1234: 09 f0 breq .+2 ; 0x1238 + 1236: 09 95 icall + 1238: cf 5f subi r28, 0xFF ; 255 + 123a: e3 cf rjmp .-58 ; 0x1202 + 123c: cf 91 pop r28 + 123e: 08 95 ret -000011da : - 11da: cf 93 push r28 - 11dc: 80 91 cc 20 lds r24, 0x20CC ; 0x8020cc - 11e0: 81 11 cpse r24, r1 - 11e2: 08 c0 rjmp .+16 ; 0x11f4 - 11e4: 10 92 cc 20 sts 0x20CC, r1 ; 0x8020cc - 11e8: 10 92 d0 20 sts 0x20D0, r1 ; 0x8020d0 - 11ec: 10 92 d1 20 sts 0x20D1, r1 ; 0x8020d1 - 11f0: cf 91 pop r28 - 11f2: 08 95 ret - 11f4: c0 e0 ldi r28, 0x00 ; 0 - 11f6: e0 91 c9 20 lds r30, 0x20C9 ; 0x8020c9 - 11fa: f0 91 ca 20 lds r31, 0x20CA ; 0x8020ca - 11fe: 01 90 ld r0, Z+ - 1200: f0 81 ld r31, Z - 1202: e0 2d mov r30, r0 - 1204: 84 81 ldd r24, Z+4 ; 0x04 - 1206: c8 17 cp r28, r24 - 1208: 68 f7 brcc .-38 ; 0x11e4 - 120a: 8c 2f mov r24, r28 - 120c: a1 df rcall .-190 ; 0x1150 - 120e: cf 5f subi r28, 0xFF ; 255 - 1210: f2 cf rjmp .-28 ; 0x11f6 - -00001212 : - 1212: cf 93 push r28 - 1214: 80 91 cc 20 lds r24, 0x20CC ; 0x8020cc - 1218: 88 23 and r24, r24 - 121a: f1 f0 breq .+60 ; 0x1258 - 121c: c0 e0 ldi r28, 0x00 ; 0 - 121e: e0 91 c9 20 lds r30, 0x20C9 ; 0x8020c9 - 1222: f0 91 ca 20 lds r31, 0x20CA ; 0x8020ca - 1226: a0 81 ld r26, Z - 1228: b1 81 ldd r27, Z+1 ; 0x01 - 122a: 14 96 adiw r26, 0x04 ; 4 - 122c: 8c 91 ld r24, X - 122e: c8 17 cp r28, r24 - 1230: 98 f4 brcc .+38 ; 0x1258 - 1232: 92 81 ldd r25, Z+2 ; 0x02 - 1234: 83 81 ldd r24, Z+3 ; 0x03 - 1236: e9 2f mov r30, r25 - 1238: f8 2f mov r31, r24 - 123a: ec 0f add r30, r28 - 123c: f1 1d adc r31, r1 - 123e: ec 0f add r30, r28 - 1240: f1 1d adc r31, r1 - 1242: 01 90 ld r0, Z+ - 1244: f0 81 ld r31, Z - 1246: e0 2d mov r30, r0 - 1248: 00 84 ldd r0, Z+8 ; 0x08 - 124a: f1 85 ldd r31, Z+9 ; 0x09 - 124c: e0 2d mov r30, r0 - 124e: 30 97 sbiw r30, 0x00 ; 0 - 1250: 09 f0 breq .+2 ; 0x1254 - 1252: 09 95 icall - 1254: cf 5f subi r28, 0xFF ; 255 - 1256: e3 cf rjmp .-58 ; 0x121e - 1258: cf 91 pop r28 - 125a: 08 95 ret - -0000125c : - 125c: ef 92 push r14 - 125e: ff 92 push r15 - 1260: 0f 93 push r16 - 1262: 1f 93 push r17 - 1264: cf 93 push r28 - 1266: df 93 push r29 - 1268: 1f 92 push r1 - 126a: cd b7 in r28, 0x3d ; 61 - 126c: de b7 in r29, 0x3e ; 62 - 126e: 10 92 70 24 sts 0x2470, r1 ; 0x802470 - 1272: 10 92 71 24 sts 0x2471, r1 ; 0x802471 - 1276: 10 92 72 24 sts 0x2472, r1 ; 0x802472 - 127a: 10 92 73 24 sts 0x2473, r1 ; 0x802473 - 127e: 10 92 74 24 sts 0x2474, r1 ; 0x802474 - 1282: 10 92 75 24 sts 0x2475, r1 ; 0x802475 - 1286: 80 91 66 24 lds r24, 0x2466 ; 0x802466 - 128a: 87 ff sbrs r24, 7 - 128c: 07 c0 rjmp .+14 ; 0x129c - 128e: 20 91 6c 24 lds r18, 0x246C ; 0x80246c - 1292: 30 91 6d 24 lds r19, 0x246D ; 0x80246d - 1296: 23 2b or r18, r19 - 1298: 09 f4 brne .+2 ; 0x129c - 129a: 0b c3 rjmp .+1558 ; 0x18b2 - 129c: 98 2f mov r25, r24 - 129e: 90 76 andi r25, 0x60 ; 96 - 12a0: 90 34 cpi r25, 0x40 ; 64 - 12a2: 09 f0 breq .+2 ; 0x12a6 - 12a4: c7 c0 rjmp .+398 ; 0x1434 - 12a6: e0 91 67 24 lds r30, 0x2467 ; 0x802467 - 12aa: 8e 2f mov r24, r30 - 12ac: 90 e0 ldi r25, 0x00 ; 0 - 12ae: fc 01 movw r30, r24 - 12b0: e0 5a subi r30, 0xA0 ; 160 - 12b2: f1 09 sbc r31, r1 - 12b4: e8 30 cpi r30, 0x08 ; 8 - 12b6: f1 05 cpc r31, r1 - 12b8: 08 f0 brcs .+2 ; 0x12bc - 12ba: 8a c2 rjmp .+1300 ; 0x17d0 - 12bc: ea 5f subi r30, 0xFA ; 250 - 12be: fe 4f sbci r31, 0xFE ; 254 - 12c0: 0c 94 86 12 jmp 0x250c ; 0x250c <__tablejump2__> - 12c4: 00 00 nop - 12c6: f3 c2 rjmp .+1510 ; 0x18ae - 12c8: 10 92 00 08 sts 0x0800, r1 ; 0x800800 <__TEXT_REGION_LENGTH__+0x700800> - 12cc: 80 91 68 24 lds r24, 0x2468 ; 0x802468 - 12d0: 90 91 69 24 lds r25, 0x2469 ; 0x802469 - 12d4: 80 93 36 08 sts 0x0836, r24 ; 0x800836 <__TEXT_REGION_LENGTH__+0x700836> - 12d8: 90 93 37 08 sts 0x0837, r25 ; 0x800837 <__TEXT_REGION_LENGTH__+0x700837> - 12dc: 80 91 6a 24 lds r24, 0x246A ; 0x80246a - 12e0: 8f 70 andi r24, 0x0F ; 15 - 12e2: 80 93 00 08 sts 0x0800, r24 ; 0x800800 <__TEXT_REGION_LENGTH__+0x700800> - 12e6: 60 91 6c 24 lds r22, 0x246C ; 0x80246c - 12ea: 70 91 6d 24 lds r23, 0x246D ; 0x80246d - 12ee: 86 e6 ldi r24, 0x66 ; 102 - 12f0: 92 e2 ldi r25, 0x22 ; 34 - 12f2: 19 c0 rjmp .+50 ; 0x1326 - 12f4: 10 92 40 08 sts 0x0840, r1 ; 0x800840 <__TEXT_REGION_LENGTH__+0x700840> - 12f8: 60 91 6c 24 lds r22, 0x246C ; 0x80246c - 12fc: 70 91 6d 24 lds r23, 0x246D ; 0x80246d - 1300: 60 93 02 20 sts 0x2002, r22 ; 0x802002 - 1304: 70 93 03 20 sts 0x2003, r23 ; 0x802003 - 1308: 80 91 68 24 lds r24, 0x2468 ; 0x802468 - 130c: 90 91 69 24 lds r25, 0x2469 ; 0x802469 - 1310: 80 93 76 08 sts 0x0876, r24 ; 0x800876 <__TEXT_REGION_LENGTH__+0x700876> - 1314: 90 93 77 08 sts 0x0877, r25 ; 0x800877 <__TEXT_REGION_LENGTH__+0x700877> - 1318: 80 91 6a 24 lds r24, 0x246A ; 0x80246a - 131c: 8f 70 andi r24, 0x0F ; 15 - 131e: 80 93 40 08 sts 0x0840, r24 ; 0x800840 <__TEXT_REGION_LENGTH__+0x700840> - 1322: 86 e7 ldi r24, 0x76 ; 118 - 1324: 94 e2 ldi r25, 0x24 ; 36 - 1326: 0a d6 rcall .+3092 ; 0x1f3c - 1328: 20 91 04 20 lds r18, 0x2004 ; 0x802004 - 132c: 30 91 05 20 lds r19, 0x2005 ; 0x802005 - 1330: 80 91 6c 24 lds r24, 0x246C ; 0x80246c - 1334: 90 91 6d 24 lds r25, 0x246D ; 0x80246d - 1338: 28 17 cp r18, r24 - 133a: 39 07 cpc r19, r25 - 133c: 09 f4 brne .+2 ; 0x1340 - 133e: b7 c2 rjmp .+1390 ; 0x18ae - 1340: 80 93 04 20 sts 0x2004, r24 ; 0x802004 - 1344: 90 93 05 20 sts 0x2005, r25 ; 0x802005 - 1348: e0 91 00 20 lds r30, 0x2000 ; 0x802000 <__data_start> - 134c: 8e 2f mov r24, r30 - 134e: 90 e0 ldi r25, 0x00 ; 0 - 1350: 88 30 cpi r24, 0x08 ; 8 - 1352: 91 05 cpc r25, r1 - 1354: 08 f0 brcs .+2 ; 0x1358 - 1356: ab c2 rjmp .+1366 ; 0x18ae - 1358: fc 01 movw r30, r24 - 135a: e2 5f subi r30, 0xF2 ; 242 - 135c: fe 4f sbci r31, 0xFE ; 254 - 135e: 0c 94 86 12 jmp 0x250c ; 0x250c <__tablejump2__> - 1362: 10 92 68 09 sts 0x0968, r1 ; 0x800968 <__TEXT_REGION_LENGTH__+0x700968> - 1366: 10 92 69 09 sts 0x0969, r1 ; 0x800969 <__TEXT_REGION_LENGTH__+0x700969> - 136a: 80 91 68 24 lds r24, 0x2468 ; 0x802468 - 136e: 80 93 c0 20 sts 0x20C0, r24 ; 0x8020c0 <__data_end> - 1372: 9d c2 rjmp .+1338 ; 0x18ae - 1374: 80 91 68 24 lds r24, 0x2468 ; 0x802468 - 1378: 80 93 24 06 sts 0x0624, r24 ; 0x800624 <__TEXT_REGION_LENGTH__+0x700624> - 137c: 98 c2 rjmp .+1328 ; 0x18ae - 137e: e0 91 68 24 lds r30, 0x2468 ; 0x802468 - 1382: f0 91 69 24 lds r31, 0x2469 ; 0x802469 - 1386: e8 30 cpi r30, 0x08 ; 8 - 1388: f1 05 cpc r31, r1 - 138a: 08 f0 brcs .+2 ; 0x138e - 138c: 21 c2 rjmp .+1090 ; 0x17d0 - 138e: ea 5e subi r30, 0xEA ; 234 - 1390: fe 4f sbci r31, 0xFE ; 254 - 1392: 0c 94 86 12 jmp 0x250c ; 0x250c <__tablejump2__> - 1396: 60 e0 ldi r22, 0x00 ; 0 - 1398: 80 e0 ldi r24, 0x00 ; 0 - 139a: 10 d8 rcall .-4064 ; 0x3bc - 139c: 80 91 6a 24 lds r24, 0x246A ; 0x80246a - 13a0: 0e 94 ab 01 call 0x356 ; 0x356 - 13a4: 79 d8 rcall .-3854 ; 0x498 - 13a6: 83 c2 rjmp .+1286 ; 0x18ae - 13a8: 60 e0 ldi r22, 0x00 ; 0 - 13aa: 80 e0 ldi r24, 0x00 ; 0 - 13ac: 07 d8 rcall .-4082 ; 0x3bc - 13ae: 80 91 6a 24 lds r24, 0x246A ; 0x80246a - 13b2: 0e 94 ab 01 call 0x356 ; 0x356 - 13b6: e8 d8 rcall .-3632 ; 0x588 - 13b8: 7a c2 rjmp .+1268 ; 0x18ae - 13ba: 61 e0 ldi r22, 0x01 ; 1 - 13bc: 81 e0 ldi r24, 0x01 ; 1 - 13be: 0e 94 de 01 call 0x3bc ; 0x3bc - 13c2: 80 91 6a 24 lds r24, 0x246A ; 0x80246a - 13c6: 0e 94 ab 01 call 0x356 ; 0x356 - 13ca: 80 91 6b 24 lds r24, 0x246B ; 0x80246b - 13ce: 0e 94 c1 01 call 0x382 ; 0x382 - 13d2: 7f d9 rcall .-3330 ; 0x6d2 - 13d4: 6c c2 rjmp .+1240 ; 0x18ae - 13d6: 1f da rcall .-3010 ; 0x816 - 13d8: 6a c2 rjmp .+1236 ; 0x18ae - 13da: b3 da rcall .-2714 ; 0x942 - 13dc: 68 c2 rjmp .+1232 ; 0x18ae - 13de: 60 e0 ldi r22, 0x00 ; 0 - 13e0: 80 e0 ldi r24, 0x00 ; 0 - 13e2: 0e 94 de 01 call 0x3bc ; 0x3bc - 13e6: 80 91 6a 24 lds r24, 0x246A ; 0x80246a - 13ea: 0e 94 ab 01 call 0x356 ; 0x356 - 13ee: 4c db rcall .-2408 ; 0xa88 - 13f0: 5e c2 rjmp .+1212 ; 0x18ae - 13f2: 61 e0 ldi r22, 0x01 ; 1 - 13f4: 80 e0 ldi r24, 0x00 ; 0 - 13f6: 0e 94 de 01 call 0x3bc ; 0x3bc - 13fa: 80 91 6a 24 lds r24, 0x246A ; 0x80246a - 13fe: 0e 94 ab 01 call 0x356 ; 0x356 - 1402: 8a db rcall .-2284 ; 0xb18 - 1404: 54 c2 rjmp .+1192 ; 0x18ae - 1406: 62 e0 ldi r22, 0x02 ; 2 - 1408: 80 e0 ldi r24, 0x00 ; 0 - 140a: 0e 94 de 01 call 0x3bc ; 0x3bc - 140e: 80 91 6a 24 lds r24, 0x246A ; 0x80246a - 1412: 80 68 ori r24, 0x80 ; 128 - 1414: 0e 94 ab 01 call 0x356 ; 0x356 - 1418: f6 db rcall .-2068 ; 0xc06 - 141a: 49 c2 rjmp .+1170 ; 0x18ae - 141c: 80 91 68 24 lds r24, 0x2468 ; 0x802468 - 1420: 80 93 84 06 sts 0x0684, r24 ; 0x800684 <__TEXT_REGION_LENGTH__+0x700684> - 1424: 44 c2 rjmp .+1160 ; 0x18ae - 1426: e9 e7 ldi r30, 0x79 ; 121 - 1428: f0 e0 ldi r31, 0x00 ; 0 - 142a: 91 e0 ldi r25, 0x01 ; 1 - 142c: 88 ed ldi r24, 0xD8 ; 216 - 142e: f8 94 cli - 1430: 84 bf out 0x34, r24 ; 52 - 1432: 90 83 st Z, r25 - 1434: 91 11 cpse r25, r1 - 1436: cc c1 rjmp .+920 ; 0x17d0 - 1438: 87 ff sbrs r24, 7 - 143a: fd c0 rjmp .+506 ; 0x1636 - 143c: 20 91 6c 24 lds r18, 0x246C ; 0x80246c - 1440: 30 91 6d 24 lds r19, 0x246D ; 0x80246d - 1444: 21 15 cp r18, r1 - 1446: 31 05 cpc r19, r1 - 1448: 09 f4 brne .+2 ; 0x144c - 144a: c2 c1 rjmp .+900 ; 0x17d0 - 144c: 8f 71 andi r24, 0x1F ; 31 - 144e: 09 f0 breq .+2 ; 0x1452 - 1450: 9f c0 rjmp .+318 ; 0x1590 - 1452: 80 91 67 24 lds r24, 0x2467 ; 0x802467 - 1456: 86 30 cpi r24, 0x06 ; 6 - 1458: 71 f0 breq .+28 ; 0x1476 - 145a: 88 30 cpi r24, 0x08 ; 8 - 145c: 09 f4 brne .+2 ; 0x1460 - 145e: 8e c0 rjmp .+284 ; 0x157c - 1460: 81 11 cpse r24, r1 - 1462: b6 c1 rjmp .+876 ; 0x17d0 - 1464: 22 30 cpi r18, 0x02 ; 2 - 1466: 31 05 cpc r19, r1 - 1468: 09 f0 breq .+2 ; 0x146c - 146a: b2 c1 rjmp .+868 ; 0x17d0 - 146c: 62 e0 ldi r22, 0x02 ; 2 - 146e: 70 e0 ldi r23, 0x00 ; 0 - 1470: 80 ed ldi r24, 0xD0 ; 208 - 1472: 90 e2 ldi r25, 0x20 ; 32 - 1474: 8b c0 rjmp .+278 ; 0x158c - 1476: 80 91 68 24 lds r24, 0x2468 ; 0x802468 - 147a: 90 91 69 24 lds r25, 0x2469 ; 0x802469 - 147e: 29 2f mov r18, r25 - 1480: 33 27 eor r19, r19 - 1482: 22 30 cpi r18, 0x02 ; 2 - 1484: 31 05 cpc r19, r1 - 1486: a1 f0 breq .+40 ; 0x14b0 - 1488: 64 f4 brge .+24 ; 0x14a2 - 148a: 21 30 cpi r18, 0x01 ; 1 - 148c: 31 05 cpc r19, r1 - 148e: 09 f0 breq .+2 ; 0x1492 - 1490: 9f c1 rjmp .+830 ; 0x17d0 - 1492: 80 91 10 20 lds r24, 0x2010 ; 0x802010 - 1496: 90 91 11 20 lds r25, 0x2011 ; 0x802011 - 149a: dc 01 movw r26, r24 - 149c: 6c 91 ld r22, X - 149e: 70 e0 ldi r23, 0x00 ; 0 - 14a0: 5b c0 rjmp .+182 ; 0x1558 - 14a2: 23 30 cpi r18, 0x03 ; 3 - 14a4: 31 05 cpc r19, r1 - 14a6: 89 f1 breq .+98 ; 0x150a - 14a8: 2f 30 cpi r18, 0x0F ; 15 - 14aa: 31 05 cpc r19, r1 - 14ac: 09 f1 breq .+66 ; 0x14f0 - 14ae: 90 c1 rjmp .+800 ; 0x17d0 - 14b0: e0 91 10 20 lds r30, 0x2010 ; 0x802010 - 14b4: f0 91 11 20 lds r31, 0x2011 ; 0x802011 - 14b8: 21 89 ldd r18, Z+17 ; 0x11 - 14ba: 82 17 cp r24, r18 - 14bc: 08 f0 brcs .+2 ; 0x14c0 - 14be: 88 c1 rjmp .+784 ; 0x17d0 - 14c0: 99 27 eor r25, r25 - 14c2: 88 0f add r24, r24 - 14c4: 99 1f adc r25, r25 - 14c6: 88 0f add r24, r24 - 14c8: 99 1f adc r25, r25 - 14ca: e0 91 12 20 lds r30, 0x2012 ; 0x802012 - 14ce: f0 91 13 20 lds r31, 0x2013 ; 0x802013 - 14d2: e8 0f add r30, r24 - 14d4: f9 1f adc r31, r25 - 14d6: 80 81 ld r24, Z - 14d8: 91 81 ldd r25, Z+1 ; 0x01 - 14da: fc 01 movw r30, r24 - 14dc: 62 81 ldd r22, Z+2 ; 0x02 - 14de: 73 81 ldd r23, Z+3 ; 0x03 - 14e0: 2d d5 rcall .+2650 ; 0x1f3c - 14e2: e0 91 6e 24 lds r30, 0x246E ; 0x80246e - 14e6: f0 91 6f 24 lds r31, 0x246F ; 0x80246f - 14ea: 82 e0 ldi r24, 0x02 ; 2 - 14ec: 81 83 std Z+1, r24 ; 0x01 - 14ee: 35 c0 rjmp .+106 ; 0x155a - 14f0: 80 91 14 20 lds r24, 0x2014 ; 0x802014 - 14f4: 90 91 15 20 lds r25, 0x2015 ; 0x802015 - 14f8: 00 97 sbiw r24, 0x00 ; 0 - 14fa: 09 f4 brne .+2 ; 0x14fe - 14fc: 69 c1 rjmp .+722 ; 0x17d0 - 14fe: dc 01 movw r26, r24 - 1500: 12 96 adiw r26, 0x02 ; 2 - 1502: 6d 91 ld r22, X+ - 1504: 7c 91 ld r23, X - 1506: 13 97 sbiw r26, 0x03 ; 3 - 1508: 27 c0 rjmp .+78 ; 0x1558 - 150a: 99 27 eor r25, r25 - 150c: 81 30 cpi r24, 0x01 ; 1 - 150e: 91 05 cpc r25, r1 - 1510: 69 f0 breq .+26 ; 0x152c - 1512: 38 f0 brcs .+14 ; 0x1522 - 1514: 02 97 sbiw r24, 0x02 ; 2 - 1516: 09 f0 breq .+2 ; 0x151a - 1518: 5b c1 rjmp .+694 ; 0x17d0 - 151a: 68 e1 ldi r22, 0x18 ; 24 - 151c: 8a e8 ldi r24, 0x8A ; 138 - 151e: 90 e2 ldi r25, 0x20 ; 32 - 1520: 08 c0 rjmp .+16 ; 0x1532 - 1522: 64 e0 ldi r22, 0x04 ; 4 - 1524: 70 e0 ldi r23, 0x00 ; 0 - 1526: 8e ea ldi r24, 0xAE ; 174 - 1528: 90 e2 ldi r25, 0x20 ; 32 - 152a: 16 c0 rjmp .+44 ; 0x1558 - 152c: 69 e0 ldi r22, 0x09 ; 9 - 152e: 83 ea ldi r24, 0xA3 ; 163 - 1530: 90 e2 ldi r25, 0x20 ; 32 - 1532: 28 2f mov r18, r24 - 1534: aa e5 ldi r26, 0x5A ; 90 - 1536: b0 e2 ldi r27, 0x20 ; 32 - 1538: fc 01 movw r30, r24 - 153a: 81 91 ld r24, Z+ - 153c: 90 e0 ldi r25, 0x00 ; 0 - 153e: 8d 93 st X+, r24 - 1540: 9d 93 st X+, r25 - 1542: 8e 2f mov r24, r30 - 1544: 82 1b sub r24, r18 - 1546: 86 17 cp r24, r22 - 1548: c0 f3 brcs .-16 ; 0x153a - 154a: 66 0f add r22, r22 - 154c: 6e 5f subi r22, 0xFE ; 254 - 154e: 60 93 58 20 sts 0x2058, r22 ; 0x802058 - 1552: 70 e0 ldi r23, 0x00 ; 0 - 1554: 88 e5 ldi r24, 0x58 ; 88 - 1556: 90 e2 ldi r25, 0x20 ; 32 - 1558: f1 d4 rcall .+2530 ; 0x1f3c - 155a: 80 91 6c 24 lds r24, 0x246C ; 0x80246c - 155e: 90 91 6d 24 lds r25, 0x246D ; 0x80246d - 1562: 20 91 70 24 lds r18, 0x2470 ; 0x802470 - 1566: 30 91 71 24 lds r19, 0x2471 ; 0x802471 - 156a: 82 17 cp r24, r18 - 156c: 93 07 cpc r25, r19 - 156e: 08 f0 brcs .+2 ; 0x1572 - 1570: 9e c1 rjmp .+828 ; 0x18ae - 1572: 80 93 70 24 sts 0x2470, r24 ; 0x802470 - 1576: 90 93 71 24 sts 0x2471, r25 ; 0x802471 - 157a: 99 c1 rjmp .+818 ; 0x18ae - 157c: 21 30 cpi r18, 0x01 ; 1 - 157e: 31 05 cpc r19, r1 - 1580: 09 f0 breq .+2 ; 0x1584 - 1582: 26 c1 rjmp .+588 ; 0x17d0 - 1584: 61 e0 ldi r22, 0x01 ; 1 - 1586: 70 e0 ldi r23, 0x00 ; 0 - 1588: 8c ec ldi r24, 0xCC ; 204 - 158a: 90 e2 ldi r25, 0x20 ; 32 - 158c: d7 d4 rcall .+2478 ; 0x1f3c - 158e: 8f c1 rjmp .+798 ; 0x18ae - 1590: 81 30 cpi r24, 0x01 ; 1 - 1592: c9 f5 brne .+114 ; 0x1606 - 1594: 80 91 67 24 lds r24, 0x2467 ; 0x802467 - 1598: 8a 30 cpi r24, 0x0A ; 10 - 159a: 09 f0 breq .+2 ; 0x159e - 159c: 19 c1 rjmp .+562 ; 0x17d0 - 159e: 21 30 cpi r18, 0x01 ; 1 - 15a0: 31 05 cpc r19, r1 - 15a2: 09 f0 breq .+2 ; 0x15a6 - 15a4: 15 c1 rjmp .+554 ; 0x17d0 - 15a6: 80 91 cc 20 lds r24, 0x20CC ; 0x8020cc - 15aa: 88 23 and r24, r24 - 15ac: 09 f4 brne .+2 ; 0x15b0 - 15ae: 10 c1 rjmp .+544 ; 0x17d0 - 15b0: e0 90 6a 24 lds r14, 0x246A ; 0x80246a - 15b4: f0 90 6b 24 lds r15, 0x246B ; 0x80246b - 15b8: 00 91 c9 20 lds r16, 0x20C9 ; 0x8020c9 - 15bc: 10 91 ca 20 lds r17, 0x20CA ; 0x8020ca - 15c0: d8 01 movw r26, r16 - 15c2: ed 91 ld r30, X+ - 15c4: fc 91 ld r31, X - 15c6: 84 81 ldd r24, Z+4 ; 0x04 - 15c8: e8 16 cp r14, r24 - 15ca: 08 f0 brcs .+2 ; 0x15ce - 15cc: 01 c1 rjmp .+514 ; 0x17d0 - 15ce: 60 e0 ldi r22, 0x00 ; 0 - 15d0: 8e 2d mov r24, r14 - 15d2: 38 dd rcall .-1424 ; 0x1044 - 15d4: 88 23 and r24, r24 - 15d6: 09 f4 brne .+2 ; 0x15da - 15d8: fb c0 rjmp .+502 ; 0x17d0 - 15da: ff 24 eor r15, r15 - 15dc: ee 0c add r14, r14 - 15de: ff 1c adc r15, r15 - 15e0: f8 01 movw r30, r16 - 15e2: 82 81 ldd r24, Z+2 ; 0x02 - 15e4: 93 81 ldd r25, Z+3 ; 0x03 - 15e6: 8e 0d add r24, r14 - 15e8: 9f 1d adc r25, r15 - 15ea: dc 01 movw r26, r24 - 15ec: ed 91 ld r30, X+ - 15ee: fc 91 ld r31, X - 15f0: 06 80 ldd r0, Z+6 ; 0x06 - 15f2: f7 81 ldd r31, Z+7 ; 0x07 - 15f4: e0 2d mov r30, r0 - 15f6: 09 95 icall - 15f8: 80 93 ce 20 sts 0x20CE, r24 ; 0x8020ce - 15fc: 61 e0 ldi r22, 0x01 ; 1 - 15fe: 70 e0 ldi r23, 0x00 ; 0 - 1600: 8e ec ldi r24, 0xCE ; 206 - 1602: 90 e2 ldi r25, 0x20 ; 32 - 1604: c3 cf rjmp .-122 ; 0x158c - 1606: 82 30 cpi r24, 0x02 ; 2 - 1608: 09 f0 breq .+2 ; 0x160c - 160a: e2 c0 rjmp .+452 ; 0x17d0 - 160c: 80 91 67 24 lds r24, 0x2467 ; 0x802467 - 1610: 81 11 cpse r24, r1 - 1612: de c0 rjmp .+444 ; 0x17d0 - 1614: 22 30 cpi r18, 0x02 ; 2 - 1616: 31 05 cpc r19, r1 - 1618: 09 f0 breq .+2 ; 0x161c - 161a: da c0 rjmp .+436 ; 0x17d0 - 161c: 80 91 6a 24 lds r24, 0x246A ; 0x80246a - 1620: e5 d4 rcall .+2506 ; 0x1fec - 1622: 90 e0 ldi r25, 0x00 ; 0 - 1624: 80 93 c5 20 sts 0x20C5, r24 ; 0x8020c5 - 1628: 90 93 c6 20 sts 0x20C6, r25 ; 0x8020c6 - 162c: 62 e0 ldi r22, 0x02 ; 2 - 162e: 70 e0 ldi r23, 0x00 ; 0 - 1630: 85 ec ldi r24, 0xC5 ; 197 - 1632: 90 e2 ldi r25, 0x20 ; 32 - 1634: ab cf rjmp .-170 ; 0x158c - 1636: 8f 71 andi r24, 0x1F ; 31 - 1638: 09 f0 breq .+2 ; 0x163c - 163a: 7d c0 rjmp .+250 ; 0x1736 - 163c: 80 91 67 24 lds r24, 0x2467 ; 0x802467 - 1640: 83 30 cpi r24, 0x03 ; 3 - 1642: 09 f4 brne .+2 ; 0x1646 - 1644: c5 c0 rjmp .+394 ; 0x17d0 - 1646: 18 f4 brcc .+6 ; 0x164e - 1648: 81 30 cpi r24, 0x01 ; 1 - 164a: a1 f0 breq .+40 ; 0x1674 - 164c: c1 c0 rjmp .+386 ; 0x17d0 - 164e: 85 30 cpi r24, 0x05 ; 5 - 1650: 19 f0 breq .+6 ; 0x1658 - 1652: 89 30 cpi r24, 0x09 ; 9 - 1654: 39 f1 breq .+78 ; 0x16a4 - 1656: bc c0 rjmp .+376 ; 0x17d0 - 1658: 80 91 6c 24 lds r24, 0x246C ; 0x80246c - 165c: 90 91 6d 24 lds r25, 0x246D ; 0x80246d +00001240 : + 1240: ef 92 push r14 + 1242: ff 92 push r15 + 1244: 0f 93 push r16 + 1246: 1f 93 push r17 + 1248: cf 93 push r28 + 124a: df 93 push r29 + 124c: 1f 92 push r1 + 124e: cd b7 in r28, 0x3d ; 61 + 1250: de b7 in r29, 0x3e ; 62 + 1252: 10 92 74 24 sts 0x2474, r1 ; 0x802474 + 1256: 10 92 75 24 sts 0x2475, r1 ; 0x802475 + 125a: 10 92 76 24 sts 0x2476, r1 ; 0x802476 + 125e: 10 92 77 24 sts 0x2477, r1 ; 0x802477 + 1262: 10 92 78 24 sts 0x2478, r1 ; 0x802478 + 1266: 10 92 79 24 sts 0x2479, r1 ; 0x802479 + 126a: 80 91 6a 24 lds r24, 0x246A ; 0x80246a + 126e: 87 ff sbrs r24, 7 + 1270: 07 c0 rjmp .+14 ; 0x1280 + 1272: 20 91 70 24 lds r18, 0x2470 ; 0x802470 + 1276: 30 91 71 24 lds r19, 0x2471 ; 0x802471 + 127a: 23 2b or r18, r19 + 127c: 09 f4 brne .+2 ; 0x1280 + 127e: 0b c3 rjmp .+1558 ; 0x1896 + 1280: 98 2f mov r25, r24 + 1282: 90 76 andi r25, 0x60 ; 96 + 1284: 90 34 cpi r25, 0x40 ; 64 + 1286: 09 f0 breq .+2 ; 0x128a + 1288: c7 c0 rjmp .+398 ; 0x1418 + 128a: e0 91 6b 24 lds r30, 0x246B ; 0x80246b + 128e: 8e 2f mov r24, r30 + 1290: 90 e0 ldi r25, 0x00 ; 0 + 1292: fc 01 movw r30, r24 + 1294: e0 5a subi r30, 0xA0 ; 160 + 1296: f1 09 sbc r31, r1 + 1298: e8 30 cpi r30, 0x08 ; 8 + 129a: f1 05 cpc r31, r1 + 129c: 08 f0 brcs .+2 ; 0x12a0 + 129e: 8a c2 rjmp .+1300 ; 0x17b4 + 12a0: ea 5f subi r30, 0xFA ; 250 + 12a2: fe 4f sbci r31, 0xFE ; 254 + 12a4: 0c 94 78 12 jmp 0x24f0 ; 0x24f0 <__tablejump2__> + 12a8: 00 00 nop + 12aa: f3 c2 rjmp .+1510 ; 0x1892 + 12ac: 10 92 00 08 sts 0x0800, r1 ; 0x800800 <__TEXT_REGION_LENGTH__+0x700800> + 12b0: 80 91 6c 24 lds r24, 0x246C ; 0x80246c + 12b4: 90 91 6d 24 lds r25, 0x246D ; 0x80246d + 12b8: 80 93 36 08 sts 0x0836, r24 ; 0x800836 <__TEXT_REGION_LENGTH__+0x700836> + 12bc: 90 93 37 08 sts 0x0837, r25 ; 0x800837 <__TEXT_REGION_LENGTH__+0x700837> + 12c0: 80 91 6e 24 lds r24, 0x246E ; 0x80246e + 12c4: 8f 70 andi r24, 0x0F ; 15 + 12c6: 80 93 00 08 sts 0x0800, r24 ; 0x800800 <__TEXT_REGION_LENGTH__+0x700800> + 12ca: 60 91 70 24 lds r22, 0x2470 ; 0x802470 + 12ce: 70 91 71 24 lds r23, 0x2471 ; 0x802471 + 12d2: 8a e6 ldi r24, 0x6A ; 106 + 12d4: 92 e2 ldi r25, 0x22 ; 34 + 12d6: 19 c0 rjmp .+50 ; 0x130a + 12d8: 10 92 40 08 sts 0x0840, r1 ; 0x800840 <__TEXT_REGION_LENGTH__+0x700840> + 12dc: 60 91 70 24 lds r22, 0x2470 ; 0x802470 + 12e0: 70 91 71 24 lds r23, 0x2471 ; 0x802471 + 12e4: 60 93 02 20 sts 0x2002, r22 ; 0x802002 + 12e8: 70 93 03 20 sts 0x2003, r23 ; 0x802003 + 12ec: 80 91 6c 24 lds r24, 0x246C ; 0x80246c + 12f0: 90 91 6d 24 lds r25, 0x246D ; 0x80246d + 12f4: 80 93 76 08 sts 0x0876, r24 ; 0x800876 <__TEXT_REGION_LENGTH__+0x700876> + 12f8: 90 93 77 08 sts 0x0877, r25 ; 0x800877 <__TEXT_REGION_LENGTH__+0x700877> + 12fc: 80 91 6e 24 lds r24, 0x246E ; 0x80246e + 1300: 8f 70 andi r24, 0x0F ; 15 + 1302: 80 93 40 08 sts 0x0840, r24 ; 0x800840 <__TEXT_REGION_LENGTH__+0x700840> + 1306: 8a e7 ldi r24, 0x7A ; 122 + 1308: 94 e2 ldi r25, 0x24 ; 36 + 130a: 0a d6 rcall .+3092 ; 0x1f20 + 130c: 20 91 04 20 lds r18, 0x2004 ; 0x802004 + 1310: 30 91 05 20 lds r19, 0x2005 ; 0x802005 + 1314: 80 91 70 24 lds r24, 0x2470 ; 0x802470 + 1318: 90 91 71 24 lds r25, 0x2471 ; 0x802471 + 131c: 28 17 cp r18, r24 + 131e: 39 07 cpc r19, r25 + 1320: 09 f4 brne .+2 ; 0x1324 + 1322: b7 c2 rjmp .+1390 ; 0x1892 + 1324: 80 93 04 20 sts 0x2004, r24 ; 0x802004 + 1328: 90 93 05 20 sts 0x2005, r25 ; 0x802005 + 132c: e0 91 00 20 lds r30, 0x2000 ; 0x802000 <__data_start> + 1330: 8e 2f mov r24, r30 + 1332: 90 e0 ldi r25, 0x00 ; 0 + 1334: 88 30 cpi r24, 0x08 ; 8 + 1336: 91 05 cpc r25, r1 + 1338: 08 f0 brcs .+2 ; 0x133c + 133a: ab c2 rjmp .+1366 ; 0x1892 + 133c: fc 01 movw r30, r24 + 133e: e2 5f subi r30, 0xF2 ; 242 + 1340: fe 4f sbci r31, 0xFE ; 254 + 1342: 0c 94 78 12 jmp 0x24f0 ; 0x24f0 <__tablejump2__> + 1346: 10 92 68 09 sts 0x0968, r1 ; 0x800968 <__TEXT_REGION_LENGTH__+0x700968> + 134a: 10 92 69 09 sts 0x0969, r1 ; 0x800969 <__TEXT_REGION_LENGTH__+0x700969> + 134e: 80 91 6c 24 lds r24, 0x246C ; 0x80246c + 1352: 80 93 c0 20 sts 0x20C0, r24 ; 0x8020c0 <__data_end> + 1356: 9d c2 rjmp .+1338 ; 0x1892 + 1358: 80 91 6c 24 lds r24, 0x246C ; 0x80246c + 135c: 80 93 24 06 sts 0x0624, r24 ; 0x800624 <__TEXT_REGION_LENGTH__+0x700624> + 1360: 98 c2 rjmp .+1328 ; 0x1892 + 1362: e0 91 6c 24 lds r30, 0x246C ; 0x80246c + 1366: f0 91 6d 24 lds r31, 0x246D ; 0x80246d + 136a: e8 30 cpi r30, 0x08 ; 8 + 136c: f1 05 cpc r31, r1 + 136e: 08 f0 brcs .+2 ; 0x1372 + 1370: 21 c2 rjmp .+1090 ; 0x17b4 + 1372: ea 5e subi r30, 0xEA ; 234 + 1374: fe 4f sbci r31, 0xFE ; 254 + 1376: 0c 94 78 12 jmp 0x24f0 ; 0x24f0 <__tablejump2__> + 137a: 60 e0 ldi r22, 0x00 ; 0 + 137c: 80 e0 ldi r24, 0x00 ; 0 + 137e: 10 d8 rcall .-4064 ; 0x3a0 + 1380: 80 91 6e 24 lds r24, 0x246E ; 0x80246e + 1384: 0e 94 9d 01 call 0x33a ; 0x33a + 1388: 79 d8 rcall .-3854 ; 0x47c + 138a: 83 c2 rjmp .+1286 ; 0x1892 + 138c: 60 e0 ldi r22, 0x00 ; 0 + 138e: 80 e0 ldi r24, 0x00 ; 0 + 1390: 07 d8 rcall .-4082 ; 0x3a0 + 1392: 80 91 6e 24 lds r24, 0x246E ; 0x80246e + 1396: 0e 94 9d 01 call 0x33a ; 0x33a + 139a: e8 d8 rcall .-3632 ; 0x56c + 139c: 7a c2 rjmp .+1268 ; 0x1892 + 139e: 61 e0 ldi r22, 0x01 ; 1 + 13a0: 81 e0 ldi r24, 0x01 ; 1 + 13a2: 0e 94 d0 01 call 0x3a0 ; 0x3a0 + 13a6: 80 91 6e 24 lds r24, 0x246E ; 0x80246e + 13aa: 0e 94 9d 01 call 0x33a ; 0x33a + 13ae: 80 91 6f 24 lds r24, 0x246F ; 0x80246f + 13b2: 0e 94 b3 01 call 0x366 ; 0x366 + 13b6: 7f d9 rcall .-3330 ; 0x6b6 + 13b8: 6c c2 rjmp .+1240 ; 0x1892 + 13ba: 1f da rcall .-3010 ; 0x7fa + 13bc: 6a c2 rjmp .+1236 ; 0x1892 + 13be: b3 da rcall .-2714 ; 0x926 + 13c0: 68 c2 rjmp .+1232 ; 0x1892 + 13c2: 60 e0 ldi r22, 0x00 ; 0 + 13c4: 80 e0 ldi r24, 0x00 ; 0 + 13c6: 0e 94 d0 01 call 0x3a0 ; 0x3a0 + 13ca: 80 91 6e 24 lds r24, 0x246E ; 0x80246e + 13ce: 0e 94 9d 01 call 0x33a ; 0x33a + 13d2: 4c db rcall .-2408 ; 0xa6c + 13d4: 5e c2 rjmp .+1212 ; 0x1892 + 13d6: 61 e0 ldi r22, 0x01 ; 1 + 13d8: 80 e0 ldi r24, 0x00 ; 0 + 13da: 0e 94 d0 01 call 0x3a0 ; 0x3a0 + 13de: 80 91 6e 24 lds r24, 0x246E ; 0x80246e + 13e2: 0e 94 9d 01 call 0x33a ; 0x33a + 13e6: 8a db rcall .-2284 ; 0xafc + 13e8: 54 c2 rjmp .+1192 ; 0x1892 + 13ea: 62 e0 ldi r22, 0x02 ; 2 + 13ec: 80 e0 ldi r24, 0x00 ; 0 + 13ee: 0e 94 d0 01 call 0x3a0 ; 0x3a0 + 13f2: 80 91 6e 24 lds r24, 0x246E ; 0x80246e + 13f6: 80 68 ori r24, 0x80 ; 128 + 13f8: 0e 94 9d 01 call 0x33a ; 0x33a + 13fc: f6 db rcall .-2068 ; 0xbea + 13fe: 49 c2 rjmp .+1170 ; 0x1892 + 1400: 80 91 6c 24 lds r24, 0x246C ; 0x80246c + 1404: 80 93 84 06 sts 0x0684, r24 ; 0x800684 <__TEXT_REGION_LENGTH__+0x700684> + 1408: 44 c2 rjmp .+1160 ; 0x1892 + 140a: e9 e7 ldi r30, 0x79 ; 121 + 140c: f0 e0 ldi r31, 0x00 ; 0 + 140e: 91 e0 ldi r25, 0x01 ; 1 + 1410: 88 ed ldi r24, 0xD8 ; 216 + 1412: f8 94 cli + 1414: 84 bf out 0x34, r24 ; 52 + 1416: 90 83 st Z, r25 + 1418: 91 11 cpse r25, r1 + 141a: cc c1 rjmp .+920 ; 0x17b4 + 141c: 87 ff sbrs r24, 7 + 141e: fd c0 rjmp .+506 ; 0x161a + 1420: 20 91 70 24 lds r18, 0x2470 ; 0x802470 + 1424: 30 91 71 24 lds r19, 0x2471 ; 0x802471 + 1428: 21 15 cp r18, r1 + 142a: 31 05 cpc r19, r1 + 142c: 09 f4 brne .+2 ; 0x1430 + 142e: c2 c1 rjmp .+900 ; 0x17b4 + 1430: 8f 71 andi r24, 0x1F ; 31 + 1432: 09 f0 breq .+2 ; 0x1436 + 1434: 9f c0 rjmp .+318 ; 0x1574 + 1436: 80 91 6b 24 lds r24, 0x246B ; 0x80246b + 143a: 86 30 cpi r24, 0x06 ; 6 + 143c: 71 f0 breq .+28 ; 0x145a + 143e: 88 30 cpi r24, 0x08 ; 8 + 1440: 09 f4 brne .+2 ; 0x1444 + 1442: 8e c0 rjmp .+284 ; 0x1560 + 1444: 81 11 cpse r24, r1 + 1446: b6 c1 rjmp .+876 ; 0x17b4 + 1448: 22 30 cpi r18, 0x02 ; 2 + 144a: 31 05 cpc r19, r1 + 144c: 09 f0 breq .+2 ; 0x1450 + 144e: b2 c1 rjmp .+868 ; 0x17b4 + 1450: 62 e0 ldi r22, 0x02 ; 2 + 1452: 70 e0 ldi r23, 0x00 ; 0 + 1454: 80 ed ldi r24, 0xD0 ; 208 + 1456: 90 e2 ldi r25, 0x20 ; 32 + 1458: 8b c0 rjmp .+278 ; 0x1570 + 145a: 80 91 6c 24 lds r24, 0x246C ; 0x80246c + 145e: 90 91 6d 24 lds r25, 0x246D ; 0x80246d + 1462: 29 2f mov r18, r25 + 1464: 33 27 eor r19, r19 + 1466: 22 30 cpi r18, 0x02 ; 2 + 1468: 31 05 cpc r19, r1 + 146a: a1 f0 breq .+40 ; 0x1494 + 146c: 64 f4 brge .+24 ; 0x1486 + 146e: 21 30 cpi r18, 0x01 ; 1 + 1470: 31 05 cpc r19, r1 + 1472: 09 f0 breq .+2 ; 0x1476 + 1474: 9f c1 rjmp .+830 ; 0x17b4 + 1476: 80 91 10 20 lds r24, 0x2010 ; 0x802010 + 147a: 90 91 11 20 lds r25, 0x2011 ; 0x802011 + 147e: dc 01 movw r26, r24 + 1480: 6c 91 ld r22, X + 1482: 70 e0 ldi r23, 0x00 ; 0 + 1484: 5b c0 rjmp .+182 ; 0x153c + 1486: 23 30 cpi r18, 0x03 ; 3 + 1488: 31 05 cpc r19, r1 + 148a: 89 f1 breq .+98 ; 0x14ee + 148c: 2f 30 cpi r18, 0x0F ; 15 + 148e: 31 05 cpc r19, r1 + 1490: 09 f1 breq .+66 ; 0x14d4 + 1492: 90 c1 rjmp .+800 ; 0x17b4 + 1494: e0 91 10 20 lds r30, 0x2010 ; 0x802010 + 1498: f0 91 11 20 lds r31, 0x2011 ; 0x802011 + 149c: 21 89 ldd r18, Z+17 ; 0x11 + 149e: 82 17 cp r24, r18 + 14a0: 08 f0 brcs .+2 ; 0x14a4 + 14a2: 88 c1 rjmp .+784 ; 0x17b4 + 14a4: 99 27 eor r25, r25 + 14a6: 88 0f add r24, r24 + 14a8: 99 1f adc r25, r25 + 14aa: 88 0f add r24, r24 + 14ac: 99 1f adc r25, r25 + 14ae: e0 91 12 20 lds r30, 0x2012 ; 0x802012 + 14b2: f0 91 13 20 lds r31, 0x2013 ; 0x802013 + 14b6: e8 0f add r30, r24 + 14b8: f9 1f adc r31, r25 + 14ba: 80 81 ld r24, Z + 14bc: 91 81 ldd r25, Z+1 ; 0x01 + 14be: fc 01 movw r30, r24 + 14c0: 62 81 ldd r22, Z+2 ; 0x02 + 14c2: 73 81 ldd r23, Z+3 ; 0x03 + 14c4: 2d d5 rcall .+2650 ; 0x1f20 + 14c6: e0 91 72 24 lds r30, 0x2472 ; 0x802472 + 14ca: f0 91 73 24 lds r31, 0x2473 ; 0x802473 + 14ce: 82 e0 ldi r24, 0x02 ; 2 + 14d0: 81 83 std Z+1, r24 ; 0x01 + 14d2: 35 c0 rjmp .+106 ; 0x153e + 14d4: 80 91 14 20 lds r24, 0x2014 ; 0x802014 + 14d8: 90 91 15 20 lds r25, 0x2015 ; 0x802015 + 14dc: 00 97 sbiw r24, 0x00 ; 0 + 14de: 09 f4 brne .+2 ; 0x14e2 + 14e0: 69 c1 rjmp .+722 ; 0x17b4 + 14e2: dc 01 movw r26, r24 + 14e4: 12 96 adiw r26, 0x02 ; 2 + 14e6: 6d 91 ld r22, X+ + 14e8: 7c 91 ld r23, X + 14ea: 13 97 sbiw r26, 0x03 ; 3 + 14ec: 27 c0 rjmp .+78 ; 0x153c + 14ee: 99 27 eor r25, r25 + 14f0: 81 30 cpi r24, 0x01 ; 1 + 14f2: 91 05 cpc r25, r1 + 14f4: 69 f0 breq .+26 ; 0x1510 + 14f6: 38 f0 brcs .+14 ; 0x1506 + 14f8: 02 97 sbiw r24, 0x02 ; 2 + 14fa: 09 f0 breq .+2 ; 0x14fe + 14fc: 5b c1 rjmp .+694 ; 0x17b4 + 14fe: 68 e1 ldi r22, 0x18 ; 24 + 1500: 8a e8 ldi r24, 0x8A ; 138 + 1502: 90 e2 ldi r25, 0x20 ; 32 + 1504: 08 c0 rjmp .+16 ; 0x1516 + 1506: 64 e0 ldi r22, 0x04 ; 4 + 1508: 70 e0 ldi r23, 0x00 ; 0 + 150a: 8e ea ldi r24, 0xAE ; 174 + 150c: 90 e2 ldi r25, 0x20 ; 32 + 150e: 16 c0 rjmp .+44 ; 0x153c + 1510: 69 e0 ldi r22, 0x09 ; 9 + 1512: 83 ea ldi r24, 0xA3 ; 163 + 1514: 90 e2 ldi r25, 0x20 ; 32 + 1516: 28 2f mov r18, r24 + 1518: aa e5 ldi r26, 0x5A ; 90 + 151a: b0 e2 ldi r27, 0x20 ; 32 + 151c: fc 01 movw r30, r24 + 151e: 81 91 ld r24, Z+ + 1520: 90 e0 ldi r25, 0x00 ; 0 + 1522: 8d 93 st X+, r24 + 1524: 9d 93 st X+, r25 + 1526: 8e 2f mov r24, r30 + 1528: 82 1b sub r24, r18 + 152a: 86 17 cp r24, r22 + 152c: c0 f3 brcs .-16 ; 0x151e + 152e: 66 0f add r22, r22 + 1530: 6e 5f subi r22, 0xFE ; 254 + 1532: 60 93 58 20 sts 0x2058, r22 ; 0x802058 + 1536: 70 e0 ldi r23, 0x00 ; 0 + 1538: 88 e5 ldi r24, 0x58 ; 88 + 153a: 90 e2 ldi r25, 0x20 ; 32 + 153c: f1 d4 rcall .+2530 ; 0x1f20 + 153e: 80 91 70 24 lds r24, 0x2470 ; 0x802470 + 1542: 90 91 71 24 lds r25, 0x2471 ; 0x802471 + 1546: 20 91 74 24 lds r18, 0x2474 ; 0x802474 + 154a: 30 91 75 24 lds r19, 0x2475 ; 0x802475 + 154e: 82 17 cp r24, r18 + 1550: 93 07 cpc r25, r19 + 1552: 08 f0 brcs .+2 ; 0x1556 + 1554: 9e c1 rjmp .+828 ; 0x1892 + 1556: 80 93 74 24 sts 0x2474, r24 ; 0x802474 + 155a: 90 93 75 24 sts 0x2475, r25 ; 0x802475 + 155e: 99 c1 rjmp .+818 ; 0x1892 + 1560: 21 30 cpi r18, 0x01 ; 1 + 1562: 31 05 cpc r19, r1 + 1564: 09 f0 breq .+2 ; 0x1568 + 1566: 26 c1 rjmp .+588 ; 0x17b4 + 1568: 61 e0 ldi r22, 0x01 ; 1 + 156a: 70 e0 ldi r23, 0x00 ; 0 + 156c: 8c ec ldi r24, 0xCC ; 204 + 156e: 90 e2 ldi r25, 0x20 ; 32 + 1570: d7 d4 rcall .+2478 ; 0x1f20 + 1572: 8f c1 rjmp .+798 ; 0x1892 + 1574: 81 30 cpi r24, 0x01 ; 1 + 1576: c9 f5 brne .+114 ; 0x15ea + 1578: 80 91 6b 24 lds r24, 0x246B ; 0x80246b + 157c: 8a 30 cpi r24, 0x0A ; 10 + 157e: 09 f0 breq .+2 ; 0x1582 + 1580: 19 c1 rjmp .+562 ; 0x17b4 + 1582: 21 30 cpi r18, 0x01 ; 1 + 1584: 31 05 cpc r19, r1 + 1586: 09 f0 breq .+2 ; 0x158a + 1588: 15 c1 rjmp .+554 ; 0x17b4 + 158a: 80 91 cc 20 lds r24, 0x20CC ; 0x8020cc + 158e: 88 23 and r24, r24 + 1590: 09 f4 brne .+2 ; 0x1594 + 1592: 10 c1 rjmp .+544 ; 0x17b4 + 1594: e0 90 6e 24 lds r14, 0x246E ; 0x80246e + 1598: f0 90 6f 24 lds r15, 0x246F ; 0x80246f + 159c: 00 91 c9 20 lds r16, 0x20C9 ; 0x8020c9 + 15a0: 10 91 ca 20 lds r17, 0x20CA ; 0x8020ca + 15a4: d8 01 movw r26, r16 + 15a6: ed 91 ld r30, X+ + 15a8: fc 91 ld r31, X + 15aa: 84 81 ldd r24, Z+4 ; 0x04 + 15ac: e8 16 cp r14, r24 + 15ae: 08 f0 brcs .+2 ; 0x15b2 + 15b0: 01 c1 rjmp .+514 ; 0x17b4 + 15b2: 60 e0 ldi r22, 0x00 ; 0 + 15b4: 8e 2d mov r24, r14 + 15b6: 38 dd rcall .-1424 ; 0x1028 + 15b8: 88 23 and r24, r24 + 15ba: 09 f4 brne .+2 ; 0x15be + 15bc: fb c0 rjmp .+502 ; 0x17b4 + 15be: ff 24 eor r15, r15 + 15c0: ee 0c add r14, r14 + 15c2: ff 1c adc r15, r15 + 15c4: f8 01 movw r30, r16 + 15c6: 82 81 ldd r24, Z+2 ; 0x02 + 15c8: 93 81 ldd r25, Z+3 ; 0x03 + 15ca: 8e 0d add r24, r14 + 15cc: 9f 1d adc r25, r15 + 15ce: dc 01 movw r26, r24 + 15d0: ed 91 ld r30, X+ + 15d2: fc 91 ld r31, X + 15d4: 06 80 ldd r0, Z+6 ; 0x06 + 15d6: f7 81 ldd r31, Z+7 ; 0x07 + 15d8: e0 2d mov r30, r0 + 15da: 09 95 icall + 15dc: 80 93 ce 20 sts 0x20CE, r24 ; 0x8020ce + 15e0: 61 e0 ldi r22, 0x01 ; 1 + 15e2: 70 e0 ldi r23, 0x00 ; 0 + 15e4: 8e ec ldi r24, 0xCE ; 206 + 15e6: 90 e2 ldi r25, 0x20 ; 32 + 15e8: c3 cf rjmp .-122 ; 0x1570 + 15ea: 82 30 cpi r24, 0x02 ; 2 + 15ec: 09 f0 breq .+2 ; 0x15f0 + 15ee: e2 c0 rjmp .+452 ; 0x17b4 + 15f0: 80 91 6b 24 lds r24, 0x246B ; 0x80246b + 15f4: 81 11 cpse r24, r1 + 15f6: de c0 rjmp .+444 ; 0x17b4 + 15f8: 22 30 cpi r18, 0x02 ; 2 + 15fa: 31 05 cpc r19, r1 + 15fc: 09 f0 breq .+2 ; 0x1600 + 15fe: da c0 rjmp .+436 ; 0x17b4 + 1600: 80 91 6e 24 lds r24, 0x246E ; 0x80246e + 1604: e5 d4 rcall .+2506 ; 0x1fd0 + 1606: 90 e0 ldi r25, 0x00 ; 0 + 1608: 80 93 c5 20 sts 0x20C5, r24 ; 0x8020c5 + 160c: 90 93 c6 20 sts 0x20C6, r25 ; 0x8020c6 + 1610: 62 e0 ldi r22, 0x02 ; 2 + 1612: 70 e0 ldi r23, 0x00 ; 0 + 1614: 85 ec ldi r24, 0xC5 ; 197 + 1616: 90 e2 ldi r25, 0x20 ; 32 + 1618: ab cf rjmp .-170 ; 0x1570 + 161a: 8f 71 andi r24, 0x1F ; 31 + 161c: 09 f0 breq .+2 ; 0x1620 + 161e: 7d c0 rjmp .+250 ; 0x171a + 1620: 80 91 6b 24 lds r24, 0x246B ; 0x80246b + 1624: 83 30 cpi r24, 0x03 ; 3 + 1626: 09 f4 brne .+2 ; 0x162a + 1628: c5 c0 rjmp .+394 ; 0x17b4 + 162a: 18 f4 brcc .+6 ; 0x1632 + 162c: 81 30 cpi r24, 0x01 ; 1 + 162e: a1 f0 breq .+40 ; 0x1658 + 1630: c1 c0 rjmp .+386 ; 0x17b4 + 1632: 85 30 cpi r24, 0x05 ; 5 + 1634: 19 f0 breq .+6 ; 0x163c + 1636: 89 30 cpi r24, 0x09 ; 9 + 1638: 39 f1 breq .+78 ; 0x1688 + 163a: bc c0 rjmp .+376 ; 0x17b4 + 163c: 80 91 70 24 lds r24, 0x2470 ; 0x802470 + 1640: 90 91 71 24 lds r25, 0x2471 ; 0x802471 + 1644: 89 2b or r24, r25 + 1646: 09 f0 breq .+2 ; 0x164a + 1648: b5 c0 rjmp .+362 ; 0x17b4 + 164a: 80 e1 ldi r24, 0x10 ; 16 + 164c: 98 e0 ldi r25, 0x08 ; 8 + 164e: 80 93 76 24 sts 0x2476, r24 ; 0x802476 + 1652: 90 93 77 24 sts 0x2477, r25 ; 0x802477 + 1656: 1d c1 rjmp .+570 ; 0x1892 + 1658: 80 91 70 24 lds r24, 0x2470 ; 0x802470 + 165c: 90 91 71 24 lds r25, 0x2471 ; 0x802471 1660: 89 2b or r24, r25 - 1662: 09 f0 breq .+2 ; 0x1666 - 1664: b5 c0 rjmp .+362 ; 0x17d0 - 1666: 8e e1 ldi r24, 0x1E ; 30 - 1668: 98 e0 ldi r25, 0x08 ; 8 - 166a: 80 93 72 24 sts 0x2472, r24 ; 0x802472 - 166e: 90 93 73 24 sts 0x2473, r25 ; 0x802473 - 1672: 1d c1 rjmp .+570 ; 0x18ae - 1674: 80 91 6c 24 lds r24, 0x246C ; 0x80246c - 1678: 90 91 6d 24 lds r25, 0x246D ; 0x80246d - 167c: 89 2b or r24, r25 - 167e: 09 f0 breq .+2 ; 0x1682 - 1680: a7 c0 rjmp .+334 ; 0x17d0 - 1682: 80 91 68 24 lds r24, 0x2468 ; 0x802468 - 1686: 90 91 69 24 lds r25, 0x2469 ; 0x802469 - 168a: 01 97 sbiw r24, 0x01 ; 1 - 168c: 09 f0 breq .+2 ; 0x1690 - 168e: a0 c0 rjmp .+320 ; 0x17d0 - 1690: 80 91 d0 20 lds r24, 0x20D0 ; 0x8020d0 - 1694: 90 91 d1 20 lds r25, 0x20D1 ; 0x8020d1 - 1698: 8d 7f andi r24, 0xFD ; 253 - 169a: 80 93 d0 20 sts 0x20D0, r24 ; 0x8020d0 - 169e: 90 93 d1 20 sts 0x20D1, r25 ; 0x8020d1 - 16a2: 05 c1 rjmp .+522 ; 0x18ae - 16a4: 80 91 6c 24 lds r24, 0x246C ; 0x80246c - 16a8: 90 91 6d 24 lds r25, 0x246D ; 0x80246d - 16ac: 89 2b or r24, r25 - 16ae: 09 f0 breq .+2 ; 0x16b2 - 16b0: 8f c0 rjmp .+286 ; 0x17d0 - 16b2: 41 d4 rcall .+2178 ; 0x1f36 - 16b4: 88 23 and r24, r24 - 16b6: 09 f4 brne .+2 ; 0x16ba - 16b8: 8b c0 rjmp .+278 ; 0x17d0 - 16ba: 20 91 68 24 lds r18, 0x2468 ; 0x802468 - 16be: 30 91 69 24 lds r19, 0x2469 ; 0x802469 - 16c2: 33 27 eor r19, r19 - 16c4: e0 91 10 20 lds r30, 0x2010 ; 0x802010 - 16c8: f0 91 11 20 lds r31, 0x2011 ; 0x802011 - 16cc: 81 89 ldd r24, Z+17 ; 0x11 - 16ce: 90 e0 ldi r25, 0x00 ; 0 - 16d0: 82 17 cp r24, r18 - 16d2: 93 07 cpc r25, r19 - 16d4: 08 f4 brcc .+2 ; 0x16d8 - 16d6: 7c c0 rjmp .+248 ; 0x17d0 - 16d8: 80 dd rcall .-1280 ; 0x11da - 16da: 80 91 68 24 lds r24, 0x2468 ; 0x802468 - 16de: 90 91 69 24 lds r25, 0x2469 ; 0x802469 - 16e2: 80 93 cc 20 sts 0x20CC, r24 ; 0x8020cc - 16e6: 88 23 and r24, r24 - 16e8: 09 f4 brne .+2 ; 0x16ec - 16ea: e1 c0 rjmp .+450 ; 0x18ae - 16ec: 99 27 eor r25, r25 - 16ee: 81 50 subi r24, 0x01 ; 1 - 16f0: 90 4c sbci r25, 0xC0 ; 192 - 16f2: 88 0f add r24, r24 - 16f4: 99 1f adc r25, r25 - 16f6: 88 0f add r24, r24 - 16f8: 99 1f adc r25, r25 - 16fa: 20 91 12 20 lds r18, 0x2012 ; 0x802012 - 16fe: 30 91 13 20 lds r19, 0x2013 ; 0x802013 - 1702: 82 0f add r24, r18 - 1704: 93 1f adc r25, r19 - 1706: 80 93 c9 20 sts 0x20C9, r24 ; 0x8020c9 - 170a: 90 93 ca 20 sts 0x20CA, r25 ; 0x8020ca - 170e: 10 e0 ldi r17, 0x00 ; 0 - 1710: e0 91 c9 20 lds r30, 0x20C9 ; 0x8020c9 - 1714: f0 91 ca 20 lds r31, 0x20CA ; 0x8020ca - 1718: 01 90 ld r0, Z+ - 171a: f0 81 ld r31, Z - 171c: e0 2d mov r30, r0 - 171e: 84 81 ldd r24, Z+4 ; 0x04 - 1720: 18 17 cp r17, r24 - 1722: 08 f0 brcs .+2 ; 0x1726 - 1724: c4 c0 rjmp .+392 ; 0x18ae - 1726: 60 e0 ldi r22, 0x00 ; 0 - 1728: 81 2f mov r24, r17 - 172a: df dc rcall .-1602 ; 0x10ea - 172c: 88 23 and r24, r24 - 172e: 09 f4 brne .+2 ; 0x1732 - 1730: 4f c0 rjmp .+158 ; 0x17d0 - 1732: 1f 5f subi r17, 0xFF ; 255 - 1734: ed cf rjmp .-38 ; 0x1710 - 1736: 81 30 cpi r24, 0x01 ; 1 - 1738: f1 f4 brne .+60 ; 0x1776 - 173a: 80 91 67 24 lds r24, 0x2467 ; 0x802467 - 173e: 8b 30 cpi r24, 0x0B ; 11 - 1740: 09 f0 breq .+2 ; 0x1744 - 1742: 46 c0 rjmp .+140 ; 0x17d0 - 1744: 80 91 6c 24 lds r24, 0x246C ; 0x80246c - 1748: 90 91 6d 24 lds r25, 0x246D ; 0x80246d - 174c: 89 2b or r24, r25 - 174e: 09 f0 breq .+2 ; 0x1752 - 1750: 3f c0 rjmp .+126 ; 0x17d0 - 1752: 80 91 cc 20 lds r24, 0x20CC ; 0x8020cc - 1756: 88 23 and r24, r24 - 1758: 09 f4 brne .+2 ; 0x175c - 175a: 3a c0 rjmp .+116 ; 0x17d0 - 175c: 10 91 6a 24 lds r17, 0x246A ; 0x80246a - 1760: 60 91 68 24 lds r22, 0x2468 ; 0x802468 - 1764: 81 2f mov r24, r17 - 1766: 69 83 std Y+1, r22 ; 0x01 - 1768: f3 dc rcall .-1562 ; 0x1150 - 176a: 69 81 ldd r22, Y+1 ; 0x01 - 176c: 88 23 and r24, r24 - 176e: 81 f1 breq .+96 ; 0x17d0 - 1770: 81 2f mov r24, r17 - 1772: bb dc rcall .-1674 ; 0x10ea - 1774: 2b c0 rjmp .+86 ; 0x17cc - 1776: 82 30 cpi r24, 0x02 ; 2 - 1778: 59 f5 brne .+86 ; 0x17d0 - 177a: 80 91 67 24 lds r24, 0x2467 ; 0x802467 - 177e: 81 30 cpi r24, 0x01 ; 1 - 1780: 19 f0 breq .+6 ; 0x1788 - 1782: 83 30 cpi r24, 0x03 ; 3 - 1784: 89 f0 breq .+34 ; 0x17a8 - 1786: 24 c0 rjmp .+72 ; 0x17d0 - 1788: 80 91 6c 24 lds r24, 0x246C ; 0x80246c - 178c: 90 91 6d 24 lds r25, 0x246D ; 0x80246d - 1790: 89 2b or r24, r25 - 1792: f1 f4 brne .+60 ; 0x17d0 - 1794: 80 91 68 24 lds r24, 0x2468 ; 0x802468 - 1798: 90 91 69 24 lds r25, 0x2469 ; 0x802469 - 179c: 89 2b or r24, r25 - 179e: c1 f4 brne .+48 ; 0x17d0 - 17a0: 80 91 6a 24 lds r24, 0x246A ; 0x80246a - 17a4: 2a d4 rcall .+2132 ; 0x1ffa - 17a6: 12 c0 rjmp .+36 ; 0x17cc - 17a8: 80 91 6c 24 lds r24, 0x246C ; 0x80246c - 17ac: 90 91 6d 24 lds r25, 0x246D ; 0x80246d - 17b0: 89 2b or r24, r25 - 17b2: 71 f4 brne .+28 ; 0x17d0 - 17b4: 80 91 68 24 lds r24, 0x2468 ; 0x802468 - 17b8: 90 91 69 24 lds r25, 0x2469 ; 0x802469 - 17bc: 89 2b or r24, r25 - 17be: 41 f4 brne .+16 ; 0x17d0 - 17c0: 80 91 6a 24 lds r24, 0x246A ; 0x80246a - 17c4: bf d4 rcall .+2430 ; 0x2144 - 17c6: 80 91 6a 24 lds r24, 0x246A ; 0x80246a - 17ca: f5 d4 rcall .+2538 ; 0x21b6 - 17cc: 81 11 cpse r24, r1 - 17ce: 6f c0 rjmp .+222 ; 0x18ae - 17d0: 80 91 66 24 lds r24, 0x2466 ; 0x802466 - 17d4: 8f 71 andi r24, 0x1F ; 31 - 17d6: 81 30 cpi r24, 0x01 ; 1 - 17d8: b9 f5 brne .+110 ; 0x1848 - 17da: 80 91 cc 20 lds r24, 0x20CC ; 0x8020cc - 17de: 88 23 and r24, r24 - 17e0: 99 f1 breq .+102 ; 0x1848 - 17e2: e0 90 6a 24 lds r14, 0x246A ; 0x80246a - 17e6: f0 90 6b 24 lds r15, 0x246B ; 0x80246b - 17ea: 00 91 c9 20 lds r16, 0x20C9 ; 0x8020c9 - 17ee: 10 91 ca 20 lds r17, 0x20CA ; 0x8020ca - 17f2: d8 01 movw r26, r16 - 17f4: ed 91 ld r30, X+ - 17f6: fc 91 ld r31, X - 17f8: 84 81 ldd r24, Z+4 ; 0x04 - 17fa: e8 16 cp r14, r24 - 17fc: 28 f5 brcc .+74 ; 0x1848 - 17fe: 60 e0 ldi r22, 0x00 ; 0 - 1800: 8e 2d mov r24, r14 - 1802: 20 dc rcall .-1984 ; 0x1044 - 1804: 88 23 and r24, r24 - 1806: 01 f1 breq .+64 ; 0x1848 - 1808: f7 01 movw r30, r14 - 180a: ff 27 eor r31, r31 - 180c: ee 0f add r30, r30 - 180e: ff 1f adc r31, r31 - 1810: d8 01 movw r26, r16 - 1812: 12 96 adiw r26, 0x02 ; 2 - 1814: 8d 91 ld r24, X+ - 1816: 9c 91 ld r25, X - 1818: 13 97 sbiw r26, 0x03 ; 3 - 181a: e8 0f add r30, r24 - 181c: f9 1f adc r31, r25 - 181e: 00 81 ld r16, Z - 1820: 11 81 ldd r17, Z+1 ; 0x01 - 1822: d8 01 movw r26, r16 - 1824: 16 96 adiw r26, 0x06 ; 6 - 1826: ed 91 ld r30, X+ - 1828: fc 91 ld r31, X - 182a: 17 97 sbiw r26, 0x07 ; 7 - 182c: 09 95 icall - 182e: 68 2f mov r22, r24 - 1830: 8e 2d mov r24, r14 - 1832: 08 dc rcall .-2032 ; 0x1044 - 1834: 88 23 and r24, r24 - 1836: 41 f0 breq .+16 ; 0x1848 - 1838: d8 01 movw r26, r16 - 183a: 14 96 adiw r26, 0x04 ; 4 - 183c: ed 91 ld r30, X+ - 183e: fc 91 ld r31, X - 1840: 15 97 sbiw r26, 0x05 ; 5 - 1842: 09 95 icall - 1844: 81 11 cpse r24, r1 - 1846: 33 c0 rjmp .+102 ; 0x18ae - 1848: 80 91 66 24 lds r24, 0x2466 ; 0x802466 - 184c: 8f 71 andi r24, 0x1F ; 31 - 184e: 82 30 cpi r24, 0x02 ; 2 - 1850: 81 f5 brne .+96 ; 0x18b2 - 1852: 80 91 cc 20 lds r24, 0x20CC ; 0x8020cc - 1856: 88 23 and r24, r24 - 1858: 61 f1 breq .+88 ; 0x18b2 - 185a: f1 2c mov r15, r1 - 185c: e0 91 c9 20 lds r30, 0x20C9 ; 0x8020c9 - 1860: f0 91 ca 20 lds r31, 0x20CA ; 0x8020ca - 1864: a0 81 ld r26, Z - 1866: b1 81 ldd r27, Z+1 ; 0x01 - 1868: 14 96 adiw r26, 0x04 ; 4 - 186a: 8c 91 ld r24, X - 186c: f8 16 cp r15, r24 - 186e: 08 f5 brcc .+66 ; 0x18b2 - 1870: 92 81 ldd r25, Z+2 ; 0x02 - 1872: 83 81 ldd r24, Z+3 ; 0x03 - 1874: e9 2f mov r30, r25 - 1876: f8 2f mov r31, r24 - 1878: ef 0d add r30, r15 - 187a: f1 1d adc r31, r1 - 187c: ef 0d add r30, r15 - 187e: f1 1d adc r31, r1 - 1880: 00 81 ld r16, Z - 1882: 11 81 ldd r17, Z+1 ; 0x01 - 1884: d8 01 movw r26, r16 - 1886: 16 96 adiw r26, 0x06 ; 6 - 1888: ed 91 ld r30, X+ - 188a: fc 91 ld r31, X - 188c: 17 97 sbiw r26, 0x07 ; 7 - 188e: 09 95 icall - 1890: 68 2f mov r22, r24 - 1892: 8f 2d mov r24, r15 - 1894: d7 db rcall .-2130 ; 0x1044 - 1896: 88 23 and r24, r24 - 1898: 61 f0 breq .+24 ; 0x18b2 - 189a: d8 01 movw r26, r16 - 189c: 14 96 adiw r26, 0x04 ; 4 - 189e: ed 91 ld r30, X+ - 18a0: fc 91 ld r31, X - 18a2: 15 97 sbiw r26, 0x05 ; 5 - 18a4: 09 95 icall - 18a6: 81 11 cpse r24, r1 - 18a8: 02 c0 rjmp .+4 ; 0x18ae - 18aa: f3 94 inc r15 - 18ac: d7 cf rjmp .-82 ; 0x185c - 18ae: 81 e0 ldi r24, 0x01 ; 1 - 18b0: 01 c0 rjmp .+2 ; 0x18b4 - 18b2: 80 e0 ldi r24, 0x00 ; 0 - 18b4: 0f 90 pop r0 - 18b6: df 91 pop r29 - 18b8: cf 91 pop r28 - 18ba: 1f 91 pop r17 - 18bc: 0f 91 pop r16 - 18be: ff 90 pop r15 - 18c0: ef 90 pop r14 - 18c2: 08 95 ret + 1662: 09 f0 breq .+2 ; 0x1666 + 1664: a7 c0 rjmp .+334 ; 0x17b4 + 1666: 80 91 6c 24 lds r24, 0x246C ; 0x80246c + 166a: 90 91 6d 24 lds r25, 0x246D ; 0x80246d + 166e: 01 97 sbiw r24, 0x01 ; 1 + 1670: 09 f0 breq .+2 ; 0x1674 + 1672: a0 c0 rjmp .+320 ; 0x17b4 + 1674: 80 91 d0 20 lds r24, 0x20D0 ; 0x8020d0 + 1678: 90 91 d1 20 lds r25, 0x20D1 ; 0x8020d1 + 167c: 8d 7f andi r24, 0xFD ; 253 + 167e: 80 93 d0 20 sts 0x20D0, r24 ; 0x8020d0 + 1682: 90 93 d1 20 sts 0x20D1, r25 ; 0x8020d1 + 1686: 05 c1 rjmp .+522 ; 0x1892 + 1688: 80 91 70 24 lds r24, 0x2470 ; 0x802470 + 168c: 90 91 71 24 lds r25, 0x2471 ; 0x802471 + 1690: 89 2b or r24, r25 + 1692: 09 f0 breq .+2 ; 0x1696 + 1694: 8f c0 rjmp .+286 ; 0x17b4 + 1696: 41 d4 rcall .+2178 ; 0x1f1a + 1698: 88 23 and r24, r24 + 169a: 09 f4 brne .+2 ; 0x169e + 169c: 8b c0 rjmp .+278 ; 0x17b4 + 169e: 20 91 6c 24 lds r18, 0x246C ; 0x80246c + 16a2: 30 91 6d 24 lds r19, 0x246D ; 0x80246d + 16a6: 33 27 eor r19, r19 + 16a8: e0 91 10 20 lds r30, 0x2010 ; 0x802010 + 16ac: f0 91 11 20 lds r31, 0x2011 ; 0x802011 + 16b0: 81 89 ldd r24, Z+17 ; 0x11 + 16b2: 90 e0 ldi r25, 0x00 ; 0 + 16b4: 82 17 cp r24, r18 + 16b6: 93 07 cpc r25, r19 + 16b8: 08 f4 brcc .+2 ; 0x16bc + 16ba: 7c c0 rjmp .+248 ; 0x17b4 + 16bc: 80 dd rcall .-1280 ; 0x11be + 16be: 80 91 6c 24 lds r24, 0x246C ; 0x80246c + 16c2: 90 91 6d 24 lds r25, 0x246D ; 0x80246d + 16c6: 80 93 cc 20 sts 0x20CC, r24 ; 0x8020cc + 16ca: 88 23 and r24, r24 + 16cc: 09 f4 brne .+2 ; 0x16d0 + 16ce: e1 c0 rjmp .+450 ; 0x1892 + 16d0: 99 27 eor r25, r25 + 16d2: 81 50 subi r24, 0x01 ; 1 + 16d4: 90 4c sbci r25, 0xC0 ; 192 + 16d6: 88 0f add r24, r24 + 16d8: 99 1f adc r25, r25 + 16da: 88 0f add r24, r24 + 16dc: 99 1f adc r25, r25 + 16de: 20 91 12 20 lds r18, 0x2012 ; 0x802012 + 16e2: 30 91 13 20 lds r19, 0x2013 ; 0x802013 + 16e6: 82 0f add r24, r18 + 16e8: 93 1f adc r25, r19 + 16ea: 80 93 c9 20 sts 0x20C9, r24 ; 0x8020c9 + 16ee: 90 93 ca 20 sts 0x20CA, r25 ; 0x8020ca + 16f2: 10 e0 ldi r17, 0x00 ; 0 + 16f4: e0 91 c9 20 lds r30, 0x20C9 ; 0x8020c9 + 16f8: f0 91 ca 20 lds r31, 0x20CA ; 0x8020ca + 16fc: 01 90 ld r0, Z+ + 16fe: f0 81 ld r31, Z + 1700: e0 2d mov r30, r0 + 1702: 84 81 ldd r24, Z+4 ; 0x04 + 1704: 18 17 cp r17, r24 + 1706: 08 f0 brcs .+2 ; 0x170a + 1708: c4 c0 rjmp .+392 ; 0x1892 + 170a: 60 e0 ldi r22, 0x00 ; 0 + 170c: 81 2f mov r24, r17 + 170e: df dc rcall .-1602 ; 0x10ce + 1710: 88 23 and r24, r24 + 1712: 09 f4 brne .+2 ; 0x1716 + 1714: 4f c0 rjmp .+158 ; 0x17b4 + 1716: 1f 5f subi r17, 0xFF ; 255 + 1718: ed cf rjmp .-38 ; 0x16f4 + 171a: 81 30 cpi r24, 0x01 ; 1 + 171c: f1 f4 brne .+60 ; 0x175a + 171e: 80 91 6b 24 lds r24, 0x246B ; 0x80246b + 1722: 8b 30 cpi r24, 0x0B ; 11 + 1724: 09 f0 breq .+2 ; 0x1728 + 1726: 46 c0 rjmp .+140 ; 0x17b4 + 1728: 80 91 70 24 lds r24, 0x2470 ; 0x802470 + 172c: 90 91 71 24 lds r25, 0x2471 ; 0x802471 + 1730: 89 2b or r24, r25 + 1732: 09 f0 breq .+2 ; 0x1736 + 1734: 3f c0 rjmp .+126 ; 0x17b4 + 1736: 80 91 cc 20 lds r24, 0x20CC ; 0x8020cc + 173a: 88 23 and r24, r24 + 173c: 09 f4 brne .+2 ; 0x1740 + 173e: 3a c0 rjmp .+116 ; 0x17b4 + 1740: 10 91 6e 24 lds r17, 0x246E ; 0x80246e + 1744: 60 91 6c 24 lds r22, 0x246C ; 0x80246c + 1748: 81 2f mov r24, r17 + 174a: 69 83 std Y+1, r22 ; 0x01 + 174c: f3 dc rcall .-1562 ; 0x1134 + 174e: 69 81 ldd r22, Y+1 ; 0x01 + 1750: 88 23 and r24, r24 + 1752: 81 f1 breq .+96 ; 0x17b4 + 1754: 81 2f mov r24, r17 + 1756: bb dc rcall .-1674 ; 0x10ce + 1758: 2b c0 rjmp .+86 ; 0x17b0 + 175a: 82 30 cpi r24, 0x02 ; 2 + 175c: 59 f5 brne .+86 ; 0x17b4 + 175e: 80 91 6b 24 lds r24, 0x246B ; 0x80246b + 1762: 81 30 cpi r24, 0x01 ; 1 + 1764: 19 f0 breq .+6 ; 0x176c + 1766: 83 30 cpi r24, 0x03 ; 3 + 1768: 89 f0 breq .+34 ; 0x178c + 176a: 24 c0 rjmp .+72 ; 0x17b4 + 176c: 80 91 70 24 lds r24, 0x2470 ; 0x802470 + 1770: 90 91 71 24 lds r25, 0x2471 ; 0x802471 + 1774: 89 2b or r24, r25 + 1776: f1 f4 brne .+60 ; 0x17b4 + 1778: 80 91 6c 24 lds r24, 0x246C ; 0x80246c + 177c: 90 91 6d 24 lds r25, 0x246D ; 0x80246d + 1780: 89 2b or r24, r25 + 1782: c1 f4 brne .+48 ; 0x17b4 + 1784: 80 91 6e 24 lds r24, 0x246E ; 0x80246e + 1788: 2a d4 rcall .+2132 ; 0x1fde + 178a: 12 c0 rjmp .+36 ; 0x17b0 + 178c: 80 91 70 24 lds r24, 0x2470 ; 0x802470 + 1790: 90 91 71 24 lds r25, 0x2471 ; 0x802471 + 1794: 89 2b or r24, r25 + 1796: 71 f4 brne .+28 ; 0x17b4 + 1798: 80 91 6c 24 lds r24, 0x246C ; 0x80246c + 179c: 90 91 6d 24 lds r25, 0x246D ; 0x80246d + 17a0: 89 2b or r24, r25 + 17a2: 41 f4 brne .+16 ; 0x17b4 + 17a4: 80 91 6e 24 lds r24, 0x246E ; 0x80246e + 17a8: bf d4 rcall .+2430 ; 0x2128 + 17aa: 80 91 6e 24 lds r24, 0x246E ; 0x80246e + 17ae: f5 d4 rcall .+2538 ; 0x219a + 17b0: 81 11 cpse r24, r1 + 17b2: 6f c0 rjmp .+222 ; 0x1892 + 17b4: 80 91 6a 24 lds r24, 0x246A ; 0x80246a + 17b8: 8f 71 andi r24, 0x1F ; 31 + 17ba: 81 30 cpi r24, 0x01 ; 1 + 17bc: b9 f5 brne .+110 ; 0x182c + 17be: 80 91 cc 20 lds r24, 0x20CC ; 0x8020cc + 17c2: 88 23 and r24, r24 + 17c4: 99 f1 breq .+102 ; 0x182c + 17c6: e0 90 6e 24 lds r14, 0x246E ; 0x80246e + 17ca: f0 90 6f 24 lds r15, 0x246F ; 0x80246f + 17ce: 00 91 c9 20 lds r16, 0x20C9 ; 0x8020c9 + 17d2: 10 91 ca 20 lds r17, 0x20CA ; 0x8020ca + 17d6: d8 01 movw r26, r16 + 17d8: ed 91 ld r30, X+ + 17da: fc 91 ld r31, X + 17dc: 84 81 ldd r24, Z+4 ; 0x04 + 17de: e8 16 cp r14, r24 + 17e0: 28 f5 brcc .+74 ; 0x182c + 17e2: 60 e0 ldi r22, 0x00 ; 0 + 17e4: 8e 2d mov r24, r14 + 17e6: 20 dc rcall .-1984 ; 0x1028 + 17e8: 88 23 and r24, r24 + 17ea: 01 f1 breq .+64 ; 0x182c + 17ec: f7 01 movw r30, r14 + 17ee: ff 27 eor r31, r31 + 17f0: ee 0f add r30, r30 + 17f2: ff 1f adc r31, r31 + 17f4: d8 01 movw r26, r16 + 17f6: 12 96 adiw r26, 0x02 ; 2 + 17f8: 8d 91 ld r24, X+ + 17fa: 9c 91 ld r25, X + 17fc: 13 97 sbiw r26, 0x03 ; 3 + 17fe: e8 0f add r30, r24 + 1800: f9 1f adc r31, r25 + 1802: 00 81 ld r16, Z + 1804: 11 81 ldd r17, Z+1 ; 0x01 + 1806: d8 01 movw r26, r16 + 1808: 16 96 adiw r26, 0x06 ; 6 + 180a: ed 91 ld r30, X+ + 180c: fc 91 ld r31, X + 180e: 17 97 sbiw r26, 0x07 ; 7 + 1810: 09 95 icall + 1812: 68 2f mov r22, r24 + 1814: 8e 2d mov r24, r14 + 1816: 08 dc rcall .-2032 ; 0x1028 + 1818: 88 23 and r24, r24 + 181a: 41 f0 breq .+16 ; 0x182c + 181c: d8 01 movw r26, r16 + 181e: 14 96 adiw r26, 0x04 ; 4 + 1820: ed 91 ld r30, X+ + 1822: fc 91 ld r31, X + 1824: 15 97 sbiw r26, 0x05 ; 5 + 1826: 09 95 icall + 1828: 81 11 cpse r24, r1 + 182a: 33 c0 rjmp .+102 ; 0x1892 + 182c: 80 91 6a 24 lds r24, 0x246A ; 0x80246a + 1830: 8f 71 andi r24, 0x1F ; 31 + 1832: 82 30 cpi r24, 0x02 ; 2 + 1834: 81 f5 brne .+96 ; 0x1896 + 1836: 80 91 cc 20 lds r24, 0x20CC ; 0x8020cc + 183a: 88 23 and r24, r24 + 183c: 61 f1 breq .+88 ; 0x1896 + 183e: f1 2c mov r15, r1 + 1840: e0 91 c9 20 lds r30, 0x20C9 ; 0x8020c9 + 1844: f0 91 ca 20 lds r31, 0x20CA ; 0x8020ca + 1848: a0 81 ld r26, Z + 184a: b1 81 ldd r27, Z+1 ; 0x01 + 184c: 14 96 adiw r26, 0x04 ; 4 + 184e: 8c 91 ld r24, X + 1850: f8 16 cp r15, r24 + 1852: 08 f5 brcc .+66 ; 0x1896 + 1854: 92 81 ldd r25, Z+2 ; 0x02 + 1856: 83 81 ldd r24, Z+3 ; 0x03 + 1858: e9 2f mov r30, r25 + 185a: f8 2f mov r31, r24 + 185c: ef 0d add r30, r15 + 185e: f1 1d adc r31, r1 + 1860: ef 0d add r30, r15 + 1862: f1 1d adc r31, r1 + 1864: 00 81 ld r16, Z + 1866: 11 81 ldd r17, Z+1 ; 0x01 + 1868: d8 01 movw r26, r16 + 186a: 16 96 adiw r26, 0x06 ; 6 + 186c: ed 91 ld r30, X+ + 186e: fc 91 ld r31, X + 1870: 17 97 sbiw r26, 0x07 ; 7 + 1872: 09 95 icall + 1874: 68 2f mov r22, r24 + 1876: 8f 2d mov r24, r15 + 1878: d7 db rcall .-2130 ; 0x1028 + 187a: 88 23 and r24, r24 + 187c: 61 f0 breq .+24 ; 0x1896 + 187e: d8 01 movw r26, r16 + 1880: 14 96 adiw r26, 0x04 ; 4 + 1882: ed 91 ld r30, X+ + 1884: fc 91 ld r31, X + 1886: 15 97 sbiw r26, 0x05 ; 5 + 1888: 09 95 icall + 188a: 81 11 cpse r24, r1 + 188c: 02 c0 rjmp .+4 ; 0x1892 + 188e: f3 94 inc r15 + 1890: d7 cf rjmp .-82 ; 0x1840 + 1892: 81 e0 ldi r24, 0x01 ; 1 + 1894: 01 c0 rjmp .+2 ; 0x1898 + 1896: 80 e0 ldi r24, 0x00 ; 0 + 1898: 0f 90 pop r0 + 189a: df 91 pop r29 + 189c: cf 91 pop r28 + 189e: 1f 91 pop r17 + 18a0: 0f 91 pop r16 + 18a2: ff 90 pop r15 + 18a4: ef 90 pop r14 + 18a6: 08 95 ret -000018c4 : +000018a8 : PUBLIC_FUNCTION(ccp_write_io) #if defined(__GNUC__) out RAMPZ, r1 // Reset bits 23:16 of Z - 18c4: 1b be out 0x3b, r1 ; 59 + 18a8: 1b be out 0x3b, r1 ; 59 movw r30, r24 // Load addr into Z - 18c6: fc 01 movw r30, r24 + 18aa: fc 01 movw r30, r24 ldi r18, CCP_IOREG // Load magic CCP value - 18c8: 28 ed ldi r18, 0xD8 ; 216 + 18ac: 28 ed ldi r18, 0xD8 ; 216 out CCP, r18 // Start CCP handshake - 18ca: 24 bf out 0x34, r18 ; 52 + 18ae: 24 bf out 0x34, r18 ; 52 st Z, r22 // Write value to I/O register - 18cc: 60 83 st Z, r22 + 18b0: 60 83 st Z, r22 ret // Return to caller - 18ce: 08 95 ret + 18b2: 08 95 ret -000018d0 : +000018b4 : #endif #ifndef __DOXYGEN__ PUBLIC_FUNCTION(nvm_read_byte) #if defined(__GNUC__) lds r20, NVM_CMD ; Store NVM command register - 18d0: 40 91 ca 01 lds r20, 0x01CA ; 0x8001ca <__TEXT_REGION_LENGTH__+0x7001ca> + 18b4: 40 91 ca 01 lds r20, 0x01CA ; 0x8001ca <__TEXT_REGION_LENGTH__+0x7001ca> mov ZL, r22 ; Load byte index into low byte of Z. - 18d4: e6 2f mov r30, r22 + 18b8: e6 2f mov r30, r22 mov ZH, r23 ; Load high byte into Z. - 18d6: f7 2f mov r31, r23 + 18ba: f7 2f mov r31, r23 sts NVM_CMD, r24 ; Load prepared command into NVM Command register. - 18d8: 80 93 ca 01 sts 0x01CA, r24 ; 0x8001ca <__TEXT_REGION_LENGTH__+0x7001ca> + 18bc: 80 93 ca 01 sts 0x01CA, r24 ; 0x8001ca <__TEXT_REGION_LENGTH__+0x7001ca> lpm r24, Z ; Perform an LPM to read out byte - 18dc: 84 91 lpm r24, Z + 18c0: 84 91 lpm r24, Z sts NVM_CMD, r20 ; Restore NVM command register - 18de: 40 93 ca 01 sts 0x01CA, r20 ; 0x8001ca <__TEXT_REGION_LENGTH__+0x7001ca> + 18c2: 40 93 ca 01 sts 0x01CA, r20 ; 0x8001ca <__TEXT_REGION_LENGTH__+0x7001ca> sts NVM_CMD, r16 ; Load prepared command into NVM Command register. lpm r16, Z ; Perform an LPM to read out byte sts NVM_CMD, r20 ; Restore NVM command register #endif ret - 18e2: 08 95 ret + 18c6: 08 95 ret -000018e4 : - 18e4: e8 2f mov r30, r24 - 18e6: f0 e0 ldi r31, 0x00 ; 0 - 18e8: ee 5a subi r30, 0xAE ; 174 - 18ea: f3 4d sbci r31, 0xD3 ; 211 - 18ec: 80 81 ld r24, Z - 18ee: 8f 3f cpi r24, 0xFF ; 255 - 18f0: 09 f4 brne .+2 ; 0x18f4 - 18f2: ff cf rjmp .-2 ; 0x18f2 - 18f4: 9f b7 in r25, 0x3f ; 63 - 18f6: f8 94 cli - 18f8: 80 81 ld r24, Z - 18fa: 8f 5f subi r24, 0xFF ; 255 - 18fc: 80 83 st Z, r24 - 18fe: 9f bf out 0x3f, r25 ; 63 - 1900: 08 95 ret +000018c8 : + 18c8: e8 2f mov r30, r24 + 18ca: f0 e0 ldi r31, 0x00 ; 0 + 18cc: ea 5a subi r30, 0xAA ; 170 + 18ce: f3 4d sbci r31, 0xD3 ; 211 + 18d0: 80 81 ld r24, Z + 18d2: 8f 3f cpi r24, 0xFF ; 255 + 18d4: 09 f4 brne .+2 ; 0x18d8 + 18d6: ff cf rjmp .-2 ; 0x18d6 + 18d8: 9f b7 in r25, 0x3f ; 63 + 18da: f8 94 cli + 18dc: 80 81 ld r24, Z + 18de: 8f 5f subi r24, 0xFF ; 255 + 18e0: 80 83 st Z, r24 + 18e2: 9f bf out 0x3f, r25 ; 63 + 18e4: 08 95 ret -00001902 : - 1902: e8 2f mov r30, r24 - 1904: f0 e0 ldi r31, 0x00 ; 0 - 1906: ee 5a subi r30, 0xAE ; 174 - 1908: f3 4d sbci r31, 0xD3 ; 211 - 190a: 80 81 ld r24, Z - 190c: 81 11 cpse r24, r1 - 190e: 01 c0 rjmp .+2 ; 0x1912 - 1910: ff cf rjmp .-2 ; 0x1910 - 1912: 9f b7 in r25, 0x3f ; 63 - 1914: f8 94 cli - 1916: 80 81 ld r24, Z - 1918: 81 50 subi r24, 0x01 ; 1 - 191a: 80 83 st Z, r24 - 191c: 9f bf out 0x3f, r25 ; 63 - 191e: 08 95 ret +000018e6 : + 18e6: e8 2f mov r30, r24 + 18e8: f0 e0 ldi r31, 0x00 ; 0 + 18ea: ea 5a subi r30, 0xAA ; 170 + 18ec: f3 4d sbci r31, 0xD3 ; 211 + 18ee: 80 81 ld r24, Z + 18f0: 81 11 cpse r24, r1 + 18f2: 01 c0 rjmp .+2 ; 0x18f6 + 18f4: ff cf rjmp .-2 ; 0x18f4 + 18f6: 9f b7 in r25, 0x3f ; 63 + 18f8: f8 94 cli + 18fa: 80 81 ld r24, Z + 18fc: 81 50 subi r24, 0x01 ; 1 + 18fe: 80 83 st Z, r24 + 1900: 9f bf out 0x3f, r25 ; 63 + 1902: 08 95 ret -00001920 : - 1920: cf 93 push r28 - 1922: c8 2f mov r28, r24 - 1924: 80 91 64 22 lds r24, 0x2264 ; 0x802264 - 1928: c1 11 cpse r28, r1 - 192a: 05 c0 rjmp .+10 ; 0x1936 - 192c: 88 23 and r24, r24 - 192e: 39 f0 breq .+14 ; 0x193e - 1930: 81 e0 ldi r24, 0x01 ; 1 - 1932: e7 df rcall .-50 ; 0x1902 - 1934: 04 c0 rjmp .+8 ; 0x193e - 1936: 81 11 cpse r24, r1 - 1938: 02 c0 rjmp .+4 ; 0x193e - 193a: 81 e0 ldi r24, 0x01 ; 1 - 193c: d3 df rcall .-90 ; 0x18e4 - 193e: c0 93 64 22 sts 0x2264, r28 ; 0x802264 - 1942: cf 91 pop r28 - 1944: 08 95 ret +00001904 : + 1904: cf 93 push r28 + 1906: c8 2f mov r28, r24 + 1908: 80 91 64 22 lds r24, 0x2264 ; 0x802264 + 190c: c1 11 cpse r28, r1 + 190e: 05 c0 rjmp .+10 ; 0x191a + 1910: 88 23 and r24, r24 + 1912: 39 f0 breq .+14 ; 0x1922 + 1914: 81 e0 ldi r24, 0x01 ; 1 + 1916: e7 df rcall .-50 ; 0x18e6 + 1918: 04 c0 rjmp .+8 ; 0x1922 + 191a: 81 11 cpse r24, r1 + 191c: 02 c0 rjmp .+4 ; 0x1922 + 191e: 81 e0 ldi r24, 0x01 ; 1 + 1920: d3 df rcall .-90 ; 0x18c8 + 1922: c0 93 64 22 sts 0x2264, r28 ; 0x802264 + 1926: cf 91 pop r28 + 1928: 08 95 ret -00001946 : - 1946: 28 2f mov r18, r24 - 1948: 2f 70 andi r18, 0x0F ; 15 - 194a: 08 2e mov r0, r24 - 194c: 00 0c add r0, r0 - 194e: 99 0b sbc r25, r25 - 1950: 39 2f mov r19, r25 - 1952: 33 1f adc r19, r19 - 1954: 33 27 eor r19, r19 - 1956: 33 1f adc r19, r19 - 1958: 83 2f mov r24, r19 - 195a: 90 e0 ldi r25, 0x00 ; 0 - 195c: 82 0f add r24, r18 - 195e: 91 1d adc r25, r1 - 1960: 82 0f add r24, r18 - 1962: 91 1d adc r25, r1 - 1964: 23 e0 ldi r18, 0x03 ; 3 - 1966: 88 0f add r24, r24 - 1968: 99 1f adc r25, r25 - 196a: 2a 95 dec r18 - 196c: e1 f7 brne .-8 ; 0x1966 - 196e: 80 5e subi r24, 0xE0 ; 224 - 1970: 9d 4d sbci r25, 0xDD ; 221 - 1972: 08 95 ret +0000192a : + 192a: 28 2f mov r18, r24 + 192c: 2f 70 andi r18, 0x0F ; 15 + 192e: 08 2e mov r0, r24 + 1930: 00 0c add r0, r0 + 1932: 99 0b sbc r25, r25 + 1934: 39 2f mov r19, r25 + 1936: 33 1f adc r19, r19 + 1938: 33 27 eor r19, r19 + 193a: 33 1f adc r19, r19 + 193c: 83 2f mov r24, r19 + 193e: 90 e0 ldi r25, 0x00 ; 0 + 1940: 82 0f add r24, r18 + 1942: 91 1d adc r25, r1 + 1944: 82 0f add r24, r18 + 1946: 91 1d adc r25, r1 + 1948: 23 e0 ldi r18, 0x03 ; 3 + 194a: 88 0f add r24, r24 + 194c: 99 1f adc r25, r25 + 194e: 2a 95 dec r18 + 1950: e1 f7 brne .-8 ; 0x194a + 1952: 80 5e subi r24, 0xE0 ; 224 + 1954: 9d 4d sbci r25, 0xDD ; 221 + 1956: 08 95 ret -00001974 : - 1974: 0f 93 push r16 - 1976: e8 ec ldi r30, 0xC8 ; 200 - 1978: f4 e0 ldi r31, 0x04 ; 4 - 197a: 80 81 ld r24, Z - 197c: 8f 7d andi r24, 0xDF ; 223 - 197e: 80 83 st Z, r24 - 1980: 80 81 ld r24, Z - 1982: 8f 7d andi r24, 0xDF ; 223 - 1984: 80 83 st Z, r24 - 1986: e8 e2 ldi r30, 0x28 ; 40 - 1988: f2 e2 ldi r31, 0x22 ; 34 - 198a: 02 e0 ldi r16, 0x02 ; 2 - 198c: 05 93 las Z, r16 - 198e: 10 92 2a 22 sts 0x222A, r1 ; 0x80222a - 1992: 10 92 2b 22 sts 0x222B, r1 ; 0x80222b - 1996: 00 e2 ldi r16, 0x20 ; 32 - 1998: 06 93 lac Z, r16 - 199a: 00 e4 ldi r16, 0x40 ; 64 - 199c: 06 93 lac Z, r16 - 199e: e0 e2 ldi r30, 0x20 ; 32 - 19a0: f2 e2 ldi r31, 0x22 ; 34 - 19a2: 00 e2 ldi r16, 0x20 ; 32 - 19a4: 06 93 lac Z, r16 - 19a6: 00 e4 ldi r16, 0x40 ; 64 - 19a8: 06 93 lac Z, r16 - 19aa: e6 e6 ldi r30, 0x66 ; 102 - 19ac: f4 e2 ldi r31, 0x24 ; 36 - 19ae: 14 86 std Z+12, r1 ; 0x0c - 19b0: 15 86 std Z+13, r1 ; 0x0d - 19b2: 16 86 std Z+14, r1 ; 0x0e - 19b4: 17 86 std Z+15, r1 ; 0x0f - 19b6: 12 86 std Z+10, r1 ; 0x0a - 19b8: 13 86 std Z+11, r1 ; 0x0b - 19ba: 10 92 0d 22 sts 0x220D, r1 ; 0x80220d +00001958 : + 1958: 0f 93 push r16 + 195a: e8 ec ldi r30, 0xC8 ; 200 + 195c: f4 e0 ldi r31, 0x04 ; 4 + 195e: 80 81 ld r24, Z + 1960: 8f 7d andi r24, 0xDF ; 223 + 1962: 80 83 st Z, r24 + 1964: 80 81 ld r24, Z + 1966: 8f 7d andi r24, 0xDF ; 223 + 1968: 80 83 st Z, r24 + 196a: e8 e2 ldi r30, 0x28 ; 40 + 196c: f2 e2 ldi r31, 0x22 ; 34 + 196e: 02 e0 ldi r16, 0x02 ; 2 + 1970: 05 93 las Z, r16 + 1972: 10 92 2a 22 sts 0x222A, r1 ; 0x80222a + 1976: 10 92 2b 22 sts 0x222B, r1 ; 0x80222b + 197a: 00 e2 ldi r16, 0x20 ; 32 + 197c: 06 93 lac Z, r16 + 197e: 00 e4 ldi r16, 0x40 ; 64 + 1980: 06 93 lac Z, r16 + 1982: e0 e2 ldi r30, 0x20 ; 32 + 1984: f2 e2 ldi r31, 0x22 ; 34 + 1986: 00 e2 ldi r16, 0x20 ; 32 + 1988: 06 93 lac Z, r16 + 198a: 00 e4 ldi r16, 0x40 ; 64 + 198c: 06 93 lac Z, r16 + 198e: ea e6 ldi r30, 0x6A ; 106 + 1990: f4 e2 ldi r31, 0x24 ; 36 + 1992: 14 86 std Z+12, r1 ; 0x0c + 1994: 15 86 std Z+13, r1 ; 0x0d + 1996: 16 86 std Z+14, r1 ; 0x0e + 1998: 17 86 std Z+15, r1 ; 0x0f + 199a: 12 86 std Z+10, r1 ; 0x0a + 199c: 13 86 std Z+11, r1 ; 0x0b + 199e: 10 92 0d 22 sts 0x220D, r1 ; 0x80220d + 19a2: 0f 91 pop r16 + 19a4: 08 95 ret + +000019a6 : + 19a6: 0f 93 push r16 + 19a8: 85 e0 ldi r24, 0x05 ; 5 + 19aa: 80 93 0d 22 sts 0x220D, r24 ; 0x80220d + 19ae: e9 e2 ldi r30, 0x29 ; 41 + 19b0: f2 e2 ldi r31, 0x22 ; 34 + 19b2: 04 e0 ldi r16, 0x04 ; 4 + 19b4: 05 93 las Z, r16 + 19b6: e1 e2 ldi r30, 0x21 ; 33 + 19b8: f2 e2 ldi r31, 0x22 ; 34 + 19ba: 04 e0 ldi r16, 0x04 ; 4 + 19bc: 05 93 las Z, r16 19be: 0f 91 pop r16 19c0: 08 95 ret -000019c2 : +000019c2 : 19c2: 0f 93 push r16 - 19c4: 85 e0 ldi r24, 0x05 ; 5 + 19c4: 83 e0 ldi r24, 0x03 ; 3 19c6: 80 93 0d 22 sts 0x220D, r24 ; 0x80220d - 19ca: e9 e2 ldi r30, 0x29 ; 41 - 19cc: f2 e2 ldi r31, 0x22 ; 34 - 19ce: 04 e0 ldi r16, 0x04 ; 4 - 19d0: 05 93 las Z, r16 - 19d2: e1 e2 ldi r30, 0x21 ; 33 + 19ca: 10 92 2a 22 sts 0x222A, r1 ; 0x80222a + 19ce: 10 92 2b 22 sts 0x222B, r1 ; 0x80222b + 19d2: e8 e2 ldi r30, 0x28 ; 40 19d4: f2 e2 ldi r31, 0x22 ; 34 - 19d6: 04 e0 ldi r16, 0x04 ; 4 - 19d8: 05 93 las Z, r16 + 19d6: 02 e0 ldi r16, 0x02 ; 2 + 19d8: 06 93 lac Z, r16 19da: 0f 91 pop r16 19dc: 08 95 ret -000019de : - 19de: 0f 93 push r16 - 19e0: 83 e0 ldi r24, 0x03 ; 3 - 19e2: 80 93 0d 22 sts 0x220D, r24 ; 0x80220d - 19e6: 10 92 2a 22 sts 0x222A, r1 ; 0x80222a - 19ea: 10 92 2b 22 sts 0x222B, r1 ; 0x80222b - 19ee: e8 e2 ldi r30, 0x28 ; 40 - 19f0: f2 e2 ldi r31, 0x22 ; 34 - 19f2: 02 e0 ldi r16, 0x02 ; 2 - 19f4: 06 93 lac Z, r16 - 19f6: 0f 91 pop r16 - 19f8: 08 95 ret +000019de : + 19de: e0 91 76 24 lds r30, 0x2476 ; 0x802476 + 19e2: f0 91 77 24 lds r31, 0x2477 ; 0x802477 + 19e6: 30 97 sbiw r30, 0x00 ; 0 + 19e8: 09 f0 breq .+2 ; 0x19ec + 19ea: 09 94 ijmp + 19ec: 08 95 ret -000019fa : - 19fa: e0 91 72 24 lds r30, 0x2472 ; 0x802472 - 19fe: f0 91 73 24 lds r31, 0x2473 ; 0x802473 - 1a02: 30 97 sbiw r30, 0x00 ; 0 - 1a04: 09 f0 breq .+2 ; 0x1a08 - 1a06: 09 94 ijmp - 1a08: 08 95 ret +000019ee : + 19ee: 28 2f mov r18, r24 + 19f0: 2f 70 andi r18, 0x0F ; 15 + 19f2: 08 2e mov r0, r24 + 19f4: 00 0c add r0, r0 + 19f6: 99 0b sbc r25, r25 + 19f8: 39 2f mov r19, r25 + 19fa: 33 1f adc r19, r19 + 19fc: 33 27 eor r19, r19 + 19fe: 33 1f adc r19, r19 + 1a00: 83 2f mov r24, r19 + 1a02: 90 e0 ldi r25, 0x00 ; 0 + 1a04: 82 0f add r24, r18 + 1a06: 91 1d adc r25, r1 + 1a08: 82 0f add r24, r18 + 1a0a: 91 1d adc r25, r1 + 1a0c: 02 97 sbiw r24, 0x02 ; 2 + 1a0e: 49 e0 ldi r20, 0x09 ; 9 + 1a10: 48 9f mul r20, r24 + 1a12: 90 01 movw r18, r0 + 1a14: 49 9f mul r20, r25 + 1a16: 30 0d add r19, r0 + 1a18: 11 24 eor r1, r1 + 1a1a: c9 01 movw r24, r18 + 1a1c: 8d 56 subi r24, 0x6D ; 109 + 1a1e: 9e 4d sbci r25, 0xDE ; 222 + 1a20: 08 95 ret -00001a0a : - 1a0a: 28 2f mov r18, r24 - 1a0c: 2f 70 andi r18, 0x0F ; 15 - 1a0e: 08 2e mov r0, r24 - 1a10: 00 0c add r0, r0 - 1a12: 99 0b sbc r25, r25 - 1a14: 39 2f mov r19, r25 - 1a16: 33 1f adc r19, r19 - 1a18: 33 27 eor r19, r19 - 1a1a: 33 1f adc r19, r19 - 1a1c: 83 2f mov r24, r19 - 1a1e: 90 e0 ldi r25, 0x00 ; 0 - 1a20: 82 0f add r24, r18 - 1a22: 91 1d adc r25, r1 - 1a24: 82 0f add r24, r18 - 1a26: 91 1d adc r25, r1 - 1a28: 02 97 sbiw r24, 0x02 ; 2 - 1a2a: 49 e0 ldi r20, 0x09 ; 9 - 1a2c: 48 9f mul r20, r24 - 1a2e: 90 01 movw r18, r0 - 1a30: 49 9f mul r20, r25 - 1a32: 30 0d add r19, r0 - 1a34: 11 24 eor r1, r1 - 1a36: c9 01 movw r24, r18 - 1a38: 8d 56 subi r24, 0x6D ; 109 - 1a3a: 9e 4d sbci r25, 0xDE ; 222 - 1a3c: 08 95 ret +00001a22 : + 1a22: 8f 92 push r8 + 1a24: 9f 92 push r9 + 1a26: af 92 push r10 + 1a28: bf 92 push r11 + 1a2a: df 92 push r13 + 1a2c: ef 92 push r14 + 1a2e: ff 92 push r15 + 1a30: 0f 93 push r16 + 1a32: 1f 93 push r17 + 1a34: cf 93 push r28 + 1a36: df 93 push r29 + 1a38: d8 2e mov r13, r24 + 1a3a: d9 df rcall .-78 ; 0x19ee + 1a3c: ec 01 movw r28, r24 + 1a3e: 8d 2d mov r24, r13 + 1a40: 74 df rcall .-280 ; 0x192a + 1a42: 7c 01 movw r14, r24 + 1a44: dc 01 movw r26, r24 + 1a46: 11 96 adiw r26, 0x01 ; 1 + 1a48: ec 91 ld r30, X + 1a4a: e7 70 andi r30, 0x07 ; 7 + 1a4c: e1 50 subi r30, 0x01 ; 1 + 1a4e: e7 30 cpi r30, 0x07 ; 7 + 1a50: 40 f4 brcc .+16 ; 0x1a62 + 1a52: f0 e0 ldi r31, 0x00 ; 0 + 1a54: ee 0f add r30, r30 + 1a56: ff 1f adc r31, r31 + 1a58: ee 54 subi r30, 0x4E ; 78 + 1a5a: ff 4d sbci r31, 0xDF ; 223 + 1a5c: 00 81 ld r16, Z + 1a5e: 11 81 ldd r17, Z+1 ; 0x01 + 1a60: 02 c0 rjmp .+4 ; 0x1a66 + 1a62: 08 e0 ldi r16, 0x08 ; 8 + 1a64: 10 e0 ldi r17, 0x00 ; 0 + 1a66: ed 81 ldd r30, Y+5 ; 0x05 + 1a68: fe 81 ldd r31, Y+6 ; 0x06 + 1a6a: 2b 81 ldd r18, Y+3 ; 0x03 + 1a6c: 3c 81 ldd r19, Y+4 ; 0x04 + 1a6e: 48 81 ld r20, Y + 1a70: d7 01 movw r26, r14 + 1a72: d7 fe sbrs r13, 7 + 1a74: 48 c0 rjmp .+144 ; 0x1b06 + 1a76: 16 96 adiw r26, 0x06 ; 6 + 1a78: 8d 91 ld r24, X+ + 1a7a: 9c 91 ld r25, X + 1a7c: 17 97 sbiw r26, 0x07 ; 7 + 1a7e: 8e 0f add r24, r30 + 1a80: 9f 1f adc r25, r31 + 1a82: 8d 83 std Y+5, r24 ; 0x05 + 1a84: 9e 83 std Y+6, r25 ; 0x06 + 1a86: 82 17 cp r24, r18 + 1a88: 93 07 cpc r25, r19 + 1a8a: 61 f1 breq .+88 ; 0x1ae4 + 1a8c: 28 1b sub r18, r24 + 1a8e: 39 0b sbc r19, r25 + 1a90: 21 15 cp r18, r1 + 1a92: b4 e0 ldi r27, 0x04 ; 4 + 1a94: 3b 07 cpc r19, r27 + 1a96: 38 f0 brcs .+14 ; 0x1aa6 + 1a98: 2f ef ldi r18, 0xFF ; 255 + 1a9a: 33 e0 ldi r19, 0x03 ; 3 + 1a9c: c9 01 movw r24, r18 + 1a9e: b8 01 movw r22, r16 + 1aa0: 13 d5 rcall .+2598 ; 0x24c8 <__udivmodhi4> + 1aa2: 28 1b sub r18, r24 + 1aa4: 39 0b sbc r19, r25 + 1aa6: 41 ff sbrs r20, 1 + 1aa8: 0a c0 rjmp .+20 ; 0x1abe + 1aaa: c9 01 movw r24, r18 + 1aac: b8 01 movw r22, r16 + 1aae: 0c d5 rcall .+2584 ; 0x24c8 <__udivmodhi4> + 1ab0: ac 01 movw r20, r24 + 1ab2: 91 e0 ldi r25, 0x01 ; 1 + 1ab4: 45 2b or r20, r21 + 1ab6: 09 f0 breq .+2 ; 0x1aba + 1ab8: 90 e0 ldi r25, 0x00 ; 0 + 1aba: 89 2f mov r24, r25 + 1abc: 01 c0 rjmp .+2 ; 0x1ac0 + 1abe: 80 e0 ldi r24, 0x00 ; 0 + 1ac0: 98 81 ld r25, Y + 1ac2: 80 fb bst r24, 0 + 1ac4: 91 f9 bld r25, 1 + 1ac6: 98 83 st Y, r25 + 1ac8: f7 01 movw r30, r14 + 1aca: 16 82 std Z+6, r1 ; 0x06 + 1acc: 17 82 std Z+7, r1 ; 0x07 + 1ace: 22 83 std Z+2, r18 ; 0x02 + 1ad0: 33 83 std Z+3, r19 ; 0x03 + 1ad2: 29 81 ldd r18, Y+1 ; 0x01 + 1ad4: 3a 81 ldd r19, Y+2 ; 0x02 + 1ad6: 8d 81 ldd r24, Y+5 ; 0x05 + 1ad8: 9e 81 ldd r25, Y+6 ; 0x06 + 1ada: 82 0f add r24, r18 + 1adc: 93 1f adc r25, r19 + 1ade: 84 83 std Z+4, r24 ; 0x04 + 1ae0: 95 83 std Z+5, r25 ; 0x05 + 1ae2: 0e c0 rjmp .+28 ; 0x1b00 + 1ae4: 41 ff sbrs r20, 1 + 1ae6: 71 c0 rjmp .+226 ; 0x1bca + 1ae8: 4d 7f andi r20, 0xFD ; 253 + 1aea: 48 83 st Y, r20 + 1aec: d7 01 movw r26, r14 + 1aee: 16 96 adiw r26, 0x06 ; 6 + 1af0: 1d 92 st X+, r1 + 1af2: 1c 92 st X, r1 + 1af4: 17 97 sbiw r26, 0x07 ; 7 + 1af6: 12 96 adiw r26, 0x02 ; 2 + 1af8: 1d 92 st X+, r1 + 1afa: 1c 92 st X, r1 + 1afc: 13 97 sbiw r26, 0x03 ; 3 + 1afe: f7 01 movw r30, r14 + 1b00: 02 e0 ldi r16, 0x02 ; 2 + 1b02: 06 93 lac Z, r16 + 1b04: 7b c0 rjmp .+246 ; 0x1bfc + 1b06: 12 96 adiw r26, 0x02 ; 2 + 1b08: ad 90 ld r10, X+ + 1b0a: bc 90 ld r11, X + 1b0c: 13 97 sbiw r26, 0x03 ; 3 + 1b0e: 42 ff sbrs r20, 2 + 1b10: 10 c0 rjmp .+32 ; 0x1b32 + 1b12: 89 80 ldd r8, Y+1 ; 0x01 + 1b14: 9a 80 ldd r9, Y+2 ; 0x02 + 1b16: c9 01 movw r24, r18 + 1b18: b8 01 movw r22, r16 + 1b1a: d6 d4 rcall .+2476 ; 0x24c8 <__udivmodhi4> + 1b1c: b0 e4 ldi r27, 0x40 ; 64 + 1b1e: db 9e mul r13, r27 + 1b20: b0 01 movw r22, r0 + 1b22: 11 24 eor r1, r1 + 1b24: 6d 56 subi r22, 0x6D ; 109 + 1b26: 7f 4d sbci r23, 0xDF ; 223 + 1b28: ac 01 movw r20, r24 + 1b2a: c4 01 movw r24, r8 + 1b2c: 8e 0f add r24, r30 + 1b2e: 9f 1f adc r25, r31 + 1b30: e5 d4 rcall .+2506 ; 0x24fc + 1b32: 8d 81 ldd r24, Y+5 ; 0x05 + 1b34: 9e 81 ldd r25, Y+6 ; 0x06 + 1b36: 8a 0d add r24, r10 + 1b38: 9b 1d adc r25, r11 + 1b3a: 8d 83 std Y+5, r24 ; 0x05 + 1b3c: 9e 83 std Y+6, r25 ; 0x06 + 1b3e: 2b 81 ldd r18, Y+3 ; 0x03 + 1b40: 3c 81 ldd r19, Y+4 ; 0x04 + 1b42: 28 17 cp r18, r24 + 1b44: 39 07 cpc r19, r25 + 1b46: 10 f4 brcc .+4 ; 0x1b4c + 1b48: 2d 83 std Y+5, r18 ; 0x05 + 1b4a: 3e 83 std Y+6, r19 ; 0x06 + 1b4c: f7 01 movw r30, r14 + 1b4e: 86 81 ldd r24, Z+6 ; 0x06 + 1b50: 97 81 ldd r25, Z+7 ; 0x07 + 1b52: a8 16 cp r10, r24 + 1b54: b9 06 cpc r11, r25 + 1b56: c9 f5 brne .+114 ; 0x1bca + 1b58: 8d 81 ldd r24, Y+5 ; 0x05 + 1b5a: 9e 81 ldd r25, Y+6 ; 0x06 + 1b5c: 82 17 cp r24, r18 + 1b5e: 93 07 cpc r25, r19 + 1b60: a1 f1 breq .+104 ; 0x1bca + 1b62: 28 1b sub r18, r24 + 1b64: 39 0b sbc r19, r25 + 1b66: 21 15 cp r18, r1 + 1b68: f4 e0 ldi r31, 0x04 ; 4 + 1b6a: 3f 07 cpc r19, r31 + 1b6c: 10 f0 brcs .+4 ; 0x1b72 + 1b6e: 2f ef ldi r18, 0xFF ; 255 + 1b70: 33 e0 ldi r19, 0x03 ; 3 + 1b72: c9 01 movw r24, r18 + 1b74: b8 01 movw r22, r16 + 1b76: a8 d4 rcall .+2384 ; 0x24c8 <__udivmodhi4> + 1b78: 28 1b sub r18, r24 + 1b7a: 39 0b sbc r19, r25 + 1b7c: d7 01 movw r26, r14 + 1b7e: 12 96 adiw r26, 0x02 ; 2 + 1b80: 1d 92 st X+, r1 + 1b82: 1c 92 st X, r1 + 1b84: 13 97 sbiw r26, 0x03 ; 3 + 1b86: 20 17 cp r18, r16 + 1b88: 31 07 cpc r19, r17 + 1b8a: 78 f4 brcc .+30 ; 0x1baa + 1b8c: 88 81 ld r24, Y + 1b8e: 84 60 ori r24, 0x04 ; 4 + 1b90: 88 83 st Y, r24 + 1b92: b0 e4 ldi r27, 0x40 ; 64 + 1b94: db 9e mul r13, r27 + 1b96: c0 01 movw r24, r0 + 1b98: 11 24 eor r1, r1 + 1b9a: 8d 56 subi r24, 0x6D ; 109 + 1b9c: 9f 4d sbci r25, 0xDF ; 223 + 1b9e: f7 01 movw r30, r14 + 1ba0: 84 83 std Z+4, r24 ; 0x04 + 1ba2: 95 83 std Z+5, r25 ; 0x05 + 1ba4: 06 83 std Z+6, r16 ; 0x06 + 1ba6: 17 83 std Z+7, r17 ; 0x07 + 1ba8: aa cf rjmp .-172 ; 0x1afe + 1baa: 49 81 ldd r20, Y+1 ; 0x01 + 1bac: 5a 81 ldd r21, Y+2 ; 0x02 + 1bae: 8d 81 ldd r24, Y+5 ; 0x05 + 1bb0: 9e 81 ldd r25, Y+6 ; 0x06 + 1bb2: 84 0f add r24, r20 + 1bb4: 95 1f adc r25, r21 + 1bb6: d7 01 movw r26, r14 + 1bb8: 14 96 adiw r26, 0x04 ; 4 + 1bba: 8d 93 st X+, r24 + 1bbc: 9c 93 st X, r25 + 1bbe: 15 97 sbiw r26, 0x05 ; 5 + 1bc0: 16 96 adiw r26, 0x06 ; 6 + 1bc2: 2d 93 st X+, r18 + 1bc4: 3c 93 st X, r19 + 1bc6: 17 97 sbiw r26, 0x07 ; 7 + 1bc8: 9a cf rjmp .-204 ; 0x1afe + 1bca: 88 81 ld r24, Y + 1bcc: 80 ff sbrs r24, 0 + 1bce: 16 c0 rjmp .+44 ; 0x1bfc + 1bd0: 8e 7f andi r24, 0xFE ; 254 + 1bd2: 88 83 st Y, r24 + 1bd4: ef 81 ldd r30, Y+7 ; 0x07 + 1bd6: f8 85 ldd r31, Y+8 ; 0x08 + 1bd8: 30 97 sbiw r30, 0x00 ; 0 + 1bda: 81 f0 breq .+32 ; 0x1bfc + 1bdc: 6d 81 ldd r22, Y+5 ; 0x05 + 1bde: 7e 81 ldd r23, Y+6 ; 0x06 + 1be0: 4d 2d mov r20, r13 + 1be2: 80 e0 ldi r24, 0x00 ; 0 + 1be4: df 91 pop r29 + 1be6: cf 91 pop r28 + 1be8: 1f 91 pop r17 + 1bea: 0f 91 pop r16 + 1bec: ff 90 pop r15 + 1bee: ef 90 pop r14 + 1bf0: df 90 pop r13 + 1bf2: bf 90 pop r11 + 1bf4: af 90 pop r10 + 1bf6: 9f 90 pop r9 + 1bf8: 8f 90 pop r8 + 1bfa: 09 94 ijmp + 1bfc: df 91 pop r29 + 1bfe: cf 91 pop r28 + 1c00: 1f 91 pop r17 + 1c02: 0f 91 pop r16 + 1c04: ff 90 pop r15 + 1c06: ef 90 pop r14 + 1c08: df 90 pop r13 + 1c0a: bf 90 pop r11 + 1c0c: af 90 pop r10 + 1c0e: 9f 90 pop r9 + 1c10: 8f 90 pop r8 + 1c12: 08 95 ret -00001a3e : - 1a3e: 8f 92 push r8 - 1a40: 9f 92 push r9 - 1a42: af 92 push r10 - 1a44: bf 92 push r11 - 1a46: df 92 push r13 - 1a48: ef 92 push r14 - 1a4a: ff 92 push r15 - 1a4c: 0f 93 push r16 - 1a4e: 1f 93 push r17 - 1a50: cf 93 push r28 - 1a52: df 93 push r29 - 1a54: d8 2e mov r13, r24 - 1a56: d9 df rcall .-78 ; 0x1a0a - 1a58: ec 01 movw r28, r24 - 1a5a: 8d 2d mov r24, r13 - 1a5c: 74 df rcall .-280 ; 0x1946 - 1a5e: 7c 01 movw r14, r24 - 1a60: dc 01 movw r26, r24 - 1a62: 11 96 adiw r26, 0x01 ; 1 - 1a64: ec 91 ld r30, X - 1a66: e7 70 andi r30, 0x07 ; 7 - 1a68: e1 50 subi r30, 0x01 ; 1 - 1a6a: e7 30 cpi r30, 0x07 ; 7 - 1a6c: 40 f4 brcc .+16 ; 0x1a7e - 1a6e: f0 e0 ldi r31, 0x00 ; 0 - 1a70: ee 0f add r30, r30 - 1a72: ff 1f adc r31, r31 - 1a74: ee 54 subi r30, 0x4E ; 78 - 1a76: ff 4d sbci r31, 0xDF ; 223 - 1a78: 00 81 ld r16, Z - 1a7a: 11 81 ldd r17, Z+1 ; 0x01 - 1a7c: 02 c0 rjmp .+4 ; 0x1a82 - 1a7e: 08 e0 ldi r16, 0x08 ; 8 - 1a80: 10 e0 ldi r17, 0x00 ; 0 - 1a82: ed 81 ldd r30, Y+5 ; 0x05 - 1a84: fe 81 ldd r31, Y+6 ; 0x06 - 1a86: 2b 81 ldd r18, Y+3 ; 0x03 - 1a88: 3c 81 ldd r19, Y+4 ; 0x04 - 1a8a: 48 81 ld r20, Y - 1a8c: d7 01 movw r26, r14 - 1a8e: d7 fe sbrs r13, 7 - 1a90: 48 c0 rjmp .+144 ; 0x1b22 - 1a92: 16 96 adiw r26, 0x06 ; 6 - 1a94: 8d 91 ld r24, X+ - 1a96: 9c 91 ld r25, X - 1a98: 17 97 sbiw r26, 0x07 ; 7 - 1a9a: 8e 0f add r24, r30 - 1a9c: 9f 1f adc r25, r31 - 1a9e: 8d 83 std Y+5, r24 ; 0x05 - 1aa0: 9e 83 std Y+6, r25 ; 0x06 - 1aa2: 82 17 cp r24, r18 - 1aa4: 93 07 cpc r25, r19 - 1aa6: 61 f1 breq .+88 ; 0x1b00 - 1aa8: 28 1b sub r18, r24 - 1aaa: 39 0b sbc r19, r25 - 1aac: 21 15 cp r18, r1 - 1aae: b4 e0 ldi r27, 0x04 ; 4 - 1ab0: 3b 07 cpc r19, r27 - 1ab2: 38 f0 brcs .+14 ; 0x1ac2 - 1ab4: 2f ef ldi r18, 0xFF ; 255 - 1ab6: 33 e0 ldi r19, 0x03 ; 3 - 1ab8: c9 01 movw r24, r18 - 1aba: b8 01 movw r22, r16 - 1abc: 13 d5 rcall .+2598 ; 0x24e4 <__udivmodhi4> - 1abe: 28 1b sub r18, r24 - 1ac0: 39 0b sbc r19, r25 - 1ac2: 41 ff sbrs r20, 1 - 1ac4: 0a c0 rjmp .+20 ; 0x1ada - 1ac6: c9 01 movw r24, r18 - 1ac8: b8 01 movw r22, r16 - 1aca: 0c d5 rcall .+2584 ; 0x24e4 <__udivmodhi4> - 1acc: ac 01 movw r20, r24 - 1ace: 91 e0 ldi r25, 0x01 ; 1 - 1ad0: 45 2b or r20, r21 - 1ad2: 09 f0 breq .+2 ; 0x1ad6 - 1ad4: 90 e0 ldi r25, 0x00 ; 0 - 1ad6: 89 2f mov r24, r25 - 1ad8: 01 c0 rjmp .+2 ; 0x1adc - 1ada: 80 e0 ldi r24, 0x00 ; 0 - 1adc: 98 81 ld r25, Y - 1ade: 80 fb bst r24, 0 - 1ae0: 91 f9 bld r25, 1 - 1ae2: 98 83 st Y, r25 - 1ae4: f7 01 movw r30, r14 - 1ae6: 16 82 std Z+6, r1 ; 0x06 - 1ae8: 17 82 std Z+7, r1 ; 0x07 - 1aea: 22 83 std Z+2, r18 ; 0x02 - 1aec: 33 83 std Z+3, r19 ; 0x03 - 1aee: 29 81 ldd r18, Y+1 ; 0x01 - 1af0: 3a 81 ldd r19, Y+2 ; 0x02 - 1af2: 8d 81 ldd r24, Y+5 ; 0x05 - 1af4: 9e 81 ldd r25, Y+6 ; 0x06 - 1af6: 82 0f add r24, r18 - 1af8: 93 1f adc r25, r19 - 1afa: 84 83 std Z+4, r24 ; 0x04 - 1afc: 95 83 std Z+5, r25 ; 0x05 - 1afe: 0e c0 rjmp .+28 ; 0x1b1c - 1b00: 41 ff sbrs r20, 1 - 1b02: 71 c0 rjmp .+226 ; 0x1be6 - 1b04: 4d 7f andi r20, 0xFD ; 253 - 1b06: 48 83 st Y, r20 - 1b08: d7 01 movw r26, r14 - 1b0a: 16 96 adiw r26, 0x06 ; 6 - 1b0c: 1d 92 st X+, r1 - 1b0e: 1c 92 st X, r1 - 1b10: 17 97 sbiw r26, 0x07 ; 7 - 1b12: 12 96 adiw r26, 0x02 ; 2 - 1b14: 1d 92 st X+, r1 - 1b16: 1c 92 st X, r1 - 1b18: 13 97 sbiw r26, 0x03 ; 3 - 1b1a: f7 01 movw r30, r14 - 1b1c: 02 e0 ldi r16, 0x02 ; 2 - 1b1e: 06 93 lac Z, r16 - 1b20: 7b c0 rjmp .+246 ; 0x1c18 - 1b22: 12 96 adiw r26, 0x02 ; 2 - 1b24: ad 90 ld r10, X+ - 1b26: bc 90 ld r11, X - 1b28: 13 97 sbiw r26, 0x03 ; 3 - 1b2a: 42 ff sbrs r20, 2 - 1b2c: 10 c0 rjmp .+32 ; 0x1b4e - 1b2e: 89 80 ldd r8, Y+1 ; 0x01 - 1b30: 9a 80 ldd r9, Y+2 ; 0x02 - 1b32: c9 01 movw r24, r18 - 1b34: b8 01 movw r22, r16 - 1b36: d6 d4 rcall .+2476 ; 0x24e4 <__udivmodhi4> - 1b38: b0 e4 ldi r27, 0x40 ; 64 - 1b3a: db 9e mul r13, r27 - 1b3c: b0 01 movw r22, r0 - 1b3e: 11 24 eor r1, r1 - 1b40: 6d 56 subi r22, 0x6D ; 109 - 1b42: 7f 4d sbci r23, 0xDF ; 223 - 1b44: ac 01 movw r20, r24 - 1b46: c4 01 movw r24, r8 - 1b48: 8e 0f add r24, r30 - 1b4a: 9f 1f adc r25, r31 - 1b4c: e5 d4 rcall .+2506 ; 0x2518 - 1b4e: 8d 81 ldd r24, Y+5 ; 0x05 - 1b50: 9e 81 ldd r25, Y+6 ; 0x06 - 1b52: 8a 0d add r24, r10 - 1b54: 9b 1d adc r25, r11 - 1b56: 8d 83 std Y+5, r24 ; 0x05 - 1b58: 9e 83 std Y+6, r25 ; 0x06 - 1b5a: 2b 81 ldd r18, Y+3 ; 0x03 - 1b5c: 3c 81 ldd r19, Y+4 ; 0x04 - 1b5e: 28 17 cp r18, r24 - 1b60: 39 07 cpc r19, r25 - 1b62: 10 f4 brcc .+4 ; 0x1b68 - 1b64: 2d 83 std Y+5, r18 ; 0x05 - 1b66: 3e 83 std Y+6, r19 ; 0x06 - 1b68: f7 01 movw r30, r14 - 1b6a: 86 81 ldd r24, Z+6 ; 0x06 - 1b6c: 97 81 ldd r25, Z+7 ; 0x07 - 1b6e: a8 16 cp r10, r24 - 1b70: b9 06 cpc r11, r25 - 1b72: c9 f5 brne .+114 ; 0x1be6 - 1b74: 8d 81 ldd r24, Y+5 ; 0x05 - 1b76: 9e 81 ldd r25, Y+6 ; 0x06 - 1b78: 82 17 cp r24, r18 - 1b7a: 93 07 cpc r25, r19 - 1b7c: a1 f1 breq .+104 ; 0x1be6 - 1b7e: 28 1b sub r18, r24 - 1b80: 39 0b sbc r19, r25 - 1b82: 21 15 cp r18, r1 - 1b84: f4 e0 ldi r31, 0x04 ; 4 - 1b86: 3f 07 cpc r19, r31 - 1b88: 10 f0 brcs .+4 ; 0x1b8e - 1b8a: 2f ef ldi r18, 0xFF ; 255 - 1b8c: 33 e0 ldi r19, 0x03 ; 3 - 1b8e: c9 01 movw r24, r18 - 1b90: b8 01 movw r22, r16 - 1b92: a8 d4 rcall .+2384 ; 0x24e4 <__udivmodhi4> - 1b94: 28 1b sub r18, r24 - 1b96: 39 0b sbc r19, r25 - 1b98: d7 01 movw r26, r14 - 1b9a: 12 96 adiw r26, 0x02 ; 2 - 1b9c: 1d 92 st X+, r1 - 1b9e: 1c 92 st X, r1 - 1ba0: 13 97 sbiw r26, 0x03 ; 3 - 1ba2: 20 17 cp r18, r16 - 1ba4: 31 07 cpc r19, r17 - 1ba6: 78 f4 brcc .+30 ; 0x1bc6 - 1ba8: 88 81 ld r24, Y - 1baa: 84 60 ori r24, 0x04 ; 4 - 1bac: 88 83 st Y, r24 - 1bae: b0 e4 ldi r27, 0x40 ; 64 - 1bb0: db 9e mul r13, r27 - 1bb2: c0 01 movw r24, r0 - 1bb4: 11 24 eor r1, r1 - 1bb6: 8d 56 subi r24, 0x6D ; 109 - 1bb8: 9f 4d sbci r25, 0xDF ; 223 - 1bba: f7 01 movw r30, r14 - 1bbc: 84 83 std Z+4, r24 ; 0x04 - 1bbe: 95 83 std Z+5, r25 ; 0x05 - 1bc0: 06 83 std Z+6, r16 ; 0x06 - 1bc2: 17 83 std Z+7, r17 ; 0x07 - 1bc4: aa cf rjmp .-172 ; 0x1b1a - 1bc6: 49 81 ldd r20, Y+1 ; 0x01 - 1bc8: 5a 81 ldd r21, Y+2 ; 0x02 - 1bca: 8d 81 ldd r24, Y+5 ; 0x05 - 1bcc: 9e 81 ldd r25, Y+6 ; 0x06 - 1bce: 84 0f add r24, r20 - 1bd0: 95 1f adc r25, r21 - 1bd2: d7 01 movw r26, r14 - 1bd4: 14 96 adiw r26, 0x04 ; 4 - 1bd6: 8d 93 st X+, r24 - 1bd8: 9c 93 st X, r25 - 1bda: 15 97 sbiw r26, 0x05 ; 5 - 1bdc: 16 96 adiw r26, 0x06 ; 6 - 1bde: 2d 93 st X+, r18 - 1be0: 3c 93 st X, r19 - 1be2: 17 97 sbiw r26, 0x07 ; 7 - 1be4: 9a cf rjmp .-204 ; 0x1b1a - 1be6: 88 81 ld r24, Y - 1be8: 80 ff sbrs r24, 0 - 1bea: 16 c0 rjmp .+44 ; 0x1c18 - 1bec: 8e 7f andi r24, 0xFE ; 254 - 1bee: 88 83 st Y, r24 - 1bf0: ef 81 ldd r30, Y+7 ; 0x07 - 1bf2: f8 85 ldd r31, Y+8 ; 0x08 - 1bf4: 30 97 sbiw r30, 0x00 ; 0 - 1bf6: 81 f0 breq .+32 ; 0x1c18 - 1bf8: 6d 81 ldd r22, Y+5 ; 0x05 - 1bfa: 7e 81 ldd r23, Y+6 ; 0x06 - 1bfc: 4d 2d mov r20, r13 - 1bfe: 80 e0 ldi r24, 0x00 ; 0 - 1c00: df 91 pop r29 - 1c02: cf 91 pop r28 - 1c04: 1f 91 pop r17 - 1c06: 0f 91 pop r16 - 1c08: ff 90 pop r15 - 1c0a: ef 90 pop r14 - 1c0c: df 90 pop r13 - 1c0e: bf 90 pop r11 - 1c10: af 90 pop r10 - 1c12: 9f 90 pop r9 - 1c14: 8f 90 pop r8 - 1c16: 09 94 ijmp - 1c18: df 91 pop r29 - 1c1a: cf 91 pop r28 - 1c1c: 1f 91 pop r17 - 1c1e: 0f 91 pop r16 - 1c20: ff 90 pop r15 - 1c22: ef 90 pop r14 - 1c24: df 90 pop r13 - 1c26: bf 90 pop r11 - 1c28: af 90 pop r10 - 1c2a: 9f 90 pop r9 - 1c2c: 8f 90 pop r8 - 1c2e: 08 95 ret +00001c14 : + 1c14: 0f 93 push r16 + 1c16: cf 93 push r28 + 1c18: df 93 push r29 + 1c1a: 80 91 0d 22 lds r24, 0x220D ; 0x80220d + 1c1e: 83 30 cpi r24, 0x03 ; 3 + 1c20: 29 f4 brne .+10 ; 0x1c2c + 1c22: dd de rcall .-582 ; 0x19de + 1c24: df 91 pop r29 + 1c26: cf 91 pop r28 + 1c28: 0f 91 pop r16 + 1c2a: 96 ce rjmp .-724 ; 0x1958 + 1c2c: 20 91 09 22 lds r18, 0x2209 ; 0x802209 + 1c30: 30 91 0a 22 lds r19, 0x220A ; 0x80220a + 1c34: c0 91 74 24 lds r28, 0x2474 ; 0x802474 + 1c38: d0 91 75 24 lds r29, 0x2475 ; 0x802475 + 1c3c: c2 1b sub r28, r18 + 1c3e: d3 0b sbc r29, r19 + 1c40: 61 f5 brne .+88 ; 0x1c9a + 1c42: 80 91 0b 22 lds r24, 0x220B ; 0x80220b + 1c46: 90 91 0c 22 lds r25, 0x220C ; 0x80220c + 1c4a: 82 0f add r24, r18 + 1c4c: 93 1f adc r25, r19 + 1c4e: 80 93 0b 22 sts 0x220B, r24 ; 0x80220b + 1c52: 90 93 0c 22 sts 0x220C, r25 ; 0x80220c + 1c56: 20 91 70 24 lds r18, 0x2470 ; 0x802470 + 1c5a: 30 91 71 24 lds r19, 0x2471 ; 0x802471 + 1c5e: 28 17 cp r18, r24 + 1c60: 39 07 cpc r19, r25 + 1c62: 21 f0 breq .+8 ; 0x1c6c + 1c64: 80 91 d2 20 lds r24, 0x20D2 ; 0x8020d2 + 1c68: 88 23 and r24, r24 + 1c6a: 31 f0 breq .+12 ; 0x1c78 + 1c6c: 84 e0 ldi r24, 0x04 ; 4 + 1c6e: 80 93 0d 22 sts 0x220D, r24 ; 0x80220d + 1c72: e0 e2 ldi r30, 0x20 ; 32 + 1c74: f2 e2 ldi r31, 0x22 ; 34 + 1c76: 36 c0 rjmp .+108 ; 0x1ce4 + 1c78: e0 91 78 24 lds r30, 0x2478 ; 0x802478 + 1c7c: f0 91 79 24 lds r31, 0x2479 ; 0x802479 + 1c80: 30 97 sbiw r30, 0x00 ; 0 + 1c82: 99 f0 breq .+38 ; 0x1caa + 1c84: 09 95 icall + 1c86: 88 23 and r24, r24 + 1c88: 81 f0 breq .+32 ; 0x1caa + 1c8a: 10 92 09 22 sts 0x2209, r1 ; 0x802209 + 1c8e: 10 92 0a 22 sts 0x220A, r1 ; 0x80220a + 1c92: c0 91 74 24 lds r28, 0x2474 ; 0x802474 + 1c96: d0 91 75 24 lds r29, 0x2475 ; 0x802475 + 1c9a: c0 34 cpi r28, 0x40 ; 64 + 1c9c: d1 05 cpc r29, r1 + 1c9e: 28 f0 brcs .+10 ; 0x1caa + 1ca0: 10 92 d2 20 sts 0x20D2, r1 ; 0x8020d2 + 1ca4: c0 e4 ldi r28, 0x40 ; 64 + 1ca6: d0 e0 ldi r29, 0x00 ; 0 + 1ca8: 03 c0 rjmp .+6 ; 0x1cb0 + 1caa: 81 e0 ldi r24, 0x01 ; 1 + 1cac: 80 93 d2 20 sts 0x20D2, r24 ; 0x8020d2 + 1cb0: c0 93 2a 22 sts 0x222A, r28 ; 0x80222a + 1cb4: d0 93 2b 22 sts 0x222B, r29 ; 0x80222b + 1cb8: 80 91 09 22 lds r24, 0x2209 ; 0x802209 + 1cbc: 90 91 0a 22 lds r25, 0x220A ; 0x80220a + 1cc0: 20 91 72 24 lds r18, 0x2472 ; 0x802472 + 1cc4: 30 91 73 24 lds r19, 0x2473 ; 0x802473 + 1cc8: 28 0f add r18, r24 + 1cca: 39 1f adc r19, r25 + 1ccc: 20 93 2c 22 sts 0x222C, r18 ; 0x80222c + 1cd0: 30 93 2d 22 sts 0x222D, r19 ; 0x80222d + 1cd4: c8 0f add r28, r24 + 1cd6: d9 1f adc r29, r25 + 1cd8: c0 93 09 22 sts 0x2209, r28 ; 0x802209 + 1cdc: d0 93 0a 22 sts 0x220A, r29 ; 0x80220a + 1ce0: e8 e2 ldi r30, 0x28 ; 40 + 1ce2: f2 e2 ldi r31, 0x22 ; 34 + 1ce4: 02 e0 ldi r16, 0x02 ; 2 + 1ce6: 06 93 lac Z, r16 + 1ce8: df 91 pop r29 + 1cea: cf 91 pop r28 + 1cec: 0f 91 pop r16 + 1cee: 08 95 ret -00001c30 : - 1c30: 0f 93 push r16 - 1c32: cf 93 push r28 - 1c34: df 93 push r29 - 1c36: 80 91 0d 22 lds r24, 0x220D ; 0x80220d - 1c3a: 83 30 cpi r24, 0x03 ; 3 - 1c3c: 29 f4 brne .+10 ; 0x1c48 - 1c3e: dd de rcall .-582 ; 0x19fa - 1c40: df 91 pop r29 - 1c42: cf 91 pop r28 - 1c44: 0f 91 pop r16 - 1c46: 96 ce rjmp .-724 ; 0x1974 - 1c48: 20 91 09 22 lds r18, 0x2209 ; 0x802209 - 1c4c: 30 91 0a 22 lds r19, 0x220A ; 0x80220a - 1c50: c0 91 70 24 lds r28, 0x2470 ; 0x802470 - 1c54: d0 91 71 24 lds r29, 0x2471 ; 0x802471 - 1c58: c2 1b sub r28, r18 - 1c5a: d3 0b sbc r29, r19 - 1c5c: 61 f5 brne .+88 ; 0x1cb6 - 1c5e: 80 91 0b 22 lds r24, 0x220B ; 0x80220b - 1c62: 90 91 0c 22 lds r25, 0x220C ; 0x80220c - 1c66: 82 0f add r24, r18 - 1c68: 93 1f adc r25, r19 - 1c6a: 80 93 0b 22 sts 0x220B, r24 ; 0x80220b - 1c6e: 90 93 0c 22 sts 0x220C, r25 ; 0x80220c - 1c72: 20 91 6c 24 lds r18, 0x246C ; 0x80246c - 1c76: 30 91 6d 24 lds r19, 0x246D ; 0x80246d - 1c7a: 28 17 cp r18, r24 - 1c7c: 39 07 cpc r19, r25 - 1c7e: 21 f0 breq .+8 ; 0x1c88 - 1c80: 80 91 d2 20 lds r24, 0x20D2 ; 0x8020d2 - 1c84: 88 23 and r24, r24 - 1c86: 31 f0 breq .+12 ; 0x1c94 - 1c88: 84 e0 ldi r24, 0x04 ; 4 - 1c8a: 80 93 0d 22 sts 0x220D, r24 ; 0x80220d - 1c8e: e0 e2 ldi r30, 0x20 ; 32 - 1c90: f2 e2 ldi r31, 0x22 ; 34 - 1c92: 36 c0 rjmp .+108 ; 0x1d00 - 1c94: e0 91 74 24 lds r30, 0x2474 ; 0x802474 - 1c98: f0 91 75 24 lds r31, 0x2475 ; 0x802475 - 1c9c: 30 97 sbiw r30, 0x00 ; 0 - 1c9e: 99 f0 breq .+38 ; 0x1cc6 - 1ca0: 09 95 icall - 1ca2: 88 23 and r24, r24 - 1ca4: 81 f0 breq .+32 ; 0x1cc6 - 1ca6: 10 92 09 22 sts 0x2209, r1 ; 0x802209 - 1caa: 10 92 0a 22 sts 0x220A, r1 ; 0x80220a - 1cae: c0 91 70 24 lds r28, 0x2470 ; 0x802470 - 1cb2: d0 91 71 24 lds r29, 0x2471 ; 0x802471 - 1cb6: c0 34 cpi r28, 0x40 ; 64 - 1cb8: d1 05 cpc r29, r1 - 1cba: 28 f0 brcs .+10 ; 0x1cc6 - 1cbc: 10 92 d2 20 sts 0x20D2, r1 ; 0x8020d2 - 1cc0: c0 e4 ldi r28, 0x40 ; 64 - 1cc2: d0 e0 ldi r29, 0x00 ; 0 - 1cc4: 03 c0 rjmp .+6 ; 0x1ccc - 1cc6: 81 e0 ldi r24, 0x01 ; 1 - 1cc8: 80 93 d2 20 sts 0x20D2, r24 ; 0x8020d2 - 1ccc: c0 93 2a 22 sts 0x222A, r28 ; 0x80222a - 1cd0: d0 93 2b 22 sts 0x222B, r29 ; 0x80222b - 1cd4: 80 91 09 22 lds r24, 0x2209 ; 0x802209 - 1cd8: 90 91 0a 22 lds r25, 0x220A ; 0x80220a - 1cdc: 20 91 6e 24 lds r18, 0x246E ; 0x80246e - 1ce0: 30 91 6f 24 lds r19, 0x246F ; 0x80246f - 1ce4: 28 0f add r18, r24 - 1ce6: 39 1f adc r19, r25 - 1ce8: 20 93 2c 22 sts 0x222C, r18 ; 0x80222c - 1cec: 30 93 2d 22 sts 0x222D, r19 ; 0x80222d - 1cf0: c8 0f add r28, r24 - 1cf2: d9 1f adc r29, r25 - 1cf4: c0 93 09 22 sts 0x2209, r28 ; 0x802209 - 1cf8: d0 93 0a 22 sts 0x220A, r29 ; 0x80220a - 1cfc: e8 e2 ldi r30, 0x28 ; 40 - 1cfe: f2 e2 ldi r31, 0x22 ; 34 - 1d00: 02 e0 ldi r16, 0x02 ; 2 - 1d02: 06 93 lac Z, r16 - 1d04: df 91 pop r29 - 1d06: cf 91 pop r28 - 1d08: 0f 91 pop r16 - 1d0a: 08 95 ret +00001cf0 : + 1cf0: 0f 93 push r16 + 1cf2: cf 93 push r28 + 1cf4: df 93 push r29 + 1cf6: 1f 92 push r1 + 1cf8: cd b7 in r28, 0x3d ; 61 + 1cfa: de b7 in r29, 0x3e ; 62 + 1cfc: 80 91 cc 04 lds r24, 0x04CC ; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc> + 1d00: 80 ff sbrs r24, 0 + 1d02: 65 c0 rjmp .+202 ; 0x1dce + 1d04: 21 e0 ldi r18, 0x01 ; 1 + 1d06: 20 93 cc 04 sts 0x04CC, r18 ; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc> + 1d0a: 80 e2 ldi r24, 0x20 ; 32 + 1d0c: 92 e2 ldi r25, 0x22 ; 34 + 1d0e: fc 01 movw r30, r24 + 1d10: 00 e8 ldi r16, 0x80 ; 128 + 1d12: 06 93 lac Z, r16 + 1d14: e8 e2 ldi r30, 0x28 ; 40 + 1d16: f2 e2 ldi r31, 0x22 ; 34 + 1d18: 00 e8 ldi r16, 0x80 ; 128 + 1d1a: 06 93 lac Z, r16 + 1d1c: 20 93 ca 04 sts 0x04CA, r18 ; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca> + 1d20: fc 01 movw r30, r24 + 1d22: 00 e1 ldi r16, 0x10 ; 16 + 1d24: 06 93 lac Z, r16 + 1d26: 80 91 0d 22 lds r24, 0x220D ; 0x80220d + 1d2a: 88 23 and r24, r24 + 1d2c: 29 f0 breq .+10 ; 0x1d38 + 1d2e: 83 50 subi r24, 0x03 ; 3 + 1d30: 82 30 cpi r24, 0x02 ; 2 + 1d32: 08 f4 brcc .+2 ; 0x1d36 + 1d34: 54 de rcall .-856 ; 0x19de + 1d36: 10 de rcall .-992 ; 0x1958 + 1d38: 80 91 22 22 lds r24, 0x2222 ; 0x802222 + 1d3c: 90 91 23 22 lds r25, 0x2223 ; 0x802223 + 1d40: 08 97 sbiw r24, 0x08 ; 8 + 1d42: 09 f0 breq .+2 ; 0x1d46 + 1d44: 46 c0 rjmp .+140 ; 0x1dd2 + 1d46: 88 e0 ldi r24, 0x08 ; 8 + 1d48: e9 ec ldi r30, 0xC9 ; 201 + 1d4a: f1 e2 ldi r31, 0x21 ; 33 + 1d4c: aa e6 ldi r26, 0x6A ; 106 + 1d4e: b4 e2 ldi r27, 0x24 ; 36 + 1d50: 01 90 ld r0, Z+ + 1d52: 0d 92 st X+, r0 + 1d54: 8a 95 dec r24 + 1d56: e1 f7 brne .-8 ; 0x1d50 + 1d58: 80 91 c8 04 lds r24, 0x04C8 ; 0x8004c8 <__TEXT_REGION_LENGTH__+0x7004c8> + 1d5c: 80 62 ori r24, 0x20 ; 32 + 1d5e: 80 93 c8 04 sts 0x04C8, r24 ; 0x8004c8 <__TEXT_REGION_LENGTH__+0x7004c8> + 1d62: 80 91 c8 04 lds r24, 0x04C8 ; 0x8004c8 <__TEXT_REGION_LENGTH__+0x7004c8> + 1d66: 80 62 ori r24, 0x20 ; 32 + 1d68: 80 93 c8 04 sts 0x04C8, r24 ; 0x8004c8 <__TEXT_REGION_LENGTH__+0x7004c8> + 1d6c: 69 da rcall .-2862 ; 0x1240 + 1d6e: 81 11 cpse r24, r1 + 1d70: 02 c0 rjmp .+4 ; 0x1d76 + 1d72: 19 de rcall .-974 ; 0x19a6 + 1d74: 2e c0 rjmp .+92 ; 0x1dd2 + 1d76: 90 91 6a 24 lds r25, 0x246A ; 0x80246a + 1d7a: 97 ff sbrs r25, 7 + 1d7c: 0e c0 rjmp .+28 ; 0x1d9a + 1d7e: 10 92 0b 22 sts 0x220B, r1 ; 0x80220b + 1d82: 10 92 0c 22 sts 0x220C, r1 ; 0x80220c + 1d86: 10 92 09 22 sts 0x2209, r1 ; 0x802209 + 1d8a: 10 92 0a 22 sts 0x220A, r1 ; 0x80220a + 1d8e: 92 e0 ldi r25, 0x02 ; 2 + 1d90: 90 93 0d 22 sts 0x220D, r25 ; 0x80220d + 1d94: 89 83 std Y+1, r24 ; 0x01 + 1d96: 3e df rcall .-388 ; 0x1c14 + 1d98: 08 c0 rjmp .+16 ; 0x1daa + 1d9a: 20 91 70 24 lds r18, 0x2470 ; 0x802470 + 1d9e: 30 91 71 24 lds r19, 0x2471 ; 0x802471 + 1da2: 23 2b or r18, r19 + 1da4: 21 f4 brne .+8 ; 0x1dae + 1da6: 89 83 std Y+1, r24 ; 0x01 + 1da8: 0c de rcall .-1000 ; 0x19c2 + 1daa: 89 81 ldd r24, Y+1 ; 0x01 + 1dac: 13 c0 rjmp .+38 ; 0x1dd4 + 1dae: 10 92 0b 22 sts 0x220B, r1 ; 0x80220b + 1db2: 10 92 0c 22 sts 0x220C, r1 ; 0x80220c + 1db6: 10 92 09 22 sts 0x2209, r1 ; 0x802209 + 1dba: 10 92 0a 22 sts 0x220A, r1 ; 0x80220a + 1dbe: 91 e0 ldi r25, 0x01 ; 1 + 1dc0: 90 93 0d 22 sts 0x220D, r25 ; 0x80220d + 1dc4: e0 e2 ldi r30, 0x20 ; 32 + 1dc6: f2 e2 ldi r31, 0x22 ; 34 + 1dc8: 02 e0 ldi r16, 0x02 ; 2 + 1dca: 06 93 lac Z, r16 + 1dcc: 03 c0 rjmp .+6 ; 0x1dd4 + 1dce: 80 e0 ldi r24, 0x00 ; 0 + 1dd0: 01 c0 rjmp .+2 ; 0x1dd4 + 1dd2: 81 e0 ldi r24, 0x01 ; 1 + 1dd4: 0f 90 pop r0 + 1dd6: df 91 pop r29 + 1dd8: cf 91 pop r28 + 1dda: 0f 91 pop r16 + 1ddc: 08 95 ret -00001d0c : - 1d0c: 0f 93 push r16 - 1d0e: cf 93 push r28 - 1d10: df 93 push r29 - 1d12: 1f 92 push r1 - 1d14: cd b7 in r28, 0x3d ; 61 - 1d16: de b7 in r29, 0x3e ; 62 - 1d18: 80 91 cc 04 lds r24, 0x04CC ; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc> - 1d1c: 80 ff sbrs r24, 0 - 1d1e: 65 c0 rjmp .+202 ; 0x1dea - 1d20: 21 e0 ldi r18, 0x01 ; 1 - 1d22: 20 93 cc 04 sts 0x04CC, r18 ; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc> - 1d26: 80 e2 ldi r24, 0x20 ; 32 - 1d28: 92 e2 ldi r25, 0x22 ; 34 - 1d2a: fc 01 movw r30, r24 - 1d2c: 00 e8 ldi r16, 0x80 ; 128 - 1d2e: 06 93 lac Z, r16 - 1d30: e8 e2 ldi r30, 0x28 ; 40 - 1d32: f2 e2 ldi r31, 0x22 ; 34 - 1d34: 00 e8 ldi r16, 0x80 ; 128 - 1d36: 06 93 lac Z, r16 - 1d38: 20 93 ca 04 sts 0x04CA, r18 ; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca> - 1d3c: fc 01 movw r30, r24 - 1d3e: 00 e1 ldi r16, 0x10 ; 16 - 1d40: 06 93 lac Z, r16 - 1d42: 80 91 0d 22 lds r24, 0x220D ; 0x80220d - 1d46: 88 23 and r24, r24 - 1d48: 29 f0 breq .+10 ; 0x1d54 - 1d4a: 83 50 subi r24, 0x03 ; 3 - 1d4c: 82 30 cpi r24, 0x02 ; 2 - 1d4e: 08 f4 brcc .+2 ; 0x1d52 - 1d50: 54 de rcall .-856 ; 0x19fa - 1d52: 10 de rcall .-992 ; 0x1974 - 1d54: 80 91 22 22 lds r24, 0x2222 ; 0x802222 - 1d58: 90 91 23 22 lds r25, 0x2223 ; 0x802223 - 1d5c: 08 97 sbiw r24, 0x08 ; 8 - 1d5e: 09 f0 breq .+2 ; 0x1d62 - 1d60: 46 c0 rjmp .+140 ; 0x1dee - 1d62: 88 e0 ldi r24, 0x08 ; 8 - 1d64: e9 ec ldi r30, 0xC9 ; 201 - 1d66: f1 e2 ldi r31, 0x21 ; 33 - 1d68: a6 e6 ldi r26, 0x66 ; 102 - 1d6a: b4 e2 ldi r27, 0x24 ; 36 - 1d6c: 01 90 ld r0, Z+ - 1d6e: 0d 92 st X+, r0 - 1d70: 8a 95 dec r24 - 1d72: e1 f7 brne .-8 ; 0x1d6c - 1d74: 80 91 c8 04 lds r24, 0x04C8 ; 0x8004c8 <__TEXT_REGION_LENGTH__+0x7004c8> - 1d78: 80 62 ori r24, 0x20 ; 32 - 1d7a: 80 93 c8 04 sts 0x04C8, r24 ; 0x8004c8 <__TEXT_REGION_LENGTH__+0x7004c8> - 1d7e: 80 91 c8 04 lds r24, 0x04C8 ; 0x8004c8 <__TEXT_REGION_LENGTH__+0x7004c8> - 1d82: 80 62 ori r24, 0x20 ; 32 - 1d84: 80 93 c8 04 sts 0x04C8, r24 ; 0x8004c8 <__TEXT_REGION_LENGTH__+0x7004c8> - 1d88: 69 da rcall .-2862 ; 0x125c - 1d8a: 81 11 cpse r24, r1 - 1d8c: 02 c0 rjmp .+4 ; 0x1d92 - 1d8e: 19 de rcall .-974 ; 0x19c2 - 1d90: 2e c0 rjmp .+92 ; 0x1dee - 1d92: 90 91 66 24 lds r25, 0x2466 ; 0x802466 - 1d96: 97 ff sbrs r25, 7 - 1d98: 0e c0 rjmp .+28 ; 0x1db6 - 1d9a: 10 92 0b 22 sts 0x220B, r1 ; 0x80220b - 1d9e: 10 92 0c 22 sts 0x220C, r1 ; 0x80220c - 1da2: 10 92 09 22 sts 0x2209, r1 ; 0x802209 - 1da6: 10 92 0a 22 sts 0x220A, r1 ; 0x80220a - 1daa: 92 e0 ldi r25, 0x02 ; 2 - 1dac: 90 93 0d 22 sts 0x220D, r25 ; 0x80220d - 1db0: 89 83 std Y+1, r24 ; 0x01 - 1db2: 3e df rcall .-388 ; 0x1c30 - 1db4: 08 c0 rjmp .+16 ; 0x1dc6 - 1db6: 20 91 6c 24 lds r18, 0x246C ; 0x80246c - 1dba: 30 91 6d 24 lds r19, 0x246D ; 0x80246d - 1dbe: 23 2b or r18, r19 - 1dc0: 21 f4 brne .+8 ; 0x1dca - 1dc2: 89 83 std Y+1, r24 ; 0x01 - 1dc4: 0c de rcall .-1000 ; 0x19de - 1dc6: 89 81 ldd r24, Y+1 ; 0x01 - 1dc8: 13 c0 rjmp .+38 ; 0x1df0 - 1dca: 10 92 0b 22 sts 0x220B, r1 ; 0x80220b - 1dce: 10 92 0c 22 sts 0x220C, r1 ; 0x80220c - 1dd2: 10 92 09 22 sts 0x2209, r1 ; 0x802209 - 1dd6: 10 92 0a 22 sts 0x220A, r1 ; 0x80220a - 1dda: 91 e0 ldi r25, 0x01 ; 1 - 1ddc: 90 93 0d 22 sts 0x220D, r25 ; 0x80220d - 1de0: e0 e2 ldi r30, 0x20 ; 32 - 1de2: f2 e2 ldi r31, 0x22 ; 34 - 1de4: 02 e0 ldi r16, 0x02 ; 2 - 1de6: 06 93 lac Z, r16 - 1de8: 03 c0 rjmp .+6 ; 0x1df0 - 1dea: 80 e0 ldi r24, 0x00 ; 0 - 1dec: 01 c0 rjmp .+2 ; 0x1df0 - 1dee: 81 e0 ldi r24, 0x01 ; 1 - 1df0: 0f 90 pop r0 - 1df2: df 91 pop r29 - 1df4: cf 91 pop r28 - 1df6: 0f 91 pop r16 - 1df8: 08 95 ret +00001dde : + 1dde: cf 93 push r28 + 1de0: cf b7 in r28, 0x3f ; 63 + 1de2: f8 94 cli + 1de4: 81 e0 ldi r24, 0x01 ; 1 + 1de6: 8e dd rcall .-1252 ; 0x1904 + 1de8: ea ec ldi r30, 0xCA ; 202 + 1dea: f4 e0 ldi r31, 0x04 ; 4 + 1dec: 80 e4 ldi r24, 0x40 ; 64 + 1dee: 80 83 st Z, r24 + 1df0: 80 e2 ldi r24, 0x20 ; 32 + 1df2: 80 83 st Z, r24 + 1df4: e1 ec ldi r30, 0xC1 ; 193 + 1df6: f4 e0 ldi r31, 0x04 ; 4 + 1df8: 80 81 ld r24, Z + 1dfa: 81 60 ori r24, 0x01 ; 1 + 1dfc: 80 83 st Z, r24 + 1dfe: a9 ec ldi r26, 0xC9 ; 201 + 1e00: b4 e0 ldi r27, 0x04 ; 4 + 1e02: 8c 91 ld r24, X + 1e04: 82 60 ori r24, 0x02 ; 2 + 1e06: 8c 93 st X, r24 + 1e08: e8 ec ldi r30, 0xC8 ; 200 + 1e0a: f4 e0 ldi r31, 0x04 ; 4 + 1e0c: 80 81 ld r24, Z + 1e0e: 80 64 ori r24, 0x40 ; 64 + 1e10: 80 83 st Z, r24 + 1e12: 8c 91 ld r24, X + 1e14: 81 60 ori r24, 0x01 ; 1 + 1e16: 8c 93 st X, r24 + 1e18: 80 81 ld r24, Z + 1e1a: 80 68 ori r24, 0x80 ; 128 + 1e1c: 80 83 st Z, r24 + 1e1e: cf bf out 0x3f, r28 ; 63 + 1e20: cf 91 pop r28 + 1e22: 08 95 ret -00001dfa : - 1dfa: cf 93 push r28 - 1dfc: cf b7 in r28, 0x3f ; 63 - 1dfe: f8 94 cli - 1e00: 81 e0 ldi r24, 0x01 ; 1 - 1e02: 8e dd rcall .-1252 ; 0x1920 - 1e04: ea ec ldi r30, 0xCA ; 202 - 1e06: f4 e0 ldi r31, 0x04 ; 4 - 1e08: 80 e4 ldi r24, 0x40 ; 64 - 1e0a: 80 83 st Z, r24 - 1e0c: 80 e2 ldi r24, 0x20 ; 32 - 1e0e: 80 83 st Z, r24 - 1e10: e1 ec ldi r30, 0xC1 ; 193 - 1e12: f4 e0 ldi r31, 0x04 ; 4 - 1e14: 80 81 ld r24, Z - 1e16: 81 60 ori r24, 0x01 ; 1 - 1e18: 80 83 st Z, r24 - 1e1a: a9 ec ldi r26, 0xC9 ; 201 - 1e1c: b4 e0 ldi r27, 0x04 ; 4 - 1e1e: 8c 91 ld r24, X - 1e20: 82 60 ori r24, 0x02 ; 2 - 1e22: 8c 93 st X, r24 - 1e24: e8 ec ldi r30, 0xC8 ; 200 - 1e26: f4 e0 ldi r31, 0x04 ; 4 - 1e28: 80 81 ld r24, Z - 1e2a: 80 64 ori r24, 0x40 ; 64 - 1e2c: 80 83 st Z, r24 - 1e2e: 8c 91 ld r24, X - 1e30: 81 60 ori r24, 0x01 ; 1 - 1e32: 8c 93 st X, r24 - 1e34: 80 81 ld r24, Z - 1e36: 80 68 ori r24, 0x80 ; 128 - 1e38: 80 83 st Z, r24 - 1e3a: cf bf out 0x3f, r28 ; 63 - 1e3c: cf 91 pop r28 - 1e3e: 08 95 ret +00001e24 : + 1e24: cf 93 push r28 + 1e26: 10 92 60 00 sts 0x0060, r1 ; 0x800060 <__TEXT_REGION_LENGTH__+0x700060> + 1e2a: 80 e3 ldi r24, 0x30 ; 48 + 1e2c: 9f d8 rcall .-3778 ; 0xf6c + 1e2e: 80 91 c0 04 lds r24, 0x04C0 ; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0> + 1e32: 80 64 ori r24, 0x40 ; 64 + 1e34: 80 93 c0 04 sts 0x04C0, r24 ; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0> + 1e38: 81 e0 ldi r24, 0x01 ; 1 + 1e3a: 80 93 60 00 sts 0x0060, r24 ; 0x800060 <__TEXT_REGION_LENGTH__+0x700060> + 1e3e: cf b7 in r28, 0x3f ; 63 + 1e40: f8 94 cli + 1e42: 80 e0 ldi r24, 0x00 ; 0 + 1e44: 90 e0 ldi r25, 0x00 ; 0 + 1e46: fc 01 movw r30, r24 + 1e48: 23 e0 ldi r18, 0x03 ; 3 + 1e4a: ee 0f add r30, r30 + 1e4c: ff 1f adc r31, r31 + 1e4e: 2a 95 dec r18 + 1e50: e1 f7 brne .-8 ; 0x1e4a + 1e52: e0 5f subi r30, 0xF0 ; 240 + 1e54: fd 4d sbci r31, 0xDD ; 221 + 1e56: 11 8a std Z+17, r1 ; 0x11 + 1e58: 01 96 adiw r24, 0x01 ; 1 + 1e5a: 88 30 cpi r24, 0x08 ; 8 + 1e5c: 91 05 cpc r25, r1 + 1e5e: 99 f7 brne .-26 ; 0x1e46 + 1e60: 80 91 93 21 lds r24, 0x2193 ; 0x802193 + 1e64: 8e 7f andi r24, 0xFE ; 254 + 1e66: 80 93 93 21 sts 0x2193, r24 ; 0x802193 + 1e6a: 80 91 9c 21 lds r24, 0x219C ; 0x80219c + 1e6e: 8e 7f andi r24, 0xFE ; 254 + 1e70: 80 93 9c 21 sts 0x219C, r24 ; 0x80219c + 1e74: 80 91 a5 21 lds r24, 0x21A5 ; 0x8021a5 + 1e78: 8e 7f andi r24, 0xFE ; 254 + 1e7a: 80 93 a5 21 sts 0x21A5, r24 ; 0x8021a5 + 1e7e: 80 91 ae 21 lds r24, 0x21AE ; 0x8021ae + 1e82: 8e 7f andi r24, 0xFE ; 254 + 1e84: 80 93 ae 21 sts 0x21AE, r24 ; 0x8021ae + 1e88: 80 91 b7 21 lds r24, 0x21B7 ; 0x8021b7 + 1e8c: 8e 7f andi r24, 0xFE ; 254 + 1e8e: 80 93 b7 21 sts 0x21B7, r24 ; 0x8021b7 + 1e92: 80 91 c0 21 lds r24, 0x21C0 ; 0x8021c0 + 1e96: 8e 7f andi r24, 0xFE ; 254 + 1e98: 80 93 c0 21 sts 0x21C0, r24 ; 0x8021c0 + 1e9c: 6a e1 ldi r22, 0x1A ; 26 + 1e9e: 70 e0 ldi r23, 0x00 ; 0 + 1ea0: 82 e0 ldi r24, 0x02 ; 2 + 1ea2: 08 dd rcall .-1520 ; 0x18b4 + 1ea4: 8f 3f cpi r24, 0xFF ; 255 + 1ea6: 09 f4 brne .+2 ; 0x1eaa + 1ea8: 8f e1 ldi r24, 0x1F ; 31 + 1eaa: 80 93 fa 04 sts 0x04FA, r24 ; 0x8004fa <__TEXT_REGION_LENGTH__+0x7004fa> + 1eae: 6b e1 ldi r22, 0x1B ; 27 + 1eb0: 70 e0 ldi r23, 0x00 ; 0 + 1eb2: 82 e0 ldi r24, 0x02 ; 2 + 1eb4: ff dc rcall .-1538 ; 0x18b4 + 1eb6: 8f 3f cpi r24, 0xFF ; 255 + 1eb8: 09 f4 brne .+2 ; 0x1ebc + 1eba: 8f e1 ldi r24, 0x1F ; 31 + 1ebc: 80 93 fb 04 sts 0x04FB, r24 ; 0x8004fb <__TEXT_REGION_LENGTH__+0x7004fb> + 1ec0: 80 91 c0 04 lds r24, 0x04C0 ; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0> + 1ec4: 83 60 ori r24, 0x03 ; 3 + 1ec6: 80 93 c0 04 sts 0x04C0, r24 ; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0> + 1eca: 80 91 c0 04 lds r24, 0x04C0 ; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0> + 1ece: 80 68 ori r24, 0x80 ; 128 + 1ed0: 80 93 c0 04 sts 0x04C0, r24 ; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0> + 1ed4: 80 91 c0 04 lds r24, 0x04C0 ; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0> + 1ed8: 80 61 ori r24, 0x10 ; 16 + 1eda: 80 93 c0 04 sts 0x04C0, r24 ; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0> + 1ede: 80 e2 ldi r24, 0x20 ; 32 + 1ee0: 92 e2 ldi r25, 0x22 ; 34 + 1ee2: 80 93 c6 04 sts 0x04C6, r24 ; 0x8004c6 <__TEXT_REGION_LENGTH__+0x7004c6> + 1ee6: 90 93 c7 04 sts 0x04C7, r25 ; 0x8004c7 <__TEXT_REGION_LENGTH__+0x7004c7> + 1eea: 80 91 c0 04 lds r24, 0x04C0 ; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0> + 1eee: 80 62 ori r24, 0x20 ; 32 + 1ef0: 80 93 c0 04 sts 0x04C0, r24 ; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0> + 1ef4: 8f ef ldi r24, 0xFF ; 255 + 1ef6: 80 93 c5 04 sts 0x04C5, r24 ; 0x8004c5 <__TEXT_REGION_LENGTH__+0x7004c5> + 1efa: 80 91 c8 04 lds r24, 0x04C8 ; 0x8004c8 <__TEXT_REGION_LENGTH__+0x7004c8> + 1efe: 82 60 ori r24, 0x02 ; 2 + 1f00: 80 93 c8 04 sts 0x04C8, r24 ; 0x8004c8 <__TEXT_REGION_LENGTH__+0x7004c8> + 1f04: 10 92 64 22 sts 0x2264, r1 ; 0x802264 + 1f08: 85 e0 ldi r24, 0x05 ; 5 + 1f0a: de dc rcall .-1604 ; 0x18c8 + 1f0c: 68 df rcall .-304 ; 0x1dde + 1f0e: cf bf out 0x3f, r28 ; 63 + 1f10: cf 91 pop r28 + 1f12: 08 95 ret -00001e40 : - 1e40: cf 93 push r28 - 1e42: 10 92 60 00 sts 0x0060, r1 ; 0x800060 <__TEXT_REGION_LENGTH__+0x700060> - 1e46: 80 e3 ldi r24, 0x30 ; 48 - 1e48: 9f d8 rcall .-3778 ; 0xf88 - 1e4a: 80 91 c0 04 lds r24, 0x04C0 ; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0> - 1e4e: 80 64 ori r24, 0x40 ; 64 - 1e50: 80 93 c0 04 sts 0x04C0, r24 ; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0> - 1e54: 81 e0 ldi r24, 0x01 ; 1 - 1e56: 80 93 60 00 sts 0x0060, r24 ; 0x800060 <__TEXT_REGION_LENGTH__+0x700060> - 1e5a: cf b7 in r28, 0x3f ; 63 - 1e5c: f8 94 cli - 1e5e: 80 e0 ldi r24, 0x00 ; 0 - 1e60: 90 e0 ldi r25, 0x00 ; 0 - 1e62: fc 01 movw r30, r24 - 1e64: 23 e0 ldi r18, 0x03 ; 3 - 1e66: ee 0f add r30, r30 - 1e68: ff 1f adc r31, r31 - 1e6a: 2a 95 dec r18 - 1e6c: e1 f7 brne .-8 ; 0x1e66 - 1e6e: e0 5f subi r30, 0xF0 ; 240 - 1e70: fd 4d sbci r31, 0xDD ; 221 - 1e72: 11 8a std Z+17, r1 ; 0x11 - 1e74: 01 96 adiw r24, 0x01 ; 1 - 1e76: 88 30 cpi r24, 0x08 ; 8 - 1e78: 91 05 cpc r25, r1 - 1e7a: 99 f7 brne .-26 ; 0x1e62 - 1e7c: 80 91 93 21 lds r24, 0x2193 ; 0x802193 - 1e80: 8e 7f andi r24, 0xFE ; 254 - 1e82: 80 93 93 21 sts 0x2193, r24 ; 0x802193 - 1e86: 80 91 9c 21 lds r24, 0x219C ; 0x80219c - 1e8a: 8e 7f andi r24, 0xFE ; 254 - 1e8c: 80 93 9c 21 sts 0x219C, r24 ; 0x80219c - 1e90: 80 91 a5 21 lds r24, 0x21A5 ; 0x8021a5 - 1e94: 8e 7f andi r24, 0xFE ; 254 - 1e96: 80 93 a5 21 sts 0x21A5, r24 ; 0x8021a5 - 1e9a: 80 91 ae 21 lds r24, 0x21AE ; 0x8021ae - 1e9e: 8e 7f andi r24, 0xFE ; 254 - 1ea0: 80 93 ae 21 sts 0x21AE, r24 ; 0x8021ae - 1ea4: 80 91 b7 21 lds r24, 0x21B7 ; 0x8021b7 - 1ea8: 8e 7f andi r24, 0xFE ; 254 - 1eaa: 80 93 b7 21 sts 0x21B7, r24 ; 0x8021b7 - 1eae: 80 91 c0 21 lds r24, 0x21C0 ; 0x8021c0 - 1eb2: 8e 7f andi r24, 0xFE ; 254 - 1eb4: 80 93 c0 21 sts 0x21C0, r24 ; 0x8021c0 - 1eb8: 6a e1 ldi r22, 0x1A ; 26 - 1eba: 70 e0 ldi r23, 0x00 ; 0 - 1ebc: 82 e0 ldi r24, 0x02 ; 2 - 1ebe: 08 dd rcall .-1520 ; 0x18d0 - 1ec0: 8f 3f cpi r24, 0xFF ; 255 - 1ec2: 09 f4 brne .+2 ; 0x1ec6 - 1ec4: 8f e1 ldi r24, 0x1F ; 31 - 1ec6: 80 93 fa 04 sts 0x04FA, r24 ; 0x8004fa <__TEXT_REGION_LENGTH__+0x7004fa> - 1eca: 6b e1 ldi r22, 0x1B ; 27 - 1ecc: 70 e0 ldi r23, 0x00 ; 0 - 1ece: 82 e0 ldi r24, 0x02 ; 2 - 1ed0: ff dc rcall .-1538 ; 0x18d0 - 1ed2: 8f 3f cpi r24, 0xFF ; 255 - 1ed4: 09 f4 brne .+2 ; 0x1ed8 - 1ed6: 8f e1 ldi r24, 0x1F ; 31 - 1ed8: 80 93 fb 04 sts 0x04FB, r24 ; 0x8004fb <__TEXT_REGION_LENGTH__+0x7004fb> - 1edc: 80 91 c0 04 lds r24, 0x04C0 ; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0> - 1ee0: 83 60 ori r24, 0x03 ; 3 - 1ee2: 80 93 c0 04 sts 0x04C0, r24 ; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0> - 1ee6: 80 91 c0 04 lds r24, 0x04C0 ; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0> - 1eea: 80 68 ori r24, 0x80 ; 128 - 1eec: 80 93 c0 04 sts 0x04C0, r24 ; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0> - 1ef0: 80 91 c0 04 lds r24, 0x04C0 ; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0> - 1ef4: 80 61 ori r24, 0x10 ; 16 - 1ef6: 80 93 c0 04 sts 0x04C0, r24 ; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0> - 1efa: 80 e2 ldi r24, 0x20 ; 32 - 1efc: 92 e2 ldi r25, 0x22 ; 34 - 1efe: 80 93 c6 04 sts 0x04C6, r24 ; 0x8004c6 <__TEXT_REGION_LENGTH__+0x7004c6> - 1f02: 90 93 c7 04 sts 0x04C7, r25 ; 0x8004c7 <__TEXT_REGION_LENGTH__+0x7004c7> - 1f06: 80 91 c0 04 lds r24, 0x04C0 ; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0> - 1f0a: 80 62 ori r24, 0x20 ; 32 - 1f0c: 80 93 c0 04 sts 0x04C0, r24 ; 0x8004c0 <__TEXT_REGION_LENGTH__+0x7004c0> - 1f10: 8f ef ldi r24, 0xFF ; 255 - 1f12: 80 93 c5 04 sts 0x04C5, r24 ; 0x8004c5 <__TEXT_REGION_LENGTH__+0x7004c5> - 1f16: 80 91 c8 04 lds r24, 0x04C8 ; 0x8004c8 <__TEXT_REGION_LENGTH__+0x7004c8> - 1f1a: 82 60 ori r24, 0x02 ; 2 - 1f1c: 80 93 c8 04 sts 0x04C8, r24 ; 0x8004c8 <__TEXT_REGION_LENGTH__+0x7004c8> - 1f20: 10 92 64 22 sts 0x2264, r1 ; 0x802264 - 1f24: 85 e0 ldi r24, 0x05 ; 5 - 1f26: de dc rcall .-1604 ; 0x18e4 - 1f28: 68 df rcall .-304 ; 0x1dfa - 1f2a: cf bf out 0x3f, r28 ; 63 - 1f2c: cf 91 pop r28 - 1f2e: 08 95 ret +00001f14 : + 1f14: 80 93 c3 04 sts 0x04C3, r24 ; 0x8004c3 <__TEXT_REGION_LENGTH__+0x7004c3> + 1f18: 08 95 ret -00001f30 : - 1f30: 80 93 c3 04 sts 0x04C3, r24 ; 0x8004c3 <__TEXT_REGION_LENGTH__+0x7004c3> - 1f34: 08 95 ret +00001f1a : + 1f1a: 80 91 c3 04 lds r24, 0x04C3 ; 0x8004c3 <__TEXT_REGION_LENGTH__+0x7004c3> + 1f1e: 08 95 ret -00001f36 : - 1f36: 80 91 c3 04 lds r24, 0x04C3 ; 0x8004c3 <__TEXT_REGION_LENGTH__+0x7004c3> - 1f3a: 08 95 ret +00001f20 : + 1f20: ea e6 ldi r30, 0x6A ; 106 + 1f22: f4 e2 ldi r31, 0x24 ; 36 + 1f24: 80 87 std Z+8, r24 ; 0x08 + 1f26: 91 87 std Z+9, r25 ; 0x09 + 1f28: 62 87 std Z+10, r22 ; 0x0a + 1f2a: 73 87 std Z+11, r23 ; 0x0b + 1f2c: 08 95 ret -00001f3c : - 1f3c: e6 e6 ldi r30, 0x66 ; 102 - 1f3e: f4 e2 ldi r31, 0x24 ; 36 - 1f40: 80 87 std Z+8, r24 ; 0x08 - 1f42: 91 87 std Z+9, r25 ; 0x09 - 1f44: 62 87 std Z+10, r22 ; 0x0a - 1f46: 73 87 std Z+11, r23 ; 0x0b - 1f48: 08 95 ret +00001f2e : + 1f2e: 0f 93 push r16 + 1f30: 1f 93 push r17 + 1f32: cf 93 push r28 + 1f34: df 93 push r29 + 1f36: 1f 92 push r1 + 1f38: cd b7 in r28, 0x3d ; 61 + 1f3a: de b7 in r29, 0x3e ; 62 + 1f3c: 8a 01 movw r16, r20 + 1f3e: 69 83 std Y+1, r22 ; 0x01 + 1f40: f4 dc rcall .-1560 ; 0x192a + 1f42: fc 01 movw r30, r24 + 1f44: 81 81 ldd r24, Z+1 ; 0x01 + 1f46: 80 7c andi r24, 0xC0 ; 192 + 1f48: 69 81 ldd r22, Y+1 ; 0x01 + 1f4a: 81 11 cpse r24, r1 + 1f4c: 3a c0 rjmp .+116 ; 0x1fc2 + 1f4e: 63 70 andi r22, 0x03 ; 3 + 1f50: 61 30 cpi r22, 0x01 ; 1 + 1f52: 19 f0 breq .+6 ; 0x1f5a + 1f54: 20 f0 brcs .+8 ; 0x1f5e + 1f56: 80 e8 ldi r24, 0x80 ; 128 + 1f58: 03 c0 rjmp .+6 ; 0x1f60 + 1f5a: 80 ec ldi r24, 0xC0 ; 192 + 1f5c: 01 c0 rjmp .+2 ; 0x1f60 + 1f5e: 80 e4 ldi r24, 0x40 ; 64 + 1f60: 00 38 cpi r16, 0x80 ; 128 + 1f62: 11 05 cpc r17, r1 + 1f64: e9 f0 breq .+58 ; 0x1fa0 + 1f66: 58 f4 brcc .+22 ; 0x1f7e + 1f68: 00 32 cpi r16, 0x20 ; 32 + 1f6a: 11 05 cpc r17, r1 + 1f6c: a9 f0 breq .+42 ; 0x1f98 + 1f6e: 00 34 cpi r16, 0x40 ; 64 + 1f70: 11 05 cpc r17, r1 + 1f72: a1 f0 breq .+40 ; 0x1f9c + 1f74: 00 31 cpi r16, 0x10 ; 16 + 1f76: 11 05 cpc r17, r1 + 1f78: c9 f4 brne .+50 ; 0x1fac + 1f7a: 91 e0 ldi r25, 0x01 ; 1 + 1f7c: 18 c0 rjmp .+48 ; 0x1fae + 1f7e: 01 15 cp r16, r1 + 1f80: 92 e0 ldi r25, 0x02 ; 2 + 1f82: 19 07 cpc r17, r25 + 1f84: 79 f0 breq .+30 ; 0x1fa4 + 1f86: 0f 3f cpi r16, 0xFF ; 255 + 1f88: 93 e0 ldi r25, 0x03 ; 3 + 1f8a: 19 07 cpc r17, r25 + 1f8c: 69 f0 breq .+26 ; 0x1fa8 + 1f8e: 01 15 cp r16, r1 + 1f90: 11 40 sbci r17, 0x01 ; 1 + 1f92: 61 f4 brne .+24 ; 0x1fac + 1f94: 95 e0 ldi r25, 0x05 ; 5 + 1f96: 0b c0 rjmp .+22 ; 0x1fae + 1f98: 92 e0 ldi r25, 0x02 ; 2 + 1f9a: 09 c0 rjmp .+18 ; 0x1fae + 1f9c: 93 e0 ldi r25, 0x03 ; 3 + 1f9e: 07 c0 rjmp .+14 ; 0x1fae + 1fa0: 94 e0 ldi r25, 0x04 ; 4 + 1fa2: 05 c0 rjmp .+10 ; 0x1fae + 1fa4: 96 e0 ldi r25, 0x06 ; 6 + 1fa6: 03 c0 rjmp .+6 ; 0x1fae + 1fa8: 97 e0 ldi r25, 0x07 ; 7 + 1faa: 01 c0 rjmp .+2 ; 0x1fae + 1fac: 90 e0 ldi r25, 0x00 ; 0 + 1fae: 11 82 std Z+1, r1 ; 0x01 + 1fb0: 26 e0 ldi r18, 0x06 ; 6 + 1fb2: 20 83 st Z, r18 + 1fb4: 98 2b or r25, r24 + 1fb6: 91 83 std Z+1, r25 ; 0x01 + 1fb8: 81 81 ldd r24, Z+1 ; 0x01 + 1fba: 80 62 ori r24, 0x20 ; 32 + 1fbc: 81 83 std Z+1, r24 ; 0x01 + 1fbe: 81 e0 ldi r24, 0x01 ; 1 + 1fc0: 01 c0 rjmp .+2 ; 0x1fc4 + 1fc2: 80 e0 ldi r24, 0x00 ; 0 + 1fc4: 0f 90 pop r0 + 1fc6: df 91 pop r29 + 1fc8: cf 91 pop r28 + 1fca: 1f 91 pop r17 + 1fcc: 0f 91 pop r16 + 1fce: 08 95 ret -00001f4a : - 1f4a: 0f 93 push r16 - 1f4c: 1f 93 push r17 - 1f4e: cf 93 push r28 - 1f50: df 93 push r29 - 1f52: 1f 92 push r1 - 1f54: cd b7 in r28, 0x3d ; 61 - 1f56: de b7 in r29, 0x3e ; 62 - 1f58: 8a 01 movw r16, r20 - 1f5a: 69 83 std Y+1, r22 ; 0x01 - 1f5c: f4 dc rcall .-1560 ; 0x1946 - 1f5e: fc 01 movw r30, r24 - 1f60: 81 81 ldd r24, Z+1 ; 0x01 - 1f62: 80 7c andi r24, 0xC0 ; 192 - 1f64: 69 81 ldd r22, Y+1 ; 0x01 - 1f66: 81 11 cpse r24, r1 - 1f68: 3a c0 rjmp .+116 ; 0x1fde - 1f6a: 63 70 andi r22, 0x03 ; 3 - 1f6c: 61 30 cpi r22, 0x01 ; 1 - 1f6e: 19 f0 breq .+6 ; 0x1f76 - 1f70: 20 f0 brcs .+8 ; 0x1f7a - 1f72: 80 e8 ldi r24, 0x80 ; 128 - 1f74: 03 c0 rjmp .+6 ; 0x1f7c - 1f76: 80 ec ldi r24, 0xC0 ; 192 - 1f78: 01 c0 rjmp .+2 ; 0x1f7c - 1f7a: 80 e4 ldi r24, 0x40 ; 64 - 1f7c: 00 38 cpi r16, 0x80 ; 128 - 1f7e: 11 05 cpc r17, r1 - 1f80: e9 f0 breq .+58 ; 0x1fbc - 1f82: 58 f4 brcc .+22 ; 0x1f9a - 1f84: 00 32 cpi r16, 0x20 ; 32 - 1f86: 11 05 cpc r17, r1 - 1f88: a9 f0 breq .+42 ; 0x1fb4 - 1f8a: 00 34 cpi r16, 0x40 ; 64 - 1f8c: 11 05 cpc r17, r1 - 1f8e: a1 f0 breq .+40 ; 0x1fb8 - 1f90: 00 31 cpi r16, 0x10 ; 16 - 1f92: 11 05 cpc r17, r1 - 1f94: c9 f4 brne .+50 ; 0x1fc8 - 1f96: 91 e0 ldi r25, 0x01 ; 1 - 1f98: 18 c0 rjmp .+48 ; 0x1fca - 1f9a: 01 15 cp r16, r1 - 1f9c: 92 e0 ldi r25, 0x02 ; 2 - 1f9e: 19 07 cpc r17, r25 - 1fa0: 79 f0 breq .+30 ; 0x1fc0 - 1fa2: 0f 3f cpi r16, 0xFF ; 255 - 1fa4: 93 e0 ldi r25, 0x03 ; 3 - 1fa6: 19 07 cpc r17, r25 - 1fa8: 69 f0 breq .+26 ; 0x1fc4 - 1faa: 01 15 cp r16, r1 - 1fac: 11 40 sbci r17, 0x01 ; 1 - 1fae: 61 f4 brne .+24 ; 0x1fc8 - 1fb0: 95 e0 ldi r25, 0x05 ; 5 - 1fb2: 0b c0 rjmp .+22 ; 0x1fca - 1fb4: 92 e0 ldi r25, 0x02 ; 2 - 1fb6: 09 c0 rjmp .+18 ; 0x1fca - 1fb8: 93 e0 ldi r25, 0x03 ; 3 - 1fba: 07 c0 rjmp .+14 ; 0x1fca - 1fbc: 94 e0 ldi r25, 0x04 ; 4 - 1fbe: 05 c0 rjmp .+10 ; 0x1fca - 1fc0: 96 e0 ldi r25, 0x06 ; 6 - 1fc2: 03 c0 rjmp .+6 ; 0x1fca - 1fc4: 97 e0 ldi r25, 0x07 ; 7 - 1fc6: 01 c0 rjmp .+2 ; 0x1fca - 1fc8: 90 e0 ldi r25, 0x00 ; 0 - 1fca: 11 82 std Z+1, r1 ; 0x01 - 1fcc: 26 e0 ldi r18, 0x06 ; 6 - 1fce: 20 83 st Z, r18 - 1fd0: 98 2b or r25, r24 - 1fd2: 91 83 std Z+1, r25 ; 0x01 +00001fd0 : + 1fd0: ac dc rcall .-1704 ; 0x192a + 1fd2: fc 01 movw r30, r24 1fd4: 81 81 ldd r24, Z+1 ; 0x01 - 1fd6: 80 62 ori r24, 0x20 ; 32 - 1fd8: 81 83 std Z+1, r24 ; 0x01 - 1fda: 81 e0 ldi r24, 0x01 ; 1 - 1fdc: 01 c0 rjmp .+2 ; 0x1fe0 - 1fde: 80 e0 ldi r24, 0x00 ; 0 - 1fe0: 0f 90 pop r0 - 1fe2: df 91 pop r29 - 1fe4: cf 91 pop r28 - 1fe6: 1f 91 pop r17 - 1fe8: 0f 91 pop r16 - 1fea: 08 95 ret + 1fd6: 82 fb bst r24, 2 + 1fd8: 88 27 eor r24, r24 + 1fda: 80 f9 bld r24, 0 + 1fdc: 08 95 ret -00001fec : - 1fec: ac dc rcall .-1704 ; 0x1946 - 1fee: fc 01 movw r30, r24 - 1ff0: 81 81 ldd r24, Z+1 ; 0x01 - 1ff2: 82 fb bst r24, 2 - 1ff4: 88 27 eor r24, r24 - 1ff6: 80 f9 bld r24, 0 - 1ff8: 08 95 ret +00001fde : + 1fde: cf 93 push r28 + 1fe0: c8 2f mov r28, r24 + 1fe2: a3 dc rcall .-1722 ; 0x192a + 1fe4: fc 01 movw r30, r24 + 1fe6: 81 81 ldd r24, Z+1 ; 0x01 + 1fe8: 82 ff sbrs r24, 2 + 1fea: 0f c0 rjmp .+30 ; 0x200a + 1fec: 91 81 ldd r25, Z+1 ; 0x01 + 1fee: 9b 7f andi r25, 0xFB ; 251 + 1ff0: 91 83 std Z+1, r25 ; 0x01 + 1ff2: 8c 2f mov r24, r28 + 1ff4: fc dc rcall .-1544 ; 0x19ee + 1ff6: fc 01 movw r30, r24 + 1ff8: 90 81 ld r25, Z + 1ffa: 90 ff sbrs r25, 0 + 1ffc: 06 c0 rjmp .+12 ; 0x200a + 1ffe: 9e 7f andi r25, 0xFE ; 254 + 2000: 90 83 st Z, r25 + 2002: 07 80 ldd r0, Z+7 ; 0x07 + 2004: f0 85 ldd r31, Z+8 ; 0x08 + 2006: e0 2d mov r30, r0 + 2008: 09 95 icall + 200a: 81 e0 ldi r24, 0x01 ; 1 + 200c: cf 91 pop r28 + 200e: 08 95 ret -00001ffa : - 1ffa: cf 93 push r28 - 1ffc: c8 2f mov r28, r24 - 1ffe: a3 dc rcall .-1722 ; 0x1946 - 2000: fc 01 movw r30, r24 - 2002: 81 81 ldd r24, Z+1 ; 0x01 - 2004: 82 ff sbrs r24, 2 - 2006: 0f c0 rjmp .+30 ; 0x2026 - 2008: 91 81 ldd r25, Z+1 ; 0x01 - 200a: 9b 7f andi r25, 0xFB ; 251 - 200c: 91 83 std Z+1, r25 ; 0x01 - 200e: 8c 2f mov r24, r28 - 2010: fc dc rcall .-1544 ; 0x1a0a - 2012: fc 01 movw r30, r24 - 2014: 90 81 ld r25, Z - 2016: 90 ff sbrs r25, 0 - 2018: 06 c0 rjmp .+12 ; 0x2026 - 201a: 9e 7f andi r25, 0xFE ; 254 - 201c: 90 83 st Z, r25 - 201e: 07 80 ldd r0, Z+7 ; 0x07 - 2020: f0 85 ldd r31, Z+8 ; 0x08 - 2022: e0 2d mov r30, r0 - 2024: 09 95 icall - 2026: 81 e0 ldi r24, 0x01 ; 1 - 2028: cf 91 pop r28 - 202a: 08 95 ret - -0000202c : - 202c: 8f 92 push r8 - 202e: 9f 92 push r9 - 2030: af 92 push r10 - 2032: bf 92 push r11 - 2034: df 92 push r13 - 2036: ef 92 push r14 - 2038: ff 92 push r15 - 203a: 0f 93 push r16 - 203c: 1f 93 push r17 - 203e: cf 93 push r28 - 2040: df 93 push r29 - 2042: 1f 92 push r1 - 2044: cd b7 in r28, 0x3d ; 61 - 2046: de b7 in r29, 0x3e ; 62 - 2048: d8 2e mov r13, r24 - 204a: 5a 01 movw r10, r20 - 204c: 79 01 movw r14, r18 - 204e: 69 83 std Y+1, r22 ; 0x01 - 2050: dc dc rcall .-1608 ; 0x1a0a - 2052: 4c 01 movw r8, r24 - 2054: 8d 2d mov r24, r13 - 2056: 77 dc rcall .-1810 ; 0x1946 - 2058: 9c 01 movw r18, r24 - 205a: dc 01 movw r26, r24 +00002010 : + 2010: 8f 92 push r8 + 2012: 9f 92 push r9 + 2014: af 92 push r10 + 2016: bf 92 push r11 + 2018: df 92 push r13 + 201a: ef 92 push r14 + 201c: ff 92 push r15 + 201e: 0f 93 push r16 + 2020: 1f 93 push r17 + 2022: cf 93 push r28 + 2024: df 93 push r29 + 2026: 1f 92 push r1 + 2028: cd b7 in r28, 0x3d ; 61 + 202a: de b7 in r29, 0x3e ; 62 + 202c: d8 2e mov r13, r24 + 202e: 5a 01 movw r10, r20 + 2030: 79 01 movw r14, r18 + 2032: 69 83 std Y+1, r22 ; 0x01 + 2034: dc dc rcall .-1608 ; 0x19ee + 2036: 4c 01 movw r8, r24 + 2038: 8d 2d mov r24, r13 + 203a: 77 dc rcall .-1810 ; 0x192a + 203c: 9c 01 movw r18, r24 + 203e: dc 01 movw r26, r24 + 2040: 11 96 adiw r26, 0x01 ; 1 + 2042: 8c 91 ld r24, X + 2044: 11 97 sbiw r26, 0x01 ; 1 + 2046: 80 7c andi r24, 0xC0 ; 192 + 2048: 69 81 ldd r22, Y+1 ; 0x01 + 204a: 88 23 and r24, r24 + 204c: 09 f4 brne .+2 ; 0x2050 + 204e: 5e c0 rjmp .+188 ; 0x210c + 2050: 11 96 adiw r26, 0x01 ; 1 + 2052: 8c 91 ld r24, X + 2054: 11 97 sbiw r26, 0x01 ; 1 + 2056: 80 7c andi r24, 0xC0 ; 192 + 2058: 80 3c cpi r24, 0xC0 ; 192 + 205a: 21 f0 breq .+8 ; 0x2064 205c: 11 96 adiw r26, 0x01 ; 1 205e: 8c 91 ld r24, X - 2060: 11 97 sbiw r26, 0x01 ; 1 - 2062: 80 7c andi r24, 0xC0 ; 192 - 2064: 69 81 ldd r22, Y+1 ; 0x01 - 2066: 88 23 and r24, r24 - 2068: 09 f4 brne .+2 ; 0x206c - 206a: 5e c0 rjmp .+188 ; 0x2128 - 206c: 11 96 adiw r26, 0x01 ; 1 - 206e: 8c 91 ld r24, X - 2070: 11 97 sbiw r26, 0x01 ; 1 - 2072: 80 7c andi r24, 0xC0 ; 192 - 2074: 80 3c cpi r24, 0xC0 ; 192 - 2076: 21 f0 breq .+8 ; 0x2080 - 2078: 11 96 adiw r26, 0x01 ; 1 - 207a: 8c 91 ld r24, X - 207c: 82 fd sbrc r24, 2 - 207e: 54 c0 rjmp .+168 ; 0x2128 - 2080: 9f b7 in r25, 0x3f ; 63 - 2082: f8 94 cli - 2084: f4 01 movw r30, r8 - 2086: 80 81 ld r24, Z - 2088: 80 ff sbrs r24, 0 - 208a: 02 c0 rjmp .+4 ; 0x2090 - 208c: 9f bf out 0x3f, r25 ; 63 - 208e: 4c c0 rjmp .+152 ; 0x2128 - 2090: 81 60 ori r24, 0x01 ; 1 - 2092: 80 83 st Z, r24 - 2094: 9f bf out 0x3f, r25 ; 63 - 2096: f4 01 movw r30, r8 - 2098: a1 82 std Z+1, r10 ; 0x01 - 209a: b2 82 std Z+2, r11 ; 0x02 - 209c: e3 82 std Z+3, r14 ; 0x03 - 209e: f4 82 std Z+4, r15 ; 0x04 - 20a0: 15 82 std Z+5, r1 ; 0x05 - 20a2: 16 82 std Z+6, r1 ; 0x06 - 20a4: 07 83 std Z+7, r16 ; 0x07 - 20a6: 10 87 std Z+8, r17 ; 0x08 - 20a8: 91 e0 ldi r25, 0x01 ; 1 - 20aa: 61 11 cpse r22, r1 - 20ac: 04 c0 rjmp .+8 ; 0x20b6 - 20ae: e1 14 cp r14, r1 - 20b0: f1 04 cpc r15, r1 - 20b2: 09 f0 breq .+2 ; 0x20b6 - 20b4: 90 e0 ldi r25, 0x00 ; 0 - 20b6: d4 01 movw r26, r8 - 20b8: 8c 91 ld r24, X - 20ba: 90 fb bst r25, 0 - 20bc: 81 f9 bld r24, 1 - 20be: 8b 7f andi r24, 0xFB ; 251 - 20c0: 8c 93 st X, r24 - 20c2: d7 fe sbrs r13, 7 - 20c4: 04 c0 rjmp .+8 ; 0x20ce - 20c6: f9 01 movw r30, r18 - 20c8: 16 82 std Z+6, r1 ; 0x06 - 20ca: 17 82 std Z+7, r1 ; 0x07 - 20cc: 29 c0 rjmp .+82 ; 0x2120 - 20ce: d9 01 movw r26, r18 - 20d0: 11 96 adiw r26, 0x01 ; 1 - 20d2: 8c 91 ld r24, X - 20d4: 11 97 sbiw r26, 0x01 ; 1 - 20d6: 80 7c andi r24, 0xC0 ; 192 - 20d8: 80 3c cpi r24, 0xC0 ; 192 - 20da: c9 f4 brne .+50 ; 0x210e - 20dc: 11 96 adiw r26, 0x01 ; 1 - 20de: ec 91 ld r30, X - 20e0: e7 70 andi r30, 0x07 ; 7 - 20e2: e1 50 subi r30, 0x01 ; 1 - 20e4: e7 30 cpi r30, 0x07 ; 7 - 20e6: 40 f4 brcc .+16 ; 0x20f8 - 20e8: f0 e0 ldi r31, 0x00 ; 0 - 20ea: ee 0f add r30, r30 - 20ec: ff 1f adc r31, r31 - 20ee: ee 54 subi r30, 0x4E ; 78 - 20f0: ff 4d sbci r31, 0xDF ; 223 - 20f2: 60 81 ld r22, Z - 20f4: 71 81 ldd r23, Z+1 ; 0x01 - 20f6: 02 c0 rjmp .+4 ; 0x20fc - 20f8: 68 e0 ldi r22, 0x08 ; 8 - 20fa: 70 e0 ldi r23, 0x00 ; 0 - 20fc: c7 01 movw r24, r14 - 20fe: f2 d1 rcall .+996 ; 0x24e4 <__udivmodhi4> - 2100: 89 2b or r24, r25 - 2102: 29 f0 breq .+10 ; 0x210e - 2104: f4 01 movw r30, r8 - 2106: 80 81 ld r24, Z - 2108: 8e 7f andi r24, 0xFE ; 254 - 210a: 80 83 st Z, r24 - 210c: 0d c0 rjmp .+26 ; 0x2128 - 210e: d9 01 movw r26, r18 - 2110: 12 96 adiw r26, 0x02 ; 2 - 2112: 1d 92 st X+, r1 - 2114: 1c 92 st X, r1 - 2116: 13 97 sbiw r26, 0x03 ; 3 - 2118: 16 96 adiw r26, 0x06 ; 6 - 211a: 1d 92 st X+, r1 - 211c: 1c 92 st X, r1 - 211e: 17 97 sbiw r26, 0x07 ; 7 - 2120: 8d 2d mov r24, r13 - 2122: 8d dc rcall .-1766 ; 0x1a3e - 2124: 81 e0 ldi r24, 0x01 ; 1 - 2126: 01 c0 rjmp .+2 ; 0x212a - 2128: 80 e0 ldi r24, 0x00 ; 0 - 212a: 0f 90 pop r0 - 212c: df 91 pop r29 - 212e: cf 91 pop r28 - 2130: 1f 91 pop r17 - 2132: 0f 91 pop r16 - 2134: ff 90 pop r15 - 2136: ef 90 pop r14 - 2138: df 90 pop r13 - 213a: bf 90 pop r11 - 213c: af 90 pop r10 - 213e: 9f 90 pop r9 - 2140: 8f 90 pop r8 - 2142: 08 95 ret + 2060: 82 fd sbrc r24, 2 + 2062: 54 c0 rjmp .+168 ; 0x210c + 2064: 9f b7 in r25, 0x3f ; 63 + 2066: f8 94 cli + 2068: f4 01 movw r30, r8 + 206a: 80 81 ld r24, Z + 206c: 80 ff sbrs r24, 0 + 206e: 02 c0 rjmp .+4 ; 0x2074 + 2070: 9f bf out 0x3f, r25 ; 63 + 2072: 4c c0 rjmp .+152 ; 0x210c + 2074: 81 60 ori r24, 0x01 ; 1 + 2076: 80 83 st Z, r24 + 2078: 9f bf out 0x3f, r25 ; 63 + 207a: f4 01 movw r30, r8 + 207c: a1 82 std Z+1, r10 ; 0x01 + 207e: b2 82 std Z+2, r11 ; 0x02 + 2080: e3 82 std Z+3, r14 ; 0x03 + 2082: f4 82 std Z+4, r15 ; 0x04 + 2084: 15 82 std Z+5, r1 ; 0x05 + 2086: 16 82 std Z+6, r1 ; 0x06 + 2088: 07 83 std Z+7, r16 ; 0x07 + 208a: 10 87 std Z+8, r17 ; 0x08 + 208c: 91 e0 ldi r25, 0x01 ; 1 + 208e: 61 11 cpse r22, r1 + 2090: 04 c0 rjmp .+8 ; 0x209a + 2092: e1 14 cp r14, r1 + 2094: f1 04 cpc r15, r1 + 2096: 09 f0 breq .+2 ; 0x209a + 2098: 90 e0 ldi r25, 0x00 ; 0 + 209a: d4 01 movw r26, r8 + 209c: 8c 91 ld r24, X + 209e: 90 fb bst r25, 0 + 20a0: 81 f9 bld r24, 1 + 20a2: 8b 7f andi r24, 0xFB ; 251 + 20a4: 8c 93 st X, r24 + 20a6: d7 fe sbrs r13, 7 + 20a8: 04 c0 rjmp .+8 ; 0x20b2 + 20aa: f9 01 movw r30, r18 + 20ac: 16 82 std Z+6, r1 ; 0x06 + 20ae: 17 82 std Z+7, r1 ; 0x07 + 20b0: 29 c0 rjmp .+82 ; 0x2104 + 20b2: d9 01 movw r26, r18 + 20b4: 11 96 adiw r26, 0x01 ; 1 + 20b6: 8c 91 ld r24, X + 20b8: 11 97 sbiw r26, 0x01 ; 1 + 20ba: 80 7c andi r24, 0xC0 ; 192 + 20bc: 80 3c cpi r24, 0xC0 ; 192 + 20be: c9 f4 brne .+50 ; 0x20f2 + 20c0: 11 96 adiw r26, 0x01 ; 1 + 20c2: ec 91 ld r30, X + 20c4: e7 70 andi r30, 0x07 ; 7 + 20c6: e1 50 subi r30, 0x01 ; 1 + 20c8: e7 30 cpi r30, 0x07 ; 7 + 20ca: 40 f4 brcc .+16 ; 0x20dc + 20cc: f0 e0 ldi r31, 0x00 ; 0 + 20ce: ee 0f add r30, r30 + 20d0: ff 1f adc r31, r31 + 20d2: ee 54 subi r30, 0x4E ; 78 + 20d4: ff 4d sbci r31, 0xDF ; 223 + 20d6: 60 81 ld r22, Z + 20d8: 71 81 ldd r23, Z+1 ; 0x01 + 20da: 02 c0 rjmp .+4 ; 0x20e0 + 20dc: 68 e0 ldi r22, 0x08 ; 8 + 20de: 70 e0 ldi r23, 0x00 ; 0 + 20e0: c7 01 movw r24, r14 + 20e2: f2 d1 rcall .+996 ; 0x24c8 <__udivmodhi4> + 20e4: 89 2b or r24, r25 + 20e6: 29 f0 breq .+10 ; 0x20f2 + 20e8: f4 01 movw r30, r8 + 20ea: 80 81 ld r24, Z + 20ec: 8e 7f andi r24, 0xFE ; 254 + 20ee: 80 83 st Z, r24 + 20f0: 0d c0 rjmp .+26 ; 0x210c + 20f2: d9 01 movw r26, r18 + 20f4: 12 96 adiw r26, 0x02 ; 2 + 20f6: 1d 92 st X+, r1 + 20f8: 1c 92 st X, r1 + 20fa: 13 97 sbiw r26, 0x03 ; 3 + 20fc: 16 96 adiw r26, 0x06 ; 6 + 20fe: 1d 92 st X+, r1 + 2100: 1c 92 st X, r1 + 2102: 17 97 sbiw r26, 0x07 ; 7 + 2104: 8d 2d mov r24, r13 + 2106: 8d dc rcall .-1766 ; 0x1a22 + 2108: 81 e0 ldi r24, 0x01 ; 1 + 210a: 01 c0 rjmp .+2 ; 0x210e + 210c: 80 e0 ldi r24, 0x00 ; 0 + 210e: 0f 90 pop r0 + 2110: df 91 pop r29 + 2112: cf 91 pop r28 + 2114: 1f 91 pop r17 + 2116: 0f 91 pop r16 + 2118: ff 90 pop r15 + 211a: ef 90 pop r14 + 211c: df 90 pop r13 + 211e: bf 90 pop r11 + 2120: af 90 pop r10 + 2122: 9f 90 pop r9 + 2124: 8f 90 pop r8 + 2126: 08 95 ret -00002144 : - 2144: ef 92 push r14 - 2146: ff 92 push r15 - 2148: 0f 93 push r16 - 214a: cf 93 push r28 - 214c: c8 2f mov r28, r24 - 214e: fb db rcall .-2058 ; 0x1946 - 2150: 7c 01 movw r14, r24 - 2152: 8c 2f mov r24, r28 - 2154: 5a dc rcall .-1868 ; 0x1a0a - 2156: dc 01 movw r26, r24 - 2158: f7 01 movw r30, r14 - 215a: 02 e0 ldi r16, 0x02 ; 2 - 215c: 05 93 las Z, r16 - 215e: 9c 91 ld r25, X - 2160: 90 ff sbrs r25, 0 - 2162: 1b c0 rjmp .+54 ; 0x219a - 2164: 9e 7f andi r25, 0xFE ; 254 - 2166: 9c 93 st X, r25 - 2168: 17 96 adiw r26, 0x07 ; 7 - 216a: ed 91 ld r30, X+ - 216c: fc 91 ld r31, X - 216e: 18 97 sbiw r26, 0x08 ; 8 - 2170: 30 97 sbiw r30, 0x00 ; 0 - 2172: 99 f0 breq .+38 ; 0x219a - 2174: d7 01 movw r26, r14 - 2176: c7 ff sbrs r28, 7 - 2178: 05 c0 rjmp .+10 ; 0x2184 - 217a: 16 96 adiw r26, 0x06 ; 6 - 217c: 6d 91 ld r22, X+ - 217e: 7c 91 ld r23, X - 2180: 17 97 sbiw r26, 0x07 ; 7 - 2182: 04 c0 rjmp .+8 ; 0x218c - 2184: 12 96 adiw r26, 0x02 ; 2 - 2186: 6d 91 ld r22, X+ - 2188: 7c 91 ld r23, X - 218a: 13 97 sbiw r26, 0x03 ; 3 - 218c: 4c 2f mov r20, r28 - 218e: 81 e0 ldi r24, 0x01 ; 1 - 2190: cf 91 pop r28 - 2192: 0f 91 pop r16 - 2194: ff 90 pop r15 - 2196: ef 90 pop r14 - 2198: 09 94 ijmp - 219a: cf 91 pop r28 - 219c: 0f 91 pop r16 - 219e: ff 90 pop r15 - 21a0: ef 90 pop r14 - 21a2: 08 95 ret +00002128 : + 2128: ef 92 push r14 + 212a: ff 92 push r15 + 212c: 0f 93 push r16 + 212e: cf 93 push r28 + 2130: c8 2f mov r28, r24 + 2132: fb db rcall .-2058 ; 0x192a + 2134: 7c 01 movw r14, r24 + 2136: 8c 2f mov r24, r28 + 2138: 5a dc rcall .-1868 ; 0x19ee + 213a: dc 01 movw r26, r24 + 213c: f7 01 movw r30, r14 + 213e: 02 e0 ldi r16, 0x02 ; 2 + 2140: 05 93 las Z, r16 + 2142: 9c 91 ld r25, X + 2144: 90 ff sbrs r25, 0 + 2146: 1b c0 rjmp .+54 ; 0x217e + 2148: 9e 7f andi r25, 0xFE ; 254 + 214a: 9c 93 st X, r25 + 214c: 17 96 adiw r26, 0x07 ; 7 + 214e: ed 91 ld r30, X+ + 2150: fc 91 ld r31, X + 2152: 18 97 sbiw r26, 0x08 ; 8 + 2154: 30 97 sbiw r30, 0x00 ; 0 + 2156: 99 f0 breq .+38 ; 0x217e + 2158: d7 01 movw r26, r14 + 215a: c7 ff sbrs r28, 7 + 215c: 05 c0 rjmp .+10 ; 0x2168 + 215e: 16 96 adiw r26, 0x06 ; 6 + 2160: 6d 91 ld r22, X+ + 2162: 7c 91 ld r23, X + 2164: 17 97 sbiw r26, 0x07 ; 7 + 2166: 04 c0 rjmp .+8 ; 0x2170 + 2168: 12 96 adiw r26, 0x02 ; 2 + 216a: 6d 91 ld r22, X+ + 216c: 7c 91 ld r23, X + 216e: 13 97 sbiw r26, 0x03 ; 3 + 2170: 4c 2f mov r20, r28 + 2172: 81 e0 ldi r24, 0x01 ; 1 + 2174: cf 91 pop r28 + 2176: 0f 91 pop r16 + 2178: ff 90 pop r15 + 217a: ef 90 pop r14 + 217c: 09 94 ijmp + 217e: cf 91 pop r28 + 2180: 0f 91 pop r16 + 2182: ff 90 pop r15 + 2184: ef 90 pop r14 + 2186: 08 95 ret -000021a4 : - 21a4: cf 93 push r28 - 21a6: c8 2f mov r28, r24 - 21a8: cd df rcall .-102 ; 0x2144 - 21aa: 8c 2f mov r24, r28 - 21ac: cc db rcall .-2152 ; 0x1946 - 21ae: fc 01 movw r30, r24 - 21b0: 11 82 std Z+1, r1 ; 0x01 - 21b2: cf 91 pop r28 - 21b4: 08 95 ret +00002188 : + 2188: cf 93 push r28 + 218a: c8 2f mov r28, r24 + 218c: cd df rcall .-102 ; 0x2128 + 218e: 8c 2f mov r24, r28 + 2190: cc db rcall .-2152 ; 0x192a + 2192: fc 01 movw r30, r24 + 2194: 11 82 std Z+1, r1 ; 0x01 + 2196: cf 91 pop r28 + 2198: 08 95 ret -000021b6 : - 21b6: 0f 93 push r16 - 21b8: cf 93 push r28 - 21ba: c8 2f mov r28, r24 - 21bc: c4 db rcall .-2168 ; 0x1946 - 21be: fc 01 movw r30, r24 - 21c0: 91 81 ldd r25, Z+1 ; 0x01 - 21c2: 94 60 ori r25, 0x04 ; 4 - 21c4: 91 83 std Z+1, r25 ; 0x01 - 21c6: 01 e0 ldi r16, 0x01 ; 1 - 21c8: 06 93 lac Z, r16 - 21ca: 8c 2f mov r24, r28 - 21cc: bb df rcall .-138 ; 0x2144 - 21ce: 81 e0 ldi r24, 0x01 ; 1 - 21d0: cf 91 pop r28 - 21d2: 0f 91 pop r16 - 21d4: 08 95 ret +0000219a : + 219a: 0f 93 push r16 + 219c: cf 93 push r28 + 219e: c8 2f mov r28, r24 + 21a0: c4 db rcall .-2168 ; 0x192a + 21a2: fc 01 movw r30, r24 + 21a4: 91 81 ldd r25, Z+1 ; 0x01 + 21a6: 94 60 ori r25, 0x04 ; 4 + 21a8: 91 83 std Z+1, r25 ; 0x01 + 21aa: 01 e0 ldi r16, 0x01 ; 1 + 21ac: 06 93 lac Z, r16 + 21ae: 8c 2f mov r24, r28 + 21b0: bb df rcall .-138 ; 0x2128 + 21b2: 81 e0 ldi r24, 0x01 ; 1 + 21b4: cf 91 pop r28 + 21b6: 0f 91 pop r16 + 21b8: 08 95 ret -000021d6 <__vector_125>: - 21d6: 1f 92 push r1 - 21d8: 0f 92 push r0 - 21da: 0f b6 in r0, 0x3f ; 63 - 21dc: 0f 92 push r0 - 21de: 11 24 eor r1, r1 - 21e0: 0f 93 push r16 - 21e2: 2f 93 push r18 - 21e4: 3f 93 push r19 - 21e6: 4f 93 push r20 - 21e8: 5f 93 push r21 - 21ea: 6f 93 push r22 - 21ec: 7f 93 push r23 - 21ee: 8f 93 push r24 - 21f0: 9f 93 push r25 - 21f2: af 93 push r26 - 21f4: bf 93 push r27 - 21f6: ef 93 push r30 - 21f8: ff 93 push r31 - 21fa: 80 91 cb 04 lds r24, 0x04CB ; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb> - 21fe: 87 ff sbrs r24, 7 - 2200: 07 c0 rjmp .+14 ; 0x2210 <__vector_125+0x3a> - 2202: 80 e8 ldi r24, 0x80 ; 128 - 2204: 80 93 ca 04 sts 0x04CA, r24 ; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca> - 2208: 04 d8 rcall .-4088 ; 0x1212 - 220a: 0e 94 77 01 call 0x2ee ; 0x2ee - 220e: 86 c0 rjmp .+268 ; 0x231c <__vector_125+0x146> - 2210: 80 91 cb 04 lds r24, 0x04CB ; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb> - 2214: 82 ff sbrs r24, 2 - 2216: 18 c0 rjmp .+48 ; 0x2248 <__vector_125+0x72> - 2218: 84 e0 ldi r24, 0x04 ; 4 - 221a: 80 93 ca 04 sts 0x04CA, r24 ; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca> - 221e: 80 91 28 22 lds r24, 0x2228 ; 0x802228 - 2222: 86 ff sbrs r24, 6 - 2224: 7b c0 rjmp .+246 ; 0x231c <__vector_125+0x146> - 2226: 80 91 cc 04 lds r24, 0x04CC ; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc> - 222a: 81 fd sbrc r24, 1 - 222c: 77 c0 rjmp .+238 ; 0x231c <__vector_125+0x146> - 222e: 6e dd rcall .-1316 ; 0x1d0c - 2230: 81 11 cpse r24, r1 - 2232: 74 c0 rjmp .+232 ; 0x231c <__vector_125+0x146> - 2234: 80 91 0d 22 lds r24, 0x220D ; 0x80220d - 2238: 81 30 cpi r24, 0x01 ; 1 - 223a: 11 f4 brne .+4 ; 0x2240 <__vector_125+0x6a> - 223c: d0 db rcall .-2144 ; 0x19de - 223e: 6e c0 rjmp .+220 ; 0x231c <__vector_125+0x146> - 2240: 84 30 cpi r24, 0x04 ; 4 - 2242: 09 f0 breq .+2 ; 0x2246 <__vector_125+0x70> - 2244: 6b c0 rjmp .+214 ; 0x231c <__vector_125+0x146> - 2246: 21 c0 rjmp .+66 ; 0x228a <__vector_125+0xb4> - 2248: 80 91 cb 04 lds r24, 0x04CB ; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb> - 224c: 81 ff sbrs r24, 1 - 224e: 26 c0 rjmp .+76 ; 0x229c <__vector_125+0xc6> - 2250: 82 e0 ldi r24, 0x02 ; 2 - 2252: 80 93 ca 04 sts 0x04CA, r24 ; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca> - 2256: 80 91 20 22 lds r24, 0x2220 ; 0x802220 - 225a: 86 ff sbrs r24, 6 - 225c: 5f c0 rjmp .+190 ; 0x231c <__vector_125+0x146> - 225e: 80 91 cc 04 lds r24, 0x04CC ; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc> - 2262: 81 fd sbrc r24, 1 - 2264: 5b c0 rjmp .+182 ; 0x231c <__vector_125+0x146> - 2266: 52 dd rcall .-1372 ; 0x1d0c - 2268: 81 11 cpse r24, r1 - 226a: 58 c0 rjmp .+176 ; 0x231c <__vector_125+0x146> - 226c: 80 91 0d 22 lds r24, 0x220D ; 0x80220d - 2270: 82 30 cpi r24, 0x02 ; 2 - 2272: 41 f4 brne .+16 ; 0x2284 <__vector_125+0xae> - 2274: 84 e0 ldi r24, 0x04 ; 4 - 2276: 80 93 0d 22 sts 0x220D, r24 ; 0x80220d - 227a: e0 e2 ldi r30, 0x20 ; 32 - 227c: f2 e2 ldi r31, 0x22 ; 34 - 227e: 02 e0 ldi r16, 0x02 ; 2 - 2280: 06 93 lac Z, r16 - 2282: 4c c0 rjmp .+152 ; 0x231c <__vector_125+0x146> - 2284: 83 30 cpi r24, 0x03 ; 3 - 2286: 09 f0 breq .+2 ; 0x228a <__vector_125+0xb4> - 2288: 49 c0 rjmp .+146 ; 0x231c <__vector_125+0x146> - 228a: e9 e2 ldi r30, 0x29 ; 41 - 228c: f2 e2 ldi r31, 0x22 ; 34 - 228e: 04 e0 ldi r16, 0x04 ; 4 - 2290: 05 93 las Z, r16 - 2292: e1 e2 ldi r30, 0x21 ; 33 - 2294: f2 e2 ldi r31, 0x22 ; 34 - 2296: 04 e0 ldi r16, 0x04 ; 4 - 2298: 05 93 las Z, r16 - 229a: 40 c0 rjmp .+128 ; 0x231c <__vector_125+0x146> - 229c: 80 91 cb 04 lds r24, 0x04CB ; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb> - 22a0: 84 ff sbrs r24, 4 - 22a2: 25 c0 rjmp .+74 ; 0x22ee <__vector_125+0x118> - 22a4: 80 e1 ldi r24, 0x10 ; 16 - 22a6: 80 93 ca 04 sts 0x04CA, r24 ; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca> - 22aa: 81 e0 ldi r24, 0x01 ; 1 - 22ac: 4b df rcall .-362 ; 0x2144 - 22ae: 81 e8 ldi r24, 0x81 ; 129 - 22b0: 49 df rcall .-366 ; 0x2144 - 22b2: 82 e0 ldi r24, 0x02 ; 2 - 22b4: 47 df rcall .-370 ; 0x2144 - 22b6: 82 e8 ldi r24, 0x82 ; 130 - 22b8: 45 df rcall .-374 ; 0x2144 - 22ba: 0e 94 ed 08 call 0x11da ; 0x11da - 22be: 10 92 c3 04 sts 0x04C3, r1 ; 0x8004c3 <__TEXT_REGION_LENGTH__+0x7004c3> - 22c2: 10 92 21 22 sts 0x2221, r1 ; 0x802221 - 22c6: 96 e0 ldi r25, 0x06 ; 6 - 22c8: 90 93 20 22 sts 0x2220, r25 ; 0x802220 - 22cc: 83 e4 ldi r24, 0x43 ; 67 - 22ce: 80 93 21 22 sts 0x2221, r24 ; 0x802221 - 22d2: 10 92 29 22 sts 0x2229, r1 ; 0x802229 - 22d6: 90 93 28 22 sts 0x2228, r25 ; 0x802228 - 22da: 80 93 29 22 sts 0x2229, r24 ; 0x802229 - 22de: 89 ec ldi r24, 0xC9 ; 201 - 22e0: 91 e2 ldi r25, 0x21 ; 33 - 22e2: 80 93 24 22 sts 0x2224, r24 ; 0x802224 - 22e6: 90 93 25 22 sts 0x2225, r25 ; 0x802225 - 22ea: 44 db rcall .-2424 ; 0x1974 - 22ec: 17 c0 rjmp .+46 ; 0x231c <__vector_125+0x146> - 22ee: 80 91 cb 04 lds r24, 0x04CB ; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb> - 22f2: 86 ff sbrs r24, 6 - 22f4: 08 c0 rjmp .+16 ; 0x2306 <__vector_125+0x130> - 22f6: 80 e4 ldi r24, 0x40 ; 64 - 22f8: 80 93 ca 04 sts 0x04CA, r24 ; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca> - 22fc: 80 e0 ldi r24, 0x00 ; 0 - 22fe: 10 db rcall .-2528 ; 0x1920 - 2300: 0e 94 75 01 call 0x2ea ; 0x2ea - 2304: 0b c0 rjmp .+22 ; 0x231c <__vector_125+0x146> - 2306: 80 91 cb 04 lds r24, 0x04CB ; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb> - 230a: 85 ff sbrs r24, 5 - 230c: 07 c0 rjmp .+14 ; 0x231c <__vector_125+0x146> - 230e: 80 e2 ldi r24, 0x20 ; 32 - 2310: 80 93 ca 04 sts 0x04CA, r24 ; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca> - 2314: 81 e0 ldi r24, 0x01 ; 1 - 2316: 04 db rcall .-2552 ; 0x1920 - 2318: 0e 94 76 01 call 0x2ec ; 0x2ec - 231c: ff 91 pop r31 - 231e: ef 91 pop r30 - 2320: bf 91 pop r27 - 2322: af 91 pop r26 - 2324: 9f 91 pop r25 - 2326: 8f 91 pop r24 - 2328: 7f 91 pop r23 - 232a: 6f 91 pop r22 - 232c: 5f 91 pop r21 - 232e: 4f 91 pop r20 - 2330: 3f 91 pop r19 - 2332: 2f 91 pop r18 - 2334: 0f 91 pop r16 - 2336: 0f 90 pop r0 - 2338: 0f be out 0x3f, r0 ; 63 - 233a: 0f 90 pop r0 - 233c: 1f 90 pop r1 - 233e: 18 95 reti +000021ba <__vector_125>: + 21ba: 1f 92 push r1 + 21bc: 0f 92 push r0 + 21be: 0f b6 in r0, 0x3f ; 63 + 21c0: 0f 92 push r0 + 21c2: 11 24 eor r1, r1 + 21c4: 0f 93 push r16 + 21c6: 2f 93 push r18 + 21c8: 3f 93 push r19 + 21ca: 4f 93 push r20 + 21cc: 5f 93 push r21 + 21ce: 6f 93 push r22 + 21d0: 7f 93 push r23 + 21d2: 8f 93 push r24 + 21d4: 9f 93 push r25 + 21d6: af 93 push r26 + 21d8: bf 93 push r27 + 21da: ef 93 push r30 + 21dc: ff 93 push r31 + 21de: 80 91 cb 04 lds r24, 0x04CB ; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb> + 21e2: 87 ff sbrs r24, 7 + 21e4: 07 c0 rjmp .+14 ; 0x21f4 <__vector_125+0x3a> + 21e6: 80 e8 ldi r24, 0x80 ; 128 + 21e8: 80 93 ca 04 sts 0x04CA, r24 ; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca> + 21ec: 04 d8 rcall .-4088 ; 0x11f6 + 21ee: 0e 94 69 01 call 0x2d2 ; 0x2d2 + 21f2: 86 c0 rjmp .+268 ; 0x2300 <__vector_125+0x146> + 21f4: 80 91 cb 04 lds r24, 0x04CB ; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb> + 21f8: 82 ff sbrs r24, 2 + 21fa: 18 c0 rjmp .+48 ; 0x222c <__vector_125+0x72> + 21fc: 84 e0 ldi r24, 0x04 ; 4 + 21fe: 80 93 ca 04 sts 0x04CA, r24 ; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca> + 2202: 80 91 28 22 lds r24, 0x2228 ; 0x802228 + 2206: 86 ff sbrs r24, 6 + 2208: 7b c0 rjmp .+246 ; 0x2300 <__vector_125+0x146> + 220a: 80 91 cc 04 lds r24, 0x04CC ; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc> + 220e: 81 fd sbrc r24, 1 + 2210: 77 c0 rjmp .+238 ; 0x2300 <__vector_125+0x146> + 2212: 6e dd rcall .-1316 ; 0x1cf0 + 2214: 81 11 cpse r24, r1 + 2216: 74 c0 rjmp .+232 ; 0x2300 <__vector_125+0x146> + 2218: 80 91 0d 22 lds r24, 0x220D ; 0x80220d + 221c: 81 30 cpi r24, 0x01 ; 1 + 221e: 11 f4 brne .+4 ; 0x2224 <__vector_125+0x6a> + 2220: d0 db rcall .-2144 ; 0x19c2 + 2222: 6e c0 rjmp .+220 ; 0x2300 <__vector_125+0x146> + 2224: 84 30 cpi r24, 0x04 ; 4 + 2226: 09 f0 breq .+2 ; 0x222a <__vector_125+0x70> + 2228: 6b c0 rjmp .+214 ; 0x2300 <__vector_125+0x146> + 222a: 21 c0 rjmp .+66 ; 0x226e <__vector_125+0xb4> + 222c: 80 91 cb 04 lds r24, 0x04CB ; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb> + 2230: 81 ff sbrs r24, 1 + 2232: 26 c0 rjmp .+76 ; 0x2280 <__vector_125+0xc6> + 2234: 82 e0 ldi r24, 0x02 ; 2 + 2236: 80 93 ca 04 sts 0x04CA, r24 ; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca> + 223a: 80 91 20 22 lds r24, 0x2220 ; 0x802220 + 223e: 86 ff sbrs r24, 6 + 2240: 5f c0 rjmp .+190 ; 0x2300 <__vector_125+0x146> + 2242: 80 91 cc 04 lds r24, 0x04CC ; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc> + 2246: 81 fd sbrc r24, 1 + 2248: 5b c0 rjmp .+182 ; 0x2300 <__vector_125+0x146> + 224a: 52 dd rcall .-1372 ; 0x1cf0 + 224c: 81 11 cpse r24, r1 + 224e: 58 c0 rjmp .+176 ; 0x2300 <__vector_125+0x146> + 2250: 80 91 0d 22 lds r24, 0x220D ; 0x80220d + 2254: 82 30 cpi r24, 0x02 ; 2 + 2256: 41 f4 brne .+16 ; 0x2268 <__vector_125+0xae> + 2258: 84 e0 ldi r24, 0x04 ; 4 + 225a: 80 93 0d 22 sts 0x220D, r24 ; 0x80220d + 225e: e0 e2 ldi r30, 0x20 ; 32 + 2260: f2 e2 ldi r31, 0x22 ; 34 + 2262: 02 e0 ldi r16, 0x02 ; 2 + 2264: 06 93 lac Z, r16 + 2266: 4c c0 rjmp .+152 ; 0x2300 <__vector_125+0x146> + 2268: 83 30 cpi r24, 0x03 ; 3 + 226a: 09 f0 breq .+2 ; 0x226e <__vector_125+0xb4> + 226c: 49 c0 rjmp .+146 ; 0x2300 <__vector_125+0x146> + 226e: e9 e2 ldi r30, 0x29 ; 41 + 2270: f2 e2 ldi r31, 0x22 ; 34 + 2272: 04 e0 ldi r16, 0x04 ; 4 + 2274: 05 93 las Z, r16 + 2276: e1 e2 ldi r30, 0x21 ; 33 + 2278: f2 e2 ldi r31, 0x22 ; 34 + 227a: 04 e0 ldi r16, 0x04 ; 4 + 227c: 05 93 las Z, r16 + 227e: 40 c0 rjmp .+128 ; 0x2300 <__vector_125+0x146> + 2280: 80 91 cb 04 lds r24, 0x04CB ; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb> + 2284: 84 ff sbrs r24, 4 + 2286: 25 c0 rjmp .+74 ; 0x22d2 <__vector_125+0x118> + 2288: 80 e1 ldi r24, 0x10 ; 16 + 228a: 80 93 ca 04 sts 0x04CA, r24 ; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca> + 228e: 81 e0 ldi r24, 0x01 ; 1 + 2290: 4b df rcall .-362 ; 0x2128 + 2292: 81 e8 ldi r24, 0x81 ; 129 + 2294: 49 df rcall .-366 ; 0x2128 + 2296: 82 e0 ldi r24, 0x02 ; 2 + 2298: 47 df rcall .-370 ; 0x2128 + 229a: 82 e8 ldi r24, 0x82 ; 130 + 229c: 45 df rcall .-374 ; 0x2128 + 229e: 0e 94 df 08 call 0x11be ; 0x11be + 22a2: 10 92 c3 04 sts 0x04C3, r1 ; 0x8004c3 <__TEXT_REGION_LENGTH__+0x7004c3> + 22a6: 10 92 21 22 sts 0x2221, r1 ; 0x802221 + 22aa: 96 e0 ldi r25, 0x06 ; 6 + 22ac: 90 93 20 22 sts 0x2220, r25 ; 0x802220 + 22b0: 83 e4 ldi r24, 0x43 ; 67 + 22b2: 80 93 21 22 sts 0x2221, r24 ; 0x802221 + 22b6: 10 92 29 22 sts 0x2229, r1 ; 0x802229 + 22ba: 90 93 28 22 sts 0x2228, r25 ; 0x802228 + 22be: 80 93 29 22 sts 0x2229, r24 ; 0x802229 + 22c2: 89 ec ldi r24, 0xC9 ; 201 + 22c4: 91 e2 ldi r25, 0x21 ; 33 + 22c6: 80 93 24 22 sts 0x2224, r24 ; 0x802224 + 22ca: 90 93 25 22 sts 0x2225, r25 ; 0x802225 + 22ce: 44 db rcall .-2424 ; 0x1958 + 22d0: 17 c0 rjmp .+46 ; 0x2300 <__vector_125+0x146> + 22d2: 80 91 cb 04 lds r24, 0x04CB ; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb> + 22d6: 86 ff sbrs r24, 6 + 22d8: 08 c0 rjmp .+16 ; 0x22ea <__vector_125+0x130> + 22da: 80 e4 ldi r24, 0x40 ; 64 + 22dc: 80 93 ca 04 sts 0x04CA, r24 ; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca> + 22e0: 80 e0 ldi r24, 0x00 ; 0 + 22e2: 10 db rcall .-2528 ; 0x1904 + 22e4: 0e 94 67 01 call 0x2ce ; 0x2ce + 22e8: 0b c0 rjmp .+22 ; 0x2300 <__vector_125+0x146> + 22ea: 80 91 cb 04 lds r24, 0x04CB ; 0x8004cb <__TEXT_REGION_LENGTH__+0x7004cb> + 22ee: 85 ff sbrs r24, 5 + 22f0: 07 c0 rjmp .+14 ; 0x2300 <__vector_125+0x146> + 22f2: 80 e2 ldi r24, 0x20 ; 32 + 22f4: 80 93 ca 04 sts 0x04CA, r24 ; 0x8004ca <__TEXT_REGION_LENGTH__+0x7004ca> + 22f8: 81 e0 ldi r24, 0x01 ; 1 + 22fa: 04 db rcall .-2552 ; 0x1904 + 22fc: 0e 94 68 01 call 0x2d0 ; 0x2d0 + 2300: ff 91 pop r31 + 2302: ef 91 pop r30 + 2304: bf 91 pop r27 + 2306: af 91 pop r26 + 2308: 9f 91 pop r25 + 230a: 8f 91 pop r24 + 230c: 7f 91 pop r23 + 230e: 6f 91 pop r22 + 2310: 5f 91 pop r21 + 2312: 4f 91 pop r20 + 2314: 3f 91 pop r19 + 2316: 2f 91 pop r18 + 2318: 0f 91 pop r16 + 231a: 0f 90 pop r0 + 231c: 0f be out 0x3f, r0 ; 63 + 231e: 0f 90 pop r0 + 2320: 1f 90 pop r1 + 2322: 18 95 reti -00002340 <__vector_126>: - 2340: 1f 92 push r1 - 2342: 0f 92 push r0 - 2344: 0f b6 in r0, 0x3f ; 63 - 2346: 0f 92 push r0 - 2348: 11 24 eor r1, r1 - 234a: 0f 93 push r16 - 234c: 1f 93 push r17 - 234e: 2f 93 push r18 - 2350: 3f 93 push r19 - 2352: 4f 93 push r20 - 2354: 5f 93 push r21 - 2356: 6f 93 push r22 - 2358: 7f 93 push r23 - 235a: 8f 93 push r24 - 235c: 9f 93 push r25 - 235e: af 93 push r26 - 2360: bf 93 push r27 - 2362: cf 93 push r28 - 2364: df 93 push r29 - 2366: ef 93 push r30 - 2368: ff 93 push r31 - 236a: 80 91 cc 04 lds r24, 0x04CC ; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc> - 236e: 81 ff sbrs r24, 1 - 2370: 1a c0 rjmp .+52 ; 0x23a6 <__vector_126+0x66> - 2372: 82 e0 ldi r24, 0x02 ; 2 - 2374: 80 93 cc 04 sts 0x04CC, r24 ; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc> - 2378: 80 91 c5 04 lds r24, 0x04C5 ; 0x8004c5 <__TEXT_REGION_LENGTH__+0x7004c5> - 237c: 81 95 neg r24 - 237e: 88 0f add r24, r24 - 2380: e0 e2 ldi r30, 0x20 ; 32 - 2382: f2 e2 ldi r31, 0x22 ; 34 - 2384: e8 1b sub r30, r24 - 2386: f1 09 sbc r31, r1 - 2388: 20 81 ld r18, Z - 238a: 31 81 ldd r19, Z+1 ; 0x01 - 238c: 20 52 subi r18, 0x20 ; 32 - 238e: 32 42 sbci r19, 0x22 ; 34 - 2390: 83 e0 ldi r24, 0x03 ; 3 - 2392: 36 95 lsr r19 - 2394: 27 95 ror r18 - 2396: 8a 95 dec r24 - 2398: e1 f7 brne .-8 ; 0x2392 <__vector_126+0x52> - 239a: 82 2f mov r24, r18 - 239c: 86 95 lsr r24 - 239e: 20 fd sbrc r18, 0 - 23a0: 06 c0 rjmp .+12 ; 0x23ae <__vector_126+0x6e> - 23a2: c0 e0 ldi r28, 0x00 ; 0 - 23a4: 05 c0 rjmp .+10 ; 0x23b0 <__vector_126+0x70> - 23a6: b2 dc rcall .-1692 ; 0x1d0c - 23a8: 88 23 and r24, r24 - 23aa: 19 f3 breq .-58 ; 0x2372 <__vector_126+0x32> - 23ac: 86 c0 rjmp .+268 ; 0x24ba <__vector_126+0x17a> - 23ae: c0 e8 ldi r28, 0x80 ; 128 - 23b0: c8 0f add r28, r24 - 23b2: 8c 2f mov r24, r28 - 23b4: c8 da rcall .-2672 ; 0x1946 - 23b6: fc 01 movw r30, r24 - 23b8: 20 81 ld r18, Z - 23ba: 25 ff sbrs r18, 5 - 23bc: 7e c0 rjmp .+252 ; 0x24ba <__vector_126+0x17a> - 23be: 00 e2 ldi r16, 0x20 ; 32 - 23c0: 06 93 lac Z, r16 - 23c2: c1 11 cpse r28, r1 - 23c4: 74 c0 rjmp .+232 ; 0x24ae <__vector_126+0x16e> - 23c6: 80 91 0d 22 lds r24, 0x220D ; 0x80220d - 23ca: 84 30 cpi r24, 0x04 ; 4 - 23cc: 19 f4 brne .+6 ; 0x23d4 <__vector_126+0x94> - 23ce: 15 db rcall .-2518 ; 0x19fa - 23d0: d1 da rcall .-2654 ; 0x1974 - 23d2: 73 c0 rjmp .+230 ; 0x24ba <__vector_126+0x17a> - 23d4: 00 91 22 22 lds r16, 0x2222 ; 0x802222 - 23d8: 10 91 23 22 lds r17, 0x2223 ; 0x802223 - 23dc: 80 91 70 24 lds r24, 0x2470 ; 0x802470 - 23e0: 90 91 71 24 lds r25, 0x2471 ; 0x802471 - 23e4: c0 91 09 22 lds r28, 0x2209 ; 0x802209 - 23e8: d0 91 0a 22 lds r29, 0x220A ; 0x80220a - 23ec: 9e 01 movw r18, r28 - 23ee: 20 0f add r18, r16 - 23f0: 31 1f adc r19, r17 - 23f2: 82 17 cp r24, r18 - 23f4: 93 07 cpc r25, r19 - 23f6: 18 f4 brcc .+6 ; 0x23fe <__vector_126+0xbe> - 23f8: 8c 01 movw r16, r24 - 23fa: 0c 1b sub r16, r28 - 23fc: 1d 0b sbc r17, r29 - 23fe: 80 91 6e 24 lds r24, 0x246E ; 0x80246e - 2402: 90 91 6f 24 lds r25, 0x246F ; 0x80246f - 2406: a8 01 movw r20, r16 - 2408: 69 ec ldi r22, 0xC9 ; 201 - 240a: 71 e2 ldi r23, 0x21 ; 33 - 240c: 8c 0f add r24, r28 - 240e: 9d 1f adc r25, r29 - 2410: 83 d0 rcall .+262 ; 0x2518 - 2412: c0 0f add r28, r16 - 2414: d1 1f adc r29, r17 - 2416: c0 93 09 22 sts 0x2209, r28 ; 0x802209 - 241a: d0 93 0a 22 sts 0x220A, r29 ; 0x80220a - 241e: 00 34 cpi r16, 0x40 ; 64 - 2420: 11 05 cpc r17, r1 - 2422: 69 f4 brne .+26 ; 0x243e <__vector_126+0xfe> - 2424: 80 91 0b 22 lds r24, 0x220B ; 0x80220b - 2428: 90 91 0c 22 lds r25, 0x220C ; 0x80220c - 242c: 8c 0f add r24, r28 - 242e: 9d 1f adc r25, r29 - 2430: 20 91 6c 24 lds r18, 0x246C ; 0x80246c - 2434: 30 91 6d 24 lds r19, 0x246D ; 0x80246d - 2438: 82 17 cp r24, r18 - 243a: 93 07 cpc r25, r19 - 243c: 88 f0 brcs .+34 ; 0x2460 <__vector_126+0x120> - 243e: c0 93 70 24 sts 0x2470, r28 ; 0x802470 - 2442: d0 93 71 24 sts 0x2471, r29 ; 0x802471 - 2446: e0 91 74 24 lds r30, 0x2474 ; 0x802474 - 244a: f0 91 75 24 lds r31, 0x2475 ; 0x802475 - 244e: 30 97 sbiw r30, 0x00 ; 0 - 2450: 29 f0 breq .+10 ; 0x245c <__vector_126+0x11c> - 2452: 09 95 icall - 2454: 81 11 cpse r24, r1 - 2456: 02 c0 rjmp .+4 ; 0x245c <__vector_126+0x11c> - 2458: b4 da rcall .-2712 ; 0x19c2 - 245a: 2f c0 rjmp .+94 ; 0x24ba <__vector_126+0x17a> - 245c: c0 da rcall .-2688 ; 0x19de - 245e: 2d c0 rjmp .+90 ; 0x24ba <__vector_126+0x17a> - 2460: 80 91 70 24 lds r24, 0x2470 ; 0x802470 - 2464: 90 91 71 24 lds r25, 0x2471 ; 0x802471 - 2468: 8c 17 cp r24, r28 - 246a: 9d 07 cpc r25, r29 - 246c: d9 f4 brne .+54 ; 0x24a4 <__vector_126+0x164> - 246e: e0 91 74 24 lds r30, 0x2474 ; 0x802474 - 2472: f0 91 75 24 lds r31, 0x2475 ; 0x802475 - 2476: 30 97 sbiw r30, 0x00 ; 0 - 2478: 79 f3 breq .-34 ; 0x2458 <__vector_126+0x118> - 247a: 09 95 icall - 247c: 88 23 and r24, r24 - 247e: 61 f3 breq .-40 ; 0x2458 <__vector_126+0x118> - 2480: 20 91 0b 22 lds r18, 0x220B ; 0x80220b - 2484: 30 91 0c 22 lds r19, 0x220C ; 0x80220c - 2488: 80 91 09 22 lds r24, 0x2209 ; 0x802209 - 248c: 90 91 0a 22 lds r25, 0x220A ; 0x80220a - 2490: 82 0f add r24, r18 - 2492: 93 1f adc r25, r19 - 2494: 80 93 0b 22 sts 0x220B, r24 ; 0x80220b - 2498: 90 93 0c 22 sts 0x220C, r25 ; 0x80220c - 249c: 10 92 09 22 sts 0x2209, r1 ; 0x802209 - 24a0: 10 92 0a 22 sts 0x220A, r1 ; 0x80220a - 24a4: e0 e2 ldi r30, 0x20 ; 32 - 24a6: f2 e2 ldi r31, 0x22 ; 34 - 24a8: 02 e0 ldi r16, 0x02 ; 2 - 24aa: 06 93 lac Z, r16 - 24ac: 06 c0 rjmp .+12 ; 0x24ba <__vector_126+0x17a> - 24ae: c0 38 cpi r28, 0x80 ; 128 - 24b0: 11 f4 brne .+4 ; 0x24b6 <__vector_126+0x176> - 24b2: be db rcall .-2180 ; 0x1c30 - 24b4: 02 c0 rjmp .+4 ; 0x24ba <__vector_126+0x17a> - 24b6: 8c 2f mov r24, r28 - 24b8: c2 da rcall .-2684 ; 0x1a3e - 24ba: ff 91 pop r31 - 24bc: ef 91 pop r30 - 24be: df 91 pop r29 - 24c0: cf 91 pop r28 - 24c2: bf 91 pop r27 - 24c4: af 91 pop r26 - 24c6: 9f 91 pop r25 - 24c8: 8f 91 pop r24 - 24ca: 7f 91 pop r23 - 24cc: 6f 91 pop r22 - 24ce: 5f 91 pop r21 - 24d0: 4f 91 pop r20 - 24d2: 3f 91 pop r19 - 24d4: 2f 91 pop r18 - 24d6: 1f 91 pop r17 - 24d8: 0f 91 pop r16 - 24da: 0f 90 pop r0 - 24dc: 0f be out 0x3f, r0 ; 63 - 24de: 0f 90 pop r0 - 24e0: 1f 90 pop r1 - 24e2: 18 95 reti +00002324 <__vector_126>: + 2324: 1f 92 push r1 + 2326: 0f 92 push r0 + 2328: 0f b6 in r0, 0x3f ; 63 + 232a: 0f 92 push r0 + 232c: 11 24 eor r1, r1 + 232e: 0f 93 push r16 + 2330: 1f 93 push r17 + 2332: 2f 93 push r18 + 2334: 3f 93 push r19 + 2336: 4f 93 push r20 + 2338: 5f 93 push r21 + 233a: 6f 93 push r22 + 233c: 7f 93 push r23 + 233e: 8f 93 push r24 + 2340: 9f 93 push r25 + 2342: af 93 push r26 + 2344: bf 93 push r27 + 2346: cf 93 push r28 + 2348: df 93 push r29 + 234a: ef 93 push r30 + 234c: ff 93 push r31 + 234e: 80 91 cc 04 lds r24, 0x04CC ; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc> + 2352: 81 ff sbrs r24, 1 + 2354: 1a c0 rjmp .+52 ; 0x238a <__vector_126+0x66> + 2356: 82 e0 ldi r24, 0x02 ; 2 + 2358: 80 93 cc 04 sts 0x04CC, r24 ; 0x8004cc <__TEXT_REGION_LENGTH__+0x7004cc> + 235c: 80 91 c5 04 lds r24, 0x04C5 ; 0x8004c5 <__TEXT_REGION_LENGTH__+0x7004c5> + 2360: 81 95 neg r24 + 2362: 88 0f add r24, r24 + 2364: e0 e2 ldi r30, 0x20 ; 32 + 2366: f2 e2 ldi r31, 0x22 ; 34 + 2368: e8 1b sub r30, r24 + 236a: f1 09 sbc r31, r1 + 236c: 20 81 ld r18, Z + 236e: 31 81 ldd r19, Z+1 ; 0x01 + 2370: 20 52 subi r18, 0x20 ; 32 + 2372: 32 42 sbci r19, 0x22 ; 34 + 2374: 83 e0 ldi r24, 0x03 ; 3 + 2376: 36 95 lsr r19 + 2378: 27 95 ror r18 + 237a: 8a 95 dec r24 + 237c: e1 f7 brne .-8 ; 0x2376 <__vector_126+0x52> + 237e: 82 2f mov r24, r18 + 2380: 86 95 lsr r24 + 2382: 20 fd sbrc r18, 0 + 2384: 06 c0 rjmp .+12 ; 0x2392 <__vector_126+0x6e> + 2386: c0 e0 ldi r28, 0x00 ; 0 + 2388: 05 c0 rjmp .+10 ; 0x2394 <__vector_126+0x70> + 238a: b2 dc rcall .-1692 ; 0x1cf0 + 238c: 88 23 and r24, r24 + 238e: 19 f3 breq .-58 ; 0x2356 <__vector_126+0x32> + 2390: 86 c0 rjmp .+268 ; 0x249e <__vector_126+0x17a> + 2392: c0 e8 ldi r28, 0x80 ; 128 + 2394: c8 0f add r28, r24 + 2396: 8c 2f mov r24, r28 + 2398: c8 da rcall .-2672 ; 0x192a + 239a: fc 01 movw r30, r24 + 239c: 20 81 ld r18, Z + 239e: 25 ff sbrs r18, 5 + 23a0: 7e c0 rjmp .+252 ; 0x249e <__vector_126+0x17a> + 23a2: 00 e2 ldi r16, 0x20 ; 32 + 23a4: 06 93 lac Z, r16 + 23a6: c1 11 cpse r28, r1 + 23a8: 74 c0 rjmp .+232 ; 0x2492 <__vector_126+0x16e> + 23aa: 80 91 0d 22 lds r24, 0x220D ; 0x80220d + 23ae: 84 30 cpi r24, 0x04 ; 4 + 23b0: 19 f4 brne .+6 ; 0x23b8 <__vector_126+0x94> + 23b2: 15 db rcall .-2518 ; 0x19de + 23b4: d1 da rcall .-2654 ; 0x1958 + 23b6: 73 c0 rjmp .+230 ; 0x249e <__vector_126+0x17a> + 23b8: 00 91 22 22 lds r16, 0x2222 ; 0x802222 + 23bc: 10 91 23 22 lds r17, 0x2223 ; 0x802223 + 23c0: 80 91 74 24 lds r24, 0x2474 ; 0x802474 + 23c4: 90 91 75 24 lds r25, 0x2475 ; 0x802475 + 23c8: c0 91 09 22 lds r28, 0x2209 ; 0x802209 + 23cc: d0 91 0a 22 lds r29, 0x220A ; 0x80220a + 23d0: 9e 01 movw r18, r28 + 23d2: 20 0f add r18, r16 + 23d4: 31 1f adc r19, r17 + 23d6: 82 17 cp r24, r18 + 23d8: 93 07 cpc r25, r19 + 23da: 18 f4 brcc .+6 ; 0x23e2 <__vector_126+0xbe> + 23dc: 8c 01 movw r16, r24 + 23de: 0c 1b sub r16, r28 + 23e0: 1d 0b sbc r17, r29 + 23e2: 80 91 72 24 lds r24, 0x2472 ; 0x802472 + 23e6: 90 91 73 24 lds r25, 0x2473 ; 0x802473 + 23ea: a8 01 movw r20, r16 + 23ec: 69 ec ldi r22, 0xC9 ; 201 + 23ee: 71 e2 ldi r23, 0x21 ; 33 + 23f0: 8c 0f add r24, r28 + 23f2: 9d 1f adc r25, r29 + 23f4: 83 d0 rcall .+262 ; 0x24fc + 23f6: c0 0f add r28, r16 + 23f8: d1 1f adc r29, r17 + 23fa: c0 93 09 22 sts 0x2209, r28 ; 0x802209 + 23fe: d0 93 0a 22 sts 0x220A, r29 ; 0x80220a + 2402: 00 34 cpi r16, 0x40 ; 64 + 2404: 11 05 cpc r17, r1 + 2406: 69 f4 brne .+26 ; 0x2422 <__vector_126+0xfe> + 2408: 80 91 0b 22 lds r24, 0x220B ; 0x80220b + 240c: 90 91 0c 22 lds r25, 0x220C ; 0x80220c + 2410: 8c 0f add r24, r28 + 2412: 9d 1f adc r25, r29 + 2414: 20 91 70 24 lds r18, 0x2470 ; 0x802470 + 2418: 30 91 71 24 lds r19, 0x2471 ; 0x802471 + 241c: 82 17 cp r24, r18 + 241e: 93 07 cpc r25, r19 + 2420: 88 f0 brcs .+34 ; 0x2444 <__vector_126+0x120> + 2422: c0 93 74 24 sts 0x2474, r28 ; 0x802474 + 2426: d0 93 75 24 sts 0x2475, r29 ; 0x802475 + 242a: e0 91 78 24 lds r30, 0x2478 ; 0x802478 + 242e: f0 91 79 24 lds r31, 0x2479 ; 0x802479 + 2432: 30 97 sbiw r30, 0x00 ; 0 + 2434: 29 f0 breq .+10 ; 0x2440 <__vector_126+0x11c> + 2436: 09 95 icall + 2438: 81 11 cpse r24, r1 + 243a: 02 c0 rjmp .+4 ; 0x2440 <__vector_126+0x11c> + 243c: b4 da rcall .-2712 ; 0x19a6 + 243e: 2f c0 rjmp .+94 ; 0x249e <__vector_126+0x17a> + 2440: c0 da rcall .-2688 ; 0x19c2 + 2442: 2d c0 rjmp .+90 ; 0x249e <__vector_126+0x17a> + 2444: 80 91 74 24 lds r24, 0x2474 ; 0x802474 + 2448: 90 91 75 24 lds r25, 0x2475 ; 0x802475 + 244c: 8c 17 cp r24, r28 + 244e: 9d 07 cpc r25, r29 + 2450: d9 f4 brne .+54 ; 0x2488 <__vector_126+0x164> + 2452: e0 91 78 24 lds r30, 0x2478 ; 0x802478 + 2456: f0 91 79 24 lds r31, 0x2479 ; 0x802479 + 245a: 30 97 sbiw r30, 0x00 ; 0 + 245c: 79 f3 breq .-34 ; 0x243c <__vector_126+0x118> + 245e: 09 95 icall + 2460: 88 23 and r24, r24 + 2462: 61 f3 breq .-40 ; 0x243c <__vector_126+0x118> + 2464: 20 91 0b 22 lds r18, 0x220B ; 0x80220b + 2468: 30 91 0c 22 lds r19, 0x220C ; 0x80220c + 246c: 80 91 09 22 lds r24, 0x2209 ; 0x802209 + 2470: 90 91 0a 22 lds r25, 0x220A ; 0x80220a + 2474: 82 0f add r24, r18 + 2476: 93 1f adc r25, r19 + 2478: 80 93 0b 22 sts 0x220B, r24 ; 0x80220b + 247c: 90 93 0c 22 sts 0x220C, r25 ; 0x80220c + 2480: 10 92 09 22 sts 0x2209, r1 ; 0x802209 + 2484: 10 92 0a 22 sts 0x220A, r1 ; 0x80220a + 2488: e0 e2 ldi r30, 0x20 ; 32 + 248a: f2 e2 ldi r31, 0x22 ; 34 + 248c: 02 e0 ldi r16, 0x02 ; 2 + 248e: 06 93 lac Z, r16 + 2490: 06 c0 rjmp .+12 ; 0x249e <__vector_126+0x17a> + 2492: c0 38 cpi r28, 0x80 ; 128 + 2494: 11 f4 brne .+4 ; 0x249a <__vector_126+0x176> + 2496: be db rcall .-2180 ; 0x1c14 + 2498: 02 c0 rjmp .+4 ; 0x249e <__vector_126+0x17a> + 249a: 8c 2f mov r24, r28 + 249c: c2 da rcall .-2684 ; 0x1a22 + 249e: ff 91 pop r31 + 24a0: ef 91 pop r30 + 24a2: df 91 pop r29 + 24a4: cf 91 pop r28 + 24a6: bf 91 pop r27 + 24a8: af 91 pop r26 + 24aa: 9f 91 pop r25 + 24ac: 8f 91 pop r24 + 24ae: 7f 91 pop r23 + 24b0: 6f 91 pop r22 + 24b2: 5f 91 pop r21 + 24b4: 4f 91 pop r20 + 24b6: 3f 91 pop r19 + 24b8: 2f 91 pop r18 + 24ba: 1f 91 pop r17 + 24bc: 0f 91 pop r16 + 24be: 0f 90 pop r0 + 24c0: 0f be out 0x3f, r0 ; 63 + 24c2: 0f 90 pop r0 + 24c4: 1f 90 pop r1 + 24c6: 18 95 reti -000024e4 <__udivmodhi4>: - 24e4: aa 1b sub r26, r26 - 24e6: bb 1b sub r27, r27 - 24e8: 51 e1 ldi r21, 0x11 ; 17 - 24ea: 07 c0 rjmp .+14 ; 0x24fa <__udivmodhi4_ep> +000024c8 <__udivmodhi4>: + 24c8: aa 1b sub r26, r26 + 24ca: bb 1b sub r27, r27 + 24cc: 51 e1 ldi r21, 0x11 ; 17 + 24ce: 07 c0 rjmp .+14 ; 0x24de <__udivmodhi4_ep> -000024ec <__udivmodhi4_loop>: - 24ec: aa 1f adc r26, r26 - 24ee: bb 1f adc r27, r27 - 24f0: a6 17 cp r26, r22 - 24f2: b7 07 cpc r27, r23 - 24f4: 10 f0 brcs .+4 ; 0x24fa <__udivmodhi4_ep> - 24f6: a6 1b sub r26, r22 - 24f8: b7 0b sbc r27, r23 +000024d0 <__udivmodhi4_loop>: + 24d0: aa 1f adc r26, r26 + 24d2: bb 1f adc r27, r27 + 24d4: a6 17 cp r26, r22 + 24d6: b7 07 cpc r27, r23 + 24d8: 10 f0 brcs .+4 ; 0x24de <__udivmodhi4_ep> + 24da: a6 1b sub r26, r22 + 24dc: b7 0b sbc r27, r23 -000024fa <__udivmodhi4_ep>: - 24fa: 88 1f adc r24, r24 - 24fc: 99 1f adc r25, r25 - 24fe: 5a 95 dec r21 - 2500: a9 f7 brne .-22 ; 0x24ec <__udivmodhi4_loop> - 2502: 80 95 com r24 - 2504: 90 95 com r25 - 2506: bc 01 movw r22, r24 - 2508: cd 01 movw r24, r26 - 250a: 08 95 ret +000024de <__udivmodhi4_ep>: + 24de: 88 1f adc r24, r24 + 24e0: 99 1f adc r25, r25 + 24e2: 5a 95 dec r21 + 24e4: a9 f7 brne .-22 ; 0x24d0 <__udivmodhi4_loop> + 24e6: 80 95 com r24 + 24e8: 90 95 com r25 + 24ea: bc 01 movw r22, r24 + 24ec: cd 01 movw r24, r26 + 24ee: 08 95 ret -0000250c <__tablejump2__>: - 250c: ee 0f add r30, r30 - 250e: ff 1f adc r31, r31 - 2510: 05 90 lpm r0, Z+ - 2512: f4 91 lpm r31, Z - 2514: e0 2d mov r30, r0 - 2516: 09 94 ijmp +000024f0 <__tablejump2__>: + 24f0: ee 0f add r30, r30 + 24f2: ff 1f adc r31, r31 + 24f4: 05 90 lpm r0, Z+ + 24f6: f4 91 lpm r31, Z + 24f8: e0 2d mov r30, r0 + 24fa: 09 94 ijmp -00002518 : - 2518: fb 01 movw r30, r22 - 251a: dc 01 movw r26, r24 - 251c: 02 c0 rjmp .+4 ; 0x2522 - 251e: 01 90 ld r0, Z+ - 2520: 0d 92 st X+, r0 - 2522: 41 50 subi r20, 0x01 ; 1 - 2524: 50 40 sbci r21, 0x00 ; 0 - 2526: d8 f7 brcc .-10 ; 0x251e - 2528: 08 95 ret +000024fc : + 24fc: fb 01 movw r30, r22 + 24fe: dc 01 movw r26, r24 + 2500: 02 c0 rjmp .+4 ; 0x2506 + 2502: 01 90 ld r0, Z+ + 2504: 0d 92 st X+, r0 + 2506: 41 50 subi r20, 0x01 ; 1 + 2508: 50 40 sbci r21, 0x00 ; 0 + 250a: d8 f7 brcc .-10 ; 0x2502 + 250c: 08 95 ret -0000252a <_exit>: - 252a: f8 94 cli +0000250e <_exit>: + 250e: f8 94 cli -0000252c <__stop_program>: - 252c: ff cf rjmp .-2 ; 0x252c <__stop_program> +00002510 <__stop_program>: + 2510: ff cf rjmp .-2 ; 0x2510 <__stop_program> diff --git a/AVR Code/USB_BULK_TEST/Release/USB_BULK_TEST.map b/AVR Code/USB_BULK_TEST/Release/USB_BULK_TEST.map index 8f18a597..2863a9e7 100644 --- a/AVR Code/USB_BULK_TEST/Release/USB_BULK_TEST.map +++ b/AVR Code/USB_BULK_TEST/Release/USB_BULK_TEST.map @@ -16,6 +16,7 @@ c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/.. Allocating common symbols Common symbol size file +debug_counter 0x4 src/main.o dacBuf_CH1 0x200 src/main.o udd_g_ctrlreq 0x10 src/main.o sleepmgr_locks 0x6 src/ASF/common/services/sleepmgr/xmega/sleepmgr.o @@ -400,7 +401,7 @@ END GROUP .rela.plt *(.rela.plt) -.text 0x00000000 0x252e +.text 0x00000000 0x2512 *(.vectors) .vectors 0x00000000 0x1fc C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/XMEGAA_DFP/1.0.39/gcc/dev/atxmega32a4u/avrxmega2/crtatxmega32a4u.o 0x00000000 __vector_default @@ -598,249 +599,249 @@ END GROUP 0x00000286 0x20 src/main.o 0x00000286 iso_callback .text.startup.main - 0x000002a6 0x44 src/main.o + 0x000002a6 0x28 src/main.o 0x000002a6 main .text.main_suspend_action - 0x000002ea 0x2 src/main.o - 0x000002ea main_suspend_action + 0x000002ce 0x2 src/main.o + 0x000002ce main_suspend_action .text.main_resume_action - 0x000002ec 0x2 src/main.o - 0x000002ec main_resume_action + 0x000002d0 0x2 src/main.o + 0x000002d0 main_resume_action .text.main_sof_action - 0x000002ee 0x42 src/main.o - 0x000002ee main_sof_action + 0x000002d2 0x42 src/main.o + 0x000002d2 main_sof_action .text.main_vendor_enable - 0x00000330 0x18 src/main.o - 0x00000330 main_vendor_enable + 0x00000314 0x18 src/main.o + 0x00000314 main_vendor_enable .text.main_vendor_disable - 0x00000348 0x6 src/main.o - 0x00000348 main_vendor_disable + 0x0000032c 0x6 src/main.o + 0x0000032c main_vendor_disable .text.main_setup_out_received - 0x0000034e 0x4 src/main.o - 0x0000034e main_setup_out_received + 0x00000332 0x4 src/main.o + 0x00000332 main_setup_out_received .text.main_setup_in_received - 0x00000352 0x4 src/main.o - 0x00000352 main_setup_in_received + 0x00000336 0x4 src/main.o + 0x00000336 main_setup_in_received .text.tiny_adc_ch0setup - 0x00000356 0x2c src/tiny_adc.o - 0x00000356 tiny_adc_ch0setup + 0x0000033a 0x2c src/tiny_adc.o + 0x0000033a tiny_adc_ch0setup .text.tiny_adc_ch1setup - 0x00000382 0x14 src/tiny_adc.o - 0x00000382 tiny_adc_ch1setup + 0x00000366 0x14 src/tiny_adc.o + 0x00000366 tiny_adc_ch1setup .text.tiny_adc_pid_setup - 0x00000396 0x14 src/tiny_adc.o - 0x00000396 tiny_adc_pid_setup + 0x0000037a 0x14 src/tiny_adc.o + 0x0000037a tiny_adc_pid_setup .text.ReadCalibrationByte - 0x000003aa 0x12 src/tiny_adc.o - 0x000003aa ReadCalibrationByte + 0x0000038e 0x12 src/tiny_adc.o + 0x0000038e ReadCalibrationByte .text.tiny_adc_setup - 0x000003bc 0x5e src/tiny_adc.o - 0x000003bc tiny_adc_setup + 0x000003a0 0x5e src/tiny_adc.o + 0x000003a0 tiny_adc_setup .text.tiny_dac_setup - 0x0000041a 0x48 src/tiny_dac.o - 0x0000041a tiny_dac_setup + 0x000003fe 0x48 src/tiny_dac.o + 0x000003fe tiny_dac_setup .text.tiny_dma_setup - 0x00000462 0x12 src/tiny_dma.o - 0x00000462 tiny_dma_setup + 0x00000446 0x12 src/tiny_dma.o + 0x00000446 tiny_dma_setup .text.tiny_dma_flush - 0x00000474 0x24 src/tiny_dma.o - 0x00000474 tiny_dma_flush + 0x00000458 0x24 src/tiny_dma.o + 0x00000458 tiny_dma_flush .text.tiny_dma_set_mode_0 - 0x00000498 0x90 src/tiny_dma.o - 0x00000498 tiny_dma_set_mode_0 + 0x0000047c 0x90 src/tiny_dma.o + 0x0000047c tiny_dma_set_mode_0 .text.tiny_dma_loop_mode_0 - 0x00000528 0x60 src/tiny_dma.o - 0x00000528 tiny_dma_loop_mode_0 + 0x0000050c 0x60 src/tiny_dma.o + 0x0000050c tiny_dma_loop_mode_0 .text.tiny_dma_set_mode_1 - 0x00000588 0x9c src/tiny_dma.o - 0x00000588 tiny_dma_set_mode_1 + 0x0000056c 0x9c src/tiny_dma.o + 0x0000056c tiny_dma_set_mode_1 .text.tiny_dma_loop_mode_1 - 0x00000624 0xae src/tiny_dma.o - 0x00000624 tiny_dma_loop_mode_1 + 0x00000608 0xae src/tiny_dma.o + 0x00000608 tiny_dma_loop_mode_1 .text.tiny_dma_set_mode_2 - 0x000006d2 0x94 src/tiny_dma.o - 0x000006d2 tiny_dma_set_mode_2 + 0x000006b6 0x94 src/tiny_dma.o + 0x000006b6 tiny_dma_set_mode_2 .text.tiny_dma_loop_mode_2 - 0x00000766 0xb0 src/tiny_dma.o - 0x00000766 tiny_dma_loop_mode_2 + 0x0000074a 0xb0 src/tiny_dma.o + 0x0000074a tiny_dma_loop_mode_2 .text.tiny_dma_set_mode_3 - 0x00000816 0xcc src/tiny_dma.o - 0x00000816 tiny_dma_set_mode_3 + 0x000007fa 0xcc src/tiny_dma.o + 0x000007fa tiny_dma_set_mode_3 .text.tiny_dma_loop_mode_3 - 0x000008e2 0x60 src/tiny_dma.o - 0x000008e2 tiny_dma_loop_mode_3 + 0x000008c6 0x60 src/tiny_dma.o + 0x000008c6 tiny_dma_loop_mode_3 .text.tiny_dma_set_mode_4 - 0x00000942 0x7c src/tiny_dma.o - 0x00000942 tiny_dma_set_mode_4 + 0x00000926 0x7c src/tiny_dma.o + 0x00000926 tiny_dma_set_mode_4 .text.tiny_dma_loop_mode_4 - 0x000009be 0xca src/tiny_dma.o - 0x000009be tiny_dma_loop_mode_4 + 0x000009a2 0xca src/tiny_dma.o + 0x000009a2 tiny_dma_loop_mode_4 .text.tiny_dma_set_mode_5 - 0x00000a88 0x90 src/tiny_dma.o - 0x00000a88 tiny_dma_set_mode_5 + 0x00000a6c 0x90 src/tiny_dma.o + 0x00000a6c tiny_dma_set_mode_5 .text.tiny_dma_set_mode_6 - 0x00000b18 0x92 src/tiny_dma.o - 0x00000b18 tiny_dma_set_mode_6 + 0x00000afc 0x92 src/tiny_dma.o + 0x00000afc tiny_dma_set_mode_6 .text.tiny_dma_loop_mode_6 - 0x00000baa 0x5c src/tiny_dma.o - 0x00000baa tiny_dma_loop_mode_6 + 0x00000b8e 0x5c src/tiny_dma.o + 0x00000b8e tiny_dma_loop_mode_6 .text.tiny_dma_set_mode_7 - 0x00000c06 0x92 src/tiny_dma.o - 0x00000c06 tiny_dma_set_mode_7 + 0x00000bea 0x92 src/tiny_dma.o + 0x00000bea tiny_dma_set_mode_7 .text.tiny_dma_loop_mode_7 - 0x00000c98 0x5c src/tiny_dma.o - 0x00000c98 tiny_dma_loop_mode_7 + 0x00000c7c 0x5c src/tiny_dma.o + 0x00000c7c tiny_dma_loop_mode_7 .text.tiny_timer_setup - 0x00000cf4 0x76 src/tiny_timer.o - 0x00000cf4 tiny_timer_setup + 0x00000cd8 0x76 src/tiny_timer.o + 0x00000cd8 tiny_timer_setup .text.__vector_83 - 0x00000d6a 0xc0 src/tiny_timer.o - 0x00000d6a __vector_83 + 0x00000d4e 0xc0 src/tiny_timer.o + 0x00000d4e __vector_83 .text.tiny_uart_setup - 0x00000e2a 0x34 src/tiny_uart.o - 0x00000e2a tiny_uart_setup + 0x00000e0e 0x34 src/tiny_uart.o + 0x00000e0e tiny_uart_setup .text.tiny_spi_setup - 0x00000e5e 0x1e src/tiny_uart.o - 0x00000e5e tiny_spi_setup + 0x00000e42 0x1e src/tiny_uart.o + 0x00000e42 tiny_spi_setup .text.__vector_24 - 0x00000e7c 0x16 src/tiny_uart.o - 0x00000e7c __vector_24 + 0x00000e60 0x16 src/tiny_uart.o + 0x00000e60 __vector_24 .text.osc_enable_autocalibration.constprop.4 - 0x00000e92 0x38 src/ASF/common/services/clock/xmega/sysclk.o + 0x00000e76 0x38 src/ASF/common/services/clock/xmega/sysclk.o .text.sysclk_init - 0x00000eca 0xa6 src/ASF/common/services/clock/xmega/sysclk.o - 0x00000eca sysclk_init + 0x00000eae 0xa6 src/ASF/common/services/clock/xmega/sysclk.o + 0x00000eae sysclk_init .text.sysclk_enable_module - 0x00000f70 0x18 src/ASF/common/services/clock/xmega/sysclk.o - 0x00000f70 sysclk_enable_module + 0x00000f54 0x18 src/ASF/common/services/clock/xmega/sysclk.o + 0x00000f54 sysclk_enable_module .text.sysclk_enable_usb - 0x00000f88 0x40 src/ASF/common/services/clock/xmega/sysclk.o - 0x00000f88 sysclk_enable_usb + 0x00000f6c 0x40 src/ASF/common/services/clock/xmega/sysclk.o + 0x00000f6c sysclk_enable_usb .text.udi_vendor_getsetting - 0x00000fc8 0x6 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o - 0x00000fc8 udi_vendor_getsetting + 0x00000fac 0x6 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o + 0x00000fac udi_vendor_getsetting .text.udi_vendor_disable - 0x00000fce 0xc src/ASF/common/services/usb/class/vendor/device/udi_vendor.o - 0x00000fce udi_vendor_disable + 0x00000fb2 0xc src/ASF/common/services/usb/class/vendor/device/udi_vendor.o + 0x00000fb2 udi_vendor_disable .text.udi_vendor_enable - 0x00000fda 0x14 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o - 0x00000fda udi_vendor_enable + 0x00000fbe 0x14 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o + 0x00000fbe udi_vendor_enable .text.udi_vendor_setup - 0x00000fee 0x38 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o - 0x00000fee udi_vendor_setup + 0x00000fd2 0x38 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o + 0x00000fd2 udi_vendor_setup .text.udi_vendor_iso_in_run - 0x00001026 0x16 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o - 0x00001026 udi_vendor_iso_in_run + 0x0000100a 0x16 src/ASF/common/services/usb/class/vendor/device/udi_vendor.o + 0x0000100a udi_vendor_iso_in_run .text.udc_valid_address - 0x0000103c 0x8 src/ASF/common/services/usb/udc/udc.o + 0x00001020 0x8 src/ASF/common/services/usb/udc/udc.o .text.udc_update_iface_desc - 0x00001044 0x66 src/ASF/common/services/usb/udc/udc.o + 0x00001028 0x66 src/ASF/common/services/usb/udc/udc.o .text.udc_next_desc_in_iface.constprop.3 - 0x000010aa 0x40 src/ASF/common/services/usb/udc/udc.o + 0x0000108e 0x40 src/ASF/common/services/usb/udc/udc.o .text.udc_iface_enable - 0x000010ea 0x66 src/ASF/common/services/usb/udc/udc.o + 0x000010ce 0x66 src/ASF/common/services/usb/udc/udc.o .text.udc_iface_disable - 0x00001150 0x7e src/ASF/common/services/usb/udc/udc.o + 0x00001134 0x7e src/ASF/common/services/usb/udc/udc.o .text.udc_get_interface_desc - 0x000011ce 0xa src/ASF/common/services/usb/udc/udc.o - 0x000011ce udc_get_interface_desc + 0x000011b2 0xa src/ASF/common/services/usb/udc/udc.o + 0x000011b2 udc_get_interface_desc .text.udc_start - 0x000011d8 0x2 src/ASF/common/services/usb/udc/udc.o - 0x000011d8 udc_start + 0x000011bc 0x2 src/ASF/common/services/usb/udc/udc.o + 0x000011bc udc_start .text.udc_reset - 0x000011da 0x38 src/ASF/common/services/usb/udc/udc.o - 0x000011da udc_reset + 0x000011be 0x38 src/ASF/common/services/usb/udc/udc.o + 0x000011be udc_reset .text.udc_sof_notify - 0x00001212 0x4a src/ASF/common/services/usb/udc/udc.o - 0x00001212 udc_sof_notify + 0x000011f6 0x4a src/ASF/common/services/usb/udc/udc.o + 0x000011f6 udc_sof_notify .text.udc_process_setup - 0x0000125c 0x668 src/ASF/common/services/usb/udc/udc.o - 0x0000125c udc_process_setup + 0x00001240 0x668 src/ASF/common/services/usb/udc/udc.o + 0x00001240 udc_process_setup .text.ccp_write_io - 0x000018c4 0xc src/ASF/xmega/drivers/cpu/ccp.o - 0x000018c4 ccp_write_io + 0x000018a8 0xc src/ASF/xmega/drivers/cpu/ccp.o + 0x000018a8 ccp_write_io .text.nvm_read_byte - 0x000018d0 0x14 src/ASF/xmega/drivers/nvm/nvm_asm.o - 0x000018d0 nvm_read_byte + 0x000018b4 0x14 src/ASF/xmega/drivers/nvm/nvm_asm.o + 0x000018b4 nvm_read_byte .text.sleepmgr_lock_mode - 0x000018e4 0x1e src/ASF/xmega/drivers/usb/usb_device.o + 0x000018c8 0x1e src/ASF/xmega/drivers/usb/usb_device.o .text.sleepmgr_unlock_mode - 0x00001902 0x1e src/ASF/xmega/drivers/usb/usb_device.o + 0x000018e6 0x1e src/ASF/xmega/drivers/usb/usb_device.o .text.udd_sleep_mode - 0x00001920 0x26 src/ASF/xmega/drivers/usb/usb_device.o + 0x00001904 0x26 src/ASF/xmega/drivers/usb/usb_device.o .text.udd_ep_get_ctrl - 0x00001946 0x2e src/ASF/xmega/drivers/usb/usb_device.o + 0x0000192a 0x2e src/ASF/xmega/drivers/usb/usb_device.o .text.udd_ctrl_init - 0x00001974 0x4e src/ASF/xmega/drivers/usb/usb_device.o + 0x00001958 0x4e src/ASF/xmega/drivers/usb/usb_device.o .text.udd_ctrl_stall_data - 0x000019c2 0x1c src/ASF/xmega/drivers/usb/usb_device.o + 0x000019a6 0x1c src/ASF/xmega/drivers/usb/usb_device.o .text.udd_ctrl_send_zlp_in - 0x000019de 0x1c src/ASF/xmega/drivers/usb/usb_device.o + 0x000019c2 0x1c src/ASF/xmega/drivers/usb/usb_device.o .text.udd_ctrl_endofrequest - 0x000019fa 0x10 src/ASF/xmega/drivers/usb/usb_device.o + 0x000019de 0x10 src/ASF/xmega/drivers/usb/usb_device.o .text.udd_ep_get_job - 0x00001a0a 0x34 src/ASF/xmega/drivers/usb/usb_device.o + 0x000019ee 0x34 src/ASF/xmega/drivers/usb/usb_device.o .text.udd_ep_trans_complet - 0x00001a3e 0x1f2 src/ASF/xmega/drivers/usb/usb_device.o + 0x00001a22 0x1f2 src/ASF/xmega/drivers/usb/usb_device.o .text.udd_ctrl_in_sent - 0x00001c30 0xdc src/ASF/xmega/drivers/usb/usb_device.o + 0x00001c14 0xdc src/ASF/xmega/drivers/usb/usb_device.o .text.udd_ctrl_interrupt_tc_setup - 0x00001d0c 0xee src/ASF/xmega/drivers/usb/usb_device.o + 0x00001cf0 0xee src/ASF/xmega/drivers/usb/usb_device.o .text.udd_attach - 0x00001dfa 0x46 src/ASF/xmega/drivers/usb/usb_device.o - 0x00001dfa udd_attach + 0x00001dde 0x46 src/ASF/xmega/drivers/usb/usb_device.o + 0x00001dde udd_attach .text.udd_enable - 0x00001e40 0xf0 src/ASF/xmega/drivers/usb/usb_device.o - 0x00001e40 udd_enable + 0x00001e24 0xf0 src/ASF/xmega/drivers/usb/usb_device.o + 0x00001e24 udd_enable .text.udd_set_address - 0x00001f30 0x6 src/ASF/xmega/drivers/usb/usb_device.o - 0x00001f30 udd_set_address + 0x00001f14 0x6 src/ASF/xmega/drivers/usb/usb_device.o + 0x00001f14 udd_set_address .text.udd_getaddress - 0x00001f36 0x6 src/ASF/xmega/drivers/usb/usb_device.o - 0x00001f36 udd_getaddress + 0x00001f1a 0x6 src/ASF/xmega/drivers/usb/usb_device.o + 0x00001f1a udd_getaddress .text.udd_set_setup_payload - 0x00001f3c 0xe src/ASF/xmega/drivers/usb/usb_device.o - 0x00001f3c udd_set_setup_payload + 0x00001f20 0xe src/ASF/xmega/drivers/usb/usb_device.o + 0x00001f20 udd_set_setup_payload .text.udd_ep_alloc - 0x00001f4a 0xa2 src/ASF/xmega/drivers/usb/usb_device.o - 0x00001f4a udd_ep_alloc + 0x00001f2e 0xa2 src/ASF/xmega/drivers/usb/usb_device.o + 0x00001f2e udd_ep_alloc .text.udd_ep_is_halted - 0x00001fec 0xe src/ASF/xmega/drivers/usb/usb_device.o - 0x00001fec udd_ep_is_halted + 0x00001fd0 0xe src/ASF/xmega/drivers/usb/usb_device.o + 0x00001fd0 udd_ep_is_halted .text.udd_ep_clear_halt - 0x00001ffa 0x32 src/ASF/xmega/drivers/usb/usb_device.o - 0x00001ffa udd_ep_clear_halt + 0x00001fde 0x32 src/ASF/xmega/drivers/usb/usb_device.o + 0x00001fde udd_ep_clear_halt .text.udd_ep_run - 0x0000202c 0x118 src/ASF/xmega/drivers/usb/usb_device.o - 0x0000202c udd_ep_run + 0x00002010 0x118 src/ASF/xmega/drivers/usb/usb_device.o + 0x00002010 udd_ep_run .text.udd_ep_abort - 0x00002144 0x60 src/ASF/xmega/drivers/usb/usb_device.o - 0x00002144 udd_ep_abort + 0x00002128 0x60 src/ASF/xmega/drivers/usb/usb_device.o + 0x00002128 udd_ep_abort .text.udd_ep_free - 0x000021a4 0x12 src/ASF/xmega/drivers/usb/usb_device.o - 0x000021a4 udd_ep_free + 0x00002188 0x12 src/ASF/xmega/drivers/usb/usb_device.o + 0x00002188 udd_ep_free .text.udd_ep_set_halt - 0x000021b6 0x20 src/ASF/xmega/drivers/usb/usb_device.o - 0x000021b6 udd_ep_set_halt + 0x0000219a 0x20 src/ASF/xmega/drivers/usb/usb_device.o + 0x0000219a udd_ep_set_halt .text.__vector_125 - 0x000021d6 0x16a src/ASF/xmega/drivers/usb/usb_device.o - 0x000021d6 __vector_125 + 0x000021ba 0x16a src/ASF/xmega/drivers/usb/usb_device.o + 0x000021ba __vector_125 .text.__vector_126 - 0x00002340 0x1a4 src/ASF/xmega/drivers/usb/usb_device.o - 0x00002340 __vector_126 + 0x00002324 0x1a4 src/ASF/xmega/drivers/usb/usb_device.o + 0x00002324 __vector_126 .text.libgcc.div - 0x000024e4 0x28 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_udivmodhi4.o) - 0x000024e4 __udivmodhi4 - .text.libgcc 0x0000250c 0xc c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_tablejump2.o) - 0x0000250c __tablejump2__ + 0x000024c8 0x28 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_udivmodhi4.o) + 0x000024c8 __udivmodhi4 + .text.libgcc 0x000024f0 0xc c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_tablejump2.o) + 0x000024f0 __tablejump2__ .text.avr-libc - 0x00002518 0x12 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/../../../../avr/lib/avrxmega2\libc.a(memcpy.o) - 0x00002518 memcpy - 0x0000252a . = ALIGN (0x2) + 0x000024fc 0x12 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/../../../../avr/lib/avrxmega2\libc.a(memcpy.o) + 0x000024fc memcpy + 0x0000250e . = ALIGN (0x2) *(.fini9) - .fini9 0x0000252a 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_exit.o) - 0x0000252a _exit - 0x0000252a exit + .fini9 0x0000250e 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_exit.o) + 0x0000250e _exit + 0x0000250e exit *(.fini9) *(.fini8) *(.fini8) @@ -859,11 +860,11 @@ END GROUP *(.fini1) *(.fini1) *(.fini0) - .fini0 0x0000252a 0x4 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_exit.o) + .fini0 0x0000250e 0x4 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avrxmega2\libgcc.a(_exit.o) *(.fini0) - 0x0000252e _etext = . + 0x00002512 _etext = . -.data 0x00802000 0xc0 load address 0x0000252e +.data 0x00802000 0xc0 load address 0x00002512 0x00802000 PROVIDE (__data_start, .) *(.data) *(.data*) @@ -914,7 +915,7 @@ END GROUP 0x008020c0 _edata = . 0x008020c0 PROVIDE (__data_end, .) -.bss 0x008020c0 0xb98 +.bss 0x008020c0 0xb9c 0x008020c0 PROVIDE (__bss_start, .) *(.bss) *(.bss*) @@ -963,22 +964,23 @@ END GROUP 0x00802264 0x1 src/ASF/xmega/drivers/usb/usb_device.o *(COMMON) *fill* 0x00802265 0x1 - COMMON 0x00802266 0x9ec src/main.o - 0x00802266 dacBuf_CH1 - 0x00802466 udd_g_ctrlreq - 0x00802476 dacBuf_CH2 - 0x00802676 isoBuf - COMMON 0x00802c52 0x6 src/ASF/common/services/sleepmgr/xmega/sleepmgr.o - 0x00802c52 sleepmgr_locks - 0x00802c58 PROVIDE (__bss_end, .) - 0x0000252e __data_load_start = LOADADDR (.data) - 0x000025ee __data_load_end = (__data_load_start + SIZEOF (.data)) + COMMON 0x00802266 0x9f0 src/main.o + 0x00802266 debug_counter + 0x0080226a dacBuf_CH1 + 0x0080246a udd_g_ctrlreq + 0x0080247a dacBuf_CH2 + 0x0080267a isoBuf + COMMON 0x00802c56 0x6 src/ASF/common/services/sleepmgr/xmega/sleepmgr.o + 0x00802c56 sleepmgr_locks + 0x00802c5c PROVIDE (__bss_end, .) + 0x00002512 __data_load_start = LOADADDR (.data) + 0x000025d2 __data_load_end = (__data_load_start + SIZEOF (.data)) -.noinit 0x00802c58 0x0 +.noinit 0x00802c5c 0x0 [!provide] PROVIDE (__noinit_start, .) *(.noinit*) [!provide] PROVIDE (__noinit_end, .) - 0x00802c58 _end = . + 0x00802c5c _end = . [!provide] PROVIDE (__heap_start, .) .eeprom 0x00810000 0x0 diff --git a/AVR Code/USB_BULK_TEST/Release/USB_BULK_TEST.srec b/AVR Code/USB_BULK_TEST/Release/USB_BULK_TEST.srec index 17dc1ca5..bfe7e39f 100644 --- a/AVR Code/USB_BULK_TEST/Release/USB_BULK_TEST.srec +++ b/AVR Code/USB_BULK_TEST/Release/USB_BULK_TEST.srec @@ -5,7 +5,7 @@ S113002029C1000027C1000025C1000023C1000030 S113003021C100001FC100001DC100001BC1000040 S113004019C1000017C1000015C1000013C1000050 S113005011C100000FC100000DC100000BC1000060 -S11300600DC7000007C1000005C1000003C1000066 +S1130060FFC6000007C1000005C1000003C1000075 S113007001C10000FFC00000FDC00000FBC0000083 S1130080F9C00000F7C00000F5C00000F3C0000094 S1130090F1C00000EFC00000EDC00000EBC00000A4 @@ -19,7 +19,7 @@ S1130100B9C00000B7C00000B5C00000B3C0000013 S1130110B1C00000AFC00000ADC00000ABC0000023 S1130120A9C00000A7C00000A5C00000A3C0000033 S1130130A1C000009FC000009DC000009BC0000043 -S113014099C0000097C0000095C000000EC60000D2 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char test_byte = 123; +uint32_t debug_counter; + int main(void){ irq_initialize_vectors(); cpu_irq_enable(); @@ -51,20 +53,11 @@ int main(void){ //asm("nop"); while (true) { - asm("nop"); - asm("nop"); - asm("nop"); - asm("nop"); - asm("nop"); - asm("nop"); - asm("nop"); - asm("nop"); - asm("nop"); - asm("nop"); - asm("nop"); - asm("nop"); - asm("nop"); - asm("nop"); + debug_counter++; + if(debug_counter > 100000000){ + debug_counter = 0; + } + //test_byte = ADCA.CH1.RESH; //DO NOTHING! } @@ -139,6 +132,7 @@ bool main_setup_in_received(void) void iso_callback(udd_ep_status_t status, iram_size_t nb_transfered, udd_ep_id_t ep){ udi_vendor_iso_in_run((uint8_t *)&isoBuf[!b1_state * PACKET_SIZE], PACKET_SIZE, iso_callback); + //if((int8_t) USB.FIFORP > -16) udi_vendor_iso_in_run((uint8_t *)&isoBuf[0], PACKET_SIZE, iso_callback); return; } diff --git a/Desktop Interface/Labrador_libusbK.pro.user b/Desktop Interface/Labrador_libusbK.pro.user index 5f75956c..b434d8c6 100644 --- a/Desktop Interface/Labrador_libusbK.pro.user +++ b/Desktop Interface/Labrador_libusbK.pro.user @@ -1,6 +1,6 @@ - + EnvironmentId diff --git a/Desktop Interface/bin/Labrador_libusbk.exe b/Desktop Interface/bin/Labrador_libusbk.exe index e49ef1dd..b73f86b6 100644 Binary files a/Desktop Interface/bin/Labrador_libusbk.exe and b/Desktop Interface/bin/Labrador_libusbk.exe differ diff --git a/Desktop Interface/desktop_settings.cpp b/Desktop Interface/desktop_settings.cpp index a50c302f..95699929 100644 --- a/Desktop Interface/desktop_settings.cpp +++ b/Desktop Interface/desktop_settings.cpp @@ -2,8 +2,8 @@ //USB iso stuff int MAX_TRANSFER_SIZE = 1023; -int MAX_PENDING_TRANSFERS = 1048576; -int MAX_PENDING_IO = 64; +int MAX_PENDING_TRANSFERS = 512; +int MAX_PENDING_IO = 16; //Plot settings int GRAPH_SAMPLES = 1024; diff --git a/Desktop Interface/release/desktop_settings.obj b/Desktop Interface/release/desktop_settings.obj index 880982ee..b107d88e 100644 Binary files a/Desktop Interface/release/desktop_settings.obj and b/Desktop Interface/release/desktop_settings.obj differ diff --git a/Desktop Interface/release/winusbdriver.obj b/Desktop Interface/release/winusbdriver.obj index 65d4409b..ae364cd9 100644 Binary files a/Desktop Interface/release/winusbdriver.obj and b/Desktop Interface/release/winusbdriver.obj differ diff --git a/Desktop Interface/winusbdriver.cpp b/Desktop Interface/winusbdriver.cpp index c6f81524..42e9f6a4 100644 --- a/Desktop Interface/winusbdriver.cpp +++ b/Desktop Interface/winusbdriver.cpp @@ -6,6 +6,7 @@ winUsbDriver::winUsbDriver(QWidget *parent) : QLabel(parent) this->hide(); //Load stack so that reset signal can be sent firstConnect = usbInit(0x03eb, 0xa000); + if(firstConnect){ setDeviceMode(deviceMode); usbSendControl(0x40, 0xa7, 0, 0, 0, NULL); @@ -344,7 +345,7 @@ void winUsbDriver::setBufferPtr(bufferControl *newPtr){ void winUsbDriver::setDeviceMode(int mode){ int oldMode = deviceMode; deviceMode = mode; - usbSendControl(0x40, 0xa5, mode, gainMask, 0, NULL); + usbSendControl(0x40, 0xa5, (mode == 5 ? 0:mode), gainMask, 0, NULL); if (fGenPtr_CH1!=NULL) setFunctionGen(0, fGenPtr_CH1); if (fGenPtr_CH2!=NULL) setFunctionGen(1, fGenPtr_CH2); @@ -414,7 +415,7 @@ void winUsbDriver::psuTick(){ } else dutyTemp = dutyPsu; } - if ((dutyTemp>113) || (dutyTemp<21)){ + if ((dutyTemp>106) || (dutyTemp<21)){ qDebug("PSU DUTY CYCLE TOO LARGE (could underflow on SOF)!!! ABORTING!!!"); } usbSendControl(0x40, 0xa3, dutyTemp, 0, 0, NULL); @@ -435,16 +436,6 @@ void winUsbDriver::setGain(double newGain){ void winUsbDriver::reinitialise(bool forceAttempt){ - /*if (!firstConnect){ - firstConnect = usbInit(0x03eb, 0xa000); - setDeviceMode(deviceMode); - usbIsoInit(); - //Reset!! - usbSendControl(0x40, 0xa7, 0, 0, 0, NULL); - //Stack will reinitialise TIMER_PERIOD seconds later, after first failed iso request - return; - }*/ - if (!forceAttempt){ if(recoveryInProcess == true) { //qDebug() << "Cancelling reinitialise()"; @@ -452,12 +443,6 @@ void winUsbDriver::reinitialise(bool forceAttempt){ } } - //qDebug() << "reinitialise() entered"; - - //if(forceAttempt) qFatal("Forcing attempt"); - - disableWindow(0); - recoveryInProcess = true; unsigned char success; @@ -474,7 +459,7 @@ void winUsbDriver::reinitialise(bool forceAttempt){ StmK_Free(stm_handle); stm_handle = NULL; } - UsbK_ResetDevice(handle); + //UsbK_ResetDevice(handle); unsigned char initSuccess = usbInit(0x03eb, 0xa000); //qDebug() << "usbInit(0x03eb, 0xa000) returned" << initSuccess; diff --git a/Desktop Interface/winusbdriver.cpp.autosave b/Desktop Interface/winusbdriver.cpp.autosave new file mode 100644 index 00000000..36c1021c --- /dev/null +++ b/Desktop Interface/winusbdriver.cpp.autosave @@ -0,0 +1,497 @@ +#include "winusbdriver.h" + +winUsbDriver::winUsbDriver(QWidget *parent) : QLabel(parent) +{ + qDebug() << "Making USB Driver invisible!!"; + this->hide(); + //Load stack so that reset signal can be sent + firstConnect = usbInit(0x03eb, 0xa000); + + if(firstConnect){ + setDeviceMode(deviceMode); + usbSendControl(0x40, 0xa7, 0, 0, 0, NULL); + //Stack will reinitialise TIMER_PERIOD seconds later, after first failed iso request + } + + psuTimer = new QTimer(); + psuTimer->setTimerType(Qt::PreciseTimer); + psuTimer->start(PSU_PERIOD); + connect(psuTimer, SIGNAL(timeout()), this, SLOT(psuTick())); +} + +unsigned char winUsbDriver::usbInit(ULONG VIDin, ULONG PIDin){ + unsigned char success; + + //qDebug() << "usbInit() entered"; + if (!LstK_Init(&deviceList, (KLST_FLAG) 0)) { + qDebug("Error initializing device list"); + return 0; + } //else qDebug() << "Device List initialised!"; + + LstK_Count(deviceList, &deviceCount); + if (!deviceCount) { + qDebug("Device list empty"); + LstK_Free(deviceList); // If LstK_Init returns TRUE, the list must be freed. + return 0; + } //else qDebug() << "Device Count initialised!"; + + //qDebug("Looking for device VID = %04X, PID = %04X\n", VIDin, PIDin); + + LstK_FindByVidPid(deviceList, VIDin, PIDin, &deviceInfo); + LstK_Free(deviceList); + if (deviceInfo){ + /*qDebug("Using %04X:%04X (%s): %s - %s\n", + deviceInfo->Common.Vid, + deviceInfo->Common.Pid, + deviceInfo->Common.InstanceID, + deviceInfo->DeviceDesc, + deviceInfo->Mfg); + Causes exceptions in debug mode!!!!*/ + } + else { + qDebug("Could not find device VID = %04X, PID = %04X", VIDin, PIDin); + return 0; + } + + success = UsbK_Init(&handle, deviceInfo); + if (!success){ + ec = GetLastError(); + qDebug("UsbK_Init failed. ErrorCode: %08Xh", ec); + } else qDebug("Device opened successfully!"); + + return success; +} + +void winUsbDriver::usbSendControl(int RequestType, int Request, int Value, int Index, int Length, unsigned char *LDATA){ + + ////////////////////////////////////////////////////////////////////////////////////////// + //IF YOU'RE SEEING AN ERROR, CHECK THAT REQUESTTYPE AND REQUEST ARE FORMATTED AS HEX + ////////////////////////////////////////////////////////////////////////////////////////// + + WINUSB_SETUP_PACKET setupPacket; + unsigned char controlSuccess; + UINT bytesTransferred = 0; + unsigned char *controlBuffer; + + if (handle==NULL){ + qDebug("Null handle error in usbSendControl"); + return; + } + setupPacket.RequestType = (UCHAR) RequestType; + setupPacket.Request = (UCHAR) Request; + setupPacket.Value = (USHORT) Value; + setupPacket.Index = (USHORT) Index; + setupPacket.Length = (USHORT) Length; + + //qDebug("RequestType = %x, Request = %x, Value = %u, Index = %u, Length = %u", setupPacket.RequestType, setupPacket.Request, setupPacket.Value, setupPacket.Index, setupPacket.Length); + + if (LDATA==NULL){ + controlBuffer = (unsigned char *) malloc(256); + } + else controlBuffer = LDATA; + + //qDebug() << controlBuffer; + //qDebug() << handle; + + //qDebug("SENDING CONTROL PACKET\n"); + controlSuccess = UsbK_ControlTransfer(handle, setupPacket, controlBuffer, setupPacket.Length, &bytesTransferred, NULL); + if (controlSuccess) { + qDebug("%d BYTES TRANSFERRED", bytesTransferred); + } + else qDebug("usbSendControl failed"); + + if(LDATA == NULL){ + free(controlBuffer); + } +} + +void winUsbDriver::setPsu(double voltage){ + + qDebug() << "New voltage =" << voltage; + currentPsuVoltage = voltage; + //if(deviceMode > 6) qFatal("setPsu is not configured for mode 7!!!"); + double vinp = voltage/11; + double vinn = 0; + //double vref = 1.65; + double gainPsu = 1; + + dutyPsu = (int) ((vinp - vinn)/vref * gainPsu * PSU_ADC_TOP); + + qDebug() << "Going to send value " << dutyPsu; +} + +void winUsbDriver::setFunctionGen(int channel, functionGenControl *fGenControl){ + //////////////////////////// + ////NO RESIZING (YET)!!!//// + //////////////////////////// + + ////////////////////////////////////// + //// CH1 is AUX!! CH2 is "MAIN"!!//// + ////////////////////////////////////// + + int length, maxLength, numDivides, maxDivides; + double freq, amplitude, offset; + unsigned char *samples; + + //For recalling on crash. + fGenChannel = channel; + if (channel == 0) fGenPtr_CH1 = fGenControl; + else fGenPtr_CH2 = fGenControl; + + //Reading in data + if (channel == 0){ + length = fGenControl->length_CH1; + freq = fGenControl->freq_CH1; + amplitude = fGenControl->amplitude_CH1; + offset = fGenControl->offset_CH1; + samples = (unsigned char *) malloc(length); + memcpy(samples, fGenControl->samples_CH1, (unsigned int) length); + numDivides = fGenControl->divisibility_CH1; + } + else if(channel == 1){ + length = fGenControl->length_CH2; + freq = fGenControl->freq_CH2; + amplitude = fGenControl->amplitude_CH2; + offset = fGenControl->offset_CH2; + samples = (unsigned char *) malloc(length); + memcpy(samples, fGenControl->samples_CH2, (unsigned int) length); + numDivides = fGenControl->divisibility_CH2; + } + + //Triple mode + if ((amplitude+offset) > FGEN_LIMIT){ + amplitude = amplitude / 3; + offset = offset / 3; + fGenTriple |= ((unsigned char) !channel + 1); + } + else fGenTriple &= ((unsigned char) (254 - !channel)); + + //qDebug() << "fGenTriple = " << fGenTriple << "fGenControl = " << fGenControl << "length = " << length << "freq = " << freq << "amplitude = " << amplitude << "offset = " << offset << "samples = " << samples; + + //Waveform scaling in V + double tempDouble; + amplitude = (amplitude * 255) / FGEN_LIMIT; + offset = (offset * 255) / FGEN_LIMIT; + if (offset5) + amplitude -= FGEN_OFFSET; + else + amplitude = 0; + offset = FGEN_OFFSET; + } + +#ifdef INVERT_TRIPLE + unsigned char fGenTemp = 0; + fGenTemp |= (fGenTriple & 0x01)<<1; + fGenTemp |= (fGenTriple & 0x02)>>1; + usbSendControl(0x40, 0xa4, fGenTemp, 0, 0, NULL); +#else + usbSendControl(0x40, 0xa4, fGenTriple, 0, 0, NULL); +#endif + + //Applying amplitude and offset to all samples. + for (int i=0;i DAC_SPS){ + loop_entered = true; + numDivides--; + if (numDivides==0){ + qDebug("numDivides = 0 - in T-stretching of winUsbDriver:: setFunctionGen"); + } + + int shiftTemp = (maxDivides - numDivides); + length = length >> 1; + + free(tempSamples); + tempSamples = (unsigned char *) malloc(length); + for (int i=0; i 2) sendClearBuffer(1,0,0); + setVisible_CH2(0); + checkXY(0); + break; + case 1: + if(oldMode > 2) sendClearBuffer(1,0,0); + sendClearBuffer(0,1,0); + setVisible_CH2(1); + checkXY(0); + break; + case 2: + if(oldMode > 2) sendClearBuffer(1,0,0); + sendClearBuffer(0,1,0); + setVisible_CH2(1); + break; + case 3: + if(oldMode != 4) sendClearBuffer(1,0,0); + sendClearBuffer(0,1,0); + setVisible_CH2(0); + checkXY(0); + break; + case 4: + if(oldMode != 3) sendClearBuffer(1,0,0); + sendClearBuffer(0,1,0); + setVisible_CH2(1); + checkXY(0); + break; + case 5: + setVisible_CH2(0); + checkXY(0); + break; + case 6: + sendClearBuffer(0,0,1); + setVisible_CH2(0); + checkXY(0); + break; + case 7: + sendClearBuffer(1,0,0); + enableMMTimer(); + checkXY(0); + break; + default: + qFatal("Error in winUsbDriver::setDeviceMode. Invalid device mode."); + } + +} + +void winUsbDriver::psuTick(){ + if(dutyTemp == dutyPsu) return; + + if (dutyTemp > dutyPsu){ + if((dutyTemp - dutyPsu)> PSU_STEP){ + dutyTemp -= PSU_STEP; + } else dutyTemp = dutyPsu; + } + + if (dutyTemp < dutyPsu){ + if((dutyPsu - dutyTemp)> PSU_STEP){ + dutyTemp += PSU_STEP; + } else dutyTemp = dutyPsu; + } + + if ((dutyTemp>106) || (dutyTemp<21)){ + qDebug("PSU DUTY CYCLE TOO LARGE (could underflow on SOF)!!! ABORTING!!!"); + } + usbSendControl(0x40, 0xa3, dutyTemp, 0, 0, NULL); +} + +void winUsbDriver::setGain(double newGain){ + if (newGain == scopeGain) return; //No update! + gainBuffers(scopeGain/newGain); + scopeGain = newGain; + if (newGain == 0.5){ + gainMask = 7<<2 | 7<<10; + } + else gainMask = (unsigned short)(log2(newGain))<<2 | (unsigned short)(log2(newGain))<<10; + qDebug("newGain = %f", newGain); + qDebug("gainMask = %d", gainMask); + usbSendControl(0x40, 0xa5, deviceMode, gainMask, 0, NULL); +} + +void winUsbDriver::reinitialise(bool forceAttempt){ + + if (!forceAttempt){ + if(recoveryInProcess == true) { + //qDebug() << "Cancelling reinitialise()"; + return; + } + } + + recoveryInProcess = true; + + unsigned char success; + DWORD errorCode = ERROR_SUCCESS; + + success = UsbK_Free(handle); + if (!success){ + errorCode = GetLastError(); + qDebug("UsbK_Free (reinit) failed. ErrorCode: %08Xh\n", errorCode); + } + //else qDebug() << "Handle freed successfully!"; + + if(forceAttempt){ + StmK_Free(stm_handle); + stm_handle = NULL; + } + //UsbK_ResetDevice(handle); + unsigned char initSuccess = usbInit(0x03eb, 0xa000); + //qDebug() << "usbInit(0x03eb, 0xa000) returned" << initSuccess; + + if (!initSuccess){ + recoverySuccess = 0; + return; + } + + setDeviceMode(deviceMode); + //qDebug() << "setDeviceMode(deviceMode) returned" << deviceSuccess; + if (fGenPtr_CH1 != NULL) { + //qDebug() << "setFunctionGen(0, fGenPtr_CH1)"; + setFunctionGen(0, fGenPtr_CH1); + } + if (fGenPtr_CH2 != NULL){ + //qDebug() << "setFunctionGen(1, fGenPtr_CH2)"; + setFunctionGen(1, fGenPtr_CH2); + } + newDig(digitalPinState); + + + unsigned char isoInitSuccess = usbIsoInit(); + //qDebug() << "usbIsoInit() returned" << isoInitSuccess; + + recoverySuccess = initSuccess && isoInitSuccess; + + if(recoverySuccess){ + //qDebug() << "reinitialise() completed successfully"; + } + //else qDebug() << "reinitialise() completed with errors"; +} + +void winUsbDriver::avrDebug(void){ + usbSendControl(0x40, 0xa0, 0, 0, 0, NULL); +}