Removed all LicheePi Zero patches

This commit is contained in:
Michel-FK 2019-03-24 15:37:21 +01:00
parent ba76d98f73
commit 37c53b8745
11 changed files with 0 additions and 460 deletions

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@ -1,31 +0,0 @@
sun8i-v3s-licheepi-zero-dock.dts | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts
index 58c4e72..6e9dfcc 100644
--- a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts
+++ b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts
@@ -49,9 +49,9 @@
compatible = "licheepi,licheepi-zero-dock", "licheepi,licheepi-zero",
"allwinner,sun8i-v3s";
- aliases {
+ /*aliases {
ethernet0 = &emac;
- };
+ };*/
leds {
/* The LEDs use PG0~2 pins, which conflict with MMC1 */
@@ -68,9 +68,9 @@
status = "okay";
};
-&emac {
+/*&emac {
status = "okay";
-};
+};*/
&mmc1 {
broken-cd;

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@ -1,29 +0,0 @@
sun8i-v3s-licheepi-zero.dts | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts
index d63a9a3..063c6bf 100644
--- a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts
+++ b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts
@@ -118,3 +118,21 @@
usb0_id_det-gpio = <&pio 5 6 GPIO_ACTIVE_HIGH>;
status = "okay";
};
+
+&spi0 {
+ status = "okay";
+
+ st7789v@0 {
+ compatible = "sitronix,st7789v";
+ reg = <0>;
+
+ spi-max-frequency = <40000000>;
+ txbuflen = <115200>;
+ rotate = <0>;
+ fps = <42>;
+ buswidth = <8>;
+ reset-gpios = <&pio 1 4 GPIO_ACTIVE_LOW>;
+ dc-gpios = <&pio 1 5 GPIO_ACTIVE_LOW>;
+ debug = <0>;
+ };
+};

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@ -1,24 +0,0 @@
sun8i-v3s.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index 5379f2d..e437d3f 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -54,14 +54,14 @@
#size-cells = <1>;
ranges;
- simplefb_lcd: framebuffer@0 {
+ /*simplefb_lcd: framebuffer@0 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de0-lcd0";
clocks = <&ccu CLK_BUS_TCON0>, <&display_clocks 0>,
<&display_clocks 6>, <&ccu CLK_TCON0>;
status = "disabled";
- };
+ };*/
};
cpus {

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@ -1,52 +0,0 @@
From 700384f1f3c204fa989fddd0ae73c2ebe76483a3 Mon Sep 17 00:00:00 2001
From: Michel Stempin <michel.stempin@wanadoo.fr>
Date: Tue, 19 Mar 2019 22:33:32 +0100
Subject: [PATCH 1/9] added uart1 & uart2 pins
Signed-off-by: Michel Stempin <michel.stempin@wanadoo.fr>
---
arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts | 6 ++++++
arch/arm/boot/dts/sun8i-v3s.dtsi | 10 ++++++++++
2 files changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts
index b6f3430..18e9503 100644
--- a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts
+++ b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts
@@ -109,6 +109,12 @@
status = "okay";
};
+/*&uart2 {
+ pinctrl-0 = <&uart2_pins_a>;
+ pinctrl-names = "default";
+ status = "okay";
+};*/
+
&usb_otg {
dr_mode = "otg";
status = "okay";
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index e437d3f..6708af1 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -356,6 +356,16 @@
function = "uart0";
};
+ uart1_pins_a: uart1@0 {
+ pins = "PE21", "PE22";
+ function = "uart1";
+ };
+
+ uart2_pins_a: uart2@0 {
+ pins = "PB0", "PB1";
+ function = "uart2";
+ };
+
lcd_rgb666_pins_a: lcd-rgb666-pe {
pins = "PE0", "PE1", "PE2", "PE3", "PE4", "PE5",
"PE6", "PE7", "PE8", "PE9", "PE10", "PE11",
--
2.7.4

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@ -1,88 +0,0 @@
From 110d4a501c56aef0986baa5de9e629f11b6ab692 Mon Sep 17 00:00:00 2001
From: Michel Stempin <michel.stempin@wanadoo.fr>
Date: Tue, 19 Mar 2019 22:22:54 +0100
Subject: [PATCH 2/9] disabled LicheePi LEDs
Signed-off-by: Michel Stempin <michel.stempin@wanadoo.fr>
---
arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts | 4 ++--
arch/arm/boot/dts/sun8i-v3s-licheepi-zero-with-lcd.dtsi | 5 +++++
arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts | 11 ++++++-----
3 files changed, 13 insertions(+), 7 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts
index d8b6833..0afd3af 100644
--- a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts
+++ b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts
@@ -54,8 +54,8 @@
};*/
leds {
- /* The LEDs use PG0~2 pins, which conflict with MMC1 */
- status = "disbaled";
+ // The LEDs use PG0~2 pins, which conflict with MMC1
+ status = "disabled";
};
};
diff --git a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-with-lcd.dtsi b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-with-lcd.dtsi
index f7ed577..b7d8ff4 100644
--- a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-with-lcd.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-with-lcd.dtsi
@@ -30,6 +30,11 @@
};
};
};
+
+ leds {
+ // The LEDs use PG0~2 pins, which conflict with MMC1
+ status = "disabled";
+ };
};
&de {
diff --git a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts
index 18e9503..ded54df 100644
--- a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts
+++ b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts
@@ -50,31 +50,32 @@
aliases {
serial0 = &uart0;
+ //serial0 = &uart2;
};
chosen {
stdout-path = "serial0:115200n8";
};
- leds {
+ /*leds {
compatible = "gpio-leds";
blue_led {
label = "licheepi:blue:usr";
- gpios = <&pio 6 1 GPIO_ACTIVE_LOW>; /* PG1 */
+ gpios = <&pio 6 1 GPIO_ACTIVE_LOW 0x1>; // PG1 //
};
green_led {
label = "licheepi:green:usr";
- gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */
+ gpios = <&pio 6 0 GPIO_ACTIVE_LOW 0x1>; // PG0 //
default-state = "on";
};
red_led {
label = "licheepi:red:usr";
- gpios = <&pio 6 2 GPIO_ACTIVE_LOW>; /* PG2 */
+ gpios = <&pio 6 2 GPIO_ACTIVE_LOW 0x1>; // PG2 //
};
- };
+ };*/
};
&ehci0 {
--
2.7.4

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@ -1,35 +0,0 @@
From 9163e2926190307570c421c5f6e06057fd87a224 Mon Sep 17 00:00:00 2001
From: Michel Stempin <michel.stempin@wanadoo.fr>
Date: Tue, 19 Mar 2019 22:48:08 +0100
Subject: [PATCH 3/9] removed USB OTG
Signed-off-by: Michel Stempin <michel.stempin@wanadoo.fr>
---
arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts
index ded54df..99785b0 100644
--- a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts
+++ b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts
@@ -116,7 +116,7 @@
status = "okay";
};*/
-&usb_otg {
+/*&usb_otg {
dr_mode = "otg";
status = "okay";
};
@@ -124,7 +124,7 @@
&usbphy {
usb0_id_det-gpio = <&pio 5 6 GPIO_ACTIVE_HIGH>;
status = "okay";
-};
+};*/
&spi0 {
status = "okay";
--
2.7.4

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@ -1,76 +0,0 @@
From c06a4ba80922341138853bf8cedaeef2cd533013 Mon Sep 17 00:00:00 2001
From: Michel Stempin <michel.stempin@wanadoo.fr>
Date: Tue, 19 Mar 2019 22:51:37 +0100
Subject: [PATCH 4/9] replaced backlight with PWM
Signed-off-by: Michel Stempin <michel.stempin@wanadoo.fr>
---
arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts | 6 ++++++
arch/arm/boot/dts/sun8i-v3s-licheepi-zero-with-lcd.dtsi | 6 +++---
arch/arm/boot/dts/sun8i-v3s.dtsi | 5 +++++
3 files changed, 14 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts
index 0afd3af..1c263c2 100644
--- a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts
+++ b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts
@@ -79,6 +79,12 @@
status = "okay";
};
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_pins>;
+ status = "okay";
+};
+
&lradc {
vref-supply = <&reg_vcc3v0>;
status = "okay";
diff --git a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-with-lcd.dtsi b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-with-lcd.dtsi
index b7d8ff4..ad3fb39 100644
--- a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-with-lcd.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-with-lcd.dtsi
@@ -7,12 +7,12 @@
#include "sun8i-v3s-licheepi-zero.dts"
/ {
- backlight: backlight {
+ /*backlight: backlight {
compatible = "pwm-backlight";
pwms = <&pwm 0 1000000 0>;
brightness-levels = <0 30 40 50 60 70 100>;
default-brightness-level = <6>;
- };
+ };*/
panel: panel {
#address-cells = <1>;
@@ -20,7 +20,7 @@
port@0 {
reg = <0>;
- backlight = <&backlight>;
+ //backlight = <&backlight>;
#address-cells = <1>;
#size-cells = <0>;
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index 6708af1..a61c680 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -351,6 +351,11 @@
function = "pwm0";
};
+ pwm1_pins: pwm1 {
+ pins = "PB5";
+ function = "pwm1";
+ };
+
uart0_pins_a: uart0@0 {
pins = "PB8", "PB9";
function = "uart0";
--
2.7.4

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@ -1,34 +0,0 @@
From fb026dd5d01a07b3fb2b172647924ddad2f2f863 Mon Sep 17 00:00:00 2001
From: Michel Stempin <michel.stempin@wanadoo.fr>
Date: Tue, 19 Mar 2019 22:53:38 +0100
Subject: [PATCH 5/9] remapped buttons
Signed-off-by: Michel Stempin <michel.stempin@wanadoo.fr>
---
arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts
index 1c263c2..94657bd 100644
--- a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts
+++ b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts
@@ -105,14 +105,14 @@
button@600 {
label = "Select";
- linux,code = <KEY_SELECT>;
+ linux,code = <KEY_O>;
channel = <0>;
voltage = <600000>;
};
button@800 {
label = "Start";
- linux,code = <KEY_OK>;
+ linux,code = <KEY_P>;
channel = <0>;
voltage = <800000>;
};
--
2.7.4

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@ -1,32 +0,0 @@
From a41e4bef4c48ef310617f7ca3a05d6ced241ab26 Mon Sep 17 00:00:00 2001
From: Michel Stempin <michel.stempin@wanadoo.fr>
Date: Tue, 19 Mar 2019 22:54:24 +0100
Subject: [PATCH 6/9] removed lradc
Signed-off-by: Michel Stempin <michel.stempin@wanadoo.fr>
---
arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts
index 94657bd..71a8fea 100644
--- a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts
+++ b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts
@@ -85,7 +85,7 @@
status = "okay";
};
-&lradc {
+/*&lradc {
vref-supply = <&reg_vcc3v0>;
status = "okay";
@@ -116,4 +116,4 @@
channel = <0>;
voltage = <800000>;
};
-};
+};*/
--
2.7.4

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@ -1,31 +0,0 @@
From 1e9535237bda590eb30e160603d760034aae1721 Mon Sep 17 00:00:00 2001
From: Michel Stempin <michel.stempin@wanadoo.fr>
Date: Tue, 19 Mar 2019 22:56:04 +0100
Subject: [PATCH 7/9] removed tcon0
Signed-off-by: Michel Stempin <michel.stempin@wanadoo.fr>
---
arch/arm/boot/dts/sun8i-v3s-licheepi-zero-with-lcd.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-with-lcd.dtsi b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-with-lcd.dtsi
index ad3fb39..1c16e21 100644
--- a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-with-lcd.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-with-lcd.dtsi
@@ -47,11 +47,11 @@
status = "okay";
};
-&tcon0 {
+/*&tcon0 {
pinctrl-names = "default";
pinctrl-0 = <&lcd_rgb666_pins_a>;
status = "okay";
-};
+};*/
&tcon0_out {
tcon0_out_lcd: endpoint@0 {
--
2.7.4

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@ -1,28 +0,0 @@
From cd2a9cb732a65f5986b625d1c62cba7564215db9 Mon Sep 17 00:00:00 2001
From: Michel Stempin <michel.stempin@wanadoo.fr>
Date: Tue, 19 Mar 2019 22:57:35 +0100
Subject: [PATCH 8/9] remapped st7789v LCD GPIOs
Signed-off-by: Michel Stempin <michel.stempin@wanadoo.fr>
---
arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts
index 99785b0..9d3b27f 100644
--- a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts
+++ b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts
@@ -138,8 +138,8 @@
rotate = <0>;
fps = <42>;
buswidth = <8>;
- reset-gpios = <&pio 1 4 GPIO_ACTIVE_LOW>;
- dc-gpios = <&pio 1 5 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&pio 4 1 GPIO_ACTIVE_LOW>; //PE1
+ dc-gpios = <&pio 2 0 GPIO_ACTIVE_LOW>; //PC0 (MISO)
debug = <0>;
};
};
--
2.7.4