322 lines
8.2 KiB
NASM
322 lines
8.2 KiB
NASM
;***************************************************************************
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;* Copyright (C) 2006 by Joachim Fritschi, <jfritschi@freenet.de> *
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;* adapted for DiskCryptor by ntldr <ntldr@diskcryptor.net> *
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;* PGP key ID - 0x1B6A24550F33E44A *
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;* *
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;* This program is free software; you can redistribute it and/or modify *
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;* it under the terms of the GNU General Public License as published by *
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;* the Free Software Foundation; either version 2 of the License, or *
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;* (at your option) any later version. *
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;* *
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;* This program is distributed in the hope that it will be useful, *
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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;* GNU General Public License for more details. *
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;* *
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;* You should have received a copy of the GNU General Public License *
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;* along with this program; if not, write to the *
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;* Free Software Foundation, Inc., *
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;* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
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;***************************************************************************
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%define in_blk 4 ; input byte array address parameter
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%define out_blk 8 ; output byte array address parameter
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%define tfm 12 ; Twofish context structure
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%define a_offset 0
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%define b_offset 4
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%define c_offset 8
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%define d_offset 12
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; Structure of the crypto context struct
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%define s0 0 ; S0 Array 256 Words each
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%define s1 1024 ; S1 Array
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%define s2 2048 ; S2 Array
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%define s3 3072 ; S3 Array
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%define w 4096 ; 8 whitening keys (word)
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%define k 4128 ; key 1-32 ( word )
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; define a few register aliases to allow macro substitution
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%define R0D eax
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%define R0B al
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%define R0H ah
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%define R1D ebx
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%define R1B bl
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%define R1H bh
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%define R2D ecx
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%define R2B cl
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%define R2H ch
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%define R3D edx
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%define R3B dl
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%define R3H dh
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; performs input whitening
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%macro input_whitening 3
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xor %1, [w+(%2)+%3]
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%endmacro
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; performs input whitening
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%macro output_whitening 3
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xor %1, [w+16+(%2)+%3]
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%endmacro
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;
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; * a input register containing a (rotated 16)
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; * b input register containing b
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; * c input register containing c
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; * d input register containing d (already rol $1)
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; * operations on a and b are interleaved to increase performance
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%macro encrypt_round 5
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push %4D
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movzx edi, %2B
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mov %4D, [ebp+edi*4+s1]
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movzx edi, %1B
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mov esi, [ebp+edi*4+s2]
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movzx edi, %2H
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ror %2D, 16
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xor %4D, [ebp+edi*4+s2]
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movzx edi, %1H
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ror %1D, 16
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xor esi, [ebp+edi*4+s3]
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movzx edi, %2B
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xor %4D, [ebp+edi*4+s3]
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movzx edi, %1B
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xor esi, [ebp+edi*4]
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movzx edi, %2H
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ror %2D, 15
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xor %4D, [ebp+edi*4]
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movzx edi, %1H
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xor esi, [ebp+edi*4+s1]
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pop edi
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add esi, %4D
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add %4D, esi
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add esi, [ebp+k+%5]
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xor %3D, esi
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rol %3D, 15
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add %4D, [ebp+k+4+%5]
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xor %4D, edi
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%endmacro
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; * a input register containing a (rotated 16)
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; * b input register containing b
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; * c input register containing c
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; * d input register containing d (already rol $1)
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; * operations on a and b are interleaved to increase performance
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; * last round has different rotations for the output preparation
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%macro encrypt_last_round 5
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push %4D
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movzx edi, %2B
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mov %4D, [ebp+edi*4+s1]
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movzx edi, %1B
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mov esi, [ebp+edi*4+s2]
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movzx edi, %2H
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ror %2D, 16
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xor %4D, [ebp+edi*4+s2]
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movzx edi, %1H
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ror %1D, 16
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xor esi, [ebp+edi*4+s3]
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movzx edi, %2B
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xor %4D, [ebp+edi*4+s3]
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movzx edi, %1B
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xor esi, [ebp+edi*4]
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movzx edi, %2H
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ror %2D, 16
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xor %4D, [ebp+edi*4]
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movzx edi, %1H
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xor esi, [ebp+edi*4+s1]
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pop edi
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add esi, %4D
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add %4D, esi
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add esi, [ebp+k+%5]
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xor %3D, esi
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ror %3D, 1
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add %4D, [ebp+k+4+%5]
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xor %4D, edi
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%endmacro
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; * a input register containing a
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; * b input register containing b (rotated 16)
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; * c input register containing c
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; * d input register containing d (already rol $1)
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; * operations on a and b are interleaved to increase performance
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%macro decrypt_round 5
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push %3D
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movzx edi, %1B
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mov %3D, [ebp+edi*4]
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movzx edi, %2B
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mov esi, [ebp+edi*4+s3]
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movzx edi, %1H
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ror %1D, 16
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xor %3D, [ebp+edi*4+s1]
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movzx edi, %2H
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ror %2D, 16
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xor esi, [ebp+edi*4]
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movzx edi, %1B
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xor %3D, [ebp+edi*4+s2]
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movzx edi, %2B
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xor esi, [ebp+edi*4+s1]
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movzx edi, %1H
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ror %1D, 15
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xor %3D, [ebp+edi*4+s3]
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movzx edi, %2H
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xor esi, [ebp+edi*4+s2]
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pop edi
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add %3D, esi
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add esi, %3D
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add %3D, [ebp+k+%5]
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xor %3D, edi
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add esi, [ebp+k+4+%5]
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xor %4D, esi
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rol %4D, 15
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%endmacro
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; * a input register containing a
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; * b input register containing b (rotated 16)
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; * c input register containing c
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; * d input register containing d (already rol $1)
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; * operations on a and b are interleaved to increase performance
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; * last round has different rotations for the output preparation
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%macro decrypt_last_round 5
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push %3D
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movzx edi, %1B
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mov %3D, [ebp+edi*4]
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movzx edi, %2B
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mov esi, [ebp+edi*4+s3]
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movzx edi, %1H
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ror %1D, 16
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xor %3D, [ebp+edi*4+s1]
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movzx edi, %2H
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ror %2D, 16
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xor esi, [ebp+edi*4]
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movzx edi, %1B
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xor %3D, [ebp+edi*4+s2]
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movzx edi, %2B
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xor esi, [ebp+edi*4+s1]
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movzx edi, %1H
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ror %1D, 16
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xor %3D, [ebp+edi*4+s3]
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movzx edi, %2H
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xor esi, [ebp+edi*4+s2]
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pop edi
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add %3D, esi
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add esi, %3D
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add %3D, [ebp+k+%5]
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xor %3D, edi
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add esi, [ebp+k+4+%5]
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xor %4D, esi
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ror %4D, 1
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%endmacro
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global _twofish256_encrypt@12
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global _twofish256_decrypt@12
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_twofish256_encrypt@12:
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push ebp ; save registers according to calling convention
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push ebx
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push esi
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push edi
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mov ebp, [tfm + 16+esp] ; abuse the base pointer: set new base pointer to the crypto tfm
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mov edi, [in_blk+16+esp] ; input address in edi
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mov eax, [edi]
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mov ebx, [b_offset+edi]
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mov ecx, [c_offset+edi]
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mov edx, [d_offset+edi]
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input_whitening eax, ebp, a_offset
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ror eax, 16
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input_whitening ebx, ebp, b_offset
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input_whitening ecx, ebp, c_offset
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input_whitening edx, ebp, d_offset
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rol edx, 1
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encrypt_round R0,R1,R2,R3,0
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encrypt_round R2,R3,R0,R1,8
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encrypt_round R0,R1,R2,R3,2*8
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encrypt_round R2,R3,R0,R1,3*8
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encrypt_round R0,R1,R2,R3,4*8
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encrypt_round R2,R3,R0,R1,5*8
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encrypt_round R0,R1,R2,R3,6*8
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encrypt_round R2,R3,R0,R1,7*8
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encrypt_round R0,R1,R2,R3,8*8
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encrypt_round R2,R3,R0,R1,9*8
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encrypt_round R0,R1,R2,R3,10*8
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encrypt_round R2,R3,R0,R1,11*8
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encrypt_round R0,R1,R2,R3,12*8
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encrypt_round R2,R3,R0,R1,13*8
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encrypt_round R0,R1,R2,R3,14*8
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encrypt_last_round R2,R3,R0,R1,15*8
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output_whitening eax, ebp, c_offset
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output_whitening ebx, ebp, d_offset
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output_whitening ecx, ebp, a_offset
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output_whitening edx, ebp, b_offset
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mov edi, [out_blk+16+esp]
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mov [c_offset+edi], eax
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mov [d_offset+edi], ebx
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mov [edi], ecx
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mov [b_offset+edi], edx
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pop edi
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pop esi
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pop ebx
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pop ebp
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retn 0Ch
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_twofish256_decrypt@12:
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push ebp ; save registers according to calling convention*/
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push ebx
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push esi
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push edi
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mov ebp, [tfm + 16+esp] ; abuse the base pointer: set new base pointer to the crypto tfm
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mov edi, [in_blk + 16+esp] ; input address in edi
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mov eax, [edi]
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mov ebx, [b_offset+edi]
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mov ecx, [c_offset+edi]
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mov edx, [d_offset+edi]
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output_whitening eax, ebp, a_offset
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output_whitening ebx, ebp, b_offset
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ror ebx, 16
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output_whitening ecx, ebp, c_offset
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output_whitening edx, ebp, d_offset
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rol ecx, 1
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decrypt_round R0,R1,R2,R3,15*8
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decrypt_round R2,R3,R0,R1,14*8
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decrypt_round R0,R1,R2,R3,13*8
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decrypt_round R2,R3,R0,R1,12*8
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decrypt_round R0,R1,R2,R3,11*8
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decrypt_round R2,R3,R0,R1,10*8
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decrypt_round R0,R1,R2,R3,9*8
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decrypt_round R2,R3,R0,R1,8*8
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decrypt_round R0,R1,R2,R3,7*8
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decrypt_round R2,R3,R0,R1,6*8
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decrypt_round R0,R1,R2,R3,5*8
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decrypt_round R2,R3,R0,R1,4*8
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decrypt_round R0,R1,R2,R3,3*8
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decrypt_round R2,R3,R0,R1,2*8
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decrypt_round R0,R1,R2,R3,1*8
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decrypt_last_round R2,R3,R0,R1,0
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input_whitening eax, ebp, c_offset
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input_whitening ebx, ebp, d_offset
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input_whitening ecx, ebp, a_offset
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input_whitening edx, ebp, b_offset
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mov edi, [out_blk + 16+esp]
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mov [c_offset+edi], eax
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mov [d_offset+edi], ebx
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mov [edi], ecx
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mov [b_offset+edi], edx
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pop edi
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pop esi
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pop ebx
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pop ebp
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retn 0Ch
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