Add ESP32 bootloop control

This commit is contained in:
Theo Arends 2020-04-19 13:08:04 +02:00
parent 6ec18c3c01
commit 0f3619238f
4 changed files with 42 additions and 16 deletions

View File

@ -65,14 +65,40 @@ uint32_t ESP_getBootVersion(void)
return 1; return 1;
} }
// ESP32 RTC memory is kept ONLY on deep_sleep wake. Any other restart will erase RTC memory
// Current solution is using NVS hopig it survives many writes ;-)
bool ESP_rtcUserMemoryWrite(uint32_t offset, uint32_t *data, size_t size) bool ESP_rtcUserMemoryWrite(uint32_t offset, uint32_t *data, size_t size)
{ {
return false; char sName[16];
snprintf_P(sName, sizeof(sName), PSTR("rtc%d"), offset);
nvs_handle handle;
noInterrupts();
nvs_open("tasrtc", NVS_READWRITE, &handle);
nvs_set_blob(handle, sName, data, size);
nvs_commit(handle);
nvs_close(handle);
interrupts();
return true;
} }
// ESP32 RTC memory is kept ONLY on deep_sleep wake. Any other restart will erase RTC memory
// Current solution is using NVS hopig it survives many writes ;-)
bool ESP_rtcUserMemoryRead(uint32_t offset, uint32_t *data, size_t size) bool ESP_rtcUserMemoryRead(uint32_t offset, uint32_t *data, size_t size)
{ {
return false; char sName[16];
snprintf_P(sName, sizeof(sName), PSTR("rtc%d"), offset);
nvs_handle handle;
noInterrupts();
nvs_open("tasrtc", NVS_READONLY, &handle);
size_t tsize = size;
nvs_get_blob(handle, sName, data, &tsize);
nvs_close(handle);
interrupts();
return true;
} }
void ESP_reset() void ESP_reset()

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@ -545,13 +545,14 @@ struct SYSCFG {
uint32_t cfg_crc32; // FFC uint32_t cfg_crc32; // FFC
} Settings; } Settings;
struct RTCRBT { typedef struct {
uint16_t valid; // 280 (RTC memory offset 100 - sizeof(RTCRBT)) uint16_t valid; // 280 (RTC memory offset 100 - sizeof(RTCRBT))
uint8_t fast_reboot_count; // 282 uint8_t fast_reboot_count; // 282
uint8_t free_003[1]; // 283 uint8_t free_003[1]; // 283
} RtcReboot; } TRtcReboot;
TRtcReboot RtcReboot;
struct RTCMEM { typedef struct {
uint16_t valid; // 290 (RTC memory offset 100) uint16_t valid; // 290 (RTC memory offset 100)
uint8_t oswatch_blocked_loop; // 292 uint8_t oswatch_blocked_loop; // 292
uint8_t ota_loader; // 293 uint8_t ota_loader; // 293
@ -567,7 +568,8 @@ struct RTCMEM {
uint8_t free_022[22]; // 2D6 uint8_t free_022[22]; // 2D6
// 2EC - 2FF free locations // 2EC - 2FF free locations
} RtcSettings; } TRtcSettings;
TRtcSettings RtcSettings;
struct TIME_T { struct TIME_T {
uint8_t second; uint8_t second;

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@ -30,7 +30,7 @@ uint32_t GetRtcSettingsCrc(void)
uint32_t crc = 0; uint32_t crc = 0;
uint8_t *bytes = (uint8_t*)&RtcSettings; uint8_t *bytes = (uint8_t*)&RtcSettings;
for (uint32_t i = 0; i < sizeof(RTCMEM); i++) { for (uint32_t i = 0; i < sizeof(RtcSettings); i++) {
crc += bytes[i]*(i+1); crc += bytes[i]*(i+1);
} }
return crc; return crc;
@ -40,16 +40,16 @@ void RtcSettingsSave(void)
{ {
if (GetRtcSettingsCrc() != rtc_settings_crc) { if (GetRtcSettingsCrc() != rtc_settings_crc) {
RtcSettings.valid = RTC_MEM_VALID; RtcSettings.valid = RTC_MEM_VALID;
ESP_rtcUserMemoryWrite(100, (uint32_t*)&RtcSettings, sizeof(RTCMEM)); ESP_rtcUserMemoryWrite(100, (uint32_t*)&RtcSettings, sizeof(RtcSettings));
rtc_settings_crc = GetRtcSettingsCrc(); rtc_settings_crc = GetRtcSettingsCrc();
} }
} }
void RtcSettingsLoad(void) void RtcSettingsLoad(void)
{ {
ESP_rtcUserMemoryRead(100, (uint32_t*)&RtcSettings, sizeof(RTCMEM)); // 0x290 ESP_rtcUserMemoryRead(100, (uint32_t*)&RtcSettings, sizeof(RtcSettings)); // 0x290
if (RtcSettings.valid != RTC_MEM_VALID) { if (RtcSettings.valid != RTC_MEM_VALID) {
memset(&RtcSettings, 0, sizeof(RTCMEM)); memset(&RtcSettings, 0, sizeof(RtcSettings));
RtcSettings.valid = RTC_MEM_VALID; RtcSettings.valid = RTC_MEM_VALID;
RtcSettings.energy_kWhtoday = Settings.energy_kWhtoday; RtcSettings.energy_kWhtoday = Settings.energy_kWhtoday;
RtcSettings.energy_kWhtotal = Settings.energy_kWhtotal; RtcSettings.energy_kWhtotal = Settings.energy_kWhtotal;
@ -77,7 +77,7 @@ uint32_t GetRtcRebootCrc(void)
uint32_t crc = 0; uint32_t crc = 0;
uint8_t *bytes = (uint8_t*)&RtcReboot; uint8_t *bytes = (uint8_t*)&RtcReboot;
for (uint32_t i = 0; i < sizeof(RTCRBT); i++) { for (uint32_t i = 0; i < sizeof(RtcReboot); i++) {
crc += bytes[i]*(i+1); crc += bytes[i]*(i+1);
} }
return crc; return crc;
@ -87,7 +87,7 @@ void RtcRebootSave(void)
{ {
if (GetRtcRebootCrc() != rtc_reboot_crc) { if (GetRtcRebootCrc() != rtc_reboot_crc) {
RtcReboot.valid = RTC_MEM_VALID; RtcReboot.valid = RTC_MEM_VALID;
ESP_rtcUserMemoryWrite(100 - sizeof(RTCRBT), (uint32_t*)&RtcReboot, sizeof(RTCRBT)); ESP_rtcUserMemoryWrite(100 - sizeof(RtcReboot), (uint32_t*)&RtcReboot, sizeof(RtcReboot));
rtc_reboot_crc = GetRtcRebootCrc(); rtc_reboot_crc = GetRtcRebootCrc();
} }
} }
@ -100,9 +100,9 @@ void RtcRebootReset(void)
void RtcRebootLoad(void) void RtcRebootLoad(void)
{ {
ESP_rtcUserMemoryRead(100 - sizeof(RTCRBT), (uint32_t*)&RtcReboot, sizeof(RTCRBT)); // 0x280 ESP_rtcUserMemoryRead(100 - sizeof(RtcReboot), (uint32_t*)&RtcReboot, sizeof(RtcReboot)); // 0x280
if (RtcReboot.valid != RTC_MEM_VALID) { if (RtcReboot.valid != RTC_MEM_VALID) {
memset(&RtcReboot, 0, sizeof(RTCRBT)); memset(&RtcReboot, 0, sizeof(RtcReboot));
RtcReboot.valid = RTC_MEM_VALID; RtcReboot.valid = RTC_MEM_VALID;
// RtcReboot.fast_reboot_count = 0; // Explicit by memset // RtcReboot.fast_reboot_count = 0; // Explicit by memset
RtcRebootSave(); RtcRebootSave();

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@ -1208,14 +1208,12 @@ uint8_t ValidPin(uint32_t pin, uint32_t gpio)
return GPIO_NONE; // Disable flash pins GPIO6, GPIO7, GPIO8 and GPIO11 return GPIO_NONE; // Disable flash pins GPIO6, GPIO7, GPIO8 and GPIO11
} }
#ifdef ESP8266
// if (!is_8285 && !Settings.flag3.user_esp8285_enable) { // SetOption51 - Enable ESP8285 user GPIO's // if (!is_8285 && !Settings.flag3.user_esp8285_enable) { // SetOption51 - Enable ESP8285 user GPIO's
if ((WEMOS == Settings.module) && !Settings.flag3.user_esp8285_enable) { // SetOption51 - Enable ESP8285 user GPIO's if ((WEMOS == Settings.module) && !Settings.flag3.user_esp8285_enable) { // SetOption51 - Enable ESP8285 user GPIO's
if ((pin == 9) || (pin == 10)) { if ((pin == 9) || (pin == 10)) {
return GPIO_NONE; // Disable possible flash GPIO9 and GPIO10 return GPIO_NONE; // Disable possible flash GPIO9 and GPIO10
} }
} }
#endif // ESP8266
return gpio; return gpio;
} }