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First try to fix counter interrupt storm 

First try to fix counter interrupt storm during OTA (#8928)
This commit is contained in:
Theo Arends 2020-07-17 12:49:42 +02:00
parent a9b05b0884
commit 25dcf447f3
2 changed files with 13 additions and 0 deletions
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6
tasmota/xdrv_01_webserver.ino
View File

@ -2598,6 +2598,9 @@ void HandleUploadDone(void)
WifiConfigCounter();
restart_flag = 0;
MqttRetryCounter(0);
#ifdef USE_COUNTER
CounterInterruptDisable(false);
#endif
WSContentStart_P(S_INFORMATION);
if (!Web.upload_error) {
@ -2673,6 +2676,9 @@ void HandleUploadLoop(void)
}
} else {
MqttRetryCounter(60);
#ifdef USE_COUNTER
CounterInterruptDisable(true);
#endif
#ifdef USE_EMULATION
UdpDisconnect();
#endif // USE_EMULATION

7
tasmota/xsns_01_counter.ino
View File

@ -44,6 +44,7 @@ struct COUNTER {
uint8_t no_pullup = 0; // Counter input pullup flag (1 = No pullup)
uint8_t pin_state = 0; // LSB0..3 Last state of counter pin; LSB7==0 IRQ is FALLING, LSB7==1 IRQ is CHANGE
bool any_counter = false;
bool disable = false;
} Counter;
uint32_t last_cycle;
@ -51,6 +52,8 @@ uint32_t cycle_time;
//void ICACHE_RAM_ATTR CounterUpdate(uint8_t index) {
void ICACHE_RAM_ATTR CounterIsrArg(void *arg) {
if (Counter.disable) { return; }
uint32_t index = *static_cast<uint8_t*>(arg);
uint32_t time = micros();
@ -143,6 +146,10 @@ void ICACHE_RAM_ATTR CounterUpdate4(void)
*/
/********************************************************************************************/
void CounterInterruptDisable(bool state) {
Counter.disable = state;
}
bool CounterPinState(void)
{
if ((XdrvMailbox.index >= AGPIO(GPIO_CNTR1_NP)) && (XdrvMailbox.index < (AGPIO(GPIO_CNTR1_NP) + MAX_COUNTERS))) {