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Changed ESP32 Ethernet Phy Type information to IDF v3+

This commit is contained in:
Theo Arends 2021-07-04 14:53:58 +02:00
parent 9203d6d4b3
commit 377b34409f
4 changed files with 9 additions and 6 deletions
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1
CHANGELOG.md
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@ -10,6 +10,7 @@ All notable changes to this project will be documented in this file.
### Changed ### Changed
- ESP32 core library from v1.0.7 to v1.0.7.1 - ESP32 core library from v1.0.7 to v1.0.7.1
- ESP32 Ethernet Phy Type information to IDF v3+
- Allow buttons to work in AP normal mode (#12518) - Allow buttons to work in AP normal mode (#12518)
- Enable Ping and rule features for any device compiled with more than 1M flash size (#12539) - Enable Ping and rule features for any device compiled with more than 1M flash size (#12539)

1
RELEASENOTES.md
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@ -105,6 +105,7 @@ The latter links can be used for OTA upgrades too like ``OtaUrl http://ota.tasmo
### Changed ### Changed
- ESP32 core library from v1.0.6 to v1.0.7.1 - ESP32 core library from v1.0.6 to v1.0.7.1
- ESP32 Ethernet Phy Type information to IDF v3+
- Speed up initial GUI console refresh - Speed up initial GUI console refresh
- Enable UFILESYS, GUI_TRASH_FILE and GUI_EDIT_FILE for any device compiled with more than 1M flash size - Enable UFILESYS, GUI_TRASH_FILE and GUI_EDIT_FILE for any device compiled with more than 1M flash size
- Simplified configuration for ir-full and removal of tasmota-ircustom [#12428](https://github.com/arendst/Tasmota/issues/12428) - Simplified configuration for ir-full and removal of tasmota-ircustom [#12428](https://github.com/arendst/Tasmota/issues/12428)

6
tasmota/my_user_config.h
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@ -935,15 +935,15 @@
//#define USE_ETHERNET // Add support for ethernet (Currently fixed for Olimex ESP32-PoE) //#define USE_ETHERNET // Add support for ethernet (Currently fixed for Olimex ESP32-PoE)
// #define USE_WT32_ETH01 // Add support for Wireless-Tag WT32-ETH01 // #define USE_WT32_ETH01 // Add support for Wireless-Tag WT32-ETH01
// #define ETH_TYPE 0 // [EthType] 0 = ETH_PHY_LAN8720, 1 = ETH_PHY_TLK110, 2 = ETH_PHY_IP101 // #define ETH_TYPE 0 // [EthType] 0 = ETH_PHY_LAN8720, 1 = ETH_PHY_TLK110/ETH_PHY_IP101, 2 = ETH_PHY_RTL8201, 3 = ETH_PHY_DP83848, 4 = ETH_PHY_DM9051, 5 = ETH_PHY_KSZ8081
// #define ETH_ADDRESS 1 // [EthAddress] 0 = PHY0 .. 31 = PHY31 // #define ETH_ADDRESS 1 // [EthAddress] 0 = PHY0 .. 31 = PHY31
// #define ETH_CLKMODE 0 // [EthClockMode] 0 = ETH_CLOCK_GPIO0_IN, 1 = ETH_CLOCK_GPIO0_OUT, 2 = ETH_CLOCK_GPIO16_OUT, 3 = ETH_CLOCK_GPIO17_OUT // #define ETH_CLKMODE 0 // [EthClockMode] 0 = ETH_CLOCK_GPIO0_IN, 1 = ETH_CLOCK_GPIO0_OUT, 2 = ETH_CLOCK_GPIO16_OUT, 3 = ETH_CLOCK_GPIO17_OUT
// Olimex ESP32-PoE // Olimex ESP32-PoE
#define ETH_TYPE 0 // [EthType] 0 = ETH_PHY_LAN8720, 1 = ETH_PHY_TLK110, 2 = ETH_PHY_IP101 #define ETH_TYPE 0 // [EthType] 0 = ETH_PHY_LAN8720, 1 = ETH_PHY_TLK110/ETH_PHY_IP101, 2 = ETH_PHY_RTL8201, 3 = ETH_PHY_DP83848, 4 = ETH_PHY_DM9051, 5 = ETH_PHY_KSZ8081
#define ETH_ADDRESS 0 // [EthAddress] 0 = PHY0 .. 31 = PHY31 #define ETH_ADDRESS 0 // [EthAddress] 0 = PHY0 .. 31 = PHY31
#define ETH_CLKMODE 3 // [EthClockMode] 0 = ETH_CLOCK_GPIO0_IN, 1 = ETH_CLOCK_GPIO0_OUT, 2 = ETH_CLOCK_GPIO16_OUT, 3 = ETH_CLOCK_GPIO17_OUT #define ETH_CLKMODE 3 // [EthClockMode] 0 = ETH_CLOCK_GPIO0_IN, 1 = ETH_CLOCK_GPIO0_OUT, 2 = ETH_CLOCK_GPIO16_OUT, 3 = ETH_CLOCK_GPIO17_OUT
// wESP32-PoE // wESP32-PoE
// #define ETH_TYPE 0 // [EthType] 0 = ETH_PHY_LAN8720, 1 = ETH_PHY_TLK110, 2 = ETH_PHY_IP101 // #define ETH_TYPE 0 // [EthType] 0 = ETH_PHY_LAN8720, 1 = ETH_PHY_TLK110/ETH_PHY_IP101, 2 = ETH_PHY_RTL8201, 3 = ETH_PHY_DP83848, 4 = ETH_PHY_DM9051, 5 = ETH_PHY_KSZ8081
// #define ETH_ADDRESS 0 // [EthAddress] 0 = PHY0 .. 31 = PHY31 // #define ETH_ADDRESS 0 // [EthAddress] 0 = PHY0 .. 31 = PHY31
// #define ETH_CLKMODE 0 // [EthClockMode] 0 = ETH_CLOCK_GPIO0_IN, 1 = ETH_CLOCK_GPIO0_OUT, 2 = ETH_CLOCK_GPIO16_OUT, 3 = ETH_CLOCK_GPIO17_OUT // #define ETH_CLKMODE 0 // [EthClockMode] 0 = ETH_CLOCK_GPIO0_IN, 1 = ETH_CLOCK_GPIO0_OUT, 2 = ETH_CLOCK_GPIO16_OUT, 3 = ETH_CLOCK_GPIO17_OUT

7
tasmota/xdrv_82_esp32_ethernet.ino
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@ -67,15 +67,16 @@
//******************************************************************************************** //********************************************************************************************
#ifndef ETH_ADDRESS #ifndef ETH_ADDRESS
#define ETH_ADDRESS 0 // esp_eth.h eth_phy_base_t: 0 = PHY0 .. 31 = PHY31 #define ETH_ADDRESS 0 // ETH.h uint8_t: 0 = PHY0 .. 31 = PHY31
#endif #endif
#ifndef ETH_TYPE #ifndef ETH_TYPE
#define ETH_TYPE ETH_PHY_LAN8720 // ETH.h eth_phy_type_t: 0 = ETH_PHY_LAN8720, 1 = ETH_PHY_TLK110, 2 = ETH_PHY_IP101 #define ETH_TYPE ETH_PHY_LAN8720 // ETH.h eth_phy_type_t: 0 = ETH_PHY_LAN8720, 1 = ETH_PHY_TLK110/ETH_PHY_IP101, 2 = ETH_PHY_RTL8201, 3 = ETH_PHY_DP83848, 4 = ETH_PHY_DM9051, 5 = ETH_PHY_KSZ8081
#endif #endif
#ifndef ETH_CLKMODE #ifndef ETH_CLKMODE
#define ETH_CLKMODE ETH_CLOCK_GPIO0_IN // esp_eth.h eth_clock_mode_t: 0 = ETH_CLOCK_GPIO0_IN, 1 = ETH_CLOCK_GPIO0_OUT, 2 = ETH_CLOCK_GPIO16_OUT, 3 = ETH_CLOCK_GPIO17_OUT #define ETH_CLKMODE ETH_CLOCK_GPIO0_IN // ETH.h eth_clock_mode_t: 0 = ETH_CLOCK_GPIO0_IN, 1 = ETH_CLOCK_GPIO0_OUT, 2 = ETH_CLOCK_GPIO16_OUT, 3 = ETH_CLOCK_GPIO17_OUT
#endif #endif
*/ */