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Update support_esp.ino

This commit is contained in:
Theo Arends 2021-04-19 17:48:18 +02:00
parent 4961cb69bf
commit 41dd4f5458
1 changed files with 18 additions and 16 deletions
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34
tasmota/support_esp.ino
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@ -512,6 +512,8 @@ float CpuTemperature(void) {
*/ */
String GetDeviceHardware(void) { String GetDeviceHardware(void) {
// https://www.espressif.com/en/products/socs
/* /*
Source: esp-idf esp_system.h and esptool Source: esp-idf esp_system.h and esptool
@ -567,19 +569,18 @@ typedef struct {
else if (rev3) { return F("ESP32-D0WDQ6-V3"); } // Max 240MHz, Dual core, QFN 6*6 else if (rev3) { return F("ESP32-D0WDQ6-V3"); } // Max 240MHz, Dual core, QFN 6*6
else { return F("ESP32-D0WDQ6"); } // Max 240MHz, Dual core, QFN 6*6 else { return F("ESP32-D0WDQ6"); } // Max 240MHz, Dual core, QFN 6*6
case 1: case 1:
if (single_core) { return F("ESP32-S0WD"); } // Max 160MHz, Single core, QFN 5*5, Solo 1 if (single_core) { return F("ESP32-S0WD"); } // Max 160MHz, Single core, QFN 5*5, ESP32-SOLO-1, ESP32-DevKitC
else if (rev3) { return F("ESP32-D0WD-V3"); } // Max 240MHz, Dual core, QFN 5*5 else if (rev3) { return F("ESP32-D0WD-V3"); } // Max 240MHz, Dual core, QFN 5*5, ESP32-WROOM-32E, ESP32_WROVER-E, ESP32-DevKitC
else { return F("ESP32-D0WD"); } // Max 240MHz, Dual core, QFN 5*5 else { return F("ESP32-D0WD"); } // Max 240MHz, Dual core, QFN 5*5, ESP32-WROOM-32D, ESP32_WROVER-B, ESP32-DevKitC
case 2: return F("ESP32-D2WD"); // Max 160MHz, Dual core, QFN 5*5, 2MB embedded flash case 2: return F("ESP32-D2WD"); // Max 160MHz, Dual core, QFN 5*5, 2MB embedded flash
case 3: // To be determined but at least used in Yeelight case 3:
if (single_core) { return F("ESP32-S0WD"); } // Max 160MHz, Single core, QFN 5*5, Solo 1 if (single_core) { return F("ESP32-S0WD-OEM"); } // Max 160MHz, Single core, QFN 5*5, Xiaomi Yeelight
else if (rev3) { return F("ESP32-D0WD-V3"); } // Max 240MHz, Dual core, QFN 5*5 else { return F("ESP32-D0WD-OEM"); } // Max 240MHz, Dual core, QFN 5*5
else { return F("ESP32-D0WD"); } // Max 240MHz, Dual core, QFN 5*5 case 4: return F("ESP32-U4WDH"); // Max 160MHz, Single core, QFN 5*5, 4MB embedded flash, ESP32-MINI-1, ESP32-DevKitM-1
case 4: return F("ESP32-U4WDH"); // Max 160MHz, Single core, QFN 5*5, 4MB embedded flash
case 5: case 5:
if (rev3) { return F("ESP32-PICO-V3"); } // Max 240MHz, Dual core, QFN 7*7 if (rev3) { return F("ESP32-PICO-V3"); } // Max 240MHz, Dual core, LGA 7*7, ESP32-PICO-V3-ZERO, ESP32-PICO-V3-ZERO-DevKit
else { return F("ESP32-PICO-D4"); } // Max 240MHz, Dual core, QFN 7*7, 4MB embedded flash else { return F("ESP32-PICO-D4"); } // Max 240MHz, Dual core, LGA 7*7, 4MB embedded flash, ESP32-PICO-KIT
case 6: return F("ESP32-PICO-V3-02"); // Max 240MHz, Dual core, QFN 7*7, 4MB embedded flash, 2MB embedded PSRAM case 6: return F("ESP32-PICO-V3-02"); // Max 240MHz, Dual core, LGA 7*7, 8MB embedded flash, 2MB embedded PSRAM, ESP32-PICO-MINI-02, ESP32-PICO-DevKitM-2
} }
#endif // CONFIG_IDF_TARGET_ESP32 #endif // CONFIG_IDF_TARGET_ESP32
return F("ESP32"); return F("ESP32");
@ -601,16 +602,16 @@ typedef struct {
AddLog(LOG_LEVEL_DEBUG, PSTR("HDW: ESP32 Model %d, Revision %d, Core %d, Package %d"), chip_info.model, chip_revision, chip_info.cores, chip_ver); AddLog(LOG_LEVEL_DEBUG, PSTR("HDW: ESP32 Model %d, Revision %d, Core %d, Package %d"), chip_info.model, chip_revision, chip_info.cores, chip_ver);
switch (pkg_version) { switch (pkg_version) {
case 0: return F("ESP32-S2"); // Max 240MHz, Single core, QFN 7*7 case 0: return F("ESP32-S2"); // Max 240MHz, Single core, QFN 7*7, ESP32-S2-WROOM, ESP32-S2-WROVER, ESP32-S2-Saola-1, ESP32-S2-Kaluga-1
case 1: return F("ESP32-S2FH2"); // Max 240MHz, Single core, QFN 7*7, 2MB embedded flash case 1: return F("ESP32-S2FH2"); // Max 240MHz, Single core, QFN 7*7, 2MB embedded flash, ESP32-S2-MINI-1, ESP32-S2-DevKitM-1
case 2: return F("ESP32-S2FH4"); // Max 240MHz, Single core, QFN 7*7, 4MB embedded flash case 2: return F("ESP32-S2FH4"); // Max 240MHz, Single core, QFN 7*7, 4MB embedded flash
case 3: return F("ESP32-S2FN4R2"); // Max 240MHz, Single core, QFN 7*7, 4MB embedded flash, 2MB embedded PSRAM case 3: return F("ESP32-S2FN4R2"); // Max 240MHz, Single core, QFN 7*7, 4MB embedded flash, 2MB embedded PSRAM, , ESP32-S2-MINI-1U, ESP32-S2-DevKitM-1U
} }
#endif // CONFIG_IDF_TARGET_ESP32S2 #endif // CONFIG_IDF_TARGET_ESP32S2
return F("ESP32-S2"); return F("ESP32-S2");
} }
else if (4 == chip_model) { // ESP32-S3 else if (4 == chip_model) { // ESP32-S3
return F("ESP32-S3"); return F("ESP32-S3"); // Max 240MHz, Dual core, QFN 7*7, ESP32-S3-WROOM-1, ESP32-S3-DevKitC-1
} }
else if (5 == chip_model) { // ESP32-C3 else if (5 == chip_model) { // ESP32-C3
#ifdef CONFIG_IDF_TARGET_ESP32C3 #ifdef CONFIG_IDF_TARGET_ESP32C3
@ -629,7 +630,8 @@ typedef struct {
AddLog(LOG_LEVEL_DEBUG, PSTR("HDW: ESP32 Model %d, Revision %d, Core %d, Package %d"), chip_info.model, chip_revision, chip_info.cores, chip_ver); AddLog(LOG_LEVEL_DEBUG, PSTR("HDW: ESP32 Model %d, Revision %d, Core %d, Package %d"), chip_info.model, chip_revision, chip_info.cores, chip_ver);
switch (pkg_version) { switch (pkg_version) {
case 0: return F("ESP32-C3"); case 0: return F("ESP32-C3"); // Max 160MHz, Single core, QFN 5*5, ESP32-C3-WROOM-02, ESP32-C3-DevKitC-02
case 1: return F("ESP32-C3FH4"); // Max 160MHz, Single core, QFN 5*5, 4MB embedded flash, ESP32-C3-MINI-1, ESP32-C3-DevKitM-1
} }
#endif // CONFIG_IDF_TARGET_ESP32C3 #endif // CONFIG_IDF_TARGET_ESP32C3
return F("ESP32-C3"); return F("ESP32-C3");