Fix DS18B20 for ESP32 with over 33 gpios

This commit is contained in:
Theo Arends 2023-09-19 15:20:10 +02:00
parent ddeb380a19
commit ffd09da89a
2 changed files with 43 additions and 46 deletions

View File

@ -159,27 +159,35 @@
static inline __attribute__((always_inline)) static inline __attribute__((always_inline))
IO_REG_TYPE directRead(IO_REG_TYPE pin) IO_REG_TYPE directRead(IO_REG_TYPE pin)
{ {
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 // max. usable Pins are 23 for C6 (below flash pins) // return digitalRead(pin); // Works most of the time
// return gpio_ll_get_level(&GPIO, pin); // The hal is not public api, don't use in application code
//#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6
#if SOC_GPIO_PIN_COUNT <= 32
return (GPIO.in.val >> pin) & 0x1; return (GPIO.in.val >> pin) & 0x1;
#else // plain ESP32 #else // ESP32 with over 32 gpios
if ( pin < 32 ) if ( pin < 32 )
return (GPIO.in >> pin) & 0x1; return (GPIO.in >> pin) & 0x1;
else if ( pin < 46 ) else
return (GPIO.in1.val >> (pin - 32)) & 0x1; return (GPIO.in1.val >> (pin - 32)) & 0x1;
#endif #endif
return 0; return 0;
} }
static inline __attribute__((always_inline)) static inline __attribute__((always_inline))
void directWriteLow(IO_REG_TYPE pin) void directWriteLow(IO_REG_TYPE pin)
{ {
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 // digitalWrite(pin, 0); // Works most of the time
// gpio_ll_set_level(&GPIO, pin, 0); // The hal is not public api, don't use in application code
//#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6
#if SOC_GPIO_PIN_COUNT <= 32
GPIO.out_w1tc.val = ((uint32_t)1 << pin); GPIO.out_w1tc.val = ((uint32_t)1 << pin);
#else // plain ESP32 #else // ESP32 with over 32 gpios
if ( pin < 32 ) if ( pin < 32 )
GPIO.out_w1tc = ((uint32_t)1 << pin); GPIO.out_w1tc = ((uint32_t)1 << pin);
else if ( pin < 46 ) else
GPIO.out1_w1tc.val = ((uint32_t)1 << (pin - 32)); GPIO.out1_w1tc.val = ((uint32_t)1 << (pin - 32));
#endif #endif
} }
@ -187,66 +195,63 @@ void directWriteLow(IO_REG_TYPE pin)
static inline __attribute__((always_inline)) static inline __attribute__((always_inline))
void directWriteHigh(IO_REG_TYPE pin) void directWriteHigh(IO_REG_TYPE pin)
{ {
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 // digitalWrite(pin, 1); // Works most of the time
// gpio_ll_set_level(&GPIO, pin, 1); // The hal is not public api, don't use in application code
//#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6
#if SOC_GPIO_PIN_COUNT <= 32
GPIO.out_w1ts.val = ((uint32_t)1 << pin); GPIO.out_w1ts.val = ((uint32_t)1 << pin);
#else // plain ESP32 #else // ESP32 with over 32 gpios
if ( pin < 32 ) if ( pin < 32 )
GPIO.out_w1ts = ((uint32_t)1 << pin); GPIO.out_w1ts = ((uint32_t)1 << pin);
else if ( pin < 46 ) else
GPIO.out1_w1ts.val = ((uint32_t)1 << (pin - 32)); GPIO.out1_w1ts.val = ((uint32_t)1 << (pin - 32));
#endif #endif
} }
static inline __attribute__((always_inline)) static inline __attribute__((always_inline))
void directModeInput(IO_REG_TYPE pin) void directModeInput(IO_REG_TYPE pin)
{ {
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 // pinMode(pin, INPUT); // Too slow - doesn't work
GPIO.enable_w1tc.val = ((uint32_t)1 << (pin)); // gpio_ll_output_disable(&GPIO, pin); // The hal is not public api, don't use in application code
#else
if ( digitalPinIsValid(pin) ) if ( digitalPinIsValid(pin) )
{ {
#if ESP_IDF_VERSION_MAJOR < 4 // IDF 3.x ESP32/PICO-D4
uint32_t rtc_reg(rtc_gpio_desc[pin].reg);
if ( rtc_reg ) // RTC pins PULL settings
{
ESP_REG(rtc_reg) = ESP_REG(rtc_reg) & ~(rtc_gpio_desc[pin].mux);
ESP_REG(rtc_reg) = ESP_REG(rtc_reg) & ~(rtc_gpio_desc[pin].pullup | rtc_gpio_desc[pin].pulldown);
}
#endif
// Input // Input
//#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6
#if SOC_GPIO_PIN_COUNT <= 32
GPIO.enable_w1tc.val = ((uint32_t)1 << (pin));
#else // ESP32 with over 32 gpios
if ( pin < 32 ) if ( pin < 32 )
GPIO.enable_w1tc = ((uint32_t)1 << pin); GPIO.enable_w1tc = ((uint32_t)1 << pin);
else else
GPIO.enable1_w1tc.val = ((uint32_t)1 << (pin - 32)); GPIO.enable1_w1tc.val = ((uint32_t)1 << (pin - 32));
}
#endif #endif
}
} }
static inline __attribute__((always_inline)) static inline __attribute__((always_inline))
void directModeOutput(IO_REG_TYPE pin) void directModeOutput(IO_REG_TYPE pin)
{ {
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 // pinMode(pin, OUTPUT); // Too slow - doesn't work
GPIO.enable_w1ts.val = ((uint32_t)1 << (pin)); // gpio_ll_output_enable(&GPIO, pin); // The hal is not public api, don't use in application code
#else
if ( digitalPinIsValid(pin) && pin <= 33 ) // pins above 33 can be only inputs
{
#if ESP_IDF_VERSION_MAJOR < 4 // IDF 3.x ESP32/PICO-D4
uint32_t rtc_reg(rtc_gpio_desc[pin].reg);
if ( rtc_reg ) // RTC pins PULL settings if ( digitalPinCanOutput(pin) )
{ {
ESP_REG(rtc_reg) = ESP_REG(rtc_reg) & ~(rtc_gpio_desc[pin].mux);
ESP_REG(rtc_reg) = ESP_REG(rtc_reg) & ~(rtc_gpio_desc[pin].pullup | rtc_gpio_desc[pin].pulldown);
}
#endif
// Output // Output
//#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6
#if SOC_GPIO_PIN_COUNT <= 32
GPIO.enable_w1ts.val = ((uint32_t)1 << (pin));
#else // ESP32 with over 32 gpios
if ( pin < 32 ) if ( pin < 32 )
GPIO.enable_w1ts = ((uint32_t)1 << pin); GPIO.enable_w1ts = ((uint32_t)1 << pin);
else // already validated to pins <= 33 else
GPIO.enable1_w1ts.val = ((uint32_t)1 << (pin - 32)); GPIO.enable1_w1ts.val = ((uint32_t)1 << (pin - 32));
}
#endif #endif
}
} }
#define DIRECT_READ(base, pin) directRead(pin) #define DIRECT_READ(base, pin) directRead(pin)
@ -254,7 +259,6 @@ void directModeOutput(IO_REG_TYPE pin)
#define DIRECT_WRITE_HIGH(base, pin) directWriteHigh(pin) #define DIRECT_WRITE_HIGH(base, pin) directWriteHigh(pin)
#define DIRECT_MODE_INPUT(base, pin) directModeInput(pin) #define DIRECT_MODE_INPUT(base, pin) directModeInput(pin)
#define DIRECT_MODE_OUTPUT(base, pin) directModeOutput(pin) #define DIRECT_MODE_OUTPUT(base, pin) directModeOutput(pin)
//#warning "ESP32 OneWire testing"
#elif defined(__SAMD21G18A__) #elif defined(__SAMD21G18A__)
#define PIN_TO_BASEREG(pin) portModeRegister(digitalPinToPort(pin)) #define PIN_TO_BASEREG(pin) portModeRegister(digitalPinToPort(pin))

View File

@ -1132,13 +1132,6 @@ bool CanUsePSRAM(void) {
if ((CHIP_ESP32 == chip_info.model) && (chip_revision < 300)) { if ((CHIP_ESP32 == chip_info.model) && (chip_revision < 300)) {
return false; return false;
} }
#if ESP_IDF_VERSION_MAJOR < 4
uint32_t pkg_version = REG_GET_FIELD(EFUSE_BLK0_RDATA3_REG, EFUSE_RD_CHIP_VER_PKG) & 0x7;
if ((CHIP_ESP32 == chip_info.model) && (pkg_version >= 6)) {
return false; // support for embedded PSRAM of ESP32-PICO-V3-02 requires esp-idf 4.4
}
#endif // ESP_IDF_VERSION_MAJOR < 4
#endif // CONFIG_IDF_TARGET_ESP32 #endif // CONFIG_IDF_TARGET_ESP32
return true; return true;
} }