mirror of https://github.com/arendst/Tasmota.git
566 lines
21 KiB
C++
566 lines
21 KiB
C++
#ifndef OneWire_h
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#define OneWire_h
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#include <inttypes.h>
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#if defined(__AVR__)
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#include <util/crc16.h>
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#endif
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#if ARDUINO >= 100
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#include "Arduino.h" // for delayMicroseconds, digitalPinToBitMask, etc
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#else
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#include "WProgram.h" // for delayMicroseconds
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#include "pins_arduino.h" // for digitalPinToBitMask, etc
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#endif
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// You can exclude certain features from OneWire. In theory, this
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// might save some space. In practice, the compiler automatically
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// removes unused code (technically, the linker, using -fdata-sections
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// and -ffunction-sections when compiling, and Wl,--gc-sections
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// when linking), so most of these will not result in any code size
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// reduction. Well, unless you try to use the missing features
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// and redesign your program to not need them! ONEWIRE_CRC8_TABLE
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// is the exception, because it selects a fast but large algorithm
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// or a small but slow algorithm.
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// you can exclude onewire_search by defining that to 0
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#ifndef ONEWIRE_SEARCH
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#define ONEWIRE_SEARCH 1
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#endif
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// You can exclude CRC checks altogether by defining this to 0
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#ifndef ONEWIRE_CRC
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#define ONEWIRE_CRC 1
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#endif
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// Select the table-lookup method of computing the 8-bit CRC
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// by setting this to 1. The lookup table enlarges code size by
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// about 250 bytes. It does NOT consume RAM (but did in very
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// old versions of OneWire). If you disable this, a slower
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// but very compact algorithm is used.
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#ifndef ONEWIRE_CRC8_TABLE
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#define ONEWIRE_CRC8_TABLE 0
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#endif
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// You can allow 16-bit CRC checks by defining this to 1
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// (Note that ONEWIRE_CRC must also be 1.)
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#ifndef ONEWIRE_CRC16
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#define ONEWIRE_CRC16 1
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#endif
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#ifndef FALSE
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#define FALSE 0
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#endif
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#ifndef TRUE
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#define TRUE 1
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#endif
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// Platform specific I/O definitions
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#if defined(__AVR__)
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#define PIN_TO_BASEREG(pin) (portInputRegister(digitalPinToPort(pin)))
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#define PIN_TO_BITMASK(pin) (digitalPinToBitMask(pin))
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#define IO_REG_TYPE uint8_t
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#define IO_REG_BASE_ATTR asm("r30")
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#define IO_REG_MASK_ATTR
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#define DIRECT_READ(base, mask) (((*(base)) & (mask)) ? 1 : 0)
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#define DIRECT_MODE_INPUT(base, mask) ((*((base)+1)) &= ~(mask))
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#define DIRECT_MODE_OUTPUT(base, mask) ((*((base)+1)) |= (mask))
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#define DIRECT_WRITE_LOW(base, mask) ((*((base)+2)) &= ~(mask))
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#define DIRECT_WRITE_HIGH(base, mask) ((*((base)+2)) |= (mask))
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#elif defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MK66FX1M0__) || defined(__MK64FX512__)
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#define PIN_TO_BASEREG(pin) (portOutputRegister(pin))
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#define PIN_TO_BITMASK(pin) (1)
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#define IO_REG_TYPE uint8_t
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#define IO_REG_BASE_ATTR
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#define IO_REG_MASK_ATTR __attribute__ ((unused))
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#define DIRECT_READ(base, mask) (*((base)+512))
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#define DIRECT_MODE_INPUT(base, mask) (*((base)+640) = 0)
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#define DIRECT_MODE_OUTPUT(base, mask) (*((base)+640) = 1)
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#define DIRECT_WRITE_LOW(base, mask) (*((base)+256) = 1)
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#define DIRECT_WRITE_HIGH(base, mask) (*((base)+128) = 1)
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#elif defined(__MKL26Z64__)
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#define PIN_TO_BASEREG(pin) (portOutputRegister(pin))
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#define PIN_TO_BITMASK(pin) (digitalPinToBitMask(pin))
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#define IO_REG_TYPE uint8_t
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#define IO_REG_BASE_ATTR
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#define IO_REG_MASK_ATTR
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#define DIRECT_READ(base, mask) ((*((base)+16) & (mask)) ? 1 : 0)
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#define DIRECT_MODE_INPUT(base, mask) (*((base)+20) &= ~(mask))
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#define DIRECT_MODE_OUTPUT(base, mask) (*((base)+20) |= (mask))
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#define DIRECT_WRITE_LOW(base, mask) (*((base)+8) = (mask))
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#define DIRECT_WRITE_HIGH(base, mask) (*((base)+4) = (mask))
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#elif defined(__SAM3X8E__) || defined(__SAM3A8C__) || defined(__SAM3A4C__)
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// Arduino 1.5.1 may have a bug in delayMicroseconds() on Arduino Due.
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// http://arduino.cc/forum/index.php/topic,141030.msg1076268.html#msg1076268
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// If you have trouble with OneWire on Arduino Due, please check the
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// status of delayMicroseconds() before reporting a bug in OneWire!
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#define PIN_TO_BASEREG(pin) (&(digitalPinToPort(pin)->PIO_PER))
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#define PIN_TO_BITMASK(pin) (digitalPinToBitMask(pin))
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#define IO_REG_TYPE uint32_t
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#define IO_REG_BASE_ATTR
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#define IO_REG_MASK_ATTR
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#define DIRECT_READ(base, mask) (((*((base)+15)) & (mask)) ? 1 : 0)
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#define DIRECT_MODE_INPUT(base, mask) ((*((base)+5)) = (mask))
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#define DIRECT_MODE_OUTPUT(base, mask) ((*((base)+4)) = (mask))
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#define DIRECT_WRITE_LOW(base, mask) ((*((base)+13)) = (mask))
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#define DIRECT_WRITE_HIGH(base, mask) ((*((base)+12)) = (mask))
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#ifndef PROGMEM
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#define PROGMEM
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#endif
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#ifndef pgm_read_byte
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#define pgm_read_byte(addr) (*(const uint8_t *)(addr))
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#endif
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#elif defined(__PIC32MX__)
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#define PIN_TO_BASEREG(pin) (portModeRegister(digitalPinToPort(pin)))
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#define PIN_TO_BITMASK(pin) (digitalPinToBitMask(pin))
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#define IO_REG_TYPE uint32_t
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#define IO_REG_BASE_ATTR
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#define IO_REG_MASK_ATTR
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#define DIRECT_READ(base, mask) (((*(base+4)) & (mask)) ? 1 : 0) //PORTX + 0x10
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#define DIRECT_MODE_INPUT(base, mask) ((*(base+2)) = (mask)) //TRISXSET + 0x08
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#define DIRECT_MODE_OUTPUT(base, mask) ((*(base+1)) = (mask)) //TRISXCLR + 0x04
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#define DIRECT_WRITE_LOW(base, mask) ((*(base+8+1)) = (mask)) //LATXCLR + 0x24
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#define DIRECT_WRITE_HIGH(base, mask) ((*(base+8+2)) = (mask)) //LATXSET + 0x28
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#elif defined(ARDUINO_ARCH_ESP8266)
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// Special note: I depend on the ESP community to maintain these definitions and
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// submit good pull requests. I can not answer any ESP questions or help you
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// resolve any problems related to ESP chips. Please do not contact me and please
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// DO NOT CREATE GITHUB ISSUES for ESP support. All ESP questions must be asked
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// on ESP community forums.
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#define PIN_TO_BASEREG(pin) ((volatile uint32_t*) GPO)
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#define PIN_TO_BITMASK(pin) (1 << pin)
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#define IO_REG_TYPE uint32_t
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#define IO_REG_BASE_ATTR
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#define IO_REG_MASK_ATTR
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#define DIRECT_READ(base, mask) ((GPI & (mask)) ? 1 : 0) //GPIO_IN_ADDRESS
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#define DIRECT_MODE_INPUT(base, mask) (GPE &= ~(mask)) //GPIO_ENABLE_W1TC_ADDRESS
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#define DIRECT_MODE_OUTPUT(base, mask) (GPE |= (mask)) //GPIO_ENABLE_W1TS_ADDRESS
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#define DIRECT_WRITE_LOW(base, mask) (GPOC = (mask)) //GPIO_OUT_W1TC_ADDRESS
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#define DIRECT_WRITE_HIGH(base, mask) (GPOS = (mask)) //GPIO_OUT_W1TS_ADDRESS
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#elif defined(ARDUINO_ARCH_ESP32)
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#include <driver/rtc_io.h>
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#define PIN_TO_BASEREG(pin) (0)
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#define PIN_TO_BITMASK(pin) (pin)
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#define IO_REG_TYPE uint32_t
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#define IO_REG_BASE_ATTR
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#define IO_REG_MASK_ATTR
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static inline __attribute__((always_inline))
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IO_REG_TYPE directRead(IO_REG_TYPE pin)
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{
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if ( pin < 32 )
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return (GPIO.in >> pin) & 0x1;
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else if ( pin < 40 )
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return (GPIO.in1.val >> (pin - 32)) & 0x1;
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return 0;
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}
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static inline __attribute__((always_inline))
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void directWriteLow(IO_REG_TYPE pin)
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{
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if ( pin < 32 )
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GPIO.out_w1tc = ((uint32_t)1 << pin);
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else if ( pin < 34 )
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GPIO.out1_w1tc.val = ((uint32_t)1 << (pin - 32));
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}
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static inline __attribute__((always_inline))
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void directWriteHigh(IO_REG_TYPE pin)
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{
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if ( pin < 32 )
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GPIO.out_w1ts = ((uint32_t)1 << pin);
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else if ( pin < 34 )
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GPIO.out1_w1ts.val = ((uint32_t)1 << (pin - 32));
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}
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static inline __attribute__((always_inline))
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void directModeInput(IO_REG_TYPE pin)
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{
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if ( digitalPinIsValid(pin) )
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{
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#if ESP_IDF_VERSION_MAJOR < 4 // IDF 3.x ESP32/PICO-D4
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uint32_t rtc_reg(rtc_gpio_desc[pin].reg);
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if ( rtc_reg ) // RTC pins PULL settings
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{
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ESP_REG(rtc_reg) = ESP_REG(rtc_reg) & ~(rtc_gpio_desc[pin].mux);
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ESP_REG(rtc_reg) = ESP_REG(rtc_reg) & ~(rtc_gpio_desc[pin].pullup | rtc_gpio_desc[pin].pulldown);
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}
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#elif ESP_IDF_VERSION_MAJOR > 3 // ESP32-S2 needs IDF 4.2 or later
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uint32_t rtc_reg(rtc_io_desc[pin].reg);
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if ( rtc_reg ) // RTC pins PULL settings
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{
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ESP_REG(rtc_reg) = ESP_REG(rtc_reg) & ~(rtc_io_desc[pin].mux);
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ESP_REG(rtc_reg) = ESP_REG(rtc_reg) & ~(rtc_io_desc[pin].pullup | rtc_io_desc[pin].pulldown);
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}
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#endif
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if ( pin < 32 )
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GPIO.enable_w1tc = ((uint32_t)1 << pin);
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else
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GPIO.enable1_w1tc.val = ((uint32_t)1 << (pin - 32));
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uint32_t pinFunction((uint32_t)2 << FUN_DRV_S); // what are the drivers?
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pinFunction |= FUN_IE; // input enable but required for output as well?
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pinFunction |= ((uint32_t)2 << MCU_SEL_S);
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ESP_REG(DR_REG_IO_MUX_BASE + esp32_gpioMux[pin].reg) = pinFunction;
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GPIO.pin[pin].val = 0;
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}
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}
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static inline __attribute__((always_inline))
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void directModeOutput(IO_REG_TYPE pin)
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{
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if ( digitalPinIsValid(pin) && pin <= 33 ) // pins above 33 can be only inputs
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{
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#if ESP_IDF_VERSION_MAJOR < 4 // IDF 3.x ESP32/PICO-D4
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uint32_t rtc_reg(rtc_gpio_desc[pin].reg);
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if ( rtc_reg ) // RTC pins PULL settings
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{
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ESP_REG(rtc_reg) = ESP_REG(rtc_reg) & ~(rtc_gpio_desc[pin].mux);
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ESP_REG(rtc_reg) = ESP_REG(rtc_reg) & ~(rtc_gpio_desc[pin].pullup | rtc_gpio_desc[pin].pulldown);
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}
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#elif ESP_IDF_VERSION_MAJOR > 3 // ESP32-S2 needs IDF 4.2 or later
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uint32_t rtc_reg(rtc_io_desc[pin].reg);
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if ( rtc_reg ) // RTC pins PULL settings
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{
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ESP_REG(rtc_reg) = ESP_REG(rtc_reg) & ~(rtc_io_desc[pin].mux);
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ESP_REG(rtc_reg) = ESP_REG(rtc_reg) & ~(rtc_io_desc[pin].pullup | rtc_io_desc[pin].pulldown);
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}
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#endif
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if ( pin < 32 )
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GPIO.enable_w1ts = ((uint32_t)1 << pin);
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else // already validated to pins <= 33
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GPIO.enable1_w1ts.val = ((uint32_t)1 << (pin - 32));
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uint32_t pinFunction((uint32_t)2 << FUN_DRV_S); // what are the drivers?
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pinFunction |= FUN_IE; // input enable but required for output as well?
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pinFunction |= ((uint32_t)2 << MCU_SEL_S);
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ESP_REG(DR_REG_IO_MUX_BASE + esp32_gpioMux[pin].reg) = pinFunction;
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GPIO.pin[pin].val = 0;
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}
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}
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#define DIRECT_READ(base, pin) directRead(pin)
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#define DIRECT_WRITE_LOW(base, pin) directWriteLow(pin)
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#define DIRECT_WRITE_HIGH(base, pin) directWriteHigh(pin)
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#define DIRECT_MODE_INPUT(base, pin) directModeInput(pin)
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#define DIRECT_MODE_OUTPUT(base, pin) directModeOutput(pin)
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//#warning "ESP32 OneWire testing"
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#elif defined(__SAMD21G18A__)
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#define PIN_TO_BASEREG(pin) portModeRegister(digitalPinToPort(pin))
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#define PIN_TO_BITMASK(pin) (digitalPinToBitMask(pin))
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#define IO_REG_TYPE uint32_t
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#define IO_REG_BASE_ATTR
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#define IO_REG_MASK_ATTR
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#define DIRECT_READ(base, mask) (((*((base)+8)) & (mask)) ? 1 : 0)
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#define DIRECT_MODE_INPUT(base, mask) ((*((base)+1)) = (mask))
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#define DIRECT_MODE_OUTPUT(base, mask) ((*((base)+2)) = (mask))
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#define DIRECT_WRITE_LOW(base, mask) ((*((base)+5)) = (mask))
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#define DIRECT_WRITE_HIGH(base, mask) ((*((base)+6)) = (mask))
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#elif defined(RBL_NRF51822)
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#define PIN_TO_BASEREG(pin) (0)
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#define PIN_TO_BITMASK(pin) (pin)
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#define IO_REG_TYPE uint32_t
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#define IO_REG_BASE_ATTR
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#define IO_REG_MASK_ATTR
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#define DIRECT_READ(base, pin) nrf_gpio_pin_read(pin)
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#define DIRECT_WRITE_LOW(base, pin) nrf_gpio_pin_clear(pin)
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#define DIRECT_WRITE_HIGH(base, pin) nrf_gpio_pin_set(pin)
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#define DIRECT_MODE_INPUT(base, pin) nrf_gpio_cfg_input(pin, NRF_GPIO_PIN_NOPULL)
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#define DIRECT_MODE_OUTPUT(base, pin) nrf_gpio_cfg_output(pin)
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#elif defined(__arc__) /* Arduino101/Genuino101 specifics */
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#include "scss_registers.h"
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#include "portable.h"
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#include "avr/pgmspace.h"
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#define GPIO_ID(pin) (g_APinDescription[pin].ulGPIOId)
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#define GPIO_TYPE(pin) (g_APinDescription[pin].ulGPIOType)
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#define GPIO_BASE(pin) (g_APinDescription[pin].ulGPIOBase)
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#define DIR_OFFSET_SS 0x01
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#define DIR_OFFSET_SOC 0x04
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#define EXT_PORT_OFFSET_SS 0x0A
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#define EXT_PORT_OFFSET_SOC 0x50
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/* GPIO registers base address */
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#define PIN_TO_BASEREG(pin) ((volatile uint32_t *)g_APinDescription[pin].ulGPIOBase)
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#define PIN_TO_BITMASK(pin) pin
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#define IO_REG_TYPE uint32_t
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#define IO_REG_BASE_ATTR
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#define IO_REG_MASK_ATTR
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static inline __attribute__((always_inline))
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IO_REG_TYPE directRead(volatile IO_REG_TYPE *base, IO_REG_TYPE pin)
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{
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IO_REG_TYPE ret;
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if (SS_GPIO == GPIO_TYPE(pin)) {
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ret = READ_ARC_REG(((IO_REG_TYPE)base + EXT_PORT_OFFSET_SS));
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} else {
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ret = MMIO_REG_VAL_FROM_BASE((IO_REG_TYPE)base, EXT_PORT_OFFSET_SOC);
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}
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return ((ret >> GPIO_ID(pin)) & 0x01);
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}
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static inline __attribute__((always_inline))
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void directModeInput(volatile IO_REG_TYPE *base, IO_REG_TYPE pin)
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{
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if (SS_GPIO == GPIO_TYPE(pin)) {
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WRITE_ARC_REG(READ_ARC_REG((((IO_REG_TYPE)base) + DIR_OFFSET_SS)) & ~(0x01 << GPIO_ID(pin)),
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((IO_REG_TYPE)(base) + DIR_OFFSET_SS));
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} else {
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MMIO_REG_VAL_FROM_BASE((IO_REG_TYPE)base, DIR_OFFSET_SOC) &= ~(0x01 << GPIO_ID(pin));
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}
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}
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static inline __attribute__((always_inline))
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void directModeOutput(volatile IO_REG_TYPE *base, IO_REG_TYPE pin)
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{
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if (SS_GPIO == GPIO_TYPE(pin)) {
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WRITE_ARC_REG(READ_ARC_REG(((IO_REG_TYPE)(base) + DIR_OFFSET_SS)) | (0x01 << GPIO_ID(pin)),
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((IO_REG_TYPE)(base) + DIR_OFFSET_SS));
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} else {
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MMIO_REG_VAL_FROM_BASE((IO_REG_TYPE)base, DIR_OFFSET_SOC) |= (0x01 << GPIO_ID(pin));
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}
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}
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static inline __attribute__((always_inline))
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void directWriteLow(volatile IO_REG_TYPE *base, IO_REG_TYPE pin)
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{
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if (SS_GPIO == GPIO_TYPE(pin)) {
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WRITE_ARC_REG(READ_ARC_REG(base) & ~(0x01 << GPIO_ID(pin)), base);
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} else {
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MMIO_REG_VAL(base) &= ~(0x01 << GPIO_ID(pin));
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}
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}
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static inline __attribute__((always_inline))
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void directWriteHigh(volatile IO_REG_TYPE *base, IO_REG_TYPE pin)
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{
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if (SS_GPIO == GPIO_TYPE(pin)) {
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WRITE_ARC_REG(READ_ARC_REG(base) | (0x01 << GPIO_ID(pin)), base);
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} else {
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MMIO_REG_VAL(base) |= (0x01 << GPIO_ID(pin));
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}
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}
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#define DIRECT_READ(base, pin) directRead(base, pin)
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#define DIRECT_MODE_INPUT(base, pin) directModeInput(base, pin)
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#define DIRECT_MODE_OUTPUT(base, pin) directModeOutput(base, pin)
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#define DIRECT_WRITE_LOW(base, pin) directWriteLow(base, pin)
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#define DIRECT_WRITE_HIGH(base, pin) directWriteHigh(base, pin)
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#elif defined(__riscv)
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/*
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* Tested on highfive1
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*
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* Stable results are achieved operating in the
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* two high speed modes of the highfive1. It
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* seems to be less reliable in slow mode.
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*/
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#define PIN_TO_BASEREG(pin) (0)
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#define PIN_TO_BITMASK(pin) digitalPinToBitMask(pin)
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#define IO_REG_TYPE uint32_t
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#define IO_REG_BASE_ATTR
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#define IO_REG_MASK_ATTR
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static inline __attribute__((always_inline))
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IO_REG_TYPE directRead(IO_REG_TYPE mask)
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{
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return ((GPIO_REG(GPIO_INPUT_VAL) & mask) != 0) ? 1 : 0;
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}
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static inline __attribute__((always_inline))
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void directModeInput(IO_REG_TYPE mask)
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{
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GPIO_REG(GPIO_OUTPUT_XOR) &= ~mask;
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GPIO_REG(GPIO_IOF_EN) &= ~mask;
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GPIO_REG(GPIO_INPUT_EN) |= mask;
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GPIO_REG(GPIO_OUTPUT_EN) &= ~mask;
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}
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static inline __attribute__((always_inline))
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void directModeOutput(IO_REG_TYPE mask)
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{
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GPIO_REG(GPIO_OUTPUT_XOR) &= ~mask;
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GPIO_REG(GPIO_IOF_EN) &= ~mask;
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GPIO_REG(GPIO_INPUT_EN) &= ~mask;
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GPIO_REG(GPIO_OUTPUT_EN) |= mask;
|
|
}
|
|
|
|
static inline __attribute__((always_inline))
|
|
void directWriteLow(IO_REG_TYPE mask)
|
|
{
|
|
GPIO_REG(GPIO_OUTPUT_VAL) &= ~mask;
|
|
}
|
|
|
|
static inline __attribute__((always_inline))
|
|
void directWriteHigh(IO_REG_TYPE mask)
|
|
{
|
|
GPIO_REG(GPIO_OUTPUT_VAL) |= mask;
|
|
}
|
|
|
|
#define DIRECT_READ(base, mask) directRead(mask)
|
|
#define DIRECT_WRITE_LOW(base, mask) directWriteLow(mask)
|
|
#define DIRECT_WRITE_HIGH(base, mask) directWriteHigh(mask)
|
|
#define DIRECT_MODE_INPUT(base, mask) directModeInput(mask)
|
|
#define DIRECT_MODE_OUTPUT(base, mask) directModeOutput(mask)
|
|
|
|
#else
|
|
#define PIN_TO_BASEREG(pin) (0)
|
|
#define PIN_TO_BITMASK(pin) (pin)
|
|
#define IO_REG_TYPE unsigned int
|
|
#define IO_REG_BASE_ATTR
|
|
#define IO_REG_MASK_ATTR
|
|
#define DIRECT_READ(base, pin) digitalRead(pin)
|
|
#define DIRECT_WRITE_LOW(base, pin) digitalWrite(pin, LOW)
|
|
#define DIRECT_WRITE_HIGH(base, pin) digitalWrite(pin, HIGH)
|
|
#define DIRECT_MODE_INPUT(base, pin) pinMode(pin,INPUT)
|
|
#define DIRECT_MODE_OUTPUT(base, pin) pinMode(pin,OUTPUT)
|
|
#warning "OneWire. Fallback mode. Using API calls for pinMode,digitalRead and digitalWrite. Operation of this library is not guaranteed on this architecture."
|
|
|
|
#endif
|
|
|
|
|
|
class OneWire
|
|
{
|
|
private:
|
|
IO_REG_TYPE bitmask;
|
|
volatile IO_REG_TYPE *baseReg;
|
|
|
|
#if ONEWIRE_SEARCH
|
|
// global search state
|
|
unsigned char ROM_NO[8];
|
|
uint8_t LastDiscrepancy;
|
|
uint8_t LastFamilyDiscrepancy;
|
|
uint8_t LastDeviceFlag;
|
|
#endif
|
|
|
|
public:
|
|
OneWire( uint8_t pin);
|
|
|
|
// Perform a 1-Wire reset cycle. Returns 1 if a device responds
|
|
// with a presence pulse. Returns 0 if there is no device or the
|
|
// bus is shorted or otherwise held low for more than 250uS
|
|
uint8_t reset(void);
|
|
|
|
// Issue a 1-Wire rom select command, you do the reset first.
|
|
void select(const uint8_t rom[8]);
|
|
|
|
// Issue a 1-Wire rom skip command, to address all on bus.
|
|
void skip(void);
|
|
|
|
// Write a byte. If 'power' is one then the wire is held high at
|
|
// the end for parasitically powered devices. You are responsible
|
|
// for eventually depowering it by calling depower() or doing
|
|
// another read or write.
|
|
void write(uint8_t v, uint8_t power = 0);
|
|
|
|
void write_bytes(const uint8_t *buf, uint16_t count, bool power = 0);
|
|
|
|
// Read a byte.
|
|
uint8_t read(void);
|
|
|
|
void read_bytes(uint8_t *buf, uint16_t count);
|
|
|
|
// Write a bit. The bus is always left powered at the end, see
|
|
// note in write() about that.
|
|
void write_bit(uint8_t v);
|
|
|
|
// Read a bit.
|
|
uint8_t read_bit(void);
|
|
|
|
// Stop forcing power onto the bus. You only need to do this if
|
|
// you used the 'power' flag to write() or used a write_bit() call
|
|
// and aren't about to do another read or write. You would rather
|
|
// not leave this powered if you don't have to, just in case
|
|
// someone shorts your bus.
|
|
void depower(void);
|
|
|
|
#if ONEWIRE_SEARCH
|
|
// Clear the search state so that if will start from the beginning again.
|
|
void reset_search();
|
|
|
|
// Setup the search to find the device type 'family_code' on the next call
|
|
// to search(*newAddr) if it is present.
|
|
void target_search(uint8_t family_code);
|
|
|
|
// Look for the next device. Returns 1 if a new address has been
|
|
// returned. A zero might mean that the bus is shorted, there are
|
|
// no devices, or you have already retrieved all of them. It
|
|
// might be a good idea to check the CRC to make sure you didn't
|
|
// get garbage. The order is deterministic. You will always get
|
|
// the same devices in the same order.
|
|
uint8_t search(uint8_t *newAddr, bool search_mode = true);
|
|
#endif
|
|
|
|
#if ONEWIRE_CRC
|
|
// Compute a Dallas Semiconductor 8 bit CRC, these are used in the
|
|
// ROM and scratchpad registers.
|
|
static uint8_t crc8(const uint8_t *addr, uint8_t len);
|
|
|
|
#if ONEWIRE_CRC16
|
|
// Compute the 1-Wire CRC16 and compare it against the received CRC.
|
|
// Example usage (reading a DS2408):
|
|
// // Put everything in a buffer so we can compute the CRC easily.
|
|
// uint8_t buf[13];
|
|
// buf[0] = 0xF0; // Read PIO Registers
|
|
// buf[1] = 0x88; // LSB address
|
|
// buf[2] = 0x00; // MSB address
|
|
// WriteBytes(net, buf, 3); // Write 3 cmd bytes
|
|
// ReadBytes(net, buf+3, 10); // Read 6 data bytes, 2 0xFF, 2 CRC16
|
|
// if (!CheckCRC16(buf, 11, &buf[11])) {
|
|
// // Handle error.
|
|
// }
|
|
//
|
|
// @param input - Array of bytes to checksum.
|
|
// @param len - How many bytes to use.
|
|
// @param inverted_crc - The two CRC16 bytes in the received data.
|
|
// This should just point into the received data,
|
|
// *not* at a 16-bit integer.
|
|
// @param crc - The crc starting value (optional)
|
|
// @return True, iff the CRC matches.
|
|
static bool check_crc16(const uint8_t* input, uint16_t len, const uint8_t* inverted_crc, uint16_t crc = 0);
|
|
|
|
// Compute a Dallas Semiconductor 16 bit CRC. This is required to check
|
|
// the integrity of data received from many 1-Wire devices. Note that the
|
|
// CRC computed here is *not* what you'll get from the 1-Wire network,
|
|
// for two reasons:
|
|
// 1) The CRC is transmitted bitwise inverted.
|
|
// 2) Depending on the endian-ness of your processor, the binary
|
|
// representation of the two-byte return value may have a different
|
|
// byte order than the two bytes you get from 1-Wire.
|
|
// @param input - Array of bytes to checksum.
|
|
// @param len - How many bytes to use.
|
|
// @param crc - The crc starting value (optional)
|
|
// @return The CRC16, as defined by Dallas Semiconductor.
|
|
static uint16_t crc16(const uint8_t* input, uint16_t len, uint16_t crc = 0);
|
|
#endif
|
|
#endif
|
|
};
|
|
|
|
#endif
|