78 lines
3.2 KiB
INI
78 lines
3.2 KiB
INI
# Nintendo Game & Watch: Super Mario Bros. and Zelda
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set OCTOSPI1 1
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set OCTOSPI2 0
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source [find target/stm32h7x.cfg]
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# HXA-001 QSPI initialization
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# Based on https://forums.pimoroni.com/t/accessing-external-flash-from-openocd/12558
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# With contributions by https://github.com/jan2642 and https://github.com/GMMan
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proc hxa-001_qspi_init { } {
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echo "Initializing Octo-SPI interface"
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# PB01: OCTOSPIM_P1_IO0, PD12: OCTOSPIM_P1_IO1, PE02: OCTOSPIM_P1_IO2,
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# PA01: OCTOSPIM_P1_IO3, PB02: OCTOSPIM_P1_CLK, PE11: OCTOSPIM_P1_NCS,
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# PD01: 1.8V power
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# Enable GPIO clocks
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mmw 0x58024540 0x0000001b 0x00000000 ;# RCC_AHB4ENR |= GPIOAEN | GPIOBEN | GPIODEN | GPIOEEN
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# Enable Octo-SPI clocks
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mmw 0x58024534 0x00204000 0x00000000 ;# RCC_AHB3ENR |= OCTOSPI1EN | OCTOSPIMEN (enable clocks)
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sleep 1 ;# Wait for clock startup
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# Set GPIO ports (push-pull, no pull)
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# Port A: PA01:AF09:V
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mmw 0x58020000 0x00000000 0x00000004 ;# GPIOA_MODER
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mmw 0x58020008 0x0000000c 0x00000000 ;# GPIOA_OSPEEDR
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mmw 0x58020020 0x00000090 0x00000000 ;# GPIOA_AFRL
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# Port B: PB01:AF11:V PB02:AF09:V
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mmw 0x58020400 0x00000000 0x00000014 ;# GPIOB_MODER
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mmw 0x58020408 0x0000003c 0x00000000 ;# GPIOB_OSPEEDR
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mmw 0x58020420 0x000009b0 0x00000000 ;# GPIOB_AFRL
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# Port D: PD01:OP:L PD12:AF09:V
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mmw 0x58020c00 0x00000000 0x01000008 ;# GPIOD_MODER
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mmw 0x58020c08 0x03000000 0x00000000 ;# GPIOD_OSPEEDR
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mmw 0x58020c24 0x00090000 0x00000000 ;# GPIOD_AFRH
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# Port E: PE02:AF09:V PE11:AF11:V
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mmw 0x58021000 0x00000000 0x00400010 ;# GPIOE_MODER
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mmw 0x58021008 0x00c00030 0x00000000 ;# GPIOE_OSPEEDR
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mmw 0x58021020 0x00000900 0x00000000 ;# GPIOE_AFRL
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mmw 0x58021024 0x0000b000 0x00000000 ;# GPIOE_AFRH
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# Reset Octo-SPI
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mmw 0x5802447c 0x00204000 0x00000000 ;# RCC_AHB3RSTR |= OCTOSPIMRST | OCTOSPI1RST
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# Take Octo-SPI out of reset
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mmw 0x5802447c 0x00000000 0x00204000 ;# RCC_AHB3RSTR &= ~(OCTOSPIMRST | OCTOSPI1RST)
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# Turn on 1.8v power
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mww 0x58020c18 0x00010000 ;# GPIOD_BSRR |= BR1
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# Set up Octo-SPI interface
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mww 0x52005000 0x00000400 ;# OCTOSPI_CR: FMODE=0x0, FTHRES=0x04
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mww 0x52005008 0x011B0208 ;# OCTOSPI_DCR1: MTYP=0x1, DEVSIZE=0x1B, CSHT=0x2, DLYBYP=0x1
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mww 0x5200500c 0x00000002 ;# OCTOSPI_DCR2: PRESCALER=0x02
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mmw 0x52005000 0x00000001 0x00000000 ;# OCTOSPI_CR: EN=0x1
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# reset the Macronix flash
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mww 0x52005100 0x00000001 ;# OCTOSPI_CCR: no data, no address, no alternate bytes, instruction on a single line
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# indirect write mode without data, address and alternate bytes causes the following commands to be sent immediately
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mww 0x52005110 0x00000066 ;# OCTOSPI_IR: Reset-Enable (RSTEN)
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sleep 1
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mww 0x52005110 0x00000099 ;# OCTOSPI_IR: Reset (RST)
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sleep 20 ;# wait for the flash to come out of reset
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mmw 0x52005000 0x30000000 0x00000001 ;# OCTOSPI_CR |= FMODE=0x3, &= ~EN
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# OCTOSPI1: memory-mapped 1-line read mode with 3-byte addresses
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mww 0x52005100 0x01002101 ;# OCTOSPI_CCR: DMODE=0x1, ABMODE=0x0, ADSIZE=0x2, ADMODE=0x1, ISIZE=0x0, IMODE=0x1
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mww 0x52005110 0x00000003 ;# OCTOSPI_IR: INSTR=READ
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mmw 0x52005000 0x00000001 0x00000000 ;# OCTOSPI_CR |= EN
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flash probe 1 ;# load configuration from CR, TCR, CCR, IR register values
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}
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$_CHIPNAME.cpu0 configure -event reset-end {
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flash probe 0
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hxa-001_qspi_init
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}
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