2015-06-25 00:21:35 +01:00
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Branch instructions
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===================
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These cause execution to jump to a target location usually specified by a label (see the ``label``
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assembler directive). Conditional branches and the ``it`` and ``ite`` instructions test
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the Application Program Status Register (APSR) N (negative), Z (zero), C (carry) and V
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(overflow) flags to determine whether the branch should be executed.
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Most of the exposed assembler instructions (including move operations) set the flags but
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there are explicit comparison instructions to enable values to be tested.
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Further detail on the meaning of the condition flags is provided in the section
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describing comparison functions.
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Document conventions
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--------------------
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Notation: ``Rm`` denotes ARM registers R0-R15. ``LABEL`` denotes a label defined with the
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``label()`` assembler directive. ``<condition>`` indicates one of the following condition
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specifiers:
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* eq Equal to (result was zero)
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* ne Not equal
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* cs Carry set
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* cc Carry clear
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2016-08-01 00:52:00 +01:00
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* mi Minus (negative)
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2015-06-25 00:21:35 +01:00
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* pl Plus (positive)
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* vs Overflow set
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* vc Overflow clear
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* hi > (unsigned comparison)
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* ls <= (unsigned comparison)
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* ge >= (signed comparison)
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* lt < (signed comparison)
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* gt > (signed comparison)
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* le <= (signed comparison)
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Branch to label
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---------------
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* b(LABEL) Unconditional branch
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* beq(LABEL) branch if equal
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* bne(LABEL) branch if not equal
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* bge(LABEL) branch if greater than or equal
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* bgt(LABEL) branch if greater than
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* blt(LABEL) branch if less than (<) (signed)
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* ble(LABEL) branch if less than or equal to (<=) (signed)
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* bcs(LABEL) branch if carry flag is set
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* bcc(LABEL) branch if carry flag is clear
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* bmi(LABEL) branch if negative
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* bpl(LABEL) branch if positive
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* bvs(LABEL) branch if overflow flag set
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* bvc(LABEL) branch if overflow flag is clear
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* bhi(LABEL) branch if higher (unsigned)
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* bls(LABEL) branch if lower or equal (unsigned)
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Long branches
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-------------
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The code produced by the branch instructions listed above uses a fixed bit width to specify the
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branch destination, which is PC relative. Consequently in long programs where the
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branch instruction is remote from its destination the assembler will produce a "branch not in
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range" error. This can be overcome with the "wide" variants such as
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* beq\_w(LABEL) long branch if equal
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Wide branches use 4 bytes to encode the instruction (compared with 2 bytes for standard branch instructions).
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Subroutines (functions)
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-----------------------
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When entering a subroutine the processor stores the return address in register r14, also
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known as the link register (lr). Return to the instruction after the subroutine call is
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performed by updating the program counter (r15 or pc) from the link register, This
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process is handled by the following instructions.
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* bl(LABEL)
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Transfer execution to the instruction after ``LABEL`` storing the return address in
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the link register (r14).
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* bx(Rm) Branch to address specified by Rm.
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Typically ``bx(lr)`` is issued to return from a subroutine. For nested subroutines the
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link register of outer scopes must be saved (usually on the stack) before performing
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inner subroutine calls.
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