2018-09-24 03:09:28 +01:00
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#include <stdint.h>
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#include <stddef.h>
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#include "uart.h"
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#if defined(QEMU_SOC_STM32)
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typedef struct _UART_t {
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volatile uint32_t SR;
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volatile uint32_t DR;
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} UART_t;
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#define UART0 ((UART_t *)(0x40011000))
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void uart_init(void) {
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}
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void uart_tx_strn(const char *buf, size_t len) {
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for (size_t i = 0; i < len; ++i) {
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UART0->DR = buf[i];
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}
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}
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#elif defined(QEMU_SOC_NRF51)
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typedef struct _UART_t {
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volatile uint32_t r0[2];
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volatile uint32_t STARTTX; // 0x008
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volatile uint32_t r1[(0x500 - 0x008) / 4 - 1];
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volatile uint32_t ENABLE; // 0x500
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volatile uint32_t r2[(0x51c - 0x500) / 4 - 1];
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volatile uint32_t TXD; // 0x51c
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} UART_t;
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#define UART0 ((UART_t *)(0x40002000))
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void uart_init(void) {
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UART0->ENABLE = 4;
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UART0->STARTTX = 1;
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}
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void uart_tx_strn(const char *buf, size_t len) {
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for (size_t i = 0; i < len; ++i) {
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UART0->TXD = buf[i];
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}
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}
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#elif defined(QEMU_SOC_MPS2)
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#define UART_STATE_TXFULL (1 << 0)
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#define UART_CTRL_TX_EN (1 << 0)
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#define UART_CTRL_RX_EN (1 << 1)
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typedef struct _UART_t {
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volatile uint32_t DATA;
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volatile uint32_t STATE;
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volatile uint32_t CTRL;
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volatile uint32_t INTSTATUS;
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volatile uint32_t BAUDDIV;
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} UART_t;
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#define UART0 ((UART_t *)(0x40004000))
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void uart_init(void) {
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UART0->BAUDDIV = 16;
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UART0->CTRL = UART_CTRL_TX_EN;
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}
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void uart_tx_strn(const char *buf, size_t len) {
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for (size_t i = 0; i < len; ++i) {
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while (UART0->STATE & UART_STATE_TXFULL) {
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}
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UART0->DATA = buf[i];
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}
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}
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2021-05-25 13:16:08 +01:00
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#elif defined(QEMU_SOC_IMX6)
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#define UART_UCR1_UARTEN (1 << 0)
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#define UART_UCR2_TXEN (1 << 2)
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typedef struct _UART_t {
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volatile uint32_t URXD; // 0x00
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volatile uint32_t r0[15];
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volatile uint32_t UTXD; // 0x40
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volatile uint32_t r1[15];
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volatile uint32_t UCR1; // 0x80
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volatile uint32_t UCR2; // 0x84
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} UART_t;
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#define UART1 ((UART_t *)(0x02020000))
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void uart_init(void) {
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UART1->UCR1 = UART_UCR1_UARTEN;
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UART1->UCR2 = UART_UCR2_TXEN;
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}
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void uart_tx_strn(const char *buf, size_t len) {
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for (size_t i = 0; i < len; ++i) {
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UART1->UTXD = buf[i];
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}
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}
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2018-09-24 03:09:28 +01:00
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#endif
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