2014-05-03 23:27:38 +01:00
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/*
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* This file is part of the Micro Python project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2013, 2014 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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2014-04-20 00:16:30 +01:00
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#include <stdio.h>
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#include <string.h>
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2015-01-01 21:06:20 +00:00
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#include "py/nlr.h"
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#include "py/runtime.h"
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2014-12-02 23:41:30 +00:00
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#include "irq.h"
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2014-04-20 00:16:30 +01:00
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#include "pin.h"
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#include "genhdr/pins.h"
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2014-04-21 00:10:04 +01:00
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#include "bufhelper.h"
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2014-04-20 00:16:30 +01:00
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#include "spi.h"
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2014-10-23 14:25:32 +01:00
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#include MICROPY_HAL_H
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2014-04-20 00:16:30 +01:00
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2014-04-29 22:55:34 +01:00
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/// \moduleref pyb
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/// \class SPI - a master-driven serial protocol
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///
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/// SPI is a serial protocol that is driven by a master. At the physical level
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/// there are 3 lines: SCK, MOSI, MISO.
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///
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/// See usage model of I2C; SPI is very similar. Main difference is
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/// parameters to init the SPI bus:
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///
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/// from pyb import SPI
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2014-10-26 13:54:31 +00:00
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/// spi = SPI(1, SPI.MASTER, baudrate=600000, polarity=1, phase=0, crc=0x7)
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2014-04-29 22:55:34 +01:00
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///
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/// Only required parameter is mode, SPI.MASTER or SPI.SLAVE. Polarity can be
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2014-10-26 13:54:31 +00:00
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/// 0 or 1, and is the level the idle clock line sits at. Phase can be 0 or 1
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/// to sample data on the first or second clock edge respectively. Crc can be
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/// None for no CRC, or a polynomial specifier.
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2014-04-29 22:55:34 +01:00
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///
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/// Additional method for SPI:
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///
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/// data = spi.send_recv(b'1234') # send 4 bytes and receive 4 bytes
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/// buf = bytearray(4)
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/// spi.send_recv(b'1234', buf) # send 4 bytes and receive 4 into buf
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/// spi.send_recv(buf, buf) # send/recv 4 bytes from/to buf
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2014-04-21 01:59:43 +01:00
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2014-04-20 19:06:15 +01:00
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#if MICROPY_HW_ENABLE_SPI1
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2014-04-20 00:16:30 +01:00
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SPI_HandleTypeDef SPIHandle1 = {.Instance = NULL};
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2014-04-20 19:06:15 +01:00
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#endif
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2015-01-16 05:45:21 +00:00
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#if MICROPY_HW_ENABLE_SPI2
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2014-04-20 00:16:30 +01:00
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SPI_HandleTypeDef SPIHandle2 = {.Instance = NULL};
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2015-01-16 05:45:21 +00:00
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#endif
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2014-04-20 19:06:15 +01:00
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#if MICROPY_HW_ENABLE_SPI3
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2014-04-20 00:16:30 +01:00
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SPI_HandleTypeDef SPIHandle3 = {.Instance = NULL};
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2014-04-20 19:06:15 +01:00
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#endif
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2014-04-20 00:16:30 +01:00
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2014-12-02 23:41:30 +00:00
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// Possible DMA configurations for SPI busses:
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// SPI1_RX: DMA2_Stream0.CHANNEL_3 or DMA2_Stream2.CHANNEL_3
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// SPI1_TX: DMA2_Stream3.CHANNEL_3 or DMA2_Stream5.CHANNEL_3
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// SPI2_RX: DMA1_Stream3.CHANNEL_0
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// SPI2_TX: DMA1_Stream4.CHANNEL_0
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// SPI3_RX: DMA1_Stream0.CHANNEL_0 or DMA1_Stream2.CHANNEL_0
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// SPI3_TX: DMA1_Stream5.CHANNEL_0 or DMA1_Stream7.CHANNEL_0
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#define SPI1_DMA_CLK_ENABLE __DMA2_CLK_ENABLE
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#define SPI1_RX_DMA_STREAM (DMA2_Stream2)
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#define SPI1_TX_DMA_STREAM (DMA2_Stream5)
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#define SPI1_DMA_CHANNEL (DMA_CHANNEL_3)
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#define SPI1_RX_DMA_IRQN (DMA2_Stream2_IRQn)
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#define SPI1_TX_DMA_IRQN (DMA2_Stream5_IRQn)
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#define SPI1_RX_DMA_IRQ_HANDLER DMA2_Stream2_IRQHandler
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#define SPI1_TX_DMA_IRQ_HANDLER DMA2_Stream5_IRQHandler
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#define SPI2_DMA_CLK_ENABLE __DMA1_CLK_ENABLE
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#define SPI2_RX_DMA_STREAM (DMA1_Stream3)
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#define SPI2_TX_DMA_STREAM (DMA1_Stream4)
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#define SPI2_DMA_CHANNEL (DMA_CHANNEL_0)
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#define SPI2_RX_DMA_IRQN (DMA1_Stream3_IRQn)
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#define SPI2_TX_DMA_IRQN (DMA1_Stream4_IRQn)
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#define SPI2_RX_DMA_IRQ_HANDLER DMA1_Stream3_IRQHandler
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#define SPI2_TX_DMA_IRQ_HANDLER DMA1_Stream4_IRQHandler
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#define SPI3_DMA_CLK_ENABLE __DMA1_CLK_ENABLE
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#define SPI3_RX_DMA_STREAM (DMA1_Stream2)
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#define SPI3_TX_DMA_STREAM (DMA1_Stream7)
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#define SPI3_DMA_CHANNEL (DMA_CHANNEL_0)
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#define SPI3_RX_DMA_IRQN (DMA1_Stream2_IRQn)
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#define SPI3_TX_DMA_IRQN (DMA1_Stream7_IRQn)
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#define SPI3_RX_DMA_IRQ_HANDLER DMA1_Stream2_IRQHandler
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#define SPI3_TX_DMA_IRQ_HANDLER DMA1_Stream7_IRQHandler
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#if MICROPY_HW_ENABLE_SPI1
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STATIC DMA_HandleTypeDef spi1_rx_dma_handle;
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STATIC DMA_HandleTypeDef spi1_tx_dma_handle;
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void SPI1_RX_DMA_IRQ_HANDLER(void) { HAL_DMA_IRQHandler(&spi1_rx_dma_handle); }
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void SPI1_TX_DMA_IRQ_HANDLER(void) { HAL_DMA_IRQHandler(&spi1_tx_dma_handle); }
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#endif
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2015-01-16 05:45:21 +00:00
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#if MICROPY_HW_ENABLE_SPI2
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2014-12-02 23:41:30 +00:00
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STATIC DMA_HandleTypeDef spi2_rx_dma_handle;
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STATIC DMA_HandleTypeDef spi2_tx_dma_handle;
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void SPI2_RX_DMA_IRQ_HANDLER(void) { HAL_DMA_IRQHandler(&spi2_rx_dma_handle); }
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void SPI2_TX_DMA_IRQ_HANDLER(void) { HAL_DMA_IRQHandler(&spi2_tx_dma_handle); }
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2015-01-16 05:45:21 +00:00
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#endif
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2014-12-02 23:41:30 +00:00
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#if MICROPY_HW_ENABLE_SPI3
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STATIC DMA_HandleTypeDef spi3_rx_dma_handle;
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STATIC DMA_HandleTypeDef spi3_tx_dma_handle;
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void SPI3_RX_DMA_IRQ_HANDLER(void) { HAL_DMA_IRQHandler(&spi3_rx_dma_handle); }
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void SPI3_TX_DMA_IRQ_HANDLER(void) { HAL_DMA_IRQHandler(&spi3_tx_dma_handle); }
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#endif
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2014-04-20 00:16:30 +01:00
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void spi_init0(void) {
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// reset the SPI handles
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2014-04-20 19:06:15 +01:00
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#if MICROPY_HW_ENABLE_SPI1
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2014-04-20 00:16:30 +01:00
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memset(&SPIHandle1, 0, sizeof(SPI_HandleTypeDef));
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SPIHandle1.Instance = SPI1;
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2014-04-20 19:06:15 +01:00
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#endif
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2015-01-16 05:45:21 +00:00
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#if MICROPY_HW_ENABLE_SPI2
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2014-04-20 00:16:30 +01:00
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memset(&SPIHandle2, 0, sizeof(SPI_HandleTypeDef));
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SPIHandle2.Instance = SPI2;
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2015-01-16 05:45:21 +00:00
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#endif
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2014-04-20 19:06:15 +01:00
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#if MICROPY_HW_ENABLE_SPI3
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2014-04-20 00:16:30 +01:00
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memset(&SPIHandle3, 0, sizeof(SPI_HandleTypeDef));
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SPIHandle3.Instance = SPI3;
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2014-04-20 19:06:15 +01:00
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#endif
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2014-04-20 00:16:30 +01:00
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}
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// TODO allow to take a list of pins to use
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2014-09-30 22:26:59 +01:00
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void spi_init(SPI_HandleTypeDef *spi, bool enable_nss_pin) {
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2014-04-20 00:30:09 +01:00
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// init the GPIO lines
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GPIO_InitTypeDef GPIO_InitStructure;
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GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStructure.Speed = GPIO_SPEED_FAST;
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2014-04-21 00:10:04 +01:00
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GPIO_InitStructure.Pull = spi->Init.CLKPolarity == SPI_POLARITY_LOW ? GPIO_PULLDOWN : GPIO_PULLUP;
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2014-04-20 00:30:09 +01:00
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2014-12-02 23:41:30 +00:00
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DMA_HandleTypeDef *rx_dma, *tx_dma;
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IRQn_Type rx_dma_irqn, tx_dma_irqn;
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2014-04-20 00:16:30 +01:00
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const pin_obj_t *pins[4];
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2014-04-20 19:06:15 +01:00
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if (0) {
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2014-04-20 08:06:03 +01:00
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#if MICROPY_HW_ENABLE_SPI1
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2014-04-20 19:06:15 +01:00
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} else if (spi->Instance == SPI1) {
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2014-04-20 00:16:30 +01:00
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// X-skin: X5=PA4=SPI1_NSS, X6=PA5=SPI1_SCK, X7=PA6=SPI1_MISO, X8=PA7=SPI1_MOSI
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pins[0] = &pin_A4;
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pins[1] = &pin_A5;
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pins[2] = &pin_A6;
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pins[3] = &pin_A7;
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2014-04-20 00:30:09 +01:00
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GPIO_InitStructure.Alternate = GPIO_AF5_SPI1;
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2014-04-20 19:06:15 +01:00
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// enable the SPI clock
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__SPI1_CLK_ENABLE();
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2014-12-02 23:41:30 +00:00
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// configure DMA
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SPI1_DMA_CLK_ENABLE();
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spi1_rx_dma_handle.Instance = SPI1_RX_DMA_STREAM;
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spi1_rx_dma_handle.Init.Channel = SPI1_DMA_CHANNEL;
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spi1_tx_dma_handle.Instance = SPI1_TX_DMA_STREAM;
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rx_dma = &spi1_rx_dma_handle;
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tx_dma = &spi1_tx_dma_handle;
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rx_dma_irqn = SPI1_RX_DMA_IRQN;
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tx_dma_irqn = SPI1_TX_DMA_IRQN;
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2014-04-20 08:06:03 +01:00
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#endif
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2015-01-16 05:45:21 +00:00
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#if MICROPY_HW_ENABLE_SPI2
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2014-04-20 19:06:15 +01:00
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} else if (spi->Instance == SPI2) {
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2014-04-20 00:16:30 +01:00
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// Y-skin: Y5=PB12=SPI2_NSS, Y6=PB13=SPI2_SCK, Y7=PB14=SPI2_MISO, Y8=PB15=SPI2_MOSI
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pins[0] = &pin_B12;
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pins[1] = &pin_B13;
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pins[2] = &pin_B14;
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pins[3] = &pin_B15;
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2014-04-20 00:30:09 +01:00
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GPIO_InitStructure.Alternate = GPIO_AF5_SPI2;
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2014-04-20 19:06:15 +01:00
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// enable the SPI clock
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__SPI2_CLK_ENABLE();
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2014-12-02 23:41:30 +00:00
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// configure DMA
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SPI2_DMA_CLK_ENABLE();
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spi2_rx_dma_handle.Instance = SPI2_RX_DMA_STREAM;
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spi2_rx_dma_handle.Init.Channel = SPI2_DMA_CHANNEL;
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spi2_tx_dma_handle.Instance = SPI2_TX_DMA_STREAM;
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rx_dma = &spi2_rx_dma_handle;
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tx_dma = &spi2_tx_dma_handle;
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rx_dma_irqn = SPI2_RX_DMA_IRQN;
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tx_dma_irqn = SPI2_TX_DMA_IRQN;
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2015-01-16 05:45:21 +00:00
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#endif
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2014-04-20 00:16:30 +01:00
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#if MICROPY_HW_ENABLE_SPI3
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2014-04-20 19:06:15 +01:00
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} else if (spi->Instance == SPI3) {
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2014-04-20 00:16:30 +01:00
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pins[0] = &pin_A4;
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pins[1] = &pin_B3;
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pins[2] = &pin_B4;
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pins[3] = &pin_B5;
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2014-04-20 00:30:09 +01:00
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GPIO_InitStructure.Alternate = GPIO_AF6_SPI3;
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2014-04-20 19:06:15 +01:00
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// enable the SPI clock
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__SPI3_CLK_ENABLE();
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2014-12-02 23:41:30 +00:00
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// configure DMA
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SPI3_DMA_CLK_ENABLE();
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spi3_rx_dma_handle.Instance = SPI3_RX_DMA_STREAM;
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spi3_rx_dma_handle.Init.Channel = SPI3_DMA_CHANNEL;
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spi3_tx_dma_handle.Instance = SPI3_TX_DMA_STREAM;
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rx_dma = &spi3_rx_dma_handle;
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tx_dma = &spi3_tx_dma_handle;
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rx_dma_irqn = SPI3_RX_DMA_IRQN;
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tx_dma_irqn = SPI3_TX_DMA_IRQN;
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2014-04-20 00:16:30 +01:00
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#endif
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2014-04-20 19:06:15 +01:00
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} else {
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// SPI does not exist for this board (shouldn't get here, should be checked by caller)
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return;
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2014-04-20 00:16:30 +01:00
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}
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2014-09-30 22:26:59 +01:00
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for (uint i = (enable_nss_pin ? 0 : 1); i < 4; i++) {
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2014-04-20 00:16:30 +01:00
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GPIO_InitStructure.Pin = pins[i]->pin_mask;
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HAL_GPIO_Init(pins[i]->gpio, &GPIO_InitStructure);
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}
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2014-04-20 19:06:15 +01:00
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// init the SPI device
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2014-04-20 00:16:30 +01:00
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if (HAL_SPI_Init(spi) != HAL_OK) {
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// init error
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// TODO should raise an exception, but this function is not necessarily going to be
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// called via Python, so may not be properly wrapped in an NLR handler
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2014-10-23 14:25:32 +01:00
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printf("OSError: HAL_SPI_Init failed\n");
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2014-04-20 00:16:30 +01:00
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return;
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}
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2014-12-02 23:41:30 +00:00
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// configure DMA
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rx_dma->Init.Direction = DMA_PERIPH_TO_MEMORY;
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rx_dma->Init.PeriphInc = DMA_PINC_DISABLE;
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rx_dma->Init.MemInc = DMA_MINC_ENABLE;
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rx_dma->Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
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rx_dma->Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
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rx_dma->Init.Mode = DMA_NORMAL;
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rx_dma->Init.Priority = DMA_PRIORITY_LOW;
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rx_dma->Init.FIFOMode = DMA_FIFOMODE_DISABLE;
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rx_dma->Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
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rx_dma->Init.MemBurst = DMA_MBURST_INC4;
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rx_dma->Init.PeriphBurst = DMA_PBURST_INC4;
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tx_dma->Init = rx_dma->Init; // copy rx settings
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tx_dma->Init.Direction = DMA_MEMORY_TO_PERIPH;
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__HAL_LINKDMA(spi, hdmarx, *rx_dma);
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HAL_DMA_DeInit(rx_dma);
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HAL_DMA_Init(rx_dma);
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__HAL_LINKDMA(spi, hdmatx, *tx_dma);
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HAL_DMA_DeInit(tx_dma);
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HAL_DMA_Init(tx_dma);
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// Enable the relevant IRQs.
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HAL_NVIC_SetPriority(rx_dma_irqn, 6, 0);
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HAL_NVIC_EnableIRQ(rx_dma_irqn);
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HAL_NVIC_SetPriority(tx_dma_irqn, 6, 0);
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|
|
HAL_NVIC_EnableIRQ(tx_dma_irqn);
|
2014-04-20 00:16:30 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
void spi_deinit(SPI_HandleTypeDef *spi) {
|
|
|
|
HAL_SPI_DeInit(spi);
|
2014-04-20 19:06:15 +01:00
|
|
|
if (0) {
|
|
|
|
#if MICROPY_HW_ENABLE_SPI1
|
|
|
|
} else if (spi->Instance == SPI1) {
|
2014-04-21 00:10:04 +01:00
|
|
|
__SPI1_FORCE_RESET();
|
|
|
|
__SPI1_RELEASE_RESET();
|
2014-04-20 00:16:30 +01:00
|
|
|
__SPI1_CLK_DISABLE();
|
2014-04-20 19:06:15 +01:00
|
|
|
#endif
|
2015-01-16 05:45:21 +00:00
|
|
|
#if MICROPY_HW_ENABLE_SPI2
|
2014-04-20 00:16:30 +01:00
|
|
|
} else if (spi->Instance == SPI2) {
|
2014-04-21 00:10:04 +01:00
|
|
|
__SPI2_FORCE_RESET();
|
|
|
|
__SPI2_RELEASE_RESET();
|
2014-04-20 00:16:30 +01:00
|
|
|
__SPI2_CLK_DISABLE();
|
2015-01-16 05:45:21 +00:00
|
|
|
#endif
|
2014-04-20 19:06:15 +01:00
|
|
|
#if MICROPY_HW_ENABLE_SPI3
|
2014-04-20 08:06:03 +01:00
|
|
|
} else if (spi->Instance == SPI3) {
|
2014-04-21 00:10:04 +01:00
|
|
|
__SPI3_FORCE_RESET();
|
|
|
|
__SPI3_RELEASE_RESET();
|
2014-04-20 00:16:30 +01:00
|
|
|
__SPI3_CLK_DISABLE();
|
2014-04-20 19:06:15 +01:00
|
|
|
#endif
|
2014-04-20 00:16:30 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-12-02 23:41:30 +00:00
|
|
|
STATIC HAL_StatusTypeDef spi_wait_dma_finished(SPI_HandleTypeDef *spi, uint32_t timeout) {
|
|
|
|
uint32_t start = HAL_GetTick();
|
|
|
|
while (HAL_SPI_GetState(spi) != HAL_SPI_STATE_READY) {
|
|
|
|
if (HAL_GetTick() - start >= timeout) {
|
|
|
|
return HAL_TIMEOUT;
|
|
|
|
}
|
|
|
|
__WFI();
|
|
|
|
}
|
|
|
|
return HAL_OK;
|
|
|
|
}
|
|
|
|
|
2014-04-20 00:16:30 +01:00
|
|
|
/******************************************************************************/
|
|
|
|
/* Micro Python bindings */
|
|
|
|
|
|
|
|
typedef struct _pyb_spi_obj_t {
|
|
|
|
mp_obj_base_t base;
|
|
|
|
SPI_HandleTypeDef *spi;
|
|
|
|
} pyb_spi_obj_t;
|
|
|
|
|
2014-04-20 19:06:15 +01:00
|
|
|
STATIC const pyb_spi_obj_t pyb_spi_obj[] = {
|
|
|
|
#if MICROPY_HW_ENABLE_SPI1
|
2014-04-20 08:06:03 +01:00
|
|
|
{{&pyb_spi_type}, &SPIHandle1},
|
2014-04-20 19:06:15 +01:00
|
|
|
#else
|
|
|
|
{{&pyb_spi_type}, NULL},
|
|
|
|
#endif
|
2015-01-16 05:45:21 +00:00
|
|
|
#if MICROPY_HW_ENABLE_SPI2
|
2014-04-20 19:06:15 +01:00
|
|
|
{{&pyb_spi_type}, &SPIHandle2},
|
2015-01-16 05:45:21 +00:00
|
|
|
#else
|
|
|
|
{{&pyb_spi_type}, NULL},
|
|
|
|
#endif
|
2014-04-20 19:06:15 +01:00
|
|
|
#if MICROPY_HW_ENABLE_SPI3
|
|
|
|
{{&pyb_spi_type}, &SPIHandle3},
|
|
|
|
#else
|
|
|
|
{{&pyb_spi_type}, NULL},
|
|
|
|
#endif
|
2014-04-20 08:06:03 +01:00
|
|
|
};
|
2014-06-19 17:54:34 +01:00
|
|
|
#define PYB_NUM_SPI MP_ARRAY_SIZE(pyb_spi_obj)
|
2014-04-20 00:16:30 +01:00
|
|
|
|
2014-09-26 00:57:26 +01:00
|
|
|
SPI_HandleTypeDef *spi_get_handle(mp_obj_t o) {
|
|
|
|
if (!MP_OBJ_IS_TYPE(o, &pyb_spi_type)) {
|
|
|
|
nlr_raise(mp_obj_new_exception_msg(&mp_type_ValueError, "expecting an SPI object"));
|
|
|
|
}
|
|
|
|
pyb_spi_obj_t *self = o;
|
|
|
|
return self->spi;
|
|
|
|
}
|
|
|
|
|
2014-04-20 00:16:30 +01:00
|
|
|
STATIC void pyb_spi_print(void (*print)(void *env, const char *fmt, ...), void *env, mp_obj_t self_in, mp_print_kind_t kind) {
|
|
|
|
pyb_spi_obj_t *self = self_in;
|
|
|
|
|
|
|
|
uint spi_num;
|
|
|
|
if (self->spi->Instance == SPI1) { spi_num = 1; }
|
|
|
|
else if (self->spi->Instance == SPI2) { spi_num = 2; }
|
|
|
|
else { spi_num = 3; }
|
|
|
|
|
|
|
|
if (self->spi->State == HAL_SPI_STATE_RESET) {
|
|
|
|
print(env, "SPI(%u)", spi_num);
|
|
|
|
} else {
|
|
|
|
if (self->spi->Init.Mode == SPI_MODE_MASTER) {
|
|
|
|
// compute baudrate
|
|
|
|
uint spi_clock;
|
|
|
|
if (self->spi->Instance == SPI1) {
|
|
|
|
// SPI1 is on APB2
|
|
|
|
spi_clock = HAL_RCC_GetPCLK2Freq();
|
|
|
|
} else {
|
|
|
|
// SPI2 and SPI3 are on APB1
|
|
|
|
spi_clock = HAL_RCC_GetPCLK1Freq();
|
|
|
|
}
|
2014-12-08 21:34:07 +00:00
|
|
|
uint log_prescaler = (self->spi->Init.BaudRatePrescaler >> 3) + 1;
|
|
|
|
uint baudrate = spi_clock >> log_prescaler;
|
|
|
|
print(env, "SPI(%u, SPI.MASTER, baudrate=%u, prescaler=%u", spi_num, baudrate, 1 << log_prescaler);
|
2014-04-20 00:16:30 +01:00
|
|
|
} else {
|
2014-04-21 00:10:04 +01:00
|
|
|
print(env, "SPI(%u, SPI.SLAVE", spi_num);
|
2014-04-20 00:16:30 +01:00
|
|
|
}
|
2014-10-26 13:54:31 +00:00
|
|
|
print(env, ", polarity=%u, phase=%u, bits=%u", self->spi->Init.CLKPolarity == SPI_POLARITY_LOW ? 0 : 1, self->spi->Init.CLKPhase == SPI_PHASE_1EDGE ? 0 : 1, self->spi->Init.DataSize == SPI_DATASIZE_8BIT ? 8 : 16);
|
2014-04-21 00:10:04 +01:00
|
|
|
if (self->spi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) {
|
|
|
|
print(env, ", crc=0x%x", self->spi->Init.CRCPolynomial);
|
|
|
|
}
|
|
|
|
print(env, ")");
|
2014-04-20 00:16:30 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-10-26 13:54:31 +00:00
|
|
|
/// \method init(mode, baudrate=328125, *, polarity=1, phase=0, bits=8, firstbit=SPI.MSB, ti=False, crc=None)
|
2014-04-29 22:55:34 +01:00
|
|
|
///
|
|
|
|
/// Initialise the SPI bus with the given parameters:
|
|
|
|
///
|
|
|
|
/// - `mode` must be either `SPI.MASTER` or `SPI.SLAVE`.
|
|
|
|
/// - `baudrate` is the SCK clock rate (only sensible for a master).
|
2014-12-02 23:41:30 +00:00
|
|
|
STATIC mp_obj_t pyb_spi_init_helper(const pyb_spi_obj_t *self, mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
|
|
|
|
static const mp_arg_t allowed_args[] = {
|
|
|
|
{ MP_QSTR_mode, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} },
|
|
|
|
{ MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 328125} },
|
2014-12-08 21:34:07 +00:00
|
|
|
{ MP_QSTR_prescaler, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0xffffffff} },
|
2014-12-02 23:41:30 +00:00
|
|
|
{ MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1} },
|
|
|
|
{ MP_QSTR_phase, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
|
|
|
|
{ MP_QSTR_dir, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = SPI_DIRECTION_2LINES} },
|
|
|
|
{ MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} },
|
|
|
|
{ MP_QSTR_nss, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = SPI_NSS_SOFT} },
|
|
|
|
{ MP_QSTR_firstbit, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = SPI_FIRSTBIT_MSB} },
|
|
|
|
{ MP_QSTR_ti, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} },
|
|
|
|
{ MP_QSTR_crc, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} },
|
|
|
|
};
|
2014-04-20 00:16:30 +01:00
|
|
|
|
2014-04-21 00:10:04 +01:00
|
|
|
// parse args
|
2014-12-02 23:41:30 +00:00
|
|
|
mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
|
|
|
|
mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
|
2014-04-20 00:16:30 +01:00
|
|
|
|
|
|
|
// set the SPI configuration values
|
|
|
|
SPI_InitTypeDef *init = &self->spi->Init;
|
2014-12-02 23:41:30 +00:00
|
|
|
init->Mode = args[0].u_int;
|
2014-04-20 00:16:30 +01:00
|
|
|
|
2014-12-08 21:34:07 +00:00
|
|
|
// configure the prescaler
|
|
|
|
mp_uint_t br_prescale = args[2].u_int;
|
|
|
|
if (br_prescale == 0xffffffff) {
|
|
|
|
// prescaler not given, so select one that yields at most the requested baudrate
|
|
|
|
mp_uint_t spi_clock;
|
|
|
|
if (self->spi->Instance == SPI1) {
|
|
|
|
// SPI1 is on APB2
|
|
|
|
spi_clock = HAL_RCC_GetPCLK2Freq();
|
|
|
|
} else {
|
|
|
|
// SPI2 and SPI3 are on APB1
|
|
|
|
spi_clock = HAL_RCC_GetPCLK1Freq();
|
|
|
|
}
|
|
|
|
br_prescale = spi_clock / args[1].u_int;
|
2014-04-20 00:16:30 +01:00
|
|
|
}
|
|
|
|
if (br_prescale <= 2) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; }
|
|
|
|
else if (br_prescale <= 4) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4; }
|
|
|
|
else if (br_prescale <= 8) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; }
|
|
|
|
else if (br_prescale <= 16) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16; }
|
|
|
|
else if (br_prescale <= 32) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32; }
|
|
|
|
else if (br_prescale <= 64) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_64; }
|
|
|
|
else if (br_prescale <= 128) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_128; }
|
2014-04-20 01:25:58 +01:00
|
|
|
else { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256; }
|
2014-04-20 00:16:30 +01:00
|
|
|
|
2014-12-08 21:34:07 +00:00
|
|
|
init->CLKPolarity = args[3].u_int == 0 ? SPI_POLARITY_LOW : SPI_POLARITY_HIGH;
|
|
|
|
init->CLKPhase = args[4].u_int == 0 ? SPI_PHASE_1EDGE : SPI_PHASE_2EDGE;
|
|
|
|
init->Direction = args[5].u_int;
|
|
|
|
init->DataSize = (args[6].u_int == 16) ? SPI_DATASIZE_16BIT : SPI_DATASIZE_8BIT;
|
|
|
|
init->NSS = args[7].u_int;
|
|
|
|
init->FirstBit = args[8].u_int;
|
|
|
|
init->TIMode = args[9].u_bool ? SPI_TIMODE_ENABLED : SPI_TIMODE_DISABLED;
|
|
|
|
if (args[10].u_obj == mp_const_none) {
|
2014-04-20 00:16:30 +01:00
|
|
|
init->CRCCalculation = SPI_CRCCALCULATION_DISABLED;
|
|
|
|
init->CRCPolynomial = 0;
|
|
|
|
} else {
|
|
|
|
init->CRCCalculation = SPI_CRCCALCULATION_ENABLED;
|
2014-12-08 21:34:07 +00:00
|
|
|
init->CRCPolynomial = mp_obj_get_int(args[10].u_obj);
|
2014-04-20 00:16:30 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
// init the SPI bus
|
2014-09-30 22:26:59 +01:00
|
|
|
spi_init(self->spi, init->NSS != SPI_NSS_SOFT);
|
2014-04-20 00:16:30 +01:00
|
|
|
|
|
|
|
return mp_const_none;
|
|
|
|
}
|
|
|
|
|
2014-04-29 22:55:34 +01:00
|
|
|
/// \classmethod \constructor(bus, ...)
|
|
|
|
///
|
|
|
|
/// Construct an SPI object on the given bus. `bus` can be 1 or 2.
|
|
|
|
/// With no additional parameters, the SPI object is created but not
|
|
|
|
/// initialised (it has the settings from the last initialisation of
|
|
|
|
/// the bus, if any). If extra arguments are given, the bus is initialised.
|
|
|
|
/// See `init` for parameters of initialisation.
|
2014-05-04 14:28:11 +01:00
|
|
|
///
|
|
|
|
/// The physical pins of the SPI busses are:
|
|
|
|
///
|
|
|
|
/// - `SPI(1)` is on the X position: `(NSS, SCK, MISO, MOSI) = (X5, X6, X7, X8) = (PA4, PA5, PA6, PA7)`
|
|
|
|
/// - `SPI(2)` is on the Y position: `(NSS, SCK, MISO, MOSI) = (Y5, Y6, Y7, Y8) = (PB12, PB13, PB14, PB15)`
|
|
|
|
///
|
|
|
|
/// At the moment, the NSS pin is not used by the SPI driver and is free
|
|
|
|
/// for other use.
|
2014-08-30 00:35:11 +01:00
|
|
|
STATIC mp_obj_t pyb_spi_make_new(mp_obj_t type_in, mp_uint_t n_args, mp_uint_t n_kw, const mp_obj_t *args) {
|
2014-04-20 00:16:30 +01:00
|
|
|
// check arguments
|
|
|
|
mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true);
|
|
|
|
|
|
|
|
// get SPI number
|
2014-07-03 13:25:24 +01:00
|
|
|
mp_int_t spi_id = mp_obj_get_int(args[0]) - 1;
|
2014-04-20 00:16:30 +01:00
|
|
|
|
|
|
|
// check SPI number
|
2014-04-20 19:06:15 +01:00
|
|
|
if (!(0 <= spi_id && spi_id < PYB_NUM_SPI && pyb_spi_obj[spi_id].spi != NULL)) {
|
2014-04-20 00:16:30 +01:00
|
|
|
nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "SPI bus %d does not exist", spi_id + 1));
|
|
|
|
}
|
|
|
|
|
|
|
|
// get SPI object
|
|
|
|
const pyb_spi_obj_t *spi_obj = &pyb_spi_obj[spi_id];
|
|
|
|
|
|
|
|
if (n_args > 1 || n_kw > 0) {
|
|
|
|
// start the peripheral
|
|
|
|
mp_map_t kw_args;
|
|
|
|
mp_map_init_fixed_table(&kw_args, n_kw, args + n_args);
|
|
|
|
pyb_spi_init_helper(spi_obj, n_args - 1, args + 1, &kw_args);
|
|
|
|
}
|
|
|
|
|
|
|
|
return (mp_obj_t)spi_obj;
|
|
|
|
}
|
|
|
|
|
2014-08-30 00:35:11 +01:00
|
|
|
STATIC mp_obj_t pyb_spi_init(mp_uint_t n_args, const mp_obj_t *args, mp_map_t *kw_args) {
|
2014-04-20 00:16:30 +01:00
|
|
|
return pyb_spi_init_helper(args[0], n_args - 1, args + 1, kw_args);
|
|
|
|
}
|
|
|
|
STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_spi_init_obj, 1, pyb_spi_init);
|
|
|
|
|
2014-04-29 22:55:34 +01:00
|
|
|
/// \method deinit()
|
|
|
|
/// Turn off the SPI bus.
|
2014-04-20 00:16:30 +01:00
|
|
|
STATIC mp_obj_t pyb_spi_deinit(mp_obj_t self_in) {
|
|
|
|
pyb_spi_obj_t *self = self_in;
|
|
|
|
spi_deinit(self->spi);
|
|
|
|
return mp_const_none;
|
|
|
|
}
|
|
|
|
STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_spi_deinit_obj, pyb_spi_deinit);
|
|
|
|
|
2014-04-29 22:55:34 +01:00
|
|
|
/// \method send(send, *, timeout=5000)
|
|
|
|
/// Send data on the bus:
|
|
|
|
///
|
|
|
|
/// - `send` is the data to send (an integer to send, or a buffer object).
|
|
|
|
/// - `timeout` is the timeout in milliseconds to wait for the send.
|
|
|
|
///
|
|
|
|
/// Return value: `None`.
|
2014-12-02 23:41:30 +00:00
|
|
|
STATIC mp_obj_t pyb_spi_send(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
|
2014-04-20 00:16:30 +01:00
|
|
|
// TODO assumes transmission size is 8-bits wide
|
|
|
|
|
2014-12-02 23:41:30 +00:00
|
|
|
static const mp_arg_t allowed_args[] = {
|
|
|
|
{ MP_QSTR_send, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
|
|
|
|
{ MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} },
|
|
|
|
};
|
2014-04-20 00:16:30 +01:00
|
|
|
|
2014-04-21 00:10:04 +01:00
|
|
|
// parse args
|
2014-12-02 23:41:30 +00:00
|
|
|
pyb_spi_obj_t *self = pos_args[0];
|
|
|
|
mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
|
|
|
|
mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
|
2014-04-21 00:10:04 +01:00
|
|
|
|
|
|
|
// get the buffer to send from
|
2014-04-20 00:16:30 +01:00
|
|
|
mp_buffer_info_t bufinfo;
|
2014-04-21 00:10:04 +01:00
|
|
|
uint8_t data[1];
|
2014-12-02 23:41:30 +00:00
|
|
|
pyb_buf_get_for_send(args[0].u_obj, &bufinfo, data);
|
2014-04-20 00:16:30 +01:00
|
|
|
|
2014-04-21 00:10:04 +01:00
|
|
|
// send the data
|
2014-12-02 23:41:30 +00:00
|
|
|
HAL_StatusTypeDef status;
|
|
|
|
if (query_irq() == IRQ_STATE_DISABLED) {
|
|
|
|
status = HAL_SPI_Transmit(self->spi, bufinfo.buf, bufinfo.len, args[1].u_int);
|
|
|
|
} else {
|
|
|
|
status = HAL_SPI_Transmit_DMA(self->spi, bufinfo.buf, bufinfo.len);
|
|
|
|
if (status == HAL_OK) {
|
|
|
|
status = spi_wait_dma_finished(self->spi, args[1].u_int);
|
|
|
|
}
|
|
|
|
}
|
2014-04-20 00:16:30 +01:00
|
|
|
|
|
|
|
if (status != HAL_OK) {
|
2014-10-23 14:25:32 +01:00
|
|
|
mp_hal_raise(status);
|
2014-04-20 00:16:30 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
return mp_const_none;
|
|
|
|
}
|
2014-04-21 00:10:04 +01:00
|
|
|
STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_spi_send_obj, 1, pyb_spi_send);
|
|
|
|
|
2014-04-29 22:55:34 +01:00
|
|
|
/// \method recv(recv, *, timeout=5000)
|
|
|
|
///
|
|
|
|
/// Receive data on the bus:
|
|
|
|
///
|
|
|
|
/// - `recv` can be an integer, which is the number of bytes to receive,
|
|
|
|
/// or a mutable buffer, which will be filled with received bytes.
|
|
|
|
/// - `timeout` is the timeout in milliseconds to wait for the receive.
|
|
|
|
///
|
|
|
|
/// Return value: if `recv` is an integer then a new buffer of the bytes received,
|
|
|
|
/// otherwise the same buffer that was passed in to `recv`.
|
2014-12-02 23:41:30 +00:00
|
|
|
STATIC mp_obj_t pyb_spi_recv(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
|
2014-04-20 00:16:30 +01:00
|
|
|
// TODO assumes transmission size is 8-bits wide
|
|
|
|
|
2014-12-02 23:41:30 +00:00
|
|
|
static const mp_arg_t allowed_args[] = {
|
|
|
|
{ MP_QSTR_recv, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
|
|
|
|
{ MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} },
|
|
|
|
};
|
2014-04-21 00:10:04 +01:00
|
|
|
|
|
|
|
// parse args
|
2014-12-02 23:41:30 +00:00
|
|
|
pyb_spi_obj_t *self = pos_args[0];
|
|
|
|
mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
|
|
|
|
mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
|
2014-04-20 00:16:30 +01:00
|
|
|
|
2014-04-21 00:10:04 +01:00
|
|
|
// get the buffer to receive into
|
2015-01-21 22:48:37 +00:00
|
|
|
vstr_t vstr;
|
|
|
|
mp_obj_t o_ret = pyb_buf_get_for_recv(args[0].u_obj, &vstr);
|
2014-04-21 00:10:04 +01:00
|
|
|
|
|
|
|
// receive the data
|
2014-12-02 23:41:30 +00:00
|
|
|
HAL_StatusTypeDef status;
|
|
|
|
if (query_irq() == IRQ_STATE_DISABLED) {
|
2015-01-21 22:48:37 +00:00
|
|
|
status = HAL_SPI_Receive(self->spi, (uint8_t*)vstr.buf, vstr.len, args[1].u_int);
|
2014-12-02 23:41:30 +00:00
|
|
|
} else {
|
2015-01-21 22:48:37 +00:00
|
|
|
status = HAL_SPI_Receive_DMA(self->spi, (uint8_t*)vstr.buf, vstr.len);
|
2014-12-02 23:41:30 +00:00
|
|
|
if (status == HAL_OK) {
|
|
|
|
status = spi_wait_dma_finished(self->spi, args[1].u_int);
|
|
|
|
}
|
|
|
|
}
|
2014-04-20 00:16:30 +01:00
|
|
|
|
|
|
|
if (status != HAL_OK) {
|
2014-10-23 14:25:32 +01:00
|
|
|
mp_hal_raise(status);
|
2014-04-20 00:16:30 +01:00
|
|
|
}
|
|
|
|
|
2014-04-21 00:10:04 +01:00
|
|
|
// return the received data
|
2015-01-21 22:48:37 +00:00
|
|
|
if (o_ret != MP_OBJ_NULL) {
|
|
|
|
return o_ret;
|
2014-04-21 00:10:04 +01:00
|
|
|
} else {
|
2015-01-21 22:48:37 +00:00
|
|
|
return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr);
|
2014-04-21 00:10:04 +01:00
|
|
|
}
|
2014-04-20 00:16:30 +01:00
|
|
|
}
|
2014-04-21 00:10:04 +01:00
|
|
|
STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_spi_recv_obj, 1, pyb_spi_recv);
|
2014-04-20 00:16:30 +01:00
|
|
|
|
2014-04-29 22:55:34 +01:00
|
|
|
/// \method send_recv(send, recv=None, *, timeout=5000)
|
|
|
|
///
|
|
|
|
/// Send and receive data on the bus at the same time:
|
|
|
|
///
|
|
|
|
/// - `send` is the data to send (an integer to send, or a buffer object).
|
|
|
|
/// - `recv` is a mutable buffer which will be filled with received bytes.
|
|
|
|
/// It can be the same as `send`, or omitted. If omitted, a new buffer will
|
|
|
|
/// be created.
|
|
|
|
/// - `timeout` is the timeout in milliseconds to wait for the receive.
|
|
|
|
///
|
|
|
|
/// Return value: the buffer with the received bytes.
|
2014-12-02 23:41:30 +00:00
|
|
|
STATIC mp_obj_t pyb_spi_send_recv(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
|
2014-04-20 00:16:30 +01:00
|
|
|
// TODO assumes transmission size is 8-bits wide
|
|
|
|
|
2014-12-02 23:41:30 +00:00
|
|
|
static const mp_arg_t allowed_args[] = {
|
|
|
|
{ MP_QSTR_send, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
|
|
|
|
{ MP_QSTR_recv, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
|
|
|
|
{ MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} },
|
|
|
|
};
|
2014-04-20 00:16:30 +01:00
|
|
|
|
2014-04-21 00:10:04 +01:00
|
|
|
// parse args
|
2014-12-02 23:41:30 +00:00
|
|
|
pyb_spi_obj_t *self = pos_args[0];
|
|
|
|
mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
|
|
|
|
mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
|
2014-04-21 00:10:04 +01:00
|
|
|
|
|
|
|
// get buffers to send from/receive to
|
|
|
|
mp_buffer_info_t bufinfo_send;
|
2014-04-20 00:16:30 +01:00
|
|
|
uint8_t data_send[1];
|
2014-04-21 00:10:04 +01:00
|
|
|
mp_buffer_info_t bufinfo_recv;
|
2015-01-21 22:48:37 +00:00
|
|
|
vstr_t vstr_recv;
|
2014-04-21 00:10:04 +01:00
|
|
|
mp_obj_t o_ret;
|
|
|
|
|
2014-12-02 23:41:30 +00:00
|
|
|
if (args[0].u_obj == args[1].u_obj) {
|
2014-04-21 00:10:04 +01:00
|
|
|
// same object for send and receive, it must be a r/w buffer
|
2014-12-02 23:41:30 +00:00
|
|
|
mp_get_buffer_raise(args[0].u_obj, &bufinfo_send, MP_BUFFER_RW);
|
2014-04-21 00:10:04 +01:00
|
|
|
bufinfo_recv = bufinfo_send;
|
2015-01-21 22:48:37 +00:00
|
|
|
o_ret = args[0].u_obj;
|
2014-04-20 00:16:30 +01:00
|
|
|
} else {
|
2014-04-21 00:10:04 +01:00
|
|
|
// get the buffer to send from
|
2014-12-02 23:41:30 +00:00
|
|
|
pyb_buf_get_for_send(args[0].u_obj, &bufinfo_send, data_send);
|
2014-04-21 00:10:04 +01:00
|
|
|
|
|
|
|
// get the buffer to receive into
|
2014-12-02 23:41:30 +00:00
|
|
|
if (args[1].u_obj == MP_OBJ_NULL) {
|
2014-04-21 00:10:04 +01:00
|
|
|
// only send argument given, so create a fresh buffer of the send length
|
2015-01-21 22:48:37 +00:00
|
|
|
vstr_init_len(&vstr_recv, bufinfo_send.len);
|
|
|
|
bufinfo_recv.len = vstr_recv.len;
|
|
|
|
bufinfo_recv.buf = vstr_recv.buf;
|
|
|
|
o_ret = MP_OBJ_NULL;
|
2014-04-21 00:10:04 +01:00
|
|
|
} else {
|
|
|
|
// recv argument given
|
2014-12-02 23:41:30 +00:00
|
|
|
mp_get_buffer_raise(args[1].u_obj, &bufinfo_recv, MP_BUFFER_WRITE);
|
2014-04-21 01:59:43 +01:00
|
|
|
if (bufinfo_recv.len != bufinfo_send.len) {
|
|
|
|
nlr_raise(mp_obj_new_exception_msg(&mp_type_ValueError, "recv must be same length as send"));
|
|
|
|
}
|
2015-01-21 22:48:37 +00:00
|
|
|
o_ret = args[1].u_obj;
|
2014-04-21 00:10:04 +01:00
|
|
|
}
|
2014-04-20 00:16:30 +01:00
|
|
|
}
|
|
|
|
|
2014-04-21 00:10:04 +01:00
|
|
|
// send and receive the data
|
2014-12-02 23:41:30 +00:00
|
|
|
HAL_StatusTypeDef status;
|
|
|
|
if (query_irq() == IRQ_STATE_DISABLED) {
|
|
|
|
status = HAL_SPI_TransmitReceive(self->spi, bufinfo_send.buf, bufinfo_recv.buf, bufinfo_send.len, args[2].u_int);
|
|
|
|
} else {
|
|
|
|
status = HAL_SPI_TransmitReceive_DMA(self->spi, bufinfo_send.buf, bufinfo_recv.buf, bufinfo_send.len);
|
|
|
|
if (status == HAL_OK) {
|
|
|
|
status = spi_wait_dma_finished(self->spi, args[2].u_int);
|
|
|
|
}
|
|
|
|
}
|
2014-04-20 00:16:30 +01:00
|
|
|
|
|
|
|
if (status != HAL_OK) {
|
2014-10-23 14:25:32 +01:00
|
|
|
mp_hal_raise(status);
|
2014-04-20 00:16:30 +01:00
|
|
|
}
|
|
|
|
|
2014-04-21 00:10:04 +01:00
|
|
|
// return the received data
|
2015-01-21 22:48:37 +00:00
|
|
|
if (o_ret != MP_OBJ_NULL) {
|
|
|
|
return o_ret;
|
2014-04-21 00:10:04 +01:00
|
|
|
} else {
|
2015-01-21 22:48:37 +00:00
|
|
|
return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr_recv);
|
2014-04-21 00:10:04 +01:00
|
|
|
}
|
2014-04-20 00:16:30 +01:00
|
|
|
}
|
2014-04-21 00:10:04 +01:00
|
|
|
STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_spi_send_recv_obj, 1, pyb_spi_send_recv);
|
2014-04-20 00:16:30 +01:00
|
|
|
|
|
|
|
STATIC const mp_map_elem_t pyb_spi_locals_dict_table[] = {
|
|
|
|
// instance methods
|
|
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_init), (mp_obj_t)&pyb_spi_init_obj },
|
|
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_deinit), (mp_obj_t)&pyb_spi_deinit_obj },
|
|
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_send), (mp_obj_t)&pyb_spi_send_obj },
|
|
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_recv), (mp_obj_t)&pyb_spi_recv_obj },
|
|
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_send_recv), (mp_obj_t)&pyb_spi_send_recv_obj },
|
|
|
|
|
|
|
|
// class constants
|
2014-04-29 22:55:34 +01:00
|
|
|
/// \constant MASTER - for initialising the bus to master mode
|
|
|
|
/// \constant SLAVE - for initialising the bus to slave mode
|
|
|
|
/// \constant MSB - set the first bit to MSB
|
|
|
|
/// \constant LSB - set the first bit to LSB
|
2014-04-21 00:10:04 +01:00
|
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_MASTER), MP_OBJ_NEW_SMALL_INT(SPI_MODE_MASTER) },
|
|
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_SLAVE), MP_OBJ_NEW_SMALL_INT(SPI_MODE_SLAVE) },
|
|
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_MSB), MP_OBJ_NEW_SMALL_INT(SPI_FIRSTBIT_MSB) },
|
|
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_LSB), MP_OBJ_NEW_SMALL_INT(SPI_FIRSTBIT_LSB) },
|
2014-04-20 00:16:30 +01:00
|
|
|
/* TODO
|
|
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_DIRECTION_2LINES ((uint32_t)0x00000000)
|
|
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY
|
|
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_DIRECTION_1LINE SPI_CR1_BIDIMODE
|
|
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_NSS_SOFT SPI_CR1_SSM
|
|
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_NSS_HARD_INPUT ((uint32_t)0x00000000)
|
|
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_NSS_HARD_OUTPUT ((uint32_t)0x00040000)
|
|
|
|
*/
|
|
|
|
};
|
|
|
|
|
|
|
|
STATIC MP_DEFINE_CONST_DICT(pyb_spi_locals_dict, pyb_spi_locals_dict_table);
|
|
|
|
|
|
|
|
const mp_obj_type_t pyb_spi_type = {
|
|
|
|
{ &mp_type_type },
|
|
|
|
.name = MP_QSTR_SPI,
|
|
|
|
.print = pyb_spi_print,
|
|
|
|
.make_new = pyb_spi_make_new,
|
|
|
|
.locals_dict = (mp_obj_t)&pyb_spi_locals_dict,
|
|
|
|
};
|