2021-05-16 04:27:54 +01:00
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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2021 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "py/mphal.h"
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#include "ticks.h"
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#include "fsl_gpt.h"
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// General purpose timer for keeping microsecond and millisecond tick values.
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#define GPTx GPT2
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#define GPTx_IRQn GPT2_IRQn
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#define GPTx_IRQHandler GPT2_IRQHandler
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static uint32_t ticks_us64_upper;
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static uint32_t ticks_ms_upper;
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void ticks_init(void) {
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ticks_us64_upper = 0;
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ticks_ms_upper = 0;
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gpt_config_t config;
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2021-10-20 20:24:20 +01:00
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#if defined MIMXRT117x_SERIES
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config.clockSource = kGPT_ClockSource_HighFreq;
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#else
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2021-05-16 04:27:54 +01:00
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config.clockSource = kGPT_ClockSource_Osc;
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2021-10-20 20:24:20 +01:00
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#endif
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2021-05-16 04:27:54 +01:00
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config.divider = 24; // XTAL is 24MHz
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config.enableFreeRun = true;
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config.enableRunInWait = true;
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config.enableRunInStop = true;
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config.enableRunInDoze = true;
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config.enableRunInDbg = false;
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config.enableMode = true;
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GPT_Init(GPTx, &config);
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GPT_EnableInterrupts(GPTx, kGPT_RollOverFlagInterruptEnable);
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NVIC_SetPriority(GPTx_IRQn, 0); // highest priority
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NVIC_EnableIRQ(GPTx_IRQn);
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GPT_StartTimer(GPTx);
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2021-12-07 10:38:37 +00:00
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#ifdef NDEBUG
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2021-10-12 21:49:18 +01:00
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mp_hal_ticks_cpu_enable();
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2021-12-07 10:38:37 +00:00
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#endif
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2021-05-16 04:27:54 +01:00
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}
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void GPTx_IRQHandler(void) {
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if (GPT_GetStatusFlags(GPTx, kGPT_OutputCompare1Flag)) {
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GPT_ClearStatusFlags(GPTx, kGPT_OutputCompare1Flag);
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GPT_DisableInterrupts(GPTx, kGPT_OutputCompare1InterruptEnable);
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__SEV();
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}
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if (GPT_GetStatusFlags(GPTx, kGPT_RollOverFlag)) {
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GPT_ClearStatusFlags(GPTx, kGPT_RollOverFlag);
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++ticks_us64_upper;
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if (++ticks_ms_upper >= 1000) {
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// Wrap upper counter at a multiple of 1000 so that when mp_hal_ticks_ms()
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// wraps due to overflow it wraps smoothly.
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ticks_ms_upper = 0;
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}
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}
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}
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static void ticks_wake_after_us32(uint32_t us) {
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if (us < 2) {
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// Delay too short to guarantee that we won't miss it when setting the OCR below.
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__SEV();
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} else {
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// Disable IRQs so setting the OCR is done without any interruption.
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uint32_t irq_state = DisableGlobalIRQ();
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GPT_EnableInterrupts(GPTx, kGPT_OutputCompare1InterruptEnable);
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uint32_t oc = GPT_GetCurrentTimerCount(GPTx) + us;
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GPT_SetOutputCompareValue(GPTx, kGPT_OutputCompare_Channel1, oc);
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EnableGlobalIRQ(irq_state);
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}
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}
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static uint64_t ticks_us64_with(uint32_t *upper_ptr) {
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uint32_t irq_state = DisableGlobalIRQ();
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uint32_t lower = GPT_GetCurrentTimerCount(GPTx);
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uint32_t upper = *upper_ptr;
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uint32_t overflow = GPT_GetStatusFlags(GPTx, kGPT_RollOverFlag);
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EnableGlobalIRQ(irq_state);
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if (overflow && lower < 0x80000000) {
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// The timer counter overflowed before reading it but the IRQ handler
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// has not yet been called, so perform the IRQ arithmetic now.
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++upper;
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}
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return (uint64_t)upper << 32 | (uint64_t)lower;
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}
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uint32_t ticks_us32(void) {
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return GPT_GetCurrentTimerCount(GPTx);
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}
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uint64_t ticks_us64(void) {
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return ticks_us64_with(&ticks_us64_upper);
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}
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uint32_t ticks_ms32(void) {
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// This will return a value that only has the lower 32-bits valid.
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return ticks_us64_with(&ticks_ms_upper) / 1000;
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}
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void ticks_delay_us64(uint64_t us) {
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uint64_t t0 = ticks_us64();
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for (;;) {
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uint64_t dt = ticks_us64() - t0;
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if (dt >= us) {
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return;
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}
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dt = us - dt;
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if (dt > 0xffffffff) {
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dt = 0xffffffff;
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}
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ticks_wake_after_us32((uint32_t)dt);
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mimxrt: Support PWM using the FLEXPWM and QTMR modules.
Frequency range 15Hz/18Hz to > 1 MHz, with decreasing resolution of the
duty cycle. The basic API is supported as documentated, except that
keyword parameters are accepted for both the instatiaton and the
PWM.init() call.
Extensions: support PWM for channel pairs. Channel pairs are declared by
supplying 2-element tuples for the pins. The two channels of a pair must
be the A/B channel of a FLEXPWM module. These form than a complementary
pair.
Additional supported keyword arguments:
- center=value Defines the center position of a pulse within the pulse
cycle. The align keyword is actually shortcut for center.
- sync=True|False: If set to True, the channels will be synchronized to a
submodule 0 channel, which has already to be enabled.
- align=PWM.MIDDLE | PMW.BEGIN | PWM.END. It defines, whether synchronized
channels are Center-Aligned or Edge-aligned. The channels must be either
complementary a channel pair or a group of synchronized channels. It may
as well be applied to a single channel, but withiout any benefit.
- invert= 0..3. Controls ouput inversion of the pins. Bit 0 controls the
first pin, bit 1 the second.
- deadtime=time_ns time of complementary channels for delaying the rising
slope.
- xor=0|1|2 xor causes the output of channel A and B to be xored. If
applied to a X channel, it shows the value oif A ^ B. If applied to an A
or B channel, both channel show the xored signal for xor=1. For xor=2,
the xored signal is split between channels A and B. See also the
Reference Manual, chapter about double pulses. The behavior of xor=2 can
also be achieved using the center method for locating a pulse within a
clock period.
The output is enabled for board pins only.
CPU pins may still be used for FLEXPWM, e.g. as sync source, but the signal
will not be routed to the output. That applies only to FLEXPWM pins. The
use of QTMR pins which are not board pins will be rejected.
As part of this commit, the _WFE() statement is removed from
ticks_delay_us64() to prevent PWM glitching during calls to sleep().
2021-07-26 11:48:25 +01:00
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if (dt > 50) {
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2021-05-16 04:27:54 +01:00
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MICROPY_EVENT_POLL_HOOK
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}
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}
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}
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