2021-01-20 13:34:08 +00:00
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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2020-2021 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "py/runtime.h"
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#include "py/mphal.h"
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2022-10-27 15:54:44 +01:00
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#include "drivers/dht/dht.h"
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2021-07-09 05:19:15 +01:00
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#include "shared/runtime/pyexec.h"
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2021-09-15 17:16:05 +01:00
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#include "extmod/machine_bitstream.h"
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2021-01-20 13:34:08 +00:00
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#include "extmod/machine_i2c.h"
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#include "extmod/machine_mem.h"
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2021-02-02 01:55:11 +00:00
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#include "extmod/machine_pulse.h"
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2021-06-24 03:37:50 +01:00
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#include "extmod/machine_pwm.h"
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2021-03-13 13:18:18 +00:00
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#include "extmod/machine_signal.h"
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2021-01-20 13:34:08 +00:00
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#include "extmod/machine_spi.h"
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#include "modmachine.h"
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2021-03-04 19:57:16 +00:00
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#include "uart.h"
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2021-01-20 13:34:08 +00:00
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#include "hardware/clocks.h"
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2022-06-28 15:22:49 +01:00
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#include "hardware/pll.h"
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#include "hardware/structs/rosc.h"
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#include "hardware/structs/scb.h"
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#include "hardware/structs/syscfg.h"
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2021-01-20 13:34:08 +00:00
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#include "hardware/watchdog.h"
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2022-06-28 15:22:49 +01:00
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#include "hardware/xosc.h"
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2021-01-20 13:34:08 +00:00
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#include "pico/bootrom.h"
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2021-02-20 10:11:24 +00:00
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#include "pico/stdlib.h"
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2021-02-02 01:55:11 +00:00
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#include "pico/unique_id.h"
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rp2: Fix lightsleep to work with interrupts and cyw43 driver.
This commit prevents the device from "hanging" when using lightsleep while
the WiFi chip is active.
Whenever the WiFi chip wants to interrupt the microcontroller to notify it
for a new package, it sets the CYW43_PIN_WL_HOST_WAKE pin to high,
triggering an IRQ. However, as polling the chip cannot happen in an
interrupt handler, it subsequently notifies the pendsv-service to do a poll
as soon as the interrupt handler ended. In order to prevent a new
interrupt from happening immediately afterwards, even before the poll has
run, the IRQ handler disables interrupts from the pin.
The first problem occurs, when a WiFi package arrives while the main loop
is in cyw43-code. In order to prevent concurrent access of the hardware,
the network code blocks pendsv from running again while entering lwIP code.
The same holds for direct cyw43 code (like changing the cyw43-gpios, i.e.
the LED on the Pico W). While the pendsv is disabled, interrupts can still
occur to schedule a poll (and disable further interrupts), but it will not
run. This can happen while the microcontroller is anywhere in rp2040 code.
In order to preserve power while waiting for cyw43 responses,
cyw43_configport.h defines CYW43_DO_IOCTL_WAIT and
CYW43_SDPCM_SEND_COMMON_WAIT to __WFI(). While this might work in most
cases, there are 2 edge cases where it fails:
- When an interrupt has already been received by the cyw43 stack, for
example due to an incoming ethernet packet.
- When the interrupt from the cyw43 response comes before the
microcontroller entered the __WFI() instruction.
When that happens, wfi will just block forever as no further interrupts are
received. The only way to safely use wfi to wake up from an interrupt is
inside a critical section, as this delays interrupts until the wfi is
entered, possibly resuming immediately until interrupts are reenabled and
the interrupt handler is run. Additionally this critical section needs to
check whether the interrupt has already been disabled and pendsv was
triggered, as in such a case, wfi can never be woken up, and needs to be
skipped, because there is already a package from the network chip waiting.
Note that this turns cyw43_yield into a nop (and thereby the cyw43-loops
into busy waits) from the second time onwards, as after the first call, a
pendsv request will definitely be pending. More logic could be added, to
explicitly enable the interrupt in this case.
Regarding lightsleep, this code has a similar problem. When an interrupt
occurs during lightsleep, the IRQ and pendsv handler and thereby poll are
run immediately, with the clocks still disabled, causing the SPI transfers
to fail. If we don't want to add complex logic inside the IRQ handler we
need to protect the whole lightsleep procedure form interrupts with a
critical section, exiting out early if an interrupt is pending for whatever
reason. Only then we can start to shut down clocks and only enable
interrupts when the system is ready again. Other interrupt handlers might
also be happy, that they are only run when the system is fully operational.
Tested on a Pico W, calling machine.lightsleep() within an endless loop and
pinging from the outside.
2022-09-27 10:37:34 +01:00
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#if MICROPY_PY_NETWORK_CYW43
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#include "lib/cyw43-driver/src/cyw43.h"
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#endif
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2021-01-20 13:34:08 +00:00
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2022-05-31 13:56:11 +01:00
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#if MICROPY_PY_MACHINE
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2021-01-20 13:34:08 +00:00
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#define RP2_RESET_PWRON (1)
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#define RP2_RESET_WDT (3)
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2021-02-02 01:55:11 +00:00
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STATIC mp_obj_t machine_unique_id(void) {
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pico_unique_board_id_t id;
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pico_get_unique_board_id(&id);
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return mp_obj_new_bytes(id.id, sizeof(id.id));
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}
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MP_DEFINE_CONST_FUN_OBJ_0(machine_unique_id_obj, machine_unique_id);
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STATIC mp_obj_t machine_soft_reset(void) {
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pyexec_system_exit = PYEXEC_FORCED_EXIT;
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mp_raise_type(&mp_type_SystemExit);
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_soft_reset_obj, machine_soft_reset);
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2021-01-20 13:34:08 +00:00
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STATIC mp_obj_t machine_reset(void) {
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watchdog_reboot(0, SRAM_END, 0);
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for (;;) {
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__wfi();
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}
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return mp_const_none;
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}
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MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset);
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STATIC mp_obj_t machine_reset_cause(void) {
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int reset_cause;
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if (watchdog_caused_reboot()) {
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reset_cause = RP2_RESET_WDT;
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} else {
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reset_cause = RP2_RESET_PWRON;
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}
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return MP_OBJ_NEW_SMALL_INT(reset_cause);
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_cause_obj, machine_reset_cause);
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2022-04-27 10:11:24 +01:00
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NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args) {
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MICROPY_BOARD_ENTER_BOOTLOADER(n_args, args);
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2022-06-28 15:22:49 +01:00
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rosc_hw->ctrl = ROSC_CTRL_ENABLE_VALUE_ENABLE << ROSC_CTRL_ENABLE_LSB;
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2021-01-20 13:34:08 +00:00
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reset_usb_boot(0, 0);
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2022-04-27 10:11:24 +01:00
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for (;;) {
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}
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2021-01-20 13:34:08 +00:00
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}
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2022-04-27 10:11:24 +01:00
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STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_bootloader_obj, 0, 1, machine_bootloader);
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2021-01-20 13:34:08 +00:00
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2021-02-20 10:11:24 +00:00
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STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) {
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if (n_args == 0) {
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2021-09-15 17:16:05 +01:00
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return MP_OBJ_NEW_SMALL_INT(mp_hal_get_cpu_freq());
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2021-02-20 10:11:24 +00:00
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} else {
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mp_int_t freq = mp_obj_get_int(args[0]);
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if (!set_sys_clock_khz(freq / 1000, false)) {
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mp_raise_ValueError(MP_ERROR_TEXT("cannot change frequency"));
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}
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2021-03-04 19:57:16 +00:00
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#if MICROPY_HW_ENABLE_UART_REPL
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setup_default_uart();
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mp_uart_init();
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#endif
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2021-02-20 10:11:24 +00:00
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return mp_const_none;
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}
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2021-01-20 13:34:08 +00:00
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}
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2021-02-20 10:11:24 +00:00
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STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_freq_obj, 0, 1, machine_freq);
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2021-01-20 13:34:08 +00:00
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2021-02-02 01:55:11 +00:00
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STATIC mp_obj_t machine_idle(void) {
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best_effort_wfe_or_timeout(make_timeout_time_ms(1));
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return mp_const_none;
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_idle_obj, machine_idle);
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STATIC mp_obj_t machine_lightsleep(size_t n_args, const mp_obj_t *args) {
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2022-06-28 15:22:49 +01:00
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mp_int_t delay_ms = 0;
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bool use_timer_alarm = false;
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if (n_args == 1) {
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delay_ms = mp_obj_get_int(args[0]);
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if (delay_ms <= 1) {
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// Sleep is too small, just use standard delay.
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mp_hal_delay_ms(delay_ms);
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return mp_const_none;
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}
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use_timer_alarm = delay_ms < (1ULL << 32) / 1000;
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if (use_timer_alarm) {
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// Use timer alarm to wake.
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} else {
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// TODO: Use RTC alarm to wake.
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mp_raise_ValueError(MP_ERROR_TEXT("sleep too long"));
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2021-02-02 01:55:11 +00:00
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}
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2022-06-28 15:22:49 +01:00
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}
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const uint32_t xosc_hz = XOSC_MHZ * 1000000;
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rp2: Fix lightsleep to work with interrupts and cyw43 driver.
This commit prevents the device from "hanging" when using lightsleep while
the WiFi chip is active.
Whenever the WiFi chip wants to interrupt the microcontroller to notify it
for a new package, it sets the CYW43_PIN_WL_HOST_WAKE pin to high,
triggering an IRQ. However, as polling the chip cannot happen in an
interrupt handler, it subsequently notifies the pendsv-service to do a poll
as soon as the interrupt handler ended. In order to prevent a new
interrupt from happening immediately afterwards, even before the poll has
run, the IRQ handler disables interrupts from the pin.
The first problem occurs, when a WiFi package arrives while the main loop
is in cyw43-code. In order to prevent concurrent access of the hardware,
the network code blocks pendsv from running again while entering lwIP code.
The same holds for direct cyw43 code (like changing the cyw43-gpios, i.e.
the LED on the Pico W). While the pendsv is disabled, interrupts can still
occur to schedule a poll (and disable further interrupts), but it will not
run. This can happen while the microcontroller is anywhere in rp2040 code.
In order to preserve power while waiting for cyw43 responses,
cyw43_configport.h defines CYW43_DO_IOCTL_WAIT and
CYW43_SDPCM_SEND_COMMON_WAIT to __WFI(). While this might work in most
cases, there are 2 edge cases where it fails:
- When an interrupt has already been received by the cyw43 stack, for
example due to an incoming ethernet packet.
- When the interrupt from the cyw43 response comes before the
microcontroller entered the __WFI() instruction.
When that happens, wfi will just block forever as no further interrupts are
received. The only way to safely use wfi to wake up from an interrupt is
inside a critical section, as this delays interrupts until the wfi is
entered, possibly resuming immediately until interrupts are reenabled and
the interrupt handler is run. Additionally this critical section needs to
check whether the interrupt has already been disabled and pendsv was
triggered, as in such a case, wfi can never be woken up, and needs to be
skipped, because there is already a package from the network chip waiting.
Note that this turns cyw43_yield into a nop (and thereby the cyw43-loops
into busy waits) from the second time onwards, as after the first call, a
pendsv request will definitely be pending. More logic could be added, to
explicitly enable the interrupt in this case.
Regarding lightsleep, this code has a similar problem. When an interrupt
occurs during lightsleep, the IRQ and pendsv handler and thereby poll are
run immediately, with the clocks still disabled, causing the SPI transfers
to fail. If we don't want to add complex logic inside the IRQ handler we
need to protect the whole lightsleep procedure form interrupts with a
critical section, exiting out early if an interrupt is pending for whatever
reason. Only then we can start to shut down clocks and only enable
interrupts when the system is ready again. Other interrupt handlers might
also be happy, that they are only run when the system is fully operational.
Tested on a Pico W, calling machine.lightsleep() within an endless loop and
pinging from the outside.
2022-09-27 10:37:34 +01:00
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uint32_t my_interrupts = save_and_disable_interrupts();
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#if MICROPY_PY_NETWORK_CYW43
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if (cyw43_has_pending) {
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restore_interrupts(my_interrupts);
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return mp_const_none;
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}
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#endif
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2022-06-28 15:22:49 +01:00
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// Disable USB and ADC clocks.
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clock_stop(clk_usb);
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clock_stop(clk_adc);
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// CLK_REF = XOSC
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clock_configure(clk_ref, CLOCKS_CLK_REF_CTRL_SRC_VALUE_XOSC_CLKSRC, 0, xosc_hz, xosc_hz);
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// CLK_SYS = CLK_REF
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clock_configure(clk_sys, CLOCKS_CLK_SYS_CTRL_SRC_VALUE_CLK_REF, 0, xosc_hz, xosc_hz);
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// CLK_RTC = XOSC / 256
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clock_configure(clk_rtc, 0, CLOCKS_CLK_RTC_CTRL_AUXSRC_VALUE_XOSC_CLKSRC, xosc_hz, xosc_hz / 256);
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// CLK_PERI = CLK_SYS
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clock_configure(clk_peri, 0, CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_CLK_SYS, xosc_hz, xosc_hz);
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// Disable PLLs.
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pll_deinit(pll_sys);
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pll_deinit(pll_usb);
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// Disable ROSC.
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rosc_hw->ctrl = ROSC_CTRL_ENABLE_VALUE_DISABLE << ROSC_CTRL_ENABLE_LSB;
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if (n_args == 0) {
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rp2: Fix lightsleep to work with interrupts and cyw43 driver.
This commit prevents the device from "hanging" when using lightsleep while
the WiFi chip is active.
Whenever the WiFi chip wants to interrupt the microcontroller to notify it
for a new package, it sets the CYW43_PIN_WL_HOST_WAKE pin to high,
triggering an IRQ. However, as polling the chip cannot happen in an
interrupt handler, it subsequently notifies the pendsv-service to do a poll
as soon as the interrupt handler ended. In order to prevent a new
interrupt from happening immediately afterwards, even before the poll has
run, the IRQ handler disables interrupts from the pin.
The first problem occurs, when a WiFi package arrives while the main loop
is in cyw43-code. In order to prevent concurrent access of the hardware,
the network code blocks pendsv from running again while entering lwIP code.
The same holds for direct cyw43 code (like changing the cyw43-gpios, i.e.
the LED on the Pico W). While the pendsv is disabled, interrupts can still
occur to schedule a poll (and disable further interrupts), but it will not
run. This can happen while the microcontroller is anywhere in rp2040 code.
In order to preserve power while waiting for cyw43 responses,
cyw43_configport.h defines CYW43_DO_IOCTL_WAIT and
CYW43_SDPCM_SEND_COMMON_WAIT to __WFI(). While this might work in most
cases, there are 2 edge cases where it fails:
- When an interrupt has already been received by the cyw43 stack, for
example due to an incoming ethernet packet.
- When the interrupt from the cyw43 response comes before the
microcontroller entered the __WFI() instruction.
When that happens, wfi will just block forever as no further interrupts are
received. The only way to safely use wfi to wake up from an interrupt is
inside a critical section, as this delays interrupts until the wfi is
entered, possibly resuming immediately until interrupts are reenabled and
the interrupt handler is run. Additionally this critical section needs to
check whether the interrupt has already been disabled and pendsv was
triggered, as in such a case, wfi can never be woken up, and needs to be
skipped, because there is already a package from the network chip waiting.
Note that this turns cyw43_yield into a nop (and thereby the cyw43-loops
into busy waits) from the second time onwards, as after the first call, a
pendsv request will definitely be pending. More logic could be added, to
explicitly enable the interrupt in this case.
Regarding lightsleep, this code has a similar problem. When an interrupt
occurs during lightsleep, the IRQ and pendsv handler and thereby poll are
run immediately, with the clocks still disabled, causing the SPI transfers
to fail. If we don't want to add complex logic inside the IRQ handler we
need to protect the whole lightsleep procedure form interrupts with a
critical section, exiting out early if an interrupt is pending for whatever
reason. Only then we can start to shut down clocks and only enable
interrupts when the system is ready again. Other interrupt handlers might
also be happy, that they are only run when the system is fully operational.
Tested on a Pico W, calling machine.lightsleep() within an endless loop and
pinging from the outside.
2022-09-27 10:37:34 +01:00
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#if MICROPY_PY_NETWORK_CYW43
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gpio_set_dormant_irq_enabled(CYW43_PIN_WL_HOST_WAKE, GPIO_IRQ_LEVEL_HIGH, true);
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#endif
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2022-06-28 15:22:49 +01:00
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xosc_dormant();
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2021-02-02 01:55:11 +00:00
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} else {
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2022-06-28 15:22:49 +01:00
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uint32_t sleep_en0 = clocks_hw->sleep_en0;
|
|
|
|
|
uint32_t sleep_en1 = clocks_hw->sleep_en1;
|
|
|
|
|
clocks_hw->sleep_en0 = CLOCKS_SLEEP_EN0_CLK_RTC_RTC_BITS;
|
|
|
|
|
if (use_timer_alarm) {
|
|
|
|
|
// Use timer alarm to wake.
|
|
|
|
|
clocks_hw->sleep_en1 = CLOCKS_SLEEP_EN1_CLK_SYS_TIMER_BITS;
|
|
|
|
|
timer_hw->alarm[3] = timer_hw->timerawl + delay_ms * 1000;
|
|
|
|
|
} else {
|
|
|
|
|
// TODO: Use RTC alarm to wake.
|
|
|
|
|
clocks_hw->sleep_en1 = 0;
|
|
|
|
|
}
|
|
|
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|
scb_hw->scr |= M0PLUS_SCR_SLEEPDEEP_BITS;
|
|
|
|
|
__wfi();
|
|
|
|
|
scb_hw->scr &= ~M0PLUS_SCR_SLEEPDEEP_BITS;
|
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|
|
|
clocks_hw->sleep_en0 = sleep_en0;
|
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|
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|
clocks_hw->sleep_en1 = sleep_en1;
|
2021-02-02 01:55:11 +00:00
|
|
|
}
|
2022-06-28 15:22:49 +01:00
|
|
|
|
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|
|
|
// Enable ROSC.
|
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|
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rosc_hw->ctrl = ROSC_CTRL_ENABLE_VALUE_ENABLE << ROSC_CTRL_ENABLE_LSB;
|
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|
|
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|
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|
|
|
// Bring back all clocks.
|
|
|
|
|
clocks_init();
|
rp2: Fix lightsleep to work with interrupts and cyw43 driver.
This commit prevents the device from "hanging" when using lightsleep while
the WiFi chip is active.
Whenever the WiFi chip wants to interrupt the microcontroller to notify it
for a new package, it sets the CYW43_PIN_WL_HOST_WAKE pin to high,
triggering an IRQ. However, as polling the chip cannot happen in an
interrupt handler, it subsequently notifies the pendsv-service to do a poll
as soon as the interrupt handler ended. In order to prevent a new
interrupt from happening immediately afterwards, even before the poll has
run, the IRQ handler disables interrupts from the pin.
The first problem occurs, when a WiFi package arrives while the main loop
is in cyw43-code. In order to prevent concurrent access of the hardware,
the network code blocks pendsv from running again while entering lwIP code.
The same holds for direct cyw43 code (like changing the cyw43-gpios, i.e.
the LED on the Pico W). While the pendsv is disabled, interrupts can still
occur to schedule a poll (and disable further interrupts), but it will not
run. This can happen while the microcontroller is anywhere in rp2040 code.
In order to preserve power while waiting for cyw43 responses,
cyw43_configport.h defines CYW43_DO_IOCTL_WAIT and
CYW43_SDPCM_SEND_COMMON_WAIT to __WFI(). While this might work in most
cases, there are 2 edge cases where it fails:
- When an interrupt has already been received by the cyw43 stack, for
example due to an incoming ethernet packet.
- When the interrupt from the cyw43 response comes before the
microcontroller entered the __WFI() instruction.
When that happens, wfi will just block forever as no further interrupts are
received. The only way to safely use wfi to wake up from an interrupt is
inside a critical section, as this delays interrupts until the wfi is
entered, possibly resuming immediately until interrupts are reenabled and
the interrupt handler is run. Additionally this critical section needs to
check whether the interrupt has already been disabled and pendsv was
triggered, as in such a case, wfi can never be woken up, and needs to be
skipped, because there is already a package from the network chip waiting.
Note that this turns cyw43_yield into a nop (and thereby the cyw43-loops
into busy waits) from the second time onwards, as after the first call, a
pendsv request will definitely be pending. More logic could be added, to
explicitly enable the interrupt in this case.
Regarding lightsleep, this code has a similar problem. When an interrupt
occurs during lightsleep, the IRQ and pendsv handler and thereby poll are
run immediately, with the clocks still disabled, causing the SPI transfers
to fail. If we don't want to add complex logic inside the IRQ handler we
need to protect the whole lightsleep procedure form interrupts with a
critical section, exiting out early if an interrupt is pending for whatever
reason. Only then we can start to shut down clocks and only enable
interrupts when the system is ready again. Other interrupt handlers might
also be happy, that they are only run when the system is fully operational.
Tested on a Pico W, calling machine.lightsleep() within an endless loop and
pinging from the outside.
2022-09-27 10:37:34 +01:00
|
|
|
restore_interrupts(my_interrupts);
|
2022-06-28 15:22:49 +01:00
|
|
|
|
2021-02-02 01:55:11 +00:00
|
|
|
return mp_const_none;
|
|
|
|
|
}
|
|
|
|
|
MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_lightsleep_obj, 0, 1, machine_lightsleep);
|
|
|
|
|
|
|
|
|
|
STATIC mp_obj_t machine_deepsleep(size_t n_args, const mp_obj_t *args) {
|
|
|
|
|
machine_lightsleep(n_args, args);
|
|
|
|
|
return machine_reset();
|
|
|
|
|
}
|
|
|
|
|
MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_deepsleep_obj, 0, 1, machine_deepsleep);
|
|
|
|
|
|
|
|
|
|
STATIC mp_obj_t machine_disable_irq(void) {
|
|
|
|
|
uint32_t state = MICROPY_BEGIN_ATOMIC_SECTION();
|
|
|
|
|
return mp_obj_new_int(state);
|
|
|
|
|
}
|
|
|
|
|
MP_DEFINE_CONST_FUN_OBJ_0(machine_disable_irq_obj, machine_disable_irq);
|
|
|
|
|
|
|
|
|
|
STATIC mp_obj_t machine_enable_irq(mp_obj_t state_in) {
|
|
|
|
|
uint32_t state = mp_obj_get_int(state_in);
|
|
|
|
|
MICROPY_END_ATOMIC_SECTION(state);
|
|
|
|
|
return mp_const_none;
|
|
|
|
|
}
|
|
|
|
|
MP_DEFINE_CONST_FUN_OBJ_1(machine_enable_irq_obj, machine_enable_irq);
|
|
|
|
|
|
2021-01-20 13:34:08 +00:00
|
|
|
STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
|
2022-08-17 07:18:31 +01:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_machine) },
|
2021-02-02 01:55:11 +00:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_unique_id), MP_ROM_PTR(&machine_unique_id_obj) },
|
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_soft_reset), MP_ROM_PTR(&machine_soft_reset_obj) },
|
2021-01-20 13:34:08 +00:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_reset), MP_ROM_PTR(&machine_reset_obj) },
|
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_reset_cause), MP_ROM_PTR(&machine_reset_cause_obj) },
|
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_bootloader), MP_ROM_PTR(&machine_bootloader_obj) },
|
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&machine_freq_obj) },
|
2021-02-02 01:55:11 +00:00
|
|
|
|
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_idle), MP_ROM_PTR(&machine_idle_obj) },
|
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_lightsleep), MP_ROM_PTR(&machine_lightsleep_obj) },
|
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_deepsleep), MP_ROM_PTR(&machine_deepsleep_obj) },
|
|
|
|
|
|
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&machine_disable_irq_obj) },
|
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&machine_enable_irq_obj) },
|
|
|
|
|
|
2021-09-15 17:16:05 +01:00
|
|
|
#if MICROPY_PY_MACHINE_BITSTREAM
|
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_bitstream), MP_ROM_PTR(&machine_bitstream_obj) },
|
|
|
|
|
#endif
|
2021-02-02 01:55:11 +00:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_time_pulse_us), MP_ROM_PTR(&machine_time_pulse_us_obj) },
|
2022-10-27 15:54:44 +01:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_dht_readinto), MP_ROM_PTR(&dht_readinto_obj) },
|
2021-02-02 01:55:11 +00:00
|
|
|
|
2021-01-20 13:34:08 +00:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_mem8), MP_ROM_PTR(&machine_mem8_obj) },
|
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_mem16), MP_ROM_PTR(&machine_mem16_obj) },
|
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_mem32), MP_ROM_PTR(&machine_mem32_obj) },
|
|
|
|
|
|
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_ADC), MP_ROM_PTR(&machine_adc_type) },
|
2022-10-06 19:21:51 +01:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&machine_i2c_type) },
|
2021-01-20 13:34:08 +00:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_SoftI2C), MP_ROM_PTR(&mp_machine_soft_i2c_type) },
|
2021-09-04 04:34:53 +01:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_I2S), MP_ROM_PTR(&machine_i2s_type) },
|
2021-01-20 13:34:08 +00:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&machine_pin_type) },
|
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_PWM), MP_ROM_PTR(&machine_pwm_type) },
|
2021-02-18 18:45:23 +00:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_RTC), MP_ROM_PTR(&machine_rtc_type) },
|
2021-03-13 13:18:18 +00:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_Signal), MP_ROM_PTR(&machine_signal_type) },
|
2021-01-20 13:34:08 +00:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&machine_spi_type) },
|
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_SoftSPI), MP_ROM_PTR(&mp_machine_soft_spi_type) },
|
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_Timer), MP_ROM_PTR(&machine_timer_type) },
|
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&machine_uart_type) },
|
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_WDT), MP_ROM_PTR(&machine_wdt_type) },
|
|
|
|
|
|
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_PWRON_RESET), MP_ROM_INT(RP2_RESET_PWRON) },
|
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_WDT_RESET), MP_ROM_INT(RP2_RESET_WDT) },
|
|
|
|
|
};
|
|
|
|
|
STATIC MP_DEFINE_CONST_DICT(machine_module_globals, machine_module_globals_table);
|
|
|
|
|
|
|
|
|
|
const mp_obj_module_t mp_module_machine = {
|
|
|
|
|
.base = { &mp_type_module },
|
|
|
|
|
.globals = (mp_obj_dict_t *)&machine_module_globals,
|
|
|
|
|
};
|
2022-04-20 07:06:22 +01:00
|
|
|
|
2022-08-17 07:18:31 +01:00
|
|
|
MP_REGISTER_MODULE(MP_QSTR_machine, mp_module_machine);
|
2022-05-31 13:56:11 +01:00
|
|
|
|
|
|
|
|
#endif // MICROPY_PY_MACHINE
|
