2013-10-18 23:44:05 +01:00
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#include <stdint.h>
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#include "std.h"
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#include "misc.h"
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2013-12-11 00:38:40 +00:00
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#include "systick.h"
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2013-12-21 18:17:45 +00:00
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#include "mpconfig.h"
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2014-01-21 21:40:13 +00:00
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#include "qstr.h"
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2013-12-21 18:17:45 +00:00
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#include "obj.h"
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2013-10-18 23:44:05 +01:00
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#include "led.h"
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#include "flash.h"
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#include "storage.h"
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#define CACHE_MEM_START_ADDR (0x10000000) // CCM data RAM, 64k
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#define FLASH_PART1_START_BLOCK (0x100)
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#define FLASH_PART1_NUM_BLOCKS (224) // 16k+16k+16k+64k=112k
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#define FLASH_MEM_START_ADDR (0x08004000) // sector 1, 16k
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2014-02-08 16:00:15 +00:00
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static bool flash_is_initialised = false;
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static bool flash_cache_dirty;
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static uint32_t flash_cache_sector_id;
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static uint32_t flash_cache_sector_start;
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static uint32_t flash_cache_sector_size;
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static uint32_t flash_sys_tick_counter_last_write;
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2013-10-18 23:44:05 +01:00
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2014-02-08 16:00:15 +00:00
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static void flash_cache_flush(void) {
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if (flash_cache_dirty) {
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2013-10-18 23:44:05 +01:00
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// sync the cache RAM buffer by writing it to the flash page
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2014-02-08 16:00:15 +00:00
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flash_write(flash_cache_sector_start, (const uint32_t*)CACHE_MEM_START_ADDR, flash_cache_sector_size / 4);
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flash_cache_dirty = false;
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2013-10-18 23:44:05 +01:00
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// indicate a clean cache with LED off
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led_state(PYB_LED_R1, 0);
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}
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}
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2014-02-08 16:00:15 +00:00
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static uint8_t *flash_cache_get_addr_for_write(uint32_t flash_addr) {
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2013-10-18 23:44:05 +01:00
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uint32_t flash_sector_start;
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uint32_t flash_sector_size;
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uint32_t flash_sector_id = flash_get_sector_info(flash_addr, &flash_sector_start, &flash_sector_size);
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2014-02-08 16:00:15 +00:00
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if (flash_cache_sector_id != flash_sector_id) {
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flash_cache_flush();
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2013-10-18 23:44:05 +01:00
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memcpy((void*)CACHE_MEM_START_ADDR, (const void*)flash_sector_start, flash_sector_size);
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2014-02-08 16:00:15 +00:00
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flash_cache_sector_id = flash_sector_id;
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flash_cache_sector_start = flash_sector_start;
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flash_cache_sector_size = flash_sector_size;
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2013-10-18 23:44:05 +01:00
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}
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2014-02-08 16:00:15 +00:00
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flash_cache_dirty = true;
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2013-10-18 23:44:05 +01:00
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// indicate a dirty cache with LED on
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led_state(PYB_LED_R1, 1);
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return (uint8_t*)CACHE_MEM_START_ADDR + flash_addr - flash_sector_start;
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}
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2014-02-08 16:00:15 +00:00
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static uint8_t *flash_cache_get_addr_for_read(uint32_t flash_addr) {
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2014-01-04 02:02:32 +00:00
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uint32_t flash_sector_start;
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uint32_t flash_sector_size;
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uint32_t flash_sector_id = flash_get_sector_info(flash_addr, &flash_sector_start, &flash_sector_size);
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2014-02-08 16:00:15 +00:00
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if (flash_cache_sector_id == flash_sector_id) {
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2014-01-04 12:34:36 +00:00
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// in cache, copy from there
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2014-01-04 02:02:32 +00:00
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return (uint8_t*)CACHE_MEM_START_ADDR + flash_addr - flash_sector_start;
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2014-01-04 12:34:36 +00:00
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}
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2014-01-04 02:02:32 +00:00
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// not in cache, copy straight from flash
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return (uint8_t*)flash_addr;
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}
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2013-10-23 20:39:20 +01:00
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void storage_init(void) {
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2014-02-08 16:00:15 +00:00
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if (!flash_is_initialised) {
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flash_cache_dirty = false;
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flash_cache_sector_id = 0;
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flash_is_initialised = true;
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flash_sys_tick_counter_last_write = 0;
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2013-10-19 14:40:54 +01:00
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}
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2013-10-18 23:44:05 +01:00
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}
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2013-10-23 20:39:20 +01:00
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uint32_t storage_get_block_size(void) {
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2014-02-08 16:00:15 +00:00
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return FLASH_BLOCK_SIZE;
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2013-10-19 18:13:48 +01:00
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}
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2013-10-23 20:39:20 +01:00
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uint32_t storage_get_block_count(void) {
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2013-10-19 18:13:48 +01:00
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return FLASH_PART1_START_BLOCK + FLASH_PART1_NUM_BLOCKS;
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}
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2013-12-11 00:38:40 +00:00
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bool storage_needs_flush(void) {
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// wait 2 seconds after last write to flush
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2014-02-08 16:00:15 +00:00
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return flash_cache_dirty && sys_tick_has_passed(flash_sys_tick_counter_last_write, 2000);
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2013-12-11 00:38:40 +00:00
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}
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2013-10-23 20:39:20 +01:00
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void storage_flush(void) {
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2014-02-08 16:00:15 +00:00
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flash_cache_flush();
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2013-10-18 23:44:05 +01:00
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}
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static void build_partition(uint8_t *buf, int boot, int type, uint32_t start_block, uint32_t num_blocks) {
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buf[0] = boot;
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if (num_blocks == 0) {
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buf[1] = 0;
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buf[2] = 0;
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buf[3] = 0;
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} else {
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buf[1] = 0xff;
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buf[2] = 0xff;
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buf[3] = 0xff;
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}
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buf[4] = type;
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if (num_blocks == 0) {
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buf[5] = 0;
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buf[6] = 0;
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buf[7] = 0;
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} else {
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buf[5] = 0xff;
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buf[6] = 0xff;
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buf[7] = 0xff;
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}
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buf[8] = start_block;
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buf[9] = start_block >> 8;
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buf[10] = start_block >> 16;
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buf[11] = start_block >> 24;
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buf[12] = num_blocks;
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buf[13] = num_blocks >> 8;
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buf[14] = num_blocks >> 16;
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buf[15] = num_blocks >> 24;
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}
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bool storage_read_block(uint8_t *dest, uint32_t block) {
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//printf("RD %u\n", block);
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if (block == 0) {
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// fake the MBR so we can decide on our own partition table
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for (int i = 0; i < 446; i++) {
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dest[i] = 0;
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}
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build_partition(dest + 446, 0, 0x01 /* FAT12 */, FLASH_PART1_START_BLOCK, FLASH_PART1_NUM_BLOCKS);
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build_partition(dest + 462, 0, 0, 0, 0);
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build_partition(dest + 478, 0, 0, 0, 0);
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build_partition(dest + 494, 0, 0, 0, 0);
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dest[510] = 0x55;
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dest[511] = 0xaa;
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return true;
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} else if (FLASH_PART1_START_BLOCK <= block && block < FLASH_PART1_START_BLOCK + FLASH_PART1_NUM_BLOCKS) {
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2014-01-04 12:34:36 +00:00
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// non-MBR block, get data from flash memory, possibly via cache
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2014-02-08 16:00:15 +00:00
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uint32_t flash_addr = FLASH_MEM_START_ADDR + (block - FLASH_PART1_START_BLOCK) * FLASH_BLOCK_SIZE;
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uint8_t *src = flash_cache_get_addr_for_read(flash_addr);
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memcpy(dest, src, FLASH_BLOCK_SIZE);
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2013-10-18 23:44:05 +01:00
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return true;
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} else {
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// bad block number
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return false;
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}
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}
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bool storage_write_block(const uint8_t *src, uint32_t block) {
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//printf("WR %u\n", block);
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if (block == 0) {
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// can't write MBR, but pretend we did
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return true;
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} else if (FLASH_PART1_START_BLOCK <= block && block < FLASH_PART1_START_BLOCK + FLASH_PART1_NUM_BLOCKS) {
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// non-MBR block, copy to cache
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2014-02-08 16:00:15 +00:00
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uint32_t flash_addr = FLASH_MEM_START_ADDR + (block - FLASH_PART1_START_BLOCK) * FLASH_BLOCK_SIZE;
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uint8_t *dest = flash_cache_get_addr_for_write(flash_addr);
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memcpy(dest, src, FLASH_BLOCK_SIZE);
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flash_sys_tick_counter_last_write = sys_tick_counter;
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2013-10-18 23:44:05 +01:00
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return true;
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} else {
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// bad block number
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return false;
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}
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}
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