2016-06-07 22:57:41 +01:00
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.. currentmodule:: pyb
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2014-11-04 18:25:20 +00:00
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.. _pyb.SPI:
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2014-10-31 22:21:37 +00:00
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class SPI -- a master-driven serial protocol
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============================================
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2014-10-31 01:37:19 +00:00
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SPI is a serial protocol that is driven by a master. At the physical level
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there are 3 lines: SCK, MOSI, MISO.
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2018-07-18 06:47:44 +01:00
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See usage model of I2C; SPI is very similar. Main difference is
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parameters to init the SPI bus::
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2014-10-31 01:37:19 +00:00
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2018-07-18 06:47:44 +01:00
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from pyb import SPI
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spi = SPI(1, SPI.MASTER, baudrate=600000, polarity=1, phase=0, crc=0x7)
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2015-09-13 20:44:09 +01:00
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2018-07-18 06:47:44 +01:00
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Only required parameter is mode, SPI.MASTER or SPI.SLAVE. Polarity can be
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0 or 1, and is the level the idle clock line sits at. Phase can be 0 or 1
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to sample data on the first or second clock edge respectively. Crc can be
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None for no CRC, or a polynomial specifier.
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2014-10-31 01:37:19 +00:00
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2018-07-18 06:47:44 +01:00
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Additional methods for SPI::
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2014-10-31 01:37:19 +00:00
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2018-07-18 06:47:44 +01:00
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data = spi.send_recv(b'1234') # send 4 bytes and receive 4 bytes
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buf = bytearray(4)
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spi.send_recv(b'1234', buf) # send 4 bytes and receive 4 into buf
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spi.send_recv(buf, buf) # send/recv 4 bytes from/to buf
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2015-09-13 20:44:09 +01:00
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2014-10-31 01:37:19 +00:00
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Constructors
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------------
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2018-07-18 06:47:44 +01:00
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.. class:: pyb.SPI(bus, ...)
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2015-09-13 20:44:09 +01:00
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2018-07-18 06:47:44 +01:00
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Construct an SPI object on the given bus. ``bus`` can be 1 or 2, or
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'X' or 'Y'. With no additional parameters, the SPI object is created but
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not initialised (it has the settings from the last initialisation of
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the bus, if any). If extra arguments are given, the bus is initialised.
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See ``init`` for parameters of initialisation.
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2015-09-13 20:44:09 +01:00
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2021-05-20 07:21:47 +01:00
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The physical pins of the SPI buses are:
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2015-09-13 20:44:09 +01:00
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2018-07-18 06:47:44 +01:00
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- ``SPI(1)`` is on the X position: ``(NSS, SCK, MISO, MOSI) = (X5, X6, X7, X8) = (PA4, PA5, PA6, PA7)``
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- ``SPI(2)`` is on the Y position: ``(NSS, SCK, MISO, MOSI) = (Y5, Y6, Y7, Y8) = (PB12, PB13, PB14, PB15)``
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2018-07-18 06:47:44 +01:00
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At the moment, the NSS pin is not used by the SPI driver and is free
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for other use.
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2015-06-10 22:29:56 +01:00
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2014-10-31 01:37:19 +00:00
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Methods
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-------
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2016-06-08 14:21:28 +01:00
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.. method:: SPI.deinit()
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2014-10-31 01:37:19 +00:00
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Turn off the SPI bus.
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2015-09-13 20:44:09 +01:00
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2020-07-11 07:53:26 +01:00
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.. method:: SPI.init(mode, baudrate=328125, *, prescaler, polarity=1, phase=0, bits=8, firstbit=SPI.MSB, ti=False, crc=None)
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Initialise the SPI bus with the given parameters:
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2018-07-18 06:47:44 +01:00
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- ``mode`` must be either ``SPI.MASTER`` or ``SPI.SLAVE``.
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- ``baudrate`` is the SCK clock rate (only sensible for a master).
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- ``prescaler`` is the prescaler to use to derive SCK from the APB bus frequency;
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use of ``prescaler`` overrides ``baudrate``.
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- ``polarity`` can be 0 or 1, and is the level the idle clock line sits at.
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- ``phase`` can be 0 or 1 to sample data on the first or second clock edge
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respectively.
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- ``bits`` can be 8 or 16, and is the number of bits in each transferred word.
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- ``firstbit`` can be ``SPI.MSB`` or ``SPI.LSB``.
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2020-07-02 02:08:25 +01:00
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- ``ti`` True indicates Texas Instruments, as opposed to Motorola, signal conventions.
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- ``crc`` can be None for no CRC, or a polynomial specifier.
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2018-07-18 06:47:44 +01:00
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Note that the SPI clock frequency will not always be the requested baudrate.
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The hardware only supports baudrates that are the APB bus frequency
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(see :meth:`pyb.freq`) divided by a prescaler, which can be 2, 4, 8, 16, 32,
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64, 128 or 256. SPI(1) is on AHB2, and SPI(2) is on AHB1. For precise
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control over the SPI clock frequency, specify ``prescaler`` instead of
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``baudrate``.
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2015-09-13 20:44:09 +01:00
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2018-07-18 06:47:44 +01:00
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Printing the SPI object will show you the computed baudrate and the chosen
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prescaler.
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2015-09-13 20:44:09 +01:00
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2020-07-11 07:53:26 +01:00
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.. method:: SPI.recv(recv, *, timeout=5000)
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2015-09-13 20:44:09 +01:00
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2018-07-18 06:47:44 +01:00
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Receive data on the bus:
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2018-07-18 06:47:44 +01:00
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- ``recv`` can be an integer, which is the number of bytes to receive,
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or a mutable buffer, which will be filled with received bytes.
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- ``timeout`` is the timeout in milliseconds to wait for the receive.
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2015-06-10 22:29:56 +01:00
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2018-07-18 06:47:44 +01:00
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Return value: if ``recv`` is an integer then a new buffer of the bytes received,
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otherwise the same buffer that was passed in to ``recv``.
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2015-06-10 22:29:56 +01:00
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2020-07-11 07:53:26 +01:00
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.. method:: SPI.send(send, *, timeout=5000)
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2015-06-10 22:29:56 +01:00
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2018-07-18 06:47:44 +01:00
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Send data on the bus:
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2015-09-13 20:44:09 +01:00
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2018-07-18 06:47:44 +01:00
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- ``send`` is the data to send (an integer to send, or a buffer object).
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- ``timeout`` is the timeout in milliseconds to wait for the send.
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2015-09-13 20:44:09 +01:00
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2018-07-18 06:47:44 +01:00
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Return value: ``None``.
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2015-09-13 20:44:09 +01:00
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2020-07-11 07:53:26 +01:00
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.. method:: SPI.send_recv(send, recv=None, *, timeout=5000)
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2015-09-13 20:44:09 +01:00
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2018-07-18 06:47:44 +01:00
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Send and receive data on the bus at the same time:
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2015-09-13 20:44:09 +01:00
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2018-07-18 06:47:44 +01:00
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- ``send`` is the data to send (an integer to send, or a buffer object).
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- ``recv`` is a mutable buffer which will be filled with received bytes.
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It can be the same as ``send``, or omitted. If omitted, a new buffer will
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be created.
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- ``timeout`` is the timeout in milliseconds to wait for the receive.
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2015-09-13 20:44:09 +01:00
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2018-07-18 06:47:44 +01:00
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Return value: the buffer with the received bytes.
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2014-10-31 01:37:19 +00:00
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Constants
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---------
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2018-07-18 06:47:44 +01:00
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.. data:: SPI.MASTER
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.. data:: SPI.SLAVE
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for initialising the SPI bus to master or slave mode
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.. data:: SPI.LSB
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.. data:: SPI.MSB
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set the first bit to be the least or most significant bit
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