2014-05-03 23:27:38 +01:00
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/*
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2017-06-30 08:22:17 +01:00
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* This file is part of the MicroPython project, http://micropython.org/
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2014-05-03 23:27:38 +01:00
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*
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* The MIT License (MIT)
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*
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2018-08-14 08:11:07 +01:00
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* Copyright (c) 2013-2018 Damien P. George
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2014-05-03 23:27:38 +01:00
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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2014-04-20 00:16:30 +01:00
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#include <stdio.h>
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#include <string.h>
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2015-01-01 21:06:20 +00:00
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#include "py/runtime.h"
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2015-10-30 23:03:58 +00:00
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#include "py/mphal.h"
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2014-04-20 00:16:30 +01:00
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#include "spi.h"
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2015-06-10 13:06:48 +01:00
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// Possible DMA configurations for SPI busses:
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// SPI1_TX: DMA2_Stream3.CHANNEL_3 or DMA2_Stream5.CHANNEL_3
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// SPI1_RX: DMA2_Stream0.CHANNEL_3 or DMA2_Stream2.CHANNEL_3
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// SPI2_TX: DMA1_Stream4.CHANNEL_0
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// SPI2_RX: DMA1_Stream3.CHANNEL_0
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// SPI3_TX: DMA1_Stream5.CHANNEL_0 or DMA1_Stream7.CHANNEL_0
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// SPI3_RX: DMA1_Stream0.CHANNEL_0 or DMA1_Stream2.CHANNEL_0
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2015-12-08 14:41:47 +00:00
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// SPI4_TX: DMA2_Stream4.CHANNEL_5 or DMA2_Stream1.CHANNEL_4
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// SPI4_RX: DMA2_Stream3.CHANNEL_5 or DMA2_Stream0.CHANNEL_4
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// SPI5_TX: DMA2_Stream4.CHANNEL_2 or DMA2_Stream6.CHANNEL_7
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// SPI5_RX: DMA2_Stream3.CHANNEL_2 or DMA2_Stream5.CHANNEL_7
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// SPI6_TX: DMA2_Stream5.CHANNEL_1
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// SPI6_RX: DMA2_Stream6.CHANNEL_1
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2015-06-10 13:06:48 +01:00
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2015-12-12 15:02:02 +00:00
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#if defined(MICROPY_HW_SPI1_SCK)
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2014-04-20 00:16:30 +01:00
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SPI_HandleTypeDef SPIHandle1 = {.Instance = NULL};
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2014-04-20 19:06:15 +01:00
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#endif
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2015-12-12 15:02:02 +00:00
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#if defined(MICROPY_HW_SPI2_SCK)
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2014-04-20 00:16:30 +01:00
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SPI_HandleTypeDef SPIHandle2 = {.Instance = NULL};
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2015-01-16 05:45:21 +00:00
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#endif
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2015-12-12 15:02:02 +00:00
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#if defined(MICROPY_HW_SPI3_SCK)
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2014-04-20 00:16:30 +01:00
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SPI_HandleTypeDef SPIHandle3 = {.Instance = NULL};
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2014-04-20 19:06:15 +01:00
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#endif
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2015-12-08 14:41:47 +00:00
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#if defined(MICROPY_HW_SPI4_SCK)
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SPI_HandleTypeDef SPIHandle4 = {.Instance = NULL};
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#endif
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#if defined(MICROPY_HW_SPI5_SCK)
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SPI_HandleTypeDef SPIHandle5 = {.Instance = NULL};
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#endif
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#if defined(MICROPY_HW_SPI6_SCK)
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SPI_HandleTypeDef SPIHandle6 = {.Instance = NULL};
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#endif
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2014-04-20 00:16:30 +01:00
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2018-02-05 02:44:31 +00:00
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const spi_t spi_obj[6] = {
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2015-12-12 15:02:02 +00:00
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#if defined(MICROPY_HW_SPI1_SCK)
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2018-02-05 02:44:31 +00:00
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{&SPIHandle1, &dma_SPI_1_TX, &dma_SPI_1_RX},
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2015-12-12 15:02:02 +00:00
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#else
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2018-02-05 02:44:31 +00:00
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{NULL, NULL, NULL},
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2015-12-12 15:02:02 +00:00
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#endif
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#if defined(MICROPY_HW_SPI2_SCK)
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2018-02-05 02:44:31 +00:00
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{&SPIHandle2, &dma_SPI_2_TX, &dma_SPI_2_RX},
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2015-12-12 15:02:02 +00:00
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#else
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2018-02-05 02:44:31 +00:00
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{NULL, NULL, NULL},
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2015-12-12 15:02:02 +00:00
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#endif
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#if defined(MICROPY_HW_SPI3_SCK)
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2018-02-05 02:44:31 +00:00
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{&SPIHandle3, &dma_SPI_3_TX, &dma_SPI_3_RX},
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2015-12-12 15:02:02 +00:00
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#else
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2018-02-05 02:44:31 +00:00
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{NULL, NULL, NULL},
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2015-12-12 15:02:02 +00:00
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#endif
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2015-12-08 14:41:47 +00:00
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#if defined(MICROPY_HW_SPI4_SCK)
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2018-02-05 02:44:31 +00:00
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{&SPIHandle4, &dma_SPI_4_TX, &dma_SPI_4_RX},
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2015-12-08 14:41:47 +00:00
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#else
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2018-02-05 02:44:31 +00:00
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{NULL, NULL, NULL},
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2015-12-08 14:41:47 +00:00
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#endif
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#if defined(MICROPY_HW_SPI5_SCK)
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2018-02-05 02:44:31 +00:00
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{&SPIHandle5, &dma_SPI_5_TX, &dma_SPI_5_RX},
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2015-12-08 14:41:47 +00:00
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#else
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2018-02-05 02:44:31 +00:00
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{NULL, NULL, NULL},
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2015-12-08 14:41:47 +00:00
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#endif
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#if defined(MICROPY_HW_SPI6_SCK)
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2018-02-05 02:44:31 +00:00
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{&SPIHandle6, &dma_SPI_6_TX, &dma_SPI_6_RX},
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2015-12-08 14:41:47 +00:00
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#else
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2018-02-05 02:44:31 +00:00
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{NULL, NULL, NULL},
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2015-12-08 14:41:47 +00:00
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#endif
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2015-06-10 13:06:48 +01:00
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};
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2014-12-02 23:41:30 +00:00
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2019-05-13 18:33:22 +01:00
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#if defined(STM32H7)
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// STM32H7 HAL requires SPI IRQs to be enabled and handled.
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#if defined(MICROPY_HW_SPI1_SCK)
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void SPI1_IRQHandler(void) { IRQ_ENTER(SPI1_IRQn); HAL_SPI_IRQHandler(&SPIHandle1); IRQ_EXIT(SPI1_IRQn); }
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#endif
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#if defined(MICROPY_HW_SPI2_SCK)
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void SPI2_IRQHandler(void) { IRQ_ENTER(SPI2_IRQn); HAL_SPI_IRQHandler(&SPIHandle2); IRQ_EXIT(SPI2_IRQn); }
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#endif
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#if defined(MICROPY_HW_SPI3_SCK)
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void SPI3_IRQHandler(void) { IRQ_ENTER(SPI3_IRQn); HAL_SPI_IRQHandler(&SPIHandle3); IRQ_EXIT(SPI3_IRQn); }
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#endif
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#if defined(MICROPY_HW_SPI4_SCK)
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void SPI4_IRQHandler(void) { IRQ_ENTER(SPI4_IRQn); HAL_SPI_IRQHandler(&SPIHandle4); IRQ_EXIT(SPI4_IRQn); }
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#endif
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#if defined(MICROPY_HW_SPI5_SCK)
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void SPI5_IRQHandler(void) { IRQ_ENTER(SPI5_IRQn); HAL_SPI_IRQHandler(&SPIHandle5); IRQ_EXIT(SPI5_IRQn); }
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#endif
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#if defined(MICROPY_HW_SPI6_SCK)
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void SPI6_IRQHandler(void) { IRQ_ENTER(SPI6_IRQn); HAL_SPI_IRQHandler(&SPIHandle6); IRQ_EXIT(SPI6_IRQn); }
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#endif
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#endif
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2014-04-20 00:16:30 +01:00
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void spi_init0(void) {
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2018-02-02 08:01:11 +00:00
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// Initialise the SPI handles.
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// The structs live on the BSS so all other fields will be zero after a reset.
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2015-12-12 15:02:02 +00:00
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#if defined(MICROPY_HW_SPI1_SCK)
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2014-04-20 00:16:30 +01:00
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SPIHandle1.Instance = SPI1;
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2015-12-12 15:02:02 +00:00
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#endif
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#if defined(MICROPY_HW_SPI2_SCK)
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2014-04-20 00:16:30 +01:00
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SPIHandle2.Instance = SPI2;
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2015-12-12 15:02:02 +00:00
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#endif
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#if defined(MICROPY_HW_SPI3_SCK)
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2014-04-20 00:16:30 +01:00
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SPIHandle3.Instance = SPI3;
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2015-12-12 15:02:02 +00:00
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#endif
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2015-12-08 14:41:47 +00:00
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#if defined(MICROPY_HW_SPI4_SCK)
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SPIHandle4.Instance = SPI4;
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#endif
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#if defined(MICROPY_HW_SPI5_SCK)
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SPIHandle5.Instance = SPI5;
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#endif
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#if defined(MICROPY_HW_SPI6_SCK)
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SPIHandle6.Instance = SPI6;
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#endif
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2014-04-20 00:16:30 +01:00
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}
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2018-08-14 08:11:07 +01:00
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int spi_find_index(mp_obj_t id) {
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2019-01-30 11:05:48 +00:00
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if (mp_obj_is_str(id)) {
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2016-10-03 06:45:46 +01:00
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// given a string id
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const char *port = mp_obj_str_get_str(id);
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if (0) {
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#ifdef MICROPY_HW_SPI1_NAME
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} else if (strcmp(port, MICROPY_HW_SPI1_NAME) == 0) {
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return 1;
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#endif
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#ifdef MICROPY_HW_SPI2_NAME
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} else if (strcmp(port, MICROPY_HW_SPI2_NAME) == 0) {
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return 2;
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#endif
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#ifdef MICROPY_HW_SPI3_NAME
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} else if (strcmp(port, MICROPY_HW_SPI3_NAME) == 0) {
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return 3;
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#endif
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2018-02-02 06:44:05 +00:00
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#ifdef MICROPY_HW_SPI4_NAME
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} else if (strcmp(port, MICROPY_HW_SPI4_NAME) == 0) {
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return 4;
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#endif
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#ifdef MICROPY_HW_SPI5_NAME
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} else if (strcmp(port, MICROPY_HW_SPI5_NAME) == 0) {
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return 5;
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#endif
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#ifdef MICROPY_HW_SPI6_NAME
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} else if (strcmp(port, MICROPY_HW_SPI6_NAME) == 0) {
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return 6;
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#endif
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2016-10-03 06:45:46 +01:00
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}
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2020-02-11 00:48:28 +00:00
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mp_raise_msg_varg(&mp_type_ValueError, "SPI(%s) doesn't exist", port);
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2016-10-03 06:45:46 +01:00
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} else {
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// given an integer id
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int spi_id = mp_obj_get_int(id);
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2018-02-05 02:44:31 +00:00
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if (spi_id >= 1 && spi_id <= MP_ARRAY_SIZE(spi_obj)
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&& spi_obj[spi_id - 1].spi != NULL) {
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2016-10-03 06:45:46 +01:00
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return spi_id;
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}
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2020-02-11 00:48:28 +00:00
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mp_raise_msg_varg(&mp_type_ValueError, "SPI(%d) doesn't exist", spi_id);
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2016-10-03 06:45:46 +01:00
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}
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}
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2019-07-03 03:02:46 +01:00
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STATIC uint32_t spi_get_source_freq(SPI_HandleTypeDef *spi) {
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#if defined(STM32F0)
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return HAL_RCC_GetPCLK1Freq();
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#elif defined(STM32H7)
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if (spi->Instance == SPI1 || spi->Instance == SPI2 || spi->Instance == SPI3) {
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return HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SPI123);
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} else if (spi->Instance == SPI4 || spi->Instance == SPI5) {
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return HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SPI45);
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} else {
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return HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SPI6);
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}
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#else
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#if defined(SPI2)
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if (spi->Instance == SPI2) {
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// SPI2 is on APB1
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return HAL_RCC_GetPCLK1Freq();
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} else
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#endif
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#if defined(SPI3)
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if (spi->Instance == SPI3) {
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// SPI3 is on APB1
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return HAL_RCC_GetPCLK1Freq();
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} else
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#endif
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{
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// SPI1, SPI4, SPI5 and SPI6 are on APB2
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return HAL_RCC_GetPCLK2Freq();
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}
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#endif
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}
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2016-10-03 06:45:46 +01:00
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// sets the parameters in the SPI_InitTypeDef struct
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// if an argument is -1 then the corresponding parameter is not changed
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2018-08-14 08:11:07 +01:00
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void spi_set_params(const spi_t *spi_obj, uint32_t prescale, int32_t baudrate,
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2016-10-03 06:45:46 +01:00
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int32_t polarity, int32_t phase, int32_t bits, int32_t firstbit) {
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2018-02-05 02:44:31 +00:00
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SPI_HandleTypeDef *spi = spi_obj->spi;
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2016-10-03 06:45:46 +01:00
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SPI_InitTypeDef *init = &spi->Init;
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if (prescale != 0xffffffff || baudrate != -1) {
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if (prescale == 0xffffffff) {
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// prescaler not given, so select one that yields at most the requested baudrate
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2019-07-03 03:02:46 +01:00
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prescale = (spi_get_source_freq(spi) + baudrate - 1) / baudrate;
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2016-10-03 06:45:46 +01:00
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}
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if (prescale <= 2) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; }
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else if (prescale <= 4) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4; }
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else if (prescale <= 8) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; }
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else if (prescale <= 16) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16; }
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else if (prescale <= 32) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32; }
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else if (prescale <= 64) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_64; }
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else if (prescale <= 128) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_128; }
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else { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256; }
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}
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if (polarity != -1) {
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init->CLKPolarity = polarity == 0 ? SPI_POLARITY_LOW : SPI_POLARITY_HIGH;
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}
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if (phase != -1) {
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init->CLKPhase = phase == 0 ? SPI_PHASE_1EDGE : SPI_PHASE_2EDGE;
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}
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if (bits != -1) {
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init->DataSize = (bits == 16) ? SPI_DATASIZE_16BIT : SPI_DATASIZE_8BIT;
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}
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if (firstbit != -1) {
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init->FirstBit = firstbit;
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}
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}
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2014-04-20 00:16:30 +01:00
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// TODO allow to take a list of pins to use
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2018-02-05 02:44:31 +00:00
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void spi_init(const spi_t *self, bool enable_nss_pin) {
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SPI_HandleTypeDef *spi = self->spi;
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2019-05-13 18:33:22 +01:00
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uint32_t irqn = 0;
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2017-12-20 15:39:30 +00:00
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const pin_obj_t *pins[4] = { NULL, NULL, NULL, NULL };
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2015-06-10 13:06:48 +01:00
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2014-04-20 19:06:15 +01:00
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if (0) {
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2015-12-12 15:02:02 +00:00
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#if defined(MICROPY_HW_SPI1_SCK)
|
2014-04-20 19:06:15 +01:00
|
|
|
} else if (spi->Instance == SPI1) {
|
2019-05-13 18:33:22 +01:00
|
|
|
irqn = SPI1_IRQn;
|
2016-07-16 00:44:26 +01:00
|
|
|
#if defined(MICROPY_HW_SPI1_NSS)
|
2018-03-28 06:13:21 +01:00
|
|
|
pins[0] = MICROPY_HW_SPI1_NSS;
|
2016-07-16 00:44:26 +01:00
|
|
|
#endif
|
2018-03-28 06:13:21 +01:00
|
|
|
pins[1] = MICROPY_HW_SPI1_SCK;
|
2017-12-20 15:39:30 +00:00
|
|
|
#if defined(MICROPY_HW_SPI1_MISO)
|
2018-03-28 06:13:21 +01:00
|
|
|
pins[2] = MICROPY_HW_SPI1_MISO;
|
2017-12-20 15:39:30 +00:00
|
|
|
#endif
|
2018-03-28 06:13:21 +01:00
|
|
|
pins[3] = MICROPY_HW_SPI1_MOSI;
|
2014-04-20 19:06:15 +01:00
|
|
|
// enable the SPI clock
|
2018-02-13 04:53:08 +00:00
|
|
|
__HAL_RCC_SPI1_CLK_ENABLE();
|
2015-12-12 15:02:02 +00:00
|
|
|
#endif
|
|
|
|
#if defined(MICROPY_HW_SPI2_SCK)
|
2014-04-20 19:06:15 +01:00
|
|
|
} else if (spi->Instance == SPI2) {
|
2019-05-13 18:33:22 +01:00
|
|
|
irqn = SPI2_IRQn;
|
2016-07-16 00:44:26 +01:00
|
|
|
#if defined(MICROPY_HW_SPI2_NSS)
|
2018-03-28 06:13:21 +01:00
|
|
|
pins[0] = MICROPY_HW_SPI2_NSS;
|
2016-07-16 00:44:26 +01:00
|
|
|
#endif
|
2018-03-28 06:13:21 +01:00
|
|
|
pins[1] = MICROPY_HW_SPI2_SCK;
|
2017-12-20 15:39:30 +00:00
|
|
|
#if defined(MICROPY_HW_SPI2_MISO)
|
2018-03-28 06:13:21 +01:00
|
|
|
pins[2] = MICROPY_HW_SPI2_MISO;
|
2017-12-20 15:39:30 +00:00
|
|
|
#endif
|
2018-03-28 06:13:21 +01:00
|
|
|
pins[3] = MICROPY_HW_SPI2_MOSI;
|
2014-04-20 19:06:15 +01:00
|
|
|
// enable the SPI clock
|
2018-02-13 04:53:08 +00:00
|
|
|
__HAL_RCC_SPI2_CLK_ENABLE();
|
2015-12-12 15:02:02 +00:00
|
|
|
#endif
|
|
|
|
#if defined(MICROPY_HW_SPI3_SCK)
|
2014-04-20 19:06:15 +01:00
|
|
|
} else if (spi->Instance == SPI3) {
|
2019-05-13 18:33:22 +01:00
|
|
|
irqn = SPI3_IRQn;
|
2016-07-16 00:44:26 +01:00
|
|
|
#if defined(MICROPY_HW_SPI3_NSS)
|
2018-03-28 06:13:21 +01:00
|
|
|
pins[0] = MICROPY_HW_SPI3_NSS;
|
2016-07-16 00:44:26 +01:00
|
|
|
#endif
|
2018-03-28 06:13:21 +01:00
|
|
|
pins[1] = MICROPY_HW_SPI3_SCK;
|
2017-12-20 15:39:30 +00:00
|
|
|
#if defined(MICROPY_HW_SPI3_MISO)
|
2018-03-28 06:13:21 +01:00
|
|
|
pins[2] = MICROPY_HW_SPI3_MISO;
|
2017-12-20 15:39:30 +00:00
|
|
|
#endif
|
2018-03-28 06:13:21 +01:00
|
|
|
pins[3] = MICROPY_HW_SPI3_MOSI;
|
2014-04-20 19:06:15 +01:00
|
|
|
// enable the SPI clock
|
2018-02-13 04:53:08 +00:00
|
|
|
__HAL_RCC_SPI3_CLK_ENABLE();
|
2015-12-12 15:02:02 +00:00
|
|
|
#endif
|
2015-12-08 14:41:47 +00:00
|
|
|
#if defined(MICROPY_HW_SPI4_SCK)
|
|
|
|
} else if (spi->Instance == SPI4) {
|
2019-05-13 18:33:22 +01:00
|
|
|
irqn = SPI4_IRQn;
|
2016-07-16 00:44:26 +01:00
|
|
|
#if defined(MICROPY_HW_SPI4_NSS)
|
2018-03-28 06:13:21 +01:00
|
|
|
pins[0] = MICROPY_HW_SPI4_NSS;
|
2016-07-16 00:44:26 +01:00
|
|
|
#endif
|
2018-03-28 06:13:21 +01:00
|
|
|
pins[1] = MICROPY_HW_SPI4_SCK;
|
2017-12-20 15:39:30 +00:00
|
|
|
#if defined(MICROPY_HW_SPI4_MISO)
|
2018-03-28 06:13:21 +01:00
|
|
|
pins[2] = MICROPY_HW_SPI4_MISO;
|
2017-12-20 15:39:30 +00:00
|
|
|
#endif
|
2018-03-28 06:13:21 +01:00
|
|
|
pins[3] = MICROPY_HW_SPI4_MOSI;
|
2015-12-08 14:41:47 +00:00
|
|
|
// enable the SPI clock
|
2018-02-13 04:53:08 +00:00
|
|
|
__HAL_RCC_SPI4_CLK_ENABLE();
|
2015-12-08 14:41:47 +00:00
|
|
|
#endif
|
|
|
|
#if defined(MICROPY_HW_SPI5_SCK)
|
|
|
|
} else if (spi->Instance == SPI5) {
|
2019-05-13 18:33:22 +01:00
|
|
|
irqn = SPI5_IRQn;
|
2016-07-16 00:44:26 +01:00
|
|
|
#if defined(MICROPY_HW_SPI5_NSS)
|
2018-03-28 06:13:21 +01:00
|
|
|
pins[0] = MICROPY_HW_SPI5_NSS;
|
2016-07-16 00:44:26 +01:00
|
|
|
#endif
|
2018-03-28 06:13:21 +01:00
|
|
|
pins[1] = MICROPY_HW_SPI5_SCK;
|
2017-12-20 15:39:30 +00:00
|
|
|
#if defined(MICROPY_HW_SPI5_MISO)
|
2018-03-28 06:13:21 +01:00
|
|
|
pins[2] = MICROPY_HW_SPI5_MISO;
|
2017-12-20 15:39:30 +00:00
|
|
|
#endif
|
2018-03-28 06:13:21 +01:00
|
|
|
pins[3] = MICROPY_HW_SPI5_MOSI;
|
2015-12-08 14:41:47 +00:00
|
|
|
// enable the SPI clock
|
2018-02-13 04:53:08 +00:00
|
|
|
__HAL_RCC_SPI5_CLK_ENABLE();
|
2015-12-08 14:41:47 +00:00
|
|
|
#endif
|
|
|
|
#if defined(MICROPY_HW_SPI6_SCK)
|
|
|
|
} else if (spi->Instance == SPI6) {
|
2019-05-13 18:33:22 +01:00
|
|
|
irqn = SPI6_IRQn;
|
2016-07-16 00:44:26 +01:00
|
|
|
#if defined(MICROPY_HW_SPI6_NSS)
|
2018-03-28 06:13:21 +01:00
|
|
|
pins[0] = MICROPY_HW_SPI6_NSS;
|
2016-07-16 00:44:26 +01:00
|
|
|
#endif
|
2018-03-28 06:13:21 +01:00
|
|
|
pins[1] = MICROPY_HW_SPI6_SCK;
|
2017-12-20 15:39:30 +00:00
|
|
|
#if defined(MICROPY_HW_SPI6_MISO)
|
2018-03-28 06:13:21 +01:00
|
|
|
pins[2] = MICROPY_HW_SPI6_MISO;
|
2017-12-20 15:39:30 +00:00
|
|
|
#endif
|
2018-03-28 06:13:21 +01:00
|
|
|
pins[3] = MICROPY_HW_SPI6_MOSI;
|
2015-12-08 14:41:47 +00:00
|
|
|
// enable the SPI clock
|
2018-02-13 04:53:08 +00:00
|
|
|
__HAL_RCC_SPI6_CLK_ENABLE();
|
2015-12-08 14:41:47 +00:00
|
|
|
#endif
|
2014-04-20 19:06:15 +01:00
|
|
|
} else {
|
|
|
|
// SPI does not exist for this board (shouldn't get here, should be checked by caller)
|
|
|
|
return;
|
2014-04-20 00:16:30 +01:00
|
|
|
}
|
|
|
|
|
2016-11-11 06:53:45 +00:00
|
|
|
// init the GPIO lines
|
|
|
|
uint32_t mode = MP_HAL_PIN_MODE_ALT;
|
|
|
|
uint32_t pull = spi->Init.CLKPolarity == SPI_POLARITY_LOW ? MP_HAL_PIN_PULL_DOWN : MP_HAL_PIN_PULL_UP;
|
2017-12-20 15:39:30 +00:00
|
|
|
for (uint i = (enable_nss_pin ? 0 : 1); i < 4; i++) {
|
|
|
|
if (pins[i] == NULL) {
|
|
|
|
continue;
|
|
|
|
}
|
2018-02-05 02:44:31 +00:00
|
|
|
mp_hal_pin_config_alt(pins[i], mode, pull, AF_FN_SPI, (self - &spi_obj[0]) + 1);
|
2014-04-20 00:16:30 +01:00
|
|
|
}
|
|
|
|
|
2014-04-20 19:06:15 +01:00
|
|
|
// init the SPI device
|
2014-04-20 00:16:30 +01:00
|
|
|
if (HAL_SPI_Init(spi) != HAL_OK) {
|
|
|
|
// init error
|
|
|
|
// TODO should raise an exception, but this function is not necessarily going to be
|
|
|
|
// called via Python, so may not be properly wrapped in an NLR handler
|
2014-10-23 14:25:32 +01:00
|
|
|
printf("OSError: HAL_SPI_Init failed\n");
|
2014-04-20 00:16:30 +01:00
|
|
|
return;
|
|
|
|
}
|
2014-12-02 23:41:30 +00:00
|
|
|
|
2015-06-10 13:06:48 +01:00
|
|
|
// After calling HAL_SPI_Init() it seems that the DMA gets disconnected if
|
|
|
|
// it was previously configured. So we invalidate the DMA channel to force
|
|
|
|
// an initialisation the next time we use it.
|
2016-03-22 10:28:35 +00:00
|
|
|
dma_invalidate_channel(self->tx_dma_descr);
|
|
|
|
dma_invalidate_channel(self->rx_dma_descr);
|
2019-05-13 18:33:22 +01:00
|
|
|
|
|
|
|
#if defined(STM32H7)
|
|
|
|
NVIC_SetPriority(irqn, IRQ_PRI_SPI);
|
|
|
|
HAL_NVIC_EnableIRQ(irqn);
|
|
|
|
#else
|
|
|
|
(void)irqn;
|
|
|
|
#endif
|
2014-04-20 00:16:30 +01:00
|
|
|
}
|
|
|
|
|
2018-02-05 02:44:31 +00:00
|
|
|
void spi_deinit(const spi_t *spi_obj) {
|
|
|
|
SPI_HandleTypeDef *spi = spi_obj->spi;
|
2014-04-20 00:16:30 +01:00
|
|
|
HAL_SPI_DeInit(spi);
|
2014-04-20 19:06:15 +01:00
|
|
|
if (0) {
|
2015-12-12 15:02:02 +00:00
|
|
|
#if defined(MICROPY_HW_SPI1_SCK)
|
2014-04-20 19:06:15 +01:00
|
|
|
} else if (spi->Instance == SPI1) {
|
2018-02-13 04:53:08 +00:00
|
|
|
__HAL_RCC_SPI1_FORCE_RESET();
|
|
|
|
__HAL_RCC_SPI1_RELEASE_RESET();
|
|
|
|
__HAL_RCC_SPI1_CLK_DISABLE();
|
2019-05-13 18:33:22 +01:00
|
|
|
HAL_NVIC_DisableIRQ(SPI1_IRQn);
|
2015-12-12 15:02:02 +00:00
|
|
|
#endif
|
|
|
|
#if defined(MICROPY_HW_SPI2_SCK)
|
2014-04-20 00:16:30 +01:00
|
|
|
} else if (spi->Instance == SPI2) {
|
2018-02-13 04:53:08 +00:00
|
|
|
__HAL_RCC_SPI2_FORCE_RESET();
|
|
|
|
__HAL_RCC_SPI2_RELEASE_RESET();
|
|
|
|
__HAL_RCC_SPI2_CLK_DISABLE();
|
2019-05-13 18:33:22 +01:00
|
|
|
HAL_NVIC_DisableIRQ(SPI2_IRQn);
|
2015-12-12 15:02:02 +00:00
|
|
|
#endif
|
|
|
|
#if defined(MICROPY_HW_SPI3_SCK)
|
2014-04-20 08:06:03 +01:00
|
|
|
} else if (spi->Instance == SPI3) {
|
2018-02-13 04:53:08 +00:00
|
|
|
__HAL_RCC_SPI3_FORCE_RESET();
|
|
|
|
__HAL_RCC_SPI3_RELEASE_RESET();
|
|
|
|
__HAL_RCC_SPI3_CLK_DISABLE();
|
2019-05-13 18:33:22 +01:00
|
|
|
HAL_NVIC_DisableIRQ(SPI3_IRQn);
|
2015-12-12 15:02:02 +00:00
|
|
|
#endif
|
2015-12-08 14:41:47 +00:00
|
|
|
#if defined(MICROPY_HW_SPI4_SCK)
|
|
|
|
} else if (spi->Instance == SPI4) {
|
2018-02-13 04:53:08 +00:00
|
|
|
__HAL_RCC_SPI4_FORCE_RESET();
|
|
|
|
__HAL_RCC_SPI4_RELEASE_RESET();
|
|
|
|
__HAL_RCC_SPI4_CLK_DISABLE();
|
2019-05-13 18:33:22 +01:00
|
|
|
HAL_NVIC_DisableIRQ(SPI4_IRQn);
|
2015-12-08 14:41:47 +00:00
|
|
|
#endif
|
|
|
|
#if defined(MICROPY_HW_SPI5_SCK)
|
|
|
|
} else if (spi->Instance == SPI5) {
|
2018-02-13 04:53:08 +00:00
|
|
|
__HAL_RCC_SPI5_FORCE_RESET();
|
|
|
|
__HAL_RCC_SPI5_RELEASE_RESET();
|
|
|
|
__HAL_RCC_SPI5_CLK_DISABLE();
|
2019-05-13 18:33:22 +01:00
|
|
|
HAL_NVIC_DisableIRQ(SPI5_IRQn);
|
2015-12-08 14:41:47 +00:00
|
|
|
#endif
|
|
|
|
#if defined(MICROPY_HW_SPI6_SCK)
|
|
|
|
} else if (spi->Instance == SPI6) {
|
2018-02-13 04:53:08 +00:00
|
|
|
__HAL_RCC_SPI6_FORCE_RESET();
|
|
|
|
__HAL_RCC_SPI6_RELEASE_RESET();
|
|
|
|
__HAL_RCC_SPI6_CLK_DISABLE();
|
2019-05-13 18:33:22 +01:00
|
|
|
HAL_NVIC_DisableIRQ(SPI6_IRQn);
|
2015-12-08 14:41:47 +00:00
|
|
|
#endif
|
2014-04-20 00:16:30 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-06-18 08:36:52 +01:00
|
|
|
STATIC HAL_StatusTypeDef spi_wait_dma_finished(const spi_t *spi, uint32_t t_start, uint32_t timeout) {
|
2018-02-05 02:44:31 +00:00
|
|
|
volatile HAL_SPI_StateTypeDef *state = &spi->spi->State;
|
2018-02-01 00:45:29 +00:00
|
|
|
for (;;) {
|
|
|
|
// Do an atomic check of the state; WFI will exit even if IRQs are disabled
|
|
|
|
uint32_t irq_state = disable_irq();
|
2018-02-05 02:44:31 +00:00
|
|
|
if (*state == HAL_SPI_STATE_READY) {
|
2018-02-01 00:45:29 +00:00
|
|
|
enable_irq(irq_state);
|
|
|
|
return HAL_OK;
|
|
|
|
}
|
|
|
|
__WFI();
|
|
|
|
enable_irq(irq_state);
|
2018-06-18 08:36:52 +01:00
|
|
|
if (HAL_GetTick() - t_start >= timeout) {
|
2014-12-02 23:41:30 +00:00
|
|
|
return HAL_TIMEOUT;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return HAL_OK;
|
|
|
|
}
|
|
|
|
|
2018-08-14 08:11:07 +01:00
|
|
|
void spi_transfer(const spi_t *self, size_t len, const uint8_t *src, uint8_t *dest, uint32_t timeout) {
|
2016-09-01 07:36:41 +01:00
|
|
|
// Note: there seems to be a problem sending 1 byte using DMA the first
|
|
|
|
// time directly after the SPI/DMA is initialised. The cause of this is
|
|
|
|
// unknown but we sidestep the issue by using polling for 1 byte transfer.
|
|
|
|
|
2018-06-18 08:36:52 +01:00
|
|
|
// Note: DMA transfers are limited to 65535 bytes at a time.
|
|
|
|
|
2016-09-01 07:36:41 +01:00
|
|
|
HAL_StatusTypeDef status;
|
|
|
|
|
2016-10-03 02:47:56 +01:00
|
|
|
if (dest == NULL) {
|
2016-09-01 07:36:41 +01:00
|
|
|
// send only
|
2016-10-03 02:47:56 +01:00
|
|
|
if (len == 1 || query_irq() == IRQ_STATE_DISABLED) {
|
|
|
|
status = HAL_SPI_Transmit(self->spi, (uint8_t*)src, len, timeout);
|
2016-09-01 07:36:41 +01:00
|
|
|
} else {
|
|
|
|
DMA_HandleTypeDef tx_dma;
|
2018-09-11 08:18:06 +01:00
|
|
|
dma_init(&tx_dma, self->tx_dma_descr, DMA_MEMORY_TO_PERIPH, self->spi);
|
2016-09-01 07:36:41 +01:00
|
|
|
self->spi->hdmatx = &tx_dma;
|
|
|
|
self->spi->hdmarx = NULL;
|
2017-03-28 02:54:01 +01:00
|
|
|
MP_HAL_CLEAN_DCACHE(src, len);
|
2018-06-18 08:36:52 +01:00
|
|
|
uint32_t t_start = HAL_GetTick();
|
|
|
|
do {
|
|
|
|
uint32_t l = MIN(len, 65535);
|
|
|
|
status = HAL_SPI_Transmit_DMA(self->spi, (uint8_t*)src, l);
|
|
|
|
if (status != HAL_OK) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
status = spi_wait_dma_finished(self, t_start, timeout);
|
|
|
|
if (status != HAL_OK) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
len -= l;
|
|
|
|
src += l;
|
|
|
|
} while (len);
|
2016-09-01 07:36:41 +01:00
|
|
|
dma_deinit(self->tx_dma_descr);
|
|
|
|
}
|
2016-10-03 02:47:56 +01:00
|
|
|
} else if (src == NULL) {
|
2016-09-01 07:36:41 +01:00
|
|
|
// receive only
|
2016-10-03 02:47:56 +01:00
|
|
|
if (len == 1 || query_irq() == IRQ_STATE_DISABLED) {
|
|
|
|
status = HAL_SPI_Receive(self->spi, dest, len, timeout);
|
2016-09-01 07:36:41 +01:00
|
|
|
} else {
|
|
|
|
DMA_HandleTypeDef tx_dma, rx_dma;
|
|
|
|
if (self->spi->Init.Mode == SPI_MODE_MASTER) {
|
|
|
|
// in master mode the HAL actually does a TransmitReceive call
|
2018-09-11 08:18:06 +01:00
|
|
|
dma_init(&tx_dma, self->tx_dma_descr, DMA_MEMORY_TO_PERIPH, self->spi);
|
2016-09-01 07:36:41 +01:00
|
|
|
self->spi->hdmatx = &tx_dma;
|
|
|
|
} else {
|
|
|
|
self->spi->hdmatx = NULL;
|
|
|
|
}
|
2018-09-11 08:18:06 +01:00
|
|
|
dma_init(&rx_dma, self->rx_dma_descr, DMA_PERIPH_TO_MEMORY, self->spi);
|
2016-09-01 07:36:41 +01:00
|
|
|
self->spi->hdmarx = &rx_dma;
|
2017-03-28 02:54:01 +01:00
|
|
|
MP_HAL_CLEANINVALIDATE_DCACHE(dest, len);
|
2018-06-18 08:36:52 +01:00
|
|
|
uint32_t t_start = HAL_GetTick();
|
|
|
|
do {
|
|
|
|
uint32_t l = MIN(len, 65535);
|
|
|
|
status = HAL_SPI_Receive_DMA(self->spi, dest, l);
|
|
|
|
if (status != HAL_OK) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
status = spi_wait_dma_finished(self, t_start, timeout);
|
|
|
|
if (status != HAL_OK) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
len -= l;
|
|
|
|
dest += l;
|
|
|
|
} while (len);
|
2016-09-01 07:36:41 +01:00
|
|
|
if (self->spi->hdmatx != NULL) {
|
|
|
|
dma_deinit(self->tx_dma_descr);
|
|
|
|
}
|
|
|
|
dma_deinit(self->rx_dma_descr);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
// send and receive
|
2016-10-03 02:47:56 +01:00
|
|
|
if (len == 1 || query_irq() == IRQ_STATE_DISABLED) {
|
|
|
|
status = HAL_SPI_TransmitReceive(self->spi, (uint8_t*)src, dest, len, timeout);
|
2016-09-01 07:36:41 +01:00
|
|
|
} else {
|
|
|
|
DMA_HandleTypeDef tx_dma, rx_dma;
|
2018-09-11 08:18:06 +01:00
|
|
|
dma_init(&tx_dma, self->tx_dma_descr, DMA_MEMORY_TO_PERIPH, self->spi);
|
2016-09-01 07:36:41 +01:00
|
|
|
self->spi->hdmatx = &tx_dma;
|
2018-09-11 08:18:06 +01:00
|
|
|
dma_init(&rx_dma, self->rx_dma_descr, DMA_PERIPH_TO_MEMORY, self->spi);
|
2016-09-01 07:36:41 +01:00
|
|
|
self->spi->hdmarx = &rx_dma;
|
2017-03-28 02:54:01 +01:00
|
|
|
MP_HAL_CLEAN_DCACHE(src, len);
|
|
|
|
MP_HAL_CLEANINVALIDATE_DCACHE(dest, len);
|
2018-06-18 08:36:52 +01:00
|
|
|
uint32_t t_start = HAL_GetTick();
|
|
|
|
do {
|
|
|
|
uint32_t l = MIN(len, 65535);
|
|
|
|
status = HAL_SPI_TransmitReceive_DMA(self->spi, (uint8_t*)src, dest, l);
|
|
|
|
if (status != HAL_OK) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
status = spi_wait_dma_finished(self, t_start, timeout);
|
|
|
|
if (status != HAL_OK) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
len -= l;
|
|
|
|
src += l;
|
|
|
|
dest += l;
|
|
|
|
} while (len);
|
2016-09-01 07:36:41 +01:00
|
|
|
dma_deinit(self->tx_dma_descr);
|
|
|
|
dma_deinit(self->rx_dma_descr);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (status != HAL_OK) {
|
|
|
|
mp_hal_raise(status);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-08-14 08:11:07 +01:00
|
|
|
void spi_print(const mp_print_t *print, const spi_t *spi_obj, bool legacy) {
|
2018-02-05 02:44:31 +00:00
|
|
|
SPI_HandleTypeDef *spi = spi_obj->spi;
|
|
|
|
|
2015-12-08 14:41:47 +00:00
|
|
|
uint spi_num = 1; // default to SPI1
|
2018-12-01 01:38:29 +00:00
|
|
|
if (0) { }
|
|
|
|
#if defined(SPI2)
|
|
|
|
else if (spi->Instance == SPI2) { spi_num = 2; }
|
|
|
|
#endif
|
2018-05-28 09:10:53 +01:00
|
|
|
#if defined(SPI3)
|
2016-10-03 06:45:46 +01:00
|
|
|
else if (spi->Instance == SPI3) { spi_num = 3; }
|
2018-05-28 09:10:53 +01:00
|
|
|
#endif
|
2015-12-08 14:41:47 +00:00
|
|
|
#if defined(SPI4)
|
2016-10-03 06:45:46 +01:00
|
|
|
else if (spi->Instance == SPI4) { spi_num = 4; }
|
2015-12-08 14:41:47 +00:00
|
|
|
#endif
|
|
|
|
#if defined(SPI5)
|
2016-10-03 06:45:46 +01:00
|
|
|
else if (spi->Instance == SPI5) { spi_num = 5; }
|
2015-12-08 14:41:47 +00:00
|
|
|
#endif
|
|
|
|
#if defined(SPI6)
|
2016-10-03 06:45:46 +01:00
|
|
|
else if (spi->Instance == SPI6) { spi_num = 6; }
|
2015-12-08 14:41:47 +00:00
|
|
|
#endif
|
2014-04-20 00:16:30 +01:00
|
|
|
|
2016-10-03 06:45:46 +01:00
|
|
|
mp_printf(print, "SPI(%u", spi_num);
|
|
|
|
if (spi->State != HAL_SPI_STATE_RESET) {
|
|
|
|
if (spi->Init.Mode == SPI_MODE_MASTER) {
|
2014-04-20 00:16:30 +01:00
|
|
|
// compute baudrate
|
2016-10-03 06:45:46 +01:00
|
|
|
uint log_prescaler = (spi->Init.BaudRatePrescaler >> 3) + 1;
|
2019-07-03 03:02:46 +01:00
|
|
|
uint baudrate = spi_get_source_freq(spi) >> log_prescaler;
|
2016-10-03 06:45:46 +01:00
|
|
|
if (legacy) {
|
|
|
|
mp_printf(print, ", SPI.MASTER");
|
|
|
|
}
|
|
|
|
mp_printf(print, ", baudrate=%u", baudrate);
|
|
|
|
if (legacy) {
|
|
|
|
mp_printf(print, ", prescaler=%u", 1 << log_prescaler);
|
|
|
|
}
|
2014-04-20 00:16:30 +01:00
|
|
|
} else {
|
2016-10-03 06:45:46 +01:00
|
|
|
mp_printf(print, ", SPI.SLAVE");
|
2014-04-20 00:16:30 +01:00
|
|
|
}
|
2016-10-03 06:45:46 +01:00
|
|
|
mp_printf(print, ", polarity=%u, phase=%u, bits=%u", spi->Init.CLKPolarity == SPI_POLARITY_LOW ? 0 : 1, spi->Init.CLKPhase == SPI_PHASE_1EDGE ? 0 : 1, spi->Init.DataSize == SPI_DATASIZE_8BIT ? 8 : 16);
|
2018-02-13 04:37:35 +00:00
|
|
|
if (spi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) {
|
2016-10-03 06:45:46 +01:00
|
|
|
mp_printf(print, ", crc=0x%x", spi->Init.CRCPolynomial);
|
2014-04-21 00:10:04 +01:00
|
|
|
}
|
2014-04-20 00:16:30 +01:00
|
|
|
}
|
2016-10-03 06:45:46 +01:00
|
|
|
mp_print_str(print, ")");
|
|
|
|
}
|
|
|
|
|
2018-02-05 02:51:27 +00:00
|
|
|
const spi_t *spi_from_mp_obj(mp_obj_t o) {
|
2019-01-30 11:05:48 +00:00
|
|
|
if (mp_obj_is_type(o, &pyb_spi_type)) {
|
2018-07-08 14:25:11 +01:00
|
|
|
pyb_spi_obj_t *self = MP_OBJ_TO_PTR(o);
|
2018-02-05 02:51:27 +00:00
|
|
|
return self->spi;
|
2019-01-30 11:05:48 +00:00
|
|
|
} else if (mp_obj_is_type(o, &machine_hard_spi_type)) {
|
2018-07-08 14:25:11 +01:00
|
|
|
machine_hard_spi_obj_t *self = MP_OBJ_TO_PTR(o);
|
2018-02-05 02:51:27 +00:00
|
|
|
return self->spi;
|
|
|
|
} else {
|
|
|
|
mp_raise_TypeError("expecting an SPI object");
|
|
|
|
}
|
|
|
|
}
|
stm32/spi: Add implementation of low-level SPI protocol.
Can be used, for example, to configure external SPI flash using a hardware
SPI interface (code to be put in a board's bdev.c file):
STATIC const spi_proto_cfg_t hard_spi_bus = {
.spi = &spi_obj[5],
.baudrate = 10000000,
.polarity = 0,
.phase = 0,
.bits = 8,
.firstbit = SPI_FIRSTBIT_MSB,
};
STATIC mp_spiflash_cache_t spi_bdev_cache;
const mp_spiflash_config_t spiflash_config = {
.bus_kind = MP_SPIFLASH_BUS_SPI,
.bus.u_spi.cs = pin_A0,
.bus.u_spi.data = (void*)&hard_spi_bus,
.bus.u_spi.proto = &spi_proto,
.cache = &spi_bdev_cache,
};
spi_bdev_t spi_bdev;
2018-08-14 13:05:20 +01:00
|
|
|
|
|
|
|
/******************************************************************************/
|
|
|
|
// Implementation of low-level SPI C protocol
|
|
|
|
|
|
|
|
STATIC int spi_proto_ioctl(void *self_in, uint32_t cmd) {
|
|
|
|
spi_proto_cfg_t *self = (spi_proto_cfg_t*)self_in;
|
|
|
|
|
|
|
|
switch (cmd) {
|
|
|
|
case MP_SPI_IOCTL_INIT:
|
2018-09-11 08:36:11 +01:00
|
|
|
self->spi->spi->Init.Mode = SPI_MODE_MASTER;
|
|
|
|
self->spi->spi->Init.Direction = SPI_DIRECTION_2LINES;
|
|
|
|
self->spi->spi->Init.NSS = SPI_NSS_SOFT;
|
|
|
|
self->spi->spi->Init.TIMode = SPI_TIMODE_DISABLE;
|
|
|
|
self->spi->spi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
|
stm32/spi: Add implementation of low-level SPI protocol.
Can be used, for example, to configure external SPI flash using a hardware
SPI interface (code to be put in a board's bdev.c file):
STATIC const spi_proto_cfg_t hard_spi_bus = {
.spi = &spi_obj[5],
.baudrate = 10000000,
.polarity = 0,
.phase = 0,
.bits = 8,
.firstbit = SPI_FIRSTBIT_MSB,
};
STATIC mp_spiflash_cache_t spi_bdev_cache;
const mp_spiflash_config_t spiflash_config = {
.bus_kind = MP_SPIFLASH_BUS_SPI,
.bus.u_spi.cs = pin_A0,
.bus.u_spi.data = (void*)&hard_spi_bus,
.bus.u_spi.proto = &spi_proto,
.cache = &spi_bdev_cache,
};
spi_bdev_t spi_bdev;
2018-08-14 13:05:20 +01:00
|
|
|
spi_set_params(self->spi, 0xffffffff, self->baudrate,
|
|
|
|
self->polarity, self->phase, self->bits, self->firstbit);
|
|
|
|
spi_init(self->spi, false);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case MP_SPI_IOCTL_DEINIT:
|
|
|
|
spi_deinit(self->spi);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
STATIC void spi_proto_transfer(void *self_in, size_t len, const uint8_t *src, uint8_t *dest) {
|
|
|
|
spi_proto_cfg_t *self = (spi_proto_cfg_t*)self_in;
|
|
|
|
spi_transfer(self->spi, len, src, dest, SPI_TRANSFER_TIMEOUT(len));
|
|
|
|
}
|
|
|
|
|
|
|
|
const mp_spi_proto_t spi_proto = {
|
|
|
|
.ioctl = spi_proto_ioctl,
|
|
|
|
.transfer = spi_proto_transfer,
|
|
|
|
};
|