2015-10-08 05:26:04 +01:00
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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2013-2015 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <stdio.h>
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2017-01-27 12:11:59 +00:00
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#include <string.h>
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2015-10-08 05:26:04 +01:00
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#include "modmachine.h"
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#include "py/gc.h"
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#include "py/runtime.h"
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2019-02-15 04:07:53 +00:00
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#include "py/objstr.h"
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2018-09-24 05:18:18 +01:00
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#include "py/mperrno.h"
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2015-10-30 23:03:58 +00:00
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#include "py/mphal.h"
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2015-12-14 01:40:09 +00:00
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#include "extmod/machine_mem.h"
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2017-01-31 01:36:20 +00:00
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#include "extmod/machine_signal.h"
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2016-10-06 02:12:20 +01:00
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#include "extmod/machine_pulse.h"
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2016-04-12 13:51:39 +01:00
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#include "extmod/machine_i2c.h"
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2020-09-16 05:09:49 +01:00
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#include "extmod/machine_spi.h"
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2016-10-17 03:16:47 +01:00
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#include "lib/utils/pyexec.h"
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2017-01-27 12:11:59 +00:00
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#include "lib/oofatfs/ff.h"
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#include "extmod/vfs.h"
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2017-01-29 08:20:27 +00:00
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#include "extmod/vfs_fat.h"
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2015-10-08 05:26:04 +01:00
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#include "gccollect.h"
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#include "irq.h"
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2018-09-24 05:18:18 +01:00
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#include "powerctrl.h"
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2017-02-06 04:13:30 +00:00
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#include "pybthread.h"
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2015-10-08 05:26:04 +01:00
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#include "rng.h"
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#include "storage.h"
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2015-10-19 22:48:21 +01:00
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#include "pin.h"
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2015-10-08 05:26:04 +01:00
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#include "timer.h"
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#include "usb.h"
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2015-11-07 11:03:12 +00:00
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#include "rtc.h"
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stmhal/modmachine: Initial attempt to add I2C & SPI classes.
In new hardware API, these classes implement master modes of interfaces,
and "mode" parameter is not accepted. Trying to implement new HW API
in terms of older pyb module leaves variuos corner cases:
In new HW API, I2C(1) means "I2C #1 in master mode" (? depends on
interpretation), while in old API, it means "I2C #1, with no settings
changes".
For I2C class, it's easy to make mode optional, because that's last
positional param, but for SPI, there's "baudrate" after it (which
is inconsistent with I2C, which requires "baudrate" to be kwonly-arg).
2015-11-14 14:13:58 +00:00
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#include "i2c.h"
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#include "spi.h"
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2017-05-16 08:40:22 +01:00
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#include "uart.h"
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2016-09-03 15:12:48 +01:00
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#include "wdt.h"
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2015-10-08 05:26:04 +01:00
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2019-07-05 08:24:59 +01:00
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#if defined(STM32L0)
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// L0 does not have a BOR, so use POR instead
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#define RCC_CSR_BORRSTF RCC_CSR_PORRSTF
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#endif
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2019-07-17 07:33:31 +01:00
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#if defined(STM32L4) || defined(STM32WB)
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2016-09-06 05:20:19 +01:00
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// L4 does not have a POR, so use BOR instead
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#define RCC_CSR_PORRSTF RCC_CSR_BORRSTF
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#endif
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2018-02-23 16:54:09 +00:00
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#if defined(STM32H7)
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#define RCC_SR RSR
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#define RCC_SR_IWDGRSTF RCC_RSR_IWDG1RSTF
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#define RCC_SR_WWDGRSTF RCC_RSR_WWDG1RSTF
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#define RCC_SR_PORRSTF RCC_RSR_PORRSTF
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#define RCC_SR_BORRSTF RCC_RSR_BORRSTF
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#define RCC_SR_PINRSTF RCC_RSR_PINRSTF
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#define RCC_SR_RMVF RCC_RSR_RMVF
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#else
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#define RCC_SR CSR
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#define RCC_SR_IWDGRSTF RCC_CSR_IWDGRSTF
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#define RCC_SR_WWDGRSTF RCC_CSR_WWDGRSTF
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#define RCC_SR_PORRSTF RCC_CSR_PORRSTF
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#define RCC_SR_BORRSTF RCC_CSR_BORRSTF
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#define RCC_SR_PINRSTF RCC_CSR_PINRSTF
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#define RCC_SR_RMVF RCC_CSR_RMVF
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#endif
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2016-09-06 05:20:19 +01:00
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#define PYB_RESET_SOFT (0)
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#define PYB_RESET_POWER_ON (1)
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#define PYB_RESET_HARD (2)
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#define PYB_RESET_WDT (3)
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#define PYB_RESET_DEEPSLEEP (4)
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STATIC uint32_t reset_cause;
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void machine_init(void) {
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2018-03-16 23:42:50 +00:00
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#if defined(STM32F4)
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2016-09-06 05:20:19 +01:00
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if (PWR->CSR & PWR_CSR_SBF) {
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// came out of standby
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reset_cause = PYB_RESET_DEEPSLEEP;
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2016-09-27 06:49:35 +01:00
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PWR->CR |= PWR_CR_CSBF;
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2016-09-06 05:20:19 +01:00
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} else
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2018-03-16 23:42:50 +00:00
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#elif defined(STM32F7)
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2017-08-23 08:00:02 +01:00
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if (PWR->CSR1 & PWR_CSR1_SBF) {
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// came out of standby
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reset_cause = PYB_RESET_DEEPSLEEP;
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PWR->CR1 |= PWR_CR1_CSBF;
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} else
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2018-02-23 16:54:09 +00:00
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#elif defined(STM32H7)
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if (PWR->CPUCR & PWR_CPUCR_SBF || PWR->CPUCR & PWR_CPUCR_STOPF) {
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// came out of standby or stop mode
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reset_cause = PYB_RESET_DEEPSLEEP;
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PWR->CPUCR |= PWR_CPUCR_CSSF;
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} else
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2018-12-27 17:04:00 +00:00
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#elif defined(STM32L4)
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if (PWR->SR1 & PWR_SR1_SBF) {
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// came out of standby
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reset_cause = PYB_RESET_DEEPSLEEP;
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PWR->SCR |= PWR_SCR_CSBF;
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} else
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2016-09-06 05:20:19 +01:00
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#endif
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{
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// get reset cause from RCC flags
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2018-02-23 16:54:09 +00:00
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uint32_t state = RCC->RCC_SR;
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if (state & RCC_SR_IWDGRSTF || state & RCC_SR_WWDGRSTF) {
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2016-09-06 05:20:19 +01:00
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reset_cause = PYB_RESET_WDT;
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2018-05-28 09:10:53 +01:00
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} else if (state & RCC_SR_PORRSTF
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2020-05-14 14:56:26 +01:00
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#if !defined(STM32F0) && !defined(STM32F412Zx)
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2018-05-28 09:10:53 +01:00
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|| state & RCC_SR_BORRSTF
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#endif
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) {
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2016-09-06 05:20:19 +01:00
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reset_cause = PYB_RESET_POWER_ON;
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2018-02-23 16:54:09 +00:00
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} else if (state & RCC_SR_PINRSTF) {
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2016-09-06 05:20:19 +01:00
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reset_cause = PYB_RESET_HARD;
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} else {
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// default is soft reset
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reset_cause = PYB_RESET_SOFT;
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}
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}
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// clear RCC reset flags
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2018-02-23 16:54:09 +00:00
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RCC->RCC_SR |= RCC_SR_RMVF;
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2016-09-06 05:20:19 +01:00
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}
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2018-02-05 04:48:28 +00:00
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void machine_deinit(void) {
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// we are doing a soft-reset so change the reset_cause
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reset_cause = PYB_RESET_SOFT;
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}
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2015-10-08 05:26:04 +01:00
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// machine.info([dump_alloc_table])
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// Print out lots of information about the board.
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2017-08-30 01:59:58 +01:00
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STATIC mp_obj_t machine_info(size_t n_args, const mp_obj_t *args) {
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2015-10-08 05:26:04 +01:00
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// get and print unique id; 96 bits
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{
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2015-10-29 16:03:10 +00:00
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byte *id = (byte *)MP_HAL_UNIQUE_ID_ADDRESS;
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2015-10-08 05:26:04 +01:00
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printf("ID=%02x%02x%02x%02x:%02x%02x%02x%02x:%02x%02x%02x%02x\n", id[0], id[1], id[2], id[3], id[4], id[5], id[6], id[7], id[8], id[9], id[10], id[11]);
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}
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2020-11-25 13:15:49 +00:00
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printf("DEVID=0x%04x\nREVID=0x%04x\n", (unsigned int)HAL_GetDEVID(), (unsigned int)HAL_GetREVID());
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2015-10-08 05:26:04 +01:00
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// get and print clock speeds
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// SYSCLK=168MHz, HCLK=168MHz, PCLK1=42MHz, PCLK2=84MHz
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{
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2018-05-28 09:10:53 +01:00
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#if defined(STM32F0)
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printf("S=%u\nH=%u\nP1=%u\n",
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(unsigned int)HAL_RCC_GetSysClockFreq(),
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(unsigned int)HAL_RCC_GetHCLKFreq(),
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(unsigned int)HAL_RCC_GetPCLK1Freq());
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#else
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2018-05-04 06:52:03 +01:00
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printf("S=%u\nH=%u\nP1=%u\nP2=%u\n",
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(unsigned int)HAL_RCC_GetSysClockFreq(),
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(unsigned int)HAL_RCC_GetHCLKFreq(),
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(unsigned int)HAL_RCC_GetPCLK1Freq(),
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(unsigned int)HAL_RCC_GetPCLK2Freq());
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2018-05-28 09:10:53 +01:00
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#endif
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2015-10-08 05:26:04 +01:00
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}
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// to print info about memory
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{
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printf("_etext=%p\n", &_etext);
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printf("_sidata=%p\n", &_sidata);
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printf("_sdata=%p\n", &_sdata);
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printf("_edata=%p\n", &_edata);
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printf("_sbss=%p\n", &_sbss);
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printf("_ebss=%p\n", &_ebss);
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2019-05-14 15:43:38 +01:00
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printf("_sstack=%p\n", &_sstack);
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2015-10-08 05:26:04 +01:00
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printf("_estack=%p\n", &_estack);
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printf("_ram_start=%p\n", &_ram_start);
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printf("_heap_start=%p\n", &_heap_start);
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printf("_heap_end=%p\n", &_heap_end);
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printf("_ram_end=%p\n", &_ram_end);
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}
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// qstr info
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{
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2018-07-08 14:25:11 +01:00
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size_t n_pool, n_qstr, n_str_data_bytes, n_total_bytes;
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2015-10-08 05:26:04 +01:00
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qstr_pool_info(&n_pool, &n_qstr, &n_str_data_bytes, &n_total_bytes);
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2018-07-08 14:25:11 +01:00
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printf("qstr:\n n_pool=%u\n n_qstr=%u\n n_str_data_bytes=%u\n n_total_bytes=%u\n", n_pool, n_qstr, n_str_data_bytes, n_total_bytes);
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2015-10-08 05:26:04 +01:00
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}
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// GC info
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{
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gc_info_t info;
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gc_info(&info);
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printf("GC:\n");
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2018-07-08 14:25:11 +01:00
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printf(" %u total\n", info.total);
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printf(" %u : %u\n", info.used, info.free);
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printf(" 1=%u 2=%u m=%u\n", info.num_1block, info.num_2block, info.max_block);
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2015-10-08 05:26:04 +01:00
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}
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// free space on flash
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{
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2018-05-28 03:01:52 +01:00
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#if MICROPY_VFS_FAT
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2017-01-27 12:11:59 +00:00
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for (mp_vfs_mount_t *vfs = MP_STATE_VM(vfs_mount_table); vfs != NULL; vfs = vfs->next) {
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if (strncmp("/flash", vfs->str, vfs->len) == 0) {
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// assumes that it's a FatFs filesystem
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fs_user_mount_t *vfs_fat = MP_OBJ_TO_PTR(vfs->obj);
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DWORD nclst;
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f_getfree(&vfs_fat->fatfs, &nclst);
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printf("LFS free: %u bytes\n", (uint)(nclst * vfs_fat->fatfs.csize * 512));
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break;
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}
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}
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2018-05-28 03:01:52 +01:00
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#endif
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2015-10-08 05:26:04 +01:00
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}
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2017-02-06 04:13:30 +00:00
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#if MICROPY_PY_THREAD
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pyb_thread_dump();
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#endif
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2015-10-08 05:26:04 +01:00
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if (n_args == 1) {
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// arg given means dump gc allocation table
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gc_dump_alloc_table();
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}
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return mp_const_none;
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}
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MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_info_obj, 0, 1, machine_info);
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// Returns a string of 12 bytes (96 bits), which is the unique ID for the MCU.
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STATIC mp_obj_t machine_unique_id(void) {
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2016-04-17 12:18:50 +01:00
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byte *id = (byte *)MP_HAL_UNIQUE_ID_ADDRESS;
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2015-10-08 05:26:04 +01:00
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return mp_obj_new_bytes(id, 12);
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}
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MP_DEFINE_CONST_FUN_OBJ_0(machine_unique_id_obj, machine_unique_id);
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// Resets the pyboard in a manner similar to pushing the external RESET button.
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STATIC mp_obj_t machine_reset(void) {
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2019-06-22 12:26:03 +01:00
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powerctrl_mcu_reset();
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2015-10-08 05:26:04 +01:00
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return mp_const_none;
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}
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MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset);
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2016-10-17 03:16:47 +01:00
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STATIC mp_obj_t machine_soft_reset(void) {
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pyexec_system_exit = PYEXEC_FORCED_EXIT;
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2020-02-11 02:17:41 +00:00
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mp_raise_type(&mp_type_SystemExit);
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2016-10-17 03:16:47 +01:00
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}
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MP_DEFINE_CONST_FUN_OBJ_0(machine_soft_reset_obj, machine_soft_reset);
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2015-10-08 05:26:04 +01:00
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// Activate the bootloader without BOOT* pins.
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2019-02-07 05:13:57 +00:00
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STATIC NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args) {
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2018-02-13 07:51:08 +00:00
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#if MICROPY_HW_ENABLE_USB
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2015-10-08 05:26:04 +01:00
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pyb_usb_dev_deinit();
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2018-02-13 07:51:08 +00:00
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#endif
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2018-05-28 01:57:27 +01:00
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#if MICROPY_HW_ENABLE_STORAGE
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2015-10-08 05:26:04 +01:00
|
|
|
storage_flush();
|
2018-05-28 01:57:27 +01:00
|
|
|
#endif
|
2015-10-08 05:26:04 +01:00
|
|
|
|
2019-07-04 01:49:51 +01:00
|
|
|
__disable_irq();
|
|
|
|
|
2019-02-07 05:13:57 +00:00
|
|
|
#if MICROPY_HW_USES_BOOTLOADER
|
|
|
|
if (n_args == 0 || !mp_obj_is_true(args[0])) {
|
|
|
|
// By default, with no args given, we enter the custom bootloader (mboot)
|
2021-04-28 07:45:51 +01:00
|
|
|
powerctrl_enter_bootloader(0x70ad0000, MBOOT_VTOR);
|
2019-02-07 05:13:57 +00:00
|
|
|
}
|
2019-02-15 04:07:53 +00:00
|
|
|
|
|
|
|
if (n_args == 1 && mp_obj_is_str_or_bytes(args[0])) {
|
|
|
|
// With a string/bytes given, pass its data to the custom bootloader
|
|
|
|
size_t len;
|
|
|
|
const char *data = mp_obj_str_get_data(args[0], &len);
|
2021-04-28 07:45:51 +01:00
|
|
|
void *mboot_region = (void *)*((volatile uint32_t *)MBOOT_VTOR);
|
2019-02-15 04:07:53 +00:00
|
|
|
memmove(mboot_region, data, len);
|
2021-04-28 07:45:51 +01:00
|
|
|
powerctrl_enter_bootloader(0x70ad0080, MBOOT_VTOR);
|
2019-02-15 04:07:53 +00:00
|
|
|
}
|
2019-02-07 05:13:57 +00:00
|
|
|
#endif
|
|
|
|
|
2019-05-15 07:35:09 +01:00
|
|
|
#if defined(STM32F7) || defined(STM32H7)
|
2019-06-22 12:26:03 +01:00
|
|
|
powerctrl_enter_bootloader(0, 0x1ff00000);
|
2019-05-15 07:35:09 +01:00
|
|
|
#else
|
2019-06-22 12:26:03 +01:00
|
|
|
powerctrl_enter_bootloader(0, 0x00000000);
|
2019-05-15 07:35:09 +01:00
|
|
|
#endif
|
2015-10-08 05:26:04 +01:00
|
|
|
|
|
|
|
while (1) {
|
|
|
|
;
|
2020-02-27 04:36:53 +00:00
|
|
|
}
|
2015-10-08 05:26:04 +01:00
|
|
|
}
|
2019-02-07 05:13:57 +00:00
|
|
|
MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_bootloader_obj, 0, 1, machine_bootloader);
|
2015-10-08 05:26:04 +01:00
|
|
|
|
|
|
|
// get or set the MCU frequencies
|
2017-08-30 01:59:58 +01:00
|
|
|
STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) {
|
2015-10-08 05:26:04 +01:00
|
|
|
if (n_args == 0) {
|
|
|
|
// get
|
2018-05-28 09:10:53 +01:00
|
|
|
mp_obj_t tuple[] = {
|
2015-10-08 05:26:04 +01:00
|
|
|
mp_obj_new_int(HAL_RCC_GetSysClockFreq()),
|
|
|
|
mp_obj_new_int(HAL_RCC_GetHCLKFreq()),
|
|
|
|
mp_obj_new_int(HAL_RCC_GetPCLK1Freq()),
|
2018-05-28 09:10:53 +01:00
|
|
|
#if !defined(STM32F0)
|
2015-10-08 05:26:04 +01:00
|
|
|
mp_obj_new_int(HAL_RCC_GetPCLK2Freq()),
|
2018-05-28 09:10:53 +01:00
|
|
|
#endif
|
2015-10-08 05:26:04 +01:00
|
|
|
};
|
2018-05-28 09:10:53 +01:00
|
|
|
return mp_obj_new_tuple(MP_ARRAY_SIZE(tuple), tuple);
|
2015-10-08 05:26:04 +01:00
|
|
|
} else {
|
|
|
|
// set
|
2020-06-01 12:24:48 +01:00
|
|
|
#if defined(STM32F0) || defined(STM32L0) || defined(STM32L4)
|
2020-03-02 11:35:22 +00:00
|
|
|
mp_raise_NotImplementedError(MP_ERROR_TEXT("machine.freq set not supported yet"));
|
2018-05-28 09:10:53 +01:00
|
|
|
#else
|
2018-09-24 05:18:18 +01:00
|
|
|
mp_int_t sysclk = mp_obj_get_int(args[0]);
|
2018-09-24 08:06:42 +01:00
|
|
|
mp_int_t ahb = sysclk;
|
2020-01-31 12:20:42 +00:00
|
|
|
#if defined(STM32H7)
|
|
|
|
if (ahb > 200000000) {
|
|
|
|
ahb /= 2;
|
|
|
|
}
|
|
|
|
#endif
|
2020-06-01 12:24:48 +01:00
|
|
|
#if defined(STM32WB)
|
|
|
|
mp_int_t apb1 = ahb;
|
|
|
|
mp_int_t apb2 = ahb;
|
|
|
|
#else
|
2018-09-24 08:06:42 +01:00
|
|
|
mp_int_t apb1 = ahb / 4;
|
|
|
|
mp_int_t apb2 = ahb / 2;
|
2020-06-01 12:24:48 +01:00
|
|
|
#endif
|
2018-09-24 05:18:18 +01:00
|
|
|
if (n_args > 1) {
|
|
|
|
ahb = mp_obj_get_int(args[1]);
|
|
|
|
if (n_args > 2) {
|
|
|
|
apb1 = mp_obj_get_int(args[2]);
|
|
|
|
if (n_args > 3) {
|
|
|
|
apb2 = mp_obj_get_int(args[3]);
|
2015-10-08 05:26:04 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2018-09-24 05:18:18 +01:00
|
|
|
int ret = powerctrl_set_sysclk(sysclk, ahb, apb1, apb2);
|
|
|
|
if (ret == -MP_EINVAL) {
|
2020-03-02 11:35:22 +00:00
|
|
|
mp_raise_ValueError(MP_ERROR_TEXT("invalid freq"));
|
2018-09-24 05:18:18 +01:00
|
|
|
} else if (ret < 0) {
|
|
|
|
void NORETURN __fatal_error(const char *msg);
|
|
|
|
__fatal_error("can't change freq");
|
2015-10-08 05:26:04 +01:00
|
|
|
}
|
|
|
|
return mp_const_none;
|
2018-05-28 09:10:53 +01:00
|
|
|
#endif
|
2015-10-08 05:26:04 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_freq_obj, 0, 4, machine_freq);
|
|
|
|
|
2020-06-18 03:19:04 +01:00
|
|
|
// idle()
|
|
|
|
// This executies a wfi machine instruction which reduces power consumption
|
|
|
|
// of the MCU until an interrupt occurs, at which point execution continues.
|
|
|
|
STATIC mp_obj_t machine_idle(void) {
|
|
|
|
__WFI();
|
|
|
|
return mp_const_none;
|
|
|
|
}
|
|
|
|
MP_DEFINE_CONST_FUN_OBJ_0(machine_idle_obj, machine_idle);
|
|
|
|
|
2018-12-26 11:44:09 +00:00
|
|
|
STATIC mp_obj_t machine_lightsleep(size_t n_args, const mp_obj_t *args) {
|
|
|
|
if (n_args != 0) {
|
|
|
|
mp_obj_t args2[2] = {MP_OBJ_NULL, args[0]};
|
|
|
|
pyb_rtc_wakeup(2, args2);
|
|
|
|
}
|
2018-11-28 01:22:20 +00:00
|
|
|
powerctrl_enter_stop_mode();
|
2015-10-08 05:26:04 +01:00
|
|
|
return mp_const_none;
|
|
|
|
}
|
2018-12-26 11:44:09 +00:00
|
|
|
MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_lightsleep_obj, 0, 1, machine_lightsleep);
|
2015-10-08 05:26:04 +01:00
|
|
|
|
2018-12-26 11:44:09 +00:00
|
|
|
STATIC mp_obj_t machine_deepsleep(size_t n_args, const mp_obj_t *args) {
|
|
|
|
if (n_args != 0) {
|
|
|
|
mp_obj_t args2[2] = {MP_OBJ_NULL, args[0]};
|
|
|
|
pyb_rtc_wakeup(2, args2);
|
|
|
|
}
|
2018-11-28 01:22:20 +00:00
|
|
|
powerctrl_enter_standby_mode();
|
2015-10-08 05:26:04 +01:00
|
|
|
return mp_const_none;
|
|
|
|
}
|
2018-12-26 11:44:09 +00:00
|
|
|
MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_deepsleep_obj, 0, 1, machine_deepsleep);
|
2015-10-08 05:26:04 +01:00
|
|
|
|
|
|
|
STATIC mp_obj_t machine_reset_cause(void) {
|
2016-09-06 05:20:19 +01:00
|
|
|
return MP_OBJ_NEW_SMALL_INT(reset_cause);
|
2015-10-08 05:26:04 +01:00
|
|
|
}
|
|
|
|
STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_cause_obj, machine_reset_cause);
|
|
|
|
|
2017-05-06 08:03:40 +01:00
|
|
|
STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_umachine) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_info), MP_ROM_PTR(&machine_info_obj) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_unique_id), MP_ROM_PTR(&machine_unique_id_obj) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_reset), MP_ROM_PTR(&machine_reset_obj) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_soft_reset), MP_ROM_PTR(&machine_soft_reset_obj) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_bootloader), MP_ROM_PTR(&machine_bootloader_obj) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&machine_freq_obj) },
|
2015-10-08 05:26:04 +01:00
|
|
|
#if MICROPY_HW_ENABLE_RNG
|
2017-05-06 08:03:40 +01:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_rng), MP_ROM_PTR(&pyb_rng_get_obj) },
|
2015-10-08 05:26:04 +01:00
|
|
|
#endif
|
2020-06-18 03:19:04 +01:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_idle), MP_ROM_PTR(&machine_idle_obj) },
|
2018-12-26 11:44:09 +00:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_sleep), MP_ROM_PTR(&machine_lightsleep_obj) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_lightsleep), MP_ROM_PTR(&machine_lightsleep_obj) },
|
2017-05-06 08:03:40 +01:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_deepsleep), MP_ROM_PTR(&machine_deepsleep_obj) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_reset_cause), MP_ROM_PTR(&machine_reset_cause_obj) },
|
2016-09-06 05:20:19 +01:00
|
|
|
#if 0
|
2017-05-06 08:03:40 +01:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_wake_reason), MP_ROM_PTR(&machine_wake_reason_obj) },
|
2015-10-08 05:26:04 +01:00
|
|
|
#endif
|
|
|
|
|
2020-06-18 03:19:04 +01:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&machine_disable_irq_obj) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&machine_enable_irq_obj) },
|
2015-10-19 22:48:21 +01:00
|
|
|
|
2021-02-17 02:03:52 +00:00
|
|
|
#if MICROPY_PY_MACHINE_PULSE
|
2017-05-06 08:03:40 +01:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_time_pulse_us), MP_ROM_PTR(&machine_time_pulse_us_obj) },
|
2021-02-17 02:03:52 +00:00
|
|
|
#endif
|
2016-10-06 02:12:20 +01:00
|
|
|
|
2017-05-06 08:03:40 +01:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_mem8), MP_ROM_PTR(&machine_mem8_obj) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_mem16), MP_ROM_PTR(&machine_mem16_obj) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_mem32), MP_ROM_PTR(&machine_mem32_obj) },
|
2015-12-14 01:40:09 +00:00
|
|
|
|
2017-05-06 08:03:40 +01:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&pin_type) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_Signal), MP_ROM_PTR(&machine_signal_type) },
|
2015-10-19 22:48:21 +01:00
|
|
|
|
2017-05-06 08:03:40 +01:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_RTC), MP_ROM_PTR(&pyb_rtc_type) },
|
2019-07-20 03:37:58 +01:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_ADC), MP_ROM_PTR(&machine_adc_type) },
|
2018-01-04 16:45:36 +00:00
|
|
|
#if MICROPY_PY_MACHINE_I2C
|
2020-09-16 05:09:49 +01:00
|
|
|
#if MICROPY_HW_ENABLE_HW_I2C
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&machine_hard_i2c_type) },
|
|
|
|
#else
|
2020-09-16 04:30:48 +01:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&mp_machine_soft_i2c_type) },
|
2018-01-04 16:45:36 +00:00
|
|
|
#endif
|
2020-09-16 05:09:49 +01:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_SoftI2C), MP_ROM_PTR(&mp_machine_soft_i2c_type) },
|
|
|
|
#endif
|
2021-02-17 02:03:52 +00:00
|
|
|
#if MICROPY_PY_MACHINE_SPI
|
2017-05-06 08:03:40 +01:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&machine_hard_spi_type) },
|
2020-09-16 05:09:49 +01:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_SoftSPI), MP_ROM_PTR(&mp_machine_soft_spi_type) },
|
2021-02-17 02:03:52 +00:00
|
|
|
#endif
|
2021-04-17 05:27:40 +01:00
|
|
|
#if MICROPY_HW_ENABLE_I2S
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_I2S), MP_ROM_PTR(&machine_i2s_type) },
|
|
|
|
#endif
|
2017-05-16 08:40:22 +01:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&pyb_uart_type) },
|
2017-05-06 08:03:40 +01:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_WDT), MP_ROM_PTR(&pyb_wdt_type) },
|
2019-10-23 06:56:38 +01:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_Timer), MP_ROM_PTR(&machine_timer_type) },
|
stmhal/modmachine: Initial attempt to add I2C & SPI classes.
In new hardware API, these classes implement master modes of interfaces,
and "mode" parameter is not accepted. Trying to implement new HW API
in terms of older pyb module leaves variuos corner cases:
In new HW API, I2C(1) means "I2C #1 in master mode" (? depends on
interpretation), while in old API, it means "I2C #1, with no settings
changes".
For I2C class, it's easy to make mode optional, because that's last
positional param, but for SPI, there's "baudrate" after it (which
is inconsistent with I2C, which requires "baudrate" to be kwonly-arg).
2015-11-14 14:13:58 +00:00
|
|
|
#if 0
|
2017-05-06 08:03:40 +01:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_HeartBeat), MP_ROM_PTR(&pyb_heartbeat_type) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_SD), MP_ROM_PTR(&pyb_sd_type) },
|
2015-10-08 05:26:04 +01:00
|
|
|
|
|
|
|
// class constants
|
2017-05-06 08:03:40 +01:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_IDLE), MP_ROM_INT(PYB_PWR_MODE_ACTIVE) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_SLEEP), MP_ROM_INT(PYB_PWR_MODE_LPDS) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_DEEPSLEEP), MP_ROM_INT(PYB_PWR_MODE_HIBERNATE) },
|
2016-09-06 05:20:19 +01:00
|
|
|
#endif
|
2017-05-06 08:03:40 +01:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_PWRON_RESET), MP_ROM_INT(PYB_RESET_POWER_ON) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_HARD_RESET), MP_ROM_INT(PYB_RESET_HARD) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_WDT_RESET), MP_ROM_INT(PYB_RESET_WDT) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_DEEPSLEEP_RESET), MP_ROM_INT(PYB_RESET_DEEPSLEEP) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_SOFT_RESET), MP_ROM_INT(PYB_RESET_SOFT) },
|
2016-09-06 05:20:19 +01:00
|
|
|
#if 0
|
2017-05-06 08:03:40 +01:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_WLAN_WAKE), MP_ROM_INT(PYB_SLP_WAKED_BY_WLAN) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_PIN_WAKE), MP_ROM_INT(PYB_SLP_WAKED_BY_GPIO) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_RTC_WAKE), MP_ROM_INT(PYB_SLP_WAKED_BY_RTC) },
|
2015-10-08 05:26:04 +01:00
|
|
|
#endif
|
|
|
|
};
|
|
|
|
|
|
|
|
STATIC MP_DEFINE_CONST_DICT(machine_module_globals, machine_module_globals_table);
|
|
|
|
|
|
|
|
const mp_obj_module_t machine_module = {
|
|
|
|
.base = { &mp_type_module },
|
|
|
|
.globals = (mp_obj_dict_t *)&machine_module_globals,
|
|
|
|
};
|
|
|
|
|