2014-10-02 14:34:15 +01:00
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/*
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2017-06-30 08:22:17 +01:00
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* This file is part of the MicroPython project, http://micropython.org/
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2014-10-02 14:34:15 +01:00
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*
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* The MIT License (MIT)
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*
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2018-03-15 05:34:07 +00:00
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* Copyright (c) 2014-2018 Damien P. George
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2014-10-02 14:34:15 +01:00
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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2015-01-01 21:06:20 +00:00
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#include "py/runtime.h"
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2016-05-10 23:22:54 +01:00
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#include "py/mperrno.h"
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2015-10-30 23:03:58 +00:00
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#include "py/mphal.h"
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2014-10-02 14:34:15 +01:00
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#include "can.h"
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2015-10-31 17:44:20 +00:00
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#include "irq.h"
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2014-10-02 14:34:15 +01:00
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2014-10-05 18:05:26 +01:00
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#if MICROPY_HW_ENABLE_CAN
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2019-09-12 04:54:35 +01:00
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void can_init0(void) {
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for (uint i = 0; i < MP_ARRAY_SIZE(MP_STATE_PORT(pyb_can_obj_all)); i++) {
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MP_STATE_PORT(pyb_can_obj_all)[i] = NULL;
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}
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}
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2014-10-02 14:34:15 +01:00
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2019-09-12 04:54:35 +01:00
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void can_deinit_all(void) {
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for (int i = 0; i < MP_ARRAY_SIZE(MP_STATE_PORT(pyb_can_obj_all)); i++) {
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pyb_can_obj_t *can_obj = MP_STATE_PORT(pyb_can_obj_all)[i];
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if (can_obj != NULL) {
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can_deinit(can_obj);
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}
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}
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}
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2015-01-15 22:16:57 +00:00
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2019-09-16 00:56:38 +01:00
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#if !MICROPY_HW_ENABLE_FDCAN
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2019-09-12 04:54:35 +01:00
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bool can_init(pyb_can_obj_t *can_obj, uint32_t mode, uint32_t prescaler, uint32_t sjw, uint32_t bs1, uint32_t bs2, bool auto_restart) {
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CAN_InitTypeDef *init = &can_obj->can.Init;
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init->Mode = mode << 4; // shift-left so modes fit in a small-int
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init->Prescaler = prescaler;
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init->SJW = ((sjw - 1) & 3) << 24;
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init->BS1 = ((bs1 - 1) & 0xf) << 16;
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init->BS2 = ((bs2 - 1) & 7) << 20;
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init->TTCM = DISABLE;
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init->ABOM = auto_restart ? ENABLE : DISABLE;
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init->AWUM = DISABLE;
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init->NART = DISABLE;
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init->RFLM = DISABLE;
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init->TXFP = DISABLE;
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2014-11-21 22:24:23 +00:00
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2014-10-02 14:34:15 +01:00
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CAN_TypeDef *CANx = NULL;
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2018-03-16 07:28:35 +00:00
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uint32_t sce_irq = 0;
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2018-04-11 07:27:48 +01:00
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const pin_obj_t *pins[2];
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2014-10-02 14:34:15 +01:00
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switch (can_obj->can_id) {
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2018-04-11 07:27:48 +01:00
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#if defined(MICROPY_HW_CAN1_TX)
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2014-10-02 14:34:15 +01:00
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case PYB_CAN_1:
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CANx = CAN1;
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2018-03-16 07:28:35 +00:00
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sce_irq = CAN1_SCE_IRQn;
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2018-04-11 07:27:48 +01:00
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pins[0] = MICROPY_HW_CAN1_TX;
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pins[1] = MICROPY_HW_CAN1_RX;
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2019-04-19 06:15:18 +01:00
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__HAL_RCC_CAN1_CLK_ENABLE();
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2014-10-02 14:34:15 +01:00
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break;
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2018-04-11 07:27:48 +01:00
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#endif
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2014-10-02 14:34:15 +01:00
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2018-04-11 07:27:48 +01:00
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#if defined(MICROPY_HW_CAN2_TX)
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2014-10-02 14:34:15 +01:00
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case PYB_CAN_2:
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CANx = CAN2;
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2018-03-16 07:28:35 +00:00
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sce_irq = CAN2_SCE_IRQn;
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2018-04-11 07:27:48 +01:00
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pins[0] = MICROPY_HW_CAN2_TX;
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pins[1] = MICROPY_HW_CAN2_RX;
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2019-04-19 06:15:18 +01:00
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__HAL_RCC_CAN1_CLK_ENABLE(); // CAN2 is a "slave" and needs CAN1 enabled as well
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__HAL_RCC_CAN2_CLK_ENABLE();
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break;
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#endif
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#if defined(MICROPY_HW_CAN3_TX)
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case PYB_CAN_3:
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CANx = CAN3;
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sce_irq = CAN3_SCE_IRQn;
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pins[0] = MICROPY_HW_CAN3_TX;
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pins[1] = MICROPY_HW_CAN3_RX;
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__HAL_RCC_CAN3_CLK_ENABLE(); // CAN3 is a "master" and doesn't need CAN1 enabled as well
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2014-10-02 14:34:15 +01:00
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break;
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2018-02-01 02:11:02 +00:00
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#endif
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2014-10-02 14:34:15 +01:00
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default:
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return false;
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}
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// init GPIO
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2019-09-12 04:54:35 +01:00
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uint32_t pin_mode = MP_HAL_PIN_MODE_ALT;
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uint32_t pin_pull = MP_HAL_PIN_PULL_UP;
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2018-04-11 07:27:48 +01:00
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for (int i = 0; i < 2; i++) {
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2019-09-12 04:54:35 +01:00
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if (!mp_hal_pin_config_alt(pins[i], pin_mode, pin_pull, AF_FN_CAN, can_obj->can_id)) {
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2018-04-11 07:27:48 +01:00
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return false;
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}
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}
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2014-10-02 14:34:15 +01:00
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// init CANx
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can_obj->can.Instance = CANx;
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HAL_CAN_Init(&can_obj->can);
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can_obj->is_enabled = true;
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2018-03-16 07:28:35 +00:00
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can_obj->num_error_warning = 0;
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can_obj->num_error_passive = 0;
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can_obj->num_bus_off = 0;
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__HAL_CAN_ENABLE_IT(&can_obj->can, CAN_IT_ERR | CAN_IT_BOF | CAN_IT_EPV | CAN_IT_EWG);
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2018-05-02 05:41:02 +01:00
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NVIC_SetPriority(sce_irq, IRQ_PRI_CAN);
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2018-03-16 07:28:35 +00:00
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HAL_NVIC_EnableIRQ(sce_irq);
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2014-10-02 14:34:15 +01:00
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return true;
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}
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2019-09-12 04:54:35 +01:00
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void can_deinit(pyb_can_obj_t *self) {
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self->is_enabled = false;
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HAL_CAN_DeInit(&self->can);
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if (self->can.Instance == CAN1) {
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HAL_NVIC_DisableIRQ(CAN1_RX0_IRQn);
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HAL_NVIC_DisableIRQ(CAN1_RX1_IRQn);
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HAL_NVIC_DisableIRQ(CAN1_SCE_IRQn);
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__HAL_RCC_CAN1_FORCE_RESET();
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__HAL_RCC_CAN1_RELEASE_RESET();
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__HAL_RCC_CAN1_CLK_DISABLE();
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#if defined(CAN2)
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} else if (self->can.Instance == CAN2) {
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HAL_NVIC_DisableIRQ(CAN2_RX0_IRQn);
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HAL_NVIC_DisableIRQ(CAN2_RX1_IRQn);
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HAL_NVIC_DisableIRQ(CAN2_SCE_IRQn);
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__HAL_RCC_CAN2_FORCE_RESET();
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__HAL_RCC_CAN2_RELEASE_RESET();
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__HAL_RCC_CAN2_CLK_DISABLE();
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#endif
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#if defined(CAN3)
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} else if (self->can.Instance == CAN3) {
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HAL_NVIC_DisableIRQ(CAN3_RX0_IRQn);
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HAL_NVIC_DisableIRQ(CAN3_RX1_IRQn);
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HAL_NVIC_DisableIRQ(CAN3_SCE_IRQn);
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__HAL_RCC_CAN3_FORCE_RESET();
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__HAL_RCC_CAN3_RELEASE_RESET();
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__HAL_RCC_CAN3_CLK_DISABLE();
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#endif
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2014-10-02 14:34:15 +01:00
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}
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}
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2019-09-16 00:56:38 +01:00
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void can_clearfilter(pyb_can_obj_t *self, uint32_t f, uint8_t bank) {
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2014-11-21 22:24:23 +00:00
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CAN_FilterConfTypeDef filter;
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2020-02-27 04:36:53 +00:00
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filter.FilterIdHigh = 0;
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filter.FilterIdLow = 0;
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filter.FilterMaskIdHigh = 0;
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filter.FilterMaskIdLow = 0;
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2014-11-21 22:24:23 +00:00
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filter.FilterFIFOAssignment = CAN_FILTER_FIFO0;
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2020-02-27 04:36:53 +00:00
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filter.FilterNumber = f;
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filter.FilterMode = CAN_FILTERMODE_IDMASK;
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filter.FilterScale = CAN_FILTERSCALE_16BIT;
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filter.FilterActivation = DISABLE;
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filter.BankNumber = bank;
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2014-11-21 22:24:23 +00:00
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HAL_CAN_ConfigFilter(NULL, &filter);
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}
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2019-09-16 00:56:38 +01:00
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int can_receive(CAN_HandleTypeDef *can, int fifo, CanRxMsgTypeDef *msg, uint8_t *data, uint32_t timeout_ms) {
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2018-03-15 05:34:07 +00:00
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volatile uint32_t *rfr;
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if (fifo == CAN_FIFO0) {
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2019-09-16 00:56:38 +01:00
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rfr = &can->Instance->RF0R;
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2018-03-15 05:34:07 +00:00
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} else {
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2019-09-16 00:56:38 +01:00
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rfr = &can->Instance->RF1R;
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2018-03-15 05:34:07 +00:00
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}
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// Wait for a message to become available, with timeout
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uint32_t start = HAL_GetTick();
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while ((*rfr & 3) == 0) {
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MICROPY_EVENT_POLL_HOOK
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if (HAL_GetTick() - start >= timeout_ms) {
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return -MP_ETIMEDOUT;
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}
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}
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// Read message data
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2019-09-16 00:56:38 +01:00
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CAN_FIFOMailBox_TypeDef *box = &can->Instance->sFIFOMailBox[fifo];
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2018-03-15 05:34:07 +00:00
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msg->IDE = box->RIR & 4;
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if (msg->IDE == CAN_ID_STD) {
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msg->StdId = box->RIR >> 21;
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} else {
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msg->ExtId = box->RIR >> 3;
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}
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msg->RTR = box->RIR & 2;
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msg->DLC = box->RDTR & 0xf;
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msg->FMI = box->RDTR >> 8 & 0xff;
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2018-03-16 12:48:29 +00:00
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uint32_t rdlr = box->RDLR;
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2019-09-16 00:56:38 +01:00
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data[0] = rdlr;
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data[1] = rdlr >> 8;
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data[2] = rdlr >> 16;
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data[3] = rdlr >> 24;
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2018-03-16 12:48:29 +00:00
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uint32_t rdhr = box->RDHR;
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2019-09-16 00:56:38 +01:00
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data[4] = rdhr;
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data[5] = rdhr >> 8;
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data[6] = rdhr >> 16;
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data[7] = rdhr >> 24;
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2018-03-15 05:34:07 +00:00
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// Release (free) message from FIFO
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*rfr |= CAN_RF0R_RFOM0;
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return 0; // success
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}
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2015-04-16 23:52:43 +01:00
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// We have our own version of CAN transmit so we can handle Timeout=0 correctly.
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2019-09-12 04:54:35 +01:00
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HAL_StatusTypeDef CAN_Transmit(CAN_HandleTypeDef *hcan, uint32_t Timeout) {
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2015-04-16 23:52:43 +01:00
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uint32_t transmitmailbox;
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uint32_t tickstart;
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uint32_t rqcpflag;
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uint32_t txokflag;
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// Check the parameters
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assert_param(IS_CAN_IDTYPE(hcan->pTxMsg->IDE));
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assert_param(IS_CAN_RTR(hcan->pTxMsg->RTR));
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assert_param(IS_CAN_DLC(hcan->pTxMsg->DLC));
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// Select one empty transmit mailbox
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2020-02-27 04:36:53 +00:00
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if ((hcan->Instance->TSR & CAN_TSR_TME0) == CAN_TSR_TME0) {
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2015-04-16 23:52:43 +01:00
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transmitmailbox = CAN_TXMAILBOX_0;
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rqcpflag = CAN_FLAG_RQCP0;
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txokflag = CAN_FLAG_TXOK0;
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2020-02-27 04:36:53 +00:00
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} else if ((hcan->Instance->TSR & CAN_TSR_TME1) == CAN_TSR_TME1) {
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2015-04-16 23:52:43 +01:00
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transmitmailbox = CAN_TXMAILBOX_1;
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rqcpflag = CAN_FLAG_RQCP1;
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txokflag = CAN_FLAG_TXOK1;
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2020-02-27 04:36:53 +00:00
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} else if ((hcan->Instance->TSR & CAN_TSR_TME2) == CAN_TSR_TME2) {
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2015-04-16 23:52:43 +01:00
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transmitmailbox = CAN_TXMAILBOX_2;
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rqcpflag = CAN_FLAG_RQCP2;
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txokflag = CAN_FLAG_TXOK2;
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} else {
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transmitmailbox = CAN_TXSTATUS_NOMAILBOX;
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}
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if (transmitmailbox != CAN_TXSTATUS_NOMAILBOX) {
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// Set up the Id
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hcan->Instance->sTxMailBox[transmitmailbox].TIR &= CAN_TI0R_TXRQ;
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if (hcan->pTxMsg->IDE == CAN_ID_STD) {
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assert_param(IS_CAN_STDID(hcan->pTxMsg->StdId));
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hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->StdId << 21) | \
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2020-02-27 04:36:53 +00:00
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hcan->pTxMsg->RTR);
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2015-04-16 23:52:43 +01:00
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} else {
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assert_param(IS_CAN_EXTID(hcan->pTxMsg->ExtId));
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hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->ExtId << 3) | \
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2020-02-27 04:36:53 +00:00
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hcan->pTxMsg->IDE | \
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hcan->pTxMsg->RTR);
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2015-04-16 23:52:43 +01:00
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}
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// Set up the DLC
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hcan->pTxMsg->DLC &= (uint8_t)0x0000000F;
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hcan->Instance->sTxMailBox[transmitmailbox].TDTR &= (uint32_t)0xFFFFFFF0;
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hcan->Instance->sTxMailBox[transmitmailbox].TDTR |= hcan->pTxMsg->DLC;
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// Set up the data field
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hcan->Instance->sTxMailBox[transmitmailbox].TDLR = (((uint32_t)hcan->pTxMsg->Data[3] << 24) |
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2020-02-27 04:36:53 +00:00
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((uint32_t)hcan->pTxMsg->Data[2] << 16) |
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((uint32_t)hcan->pTxMsg->Data[1] << 8) |
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((uint32_t)hcan->pTxMsg->Data[0]));
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2015-04-16 23:52:43 +01:00
|
|
|
hcan->Instance->sTxMailBox[transmitmailbox].TDHR = (((uint32_t)hcan->pTxMsg->Data[7] << 24) |
|
2020-02-27 04:36:53 +00:00
|
|
|
((uint32_t)hcan->pTxMsg->Data[6] << 16) |
|
|
|
|
((uint32_t)hcan->pTxMsg->Data[5] << 8) |
|
|
|
|
((uint32_t)hcan->pTxMsg->Data[4]));
|
2015-04-16 23:52:43 +01:00
|
|
|
// Request transmission
|
|
|
|
hcan->Instance->sTxMailBox[transmitmailbox].TIR |= CAN_TI0R_TXRQ;
|
|
|
|
|
|
|
|
if (Timeout == 0) {
|
|
|
|
return HAL_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Get tick
|
|
|
|
tickstart = HAL_GetTick();
|
|
|
|
// Check End of transmission flag
|
|
|
|
while (!(__HAL_CAN_TRANSMIT_STATUS(hcan, transmitmailbox))) {
|
|
|
|
// Check for the Timeout
|
|
|
|
if (Timeout != HAL_MAX_DELAY) {
|
|
|
|
if ((HAL_GetTick() - tickstart) > Timeout) {
|
|
|
|
// When the timeout expires, we try to abort the transmission of the packet
|
|
|
|
__HAL_CAN_CANCEL_TRANSMIT(hcan, transmitmailbox);
|
|
|
|
while (!__HAL_CAN_GET_FLAG(hcan, rqcpflag)) {
|
|
|
|
}
|
|
|
|
if (__HAL_CAN_GET_FLAG(hcan, txokflag)) {
|
|
|
|
// The abort attempt failed and the message was sent properly
|
|
|
|
return HAL_OK;
|
|
|
|
} else {
|
|
|
|
return HAL_TIMEOUT;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return HAL_OK;
|
|
|
|
} else {
|
|
|
|
return HAL_BUSY;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-09-12 04:54:35 +01:00
|
|
|
STATIC void can_rx_irq_handler(uint can_id, uint fifo_id) {
|
2015-01-15 22:16:57 +00:00
|
|
|
mp_obj_t callback;
|
|
|
|
pyb_can_obj_t *self;
|
|
|
|
mp_obj_t irq_reason = MP_OBJ_NEW_SMALL_INT(0);
|
|
|
|
byte *state;
|
|
|
|
|
|
|
|
self = MP_STATE_PORT(pyb_can_obj_all)[can_id - 1];
|
|
|
|
|
|
|
|
if (fifo_id == CAN_FIFO0) {
|
|
|
|
callback = self->rxcallback0;
|
|
|
|
state = &self->rx_state0;
|
|
|
|
} else {
|
|
|
|
callback = self->rxcallback1;
|
|
|
|
state = &self->rx_state1;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (*state) {
|
|
|
|
case RX_STATE_FIFO_EMPTY:
|
|
|
|
__HAL_CAN_DISABLE_IT(&self->can, (fifo_id == CAN_FIFO0) ? CAN_IT_FMP0 : CAN_IT_FMP1);
|
|
|
|
irq_reason = MP_OBJ_NEW_SMALL_INT(0);
|
|
|
|
*state = RX_STATE_MESSAGE_PENDING;
|
|
|
|
break;
|
|
|
|
case RX_STATE_MESSAGE_PENDING:
|
|
|
|
__HAL_CAN_DISABLE_IT(&self->can, (fifo_id == CAN_FIFO0) ? CAN_IT_FF0 : CAN_IT_FF1);
|
2016-09-09 11:42:32 +01:00
|
|
|
__HAL_CAN_CLEAR_FLAG(&self->can, (fifo_id == CAN_FIFO0) ? CAN_FLAG_FF0 : CAN_FLAG_FF1);
|
2015-01-15 22:16:57 +00:00
|
|
|
irq_reason = MP_OBJ_NEW_SMALL_INT(1);
|
|
|
|
*state = RX_STATE_FIFO_FULL;
|
|
|
|
break;
|
|
|
|
case RX_STATE_FIFO_FULL:
|
|
|
|
__HAL_CAN_DISABLE_IT(&self->can, (fifo_id == CAN_FIFO0) ? CAN_IT_FOV0 : CAN_IT_FOV1);
|
2016-09-09 11:42:32 +01:00
|
|
|
__HAL_CAN_CLEAR_FLAG(&self->can, (fifo_id == CAN_FIFO0) ? CAN_FLAG_FOV0 : CAN_FLAG_FOV1);
|
2015-01-15 22:16:57 +00:00
|
|
|
irq_reason = MP_OBJ_NEW_SMALL_INT(2);
|
|
|
|
*state = RX_STATE_FIFO_OVERFLOW;
|
|
|
|
break;
|
|
|
|
case RX_STATE_FIFO_OVERFLOW:
|
|
|
|
// This should never happen
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2019-09-12 04:54:35 +01:00
|
|
|
pyb_can_handle_callback(self, fifo_id, callback, irq_reason);
|
2015-01-15 22:16:57 +00:00
|
|
|
}
|
|
|
|
|
2019-09-12 04:54:35 +01:00
|
|
|
STATIC void can_sce_irq_handler(uint can_id) {
|
2018-03-16 07:28:35 +00:00
|
|
|
pyb_can_obj_t *self = MP_STATE_PORT(pyb_can_obj_all)[can_id - 1];
|
|
|
|
if (self) {
|
|
|
|
self->can.Instance->MSR = CAN_MSR_ERRI;
|
|
|
|
uint32_t esr = self->can.Instance->ESR;
|
|
|
|
if (esr & CAN_ESR_BOFF) {
|
|
|
|
++self->num_bus_off;
|
|
|
|
} else if (esr & CAN_ESR_EPVF) {
|
|
|
|
++self->num_error_passive;
|
|
|
|
} else if (esr & CAN_ESR_EWGF) {
|
|
|
|
++self->num_error_warning;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-09-12 04:54:35 +01:00
|
|
|
#if defined(MICROPY_HW_CAN1_TX)
|
|
|
|
void CAN1_RX0_IRQHandler(void) {
|
|
|
|
IRQ_ENTER(CAN1_RX0_IRQn);
|
|
|
|
can_rx_irq_handler(PYB_CAN_1, CAN_FIFO0);
|
|
|
|
IRQ_EXIT(CAN1_RX0_IRQn);
|
|
|
|
}
|
2014-10-02 14:34:15 +01:00
|
|
|
|
2019-09-12 04:54:35 +01:00
|
|
|
void CAN1_RX1_IRQHandler(void) {
|
|
|
|
IRQ_ENTER(CAN1_RX1_IRQn);
|
|
|
|
can_rx_irq_handler(PYB_CAN_1, CAN_FIFO1);
|
|
|
|
IRQ_EXIT(CAN1_RX1_IRQn);
|
|
|
|
}
|
|
|
|
|
|
|
|
void CAN1_SCE_IRQHandler(void) {
|
|
|
|
IRQ_ENTER(CAN1_SCE_IRQn);
|
|
|
|
can_sce_irq_handler(PYB_CAN_1);
|
|
|
|
IRQ_EXIT(CAN1_SCE_IRQn);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#if defined(MICROPY_HW_CAN2_TX)
|
|
|
|
void CAN2_RX0_IRQHandler(void) {
|
|
|
|
IRQ_ENTER(CAN2_RX0_IRQn);
|
|
|
|
can_rx_irq_handler(PYB_CAN_2, CAN_FIFO0);
|
|
|
|
IRQ_EXIT(CAN2_RX0_IRQn);
|
|
|
|
}
|
|
|
|
|
|
|
|
void CAN2_RX1_IRQHandler(void) {
|
|
|
|
IRQ_ENTER(CAN2_RX1_IRQn);
|
|
|
|
can_rx_irq_handler(PYB_CAN_2, CAN_FIFO1);
|
|
|
|
IRQ_EXIT(CAN2_RX1_IRQn);
|
|
|
|
}
|
|
|
|
|
|
|
|
void CAN2_SCE_IRQHandler(void) {
|
|
|
|
IRQ_ENTER(CAN2_SCE_IRQn);
|
|
|
|
can_sce_irq_handler(PYB_CAN_2);
|
|
|
|
IRQ_EXIT(CAN2_SCE_IRQn);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#if defined(MICROPY_HW_CAN3_TX)
|
|
|
|
void CAN3_RX0_IRQHandler(void) {
|
|
|
|
IRQ_ENTER(CAN3_RX0_IRQn);
|
|
|
|
can_rx_irq_handler(PYB_CAN_3, CAN_FIFO0);
|
|
|
|
IRQ_EXIT(CAN3_RX0_IRQn);
|
|
|
|
}
|
|
|
|
|
|
|
|
void CAN3_RX1_IRQHandler(void) {
|
|
|
|
IRQ_ENTER(CAN3_RX1_IRQn);
|
|
|
|
can_rx_irq_handler(PYB_CAN_3, CAN_FIFO1);
|
|
|
|
IRQ_EXIT(CAN3_RX1_IRQn);
|
|
|
|
}
|
|
|
|
|
|
|
|
void CAN3_SCE_IRQHandler(void) {
|
|
|
|
IRQ_ENTER(CAN3_SCE_IRQn);
|
|
|
|
can_sce_irq_handler(PYB_CAN_3);
|
|
|
|
IRQ_EXIT(CAN3_SCE_IRQn);
|
|
|
|
}
|
|
|
|
#endif
|
2014-10-05 18:05:26 +01:00
|
|
|
|
2019-09-16 00:56:38 +01:00
|
|
|
#endif // !MICROPY_HW_ENABLE_FDCAN
|
|
|
|
|
2014-10-05 18:05:26 +01:00
|
|
|
#endif // MICROPY_HW_ENABLE_CAN
|