2018-03-09 04:07:33 +00:00
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/*
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GNU linker script for STM32H743
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*/
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/* Specify the memory areas */
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MEMORY
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{
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2021-08-19 16:12:19 +01:00
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FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1536K /* sectors (0-7) + (0-3) */
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FLASH_APP (rx) : ORIGIN = 0x08020000, LENGTH = 1408K /* sectors (1-7) + (0-3) */
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FLASH_FS (r) : ORIGIN = 0x08180000, LENGTH = 512K /* sectors (4-7) */
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2018-03-09 04:07:33 +00:00
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DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K /* Used for storage cache */
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2021-09-10 07:06:59 +01:00
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RAM (xrw) : ORIGIN = 0x24000000, LENGTH = 512K /* AXI SRAM */
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2020-07-24 21:53:43 +01:00
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RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 288K
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2018-03-09 04:07:33 +00:00
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}
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/* produce a link error if there is not this amount of RAM for these sections */
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_minimum_stack_size = 2K;
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_minimum_heap_size = 16K;
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2019-05-14 15:43:38 +01:00
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/* Define the stack. The stack is full descending so begins just above last byte
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of RAM. Note that EABI requires the stack to be 8-byte aligned for a call. */
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2019-06-22 12:26:03 +01:00
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_estack = ORIGIN(RAM) + LENGTH(RAM) - _estack_reserve;
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2019-05-14 15:43:38 +01:00
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_sstack = _estack - 16K; /* tunable */
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2018-03-09 04:07:33 +00:00
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/* RAM extents for the garbage collector */
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_ram_start = ORIGIN(RAM);
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_ram_end = ORIGIN(RAM) + LENGTH(RAM);
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_heap_start = _ebss; /* heap starts just after statically allocated memory */
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2019-05-14 15:43:38 +01:00
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_heap_end = _sstack;
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2020-07-24 21:53:43 +01:00
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2021-08-19 16:12:19 +01:00
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/* Location of filesystem RAM cache */
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2021-11-29 02:10:36 +00:00
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_micropy_hw_internal_flash_storage_ram_cache_start = ORIGIN(DTCM);
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_micropy_hw_internal_flash_storage_ram_cache_end = ORIGIN(DTCM) + LENGTH(DTCM);
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2021-08-19 16:12:19 +01:00
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/* Location of filesystem flash storage */
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2021-11-29 02:10:36 +00:00
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_micropy_hw_internal_flash_storage_start = ORIGIN(FLASH_FS);
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_micropy_hw_internal_flash_storage_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);
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2021-08-19 16:12:19 +01:00
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2020-07-24 21:53:43 +01:00
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/* Define output sections */
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SECTIONS
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{
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.eth_buffers (NOLOAD) : {
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. = ABSOLUTE(0x30040000);
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*eth.o*(.bss.eth_dma)
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} >RAM_D2
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}
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