2014-03-12 06:55:41 +00:00
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/**
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******************************************************************************
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* @file stm32f4xx_hal_flash_ex.c
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* @author MCD Application Team
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2014-08-06 22:33:31 +01:00
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* @version V1.1.0
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* @date 19-June-2014
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2014-03-12 06:55:41 +00:00
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* @brief Extended FLASH HAL module driver.
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* This file provides firmware functions to manage the following
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* functionalities of the FLASH extension peripheral:
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* + Extended programming operations functions
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*
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@verbatim
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==============================================================================
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##### Flash Extension features #####
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==============================================================================
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[..] Comparing to other previous devices, the FLASH interface for STM32F427xx/437xx and
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STM32F429xx/439xx devices contains the following additional features
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(+) Capacity up to 2 Mbyte with dual bank architecture supporting read-while-write
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capability (RWW)
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(+) Dual bank memory organization
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(+) PCROP protection for all banks
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##### How to use this driver #####
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==============================================================================
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[..] This driver provides functions to configure and program the FLASH memory
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of all STM32F427xx/437xx andSTM32F429xx/439xx devices. It includes
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(#) FLASH Memory Erase functions:
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(++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and
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HAL_FLASH_Lock() functions
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(++) Erase function: Erase sector, erase all sectors
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2014-08-06 22:33:31 +01:00
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(++) There are two modes of erase :
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2014-03-12 06:55:41 +00:00
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(+++) Polling Mode using HAL_FLASHEx_Erase()
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(+++) Interrupt Mode using HAL_FLASHEx_Erase_IT()
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(#) Option Bytes Programming functions: Use HAL_FLASHEx_OBProgram() to :
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(++) Set/Reset the write protection
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(++) Set the Read protection Level
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(++) Set the BOR level
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(++) Program the user Option Bytes
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(#) Advanced Option Bytes Programming functions: Use HAL_FLASHEx_AdvOBProgram() to :
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(++) Extended space (bank 2) erase function
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(++) Full FLASH space (2 Mo) erase (bank 1 and bank 2)
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(++) Dual Boot actrivation
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(++) Write protection configuration for bank 2
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(++) PCROP protection configuration and control for both banks
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@endverbatim
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f4xx_hal.h"
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/** @addtogroup STM32F4xx_HAL_Driver
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* @{
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*/
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/** @defgroup FLASHEx
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* @brief FLASH HAL Extension module driver
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* @{
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*/
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#ifdef HAL_FLASH_MODULE_ENABLED
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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#define SECTOR_MASK ((uint32_t)0xFFFFFF07)
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#define HAL_FLASH_TIMEOUT_VALUE ((uint32_t)50000)/* 50 s */
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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extern FLASH_ProcessTypeDef pFlash;
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/* Private function prototypes -----------------------------------------------*/
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/* Option bytes control */
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static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks);
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static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks);
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static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks);
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static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level);
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static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby);
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static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level);
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static uint8_t FLASH_OB_GetUser(void);
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static uint16_t FLASH_OB_GetWRP(void);
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static FlagStatus FLASH_OB_GetRDP(void);
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static uint8_t FLASH_OB_GetBOR(void);
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2014-08-06 22:33:31 +01:00
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#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
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2014-03-12 06:55:41 +00:00
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static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector);
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static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector);
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2014-08-06 22:33:31 +01:00
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#endif /* STM32F401xC || STM32F401xE || STM32F411xE */
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2014-03-12 06:55:41 +00:00
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#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
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static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks);
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static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks);
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static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig);
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#endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
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/* Private functions ---------------------------------------------------------*/
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extern HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
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/** @defgroup FLASHEx_Private_Functions Extended FLASH Private functions
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* @{
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*/
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/** @defgroup FLASHEx_Group1 Extended IO operation functions
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* @brief Extended IO operation functions
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*
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@verbatim
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===============================================================================
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##### Extended programming operation functions #####
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===============================================================================
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[..]
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This subsection provides a set of functions allowing to manage the Extension FLASH
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programming operations Operations.
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@endverbatim
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* @{
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*/
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/**
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* @brief Perform a mass erase or erase the specified FLASH memory sectors
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* @param[in] pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that
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* contains the configuration information for the erasing.
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*
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* @param[out] SectorError: pointer to variable that
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* contains the configuration information on faulty sector in case of error
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* (0xFFFFFFFF means that all the sectors have been correctly erased)
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*
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2014-08-06 22:33:31 +01:00
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* @retval HAL Status
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2014-03-12 06:55:41 +00:00
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*/
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HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError)
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{
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HAL_StatusTypeDef status = HAL_ERROR;
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uint32_t index = 0;
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/* Process Locked */
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__HAL_LOCK(&pFlash);
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/* Check the parameters */
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assert_param(IS_TYPEERASE(pEraseInit->TypeErase));
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/* Wait for last operation to be completed */
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status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
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if (status == HAL_OK)
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{
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/*Initialization of SectorError variable*/
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*SectorError = 0xFFFFFFFF;
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if (pEraseInit->TypeErase == TYPEERASE_MASSERASE)
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{
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/*Mass erase to be done*/
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FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
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/* Wait for last operation to be completed */
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status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
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/* if the erase operation is completed, disable the MER Bit */
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FLASH->CR &= (~FLASH_MER_BIT);
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}
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else
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{
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/* Check the parameters */
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assert_param(IS_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
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/* Erase by sector by sector to be done*/
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for(index = pEraseInit->Sector; index < (pEraseInit->NbSectors + pEraseInit->Sector); index++)
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{
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FLASH_Erase_Sector(index, (uint8_t) pEraseInit->VoltageRange);
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/* Wait for last operation to be completed */
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status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
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/* If the erase operation is completed, disable the SER Bit */
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FLASH->CR &= (~FLASH_CR_SER);
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FLASH->CR &= SECTOR_MASK;
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if (status != HAL_OK)
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{
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/* In case of error, stop erase procedure and return the faulty sector*/
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*SectorError = index;
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break;
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}
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}
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}
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}
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/* Process Unlocked */
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__HAL_UNLOCK(&pFlash);
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return status;
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}
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/**
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* @brief Perform a mass erase or erase the specified FLASH memory sectors with interrupt enabled
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* @param pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that
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* contains the configuration information for the erasing.
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*
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2014-08-06 22:33:31 +01:00
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* @retval HAL Status
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2014-03-12 06:55:41 +00:00
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*/
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HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
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{
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HAL_StatusTypeDef status = HAL_OK;
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/* Process Locked */
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__HAL_LOCK(&pFlash);
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/* Check the parameters */
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assert_param(IS_TYPEERASE(pEraseInit->TypeErase));
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/* Enable End of FLASH Operation interrupt */
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__HAL_FLASH_ENABLE_IT(FLASH_IT_EOP);
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/* Enable Error source interrupt */
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__HAL_FLASH_ENABLE_IT(FLASH_IT_ERR);
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/* Clear pending flags (if any) */
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__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR |\
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FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR| FLASH_FLAG_PGSERR);
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if (pEraseInit->TypeErase == TYPEERASE_MASSERASE)
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{
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/*Mass erase to be done*/
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pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE;
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pFlash.Bank = pEraseInit->Banks;
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FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
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}
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else
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{
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/* Erase by sector to be done*/
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/* Check the parameters */
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assert_param(IS_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
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pFlash.ProcedureOnGoing = FLASH_PROC_SECTERASE;
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pFlash.NbSectorsToErase = pEraseInit->NbSectors;
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pFlash.Sector = pEraseInit->Sector;
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pFlash.VoltageForErase = (uint8_t)pEraseInit->VoltageRange;
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/*Erase 1st sector and wait for IT*/
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FLASH_Erase_Sector(pEraseInit->Sector, pEraseInit->VoltageRange);
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}
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return status;
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}
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/**
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* @brief Program option bytes
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* @param pOBInit: pointer to an FLASH_OBInitStruct structure that
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* contains the configuration information for the programming.
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*
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2014-08-06 22:33:31 +01:00
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* @retval HAL Status
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2014-03-12 06:55:41 +00:00
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*/
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HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit)
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{
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HAL_StatusTypeDef status = HAL_ERROR;
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/* Process Locked */
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__HAL_LOCK(&pFlash);
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/* Check the parameters */
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assert_param(IS_OPTIONBYTE(pOBInit->OptionType));
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/*Write protection configuration*/
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if((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP)
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{
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assert_param(IS_WRPSTATE(pOBInit->WRPState));
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if (pOBInit->WRPState == WRPSTATE_ENABLE)
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{
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/*Enable of Write protection on the selected Sector*/
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status = FLASH_OB_EnableWRP(pOBInit->WRPSector, pOBInit->Banks);
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}
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else
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{
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/*Disable of Write protection on the selected Sector*/
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status = FLASH_OB_DisableWRP(pOBInit->WRPSector, pOBInit->Banks);
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}
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}
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/*Read protection configuration*/
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if((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP)
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{
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status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel);
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}
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/*USER configuration*/
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if((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER)
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{
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status = FLASH_OB_UserConfig(pOBInit->USERConfig&OB_IWDG_SW,
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pOBInit->USERConfig&OB_STOP_NO_RST,
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pOBInit->USERConfig&OB_STDBY_NO_RST);
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}
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/*BOR Level configuration*/
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if((pOBInit->OptionType & OPTIONBYTE_BOR) == OPTIONBYTE_BOR)
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{
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status = FLASH_OB_BOR_LevelConfig(pOBInit->BORLevel);
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}
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/* Process Unlocked */
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__HAL_UNLOCK(&pFlash);
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return status;
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}
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/**
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* @brief Get the Option byte configuration
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* @param pOBInit: pointer to an FLASH_OBInitStruct structure that
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* contains the configuration information for the programming.
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*
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* @retval None
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*/
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void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
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{
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pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_BOR;
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/*Get WRP*/
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pOBInit->WRPSector = FLASH_OB_GetWRP();
|
|
|
|
|
|
|
|
/*Get RDP Level*/
|
|
|
|
pOBInit->RDPLevel = FLASH_OB_GetRDP();
|
|
|
|
|
|
|
|
/*Get USER*/
|
|
|
|
pOBInit->USERConfig = FLASH_OB_GetUser();
|
|
|
|
|
|
|
|
/*Get BOR Level*/
|
|
|
|
pOBInit->BORLevel = FLASH_OB_GetBOR();
|
|
|
|
}
|
|
|
|
|
2014-08-06 22:33:31 +01:00
|
|
|
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
|
|
|
|
defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
|
2014-03-12 06:55:41 +00:00
|
|
|
/**
|
|
|
|
* @brief Program option bytes
|
|
|
|
* @param pAdvOBInit: pointer to an FLASH_AdvOBProgramInitTypeDef structure that
|
|
|
|
* contains the configuration information for the programming.
|
|
|
|
*
|
2014-08-06 22:33:31 +01:00
|
|
|
* @retval HAL Status
|
2014-03-12 06:55:41 +00:00
|
|
|
*/
|
|
|
|
HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
|
|
|
|
{
|
|
|
|
HAL_StatusTypeDef status = HAL_ERROR;
|
|
|
|
|
|
|
|
/* Check the parameters */
|
|
|
|
assert_param(IS_OBEX(pAdvOBInit->OptionType));
|
|
|
|
|
|
|
|
/*Program PCROP option byte*/
|
|
|
|
if (((pAdvOBInit->OptionType) & OBEX_PCROP) == OBEX_PCROP)
|
|
|
|
{
|
|
|
|
/* Check the parameters */
|
|
|
|
assert_param(IS_PCROPSTATE(pAdvOBInit->PCROPState));
|
|
|
|
if ((pAdvOBInit->PCROPState) == PCROPSTATE_ENABLE)
|
|
|
|
{
|
|
|
|
/*Enable of Write protection on the selected Sector*/
|
2014-08-06 22:33:31 +01:00
|
|
|
#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
|
2014-03-12 06:55:41 +00:00
|
|
|
status = FLASH_OB_EnablePCROP(pAdvOBInit->Sectors);
|
|
|
|
#else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
|
|
|
|
status = FLASH_OB_EnablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks);
|
2014-08-06 22:33:31 +01:00
|
|
|
#endif /* STM32F401xC || STM32F401xE || STM32F411xE */
|
2014-03-12 06:55:41 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/*Disable of Write protection on the selected Sector*/
|
2014-08-06 22:33:31 +01:00
|
|
|
#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
|
2014-03-12 06:55:41 +00:00
|
|
|
status = FLASH_OB_DisablePCROP(pAdvOBInit->Sectors);
|
|
|
|
#else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
|
|
|
|
status = FLASH_OB_DisablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks);
|
2014-08-06 22:33:31 +01:00
|
|
|
#endif /* STM32F401xC || STM32F401xE || STM32F411xE */
|
2014-03-12 06:55:41 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
|
|
|
|
/*Program BOOT config option byte*/
|
|
|
|
if (((pAdvOBInit->OptionType) & OBEX_BOOTCONFIG) == OBEX_BOOTCONFIG)
|
|
|
|
{
|
|
|
|
status = FLASH_OB_BootConfig(pAdvOBInit->BootConfig);
|
|
|
|
}
|
|
|
|
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
|
|
|
|
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Get the OBEX byte configuration
|
|
|
|
* @param pAdvOBInit: pointer to an FLASH_AdvOBProgramInitTypeDef structure that
|
|
|
|
* contains the configuration information for the programming.
|
|
|
|
*
|
|
|
|
* @retval None
|
|
|
|
*/
|
|
|
|
void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
|
|
|
|
{
|
2014-08-06 22:33:31 +01:00
|
|
|
#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
|
2014-03-12 06:55:41 +00:00
|
|
|
/*Get Sector*/
|
|
|
|
pAdvOBInit->Sectors = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
|
|
|
|
#else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
|
|
|
|
/*Get Sector for Bank1*/
|
|
|
|
pAdvOBInit->SectorsBank1 = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
|
|
|
|
|
|
|
|
/*Get Sector for Bank2*/
|
|
|
|
pAdvOBInit->SectorsBank2 = (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
|
|
|
|
|
|
|
|
/*Get Boot config OB*/
|
|
|
|
pAdvOBInit->BootConfig = *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS;
|
2014-08-06 22:33:31 +01:00
|
|
|
#endif /* STM32F401xC || STM32F401xE || STM32F411xE */
|
2014-03-12 06:55:41 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Select the Protection Mode
|
|
|
|
*
|
|
|
|
* @note After PCROP activated Option Byte modification NOT POSSIBLE! excepted
|
|
|
|
* Global Read Out Protection modification (from level1 to level0)
|
|
|
|
* @note Once SPRMOD bit is active unprotection of a protected sector is not possible
|
|
|
|
* @note Read a prtotected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
|
|
|
|
* @note This function can be used only for STM32F427xx/STM32F429xx/STM32F437xx/STM32F439xx/STM32F401xx devices.
|
|
|
|
*
|
|
|
|
* @param None
|
2014-08-06 22:33:31 +01:00
|
|
|
* @retval HAL Status
|
2014-03-12 06:55:41 +00:00
|
|
|
*/
|
|
|
|
HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void)
|
|
|
|
{
|
|
|
|
uint8_t optiontmp = 0xFF;
|
|
|
|
|
|
|
|
/* Mask SPRMOD bit */
|
|
|
|
optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F);
|
|
|
|
|
|
|
|
/* Update Option Byte */
|
|
|
|
*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_SELECTED | optiontmp);
|
|
|
|
|
|
|
|
return HAL_OK;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Deselect the Protection Mode
|
|
|
|
*
|
|
|
|
* @note After PCROP activated Option Byte modification NOT POSSIBLE! excepted
|
|
|
|
* Global Read Out Protection modification (from level1 to level0)
|
|
|
|
* @note Once SPRMOD bit is active unprotection of a protected sector is not possible
|
|
|
|
* @note Read a prtotected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
|
|
|
|
* @note This function can be used only for STM32F427xx/STM32F429xx/STM32F437xx/STM32F439xx/STM32F401xx devices.
|
|
|
|
*
|
|
|
|
* @param None
|
2014-08-06 22:33:31 +01:00
|
|
|
* @retval HAL Status
|
2014-03-12 06:55:41 +00:00
|
|
|
*/
|
|
|
|
HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void)
|
|
|
|
{
|
|
|
|
uint8_t optiontmp = 0xFF;
|
|
|
|
|
|
|
|
/* Mask SPRMOD bit */
|
|
|
|
optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F);
|
|
|
|
|
|
|
|
/* Update Option Byte */
|
|
|
|
*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_DESELECTED | optiontmp);
|
|
|
|
|
|
|
|
return HAL_OK;
|
|
|
|
}
|
|
|
|
|
2014-08-06 22:33:31 +01:00
|
|
|
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F411xE */
|
2014-03-12 06:55:41 +00:00
|
|
|
|
|
|
|
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Returns the FLASH Write Protection Option Bytes value for Bank 2
|
|
|
|
* @note This function can be used only for STM32F427X and STM32F429X devices.
|
|
|
|
* @param None
|
|
|
|
* @retval The FLASH Write Protection Option Bytes value
|
|
|
|
*/
|
|
|
|
uint16_t HAL_FLASHEx_OB_GetBank2WRP(void)
|
|
|
|
{
|
|
|
|
/* Return the FLASH write protection Register value */
|
|
|
|
return (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
|
|
|
|
}
|
|
|
|
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @}
|
|
|
|
*/
|
|
|
|
|
|
|
|
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
|
|
|
|
/**
|
|
|
|
* @brief Full erase of FLASH memory sectors
|
|
|
|
* @param VoltageRange: The device voltage range which defines the erase parallelism.
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
* @arg VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
|
|
|
|
* the operation will be done by byte (8-bit)
|
|
|
|
* @arg VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
|
|
|
|
* the operation will be done by half word (16-bit)
|
|
|
|
* @arg VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
|
|
|
|
* the operation will be done by word (32-bit)
|
|
|
|
* @arg VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
|
|
|
|
* the operation will be done by double word (64-bit)
|
|
|
|
*
|
|
|
|
* @param Banks: Banks to be erased
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
* @arg FLASH_BANK_1: Bank1 to be erased
|
|
|
|
* @arg FLASH_BANK_2: Bank2 to be erased
|
|
|
|
* @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
|
|
|
|
*
|
2014-08-06 22:33:31 +01:00
|
|
|
* @retval HAL Status
|
2014-03-12 06:55:41 +00:00
|
|
|
*/
|
|
|
|
static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
|
|
|
|
{
|
|
|
|
uint32_t tmp_psize = 0;
|
|
|
|
|
|
|
|
/* Check the parameters */
|
|
|
|
assert_param(IS_VOLTAGERANGE(VoltageRange));
|
|
|
|
assert_param(IS_FLASH_BANK(Banks));
|
|
|
|
|
|
|
|
/* if the previous operation is completed, proceed to erase all sectors */
|
|
|
|
FLASH->CR &= CR_PSIZE_MASK;
|
|
|
|
FLASH->CR |= tmp_psize;
|
|
|
|
if(Banks == FLASH_BANK_BOTH)
|
|
|
|
{
|
|
|
|
/* bank1 & bank2 will be erased*/
|
|
|
|
FLASH->CR |= FLASH_MER_BIT;
|
|
|
|
}
|
|
|
|
else if(Banks == FLASH_BANK_1)
|
|
|
|
{
|
|
|
|
/*Only bank1 will be erased*/
|
|
|
|
FLASH->CR |= FLASH_CR_MER1;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/*Only bank2 will be erased*/
|
|
|
|
FLASH->CR |= FLASH_CR_MER2;
|
|
|
|
}
|
|
|
|
FLASH->CR |= FLASH_CR_STRT;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Erase the specified FLASH memory sector
|
|
|
|
* @param Sector: FLASH sector to erase
|
|
|
|
* The value of this parameter depend on device used within the same series
|
|
|
|
* @param VoltageRange: The device voltage range which defines the erase parallelism.
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
* @arg VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
|
|
|
|
* the operation will be done by byte (8-bit)
|
|
|
|
* @arg VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
|
|
|
|
* the operation will be done by half word (16-bit)
|
|
|
|
* @arg VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
|
|
|
|
* the operation will be done by word (32-bit)
|
|
|
|
* @arg VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
|
|
|
|
* the operation will be done by double word (64-bit)
|
|
|
|
*
|
|
|
|
* @retval None
|
|
|
|
*/
|
|
|
|
void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
|
|
|
|
{
|
|
|
|
uint32_t tmp_psize = 0;
|
|
|
|
|
|
|
|
/* Check the parameters */
|
|
|
|
assert_param(IS_FLASH_SECTOR(Sector));
|
|
|
|
assert_param(IS_VOLTAGERANGE(VoltageRange));
|
|
|
|
|
|
|
|
if(VoltageRange == VOLTAGE_RANGE_1)
|
|
|
|
{
|
|
|
|
tmp_psize = FLASH_PSIZE_BYTE;
|
|
|
|
}
|
|
|
|
else if(VoltageRange == VOLTAGE_RANGE_2)
|
|
|
|
{
|
|
|
|
tmp_psize = FLASH_PSIZE_HALF_WORD;
|
|
|
|
}
|
|
|
|
else if(VoltageRange == VOLTAGE_RANGE_3)
|
|
|
|
{
|
|
|
|
tmp_psize = FLASH_PSIZE_WORD;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Need to add offset of 4 when sector higher than FLASH_SECTOR_11 */
|
|
|
|
if (Sector > FLASH_SECTOR_11)
|
|
|
|
{
|
|
|
|
Sector += 4;
|
|
|
|
}
|
|
|
|
/* If the previous operation is completed, proceed to erase the sector */
|
|
|
|
FLASH->CR &= CR_PSIZE_MASK;
|
|
|
|
FLASH->CR |= tmp_psize;
|
|
|
|
FLASH->CR &= SECTOR_MASK;
|
|
|
|
FLASH->CR |= FLASH_CR_SER | (Sector << POSITION_VAL(FLASH_CR_SNB));
|
|
|
|
FLASH->CR |= FLASH_CR_STRT;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Enable the write protection of the desired bank1 or bank 2 sectors
|
|
|
|
*
|
|
|
|
* @note When the memory read protection level is selected (RDP level = 1),
|
|
|
|
* it is not possible to program or erase the flash sector i if CortexM4
|
|
|
|
* debug features are connected or boot code is executed in RAM, even if nWRPi = 1
|
|
|
|
* @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
|
|
|
|
*
|
|
|
|
* @param WRPSector: specifies the sector(s) to be write protected.
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
* @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23
|
|
|
|
* @arg OB_WRP_SECTOR_All
|
|
|
|
* @note BANK2 starts from OB_WRP_SECTOR_12
|
|
|
|
*
|
|
|
|
* @param Banks: Enable write protection on all the sectors for the specific bank
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
* @arg FLASH_BANK_1: WRP on all sectors of bank1
|
|
|
|
* @arg FLASH_BANK_2: WRP on all sectors of bank2
|
|
|
|
* @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
|
|
|
|
*
|
|
|
|
* @retval HAL FLASH State
|
|
|
|
*/
|
|
|
|
static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
|
|
|
|
{
|
|
|
|
HAL_StatusTypeDef status = HAL_OK;
|
|
|
|
|
|
|
|
/* Check the parameters */
|
|
|
|
assert_param(IS_OB_WRP_SECTOR(WRPSector));
|
|
|
|
assert_param(IS_FLASH_BANK(Banks));
|
|
|
|
|
|
|
|
/* Wait for last operation to be completed */
|
|
|
|
status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
|
|
|
|
|
|
|
|
if(status == HAL_OK)
|
|
|
|
{
|
|
|
|
if (((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) ||
|
|
|
|
(WRPSector < OB_WRP_SECTOR_12))
|
|
|
|
{
|
|
|
|
if (WRPSector == OB_WRP_SECTOR_All)
|
|
|
|
{
|
|
|
|
/*Write protection on all sector of BANK1*/
|
|
|
|
*(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~(WRPSector>>12));
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/*Write protection done on sectors of BANK1*/
|
|
|
|
*(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~WRPSector);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/*Write protection done on sectors of BANK2*/
|
|
|
|
*(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector>>12));
|
|
|
|
}
|
|
|
|
|
|
|
|
/*Write protection on all sector of BANK2*/
|
|
|
|
if ((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
|
|
|
|
{
|
|
|
|
/* Wait for last operation to be completed */
|
|
|
|
status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
|
|
|
|
|
|
|
|
if(status == HAL_OK)
|
|
|
|
{
|
|
|
|
*(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector>>12));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Disable the write protection of the desired bank1 or bank 2 sectors
|
|
|
|
*
|
|
|
|
* @note When the memory read protection level is selected (RDP level = 1),
|
|
|
|
* it is not possible to program or erase the flash sector i if CortexM4
|
|
|
|
* debug features are connected or boot code is executed in RAM, even if nWRPi = 1
|
|
|
|
* @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
|
|
|
|
*
|
|
|
|
* @param WRPSector: specifies the sector(s) to be write protected.
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
* @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23
|
|
|
|
* @arg OB_WRP_Sector_All
|
|
|
|
* @note BANK2 starts from OB_WRP_SECTOR_12
|
|
|
|
*
|
|
|
|
* @param Banks: Disable write protection on all the sectors for the specific bank
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
* @arg FLASH_BANK_1: Bank1 to be erased
|
|
|
|
* @arg FLASH_BANK_2: Bank2 to be erased
|
|
|
|
* @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
|
|
|
|
*
|
|
|
|
* @retval HAL Staus
|
|
|
|
*/
|
|
|
|
static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
|
|
|
|
{
|
|
|
|
HAL_StatusTypeDef status = HAL_OK;
|
|
|
|
|
|
|
|
/* Check the parameters */
|
|
|
|
assert_param(IS_OB_WRP_SECTOR(WRPSector));
|
|
|
|
assert_param(IS_FLASH_BANK(Banks));
|
|
|
|
|
|
|
|
/* Wait for last operation to be completed */
|
|
|
|
status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
|
|
|
|
|
|
|
|
if(status == HAL_OK)
|
|
|
|
{
|
|
|
|
if (((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) ||
|
|
|
|
(WRPSector < OB_WRP_SECTOR_12))
|
|
|
|
{
|
|
|
|
if (WRPSector == OB_WRP_SECTOR_All)
|
|
|
|
{
|
|
|
|
/*Write protection on all sector of BANK1*/
|
|
|
|
*(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/*Write protection done on sectors of BANK1*/
|
|
|
|
*(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/*Write protection done on sectors of BANK2*/
|
|
|
|
*(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*Write protection on all sector of BANK2*/
|
|
|
|
if ((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
|
|
|
|
{
|
|
|
|
/* Wait for last operation to be completed */
|
|
|
|
status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
|
|
|
|
|
|
|
|
if(status == HAL_OK)
|
|
|
|
{
|
|
|
|
*(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Configure the Dual Bank Boot.
|
|
|
|
*
|
|
|
|
* @note This function can be used only for STM32F42xxx/43xxx devices.
|
|
|
|
*
|
|
|
|
* @param BootConfig specifies the Dual Bank Boot Option byte.
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
* @arg OB_Dual_BootEnabled: Dual Bank Boot Enable
|
|
|
|
* @arg OB_Dual_BootDisabled: Dual Bank Boot Disabled
|
|
|
|
* @retval None
|
|
|
|
*/
|
|
|
|
static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig)
|
|
|
|
{
|
|
|
|
HAL_StatusTypeDef status = HAL_OK;
|
|
|
|
|
|
|
|
/* Check the parameters */
|
|
|
|
assert_param(IS_OB_BOOT(BootConfig));
|
|
|
|
|
|
|
|
/* Wait for last operation to be completed */
|
|
|
|
status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
|
|
|
|
|
|
|
|
if(status == HAL_OK)
|
|
|
|
{
|
|
|
|
/* Set Dual Bank Boot */
|
|
|
|
*(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BFB2);
|
|
|
|
*(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= BootConfig;
|
|
|
|
}
|
|
|
|
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Enable the read/write protection (PCROP) of the desired
|
|
|
|
* sectors of Bank 1 and/or Bank 2.
|
|
|
|
* @note This function can be used only for STM32F42xxx/43xxx devices.
|
|
|
|
* @param SectorBank1 Specifies the sector(s) to be read/write protected or unprotected for bank1.
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
* @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11
|
|
|
|
* @arg OB_PCROP_SECTOR__All
|
|
|
|
* @param SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2.
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
* @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23
|
|
|
|
* @arg OB_PCROP_SECTOR__All
|
|
|
|
* @param Banks Enable PCROP protection on all the sectors for the specific bank
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
* @arg FLASH_BANK_1: WRP on all sectors of bank1
|
|
|
|
* @arg FLASH_BANK_2: WRP on all sectors of bank2
|
|
|
|
* @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
|
|
|
|
*
|
2014-08-06 22:33:31 +01:00
|
|
|
* @retval HAL Status
|
2014-03-12 06:55:41 +00:00
|
|
|
*/
|
|
|
|
static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
|
|
|
|
{
|
|
|
|
HAL_StatusTypeDef status = HAL_OK;
|
|
|
|
|
|
|
|
assert_param(IS_FLASH_BANK(Banks));
|
|
|
|
|
|
|
|
/* Wait for last operation to be completed */
|
|
|
|
status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
|
|
|
|
|
|
|
|
if(status == HAL_OK)
|
|
|
|
{
|
|
|
|
if ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))
|
|
|
|
{
|
|
|
|
assert_param(IS_OB_PCROP(SectorBank1));
|
|
|
|
/*Write protection done on sectors of BANK1*/
|
|
|
|
*(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)SectorBank1;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
assert_param(IS_OB_PCROP(SectorBank2));
|
|
|
|
/*Write protection done on sectors of BANK2*/
|
|
|
|
*(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*Write protection on all sector of BANK2*/
|
|
|
|
if (Banks == FLASH_BANK_BOTH)
|
|
|
|
{
|
|
|
|
assert_param(IS_OB_PCROP(SectorBank2));
|
|
|
|
/* Wait for last operation to be completed */
|
|
|
|
status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
|
|
|
|
|
|
|
|
if(status == HAL_OK)
|
|
|
|
{
|
|
|
|
/*Write protection done on sectors of BANK2*/
|
|
|
|
*(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Disable the read/write protection (PCROP) of the desired
|
|
|
|
* sectors of Bank 1 and/or Bank 2.
|
|
|
|
* @note This function can be used only for STM32F42xxx/43xxx devices.
|
|
|
|
* @param SectorBank1 specifies the sector(s) to be read/write protected or unprotected for bank1.
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
* @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11
|
|
|
|
* @arg OB_PCROP_SECTOR__All
|
|
|
|
* @param SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2.
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
* @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23
|
|
|
|
* @arg OB_PCROP_SECTOR__All
|
|
|
|
* @param Banks Disable PCROP protection on all the sectors for the specific bank
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
* @arg FLASH_BANK_1: WRP on all sectors of bank1
|
|
|
|
* @arg FLASH_BANK_2: WRP on all sectors of bank2
|
|
|
|
* @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
|
|
|
|
*
|
2014-08-06 22:33:31 +01:00
|
|
|
* @retval HAL Status
|
2014-03-12 06:55:41 +00:00
|
|
|
*/
|
|
|
|
static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
|
|
|
|
{
|
|
|
|
HAL_StatusTypeDef status = HAL_OK;
|
|
|
|
|
|
|
|
/* Check the parameters */
|
|
|
|
assert_param(IS_FLASH_BANK(Banks));
|
|
|
|
|
|
|
|
/* Wait for last operation to be completed */
|
|
|
|
status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
|
|
|
|
|
|
|
|
if(status == HAL_OK)
|
|
|
|
{
|
|
|
|
if ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))
|
|
|
|
{
|
|
|
|
assert_param(IS_OB_PCROP(SectorBank1));
|
|
|
|
/*Write protection done on sectors of BANK1*/
|
|
|
|
*(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~SectorBank1);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/*Write protection done on sectors of BANK2*/
|
|
|
|
assert_param(IS_OB_PCROP(SectorBank2));
|
|
|
|
*(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*Write protection on all sector of BANK2*/
|
|
|
|
if (Banks == FLASH_BANK_BOTH)
|
|
|
|
{
|
|
|
|
assert_param(IS_OB_PCROP(SectorBank2));
|
|
|
|
/* Wait for last operation to be completed */
|
|
|
|
status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
|
|
|
|
|
|
|
|
if(status == HAL_OK)
|
|
|
|
{
|
|
|
|
/*Write protection done on sectors of BANK2*/
|
|
|
|
*(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
return status;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
|
|
|
|
|
2014-08-06 22:33:31 +01:00
|
|
|
#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx) ||\
|
|
|
|
defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
|
2014-03-12 06:55:41 +00:00
|
|
|
/**
|
|
|
|
* @brief Mass erase of FLASH memory
|
|
|
|
* @param VoltageRange: The device voltage range which defines the erase parallelism.
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
* @arg VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
|
|
|
|
* the operation will be done by byte (8-bit)
|
|
|
|
* @arg VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
|
|
|
|
* the operation will be done by half word (16-bit)
|
|
|
|
* @arg VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
|
|
|
|
* the operation will be done by word (32-bit)
|
|
|
|
* @arg VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
|
|
|
|
* the operation will be done by double word (64-bit)
|
|
|
|
*
|
|
|
|
* @param Banks: Banks to be erased
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
* @arg FLASH_BANK_1: Bank1 to be erased
|
|
|
|
*
|
|
|
|
* @retval None
|
|
|
|
*/
|
|
|
|
static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
|
|
|
|
{
|
|
|
|
uint32_t tmp_psize = 0;
|
|
|
|
|
|
|
|
/* Check the parameters */
|
|
|
|
assert_param(IS_VOLTAGERANGE(VoltageRange));
|
|
|
|
assert_param(IS_FLASH_BANK(Banks));
|
|
|
|
|
|
|
|
/* If the previous operation is completed, proceed to erase all sectors */
|
|
|
|
FLASH->CR &= CR_PSIZE_MASK;
|
|
|
|
FLASH->CR |= tmp_psize;
|
|
|
|
FLASH->CR |= FLASH_CR_MER;
|
|
|
|
FLASH->CR |= FLASH_CR_STRT;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Erase the specified FLASH memory sector
|
|
|
|
* @param Sector: FLASH sector to erase
|
|
|
|
* The value of this parameter depend on device used within the same series
|
|
|
|
* @param VoltageRange: The device voltage range which defines the erase parallelism.
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
* @arg VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
|
|
|
|
* the operation will be done by byte (8-bit)
|
|
|
|
* @arg VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
|
|
|
|
* the operation will be done by half word (16-bit)
|
|
|
|
* @arg VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
|
|
|
|
* the operation will be done by word (32-bit)
|
|
|
|
* @arg VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
|
|
|
|
* the operation will be done by double word (64-bit)
|
|
|
|
*
|
|
|
|
* @retval None
|
|
|
|
*/
|
|
|
|
void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
|
|
|
|
{
|
|
|
|
uint32_t tmp_psize = 0;
|
|
|
|
|
|
|
|
/* Check the parameters */
|
|
|
|
assert_param(IS_FLASH_SECTOR(Sector));
|
|
|
|
assert_param(IS_VOLTAGERANGE(VoltageRange));
|
|
|
|
|
|
|
|
if(VoltageRange == VOLTAGE_RANGE_1)
|
|
|
|
{
|
|
|
|
tmp_psize = FLASH_PSIZE_BYTE;
|
|
|
|
}
|
|
|
|
else if(VoltageRange == VOLTAGE_RANGE_2)
|
|
|
|
{
|
|
|
|
tmp_psize = FLASH_PSIZE_HALF_WORD;
|
|
|
|
}
|
|
|
|
else if(VoltageRange == VOLTAGE_RANGE_3)
|
|
|
|
{
|
|
|
|
tmp_psize = FLASH_PSIZE_WORD;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* If the previous operation is completed, proceed to erase the sector */
|
|
|
|
FLASH->CR &= CR_PSIZE_MASK;
|
|
|
|
FLASH->CR |= tmp_psize;
|
|
|
|
FLASH->CR &= SECTOR_MASK;
|
|
|
|
FLASH->CR |= FLASH_CR_SER | (Sector << POSITION_VAL(FLASH_CR_SNB));
|
|
|
|
FLASH->CR |= FLASH_CR_STRT;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Enable the write protection of the desired bank 1 sectors
|
|
|
|
*
|
|
|
|
* @note When the memory read protection level is selected (RDP level = 1),
|
|
|
|
* it is not possible to program or erase the flash sector i if CortexM4
|
|
|
|
* debug features are connected or boot code is executed in RAM, even if nWRPi = 1
|
|
|
|
* @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
|
|
|
|
*
|
|
|
|
* @param WRPSector: specifies the sector(s) to be write protected.
|
|
|
|
* The value of this parameter depend on device used within the same series
|
|
|
|
*
|
|
|
|
* @param Banks: Enable write protection on all the sectors for the specific bank
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
* @arg FLASH_BANK_1: WRP on all sectors of bank1
|
|
|
|
*
|
2014-08-06 22:33:31 +01:00
|
|
|
* @retval HAL Status
|
2014-03-12 06:55:41 +00:00
|
|
|
*/
|
|
|
|
static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
|
|
|
|
{
|
|
|
|
HAL_StatusTypeDef status = HAL_OK;
|
|
|
|
|
|
|
|
/* Check the parameters */
|
|
|
|
assert_param(IS_OB_WRP_SECTOR(WRPSector));
|
|
|
|
assert_param(IS_FLASH_BANK(Banks));
|
|
|
|
|
|
|
|
/* Wait for last operation to be completed */
|
|
|
|
status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
|
|
|
|
|
|
|
|
if(status == HAL_OK)
|
|
|
|
{
|
|
|
|
*(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~WRPSector);
|
|
|
|
}
|
|
|
|
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Disable the write protection of the desired bank 1 sectors
|
|
|
|
*
|
|
|
|
* @note When the memory read protection level is selected (RDP level = 1),
|
|
|
|
* it is not possible to program or erase the flash sector i if CortexM4
|
|
|
|
* debug features are connected or boot code is executed in RAM, even if nWRPi = 1
|
|
|
|
* @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
|
|
|
|
*
|
|
|
|
* @param WRPSector: specifies the sector(s) to be write protected.
|
|
|
|
* The value of this parameter depend on device used within the same series
|
|
|
|
*
|
|
|
|
* @param Banks: Enable write protection on all the sectors for the specific bank
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
* @arg FLASH_BANK_1: WRP on all sectors of bank1
|
|
|
|
*
|
2014-08-06 22:33:31 +01:00
|
|
|
* @retval HAL Status
|
2014-03-12 06:55:41 +00:00
|
|
|
*/
|
|
|
|
static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
|
|
|
|
{
|
|
|
|
HAL_StatusTypeDef status = HAL_OK;
|
|
|
|
|
|
|
|
/* Check the parameters */
|
|
|
|
assert_param(IS_OB_WRP_SECTOR(WRPSector));
|
|
|
|
assert_param(IS_FLASH_BANK(Banks));
|
|
|
|
|
|
|
|
/* Wait for last operation to be completed */
|
|
|
|
status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
|
|
|
|
|
|
|
|
if(status == HAL_OK)
|
|
|
|
{
|
|
|
|
*(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector;
|
|
|
|
}
|
|
|
|
|
|
|
|
return status;
|
|
|
|
}
|
2014-08-06 22:33:31 +01:00
|
|
|
#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F411xE */
|
2014-03-12 06:55:41 +00:00
|
|
|
|
2014-08-06 22:33:31 +01:00
|
|
|
#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
|
2014-03-12 06:55:41 +00:00
|
|
|
/**
|
|
|
|
* @brief Enable the read/write protection (PCROP) of the desired sectors.
|
|
|
|
* @note This function can be used only for STM32F401xx devices.
|
|
|
|
* @param Sector specifies the sector(s) to be read/write protected or unprotected.
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
* @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5
|
|
|
|
* @arg OB_PCROP_Sector_All
|
2014-08-06 22:33:31 +01:00
|
|
|
* @retval HAL Status
|
2014-03-12 06:55:41 +00:00
|
|
|
*/
|
|
|
|
static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector)
|
|
|
|
{
|
|
|
|
HAL_StatusTypeDef status = HAL_OK;
|
|
|
|
|
|
|
|
/* Check the parameters */
|
|
|
|
assert_param(IS_OB_PCROP(Sector));
|
|
|
|
|
|
|
|
/* Wait for last operation to be completed */
|
|
|
|
status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
|
|
|
|
|
|
|
|
if(status == HAL_OK)
|
|
|
|
{
|
|
|
|
*(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)Sector;
|
|
|
|
}
|
|
|
|
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Disable the read/write protection (PCROP) of the desired sectors.
|
|
|
|
* @note This function can be used only for STM32F401xx devices.
|
|
|
|
* @param Sector specifies the sector(s) to be read/write protected or unprotected.
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
* @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5
|
|
|
|
* @arg OB_PCROP_Sector_All
|
2014-08-06 22:33:31 +01:00
|
|
|
* @retval HAL Status
|
2014-03-12 06:55:41 +00:00
|
|
|
*/
|
|
|
|
static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector)
|
|
|
|
{
|
|
|
|
HAL_StatusTypeDef status = HAL_OK;
|
|
|
|
|
|
|
|
/* Check the parameters */
|
|
|
|
assert_param(IS_OB_PCROP(Sector));
|
|
|
|
|
|
|
|
/* Wait for last operation to be completed */
|
|
|
|
status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
|
|
|
|
|
|
|
|
if(status == HAL_OK)
|
|
|
|
{
|
|
|
|
*(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~Sector);
|
|
|
|
}
|
|
|
|
|
|
|
|
return status;
|
|
|
|
|
|
|
|
}
|
2014-08-06 22:33:31 +01:00
|
|
|
#endif /* STM32F401xC || STM32F401xE || STM32F411xE */
|
2014-03-12 06:55:41 +00:00
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Set the read protection level.
|
|
|
|
* @param Level: specifies the read protection level.
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
* @arg OB_RDP_LEVEL_0: No protection
|
|
|
|
* @arg OB_RDP_LEVEL_1: Read protection of the memory
|
|
|
|
* @arg OB_RDP_LEVEL_2: Full chip protection
|
|
|
|
*
|
|
|
|
* @note WARNING: When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0
|
|
|
|
*
|
2014-08-06 22:33:31 +01:00
|
|
|
* @retval HAL Status
|
2014-03-12 06:55:41 +00:00
|
|
|
*/
|
|
|
|
static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level)
|
|
|
|
{
|
|
|
|
HAL_StatusTypeDef status = HAL_OK;
|
|
|
|
|
|
|
|
/* Check the parameters */
|
|
|
|
assert_param(IS_OB_RDP_LEVEL(Level));
|
|
|
|
|
|
|
|
/* Wait for last operation to be completed */
|
|
|
|
status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
|
|
|
|
|
|
|
|
if(status == HAL_OK)
|
|
|
|
{
|
|
|
|
*(__IO uint8_t*)OPTCR_BYTE1_ADDRESS = Level;
|
|
|
|
}
|
|
|
|
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
|
|
|
|
* @param Iwdg: Selects the IWDG mode
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
* @arg OB_IWDG_SW: Software IWDG selected
|
|
|
|
* @arg OB_IWDG_HW: Hardware IWDG selected
|
|
|
|
* @param Stop: Reset event when entering STOP mode.
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
* @arg OB_STOP_NO_RST: No reset generated when entering in STOP
|
|
|
|
* @arg OB_STOP_RST: Reset generated when entering in STOP
|
|
|
|
* @param Stdby: Reset event when entering Standby mode.
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
* @arg OB_STDBY_NO_RST: No reset generated when entering in STANDBY
|
|
|
|
* @arg OB_STDBY_RST: Reset generated when entering in STANDBY
|
2014-08-06 22:33:31 +01:00
|
|
|
* @retval HAL Status
|
2014-03-12 06:55:41 +00:00
|
|
|
*/
|
|
|
|
static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby)
|
|
|
|
{
|
|
|
|
uint8_t optiontmp = 0xFF;
|
|
|
|
HAL_StatusTypeDef status = HAL_OK;
|
|
|
|
|
|
|
|
/* Check the parameters */
|
|
|
|
assert_param(IS_OB_IWDG_SOURCE(Iwdg));
|
|
|
|
assert_param(IS_OB_STOP_SOURCE(Stop));
|
|
|
|
assert_param(IS_OB_STDBY_SOURCE(Stdby));
|
|
|
|
|
|
|
|
/* Wait for last operation to be completed */
|
|
|
|
status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
|
|
|
|
|
|
|
|
if(status == HAL_OK)
|
|
|
|
{
|
|
|
|
/* Mask OPTLOCK, OPTSTRT, BOR_LEV and BFB2 bits */
|
|
|
|
optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE0_ADDRESS) & (uint8_t)0x1F);
|
|
|
|
|
|
|
|
/* Update User Option Byte */
|
|
|
|
*(__IO uint8_t *)OPTCR_BYTE0_ADDRESS = Iwdg | (uint8_t)(Stdby | (uint8_t)(Stop | ((uint8_t)optiontmp)));
|
|
|
|
}
|
|
|
|
|
|
|
|
return status;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Set the BOR Level.
|
|
|
|
* @param Level: specifies the Option Bytes BOR Reset Level.
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
* @arg OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
|
|
|
|
* @arg OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
|
|
|
|
* @arg OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
|
|
|
|
* @arg OB_BOR_OFF: Supply voltage ranges from 1.62 to 2.1 V
|
2014-08-06 22:33:31 +01:00
|
|
|
* @retval HAL Status
|
2014-03-12 06:55:41 +00:00
|
|
|
*/
|
|
|
|
static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level)
|
|
|
|
{
|
|
|
|
/* Check the parameters */
|
|
|
|
assert_param(IS_OB_BOR_LEVEL(Level));
|
|
|
|
|
|
|
|
/* Set the BOR Level */
|
|
|
|
*(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BOR_LEV);
|
|
|
|
*(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= Level;
|
|
|
|
|
|
|
|
return HAL_OK;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Return the FLASH User Option Byte value.
|
|
|
|
* @param None
|
|
|
|
* @retval uint8_t FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1)
|
|
|
|
* and RST_STDBY(Bit2).
|
|
|
|
*/
|
|
|
|
static uint8_t FLASH_OB_GetUser(void)
|
|
|
|
{
|
|
|
|
/* Return the User Option Byte */
|
|
|
|
return ((uint8_t)(FLASH->OPTCR & 0xE0));
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Return the FLASH Write Protection Option Bytes value.
|
|
|
|
* @param None
|
|
|
|
* @retval uint16_t FLASH Write Protection Option Bytes value
|
|
|
|
*/
|
|
|
|
static uint16_t FLASH_OB_GetWRP(void)
|
|
|
|
{
|
|
|
|
/* Return the FLASH write protection Register value */
|
|
|
|
return (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Returns the FLASH Read Protection level.
|
|
|
|
* @param None
|
|
|
|
* @retval FlagStatus FLASH ReadOut Protection Status:
|
|
|
|
* - SET, when OB_RDP_Level_1 or OB_RDP_Level_2 is set
|
|
|
|
* - RESET, when OB_RDP_Level_0 is set
|
|
|
|
*/
|
|
|
|
static FlagStatus FLASH_OB_GetRDP(void)
|
|
|
|
{
|
|
|
|
FlagStatus readstatus = RESET;
|
|
|
|
|
|
|
|
if ((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) != (uint8_t)OB_RDP_LEVEL_0))
|
|
|
|
{
|
|
|
|
readstatus = SET;
|
|
|
|
}
|
|
|
|
|
|
|
|
return readstatus;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Returns the FLASH BOR level.
|
|
|
|
* @param None
|
|
|
|
* @retval uint8_t The FLASH BOR level:
|
|
|
|
* - OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
|
|
|
|
* - OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
|
|
|
|
* - OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
|
|
|
|
* - OB_BOR_OFF : Supply voltage ranges from 1.62 to 2.1 V
|
|
|
|
*/
|
|
|
|
static uint8_t FLASH_OB_GetBOR(void)
|
|
|
|
{
|
|
|
|
/* Return the FLASH BOR level */
|
|
|
|
return (uint8_t)(*(__IO uint8_t *)(OPTCR_BYTE0_ADDRESS) & (uint8_t)0x0C);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @}
|
|
|
|
*/
|
|
|
|
|
|
|
|
#endif /* HAL_FLASH_MODULE_ENABLED */
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @}
|
|
|
|
*/
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @}
|
|
|
|
*/
|
|
|
|
|
|
|
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|