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micropython/ports/stm32/boards/NUCLEO_F767ZI/mpconfigboard.mk

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stmhal: Add NUCLEO_F767ZI board, with openocd config for stm32f7.
2016-12-12 05:41:38 +00:00
MCU_SERIES = f7
CMSIS_MCU = STM32F767xx
stmhal/Makefile: Rename FLOAT_IMPL to MICROPY_FLOAT_IMPL to match C name The name used in py/mpconfig.h is MICROPY_FLOAT_IMPL so rename this Makefile variable to mirror that.
2017-06-28 06:42:40 +01:00
MICROPY_FLOAT_IMPL = double
stmhal: Add NUCLEO_F767ZI board, with openocd config for stm32f7.
2016-12-12 05:41:38 +00:00
AF_FILE = boards/stm32f767_af.csv
stm32/boards: Allow boards to have finer control over the linker script. This patch allows a particular board to independently specify the linker scripts for 1) the MCU memory layout; 2) how the different firmware sections are arranged in memory. Right now all boards follow the same layout with two separate firmware section, one for the ISR and one for the text and data. This leaves room for storage (filesystem data) to live between the firmware sections. The idea with this patch is to accommodate boards that don't have internal flash storage and only need to have one continuous firmware section. Thus the common.ld script is renamed to common_ifs.ld to make explicit that it is used for cases where the board has internal flash storage.
2018-03-27 11:17:48 +01:00
LD_FILES = boards/stm32f767.ld boards/common_ifs.ld
stm32/Makefile: Allow a board to config either 1 or 2 firmware sections. This patch forces a board to explicitly define TEXT1_ADDR in order to split the firmware into two separate pieces. Otherwise the default is now to produce only a single continuous firmware image with all ISR, text and data together.
2018-03-27 11:24:15 +01:00
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08020000
stm32/boards: Update to use new build config for lwip component.
2019-03-04 12:34:03 +00:00
# MicroPython settings
MICROPY_PY_LWIP = 1
stm32/boards: Enable ussl module via mbedtls for boards with network.
2019-06-24 08:48:28 +01:00
MICROPY_PY_USSL = 1
MICROPY_SSL_MBEDTLS = 1