micropython/ports/stm32/boards/NUCLEO_F767ZI/pins.csv

A0,PA3
A1,PC0
A2,PC3
A3,PF3
A4,PF5
A5,PF10
A6,PB1
A7,PC2
A8,PF4
D0,PG9
D1,PG14
D2,PF15
D3,PE13
D4,PF14
D5,PE11
D6,PE9
D7,PF13
D8,PF12
D9,PD15
D10,PD14
D11,PA7
D12,PA6
D13,PA5
D14,PB9
D15,PB8
D16,PC6
D17,PB15
D18,PB13
D19,PB12
D20,PA15
D21,PC7
D22,PB5
D23,PB3
D24,PA4
D25,PB4
LED1,PB0
LED2,PB7
LED3,PB14
SW,PC13
TP1,PH2
TP2,PI8
TP3,PH15
AUDIO_INT,PD6
AUDIO_SDA,PH8
AUDIO_SCL,PH7
EXT_SDA,PB9
EXT_SCL,PB8
EXT_RST,PG3
SD_D0,PC8
SD_D1,PC9
SD_D2,PC10
SD_D3,PC11
SD_CMD,PD2
SD_CK,PC12
SD_SW,PG2
LCD_BL_CTRL,PK3
LCD_INT,PI13
LCD_SDA,PH8
LCD_SCL,PH7
OTG_FS_POWER,PD5
OTG_FS_OVER_CURRENT,PD4
OTG_HS_OVER_CURRENT,PE3
USB_VBUS,PA9
USB_ID,PA10
USB_DM,PA11
USB_DP,PA12
USB_POWER,PG6
VCP_TX,PD8
VCP_RX,PD9
UART2_TX,PD5
UART2_RX,PD6
UART2_RTS,PD4
UART2_CTS,PD3
UART6_TX,PG14
UART6_RX,PG9
SPI_B_NSS,PA4
SPI_B_SCK,PB3
SPI_B_MOSI,PB5
ETH_MDC,PC1
ETH_MDIO,PA2
ETH_RMII_REF_CLK,PA1
ETH_RMII_CRS_DV,PA7
ETH_RMII_RXD0,PC4
ETH_RMII_RXD1,PC5
ETH_RMII_TX_EN,PG11
ETH_RMII_TXD0,PG13
ETH_RMII_TXD1,PB13
stmhal/board: Fix existing and add more pin defs for NUCLEO_F767ZI. 2017-03-28 02:42:23 +01:00			`A0,PA3`
			`A1,PC0`
			`A2,PC3`
			`A3,PF3`
			`A4,PF5`
			`A5,PF10`
stm32/boards/NUCLEO_F767ZI: Update pins list to include 3 extra pins. 2018-03-05 08:55:41 +00:00			`A6,PB1`
			`A7,PC2`
			`A8,PF4`
stmhal/board: Fix existing and add more pin defs for NUCLEO_F767ZI. 2017-03-28 02:42:23 +01:00			`D0,PG9`
			`D1,PG14`
			`D2,PF15`
			`D3,PE13`
			`D4,PF14`
			`D5,PE11`
			`D6,PE9`
			`D7,PF13`
			`D8,PF12`
			`D9,PD15`
			`D10,PD14`
			`D11,PA7`
			`D12,PA6`
			`D13,PA5`
stmhal: Add NUCLEO_F767ZI board, with openocd config for stm32f7. 2016-12-12 05:41:38 +00:00			`D14,PB9`
			`D15,PB8`
stmhal/board: Fix existing and add more pin defs for NUCLEO_F767ZI. 2017-03-28 02:42:23 +01:00			`D16,PC6`
			`D17,PB15`
			`D18,PB13`
			`D19,PB12`
			`D20,PA15`
			`D21,PC7`
			`D22,PB5`
			`D23,PB3`
			`D24,PA4`
			`D25,PB4`
stmhal: Add NUCLEO_F767ZI board, with openocd config for stm32f7. 2016-12-12 05:41:38 +00:00			`LED1,PB0`
			`LED2,PB7`
			`LED3,PB14`
			`SW,PC13`
			`TP1,PH2`
			`TP2,PI8`
			`TP3,PH15`
			`AUDIO_INT,PD6`
			`AUDIO_SDA,PH8`
			`AUDIO_SCL,PH7`
			`EXT_SDA,PB9`
			`EXT_SCL,PB8`
			`EXT_RST,PG3`
stm32/boards/NUCLEO_F767ZI: Add pins and config for using an SD card. The Nucleo board does not have an SD card slot but does have the requisite pins next to each other and labelled, so provide the configuration for convenience. 2019-12-09 13:53:48 +00:00			`SD_D0,PC8`
			`SD_D1,PC9`
			`SD_D2,PC10`
			`SD_D3,PC11`
			`SD_CMD,PD2`
			`SD_CK,PC12`
			`SD_SW,PG2`
stmhal: Add NUCLEO_F767ZI board, with openocd config for stm32f7. 2016-12-12 05:41:38 +00:00			`LCD_BL_CTRL,PK3`
			`LCD_INT,PI13`
			`LCD_SDA,PH8`
			`LCD_SCL,PH7`
			`OTG_FS_POWER,PD5`
			`OTG_FS_OVER_CURRENT,PD4`
			`OTG_HS_OVER_CURRENT,PE3`
stm32/boards: Update pins.csv to include USB pins where needed. 2018-05-01 08:38:51 +01:00			`USB_VBUS,PA9`
stmhal: Add NUCLEO_F767ZI board, with openocd config for stm32f7. 2016-12-12 05:41:38 +00:00			`USB_ID,PA10`
			`USB_DM,PA11`
			`USB_DP,PA12`
stm32/boards: Ensure USB OTG power is off for NUCLEO_F767ZI. And update the GPIO init for NUCLEO_H743ZI to consistently use the mphal functions. 2018-05-29 13:28:09 +01:00			`USB_POWER,PG6`
stmhal: Add NUCLEO_F767ZI board, with openocd config for stm32f7. 2016-12-12 05:41:38 +00:00			`VCP_TX,PD8`
			`VCP_RX,PD9`
			`UART2_TX,PD5`
			`UART2_RX,PD6`
			`UART2_RTS,PD4`
			`UART2_CTS,PD3`
			`UART6_TX,PG14`
			`UART6_RX,PG9`
			`SPI_B_NSS,PA4`
			`SPI_B_SCK,PB3`
			`SPI_B_MOSI,PB5`
stm32/boards/NUCLEO_F767ZI: Enable lwIP and Ethernet peripheral. 2019-02-22 11:26:54 +00:00			`ETH_MDC,PC1`
			`ETH_MDIO,PA2`
			`ETH_RMII_REF_CLK,PA1`
			`ETH_RMII_CRS_DV,PA7`
			`ETH_RMII_RXD0,PC4`
			`ETH_RMII_RXD1,PC5`
			`ETH_RMII_TX_EN,PG11`
			`ETH_RMII_TXD0,PG13`
			`ETH_RMII_TXD1,PB13`