micropython/ports/esp32/boards/sdkconfig.base

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# MicroPython on ESP32, ESP IDF configuration
# The following options override the defaults
CONFIG_IDF_FIRMWARE_CHIP_ID=0x0000
esp32: Enable optimisations and move code to iRAM to boost performance. This commit enables some significant optimisations for esp32: - move the VM to iRAM - move hot parts of the runtime to iRAM (map lookup, load global/name, mp_obj_get_type) - enable MICROPY_OPT_LOAD_ATTR_FAST_PATH - enable MICROPY_OPT_MAP_LOOKUP_CACHE - disable assertions - change from -Os to -O2 for compilation It's hard to measure performance on esp32 due to external flash and hardware caching. But this set of changes improves performance compared to master by (on a TinyPICO with the GENERIC build, using IDF 4.2.2, running at 160MHz): diff of scores (higher is better) N=100 M=100 esp32-master -> esp32-perf diff diff% (error%) bm_chaos.py 71.28 -> 268.08 : +196.80 = +276.094% (+/-0.04%) bm_fannkuch.py 44.10 -> 69.31 : +25.21 = +57.166% (+/-0.01%) bm_fft.py 1385.27 -> 2538.23 : +1152.96 = +83.230% (+/-0.01%) bm_float.py 1060.94 -> 3900.62 : +2839.68 = +267.657% (+/-0.03%) bm_hexiom.py 10.90 -> 32.79 : +21.89 = +200.826% (+/-0.02%) bm_nqueens.py 1000.83 -> 2372.87 : +1372.04 = +137.090% (+/-0.01%) bm_pidigits.py 288.13 -> 664.40 : +376.27 = +130.590% (+/-0.46%) misc_aes.py 102.45 -> 345.69 : +243.24 = +237.423% (+/-0.01%) misc_mandel.py 1016.58 -> 2121.92 : +1105.34 = +108.731% (+/-0.01%) misc_pystone.py 632.91 -> 1801.87 : +1168.96 = +184.696% (+/-0.08%) misc_raytrace.py 76.66 -> 281.78 : +205.12 = +267.571% (+/-0.05%) viper_call0.py 210.63 -> 273.17 : +62.54 = +29.692% (+/-0.01%) viper_call1a.py 208.45 -> 269.51 : +61.06 = +29.292% (+/-0.00%) viper_call1b.py 185.44 -> 228.25 : +42.81 = +23.086% (+/-0.01%) viper_call1c.py 185.86 -> 228.90 : +43.04 = +23.157% (+/-0.01%) viper_call2a.py 207.10 -> 267.25 : +60.15 = +29.044% (+/-0.00%) viper_call2b.py 173.76 -> 209.42 : +35.66 = +20.523% (+/-0.00%) Five tests have more than 3x speed up (200%+). The performance of the tests bm_fft, bm_pidigits and misc_aes now scale with CPU frequency (eg changing frequency to 240MHz boosts the performance of these by 50%), which means they are no longer influenced by timing of external flash access. (The viper_call* tests did previously scale with CPU frequency, and they still do.) Turning off assertions reduces code size by about 80k, and going from -Os to -O2 costs about 100k, so the net change in code size (for the GENERIC board) is about +20k. If a board wants to enable assertions, or use -Os instead of -O2, that's still possible by overriding the sdkconfig parameters. Signed-off-by: Damien George <damien@micropython.org>
2021-09-24 03:50:59 +01:00
# Compiler options: use -O2 and disable assertions to improve performance
CONFIG_COMPILER_OPTIMIZATION_PERF=y
CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE=y
# Application manager
CONFIG_APP_EXCLUDE_PROJECT_VER_VAR=y
CONFIG_APP_EXCLUDE_PROJECT_NAME_VAR=y
# Bootloader config
CONFIG_BOOTLOADER_LOG_LEVEL_WARN=y
CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP=y
CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE=y
# Change default log level to "ERROR" (instead of "INFO")
CONFIG_LOG_DEFAULT_LEVEL_ERROR=y
# Set the maximum included log level higher than the default,
# so esp.osdebug() can enable more logging at runtime.
#
# To increase the max log verbosity to Debug or Verbose instead, comment
# CONFIG_LOG_MAXIMUM_LEVEL_INFO=y and uncomment one of the other settings.
#
# If not needed, the next line can be commented entirely to save binary size.
CONFIG_LOG_MAXIMUM_LEVEL_INFO=y
#CONFIG_LOG_MAXIMUM_LEVEL_DEBUG=y
#CONFIG_LOG_MAXIMUM_LEVEL_VERBOSE=y
# Main XTAL Config
# Only on: ESP32
CONFIG_XTAL_FREQ_AUTO=y
# ESP System Settings
# Only on: ESP32, ESP32S3
CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0=n
CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1=n
# Power Management
CONFIG_PM_ENABLE=y
# Memory protection
# This is required to allow allocating IRAM
CONFIG_ESP_SYSTEM_MEMPROT_FEATURE=n
# FreeRTOS
CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS=2
CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION=y
CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP=y
# UDP
CONFIG_LWIP_PPP_SUPPORT=y
CONFIG_LWIP_PPP_PAP_SUPPORT=y
CONFIG_LWIP_PPP_CHAP_SUPPORT=y
# SSL
# Use 4kiB output buffer instead of default 16kiB
CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN=y
CONFIG_MBEDTLS_HAVE_TIME_DATE=y
CONFIG_MBEDTLS_PLATFORM_TIME_ALT=y
CONFIG_MBEDTLS_HAVE_TIME=y
# Disable ALPN support as it's not implemented in MicroPython
CONFIG_MBEDTLS_SSL_ALPN=n
# Allow mbedTLS to allocate from PSRAM or internal memory
#
# (The ESP-IDF default is internal-only, partly for physical security to prevent
# possible information leakage from unencrypted PSRAM contents on the original
# ESP32 - no PSRAM encryption on that chip. MicroPython doesn't support flash
# encryption and is already storing the Python heap in PSRAM so this isn't a
# significant factor in overall physical security.)
CONFIG_MBEDTLS_DEFAULT_MEM_ALLOC=y
# ULP coprocessor support
# Only on: ESP32, ESP32S2, ESP32S3
CONFIG_ULP_COPROC_ENABLED=y
CONFIG_ULP_COPROC_TYPE_FSM=y
CONFIG_ULP_COPROC_RESERVE_MEM=2040
# For cmake build
CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y
CONFIG_PARTITION_TABLE_CUSTOM=y
CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions-4MiB.csv"
# To reduce iRAM usage
CONFIG_ESP32_WIFI_IRAM_OPT=n
CONFIG_ESP32_WIFI_RX_IRAM_OPT=n
# Legacy ADC Calibration Configuration
# Only on: ESP32
CONFIG_ADC_CAL_EFUSE_TP_ENABLE=y
CONFIG_ADC_CAL_EFUSE_VREF_ENABLE=y
CONFIG_ADC_CAL_LUT_ENABLE=y
# UART Configuration
CONFIG_UART_ISR_IN_IRAM=y
# IDF 5 deprecated
CONFIG_ADC_SUPPRESS_DEPRECATE_WARN=y
CONFIG_RMT_SUPPRESS_DEPRECATE_WARN=y
CONFIG_I2S_SUPPRESS_DEPRECATE_WARN=y
CONFIG_ETH_USE_SPI_ETHERNET=y
CONFIG_ETH_SPI_ETHERNET_W5500=y
CONFIG_ETH_SPI_ETHERNET_KSZ8851SNL=y
CONFIG_ETH_SPI_ETHERNET_DM9051=y