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micropython/py/asmarm.h

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Basic native ARM emitter
2014-08-16 21:55:53 +01:00
/*
all: Use the name MicroPython consistently in comments There were several different spellings of MicroPython present in comments, when there should be only one.
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* This file is part of the MicroPython project, http://micropython.org/
Basic native ARM emitter
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*
* The MIT License (MIT)
*
* Copyright (c) 2014 Fabian Vogt
Clarify copyright on asmarm files
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* Copyright (c) 2013, 2014 Damien P. George
Basic native ARM emitter
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*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
all: Unify header guard usage. The code conventions suggest using header guards, but do not define how those should look like and instead point to existing files. However, not all existing files follow the same scheme, sometimes omitting header guards altogether, sometimes using non-standard names, making it easy to accidentally pick a "wrong" example. This commit ensures that all header files of the MicroPython project (that were not simply copied from somewhere else) follow the same pattern, that was already present in the majority of files, especially in the py folder. The rules are as follows. Naming convention: * start with the words MICROPY_INCLUDED * contain the full path to the file * replace special characters with _ In addition, there are no empty lines before #ifndef, between #ifndef and one empty line before #endif. #endif is followed by a comment containing the name of the guard macro. py/grammar.h cannot use header guards by design, since it has to be included multiple times in a single C file. Several other files also do not need header guards as they are only used internally and guaranteed to be included only once: * MICROPY_MPHALPORT_H * mpconfigboard.h * mpconfigport.h * mpthreadport.h * pin_defs_*.h * qstrdefs*.h
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#ifndef MICROPY_INCLUDED_PY_ASMARM_H
#define MICROPY_INCLUDED_PY_ASMARM_H
py: Add guarded includes for asm-based headers.
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#include "py/misc.h"
py: Factor out common code from assemblers into asmbase.[ch]. All assemblers should "derive" from mp_asm_base_t.
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#include "py/asmbase.h"
Basic native ARM emitter
2014-08-16 21:55:53 +01:00
py: Make macro names in assemblers consistent, and tidy up a bit.
2014-09-29 16:25:04 +01:00
#define ASM_ARM_REG_R0 (0)
#define ASM_ARM_REG_R1 (1)
#define ASM_ARM_REG_R2 (2)
#define ASM_ARM_REG_R3 (3)
#define ASM_ARM_REG_R4 (4)
#define ASM_ARM_REG_R5 (5)
#define ASM_ARM_REG_R6 (6)
#define ASM_ARM_REG_R7 (7)
#define ASM_ARM_REG_R8 (8)
#define ASM_ARM_REG_R9 (9)
#define ASM_ARM_REG_R10 (10)
#define ASM_ARM_REG_R11 (11)
#define ASM_ARM_REG_R12 (12)
#define ASM_ARM_REG_R13 (13)
#define ASM_ARM_REG_R14 (14)
#define ASM_ARM_REG_R15 (15)
#define ASM_ARM_REG_SP (ASM_ARM_REG_R13)
#define ASM_ARM_REG_LR (ASM_ARM_REG_R14)
#define ASM_ARM_REG_PC (ASM_ARM_REG_R15)
Basic native ARM emitter
2014-08-16 21:55:53 +01:00
py: Make macro names in assemblers consistent, and tidy up a bit.
2014-09-29 16:25:04 +01:00
#define ASM_ARM_CC_EQ (0x0 << 28)
#define ASM_ARM_CC_NE (0x1 << 28)
#define ASM_ARM_CC_CS (0x2 << 28)
#define ASM_ARM_CC_CC (0x3 << 28)
#define ASM_ARM_CC_MI (0x4 << 28)
#define ASM_ARM_CC_PL (0x5 << 28)
#define ASM_ARM_CC_VS (0x6 << 28)
#define ASM_ARM_CC_VC (0x7 << 28)
#define ASM_ARM_CC_HI (0x8 << 28)
#define ASM_ARM_CC_LS (0x9 << 28)
#define ASM_ARM_CC_GE (0xa << 28)
#define ASM_ARM_CC_LT (0xb << 28)
#define ASM_ARM_CC_GT (0xc << 28)
#define ASM_ARM_CC_LE (0xd << 28)
#define ASM_ARM_CC_AL (0xe << 28)
Basic native ARM emitter
2014-08-16 21:55:53 +01:00
py: Factor out common code from assemblers into asmbase.[ch]. All assemblers should "derive" from mp_asm_base_t.
2016-11-27 22:24:50 +00:00
typedef struct _asm_arm_t {
mp_asm_base_t base;
uint push_reglist;
uint stack_adjust;
} asm_arm_t;
Basic native ARM emitter
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void asm_arm_end_pass(asm_arm_t *as);
void asm_arm_entry(asm_arm_t *as, int num_locals);
void asm_arm_exit(asm_arm_t *as);
void asm_arm_bkpt(asm_arm_t *as);
Implement missing ARM emitter functions for viper
2014-10-03 23:53:46 +01:00
// mov
Basic native ARM emitter
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void asm_arm_mov_reg_reg(asm_arm_t *as, uint reg_dest, uint reg_src);
py: Add support to save native, viper and asm code to .mpy files. This commit adds support for saving and loading .mpy files that contain native code (native, viper and inline-asm). A lot of the ground work was already done for this in the form of removing pointers from generated native code. The changes here are mainly to link in qstr values to the native code, and change the format of .mpy files to contain native code blocks (possibly mixed with bytecode). A top-level summary: - @micropython.native, @micropython.viper and @micropython.asm_thumb/ asm_xtensa are now allowed in .py files when compiling to .mpy, and they work transparently to the user. - Entire .py files can be compiled to native via mpy-cross -X emit=native and for the most part the generated .mpy files should work the same as their bytecode version. - The .mpy file format is changed to 1) specify in the header if the file contains native code and if so the architecture (eg x86, ARMV7M, Xtensa); 2) for each function block the kind of code is specified (bytecode, native, viper, asm). - When native code is loaded from a .mpy file the native code must be modified (in place) to link qstr values in, just like bytecode (see py/persistentcode.c:arch_link_qstr() function). In addition, this now defines a public, native ABI for dynamically loadable native code generated by other languages, like C.
2019-02-21 04:18:33 +00:00
size_t asm_arm_mov_reg_i32(asm_arm_t *as, uint rd, int imm);
void asm_arm_mov_reg_i32_optimised(asm_arm_t *as, uint rd, int imm);
Basic native ARM emitter
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void asm_arm_mov_local_reg(asm_arm_t *as, int local_num, uint rd);
void asm_arm_mov_reg_local(asm_arm_t *as, uint rd, int local_num);
Implement missing ARM emitter functions for viper
2014-10-03 23:53:46 +01:00
void asm_arm_setcc_reg(asm_arm_t *as, uint rd, uint cond);
Basic native ARM emitter
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Implement missing ARM emitter functions for viper
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// compare
Basic native ARM emitter
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void asm_arm_cmp_reg_i8(asm_arm_t *as, uint rd, int imm);
void asm_arm_cmp_reg_reg(asm_arm_t *as, uint rd, uint rn);
Implement missing ARM emitter functions for viper
2014-10-03 23:53:46 +01:00
// arithmetic
py: Implement more binary ops for viper emitter. This included a bit of restructuring of the assembler backends. Note that the ARM backend is missing a few functions and won't compile.
2014-09-29 18:45:42 +01:00
void asm_arm_add_reg_reg_reg(asm_arm_t *as, uint rd, uint rn, uint rm);
void asm_arm_sub_reg_reg_reg(asm_arm_t *as, uint rd, uint rn, uint rm);
py: Implement native multiply operation in viper emitter.
2015-06-04 15:00:29 +01:00
void asm_arm_mul_reg_reg_reg(asm_arm_t *as, uint rd, uint rn, uint rm);
py: Implement and,or,xor native ops for viper.
2014-10-12 14:21:06 +01:00
void asm_arm_and_reg_reg_reg(asm_arm_t *as, uint rd, uint rn, uint rm);
void asm_arm_eor_reg_reg_reg(asm_arm_t *as, uint rd, uint rn, uint rm);
void asm_arm_orr_reg_reg_reg(asm_arm_t *as, uint rd, uint rn, uint rm);
Basic native ARM emitter
2014-08-16 21:55:53 +01:00
void asm_arm_mov_reg_local_addr(asm_arm_t *as, uint rd, int local_num);
py/asm*: Support assembling code to jump to a register, and get PC+off. Useful for position independent code, and implementing state machines.
2018-08-16 04:45:24 +01:00
void asm_arm_mov_reg_pcrel(asm_arm_t *as, uint reg_dest, uint label);
Implement missing ARM emitter functions for viper
2014-10-03 23:53:46 +01:00
void asm_arm_lsl_reg_reg(asm_arm_t *as, uint rd, uint rs);
py/asm: Add funcs/macros to emit machine code for logical-shift-right. Signed-off-by: Damien George <damien@micropython.org>
2020-06-25 04:09:07 +01:00
void asm_arm_lsr_reg_reg(asm_arm_t *as, uint rd, uint rs);
Implement missing ARM emitter functions for viper
2014-10-03 23:53:46 +01:00
void asm_arm_asr_reg_reg(asm_arm_t *as, uint rd, uint rs);
// memory
emitnative: Revamp ARM codegen compile after full-arg support refactors. The code was apparently broken after 9988618e0e0f5c319e31b135d993e22efb593093 "py: Implement full func arg passing for native emitter.". This attempts to propagate those changes to ARM emitter.
2015-05-07 21:08:09 +01:00
void asm_arm_ldr_reg_reg(asm_arm_t *as, uint rd, uint rn, uint byte_offset);
py: Implement native load for viper. Viper can now do: ptr8(buf)[0], which loads a byte from a buffer using machine instructions.
2014-10-12 16:59:29 +01:00
void asm_arm_ldrh_reg_reg(asm_arm_t *as, uint rd, uint rn);
void asm_arm_ldrb_reg_reg(asm_arm_t *as, uint rd, uint rn);
emitnative: Revamp ARM codegen compile after full-arg support refactors. The code was apparently broken after 9988618e0e0f5c319e31b135d993e22efb593093 "py: Implement full func arg passing for native emitter.". This attempts to propagate those changes to ARM emitter.
2015-05-07 21:08:09 +01:00
void asm_arm_str_reg_reg(asm_arm_t *as, uint rd, uint rm, uint byte_offset);
Implement missing ARM emitter functions for viper
2014-10-03 23:53:46 +01:00
void asm_arm_strh_reg_reg(asm_arm_t *as, uint rd, uint rm);
void asm_arm_strb_reg_reg(asm_arm_t *as, uint rd, uint rm);
// store to array
void asm_arm_str_reg_reg_reg(asm_arm_t *as, uint rd, uint rm, uint rn);
void asm_arm_strh_reg_reg_reg(asm_arm_t *as, uint rd, uint rm, uint rn);
void asm_arm_strb_reg_reg_reg(asm_arm_t *as, uint rd, uint rm, uint rn);
Basic native ARM emitter
2014-08-16 21:55:53 +01:00
emitnative: Revamp ARM codegen compile after full-arg support refactors. The code was apparently broken after 9988618e0e0f5c319e31b135d993e22efb593093 "py: Implement full func arg passing for native emitter.". This attempts to propagate those changes to ARM emitter.
2015-05-07 21:08:09 +01:00
// stack
void asm_arm_push(asm_arm_t *as, uint reglist);
void asm_arm_pop(asm_arm_t *as, uint reglist);
Implement missing ARM emitter functions for viper
2014-10-03 23:53:46 +01:00
// control flow
Basic native ARM emitter
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void asm_arm_bcc_label(asm_arm_t *as, int cond, uint label);
void asm_arm_b_label(asm_arm_t *as, uint label);
py/asmarm: Simplify asm_arm_bl_ind to only load via index, not literal. The maximum index into mp_fun_table is currently less than 1024 and should stay that way to keep things efficient for all architectures, so there is no need to handle loading the pointer directly via a literal in this function.
2018-10-13 05:03:29 +01:00
void asm_arm_bl_ind(asm_arm_t *as, uint fun_id, uint reg_temp);
py/asm*: Support assembling code to jump to a register, and get PC+off. Useful for position independent code, and implementing state machines.
2018-08-16 04:45:24 +01:00
void asm_arm_bx_reg(asm_arm_t *as, uint reg_src);
Basic native ARM emitter
2014-08-16 21:55:53 +01:00
py/emitnative: Load native fun table ptr from const table for all archs. All architectures now have a dedicated register to hold the pointer to the native function table mp_fun_table, and so they all need to load this register at the start of the native function. This commit makes the loading of this register uniform across architectures by passing the pointer in the constant table for the native function, and then loading the register from the constant table. Doing it this way means that the pointer is not stored in the assembly code, helping to make the code more portable.
2018-10-13 04:53:35 +01:00
// Holds a pointer to mp_fun_table
#define ASM_ARM_REG_FUN_TABLE ASM_ARM_REG_R7
py: Move arch-specific assembler macros from emitnative to asmXXX.h.
2016-12-08 06:47:17 +00:00
#if GENERIC_ASM_API
// The following macros provide a (mostly) arch-independent API to
// generate native code, and are used by the native emitter.
#define ASM_WORD_SIZE (4)
#define REG_RET ASM_ARM_REG_R0
#define REG_ARG_1 ASM_ARM_REG_R0
#define REG_ARG_2 ASM_ARM_REG_R1
#define REG_ARG_3 ASM_ARM_REG_R2
#define REG_ARG_4 ASM_ARM_REG_R3
#define REG_TEMP0 ASM_ARM_REG_R0
#define REG_TEMP1 ASM_ARM_REG_R1
#define REG_TEMP2 ASM_ARM_REG_R2
#define REG_LOCAL_1 ASM_ARM_REG_R4
#define REG_LOCAL_2 ASM_ARM_REG_R5
#define REG_LOCAL_3 ASM_ARM_REG_R6
#define REG_LOCAL_NUM (3)
py/emitnative: Load native fun table ptr from const table for all archs. All architectures now have a dedicated register to hold the pointer to the native function table mp_fun_table, and so they all need to load this register at the start of the native function. This commit makes the loading of this register uniform across architectures by passing the pointer in the constant table for the native function, and then loading the register from the constant table. Doing it this way means that the pointer is not stored in the assembly code, helping to make the code more portable.
2018-10-13 04:53:35 +01:00
// Holds a pointer to mp_fun_table
#define REG_FUN_TABLE ASM_ARM_REG_FUN_TABLE
py: Move arch-specific assembler macros from emitnative to asmXXX.h.
2016-12-08 06:47:17 +00:00
#define ASM_T asm_arm_t
#define ASM_END_PASS asm_arm_end_pass
#define ASM_ENTRY asm_arm_entry
#define ASM_EXIT asm_arm_exit
#define ASM_JUMP asm_arm_b_label
py/emitnative: Fix x86 native zero checks by comparing full word. On x86 archs (both 32 and 64 bit) a bool return value only sets the 8-bit al register, and the higher bits of the ax register have an undefined value. When testing the return value of such cases it is required to just test al for zero/non-zero. On the other hand, checking for truth or zero/non-zero on an integer return value requires checking all bits of the register. These two cases must be distinguished and handled correctly in generated native code. This patch makes sure of this. For other supported native archs (ARM, Thumb2, Xtensa) there is no such distinction and this patch does not change anything for them.
2018-08-04 13:03:49 +01:00
#define ASM_JUMP_IF_REG_ZERO(as, reg, label, bool_test) \
py: Move arch-specific assembler macros from emitnative to asmXXX.h.
2016-12-08 06:47:17 +00:00
do { \
asm_arm_cmp_reg_i8(as, reg, 0); \
asm_arm_bcc_label(as, ASM_ARM_CC_EQ, label); \
} while (0)
py/emitnative: Fix x86 native zero checks by comparing full word. On x86 archs (both 32 and 64 bit) a bool return value only sets the 8-bit al register, and the higher bits of the ax register have an undefined value. When testing the return value of such cases it is required to just test al for zero/non-zero. On the other hand, checking for truth or zero/non-zero on an integer return value requires checking all bits of the register. These two cases must be distinguished and handled correctly in generated native code. This patch makes sure of this. For other supported native archs (ARM, Thumb2, Xtensa) there is no such distinction and this patch does not change anything for them.
2018-08-04 13:03:49 +01:00
#define ASM_JUMP_IF_REG_NONZERO(as, reg, label, bool_test) \
py: Move arch-specific assembler macros from emitnative to asmXXX.h.
2016-12-08 06:47:17 +00:00
do { \
asm_arm_cmp_reg_i8(as, reg, 0); \
asm_arm_bcc_label(as, ASM_ARM_CC_NE, label); \
} while (0)
#define ASM_JUMP_IF_REG_EQ(as, reg1, reg2, label) \
do { \
asm_arm_cmp_reg_reg(as, reg1, reg2); \
asm_arm_bcc_label(as, ASM_ARM_CC_EQ, label); \
} while (0)
py/asm*: Support assembling code to jump to a register, and get PC+off. Useful for position independent code, and implementing state machines.
2018-08-16 04:45:24 +01:00
#define ASM_JUMP_REG(as, reg) asm_arm_bx_reg((as), (reg))
py/emitnative: Remove unused ptr argument from ASM_CALL_IND macro.
2018-10-13 05:13:55 +01:00
#define ASM_CALL_IND(as, idx) asm_arm_bl_ind(as, idx, ASM_ARM_REG_R3)
py: Move arch-specific assembler macros from emitnative to asmXXX.h.
2016-12-08 06:47:17 +00:00
py/emitnative: Clean up asm macro names so they have dest as first arg. All the asm macro names that convert a particular architecture to a generic interface now follow the convention whereby the "destination" (usually a register) is specified first.
2017-11-15 00:46:49 +00:00
#define ASM_MOV_LOCAL_REG(as, local_num, reg_src) asm_arm_mov_local_reg((as), (local_num), (reg_src))
py: Add support to save native, viper and asm code to .mpy files. This commit adds support for saving and loading .mpy files that contain native code (native, viper and inline-asm). A lot of the ground work was already done for this in the form of removing pointers from generated native code. The changes here are mainly to link in qstr values to the native code, and change the format of .mpy files to contain native code blocks (possibly mixed with bytecode). A top-level summary: - @micropython.native, @micropython.viper and @micropython.asm_thumb/ asm_xtensa are now allowed in .py files when compiling to .mpy, and they work transparently to the user. - Entire .py files can be compiled to native via mpy-cross -X emit=native and for the most part the generated .mpy files should work the same as their bytecode version. - The .mpy file format is changed to 1) specify in the header if the file contains native code and if so the architecture (eg x86, ARMV7M, Xtensa); 2) for each function block the kind of code is specified (bytecode, native, viper, asm). - When native code is loaded from a .mpy file the native code must be modified (in place) to link qstr values in, just like bytecode (see py/persistentcode.c:arch_link_qstr() function). In addition, this now defines a public, native ABI for dynamically loadable native code generated by other languages, like C.
2019-02-21 04:18:33 +00:00
#define ASM_MOV_REG_IMM(as, reg_dest, imm) asm_arm_mov_reg_i32_optimised((as), (reg_dest), (imm))
#define ASM_MOV_REG_IMM_FIX_U16(as, reg_dest, imm) asm_arm_mov_reg_i32((as), (reg_dest), (imm))
#define ASM_MOV_REG_IMM_FIX_WORD(as, reg_dest, imm) asm_arm_mov_reg_i32((as), (reg_dest), (imm))
py/emitnative: Clean up asm macro names so they have dest as first arg. All the asm macro names that convert a particular architecture to a generic interface now follow the convention whereby the "destination" (usually a register) is specified first.
2017-11-15 00:46:49 +00:00
#define ASM_MOV_REG_LOCAL(as, reg_dest, local_num) asm_arm_mov_reg_local((as), (reg_dest), (local_num))
py: Move arch-specific assembler macros from emitnative to asmXXX.h.
2016-12-08 06:47:17 +00:00
#define ASM_MOV_REG_REG(as, reg_dest, reg_src) asm_arm_mov_reg_reg((as), (reg_dest), (reg_src))
py/emitnative: Clean up asm macro names so they have dest as first arg. All the asm macro names that convert a particular architecture to a generic interface now follow the convention whereby the "destination" (usually a register) is specified first.
2017-11-15 00:46:49 +00:00
#define ASM_MOV_REG_LOCAL_ADDR(as, reg_dest, local_num) asm_arm_mov_reg_local_addr((as), (reg_dest), (local_num))
py/asm*: Support assembling code to jump to a register, and get PC+off. Useful for position independent code, and implementing state machines.
2018-08-16 04:45:24 +01:00
#define ASM_MOV_REG_PCREL(as, reg_dest, label) asm_arm_mov_reg_pcrel((as), (reg_dest), (label))
py: Move arch-specific assembler macros from emitnative to asmXXX.h.
2016-12-08 06:47:17 +00:00
#define ASM_LSL_REG_REG(as, reg_dest, reg_shift) asm_arm_lsl_reg_reg((as), (reg_dest), (reg_shift))
py/asm: Add funcs/macros to emit machine code for logical-shift-right. Signed-off-by: Damien George <damien@micropython.org>
2020-06-25 04:09:07 +01:00
#define ASM_LSR_REG_REG(as, reg_dest, reg_shift) asm_arm_lsr_reg_reg((as), (reg_dest), (reg_shift))
py: Move arch-specific assembler macros from emitnative to asmXXX.h.
2016-12-08 06:47:17 +00:00
#define ASM_ASR_REG_REG(as, reg_dest, reg_shift) asm_arm_asr_reg_reg((as), (reg_dest), (reg_shift))
#define ASM_OR_REG_REG(as, reg_dest, reg_src) asm_arm_orr_reg_reg_reg((as), (reg_dest), (reg_dest), (reg_src))
#define ASM_XOR_REG_REG(as, reg_dest, reg_src) asm_arm_eor_reg_reg_reg((as), (reg_dest), (reg_dest), (reg_src))
#define ASM_AND_REG_REG(as, reg_dest, reg_src) asm_arm_and_reg_reg_reg((as), (reg_dest), (reg_dest), (reg_src))
#define ASM_ADD_REG_REG(as, reg_dest, reg_src) asm_arm_add_reg_reg_reg((as), (reg_dest), (reg_dest), (reg_src))
#define ASM_SUB_REG_REG(as, reg_dest, reg_src) asm_arm_sub_reg_reg_reg((as), (reg_dest), (reg_dest), (reg_src))
#define ASM_MUL_REG_REG(as, reg_dest, reg_src) asm_arm_mul_reg_reg_reg((as), (reg_dest), (reg_dest), (reg_src))
#define ASM_LOAD_REG_REG(as, reg_dest, reg_base) asm_arm_ldr_reg_reg((as), (reg_dest), (reg_base), 0)
#define ASM_LOAD_REG_REG_OFFSET(as, reg_dest, reg_base, word_offset) asm_arm_ldr_reg_reg((as), (reg_dest), (reg_base), 4 * (word_offset))
#define ASM_LOAD8_REG_REG(as, reg_dest, reg_base) asm_arm_ldrb_reg_reg((as), (reg_dest), (reg_base))
#define ASM_LOAD16_REG_REG(as, reg_dest, reg_base) asm_arm_ldrh_reg_reg((as), (reg_dest), (reg_base))
#define ASM_LOAD32_REG_REG(as, reg_dest, reg_base) asm_arm_ldr_reg_reg((as), (reg_dest), (reg_base), 0)
#define ASM_STORE_REG_REG(as, reg_value, reg_base) asm_arm_str_reg_reg((as), (reg_value), (reg_base), 0)
#define ASM_STORE_REG_REG_OFFSET(as, reg_dest, reg_base, word_offset) asm_arm_str_reg_reg((as), (reg_dest), (reg_base), 4 * (word_offset))
#define ASM_STORE8_REG_REG(as, reg_value, reg_base) asm_arm_strb_reg_reg((as), (reg_value), (reg_base))
#define ASM_STORE16_REG_REG(as, reg_value, reg_base) asm_arm_strh_reg_reg((as), (reg_value), (reg_base))
#define ASM_STORE32_REG_REG(as, reg_value, reg_base) asm_arm_str_reg_reg((as), (reg_value), (reg_base), 0)
#endif // GENERIC_ASM_API
all: Unify header guard usage. The code conventions suggest using header guards, but do not define how those should look like and instead point to existing files. However, not all existing files follow the same scheme, sometimes omitting header guards altogether, sometimes using non-standard names, making it easy to accidentally pick a "wrong" example. This commit ensures that all header files of the MicroPython project (that were not simply copied from somewhere else) follow the same pattern, that was already present in the majority of files, especially in the py folder. The rules are as follows. Naming convention: * start with the words MICROPY_INCLUDED * contain the full path to the file * replace special characters with _ In addition, there are no empty lines before #ifndef, between #ifndef and one empty line before #endif. #endif is followed by a comment containing the name of the guard macro. py/grammar.h cannot use header guards by design, since it has to be included multiple times in a single C file. Several other files also do not need header guards as they are only used internally and guaranteed to be included only once: * MICROPY_MPHALPORT_H * mpconfigboard.h * mpconfigport.h * mpthreadport.h * pin_defs_*.h * qstrdefs*.h
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#endif // MICROPY_INCLUDED_PY_ASMARM_H