469 lines
19 KiB
C
469 lines
19 KiB
C
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/**
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******************************************************************************
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* @file stm32f7xx_hal_flash_ex.h
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* @author MCD Application Team
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* @version V1.0.1
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* @date 25-June-2015
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* @brief Header file of FLASH HAL Extension module.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F7xx_HAL_FLASH_EX_H
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#define __STM32F7xx_HAL_FLASH_EX_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f7xx_hal_def.h"
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/** @addtogroup STM32F7xx_HAL_Driver
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* @{
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*/
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/** @addtogroup FLASHEx
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup FLASHEx_Exported_Types FLASH Exported Types
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* @{
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*/
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/**
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* @brief FLASH Erase structure definition
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*/
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typedef struct
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{
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uint32_t TypeErase; /*!< Mass erase or sector Erase.
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This parameter can be a value of @ref FLASHEx_Type_Erase */
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uint32_t Sector; /*!< Initial FLASH sector to erase when Mass erase is disabled
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This parameter must be a value of @ref FLASHEx_Sectors */
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uint32_t NbSectors; /*!< Number of sectors to be erased.
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This parameter must be a value between 1 and (max number of sectors - value of Initial sector)*/
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uint32_t VoltageRange;/*!< The device voltage range which defines the erase parallelism
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This parameter must be a value of @ref FLASHEx_Voltage_Range */
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} FLASH_EraseInitTypeDef;
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/**
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* @brief FLASH Option Bytes Program structure definition
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*/
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typedef struct
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{
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uint32_t OptionType; /*!< Option byte to be configured.
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This parameter can be a value of @ref FLASHEx_Option_Type */
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uint32_t WRPState; /*!< Write protection activation or deactivation.
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This parameter can be a value of @ref FLASHEx_WRP_State */
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uint32_t WRPSector; /*!< Specifies the sector(s) to be write protected.
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The value of this parameter depend on device used within the same series */
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uint32_t RDPLevel; /*!< Set the read protection level.
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This parameter can be a value of @ref FLASHEx_Option_Bytes_Read_Protection */
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uint32_t BORLevel; /*!< Set the BOR Level.
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This parameter can be a value of @ref FLASHEx_BOR_Reset_Level */
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uint32_t USERConfig; /*!< Program the FLASH User Option Byte: WWDG_SW / IWDG_SW / RST_STOP / RST_STDBY /
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IWDG_FREEZE_STOP / IWDG_FREEZE_SANDBY. */
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uint32_t BootAddr0; /*!< Boot base address when Boot pin = 0.
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This parameter can be a value of @ref FLASHEx_Boot_Address */
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uint32_t BootAddr1; /*!< Boot base address when Boot pin = 1.
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This parameter can be a value of @ref FLASHEx_Boot_Address */
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} FLASH_OBProgramInitTypeDef;
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/**
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* @}
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*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup FLASHEx_Exported_Constants FLASH Exported Constants
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* @{
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*/
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/** @defgroup FLASHEx_Type_Erase FLASH Type Erase
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* @{
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*/
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#define FLASH_TYPEERASE_SECTORS ((uint32_t)0x00) /*!< Sectors erase only */
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#define FLASH_TYPEERASE_MASSERASE ((uint32_t)0x01) /*!< Flash Mass erase activation */
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/**
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* @}
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*/
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/** @defgroup FLASHEx_Voltage_Range FLASH Voltage Range
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* @{
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*/
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#define FLASH_VOLTAGE_RANGE_1 ((uint32_t)0x00) /*!< Device operating range: 1.8V to 2.1V */
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#define FLASH_VOLTAGE_RANGE_2 ((uint32_t)0x01) /*!< Device operating range: 2.1V to 2.7V */
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#define FLASH_VOLTAGE_RANGE_3 ((uint32_t)0x02) /*!< Device operating range: 2.7V to 3.6V */
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#define FLASH_VOLTAGE_RANGE_4 ((uint32_t)0x03) /*!< Device operating range: 2.7V to 3.6V + External Vpp */
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/**
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* @}
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*/
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/** @defgroup FLASHEx_WRP_State FLASH WRP State
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* @{
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*/
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#define OB_WRPSTATE_DISABLE ((uint32_t)0x00) /*!< Disable the write protection of the desired bank 1 sectors */
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#define OB_WRPSTATE_ENABLE ((uint32_t)0x01) /*!< Enable the write protection of the desired bank 1 sectors */
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/**
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* @}
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*/
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/** @defgroup FLASHEx_Option_Type FLASH Option Type
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* @{
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*/
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#define OPTIONBYTE_WRP ((uint32_t)0x01) /*!< WRP option byte configuration */
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#define OPTIONBYTE_RDP ((uint32_t)0x02) /*!< RDP option byte configuration */
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#define OPTIONBYTE_USER ((uint32_t)0x04) /*!< USER option byte configuration */
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#define OPTIONBYTE_BOR ((uint32_t)0x08) /*!< BOR option byte configuration */
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#define OPTIONBYTE_BOOTADDR_0 ((uint32_t)0x10) /*!< Boot 0 Address configuration */
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#define OPTIONBYTE_BOOTADDR_1 ((uint32_t)0x20) /*!< Boot 1 Address configuration */
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/**
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* @}
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*/
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/** @defgroup FLASHEx_Option_Bytes_Read_Protection FLASH Option Bytes Read Protection
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* @{
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*/
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#define OB_RDP_LEVEL_0 ((uint8_t)0xAA)
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#define OB_RDP_LEVEL_1 ((uint8_t)0x55)
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#define OB_RDP_LEVEL_2 ((uint8_t)0xCC) /*!< Warning: When enabling read protection level 2
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it s no more possible to go back to level 1 or 0 */
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/**
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* @}
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*/
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/** @defgroup FLASHEx_Option_Bytes_WWatchdog FLASH Option Bytes WWatchdog
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* @{
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*/
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#define OB_WWDG_SW ((uint32_t)0x10) /*!< Software WWDG selected */
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#define OB_WWDG_HW ((uint32_t)0x00) /*!< Hardware WWDG selected */
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/**
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* @}
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*/
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/** @defgroup FLASHEx_Option_Bytes_IWatchdog FLASH Option Bytes IWatchdog
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* @{
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*/
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#define OB_IWDG_SW ((uint32_t)0x20) /*!< Software IWDG selected */
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#define OB_IWDG_HW ((uint32_t)0x00) /*!< Hardware IWDG selected */
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/**
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* @}
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*/
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/** @defgroup FLASHEx_Option_Bytes_nRST_STOP FLASH Option Bytes nRST_STOP
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* @{
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*/
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#define OB_STOP_NO_RST ((uint32_t)0x40) /*!< No reset generated when entering in STOP */
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#define OB_STOP_RST ((uint32_t)0x00) /*!< Reset generated when entering in STOP */
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/**
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* @}
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*/
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/** @defgroup FLASHEx_Option_Bytes_nRST_STDBY FLASH Option Bytes nRST_STDBY
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* @{
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*/
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#define OB_STDBY_NO_RST ((uint32_t)0x80) /*!< No reset generated when entering in STANDBY */
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#define OB_STDBY_RST ((uint32_t)0x00) /*!< Reset generated when entering in STANDBY */
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/**
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* @}
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*/
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/** @defgroup FLASHEx_Option_Bytes_IWDG_FREEZE_STOP FLASH IWDG Counter Freeze in STOP
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* @{
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*/
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#define OB_IWDG_STOP_FREEZE ((uint32_t)0x00000000) /*!< Freeze IWDG counter in STOP mode */
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#define OB_IWDG_STOP_ACTIVE ((uint32_t)0x40000000) /*!< IWDG counter active in STOP mode */
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/**
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* @}
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*/
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/** @defgroup FLASHEx_Option_Bytes_IWDG_FREEZE_SANDBY FLASH IWDG Counter Freeze in STANDBY
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* @{
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*/
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#define OB_IWDG_STDBY_FREEZE ((uint32_t)0x00000000) /*!< Freeze IWDG counter in STANDBY mode */
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#define OB_IWDG_STDBY_ACTIVE ((uint32_t)0x40000000) /*!< IWDG counter active in STANDBY mode */
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/**
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* @}
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*/
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/** @defgroup FLASHEx_BOR_Reset_Level FLASH BOR Reset Level
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* @{
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*/
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#define OB_BOR_LEVEL3 ((uint32_t)0x00) /*!< Supply voltage ranges from 2.70 to 3.60 V */
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#define OB_BOR_LEVEL2 ((uint32_t)0x04) /*!< Supply voltage ranges from 2.40 to 2.70 V */
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#define OB_BOR_LEVEL1 ((uint32_t)0x08) /*!< Supply voltage ranges from 2.10 to 2.40 V */
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#define OB_BOR_OFF ((uint32_t)0x0C) /*!< Supply voltage ranges from 1.62 to 2.10 V */
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/**
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* @}
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*/
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/** @defgroup FLASHEx_Boot_Address FLASH Boot Address
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* @{
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*/
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#define OB_BOOTADDR_ITCM_RAM ((uint32_t)0x0000) /*!< Boot from ITCM RAM (0x00000000) */
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#define OB_BOOTADDR_SYSTEM ((uint32_t)0x0040) /*!< Boot from System memory bootloader (0x00100000) */
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#define OB_BOOTADDR_ITCM_FLASH ((uint32_t)0x0080) /*!< Boot from Flash on ITCM interface (0x00200000) */
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#define OB_BOOTADDR_AXIM_FLASH ((uint32_t)0x2000) /*!< Boot from Flash on AXIM interface (0x08000000) */
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#define OB_BOOTADDR_DTCM_RAM ((uint32_t)0x8000) /*!< Boot from DTCM RAM (0x20000000) */
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#define OB_BOOTADDR_SRAM1 ((uint32_t)0x8004) /*!< Boot from SRAM1 (0x20010000) */
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#define OB_BOOTADDR_SRAM2 ((uint32_t)0x8013) /*!< Boot from SRAM2 (0x2004C000) */
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/**
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* @}
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*/
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/** @defgroup FLASH_Latency FLASH Latency
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* @{
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*/
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#define FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /*!< FLASH Zero Latency cycle */
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#define FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /*!< FLASH One Latency cycle */
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#define FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /*!< FLASH Two Latency cycles */
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#define FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /*!< FLASH Three Latency cycles */
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#define FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /*!< FLASH Four Latency cycles */
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#define FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /*!< FLASH Five Latency cycles */
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#define FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /*!< FLASH Six Latency cycles */
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#define FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /*!< FLASH Seven Latency cycles */
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#define FLASH_LATENCY_8 FLASH_ACR_LATENCY_8WS /*!< FLASH Eight Latency cycles */
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#define FLASH_LATENCY_9 FLASH_ACR_LATENCY_9WS /*!< FLASH Nine Latency cycles */
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#define FLASH_LATENCY_10 FLASH_ACR_LATENCY_10WS /*!< FLASH Ten Latency cycles */
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#define FLASH_LATENCY_11 FLASH_ACR_LATENCY_11WS /*!< FLASH Eleven Latency cycles */
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#define FLASH_LATENCY_12 FLASH_ACR_LATENCY_12WS /*!< FLASH Twelve Latency cycles */
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#define FLASH_LATENCY_13 FLASH_ACR_LATENCY_13WS /*!< FLASH Thirteen Latency cycles */
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#define FLASH_LATENCY_14 FLASH_ACR_LATENCY_14WS /*!< FLASH Fourteen Latency cycles */
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#define FLASH_LATENCY_15 FLASH_ACR_LATENCY_15WS /*!< FLASH Fifteen Latency cycles */
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/**
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* @}
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*/
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/** @defgroup FLASHEx_MassErase_bit FLASH Mass Erase bit
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* @{
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*/
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#define FLASH_MER_BIT (FLASH_CR_MER) /*!< MER bit to clear */
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/**
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* @}
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*/
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/** @defgroup FLASHEx_Sectors FLASH Sectors
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* @{
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*/
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#define FLASH_SECTOR_0 ((uint32_t)0) /*!< Sector Number 0 */
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#define FLASH_SECTOR_1 ((uint32_t)1) /*!< Sector Number 1 */
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#define FLASH_SECTOR_2 ((uint32_t)2) /*!< Sector Number 2 */
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#define FLASH_SECTOR_3 ((uint32_t)3) /*!< Sector Number 3 */
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#define FLASH_SECTOR_4 ((uint32_t)4) /*!< Sector Number 4 */
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#define FLASH_SECTOR_5 ((uint32_t)5) /*!< Sector Number 5 */
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#define FLASH_SECTOR_6 ((uint32_t)6) /*!< Sector Number 6 */
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#define FLASH_SECTOR_7 ((uint32_t)7) /*!< Sector Number 7 */
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/**
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* @}
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*/
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/** @defgroup FLASHEx_Option_Bytes_Write_Protection FLASH Option Bytes Write Protection
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* @{
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*/
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#define OB_WRP_SECTOR_0 ((uint32_t)0x00010000) /*!< Write protection of Sector0 */
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#define OB_WRP_SECTOR_1 ((uint32_t)0x00020000) /*!< Write protection of Sector1 */
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#define OB_WRP_SECTOR_2 ((uint32_t)0x00040000) /*!< Write protection of Sector2 */
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#define OB_WRP_SECTOR_3 ((uint32_t)0x00080000) /*!< Write protection of Sector3 */
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#define OB_WRP_SECTOR_4 ((uint32_t)0x00100000) /*!< Write protection of Sector4 */
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#define OB_WRP_SECTOR_5 ((uint32_t)0x00200000) /*!< Write protection of Sector5 */
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#define OB_WRP_SECTOR_6 ((uint32_t)0x00400000) /*!< Write protection of Sector6 */
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#define OB_WRP_SECTOR_7 ((uint32_t)0x00800000) /*!< Write protection of Sector7 */
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#define OB_WRP_SECTOR_All ((uint32_t)0x00FF0000) /*!< Write protection of all Sectors */
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/**
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|
* @}
|
||
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|
*/
|
||
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|
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||
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|
/**
|
||
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|
* @}
|
||
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|
*/
|
||
|
|
|
||
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|
/* Exported macro ------------------------------------------------------------*/
|
||
|
|
/* Exported functions --------------------------------------------------------*/
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||
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|
/** @addtogroup FLASHEx_Exported_Functions
|
||
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|
* @{
|
||
|
|
*/
|
||
|
|
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||
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|
/** @addtogroup FLASHEx_Exported_Functions_Group1
|
||
|
|
* @{
|
||
|
|
*/
|
||
|
|
/* Extension Program operation functions *************************************/
|
||
|
|
HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError);
|
||
|
|
HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit);
|
||
|
|
HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit);
|
||
|
|
void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
/* Private types -------------------------------------------------------------*/
|
||
|
|
/* Private variables ---------------------------------------------------------*/
|
||
|
|
/* Private constants ---------------------------------------------------------*/
|
||
|
|
/** @defgroup FLASHEx_Private_Constants FLASH Private Constants
|
||
|
|
* @{
|
||
|
|
*/
|
||
|
|
#define FLASH_SECTOR_TOTAL 8
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
/* Private macros ------------------------------------------------------------*/
|
||
|
|
/** @defgroup FLASHEx_Private_Macros FLASH Private Macros
|
||
|
|
* @{
|
||
|
|
*/
|
||
|
|
|
||
|
|
/** @defgroup FLASHEx_IS_FLASH_Definitions FLASH Private macros to check input parameters
|
||
|
|
* @{
|
||
|
|
*/
|
||
|
|
|
||
|
|
#define IS_FLASH_TYPEERASE(VALUE)(((VALUE) == FLASH_TYPEERASE_SECTORS) || \
|
||
|
|
((VALUE) == FLASH_TYPEERASE_MASSERASE))
|
||
|
|
|
||
|
|
#define IS_VOLTAGERANGE(RANGE)(((RANGE) == FLASH_VOLTAGE_RANGE_1) || \
|
||
|
|
((RANGE) == FLASH_VOLTAGE_RANGE_2) || \
|
||
|
|
((RANGE) == FLASH_VOLTAGE_RANGE_3) || \
|
||
|
|
((RANGE) == FLASH_VOLTAGE_RANGE_4))
|
||
|
|
|
||
|
|
#define IS_WRPSTATE(VALUE)(((VALUE) == OB_WRPSTATE_DISABLE) || \
|
||
|
|
((VALUE) == OB_WRPSTATE_ENABLE))
|
||
|
|
|
||
|
|
#define IS_OPTIONBYTE(VALUE)(((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER |\
|
||
|
|
OPTIONBYTE_BOR | OPTIONBYTE_BOOTADDR_0 | OPTIONBYTE_BOOTADDR_1)))
|
||
|
|
|
||
|
|
#define IS_OB_BOOT_ADDRESS(ADDRESS) (((ADDRESS) == OB_BOOTADDR_ITCM_RAM) || \
|
||
|
|
((ADDRESS) == OB_BOOTADDR_SYSTEM) || \
|
||
|
|
((ADDRESS) == OB_BOOTADDR_ITCM_FLASH) || \
|
||
|
|
((ADDRESS) == OB_BOOTADDR_AXIM_FLASH) || \
|
||
|
|
((ADDRESS) == OB_BOOTADDR_DTCM_RAM) || \
|
||
|
|
((ADDRESS) == OB_BOOTADDR_SRAM1) || \
|
||
|
|
((ADDRESS) == OB_BOOTADDR_SRAM2))
|
||
|
|
|
||
|
|
#define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) ||\
|
||
|
|
((LEVEL) == OB_RDP_LEVEL_1) ||\
|
||
|
|
((LEVEL) == OB_RDP_LEVEL_2))
|
||
|
|
|
||
|
|
#define IS_OB_WWDG_SOURCE(SOURCE) (((SOURCE) == OB_WWDG_SW) || ((SOURCE) == OB_WWDG_HW))
|
||
|
|
|
||
|
|
#define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW))
|
||
|
|
|
||
|
|
#define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST))
|
||
|
|
|
||
|
|
#define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST))
|
||
|
|
|
||
|
|
#define IS_OB_IWDG_STOP_FREEZE(FREEZE) (((FREEZE) == OB_IWDG_STOP_FREEZE) || ((FREEZE) == OB_IWDG_STOP_ACTIVE))
|
||
|
|
|
||
|
|
#define IS_OB_IWDG_STDBY_FREEZE(FREEZE) (((FREEZE) == OB_IWDG_STDBY_FREEZE) || ((FREEZE) == OB_IWDG_STDBY_ACTIVE))
|
||
|
|
|
||
|
|
#define IS_OB_BOR_LEVEL(LEVEL) (((LEVEL) == OB_BOR_LEVEL1) || ((LEVEL) == OB_BOR_LEVEL2) ||\
|
||
|
|
((LEVEL) == OB_BOR_LEVEL3) || ((LEVEL) == OB_BOR_OFF))
|
||
|
|
|
||
|
|
#define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) || \
|
||
|
|
((LATENCY) == FLASH_LATENCY_1) || \
|
||
|
|
((LATENCY) == FLASH_LATENCY_2) || \
|
||
|
|
((LATENCY) == FLASH_LATENCY_3) || \
|
||
|
|
((LATENCY) == FLASH_LATENCY_4) || \
|
||
|
|
((LATENCY) == FLASH_LATENCY_5) || \
|
||
|
|
((LATENCY) == FLASH_LATENCY_6) || \
|
||
|
|
((LATENCY) == FLASH_LATENCY_7) || \
|
||
|
|
((LATENCY) == FLASH_LATENCY_8) || \
|
||
|
|
((LATENCY) == FLASH_LATENCY_9) || \
|
||
|
|
((LATENCY) == FLASH_LATENCY_10) || \
|
||
|
|
((LATENCY) == FLASH_LATENCY_11) || \
|
||
|
|
((LATENCY) == FLASH_LATENCY_12) || \
|
||
|
|
((LATENCY) == FLASH_LATENCY_13) || \
|
||
|
|
((LATENCY) == FLASH_LATENCY_14) || \
|
||
|
|
((LATENCY) == FLASH_LATENCY_15))
|
||
|
|
|
||
|
|
#define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\
|
||
|
|
((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\
|
||
|
|
((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\
|
||
|
|
((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7))
|
||
|
|
|
||
|
|
|
||
|
|
#define IS_FLASH_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && ((ADDRESS) <= FLASH_END))
|
||
|
|
|
||
|
|
#define IS_FLASH_NBSECTORS(NBSECTORS) (((NBSECTORS) != 0) && ((NBSECTORS) <= FLASH_SECTOR_TOTAL))
|
||
|
|
|
||
|
|
#define IS_OB_WRP_SECTOR(SECTOR) ((((SECTOR) & (uint32_t)0xFF00FFFF) == 0x00000000) && ((SECTOR) != 0x00000000))
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
/* Private functions ---------------------------------------------------------*/
|
||
|
|
/** @defgroup FLASHEx_Private_Functions FLASH Private Functions
|
||
|
|
* @{
|
||
|
|
*/
|
||
|
|
void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange);
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
#ifdef __cplusplus
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#endif /* __STM32F7xx_HAL_FLASH_EX_H */
|
||
|
|
|
||
|
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|