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micropython/ports/mimxrt/boards/MIMXRT1064_EVK/mpconfigboard.h

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mimxrt/boards: Add MIMXRT1064_EVK board.
2020-04-07 08:54:01 +01:00
#define MICROPY_HW_BOARD_NAME "i.MX RT1064 EVK"
#define MICROPY_HW_MCU_NAME "MIMXRT1064DVL6A"
// MIMXRT1064_EVK has 1 user LED
mimxrt: Implement machine.Pin class. - modified pin type from pin_obj_t to machine_pin_obj_t - created machine_pin.c - implemented basic version of make-pins.py to genertate pins.c/.h files automatically; the only alternate function currently supported is GPIO - added af.csv files for all supported MCUs - replaced pins.c/pins.h files with pin.csv for all boards - implemented on/off/high/low/value/init methods - Implemented IN/OUT/OPEN_DRAIN modes - modified LDFLAGS for DEBUG build to get usefull .elf file for debugging Signed-off-by: Philipp Ebensberger
2020-08-21 15:03:21 +01:00
#define MICROPY_HW_LED1_PIN (pin_GPIO_AD_B0_09)
mimxrt/boards: Add MIMXRT1064_EVK board.
2020-04-07 08:54:01 +01:00
#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_low(pin))
#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_high(pin))
mimxrt: Add flash storage support with VFS and littlefs filesystem. This commit adds full support for a filesystem on all boards, with a block device object mimxrt.Flash() and uos.VfsLfs2 enabled. Main changes are: - Refactoring of linker scripts to accomodate reserved area for VFS. VFS will take up most of the available flash. 1M is reserved for code. 9K is reserved for flash configuration, interrupts, etc. - Addition of _boot.py with filesystem init code, called from main.c. - Definition of the mimxrt module with a Flash class in modmimxrt.[ch]. - Implementation of a flash driver class in mimxrt_flash.c. All flashing related functions are stored in ITCM RAM. - Addition of the uos module with filesystem functions. - Implementation of uos.urandom() for the sake of completeness of the uos module. It uses sample code from CircuitPython supplied under MIT license, which uses the NXP SDK example code. Done in collaboration with Philipp Ebensberger aka @alphaFred who contributed the essential part to enable writing to flash while code is executing, among other things.
2021-05-07 14:21:09 +01:00
#define BOARD_FLASH_CONFIG_HEADER_H "evkmimxrt1064_flexspi_nor_config.h"
mimxrt/machine_uart: Add the UART class to the machine module. The implementation uses the LPUARTx devices. Up to 8 UARTs can be used, given that the pins are accessible. E.g. 8 on Teensy 4.1, 5 on MIMXRT1020_EVK. For Tennsy 4.0 and 4.1 the UART numbers are as printed on the pinout 1..N. The MIMXRT10xx-EVK boards have only one UART named, which gets the number 1. All other UART are assigned to different Pins: MIMXRT1010-EVK: D0/D1 UART 1 D6/D7 UART 2 A0/D4 UART 3 MIMXRT1020-EVK: D0/D1 UART 1 D6/D9 UART 2 D10/D12 UART 3 D14/D15 UART 4 A0/A1 UART 5 MIMXRT1050-EVK, MIMXRT1060-EVK, MIMXRT1064-EVK: D0/D1 UART 1 D7/D6 UART 2 D8/D9 UART 3 A1/A0 UART 4
2021-05-30 17:18:33 +01:00
mimxrt/machine_pin: Implement pin.irq() functionality.
2021-06-05 13:06:04 +01:00
#define MICROPY_HW_NUM_PIN_IRQS (4 * 32 + 3)
mimxrt/machine_uart: Add the UART class to the machine module. The implementation uses the LPUARTx devices. Up to 8 UARTs can be used, given that the pins are accessible. E.g. 8 on Teensy 4.1, 5 on MIMXRT1020_EVK. For Tennsy 4.0 and 4.1 the UART numbers are as printed on the pinout 1..N. The MIMXRT10xx-EVK boards have only one UART named, which gets the number 1. All other UART are assigned to different Pins: MIMXRT1010-EVK: D0/D1 UART 1 D6/D7 UART 2 A0/D4 UART 3 MIMXRT1020-EVK: D0/D1 UART 1 D6/D9 UART 2 D10/D12 UART 3 D14/D15 UART 4 A0/A1 UART 5 MIMXRT1050-EVK, MIMXRT1060-EVK, MIMXRT1064-EVK: D0/D1 UART 1 D7/D6 UART 2 D8/D9 UART 3 A1/A0 UART 4
2021-05-30 17:18:33 +01:00
// Define mapping logical UART # to hardware UART #
// LPUART3 on D0/D1 -> 1
// LPUART2 on D7/D6 -> 2
// LPUART6 on D8/D9 -> 3
// LPUART8 on A1/A0 -> 4
#define MICROPY_HW_UART_NUM (sizeof(uart_index_table) / sizeof(uart_index_table)[0])
#define MICROPY_HW_UART_INDEX { 0, 3, 2, 6, 8 }
#define IOMUX_TABLE_UART \
{ 0 }, { 0 }, \
{ IOMUXC_GPIO_AD_B1_02_LPUART2_TX }, { IOMUXC_GPIO_AD_B1_03_LPUART2_RX }, \
{ IOMUXC_GPIO_AD_B1_06_LPUART3_TX }, { IOMUXC_GPIO_AD_B1_07_LPUART3_RX }, \
{ 0 }, { 0 }, \
{ 0 }, { 0 }, \
{ IOMUXC_GPIO_AD_B0_02_LPUART6_TX }, { IOMUXC_GPIO_AD_B0_03_LPUART6_RX }, \
{ 0 }, { 0 }, \
{ IOMUXC_GPIO_AD_B1_10_LPUART8_TX }, { IOMUXC_GPIO_AD_B1_11_LPUART8_RX },
mimxrt/machine_spi: Add the SPI class to the machine module. This class supports SPI bus controller mode, with blocking transfers. SPI device numbers start at 0, to comply with the pinout of the Teensy boards. With the configured clock frequency the fastest baud rate is 33MHz. For messages longer 16 bytes DMA is used. The class uses the existing framework with extmod/machine_spi.c. Extended driver options: - drive=n with n being between 1 and 6 or PIN.POWER_1 to PIN.POWER_6. Since the pins used by the SPI are fixed, no Pin settings can be made. Thus the drive option is added allowing to control ringing and crosstalk on the connection. - gap_ns=nnnnn is the time between sent data items in a frame given in ns. Default is 2 clock cycles.
2021-06-09 09:47:18 +01:00
#define MICROPY_HW_SPI_INDEX { 1 }
#define IOMUX_TABLE_SPI \
{ IOMUXC_GPIO_SD_B0_00_LPSPI1_SCK }, { IOMUXC_GPIO_SD_B0_01_LPSPI1_PCS0 }, \
{ IOMUXC_GPIO_SD_B0_02_LPSPI1_SDO }, { IOMUXC_GPIO_SD_B0_03_LPSPI1_SDI },
#define DMA_REQ_SRC_RX { 0, kDmaRequestMuxLPSPI1Rx, kDmaRequestMuxLPSPI2Rx, \
kDmaRequestMuxLPSPI3Rx, kDmaRequestMuxLPSPI4Rx }
#define DMA_REQ_SRC_TX { 0, kDmaRequestMuxLPSPI1Tx, kDmaRequestMuxLPSPI2Tx, \
kDmaRequestMuxLPSPI3Tx, kDmaRequestMuxLPSPI4Tx }
mimxrt/machine_i2c: Add hardware-based machine.I2C to machine module. It uses non-blocking transfer of data. Advantage over SoftI2C: - Higher data rate up to ~3 MHZ. - Full protocol support.
2021-06-19 21:09:40 +01:00
// Define the mapping hardware I2C # to logical I2C #
// SDA/SCL HW-I2C Logical I2C
// D14/D15 LPI2C1 -> 0
// D1/D0 LPI2C3 -> 1
#define MICROPY_HW_I2C_INDEX { 1, 3 }
#define IOMUX_TABLE_I2C \
{ IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL }, { IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA }, \
{ 0 }, { 0 }, \
{ IOMUXC_GPIO_AD_B1_07_LPI2C3_SCL }, { IOMUXC_GPIO_AD_B1_06_LPI2C3_SDA },