2014-05-03 23:27:38 +01:00
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/*
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* This file is part of the Micro Python project, http://micropython.org/
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*
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* Original template from ST Cube library. See below for header.
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2013, 2014 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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/**
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******************************************************************************
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* @file Templates/Src/stm32f4xx_it.c
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* @author MCD Application Team
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* @version V1.0.1
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* @date 26-February-2014
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* @brief Main Interrupt Service Routines.
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* This file provides template for all exceptions handler and
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* peripherals interrupt service routine.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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#include <stdio.h>
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2015-07-28 18:15:18 +01:00
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#include "stm32_it.h"
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2015-07-28 16:36:26 +01:00
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#include STM32_HAL_H
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2014-05-03 23:27:38 +01:00
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2015-01-01 21:06:20 +00:00
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#include "py/obj.h"
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2015-03-20 22:27:34 +00:00
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#include "pendsv.h"
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2014-05-03 23:27:38 +01:00
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#include "extint.h"
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#include "timer.h"
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2014-10-11 17:57:10 +01:00
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#include "uart.h"
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2014-05-03 23:27:38 +01:00
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#include "storage.h"
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2015-01-15 22:16:57 +00:00
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#include "can.h"
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2014-05-03 23:27:38 +01:00
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extern void __fatal_error(const char*);
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2015-01-20 11:55:10 +00:00
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extern PCD_HandleTypeDef pcd_handle;
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2014-05-03 23:27:38 +01:00
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/******************************************************************************/
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/* Cortex-M4 Processor Exceptions Handlers */
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/******************************************************************************/
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2015-08-03 00:13:21 +01:00
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// Set the following to 1 to get some more information on the Hard Fault
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// More information about decoding the fault registers can be found here:
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// http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0646a/Cihdjcfc.html
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#define REPORT_HARD_FAULT_REGS 0
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#if REPORT_HARD_FAULT_REGS
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#include "mphal.h"
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char *fmt_hex(uint32_t val, char *buf) {
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const char *hexDig = "0123456789abcdef";
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buf[0] = hexDig[(val >> 28) & 0x0f];
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buf[1] = hexDig[(val >> 24) & 0x0f];
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buf[2] = hexDig[(val >> 20) & 0x0f];
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buf[3] = hexDig[(val >> 16) & 0x0f];
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buf[4] = hexDig[(val >> 12) & 0x0f];
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buf[5] = hexDig[(val >> 8) & 0x0f];
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buf[6] = hexDig[(val >> 4) & 0x0f];
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buf[7] = hexDig[(val >> 0) & 0x0f];
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buf[8] = '\0';
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return buf;
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}
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void print_reg(const char *label, uint32_t val) {
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char hexStr[9];
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mp_hal_stdout_tx_str(label);
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mp_hal_stdout_tx_str(fmt_hex(val, hexStr));
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mp_hal_stdout_tx_str("\r\n");
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}
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#endif // REPORT_HARD_FAULT_REGS
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2014-05-03 23:27:38 +01:00
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/**
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* @brief This function handles NMI exception.
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* @param None
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* @retval None
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*/
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void NMI_Handler(void) {
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}
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/**
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* @brief This function handles Hard Fault exception.
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* @param None
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* @retval None
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*/
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void HardFault_Handler(void) {
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2015-08-03 00:13:21 +01:00
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#if REPORT_HARD_FAULT_REGS
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uint32_t cfsr = SCB->CFSR;
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print_reg("HFSR ", SCB->HFSR);
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print_reg("CFSR ", cfsr);
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if (cfsr & 0x80) {
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print_reg("MMFAR ", SCB->MMFAR);
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}
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if (cfsr & 0x8000) {
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print_reg("BFAR ", SCB->BFAR);
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}
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#endif // REPORT_HARD_FAULT_REGS
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2014-05-03 23:27:38 +01:00
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/* Go to infinite loop when Hard Fault exception occurs */
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while (1) {
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__fatal_error("HardFault");
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}
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}
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/**
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* @brief This function handles Memory Manage exception.
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* @param None
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* @retval None
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*/
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void MemManage_Handler(void) {
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/* Go to infinite loop when Memory Manage exception occurs */
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while (1) {
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__fatal_error("MemManage");
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}
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}
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/**
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* @brief This function handles Bus Fault exception.
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* @param None
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* @retval None
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*/
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void BusFault_Handler(void) {
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/* Go to infinite loop when Bus Fault exception occurs */
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while (1) {
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__fatal_error("BusFault");
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}
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}
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/**
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* @brief This function handles Usage Fault exception.
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* @param None
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* @retval None
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*/
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void UsageFault_Handler(void) {
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/* Go to infinite loop when Usage Fault exception occurs */
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while (1) {
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__fatal_error("UsageFault");
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}
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}
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/**
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* @brief This function handles SVCall exception.
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* @param None
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* @retval None
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*/
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void SVC_Handler(void) {
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}
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/**
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* @brief This function handles Debug Monitor exception.
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* @param None
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* @retval None
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*/
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void DebugMon_Handler(void) {
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}
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/**
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* @brief This function handles PendSVC exception.
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* @param None
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* @retval None
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*/
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void PendSV_Handler(void) {
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pendsv_isr_handler();
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}
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/**
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* @brief This function handles SysTick Handler.
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* @param None
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* @retval None
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*/
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void SysTick_Handler(void) {
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2014-08-25 18:12:44 +01:00
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// Instead of calling HAL_IncTick we do the increment here of the counter.
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// This is purely for efficiency, since SysTick is called 1000 times per
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// second at the highest interrupt priority.
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extern __IO uint32_t uwTick;
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uwTick += 1;
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2014-08-23 20:21:12 +01:00
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// Read the systick control regster. This has the side effect of clearing
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// the COUNTFLAG bit, which makes the logic in sys_tick_get_microseconds
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// work properly.
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SysTick->CTRL;
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2014-05-03 23:27:38 +01:00
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}
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/******************************************************************************/
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/* STM32F4xx Peripherals Interrupt Handlers */
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/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
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/* available peripheral interrupt handler's name please refer to the startup */
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/* file (startup_stm32f4xx.s). */
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/******************************************************************************/
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/**
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* @brief This function handles USB-On-The-Go FS global interrupt request.
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* @param None
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* @retval None
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*/
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#if defined(USE_USB_FS)
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#define OTG_XX_IRQHandler OTG_FS_IRQHandler
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#define OTG_XX_WKUP_IRQHandler OTG_FS_WKUP_IRQHandler
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#elif defined(USE_USB_HS)
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#define OTG_XX_IRQHandler OTG_HS_IRQHandler
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#define OTG_XX_WKUP_IRQHandler OTG_HS_WKUP_IRQHandler
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#endif
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#if defined(OTG_XX_IRQHandler)
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void OTG_XX_IRQHandler(void) {
|
2015-01-20 11:55:10 +00:00
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HAL_PCD_IRQHandler(&pcd_handle);
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2014-05-03 23:27:38 +01:00
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}
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#endif
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/**
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* @brief This function handles USB OTG FS or HS Wakeup IRQ Handler.
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* @param None
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* @retval None
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*/
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#if defined(OTG_XX_WKUP_IRQHandler)
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void OTG_XX_WKUP_IRQHandler(void) {
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2015-01-20 11:55:10 +00:00
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if ((&pcd_handle)->Init.low_power_enable) {
|
2014-05-03 23:27:38 +01:00
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/* Reset SLEEPDEEP bit of Cortex System Control Register */
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SCB->SCR &= (uint32_t)~((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
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/* Configures system clock after wake-up from STOP: enable HSE, PLL and select
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PLL as system clock source (HSE and PLL are disabled in STOP mode) */
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__HAL_RCC_HSE_CONFIG(RCC_HSE_ON);
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/* Wait till HSE is ready */
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while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
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{}
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/* Enable the main PLL. */
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__HAL_RCC_PLL_ENABLE();
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/* Wait till PLL is ready */
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while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
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{}
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/* Select PLL as SYSCLK */
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MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_SYSCLKSOURCE_PLLCLK);
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while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
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{}
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/* ungate PHY clock */
|
2015-01-20 11:55:10 +00:00
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__HAL_PCD_UNGATE_PHYCLOCK((&pcd_handle));
|
2014-05-03 23:27:38 +01:00
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}
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#ifdef USE_USB_FS
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/* Clear EXTI pending Bit*/
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__HAL_USB_FS_EXTI_CLEAR_FLAG();
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#elif defined(USE_USB_HS)
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/* Clear EXTI pending Bit*/
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__HAL_USB_HS_EXTI_CLEAR_FLAG();
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#endif
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}
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#endif
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/**
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* @brief This function handles PPP interrupt request.
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* @param None
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* @retval None
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*/
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/*void PPP_IRQHandler(void)
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{
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}*/
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// Handle a flash (erase/program) interrupt.
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void FLASH_IRQHandler(void) {
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// This calls the real flash IRQ handler, if needed
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/*
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uint32_t flash_cr = FLASH->CR;
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if ((flash_cr & FLASH_IT_EOP) || (flash_cr & FLASH_IT_ERR)) {
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HAL_FLASH_IRQHandler();
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}
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*/
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// This call the storage IRQ handler, to check if the flash cache needs flushing
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storage_irq_handler();
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}
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/**
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* @brief These functions handle the EXTI interrupt requests.
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* @param None
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* @retval None
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*/
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void EXTI0_IRQHandler(void) {
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Handle_EXTI_Irq(0);
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}
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void EXTI1_IRQHandler(void) {
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Handle_EXTI_Irq(1);
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}
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void EXTI2_IRQHandler(void) {
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Handle_EXTI_Irq(2);
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}
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void EXTI3_IRQHandler(void) {
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Handle_EXTI_Irq(3);
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}
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void EXTI4_IRQHandler(void) {
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Handle_EXTI_Irq(4);
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}
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void EXTI9_5_IRQHandler(void) {
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Handle_EXTI_Irq(5);
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Handle_EXTI_Irq(6);
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Handle_EXTI_Irq(7);
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Handle_EXTI_Irq(8);
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Handle_EXTI_Irq(9);
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}
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void EXTI15_10_IRQHandler(void) {
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Handle_EXTI_Irq(10);
|
|
|
|
Handle_EXTI_Irq(11);
|
|
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|
Handle_EXTI_Irq(12);
|
|
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Handle_EXTI_Irq(13);
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|
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Handle_EXTI_Irq(14);
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|
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Handle_EXTI_Irq(15);
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|
|
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}
|
|
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|
|
|
|
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void PVD_IRQHandler(void) {
|
|
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|
Handle_EXTI_Irq(EXTI_PVD_OUTPUT);
|
|
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|
}
|
|
|
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|
|
|
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void RTC_Alarm_IRQHandler(void) {
|
|
|
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Handle_EXTI_Irq(EXTI_RTC_ALARM);
|
|
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}
|
|
|
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|
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#if defined(ETH) // The 407 has ETH, the 405 doesn't
|
|
|
|
void ETH_WKUP_IRQHandler(void) {
|
|
|
|
Handle_EXTI_Irq(EXTI_ETH_WAKEUP);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
void TAMP_STAMP_IRQHandler(void) {
|
|
|
|
Handle_EXTI_Irq(EXTI_RTC_TIMESTAMP);
|
|
|
|
}
|
|
|
|
|
|
|
|
void RTC_WKUP_IRQHandler(void) {
|
2015-03-15 17:15:55 +00:00
|
|
|
RTC->ISR &= ~(1 << 10); // clear wakeup interrupt flag
|
|
|
|
Handle_EXTI_Irq(EXTI_RTC_WAKEUP); // clear EXTI flag and execute optional callback
|
2014-05-03 23:27:38 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
void TIM1_BRK_TIM9_IRQHandler(void) {
|
|
|
|
timer_irq_handler(9);
|
|
|
|
}
|
|
|
|
|
|
|
|
void TIM1_UP_TIM10_IRQHandler(void) {
|
|
|
|
timer_irq_handler(1);
|
|
|
|
timer_irq_handler(10);
|
|
|
|
}
|
|
|
|
|
|
|
|
void TIM1_TRG_COM_TIM11_IRQHandler(void) {
|
|
|
|
timer_irq_handler(11);
|
|
|
|
}
|
|
|
|
|
|
|
|
void TIM2_IRQHandler(void) {
|
|
|
|
timer_irq_handler(2);
|
|
|
|
}
|
|
|
|
|
|
|
|
void TIM3_IRQHandler(void) {
|
|
|
|
HAL_TIM_IRQHandler(&TIM3_Handle);
|
|
|
|
}
|
|
|
|
|
|
|
|
void TIM4_IRQHandler(void) {
|
|
|
|
timer_irq_handler(4);
|
|
|
|
}
|
|
|
|
|
|
|
|
void TIM5_IRQHandler(void) {
|
|
|
|
timer_irq_handler(5);
|
|
|
|
HAL_TIM_IRQHandler(&TIM5_Handle);
|
|
|
|
}
|
|
|
|
|
|
|
|
void TIM6_DAC_IRQHandler(void) {
|
|
|
|
timer_irq_handler(6);
|
|
|
|
}
|
|
|
|
|
|
|
|
void TIM7_IRQHandler(void) {
|
|
|
|
timer_irq_handler(7);
|
|
|
|
}
|
|
|
|
|
|
|
|
void TIM8_BRK_TIM12_IRQHandler(void) {
|
|
|
|
timer_irq_handler(12);
|
|
|
|
}
|
|
|
|
|
|
|
|
void TIM8_UP_TIM13_IRQHandler(void) {
|
|
|
|
timer_irq_handler(8);
|
|
|
|
timer_irq_handler(13);
|
|
|
|
}
|
|
|
|
|
|
|
|
void TIM8_TRG_COM_TIM14_IRQHandler(void) {
|
|
|
|
timer_irq_handler(14);
|
|
|
|
}
|
2014-10-11 17:57:10 +01:00
|
|
|
|
|
|
|
// UART/USART IRQ handlers
|
|
|
|
void USART1_IRQHandler(void) {
|
|
|
|
uart_irq_handler(1);
|
|
|
|
}
|
|
|
|
|
|
|
|
void USART2_IRQHandler(void) {
|
|
|
|
uart_irq_handler(2);
|
|
|
|
}
|
|
|
|
|
|
|
|
void USART3_IRQHandler(void) {
|
|
|
|
uart_irq_handler(3);
|
|
|
|
}
|
|
|
|
|
|
|
|
void UART4_IRQHandler(void) {
|
|
|
|
uart_irq_handler(4);
|
|
|
|
}
|
|
|
|
|
2015-05-31 23:37:37 +01:00
|
|
|
void UART5_IRQHandler(void) {
|
|
|
|
uart_irq_handler(5);
|
|
|
|
}
|
|
|
|
|
2014-10-11 17:57:10 +01:00
|
|
|
void USART6_IRQHandler(void) {
|
|
|
|
uart_irq_handler(6);
|
|
|
|
}
|
2015-01-15 22:16:57 +00:00
|
|
|
|
|
|
|
#if MICROPY_HW_ENABLE_CAN
|
|
|
|
void CAN1_RX0_IRQHandler(void) {
|
|
|
|
can_rx_irq_handler(PYB_CAN_1, CAN_FIFO0);
|
|
|
|
}
|
|
|
|
|
|
|
|
void CAN1_RX1_IRQHandler(void) {
|
|
|
|
can_rx_irq_handler(PYB_CAN_1, CAN_FIFO1);
|
|
|
|
}
|
|
|
|
|
|
|
|
void CAN2_RX0_IRQHandler(void) {
|
|
|
|
can_rx_irq_handler(PYB_CAN_2, CAN_FIFO0);
|
|
|
|
}
|
|
|
|
|
|
|
|
void CAN2_RX1_IRQHandler(void) {
|
|
|
|
can_rx_irq_handler(PYB_CAN_2, CAN_FIFO1);
|
|
|
|
}
|
|
|
|
#endif // MICROPY_HW_ENABLE_CAN
|