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mimxrt/machine_uart: Set the UART clock to a fixed 40MHz value. 

There is a single UART clock for all devices, so switching it for one will
affect all devices used at that time.  This commit fixes that issue by
keeping the clock at a fixed value.

This fixed clock still supports the common baud rates between 300 and
921600 baud.

Signed-off-by: robert-hh <robert@hammelrath.com>
This commit is contained in:
robert-hh 2023-09-05 16:29:51 +02:00 committed by Damien George
parent 52e3da0a0b
commit 0701341e7f
13 changed files with 12 additions and 25 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
ports/mimxrt/boards/MIMXRT1011_clock_config.c
View File

@ -241,7 +241,7 @@ void BOARD_BootClockRUN(void) {
CLOCK_DisableClock(kCLOCK_Lpuart3); CLOCK_DisableClock(kCLOCK_Lpuart3);
CLOCK_DisableClock(kCLOCK_Lpuart4); CLOCK_DisableClock(kCLOCK_Lpuart4);
/* Set UART_CLK_PODF. */ /* Set UART_CLK_PODF. */
CLOCK_SetDiv(kCLOCK_UartDiv, 0); CLOCK_SetDiv(kCLOCK_UartDiv, 1);
/* Set Uart clock source. */ /* Set Uart clock source. */
CLOCK_SetMux(kCLOCK_UartMux, 0); CLOCK_SetMux(kCLOCK_UartMux, 0);
/* Disable SPDIF clock gate. */ /* Disable SPDIF clock gate. */

2
ports/mimxrt/boards/MIMXRT1011_clock_config.h
View File

@ -71,7 +71,7 @@ void BOARD_InitBootClocks(void);
#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL #define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL
#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL #define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL
#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL #define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL
#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL #define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 40000000UL
#define BOARD_BOOTCLOCKRUN_USBPHY_CLK 0UL #define BOARD_BOOTCLOCKRUN_USBPHY_CLK 0UL
/*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration. /*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration.

2
ports/mimxrt/boards/MIMXRT1015_clock_config.c
View File

@ -257,7 +257,7 @@ void BOARD_BootClockRUN(void) {
CLOCK_DisableClock(kCLOCK_Lpuart3); CLOCK_DisableClock(kCLOCK_Lpuart3);
CLOCK_DisableClock(kCLOCK_Lpuart4); CLOCK_DisableClock(kCLOCK_Lpuart4);
/* Set UART_CLK_PODF. */ /* Set UART_CLK_PODF. */
CLOCK_SetDiv(kCLOCK_UartDiv, 0); CLOCK_SetDiv(kCLOCK_UartDiv, 1);
/* Set Uart clock source. */ /* Set Uart clock source. */
CLOCK_SetMux(kCLOCK_UartMux, 0); CLOCK_SetMux(kCLOCK_UartMux, 0);
/* Disable SPDIF clock gate. */ /* Disable SPDIF clock gate. */

2
ports/mimxrt/boards/MIMXRT1015_clock_config.h
View File

@ -74,7 +74,7 @@ void BOARD_InitBootClocks(void);
#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL #define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL
#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL #define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL
#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL #define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL
#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL #define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 40000000UL
#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 0UL #define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 0UL
/*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration. /*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration.

2
ports/mimxrt/boards/MIMXRT1021_clock_config.c
View File

@ -306,7 +306,7 @@ void BOARD_BootClockRUN(void) {
CLOCK_DisableClock(kCLOCK_Lpuart7); CLOCK_DisableClock(kCLOCK_Lpuart7);
CLOCK_DisableClock(kCLOCK_Lpuart8); CLOCK_DisableClock(kCLOCK_Lpuart8);
/* Set UART_CLK_PODF. */ /* Set UART_CLK_PODF. */
CLOCK_SetDiv(kCLOCK_UartDiv, 0); CLOCK_SetDiv(kCLOCK_UartDiv, 1);
/* Set Uart clock source. */ /* Set Uart clock source. */
CLOCK_SetMux(kCLOCK_UartMux, 0); CLOCK_SetMux(kCLOCK_UartMux, 0);
/* Disable SPDIF clock gate. */ /* Disable SPDIF clock gate. */

2
ports/mimxrt/boards/MIMXRT1021_clock_config.h
View File

@ -79,7 +79,7 @@ void BOARD_InitBootClocks(void);
#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL #define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL
#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL #define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL
#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL #define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL
#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL #define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 40000000UL
#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 0UL #define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 0UL
#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 176000000UL #define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 176000000UL
#define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT 176000000UL #define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT 176000000UL

2
ports/mimxrt/boards/MIMXRT1052_clock_config.c
View File

@ -311,7 +311,7 @@ void BOARD_BootClockRUN(void) {
CLOCK_DisableClock(kCLOCK_Lpuart7); CLOCK_DisableClock(kCLOCK_Lpuart7);
CLOCK_DisableClock(kCLOCK_Lpuart8); CLOCK_DisableClock(kCLOCK_Lpuart8);
/* Set UART_CLK_PODF. */ /* Set UART_CLK_PODF. */
CLOCK_SetDiv(kCLOCK_UartDiv, 0); CLOCK_SetDiv(kCLOCK_UartDiv, 1);
/* Set Uart clock source. */ /* Set Uart clock source. */
CLOCK_SetMux(kCLOCK_UartMux, 0); CLOCK_SetMux(kCLOCK_UartMux, 0);
/* Disable LCDIF clock gate. */ /* Disable LCDIF clock gate. */

2
ports/mimxrt/boards/MIMXRT1052_clock_config.h
View File

@ -83,7 +83,7 @@ void BOARD_InitBootClocks(void);
#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL #define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL
#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL #define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL
#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL #define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL
#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL #define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 40000000UL
#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 0UL #define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 0UL
#define BOARD_BOOTCLOCKRUN_USBPHY2_CLK 0UL #define BOARD_BOOTCLOCKRUN_USBPHY2_CLK 0UL
#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 198000000UL #define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 198000000UL

2
ports/mimxrt/boards/MIMXRT1062_clock_config.c
View File

@ -324,7 +324,7 @@ void BOARD_BootClockRUN(void) {
CLOCK_DisableClock(kCLOCK_Lpuart7); CLOCK_DisableClock(kCLOCK_Lpuart7);
CLOCK_DisableClock(kCLOCK_Lpuart8); CLOCK_DisableClock(kCLOCK_Lpuart8);
/* Set UART_CLK_PODF. */ /* Set UART_CLK_PODF. */
CLOCK_SetDiv(kCLOCK_UartDiv, 0); CLOCK_SetDiv(kCLOCK_UartDiv, 1);
/* Set Uart clock source. */ /* Set Uart clock source. */
CLOCK_SetMux(kCLOCK_UartMux, 0); CLOCK_SetMux(kCLOCK_UartMux, 0);
/* Disable LCDIF clock gate. */ /* Disable LCDIF clock gate. */

2
ports/mimxrt/boards/MIMXRT1062_clock_config.h
View File

@ -86,7 +86,7 @@ void BOARD_InitBootClocks(void);
#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL #define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL
#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL #define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL
#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL #define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL
#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL #define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 40000000UL
#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 0UL #define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 0UL
#define BOARD_BOOTCLOCKRUN_USBPHY2_CLK 0UL #define BOARD_BOOTCLOCKRUN_USBPHY2_CLK 0UL
#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 198000000UL #define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 198000000UL

2
ports/mimxrt/boards/MIMXRT1064_clock_config.c
View File

@ -324,7 +324,7 @@ void BOARD_BootClockRUN(void) {
CLOCK_DisableClock(kCLOCK_Lpuart7); CLOCK_DisableClock(kCLOCK_Lpuart7);
CLOCK_DisableClock(kCLOCK_Lpuart8); CLOCK_DisableClock(kCLOCK_Lpuart8);
/* Set UART_CLK_PODF. */ /* Set UART_CLK_PODF. */
CLOCK_SetDiv(kCLOCK_UartDiv, 0); CLOCK_SetDiv(kCLOCK_UartDiv, 1);
/* Set Uart clock source. */ /* Set Uart clock source. */
CLOCK_SetMux(kCLOCK_UartMux, 0); CLOCK_SetMux(kCLOCK_UartMux, 0);
/* Disable LCDIF clock gate. */ /* Disable LCDIF clock gate. */

2
ports/mimxrt/boards/MIMXRT1064_clock_config.h
View File

@ -86,7 +86,7 @@ void BOARD_InitBootClocks(void);
#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL #define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL
#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL #define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL
#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL #define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL
#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL #define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 40000000UL
#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 0UL #define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 0UL
#define BOARD_BOOTCLOCKRUN_USBPHY2_CLK 0UL #define BOARD_BOOTCLOCKRUN_USBPHY2_CLK 0UL
#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 198000000UL #define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 198000000UL

13
ports/mimxrt/machine_uart.c
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@ -153,24 +153,12 @@ static void machine_uart_ensure_active(machine_uart_obj_t *uart) {
} }
} }
#if !defined(MIMXRT117x_SERIES)
static inline void uart_set_clock_divider(uint32_t baudrate) {
// For baud rates < 460800 divide the clock by 10, supporting baud rates down to 50 baud.
if (baudrate >= 460800) {
CLOCK_SetDiv(kCLOCK_UartDiv, 0);
} else {
CLOCK_SetDiv(kCLOCK_UartDiv, 9);
}
}
#endif
void machine_uart_set_baudrate(mp_obj_t uart_in, uint32_t baudrate) { void machine_uart_set_baudrate(mp_obj_t uart_in, uint32_t baudrate) {
machine_uart_obj_t *uart = MP_OBJ_TO_PTR(uart_in); machine_uart_obj_t *uart = MP_OBJ_TO_PTR(uart_in);
#if defined(MIMXRT117x_SERIES) #if defined(MIMXRT117x_SERIES)
// Use the Lpuart1 clock value, which is set for All UART devices. // Use the Lpuart1 clock value, which is set for All UART devices.
LPUART_SetBaudRate(uart->lpuart, baudrate, CLOCK_GetRootClockFreq(kCLOCK_Root_Lpuart1)); LPUART_SetBaudRate(uart->lpuart, baudrate, CLOCK_GetRootClockFreq(kCLOCK_Root_Lpuart1));
#else #else
uart_set_clock_divider(baudrate);
LPUART_SetBaudRate(uart->lpuart, baudrate, CLOCK_GetClockRootFreq(kCLOCK_UartClkRoot)); LPUART_SetBaudRate(uart->lpuart, baudrate, CLOCK_GetClockRootFreq(kCLOCK_UartClkRoot));
#endif #endif
} }
@ -315,7 +303,6 @@ STATIC mp_obj_t machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args
// Use the Lpuart1 clock value, which is set for All UART devices. // Use the Lpuart1 clock value, which is set for All UART devices.
LPUART_Init(self->lpuart, &self->config, CLOCK_GetRootClockFreq(kCLOCK_Root_Lpuart1)); LPUART_Init(self->lpuart, &self->config, CLOCK_GetRootClockFreq(kCLOCK_Root_Lpuart1));
#else #else
uart_set_clock_divider(self->config.baudRate_Bps);
LPUART_Init(self->lpuart, &self->config, CLOCK_GetClockRootFreq(kCLOCK_UartClkRoot)); LPUART_Init(self->lpuart, &self->config, CLOCK_GetClockRootFreq(kCLOCK_UartClkRoot));
#endif #endif
LPUART_TransferCreateHandle(self->lpuart, &self->handle, LPUART_UserCallback, self); LPUART_TransferCreateHandle(self->lpuart, &self->handle, LPUART_UserCallback, self);