stmhal: Add config option for storage to use second flash segment.
When enabled this allows the internal storage to be split over 2 contiguous regions of flash (two segments), and so the storage can be increased. This option is disabled by default, giving original behaviour.
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0807139c1d
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@ -37,24 +37,36 @@
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#if defined(STM32F405xx) || defined(STM32F407xx)
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#if defined(STM32F405xx) || defined(STM32F407xx)
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#define CACHE_MEM_START_ADDR (0x10000000) // CCM data RAM, 64k
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#define CACHE_MEM_START_ADDR (0x10000000) // CCM data RAM, 64k
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#define FLASH_PART1_START_BLOCK (0x100)
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#define FLASH_PART1_NUM_BLOCKS (224) // 16k+16k+16k+64k=112k
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#define FLASH_MEM_START_ADDR (0x08004000) // sector 1, 16k
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#define FLASH_SECTOR_SIZE_MAX (0x10000) // 64k max, size of CCM
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#define FLASH_SECTOR_SIZE_MAX (0x10000) // 64k max, size of CCM
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#define FLASH_MEM_SEG1_START_ADDR (0x08004000) // sector 1
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#define FLASH_MEM_SEG1_NUM_BLOCKS (224) // sectors 1,2,3,4: 16k+16k+16k+64k=112k
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// enable this to get an extra 64k of storage (uses the last sector of the flash)
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#if 0
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#define FLASH_MEM_SEG2_START_ADDR (0x080e0000) // sector 11
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#define FLASH_MEM_SEG2_NUM_BLOCKS (128) // sector 11: 128k
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#endif
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#elif defined(STM32F401xE) || defined(STM32F411xE)
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#elif defined(STM32F401xE) || defined(STM32F411xE)
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STATIC byte flash_cache_mem[0x4000] __attribute__((aligned(4))); // 16k
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STATIC byte flash_cache_mem[0x4000] __attribute__((aligned(4))); // 16k
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#define CACHE_MEM_START_ADDR (&flash_cache_mem[0])
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#define CACHE_MEM_START_ADDR (&flash_cache_mem[0])
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#define FLASH_PART1_START_BLOCK (0x100)
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#define FLASH_PART1_NUM_BLOCKS (128) // 16k+16k+16k+16k(of64k)=64k
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#define FLASH_MEM_START_ADDR (0x08004000) // sector 1, 16k
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#define FLASH_SECTOR_SIZE_MAX (0x4000) // 16k max due to size of cache buffer
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#define FLASH_SECTOR_SIZE_MAX (0x4000) // 16k max due to size of cache buffer
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#define FLASH_MEM_SEG1_START_ADDR (0x08004000) // sector 1
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#define FLASH_MEM_SEG1_NUM_BLOCKS (128) // sectors 1,2,3,4: 16k+16k+16k+16k(of 64k)=64k
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#else
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#else
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#error "no storage support for this MCU"
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#error "no storage support for this MCU"
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#endif
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#endif
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#if !defined(FLASH_MEM_SEG2_START_ADDR)
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#define FLASH_MEM_SEG2_START_ADDR (0) // no second segment
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#define FLASH_MEM_SEG2_NUM_BLOCKS (0) // no second segment
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#endif
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#define FLASH_PART1_START_BLOCK (0x100)
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#define FLASH_PART1_NUM_BLOCKS (FLASH_MEM_SEG1_NUM_BLOCKS + FLASH_MEM_SEG2_NUM_BLOCKS)
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#define FLASH_FLAG_DIRTY (1)
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#define FLASH_FLAG_DIRTY (1)
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#define FLASH_FLAG_FORCE_WRITE (2)
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#define FLASH_FLAG_FORCE_WRITE (2)
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#define FLASH_FLAG_ERASED (4)
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#define FLASH_FLAG_ERASED (4)
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@ -212,6 +224,21 @@ static void build_partition(uint8_t *buf, int boot, int type, uint32_t start_blo
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buf[15] = num_blocks >> 24;
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buf[15] = num_blocks >> 24;
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}
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}
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static uint32_t convert_block_to_flash_addr(uint32_t block) {
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if (FLASH_PART1_START_BLOCK <= block && block < FLASH_PART1_START_BLOCK + FLASH_PART1_NUM_BLOCKS) {
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// a block in partition 1
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block -= FLASH_PART1_START_BLOCK;
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if (block < FLASH_MEM_SEG1_NUM_BLOCKS) {
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return FLASH_MEM_SEG1_START_ADDR + block * FLASH_BLOCK_SIZE;
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} else if (block < FLASH_MEM_SEG1_NUM_BLOCKS + FLASH_MEM_SEG2_NUM_BLOCKS) {
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return FLASH_MEM_SEG2_START_ADDR + (block - FLASH_MEM_SEG1_NUM_BLOCKS) * FLASH_BLOCK_SIZE;
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}
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// can add more flash segments here if needed, following above pattern
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}
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// bad block
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return -1;
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}
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bool storage_read_block(uint8_t *dest, uint32_t block) {
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bool storage_read_block(uint8_t *dest, uint32_t block) {
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//printf("RD %u\n", block);
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//printf("RD %u\n", block);
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if (block == 0) {
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if (block == 0) {
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@ -231,16 +258,16 @@ bool storage_read_block(uint8_t *dest, uint32_t block) {
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return true;
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return true;
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} else if (FLASH_PART1_START_BLOCK <= block && block < FLASH_PART1_START_BLOCK + FLASH_PART1_NUM_BLOCKS) {
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} else {
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// non-MBR block, get data from flash memory, possibly via cache
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// non-MBR block, get data from flash memory, possibly via cache
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uint32_t flash_addr = FLASH_MEM_START_ADDR + (block - FLASH_PART1_START_BLOCK) * FLASH_BLOCK_SIZE;
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uint32_t flash_addr = convert_block_to_flash_addr(block);
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if (flash_addr == -1) {
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// bad block number
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return false;
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}
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uint8_t *src = flash_cache_get_addr_for_read(flash_addr);
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uint8_t *src = flash_cache_get_addr_for_read(flash_addr);
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memcpy(dest, src, FLASH_BLOCK_SIZE);
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memcpy(dest, src, FLASH_BLOCK_SIZE);
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return true;
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return true;
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} else {
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// bad block number
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return false;
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}
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}
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}
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}
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@ -250,15 +277,15 @@ bool storage_write_block(const uint8_t *src, uint32_t block) {
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// can't write MBR, but pretend we did
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// can't write MBR, but pretend we did
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return true;
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return true;
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} else if (FLASH_PART1_START_BLOCK <= block && block < FLASH_PART1_START_BLOCK + FLASH_PART1_NUM_BLOCKS) {
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} else {
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// non-MBR block, copy to cache
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// non-MBR block, copy to cache
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uint32_t flash_addr = FLASH_MEM_START_ADDR + (block - FLASH_PART1_START_BLOCK) * FLASH_BLOCK_SIZE;
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uint32_t flash_addr = convert_block_to_flash_addr(block);
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if (flash_addr == -1) {
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// bad block number
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return false;
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}
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uint8_t *dest = flash_cache_get_addr_for_write(flash_addr);
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uint8_t *dest = flash_cache_get_addr_for_write(flash_addr);
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memcpy(dest, src, FLASH_BLOCK_SIZE);
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memcpy(dest, src, FLASH_BLOCK_SIZE);
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return true;
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return true;
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} else {
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// bad block number
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return false;
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}
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}
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}
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}
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