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stm32/powerctrl: Move L0's SystemClock_Config to powerctrlboot.c file.

This commit is contained in:
Damien George 2019-07-08 15:07:39 +10:00
parent 7c2e83324b
commit 21ecf8be5f
5 changed files with 57 additions and 26 deletions
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1
ports/stm32/Makefile
View File

@ -233,6 +233,7 @@ SRC_C = \
pendsv.c \
systick.c \
powerctrl.c \
powerctrlboot.c \
pybthread.c \
factoryreset.c \
timer.c \

2
ports/stm32/main.c
View File

@ -71,8 +71,6 @@
#include "can.h"
#include "modnetwork.h"
void SystemClock_Config(void);
#if MICROPY_PY_THREAD
STATIC pyb_thread_t pyb_thread_main;
#endif

24
ports/stm32/powerctrl.c
View File

@ -84,30 +84,6 @@ void powerctrl_check_enter_bootloader(void) {
}
}
#if defined(STM32L0)
void SystemClock_Config(void) {
// Enable power control peripheral
__HAL_RCC_PWR_CLK_ENABLE();
// Use the 16MHz internal oscillator
RCC->CR |= RCC_CR_HSION;
while (!(RCC->CR & RCC_CR_HSIRDY)) {
}
const uint32_t sysclk_src = 1;
// Select SYSCLK source
RCC->CFGR |= sysclk_src << RCC_CFGR_SW_Pos;
while (((RCC->CFGR >> RCC_CFGR_SWS_Pos) & 0x3) != sysclk_src) {
// Wait for SYSCLK source to change
}
SystemCoreClockUpdate();
HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq() / 1000);
HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
}
#endif
#if !defined(STM32F0) && !defined(STM32L0)
// Assumes that PLL is used as the SYSCLK source

2
ports/stm32/powerctrl.h
View File

@ -28,6 +28,8 @@
#include <stdint.h>
void SystemClock_Config(void);
NORETURN void powerctrl_mcu_reset(void);
NORETURN void powerctrl_enter_bootloader(uint32_t r0, uint32_t bl_addr);
void powerctrl_check_enter_bootloader(void);

54
ports/stm32/powerctrlboot.c Normal file
View File

@ -0,0 +1,54 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2018-2019 Damien P. George
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "py/mphal.h"
#include "powerctrl.h"
#if defined(STM32L0)
void SystemClock_Config(void) {
// Enable power control peripheral
__HAL_RCC_PWR_CLK_ENABLE();
// Use the 16MHz internal oscillator
RCC->CR |= RCC_CR_HSION;
while (!(RCC->CR & RCC_CR_HSIRDY)) {
}
const uint32_t sysclk_src = 1;
// Select SYSCLK source
RCC->CFGR |= sysclk_src << RCC_CFGR_SW_Pos;
while (((RCC->CFGR >> RCC_CFGR_SWS_Pos) & 0x3) != sysclk_src) {
// Wait for SYSCLK source to change
}
SystemCoreClockUpdate();
HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq() / 1000);
HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
}
#endif