py/emitnative: Support binary ops on ARMv6M without use of ite instr.
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@ -564,6 +564,18 @@ void asm_thumb_bcc_label(asm_thumb_t *as, int cond, uint label) {
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}
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}
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}
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}
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void asm_thumb_bcc_rel9(asm_thumb_t *as, int cond, int rel) {
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rel -= 4; // account for instruction prefetch, PC is 4 bytes ahead of this instruction
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assert(SIGNED_FIT9(rel));
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asm_thumb_op16(as, OP_BCC_N(cond, rel));
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}
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void asm_thumb_b_rel12(asm_thumb_t *as, int rel) {
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rel -= 4; // account for instruction prefetch, PC is 4 bytes ahead of this instruction
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assert(SIGNED_FIT12(rel));
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asm_thumb_op16(as, OP_B_N(rel));
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}
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#define OP_BLX(reg) (0x4780 | ((reg) << 3))
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#define OP_BLX(reg) (0x4780 | ((reg) << 3))
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#define OP_SVC(arg) (0xdf00 | (arg))
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#define OP_SVC(arg) (0xdf00 | (arg))
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@ -330,6 +330,8 @@ void asm_thumb_ldr_reg_reg_i12_optimised(asm_thumb_t *as, uint reg_dest, uint re
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void asm_thumb_b_label(asm_thumb_t *as, uint label); // convenience: picks narrow or wide branch
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void asm_thumb_b_label(asm_thumb_t *as, uint label); // convenience: picks narrow or wide branch
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void asm_thumb_bcc_label(asm_thumb_t *as, int cc, uint label); // convenience: picks narrow or wide branch
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void asm_thumb_bcc_label(asm_thumb_t *as, int cc, uint label); // convenience: picks narrow or wide branch
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void asm_thumb_bl_ind(asm_thumb_t *as, uint fun_id, uint reg_temp); // convenience
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void asm_thumb_bl_ind(asm_thumb_t *as, uint fun_id, uint reg_temp); // convenience
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void asm_thumb_bcc_rel9(asm_thumb_t *as, int cc, int rel);
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void asm_thumb_b_rel12(asm_thumb_t *as, int rel);
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// Holds a pointer to mp_fun_table
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// Holds a pointer to mp_fun_table
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#define ASM_THUMB_REG_FUN_TABLE ASM_THUMB_REG_R7
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#define ASM_THUMB_REG_FUN_TABLE ASM_THUMB_REG_R7
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@ -2454,6 +2454,7 @@ STATIC void emit_native_binary_op(emit_t *emit, mp_binary_op_t op) {
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asm_x86_setcc_r8(emit->as, ops[op_idx], REG_RET);
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asm_x86_setcc_r8(emit->as, ops[op_idx], REG_RET);
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#elif N_THUMB
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#elif N_THUMB
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asm_thumb_cmp_rlo_rlo(emit->as, REG_ARG_2, reg_rhs);
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asm_thumb_cmp_rlo_rlo(emit->as, REG_ARG_2, reg_rhs);
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#if MICROPY_EMIT_THUMB_ARMV7M
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static uint16_t ops[6 + 6] = {
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static uint16_t ops[6 + 6] = {
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// unsigned
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// unsigned
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ASM_THUMB_OP_ITE_CC,
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ASM_THUMB_OP_ITE_CC,
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@ -2473,6 +2474,28 @@ STATIC void emit_native_binary_op(emit_t *emit, mp_binary_op_t op) {
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asm_thumb_op16(emit->as, ops[op_idx]);
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asm_thumb_op16(emit->as, ops[op_idx]);
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asm_thumb_mov_rlo_i8(emit->as, REG_RET, 1);
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asm_thumb_mov_rlo_i8(emit->as, REG_RET, 1);
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asm_thumb_mov_rlo_i8(emit->as, REG_RET, 0);
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asm_thumb_mov_rlo_i8(emit->as, REG_RET, 0);
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#else
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static uint16_t ops[6 + 6] = {
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// unsigned
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ASM_THUMB_CC_CC,
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ASM_THUMB_CC_HI,
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ASM_THUMB_CC_EQ,
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ASM_THUMB_CC_LS,
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ASM_THUMB_CC_CS,
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ASM_THUMB_CC_NE,
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// signed
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ASM_THUMB_CC_LT,
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ASM_THUMB_CC_GT,
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ASM_THUMB_CC_EQ,
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ASM_THUMB_CC_LE,
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ASM_THUMB_CC_GE,
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ASM_THUMB_CC_NE,
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};
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asm_thumb_bcc_rel9(emit->as, ops[op_idx], 6);
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asm_thumb_mov_rlo_i8(emit->as, REG_RET, 0);
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asm_thumb_b_rel12(emit->as, 4);
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asm_thumb_mov_rlo_i8(emit->as, REG_RET, 1);
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#endif
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#elif N_ARM
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#elif N_ARM
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asm_arm_cmp_reg_reg(emit->as, REG_ARG_2, reg_rhs);
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asm_arm_cmp_reg_reg(emit->as, REG_ARG_2, reg_rhs);
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static uint ccs[6 + 6] = {
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static uint ccs[6 + 6] = {
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