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esp32: Add support for building with external SPI RAM. 

This patch adds support for building the firmware with external SPI RAM
enabled.  It is disabled by default because it adds overhead (due to
silicon workarounds) and reduces performance (because it's slower to have
bytecode and objects stored in external RAM).

To enable it, either use "make CONFIG_SPIRAM_SUPPORT=1", or add this line
to you custom makefile/GNUmakefile (before "include Makefile"):

    CONFIG_SPIRAM_SUPPORT = 1

When this option is enabled the MicroPython heap is automatically allocated
in external SPI RAM.

Thanks to Angus Gratton for help with the compiler and linker settings.
This commit is contained in:
Damien George 2018-06-05 13:52:22 +10:00
parent bc92206f89
commit a90124a9e2
3 changed files with 26 additions and 3 deletions
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15
ports/esp32/Makefile
View File

@ -117,7 +117,6 @@ LDFLAGS += -L$(ESPCOMP)/esp32/ld
LDFLAGS += -T $(BUILD)/esp32_out.ld LDFLAGS += -T $(BUILD)/esp32_out.ld
LDFLAGS += -T ./esp32.custom_common.ld LDFLAGS += -T ./esp32.custom_common.ld
LDFLAGS += -T esp32.rom.ld LDFLAGS += -T esp32.rom.ld
LDFLAGS += -T esp32.rom.spiram_incompatible_fns.ld
LDFLAGS += -T esp32.peripherals.ld LDFLAGS += -T esp32.peripherals.ld
LIBGCC_FILE_NAME = $(shell $(CC) $(CFLAGS) -print-libgcc-file-name) LIBGCC_FILE_NAME = $(shell $(CC) $(CFLAGS) -print-libgcc-file-name)
@ -133,6 +132,15 @@ COPT += -Os -DNDEBUG
#LDFLAGS += --gc-sections #LDFLAGS += --gc-sections
endif endif
# Enable SPIRAM support if CONFIG_SPIRAM_SUPPORT=1
ifeq ($(CONFIG_SPIRAM_SUPPORT),1)
CFLAGS_COMMON += -mfix-esp32-psram-cache-issue -DCONFIG_SPIRAM_SUPPORT=1
LIBC_LIBM = $(ESPCOMP)/newlib/lib/libc-psram-workaround.a $(ESPCOMP)/newlib/lib/libm-psram-workaround.a
else
LDFLAGS += -T esp32.rom.spiram_incompatible_fns.ld
LIBC_LIBM = $(ESPCOMP)/newlib/lib/libc.a $(ESPCOMP)/newlib/lib/libm.a
endif
################################################################################ ################################################################################
# List of MicroPython source and object files # List of MicroPython source and object files
@ -266,6 +274,8 @@ ESPIDF_ESP32_O = $(addprefix $(ESPCOMP)/esp32/,\
wifi_init.o \ wifi_init.o \
wifi_internal.o \ wifi_internal.o \
sleep_modes.o \ sleep_modes.o \
spiram.o \
spiram_psram.o \
) )
ESPIDF_HEAP_O = $(addprefix $(ESPCOMP)/heap/,\ ESPIDF_HEAP_O = $(addprefix $(ESPCOMP)/heap/,\
@ -655,8 +665,7 @@ APP_LD_ARGS += $(LDFLAGS_MOD)
APP_LD_ARGS += --start-group APP_LD_ARGS += --start-group
APP_LD_ARGS += -L$(dir $(LIBGCC_FILE_NAME)) -lgcc APP_LD_ARGS += -L$(dir $(LIBGCC_FILE_NAME)) -lgcc
APP_LD_ARGS += -L$(dir $(LIBSTDCXX_FILE_NAME)) -lstdc++ APP_LD_ARGS += -L$(dir $(LIBSTDCXX_FILE_NAME)) -lstdc++
APP_LD_ARGS += $(ESPCOMP)/newlib/lib/libc.a APP_LD_ARGS += $(LIBC_LIBM)
APP_LD_ARGS += $(ESPCOMP)/newlib/lib/libm.a
APP_LD_ARGS += $(ESPCOMP)/esp32/libhal.a APP_LD_ARGS += $(ESPCOMP)/esp32/libhal.a
APP_LD_ARGS += -L$(ESPCOMP)/esp32/lib -lcore -lnet80211 -lphy -lrtc -lpp -lwpa -lsmartconfig -lcoexist -lwps -lwpa2 APP_LD_ARGS += -L$(ESPCOMP)/esp32/lib -lcore -lnet80211 -lphy -lrtc -lpp -lwpa -lsmartconfig -lcoexist -lwps -lwpa2
APP_LD_ARGS += $(OBJ) APP_LD_ARGS += $(OBJ)

1
ports/esp32/README.md
View File

@ -78,6 +78,7 @@ ESPIDF = <path to root of esp-idf repository>
#FLASH_MODE = qio #FLASH_MODE = qio
#FLASH_SIZE = 4MB #FLASH_SIZE = 4MB
#CROSS_COMPILE = xtensa-esp32-elf- #CROSS_COMPILE = xtensa-esp32-elf-
#CONFIG_SPIRAM_SUPPORT = 1
include Makefile include Makefile
``` ```

13
ports/esp32/sdkconfig.h
View File

@ -47,6 +47,19 @@
#define CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT 5 #define CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT 5
#define CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT 2048 #define CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT 2048
#if CONFIG_SPIRAM_SUPPORT
#define CONFIG_SPIRAM_TYPE_ESPPSRAM32 1
#define CONFIG_SPIRAM_SIZE 4194304
#define CONFIG_SPIRAM_SPEED_40M 1
#define CONFIG_SPIRAM_CACHE_WORKAROUND 1
#define CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL 16384
#define CONFIG_SPIRAM_BOOT_INIT 1
#define CONFIG_SPIRAM_MEMTEST 1
#define CONFIG_SPIRAM_USE_MALLOC 1
#define CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL 32768
#define CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY 1
#endif
#define CONFIG_FOUR_MAC_ADDRESS_FROM_EFUSE 1 #define CONFIG_FOUR_MAC_ADDRESS_FROM_EFUSE 1
#define CONFIG_DMA_RX_BUF_NUM 10 #define CONFIG_DMA_RX_BUF_NUM 10
#define CONFIG_DMA_TX_BUF_NUM 10 #define CONFIG_DMA_TX_BUF_NUM 10