mimxrt: Add support for the Olimex RT1010 board.

The board.json file is intentionally excluded, until the board will be
sold. But including it into the mimxrt series make it easier to keep
the build up-to-date.

ports/mimxrt/boards/OLIMEX_RT1010/clock_config.h

@@ -0,0 +1,104 @@
+/*
+ * Copyright 2019 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CLOCK_CONFIG_H_
+#define _CLOCK_CONFIG_H_
+
+#include "fsl_common.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+#define BOARD_XTAL0_CLK_HZ 24000000U /*!< Board xtal0 frequency in Hz */
+
+#define BOARD_XTAL32K_CLK_HZ 32768U /*!< Board xtal32k frequency in Hz */
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes default configuration of clocks.
+ *
+ */
+void BOARD_InitBootClocks(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ********************** Configuration BOARD_BootClockRUN ***********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 500000000U /*!< Core clock frequency: 500000000Hz */
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKRUN_ADC_ALT_CLK 40000000UL
+#define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT 32768UL
+#define BOARD_BOOTCLOCKRUN_CLKO1_CLK 0UL
+#define BOARD_BOOTCLOCKRUN_CLKO2_CLK 0UL
+#define BOARD_BOOTCLOCKRUN_CLK_1M 1000000UL
+#define BOARD_BOOTCLOCKRUN_CLK_24M 24000000UL
+#define BOARD_BOOTCLOCKRUN_CORE_CLK_ROOT 500000000UL
+#define BOARD_BOOTCLOCKRUN_ENET_500M_REF_CLK 500000000UL
+#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT 30000000UL
+#define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT 132000000UL
+#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ 62500000UL
+#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ 62500000UL
+#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT 125000000UL
+#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT 60000000UL
+#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT 105600000UL
+#define BOARD_BOOTCLOCKRUN_MQS_MCLK 63529411UL
+#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT 62500000UL
+#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3 30000000UL
+#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2 0UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3 30000000UL
+#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL
+#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL
+#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL
+#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL
+#define BOARD_BOOTCLOCKRUN_USBPHY_CLK 0UL
+
+/*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN;
+/*! @brief Sys PLL for BOARD_BootClockRUN configuration.
+ */
+extern const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN;
+/*! @brief Enet PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN;
+
+/*******************************************************************************
+ * API for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockRUN(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+#endif /* _CLOCK_CONFIG_H_ */

ports/mimxrt/boards/OLIMEX_RT1010/mpconfigboard.h

@@ -0,0 +1,50 @@
+#define MICROPY_HW_BOARD_NAME "RT1010-Py-DevKIT"
+#define MICROPY_HW_MCU_NAME   "MIMXRT1011DAE5A"
+#define MICROPY_HW_USB_STR_MANUF "Olimex Ltd."
+#define MICROPY_HW_USB_VID 0x15ba
+#define MICROPY_HW_USB_PID 0x0046
+#define MICROPY_PY_UOS_DUPTERM_BUILTIN_STREAM (0)
+
+// Olimex RT1010-Py has 1 board LED
+#define MICROPY_HW_LED1_PIN (pin_GPIO_11)
+#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin))
+#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin))
+
+#define MICROPY_HW_NUM_PIN_IRQS (2 * 32)
+
+// Define mapping logical UART # to hardware UART #
+// LPUART1 on RX/TX    -> 1
+// LPUART4 on D5/D6    -> 2
+
+#define MICROPY_HW_UART_NUM     (sizeof(uart_index_table) / sizeof(uart_index_table)[0])
+#define MICROPY_HW_UART_INDEX   { 0, 1, 4 }
+
+#define IOMUX_TABLE_UART \
+    { IOMUXC_GPIO_10_LPUART1_TXD }, { IOMUXC_GPIO_09_LPUART1_RXD }, \
+    { 0 }, { 0 }, \
+    { 0 }, { 0 }, \
+    { IOMUXC_GPIO_06_LPUART4_TXD }, { IOMUXC_GPIO_05_LPUART4_RXD },
+
+#define MICROPY_HW_SPI_INDEX { 0, 1, 2 }
+
+#define IOMUX_TABLE_SPI \
+    { IOMUXC_GPIO_AD_06_LPSPI1_SCK }, { IOMUXC_GPIO_AD_05_LPSPI1_PCS0 }, \
+    { IOMUXC_GPIO_AD_04_LPSPI1_SDO }, { IOMUXC_GPIO_AD_03_LPSPI1_SDI }, \
+    { IOMUXC_GPIO_AD_02_LPSPI1_PCS1 }, \
+    { IOMUXC_GPIO_AD_12_LPSPI2_SCK }, { IOMUXC_GPIO_AD_11_LPSPI2_PCS0 }, \
+    { IOMUXC_GPIO_AD_10_LPSPI2_SDO }, { IOMUXC_GPIO_AD_09_LPSPI2_SDI }, \
+    { IOMUXC_GPIO_AD_01_LPSPI2_PCS1 }
+
+#define DMA_REQ_SRC_RX { 0, kDmaRequestMuxLPSPI1Rx, kDmaRequestMuxLPSPI2Rx }
+#define DMA_REQ_SRC_TX { 0, kDmaRequestMuxLPSPI1Tx, kDmaRequestMuxLPSPI2Tx }
+
+// Define mapping hardware I2C # to logical I2C #
+// SDA/SCL    HW-I2C    Logical I2C
+// SDA1/SCL1  LPI2C1 ->    0
+// SDA2/SCL2  LPI2C2 ->    1
+
+#define MICROPY_HW_I2C_INDEX   { 0, 1, 2 }
+
+#define IOMUX_TABLE_I2C \
+    { IOMUXC_GPIO_AD_14_LPI2C1_SCL }, { IOMUXC_GPIO_AD_13_LPI2C1_SDA }, \
+    { IOMUXC_GPIO_AD_08_LPI2C2_SCL }, { IOMUXC_GPIO_AD_07_LPI2C2_SDA },

ports/mimxrt/boards/OLIMEX_RT1010/mpconfigboard.mk

@@ -0,0 +1,13 @@
+MCU_SERIES = MIMXRT1011
+MCU_VARIANT = MIMXRT1011DAE5A
+
+MICROPY_FLOAT_IMPL = single
+MICROPY_PY_MACHINE_SDCARD ?= 0
+MICROPY_HW_FLASH_TYPE ?= qspi_nor
+MICROPY_HW_FLASH_SIZE ?= 0x200000  # 2MB
+MICROPY_HW_FLASH_RESERVED ?= 0x1000  # 4KB
+
+CFLAGS += -DMICROPY_HW_FLASH_DQS=kFlexSPIReadSampleClk_LoopbackInternally
+
+SRC_C += \
+	hal/flexspi_nor_flash.c \

ports/mimxrt/boards/OLIMEX_RT1010/pins.csv

@@ -0,0 +1,36 @@
+D0,GPIO_00
+D1,GPIO_01
+D2,GPIO_02
+D3,GPIO_03
+D4,GPIO_04
+D5,GPIO_05
+D6,GPIO_06
+D7,GPIO_07
+D8,GPIO_08
+D9,GPIO_SD_00
+D10,GPIO_SD_01
+D11,GPIO_SD_02
+D12,GPIO_SD_05
+D13,GPIO_SD_12
+D14,GPIO_SD_13
+A0,GPIO_AD_02
+A1,GPIO_AD_03
+A2,GPIO_AD_04
+A3,GPIO_AD_05
+A4,GPIO_AD_06
+LED,GPIO_11
+SDA1, GPIO_AD_13
+SCL1, GPIO_AD_14
+SDA2, GPIO_AD_07
+SCL2, GPIO_AD_08
+SDI, GPIO_AD_09
+SDO, GPIO_AD_10
+CS0, GPIO_AD_11
+SCK, GPIO_AD_12
+USB_OTG1_PWR, GPIO_AD_00
+BT0, GPIO_SD_04
+BT1, GPIO_SD_03
+RX, GPIO_09
+TX, GPIO_10
+RELAY1,GPIO_SD_12
+RELAY2,GPIO_SD_13