docs/esp32: Correct quickref for ESP32 hardware SPI with non-default IO.

This commit is contained in:
Nicko van Someren 2019-05-09 13:57:45 -06:00 committed by Damien George
parent 99a8fa7940
commit f812394c33
1 changed files with 9 additions and 2 deletions

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@ -128,6 +128,8 @@ with timer ID of -1::
The period is in milliseconds. The period is in milliseconds.
.. _Pins_and_GPIO:
Pins and GPIO Pins and GPIO
------------- -------------
@ -274,8 +276,13 @@ class::
Hardware SPI bus Hardware SPI bus
---------------- ----------------
There are two hardware SPI channels that allow faster (up to 80Mhz) There are two hardware SPI channels that allow faster transmission
transmission rates, but are only supported on a subset of pins. rates (up to 80Mhz). These may be used on any IO pins that support the
required direction and are otherwise unused (see :ref:`Pins_and_GPIO`)
but if they are not configured to their default pins then they need to
pass through an extra layer of GPIO multiplexing, which can impact
their reliability at high speeds. Hardware SPI channels are limited
to 40MHz when used on pins other than the default ones listed below.
===== =========== ============ ===== =========== ============
\ HSPI (id=1) VSPI (id=2) \ HSPI (id=1) VSPI (id=2)