Commit Graph

56 Commits

Author SHA1 Message Date
Damien George f35aae366c extmod/vfs_fat: Rename FileIO/TextIO types to mp_type_vfs_fat_XXX.
So they don't clash with other VFS implementations.
2018-06-06 14:28:23 +10:00
Damien George 20b4b85f72 ports: Enable MICROPY_PY_BUILTINS_ROUND_INT on selected ports. 2018-05-22 14:18:16 +10:00
Damien George afd0701bf7 esp8266: Change UART(0) to attach to REPL via uos.dupterm interface.
This patch makes it so that UART(0) can by dynamically attached to and
detached from the REPL by using the uos.dupterm function.  Since WebREPL
uses dupterm slot 0 the UART uses dupterm slot 1 (a slot which is newly
introduced by this patch).  UART(0) must now be attached manually in
boot.py (or otherwise) and inisetup.py is changed to provide code to do
this.  For example, to attach use:

    import uos, machine
    uart = machine.UART(0, 115200)
    uos.dupterm(uart, 1)

and to detach use:

    uos.dupterm(None, 1)

When attached, all incoming chars on UART(0) go straight to stdin so
uart.read() will always return None.  Use sys.stdin.read() if it's needed
to read characters from the UART(0) while it's also used for the REPL (or
detach, read, then reattach).  When detached the UART(0) can be used for
other purposes.

If there are no objects in any of the dupterm slots when the REPL is
started (on hard or soft reset) then UART(0) is automatically attached.
Without this, the only way to recover a board without a REPL would be to
completely erase and reflash (which would install the default boot.py which
attaches the REPL).
2018-05-21 11:31:59 +10:00
Damien George 94a79f340d esp8266/mpconfigport.h: Add some weak links to common Python modules.
To make it easier/simpler to write code that can run under both CPython and
on an ESP8266 board.
2018-05-17 13:27:18 +10:00
Damien George 82828340a0 ports: Enable ucollections.deque on relevant ports.
These ports are all capable of running uasyncio.
2018-02-21 22:55:13 +11:00
Damien George 01dd7804b8 ports: Make new ports/ sub-directory and move all ports there.
This is to keep the top-level directory clean, to make it clear what is
core and what is a port, and to allow the repository to grow with new ports
in a sustainable way.
2017-09-06 13:40:51 +10:00