SPI support was not enabled, and was not adapted for esp-idf v5.x. This
change enables SPI ethernet for all boards and adapts the code for esp-idf
v5.x. The change follows the sample implementation of @hemakumarm72, but
adds the changes for the other adapters as well. Further, it simplifies
the code by removing actions from netwwork_lan.c which are done in the
esp-idf drivers later, like setting the default values for .command_bits
and .address_bits, and registering the SPI interface.
Tested with a Wiznet W5500 breakout.
Signed-off-by: robert-hh <robert@hammelrath.com>
Add "CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE=y" to
ports/esp32/boards/sdkconfig.base so that all micropython esp32 images
support OTA rollback in the bootloader. These images can then be converted
to OTA-capable images as required by user tools.
Also remove CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE=y from board-specific
sdkconfig files as this is now the default.
Signed-off-by: Glenn Moloney <glenn.moloney@gmail.com>
sdkconfig.base: Add CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP=y.
This reduces time to boot from deepsleep by at least 200ms and can
provide significant power savings for deepsleep-based battery
applications.
docs/library/esp32.rst: Add note cautioning not to enter deepsleep after
changing the boot partition, without first performing a hard reset.
Signed-off-by: Glenn Moloney <glenn.moloney@gmail.com>
To be consistent with the other partitions files (which have the "-
{2,8,16,32}MiB" suffix). Also renames partitions-ota.csv.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
Also shrinks the "prefer internal" threshold to 8KB, any allocation larger
than this will try PSRAM first.
Change the mbedTLS config to use regular malloc() as well, instead of
internal only. The default is set to internal-only due to to potential
physical security issue of readout via PSRAM on the original ESP32.
However, as MicroPython runs from plaintext flash and all other context is
in the MP heap of PSRAM then it's hard to see how worsens physical security
for MP.
This work was funded through GitHub Sponsors.
Signed-off-by: Angus Gratton <angus@redyak.com.au>
The legacy driver was deprecated in IDF v5, and crashes when the ISR
handler is called. Instead of fixing the legacy code, this commit reworks
the machine.Timer class to use the low-level HAL driver.
Tested on ESP32, ESP32S2, ESP32S3 and ESP32C3. Behaviour is the same as it
was before this commit, except the way the Timer object is printed, it now
gives more useful information (timer id, mode, period in ms).
Fixes issue #11970.
Signed-off-by: Damien George <damien@micropython.org>
This commit updates the esp32 port to work exclusively with ESP-IDF v5.
IDF v5 is needed for some of the newer ESP32 SoCs to work, and it also
cleans up a lot of the inconsistencies between existing SoCs (eg S2, S3,
and C3).
Support for IDF v4 is dropped because it's a lot of effort to maintain both
versions at the same time.
The following components have been verified to work on the various SoCs:
ESP32 ESP32-S2 ESP32-S3 ESP32-C3
build pass pass pass pass
SPIRAM pass pass pass N/A
REPL (UART) pass pass pass pass
REPL (USB) N/A pass pass N/A
filesystem pass pass pass pass
GPIO pass pass pass pass
SPI pass pass pass pass
I2C pass pass pass pass
PWM pass pass pass pass
ADC pass pass pass pass
WiFi STA pass pass pass pass
WiFi AP pass pass pass pass
BLE pass N/A pass pass
ETH pass -- -- --
PPP pass pass pass --
sockets pass pass pass pass
SSL pass ENOMEM pass pass
RMT pass pass pass pass
NeoPixel pass pass pass pass
I2S pass pass pass N/A
ESPNow pass pass pass pass
ULP-FSM pass pass pass N/A
SDCard pass N/A N/A pass
WDT pass pass pass pass
Signed-off-by: Damien George <damien@micropython.org>
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
This change enables the ULP (FSM) for all ESP32 variants rather than
requiring it to be enabled for each board specifically.
It also ensures the correct header file is included for each variant.
Lastly, it updates the IDF version we're builing against to v4.4.2, as that
version contains important fixes to make the ULP actually work on S2/S3
chips. See: https://github.com/espressif/esp-idf/commit/a0e3d48
Signed-off-by: Wilko Nienhaus <wilko.nienhaus@gmail.com>
Allow esp32.ULP.load_binary() to use the maximum amount of memory available
again, which is 2040 bytes unless MICROPY_HW_RTC_USER_MEM_MAX is
customized.
This value regressed in 3d49b157b8
Rework the ADC implementation to follow the improved ADC/ADCBlock API.
This adds support for calibrated voltage readings and the ADC2 block. The
ADC API is backwards compatible with what it was before this change.
Resolves#6219.
This commit enables some significant optimisations for esp32:
- move the VM to iRAM
- move hot parts of the runtime to iRAM (map lookup, load global/name,
mp_obj_get_type)
- enable MICROPY_OPT_LOAD_ATTR_FAST_PATH
- enable MICROPY_OPT_MAP_LOOKUP_CACHE
- disable assertions
- change from -Os to -O2 for compilation
It's hard to measure performance on esp32 due to external flash and
hardware caching. But this set of changes improves performance compared to
master by (on a TinyPICO with the GENERIC build, using IDF 4.2.2, running
at 160MHz):
diff of scores (higher is better)
N=100 M=100 esp32-master -> esp32-perf diff diff% (error%)
bm_chaos.py 71.28 -> 268.08 : +196.80 = +276.094% (+/-0.04%)
bm_fannkuch.py 44.10 -> 69.31 : +25.21 = +57.166% (+/-0.01%)
bm_fft.py 1385.27 -> 2538.23 : +1152.96 = +83.230% (+/-0.01%)
bm_float.py 1060.94 -> 3900.62 : +2839.68 = +267.657% (+/-0.03%)
bm_hexiom.py 10.90 -> 32.79 : +21.89 = +200.826% (+/-0.02%)
bm_nqueens.py 1000.83 -> 2372.87 : +1372.04 = +137.090% (+/-0.01%)
bm_pidigits.py 288.13 -> 664.40 : +376.27 = +130.590% (+/-0.46%)
misc_aes.py 102.45 -> 345.69 : +243.24 = +237.423% (+/-0.01%)
misc_mandel.py 1016.58 -> 2121.92 : +1105.34 = +108.731% (+/-0.01%)
misc_pystone.py 632.91 -> 1801.87 : +1168.96 = +184.696% (+/-0.08%)
misc_raytrace.py 76.66 -> 281.78 : +205.12 = +267.571% (+/-0.05%)
viper_call0.py 210.63 -> 273.17 : +62.54 = +29.692% (+/-0.01%)
viper_call1a.py 208.45 -> 269.51 : +61.06 = +29.292% (+/-0.00%)
viper_call1b.py 185.44 -> 228.25 : +42.81 = +23.086% (+/-0.01%)
viper_call1c.py 185.86 -> 228.90 : +43.04 = +23.157% (+/-0.01%)
viper_call2a.py 207.10 -> 267.25 : +60.15 = +29.044% (+/-0.00%)
viper_call2b.py 173.76 -> 209.42 : +35.66 = +20.523% (+/-0.00%)
Five tests have more than 3x speed up (200%+).
The performance of the tests bm_fft, bm_pidigits and misc_aes now scale
with CPU frequency (eg changing frequency to 240MHz boosts the performance
of these by 50%), which means they are no longer influenced by timing of
external flash access. (The viper_call* tests did previously scale with
CPU frequency, and they still do.)
Turning off assertions reduces code size by about 80k, and going from -Os
to -O2 costs about 100k, so the net change in code size (for the GENERIC
board) is about +20k.
If a board wants to enable assertions, or use -Os instead of -O2, that's
still possible by overriding the sdkconfig parameters.
Signed-off-by: Damien George <damien@micropython.org>
Dynamically generate/loaded native code (eg from @micropython.native or
native .mpy files) needs to be able allocate from IRAM, and the memory
protection feature must be disabled for that to work. Disabling it is
needed to get native code working on ESP32-S2 and -C3.
Signed-off-by: Damien George <damien@micropython.org>
This enables -Os for compilation, but still keeps full assertion messages.
With IDF v4.2, -Os changes the GENERIC firmware size from 1512176 down to
1384640, and the GENERIC_SPIRAM firmware is now 1452320 which fits in the
allocated partition.
Signed-off-by: Damien George <damien@micropython.org>
This commit adds support for building the esp32 port with cmake, and in
particular it builds MicroPython as a component within the ESP-IDF. Using
cmake and the ESP-IDF build infrastructure makes it much easier to maintain
the port, especially with the various new ESP32 MCUs and their required
toolchains.
Signed-off-by: Damien George <damien@micropython.org>
This commit changes the default logging level on all esp32 boards to ERROR.
The esp32 port is now stable enough that it makes sense to remove the info
logs to make the output cleaner, and to match other ports. More verbose
logging can always be reenabled via esp.osdebug().
This also fixes issue #6354, error messages from NimBLE: the problem is
that ble.active(True) will cause the IDF's NimBLE port to reset the
"NimBLE" tag back to the default level (which was INFO prior to this
commit). Even if the user had previously called esp.osdebug(None), because
the IDF is setting the "NimBLE" tag back to the default (INFO), the
messages will continue to be shown.
The one quirk is that if the user does want to see the additional logging,
then they must call esp.osdebug(0, 3) after ble.active(True) to undo the
IDF setting the level back to the default (now ERROR). This means that
it's impossible (via Python/esp.osdebug) to see stack-startup logging,
you'd have to recompile with the default level changed back to INFO.
The IDF heap is more fragmented with IDF 4 and mbedtls cannot allocate
enough RAM with 16+16kiB for both in and out buffers, so reduce output
buffer size.
Fixes issue #5303.
Remove the 240MHz CPU config option from sdkconfig.base and create a new
sdkconfig.240mhz file for those boards that want to use 240MHz on boot.
The default CPU frequency is now 160MHz (was 240MHz), to align with the ESP
IDF and support more boards (eg those with D2WD chips).
Fixes issue #5169.
This commit adds support for a second supported hash (currently set to the
4.0-beta1 tag). When this hash is detected, the relevant changes are
applied.
This allows to start using v4 features (e.g. BLE with Nimble), and also
start doing testing, while still supporting the original, stable, v3.3 IDF.
Note: this feature is experimental, not well tested, and network.LAN and
network.PPP are currently unsupported.
Replaces the `SDKCONFIG` makefile variable with `BOARD`. Defaults to
BOARD=GENERIC. spiram can be enabled with `BOARD=GENERIC_SPIRAM`
Add example definition for TINYPICO, currently identical to GENERIC_SPIRAM
but with custom board/SoC names for the uPy banner.