This commit adds the necessary configuration and hooks to get the CYW43
driver working with the mimxrt port.
Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
The rp2 port was enabling SSL and had finalizers enabled via the "extra
features" level, but missed explicitly enabling `MICROPY_PY_SSL_FINALISER`
(like esp32, stm32, and mimxrt did).
This commit makes `MICROPY_PY_SSL_FINALISER` default to enabled if
finalizers are enabled, and removes the explicit setting of this for
esp32, stm32, mimxrt (because they all use the "extra features" level).
This work was funded through GitHub Sponsors.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
Previously this was explicitly enabled on esp32/stm32/renesas/mimxrt/samd,
but didn't get a default feature level because it wasn't in py/mpconfig.h.
With this commit it's now enabled at the "extra features" level, which adds
rp2, unix-standard, windows, esp8266, webassembly, and some nrf boards.
This work was funded through GitHub Sponsors.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
Following how mkrules.cmake works. This makes it easy for a port to enable
frozen code, by defining FROZEN_MANIFEST in its Makefile.
Signed-off-by: Damien George <damien@micropython.org>
Updates any includes, and references from Makefiles/CMake.
This essentially reverts what was done long ago in commit
136b5cbd76
This work was funded through GitHub Sponsors.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
These have by default FAT support. The SAMD21 build does not support FAT.
The nrf port also implements os.sync(), but has it's own copy of moduos.c.
Code size increases seen: 40 to 56 bytes.
Signed-off-by: robert-hh <robert@hammelrath.com>
All ports that enable MICROPY_PY_MACHINE_PWM now enable these two
sub-options, so remove these sub-options altogether to force consistency in
new ports that implement machine.PWM.
Signed-off-by: Damien George <damien@micropython.org>
This commit allows boards to disable Ethernet and keep the networking stack
enabled, to use an alternate networking interface, such as WiFi.
Note that the `network` and `socket` modules are now enabled by default for
a board.
This provides a standard interface to setting the global networking config
for all interfaces and interface types.
For ports that already use either a static hostname (mimxrt, rp2) they will
now use the configured value. The default is configured by the port
(or optionally the board).
For interfaces that previously supported .config(hostname), this is still
supported but now implemented using the global network.hostname.
Similarly, pyb.country and rp2.country are now deprecated, but the methods
still exist (and forward to network.hostname).
Because ESP32/ESP8266 do not use extmod/modnetwork.c they are not affected
by this commit.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
Before, both uwTick and mp_hal_ticks_ms() were used as clock source. That
assumes, that these two are synchronous and start with the same value,
which may be not the case for all ports. If the lag between uwTick and
mp_hal_ticks_ms() is larger than the timer interval, the timer would either
rush up until the times are synchronous, or not start until uwTick wraps
over.
As suggested by @dpgeorge, MICROPY_SOFT_TIMER_TICKS_MS is now used in
softtimer.c, which has to be defined in a port's mpconfigport.h with
the variable that holds the SysTick counter.
Note that it's not possible to switch everything in softtimer.c to use
mp_hal_ticks_ms() because the logic in SysTick_Handler that schedules
soft_timer_handler() uses (eg on mimxrt) the uwTick variable directly
(named systick_ms there), and mp_hal_ticks_ms() uses a different source
timer. Thus it is made fully configurable.
The RT1176 has two cores, but the actual firmware supports only the CM7.
There are currently no good plans on how to use the CM4.
The actual MIMXRT1170_EVK board is on par with the existing MIMXRT boards,
with the following extensions:
- Use 64 MB RAM for the heap.
- Support both LAN interfaces as LAN(0) and LAN(1), with LAN(1)
being the 1GB interface.
The dual LAN port interface can eventually be adapted as well for the
RT1062 MCU.
This work was done in collaboration with @alphaFred.
This issue affected i.MX RT 1052, 1062 and 1064. It seems to be addressed
by Errata ERR006223, which also mentions i.MX RT101x and 102x, but these
devices worked well even without the change. As a side effect, the current
consumption at an idle REPL drops significantly with this fix.
Fixes issue #7235.
Since commit e65d1e69e8 there is no longer an
io.FileIO class, so this option is no longer needed.
This option also controlled whether or not files supported being opened in
binary mode (eg 'rb'), and could, if disabled, lead to confusion as to why
opening a file in binary mode silently did the wrong thing (it would just
open in text mode if MICROPY_PY_IO_FILEIO was disabled).
The various VFS implementations (POSIX, FAT, LFS) were the only places
where enabling this option made a difference, and in almost all cases where
one of these filesystems were enabled, MICROPY_PY_IO_FILEIO was also
enabled. So it makes sense to just unconditionally enable this feature
(ability to open a file in binary mode) in all cases, and so just remove
this config option altogether. That makes configuration simpler and means
binary file support always exists (and opening a file in binary mode is
arguably more fundamental than opening in text mode, so if anything should
be configurable then it should be the ability to open in text mode).
Signed-off-by: Damien George <damien@micropython.org>
These were added in Python 3.5.
Enabled via MICROPY_PY_BUILTINS_BYTES_HEX, and enabled by default for all
ports that currently have ubinascii.
Rework ubinascii to use the implementation of these methods.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
All in-tree uses of MICROPY_PORT_ROOT_POINTERS have been replaced with
MP_REGISTER_ROOT_POINTER(), so now we can remove both
MICROPY_PORT_ROOT_POINTERS and MICROPY_BOARD_ROOT_POINTERS from the code
and remaining config files.
Signed-off-by: David Lechner <david@pybricks.com>
This uses MP_REGISTER_ROOT_POINTER() to register mod_network_nic_list and
removes the same from all mpconfigport.h.
Signed-off-by: David Lechner <david@pybricks.com>
This uses MP_REGISTER_ROOT_POINTER() to register the readline_history root
pointer array used by shared/readline.c and removes the registration from
all mpconfigport.h files.
This also required adding a new MICROPY_READLINE_HISTORY_SIZE config option
since not all ports used the same sized array.
Signed-off-by: David Lechner <david@pybricks.com>
For ports with MICROPY_VFS and MICROPY_PY_IO enabled their configuration
can now be simplified to use the defaults for mp_import_stat and
mp_builtin_open.
This commit makes no functional change, except for the following minor
points:
- the built-in "open" is removed from the minimal port (it previously did
nothing)
- the duplicate built-in "input" is removed from the esp32 port
- qemu-arm now delegates to VFS import/open
Signed-off-by: Damien George <damien@micropython.org>
This commit adds support for machine.I2S on the mimxrt port. The I2S API
is consistent with the existing stm32, esp32, and rp2 implementations.
I2S features:
- controller transmit and controller receive
- 16-bit and 32-bit sample sizes
- mono and stereo formats
- sampling frequencies from 8kHz to 48kHz
- 3 modes of operation:
- blocking
- non-blocking with callback
- uasyncio
- configurable internal buffer
- optional MCK
Tested with the following development boards:
- MIMXRT1010_EVK, MIMXRT1015_EVK, MIMXRT1020_EVK, MIMXRT1050_EVK
- Teensy 4.0, Teensy 4.1
- Olimex RT1010
- Seeed ARCH MIX
Tested with the following I2S hardware peripherals:
- UDA1334
- GY-SPH0645LM4H
- WM8960 codec on board the MIMXRT boards and separate breakout board
- INMP441
- PCM5102
- SGTL5000 on the Teensy audio shield
Signed-off-by: Mike Teachman <mike.teachman@gmail.com>
That caused Ethernet to lock up at high data rates after ~200MByte data
average in a row. Tested now with data bursts up to 10 GByte and overall
data rates of ~8MByte/s at the Eth100 port.
The inclusion of `umachine` in the list of built-in modules is now done
centrally in py/objmodule.c. Enabling MICROPY_PY_MACHINE will include this
module.
As part of this, all ports now have `umachine` as the core module name
(previously some had only `machine` as the name).
Signed-off-by: Damien George <damien@micropython.org>
This is needed because these ports allocate mbedtls data on the MicroPython
heap, and SSL socket objects must be fully cleaned up when they are garbage
collected, to free this memory allocated by mbedtls. As part of this,
gc_sweep_all() will now ensure that the MP_STATE_PORT(mbedtls_memory)
linked-list is fully deallocated on soft reset.
Signed-off-by: Damien George <damien@micropython.org>
Frequency range 15Hz/18Hz to > 1 MHz, with decreasing resolution of the
duty cycle. The basic API is supported as documentated, except that
keyword parameters are accepted for both the instatiaton and the
PWM.init() call.
Extensions: support PWM for channel pairs. Channel pairs are declared by
supplying 2-element tuples for the pins. The two channels of a pair must
be the A/B channel of a FLEXPWM module. These form than a complementary
pair.
Additional supported keyword arguments:
- center=value Defines the center position of a pulse within the pulse
cycle. The align keyword is actually shortcut for center.
- sync=True|False: If set to True, the channels will be synchronized to a
submodule 0 channel, which has already to be enabled.
- align=PWM.MIDDLE | PMW.BEGIN | PWM.END. It defines, whether synchronized
channels are Center-Aligned or Edge-aligned. The channels must be either
complementary a channel pair or a group of synchronized channels. It may
as well be applied to a single channel, but withiout any benefit.
- invert= 0..3. Controls ouput inversion of the pins. Bit 0 controls the
first pin, bit 1 the second.
- deadtime=time_ns time of complementary channels for delaying the rising
slope.
- xor=0|1|2 xor causes the output of channel A and B to be xored. If
applied to a X channel, it shows the value oif A ^ B. If applied to an A
or B channel, both channel show the xored signal for xor=1. For xor=2,
the xored signal is split between channels A and B. See also the
Reference Manual, chapter about double pulses. The behavior of xor=2 can
also be achieved using the center method for locating a pulse within a
clock period.
The output is enabled for board pins only.
CPU pins may still be used for FLEXPWM, e.g. as sync source, but the signal
will not be routed to the output. That applies only to FLEXPWM pins. The
use of QTMR pins which are not board pins will be rejected.
As part of this commit, the _WFE() statement is removed from
ticks_delay_us64() to prevent PWM glitching during calls to sleep().
By moving code to ITCM, like vm, gc, parse, runtime. The change affects
mostly the execution speed of MicroPython code. The speed is increased by
up to a factor of 6, especially for MCU with small cache.
This commit implements 10/100 Mbit Ethernet support in the mimxrt port.
The following boards are configured without ETH network:
- MIMXRT1010_EVK
- Teensy 4.0
The following boards are configured with ETH network:
- MIMXRT1020_EVK
- MIMXRT1050_EVK
- MIMXRT1060_EVK
- MIMXRT1064_EVK
- Teensy 4.1
Ethernet support tested with TEENSY 4.1, MIMRTX1020_EVK and MIMXRT1050_EVK.
Build tested with Teensy 4.0 and MIMXRT1010_EVK to be still working.
Compiles and builds properly for MIMXRT1060_EVK and MIMXRT1064_EVK, but not
tested lacking suitable boards.
Tested functions are:
- ping works bothway
- simple UDP transfer works bothway
- ntptime works
- the ftp server works
- secure socker works
- telnet and webrepl works
The MAC address is 0x02 plus 5 bytes from the manifacturing info field,
which can be considered as unique per device.
Some boards do not wire the RESET and INT pin of the PHY transceiver. For
operation, these are not required. If they are defined, they will be used.
Following the code example for ESP32 of Jim Mussard.
As a side effect:
- mp_hal_ticks_cpu() was implemented,
- mp_hal_get_cpu_freq() and mp_hal_ticks_cpu_init() were added and used.
- mp_hal_pin_high() and mp_hal_pin_low() were changed for symmetry
- Configures `PLL2->PFD0` with **198MHz** as base clock of
`USDHCx` peripheral.
- Adds guards for SDCard related files via `MICROPY_PY_MACHINE_SDCARD`
- Adds creation of pin defines for SDCard to make-pins.py
- Adds new configuration option for SDCard peripheral pinout
to mpconfigport.h
- Adds interrupt handling support instead of polling
- Adds support for `ADMA2` powered data transfer
- Configures SDCard to run in HS (high-speed mode) with **50MHz** only!
SDCard support is optional and requires `USDHC` peripheral.
Thus this driver is not available on `MIMXRT1010_EVK`.
SDCard support is enabled by setting `MICROPY_PY_MACHINE_SDCARD = 1`
in mpconfigboard.mk.
Signed-off-by: Philipp Ebensberger
The zephyr port doesn't support SoftI2C so it's not enabled, and the legacy
I2C constructor check can be removed.
Signed-off-by: Damien George <damien@micropython.org>
Hyperflash is used by the MIMXRT1050_EVKB, MIMXRT1060_EVK and
MIMXRT1064_EVK boards.
This commit includes:
- add support for Hyperflash
- modify MIMXRT1060_EVK and MIMXRT1064_EVK to change from QSPI to
hyperflash.
- minor incidental changes to other boards so they still build
Note: Erasing a sector on the hyperflash is slow. It takes about a second,
which seems too long, but matches the data sheet.
iabdalkader
Jim Mussared
Damien George
robert-hh
David Lechner
MikeTeachman
Philipp Ebensberger