Commit Graph

10 Commits

Author SHA1 Message Date
Damien George 90023b4dcf extmod/modmachine: Clean up decls of machine types to use common ones.
The machine_i2c_type, machine_spi_type and machine_timer_type symbols are
already declared in extmod/modmachine.h and should not be declared anywhere
else.

Also move declarations of machine_pin_type and machine_rtc_type to the
common header in extmod.

Signed-off-by: Damien George <damien@micropython.org>
2023-10-26 16:20:53 +11:00
Damien George 6c8b19c7e2 stm32/spi: Return error code and raise exception if SPI init fails.
Signed-off-by: Damien George <damien@micropython.org>
2023-03-09 12:47:45 +11:00
Angus Gratton b3e38ac632 stm32/spi: Downgrade SPIHandle definitions to static.
Seems unused outside of spi.c, spi_obj[] array is the expected way to
iterate these.

This work was funded through GitHub Sponsors.

Signed-off-by: Angus Gratton <angus@redyak.com.au>
2022-11-11 13:23:24 +11:00
iabdalkader af4ba6d1b4 stm32: Rename machine I2C and SPI types consistently across ports.
This renames:
- machine_hard_i2c_type -> machine_i2c_type
- machine_hard_spi_type -> machine_spi_type
2022-10-22 12:54:42 +11:00
Damien George 39d50d129c ports: Add SoftI2C and SoftSPI to machine module where appropriate.
Previous commits removed the ability for one I2C/SPI constructor to
construct both software- or hardware-based peripheral instances.  Such
construction is now split to explicit soft and non-soft types.

This commit makes both types available in all ports that previously could
create both software and hardware peripherals: machine.I2C and machine.SPI
construct hardware instances, while machine.SoftI2C and machine.SoftSPI
create software instances.

This is a breaking change for use of software-based I2C and SPI.  Code that
constructed I2C/SPI peripherals in the following way will need to be
changed:

    machine.I2C(-1, ...)            ->  machine.SoftI2C(...)
    machine.I2C(scl=scl, sda=sda)   ->  machine.SoftI2C(scl=scl, sda=sda)

    machine.SPI(-1, ...)            ->  machine.SoftSPI(...)
    machine.SPI(sck=sck, mosi=mosi, miso=miso)
                        ->  machine.SoftSPI(sck=sck, mosi=mosi, miso=miso)

Code which uses machine.I2C and machine.SPI classes to access hardware
peripherals does not need to change.

Signed-off-by: Damien George <damien@micropython.org>
2020-10-01 12:57:10 +10:00
Damien George 056e0b6293 stm32/spi: Add implementation of low-level SPI protocol.
Can be used, for example, to configure external SPI flash using a hardware
SPI interface (code to be put in a board's bdev.c file):

    STATIC const spi_proto_cfg_t hard_spi_bus = {
        .spi = &spi_obj[5],
        .baudrate = 10000000,
        .polarity = 0,
        .phase = 0,
        .bits = 8,
        .firstbit = SPI_FIRSTBIT_MSB,
    };

    STATIC mp_spiflash_cache_t spi_bdev_cache;

    const mp_spiflash_config_t spiflash_config = {
        .bus_kind = MP_SPIFLASH_BUS_SPI,
        .bus.u_spi.cs = pin_A0,
        .bus.u_spi.data = (void*)&hard_spi_bus,
        .bus.u_spi.proto = &spi_proto,
        .cache = &spi_bdev_cache,
    };

    spi_bdev_t spi_bdev;
2018-08-14 22:10:43 +10:00
Damien George 8300be6d0f stm32/spi: Split out pyb.SPI and machine.SPI bindings to their own files
The aim here is to have spi.c contain the low-level SPI driver which is
independent (not fully but close) of MicroPython objects and methods, and
the higher-level bindings are separated out to pyb_spi.c and machine_spi.c.
2018-08-14 17:11:07 +10:00
Damien George d966a33486 stm32: Change header include guards from STMHAL to STM32 to match dir. 2018-02-15 15:47:04 +11:00
Damien George 4ad3ede21a stm32/spi: Provide better separation between SPI driver and uPy objs.
There is an underlying hardware SPI driver (built on top of the STM HAL)
and then on top of this sits the legacy pyb.SPI class as well as the
machine.SPI class.  This patch improves the separation between these
layers, in particular decoupling machine.SPI from pyb.SPI.
2018-02-05 14:30:32 +11:00
Damien George 01dd7804b8 ports: Make new ports/ sub-directory and move all ports there.
This is to keep the top-level directory clean, to make it clear what is
core and what is a port, and to allow the repository to grow with new ports
in a sustainable way.
2017-09-06 13:40:51 +10:00