Commit Graph

8 Commits

Author SHA1 Message Date
robert-hh 4774501cab mimxrt/eth: Avoid a race condition for Ethernet.
That caused Ethernet to lock up at high data rates after ~200MByte data
average in a row.  Tested now with data bursts up to 10 GByte and overall
data rates of ~8MByte/s at the Eth100 port.
2022-03-08 23:11:01 +11:00
robert-hh b0d460cd7d mimxrt/eth: Fix an Ethernet transmit error.
Sometimes frames could not be sent immediately because the controller was
still busy with previous frames.  Then, an error was returned to lwip.
This fix adds a limited number of retries for this busy state, waiting
100µs before the next attempt.  Typically the transmit succeeds now at the
second attempt.

Second change: Reset the controller for a clean state after soft reset.
2022-03-08 23:09:17 +11:00
Philipp Ebensberger 62cb2069bb mimxrt/machine_pin: Change pin drive constants to DRIVE_x naming.
Updated DRIVE_x constants representing pin drive strength.

Signed-off-by: Philipp Ebensberger
2022-03-08 22:30:33 +11:00
robert-hh 1dc366f901 mimxrt: Replace Pin-config constants by a function call.
The Pin config setting by IOMUXC_SetPinConfig() is supplied by a
bit pattern. That pattern is specific for a MCU family. In preparation
for supporting the MIMXRT117x family, the constant bit pattern is
replaced by a function call, such that the bit pattern is created
at a single place. The code for this functions was taken from
machine_pin.c.

Note: A working port for the MIMXRT1176 exists already.
2022-01-27 16:53:30 +11:00
robert-hh 1e9eaa7af5 mimxrt: Add a driver for the DP83848 PHY device.
Just another choice for the PHY interface.

Added: Keyword option phy_clock=LAN.IN or LAN.OUT
to define the source of the 50MHZ clock for the PHY
interface. The RMII clock is not enabled if it
is generated by a PYH board. Constants:

LAN.IN  The clock is provided by the PHY board.
LAN.OUT The clock is provided by the MCU board.

The default is LAN.OUT or the value set in mpconfigboard.h, which
is currently set to IN only for the SEEED ARCH MIX board. Usage etc:

lan = LAN(phy_type=LAN.PHY_DP83848, phy_clock=LAN.IN)
2021-12-14 08:07:52 +01:00
robert-hh ea09dccfea mimxrt: Re-Enable eth checksum creation by HW.
The initial problem with a wrong ICMP checksum was caused by
the test code setting a checksum and the HW taking that probably as
the start value and ending up with 0xffff. With a checksum field of 0
set by the test code the HW creates the proper checksum.
2021-12-14 08:07:52 +01:00
robert-hh bbe25f4704 mimxrt: Support selection of PHY type and address.
Useful for boards without a PHY interface, where that has to be
attached. Like the Seed ARCH MIX board or Vision SOM. Phy drivers
supported so far are:

- KSZ8081
- DP83825
- LAN8720

More to come. Usage e.g.:
lan = LAN(phy_type=LAN.PHY_LAN8720, phy_addr=1)

The default values are those set in mpconfigboard.h.
2021-12-14 08:07:52 +01:00
robert-hh 1866ed7e2e mimxrt/eth: Add LAN support and integrate the network module.
This commit implements 10/100 Mbit Ethernet support in the mimxrt port.

The following boards are configured without ETH network:
- MIMXRT1010_EVK
- Teensy 4.0

The following boards are configured with ETH network:
- MIMXRT1020_EVK
- MIMXRT1050_EVK
- MIMXRT1060_EVK
- MIMXRT1064_EVK
- Teensy 4.1

Ethernet support tested with TEENSY 4.1, MIMRTX1020_EVK and MIMXRT1050_EVK.
Build tested with Teensy 4.0 and MIMXRT1010_EVK to be still working.
Compiles and builds properly for MIMXRT1060_EVK and MIMXRT1064_EVK, but not
tested lacking suitable boards.

Tested functions are:
- ping works bothway
- simple UDP transfer works bothway
- ntptime works
- the ftp server works
- secure socker works
- telnet and webrepl works

The MAC address is 0x02 plus 5 bytes from the manifacturing info field,
which can be considered as unique per device.

Some boards do not wire the RESET and INT pin of the PHY transceiver.  For
operation, these are not required.  If they are defined, they will be used.
2021-10-25 15:14:26 +11:00