The UARTs have no FIFOs, so if interrupts are disabled
for more than a character time (10 usec at 1 Mbit/sec)
then characters get dropped.
The overhead for handling a UART ISR is about 0.5 usec,
so even at baud rates of 1 Mbit/sec this only corresponds
to about 5% of the CPU. Lower baud rates will have less
of an impact.
- added some comments to explain the priority/sub-priority.
- adds an entry for SDIO (to be used in a later patch)
- increases DMA priority above USB so that DMA can be used
for sdcard I/O when using USB Mass Storage.
pyb.delay and pyb.udelay now use systick if IRQs are enabled, otherwise
they use a busy loop. Thus they work correctly when IRQs are disabled.
The busy loop is computed from the current CPU frequency, so works no
matter the CPU frequency.
These functions are generally 1 machine instruction, and are used in
critical code, so makes sense to have them inline.
Also leave these functions uninverted (ie 0 means enable, 1 means
disable) and provide macro constants if you really need to distinguish
the states. This makes for smaller code as well (combined with
inlining).
Applied to teensy port as well.
Dave Hylands
Damien George
Dave Curtis