The following changes are made:
- Use software SPI for external SPI flash access when building mboot.
- Enable the mboot filesystem-loading feature, with FAT FS support.
- Increase the frequency of the CPU when in mboot to 96MHz, to increase the
speed of SPI flash accesses and programming.
Signed-off-by: Damien George <damien@micropython.org>
This allows a board to modify initial_r0 if needed.
Also make default board behaviour functions always available, named as
mboot_get_reset_mode_default and mboot_state_change_default.
Signed-off-by: Damien George <damien@micropython.org>
For ports with MICROPY_VFS and MICROPY_PY_IO enabled their configuration
can now be simplified to use the defaults for mp_import_stat and
mp_builtin_open.
This commit makes no functional change, except for the following minor
points:
- the built-in "open" is removed from the minimal port (it previously did
nothing)
- the duplicate built-in "input" is removed from the esp32 port
- qemu-arm now delegates to VFS import/open
Signed-off-by: Damien George <damien@micropython.org>
This reverts commit 2668337f36.
The issue with potential breaking of the BLE RX path in the radio is fixed
since WS v1.12.0.
Signed-off-by: Damien George <damien@micropython.org>
This replaces occurences of
foo_t *foo = m_new_obj(foo_t);
foo->base.type = &foo_type;
with
foo_t *foo = mp_obj_malloc(foo_t, &foo_type);
Excludes any places where base is a sub-field or when new0/memset is used.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
This commit adds a board definition for NUCLEO_G0B1RE. This board has the
REPL on UART2 which is connected to the on-board ST-link USB-UART.
Signed-off-by: Asensio Lorenzo Sempere <asensio.aerospace@gmail.com>
This implements self-triggering of the Flash NVIC interrupt on Cortex-M0
devices, which allows enabling internal storage on those MCUs.
Signed-off-by: Asensio Lorenzo Sempere <asensio.aerospace@gmail.com>
These files that are reformatted only now fall under the list of files to
apply uncrustify/black formatting to.
Signed-off-by: Damien George <damien@micropython.org>
To avoid any I/O glitches in mp_hal_pin_config, make sure a valid alternate
function is set in AFR first before switching the pin mode. When switching
from AF to INPUT or OUTPUT, the AF in AFR will remain valid up until the
pin mode is switched.
- Add board-level configuration option to set the SMPS supply mode.
- Wait for valid voltage levels after configuring the SMPS mode.
- Wait for external supply ready flag if SMPS supplies external circuitry.
All user interface (LED, button) code has been moved to ui.c, and the
interface to this code with the rest of the system now goes through calls
to mboot_state_change(). This state-change function can be overridden by a
board to fully customise the user interface behaviour.
Signed-off-by: Damien George <damien@micropython.org>
This is enabled at MICROPY_CONFIG_ROM_LEVEL_EXTRA_FEATURES, which is the
default for stm32. Not setting the value in mpconfigboard.h allows boards
to optionally configure it.
Signed-off-by: Damien George <damien@micropython.org>
The CAN.initfilterbanks() class method is removed, and its functionality is
replaced with the "num_filter_banks" keyword argument to the CAN
constructor and CAN.init(). This configures the filter bank split.
This new approach provides more flexibility configuring the resources used
by a given CAN instance, allowing other MCUs like H7 to fit the API. It
also brings CAN closer to how other machine peripherals are configured,
where everything is done in the constructor/init method.
This is a breaking change to the CAN API.
CAN.recv() now returns a 5-tuple, with the new element in the second
position being a boolean, True if the ID is extended.
This is a breaking change of the API for CAN.recv().
A CAN bus can have mixed classic/FD nodes. Prior to this patch the CAN API
could be configured for either standard or extended ID, but not both/mixed
operation.
This patch allows extended IDs to be filtered and enabled on a per-message
basis, in send(), setfilter() and clearfilter().
This is a breaking change to the API: init() no longer accepts the extframe
keyword argument.
- Enable CAN FD frame support and BRS.
- Optimize the message RAM usage per FDCAN instance.
- Document the usage and different sections of the Message RAM.
In particular, it is called by the constructor if the instance already
exists. So if the previous instance was deinit'd then it will be deinit'd
a second time.
Signed-off-by: Damien George <damien@micropython.org>
Tested on PYBV10 and PYBD_SF6, with MBOOT_FSLOAD enabled and programming
new firmware from a .dfu.gz file stored on the SD card.
Signed-off-by: Damien George <damien@micropython.org>
If enabled via MBOOT_ADDRESS_SPACE_64BIT (it's disabled by default) then
read addresses will be 64-bit.
Signed-off-by: Damien George <damien@micropython.org>
Even if MBOOT_FSLOAD is disabled, mboot should still check for 0x70ad0080
so it can immediately return to the application if this feature is not
enabled. Otherwise mboot will get stuck in DFU mode.
Signed-off-by: Damien George <damien@micropython.org>
According to the C standard the free(void *ptr) function: if ptr is a null
pointer, no action occurs.
Signed-off-by: Peter Züger <zueger.peter@icloud.com>
If MBOOT_BOARD_ENTRY_INIT is defined by a board then that function must now
make sure system clocks are configured, eg by calling mboot_entry_init().
Signed-off-by: Damien George <damien@micropython.org>
If a board wants to customise the clocks it can define the following:
MBOOT_CLK_PLLM
MBOOT_CLK_PLLN
MBOOT_CLK_PLLP
MBOOT_CLK_PLLQ
MBOOT_CLK_PLLR (only needed on STM32H7)
MBOOT_FLASH_LATENCY
MBOOT_CLK_AHB_DIV
MBOOT_CLK_APB1_DIV
MBOOT_CLK_APB2_DIV
MBOOT_CLK_APB3_DIV (only needed on STM32H7)
MBOOT_CLK_APB4_DIV (only needed on STM32H7)
Signed-off-by: Damien George <damien@micropython.org>
The default stm32lib remains lib/stm32lib, but it can now be easily
overriden at build time by specifying STM32LIB_DIR, or STM32LIB_CMSIS_DIR
and STM32LIB_HAL_DIR.
Signed-off-by: Damien George <damien@micropython.org>
This also fixes a possible race condition when exiting initialisation mode:
reading then writing to ISR (via ISR &= ~RTC_ISR_INIT) will clear any flags
that were set by the hardware between the read and the write. The correct
way to clear just the INIT bit is to just do a single write via ISR =
~RTC_ISR_INIT, which will not clear any other flags (they must be written
to 0 to clear), and that is exactly what LL_RTC_DisableInitMode does.
Signed-off-by: Damien George <damien@micropython.org>
And don't assert on the sector number in sector_erase, so it can support
erasing arbitrary sectors.
Signed-off-by: Damien George <damien@micropython.org>
The inclusion of `umachine` in the list of built-in modules is now done
centrally in py/objmodule.c. Enabling MICROPY_PY_MACHINE will include this
module.
As part of this, all ports now have `umachine` as the core module name
(previously some had only `machine` as the name).
Signed-off-by: Damien George <damien@micropython.org>
This commit adds support for the STM32G4 series of MCUs, and a board
definition for NUCLEO_G474RE. This board has the REPL on LPUART1 which is
connected to the on-board ST-link USB-UART.
It's needed at least on F4 because this file overrides the weak function
HAL_RCC_DeInit() from hal_rcc.c.
Signed-off-by: Damien George <damien@micropython.org>
PLL3-Q is more reliable than PLL1-Q for the USB clock source when entering
mboot from various reset states (eg power on vs MCU reset). (It was found
that if the main application used PLL3-Q then sometimes the USB clock
source would stay stuck on PLL3-Q and not switch to PLL1-Q after a reset.)
Other related changes:
- SystemCoreClockUpdate() should be called on H7 because the calculation
can be involved in some cases.
- __set_PRIMASK(0) should be called because on H7 the built-in ST DFU
bootloader exits with IRQs disabled.
Signed-off-by: Damien George <damien@micropython.org>
H7 MCUs have ECC and writes do not go through to SRAM until 64-bits have
been written (on another location is written). So use 64-bit writes for
the bootloader-state variable so it is committed before the system reset.
As part of this change, the lower byte of the bootloader address in
BL_STATE must now be the magic number 0x5a5 for the state to be valid
(previously this was 0x000 which is not as robust).
Signed-off-by: Damien George <damien@micropython.org>
The original code used a independent state with regards to the interrupt.
During heavy bus error conditions the internal state could become
out-of-sync with the interrupts.
Further explanation: during the development of an application using CAN
communication, a interrupt-run-away was found in some situations. It was
found that the error interrupt triggered (Warning, Passive or Bus-Off, all
triggered it) the run-away. The only recovery was a reset.
Two problems were found:
- the error interrupt is enabled but not cleared in the interrupt routine;
- an internal variable 'State' that was used to track the message received
state (empty, new, full, overflow) that was not directly related to
interrupt that indicated the state.
In this commit these issues are fixed by adding more values for the
interrupt reason (warning, passive, bus off) and clearing the error
interrupts, and making the internal state directly dependent on the
interrupt state for received messages.
Furthermore, introducing the FIFO1 in the CAN receive stage, another issue
existed. Even if the messages are received into the FIFO1 (by selecting
message filtering for FIFO0 and FIFO1), the interrupt firing was indicating
FIFO0 Rx. The configuration of the interrupts for this is now also fixed.
The CAN peripheral has 2 interrupt lines going into the NVIC controller.
The assignment of the interrupt reasons to these 2 interrupt lines was
missing. Now the reception of FIFO1 messages triggers the second interrupt
line. Other interrupts (Rx FIFO0 and bus error) are assigned to the first
interrupt line.
Tested on a Nucleo-G474, and also checked the HAL function to work with the
H7 family.
Damien George
Jim Mussared
Asensio Lorenzo Sempere
iabdalkader
Chris Wilson
Dave Hylands
Andrew Leech
Meriç SARIIŞIK
Peter Züger
Christophe Priouzeau
Peter D. Gray
Herwin Grobben