This change allows the same heap allocation rules to be used when using
malloc regardless if the board has SPRAM or normal RAM.
Integrating with the esp32-camera for example requires that ESP32 SPRAM be
allocatable using the esp-idf capabilities aware allocation functions. In
the case of esp32-camera it's for the framebuffer.
Detect when CONFIG_SPIRAM_USE_MALLOC is in use and use the standard
automatic configuration of leaving 1/2 of the SPRAM available to other
FreeRTOS tasks.
For example the ESP32-C3 has 2 TX channels and 2 RX channels in total, and
in this case channel 1 must be the default for bitstream.
Signed-off-by: Damien George <damien@micropython.org>
This follows up on #5489, where we changed the esp32 core pinning to core 0
in order to work around an issue with IDF < 4.2.0. Now that IDF > 4.2.0 is
available, we allow pinning back to core 1, which eliminates some
problematic callback latency with WiFi enabled.
NimBLE is also pinned to core 1 - the same core as MicroPython - when using
IDF >=4.2.
Rework the ADC implementation to follow the improved ADC/ADCBlock API.
This adds support for calibrated voltage readings and the ADC2 block. The
ADC API is backwards compatible with what it was before this change.
Resolves#6219.
The bit-bang implementation was replaced with the RMT implementation in
599b61c086. This commit brings back that
bit-bang code, and allows it to be selected via the new static method:
esp32.RMT.bitstream_channel(None)
The bit-bang implementation may be useful if the RMT needs to be used for
something else, or if bit-banging is more stable in certain applications.
Signed-off-by: Damien George <damien@micropython.org>
MicroPython currently runs on core 0 of the esp32. Calling
rmt_driver_install will mean that the RMT interrupt handler is also
serviced on core 0. This can lead to glitches in the RMT output if
WiFi is enabled (for esp32.RMT and machine.bitstream).
This patch calls rmt_driver_install on core 1, ensuring that the RMT
interrupt handler is serviced on core 1. This prevents glitches.
Fixes issue #8161.
Signed-off-by: Damien George <damien@micropython.org>
This board has only 2MiB of flash so the build needs to be reduced in size
to fit. Commit 549448e8bb made all boards
build with -O2 by default (for performance) so this overrides that default.
Signed-off-by: Damien George <damien@micropython.org>
After changing the bitstream implementation to use the RMT driver in
commit 72d8615812
("esp32/machine_bitstream.c: Replace with RMT-based driver."), using
multiple `Neopixel` instances shows signal duplication between the
instances (i.e. a `write()` on one instance is written to all instances).
On invocation, the rmt driver configures the GPIO matrix to route the
output signal to the respective GPIO pin. When called for a different
`NeoPixel` instance using a different pin, the new route is established,
but the old route still exists. Now, the RMT output signal is sent to both
pins.
Fix this by setting the standard GPIO output function for the current pin
after uninstalling the RMT driver.
Signed-off-by: Simon Baatz <gmbnomis@gmail.com>
Save and restore the same duty cycle when the frequency (or frequency
resolution) is changed. This allows a smooth frequency change.
Also update the esp32 PWM quickref to be clearer.
If MICROPY_PY_SYS_PATH_ARGV_DEFAULTS is enabled (which it is by default)
then sys.path and sys.argv will be initialised and populated with default
values. This keeps all bare-metal ports aligned.
Signed-off-by: Damien George <damien@micropython.org>
Frozen modules will be searched preferentially, but gives the user the
ability to override this behavior.
This matches the previous behavior where "" was implicitly the frozen
search path, but the frozen list was checked before the filesystem.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
Default SPI pins are now correctly assigned by machine_hw_spi.c even for S2
and S3. mpconfigboard.h files define defaults with flipped SPI(1) and
SPI(2) to workaround a bug in machine_hw_spi.c - the bug is fixed.
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Use IO_MUX pins as defined by ESP IDF in soc/esp32/include/soc/spi_pins.h
ESP32S2 and S3 don't have IO_MUX pins for SPI3, GPIO matrix is always used.
Choose suitable defaults for S2 and S3.
ESP32C3 does not have SPI3 at all. Don't define pin mappings for it.
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Use IO_MUX pins as defined by ESP IDF in soc/esp32*/include/soc/spi_pins.h
Alternatively use now deprecated HSPI_IOMUX_PIN_NUM_xxx
(or FSPI_IOMUX_PIN_NUM_xxx for ESP32S2) for compatibility with IDF 4.2
and older.
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
The index of machine_hw_spi_obj and machine_hw_spi_default_pins arrays is
assigned to 0 for ARG_id==HSPI_HOST and 1 for another SPI. On ESP32S2 and
S3 HSPI_HOST=2 so the first set (idx=0) of default pins is used for
SPI(id=2) aka HSPI/SPI3 and the second set (idx=1) for SPI(id=1) aka
FSPI/SPI2. This makes a misleading mess in MICROPY_HW_SPIxxxx definitions
and it is also in contradiction to the comments around the definitions.
Change the test of ARG_id to fix the order of machine_hw_spi_default_pins.
This change might require adjusting MICROPY_HW_SPIxxxx definitions in
mpconfigboard.h of S2/S3 based boards.
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
The methods duty_u16() and duty_ns() are implemented to match the existing
docs. The duty will remain the same when the frequency is changed.
Standard ESP32 as well as S2, S3 and C3 are supported.
Thanks to @kdschlosser for the fix for rounding in resolution calculation.
Documentation is updated and examples expanded for esp32, including the
quickref and tutorial. Additional notes are added to the machine.PWM docs
regarding limitations of hardware PWM.
Eliminate noise data from being sent to the I2S peripheral when the
transmitted sample stream is stopped.
Signed-off-by: Mike Teachman <mike.teachman@gmail.com>
Following on from ba940250a5, the change here
makes output about 15 times faster (now up to about 550 kbytes/sec).
tinyusb_cdcacm_write_queue will return the number of bytes written, so
there's no need to use tud_cdc_n_write_available.
Signed-off-by: Damien George <damien@micropython.org>
This will be used by https://micropython.org/download/ to generate the
full listing of boards and firmware files.
Optionally supports a board.md for additional customisation of the
download page, as well as deploy.md for flashing instructions.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
This commit enables some significant optimisations for esp32:
- move the VM to iRAM
- move hot parts of the runtime to iRAM (map lookup, load global/name,
mp_obj_get_type)
- enable MICROPY_OPT_LOAD_ATTR_FAST_PATH
- enable MICROPY_OPT_MAP_LOOKUP_CACHE
- disable assertions
- change from -Os to -O2 for compilation
It's hard to measure performance on esp32 due to external flash and
hardware caching. But this set of changes improves performance compared to
master by (on a TinyPICO with the GENERIC build, using IDF 4.2.2, running
at 160MHz):
diff of scores (higher is better)
N=100 M=100 esp32-master -> esp32-perf diff diff% (error%)
bm_chaos.py 71.28 -> 268.08 : +196.80 = +276.094% (+/-0.04%)
bm_fannkuch.py 44.10 -> 69.31 : +25.21 = +57.166% (+/-0.01%)
bm_fft.py 1385.27 -> 2538.23 : +1152.96 = +83.230% (+/-0.01%)
bm_float.py 1060.94 -> 3900.62 : +2839.68 = +267.657% (+/-0.03%)
bm_hexiom.py 10.90 -> 32.79 : +21.89 = +200.826% (+/-0.02%)
bm_nqueens.py 1000.83 -> 2372.87 : +1372.04 = +137.090% (+/-0.01%)
bm_pidigits.py 288.13 -> 664.40 : +376.27 = +130.590% (+/-0.46%)
misc_aes.py 102.45 -> 345.69 : +243.24 = +237.423% (+/-0.01%)
misc_mandel.py 1016.58 -> 2121.92 : +1105.34 = +108.731% (+/-0.01%)
misc_pystone.py 632.91 -> 1801.87 : +1168.96 = +184.696% (+/-0.08%)
misc_raytrace.py 76.66 -> 281.78 : +205.12 = +267.571% (+/-0.05%)
viper_call0.py 210.63 -> 273.17 : +62.54 = +29.692% (+/-0.01%)
viper_call1a.py 208.45 -> 269.51 : +61.06 = +29.292% (+/-0.00%)
viper_call1b.py 185.44 -> 228.25 : +42.81 = +23.086% (+/-0.01%)
viper_call1c.py 185.86 -> 228.90 : +43.04 = +23.157% (+/-0.01%)
viper_call2a.py 207.10 -> 267.25 : +60.15 = +29.044% (+/-0.00%)
viper_call2b.py 173.76 -> 209.42 : +35.66 = +20.523% (+/-0.00%)
Five tests have more than 3x speed up (200%+).
The performance of the tests bm_fft, bm_pidigits and misc_aes now scale
with CPU frequency (eg changing frequency to 240MHz boosts the performance
of these by 50%), which means they are no longer influenced by timing of
external flash access. (The viper_call* tests did previously scale with
CPU frequency, and they still do.)
Turning off assertions reduces code size by about 80k, and going from -Os
to -O2 costs about 100k, so the net change in code size (for the GENERIC
board) is about +20k.
If a board wants to enable assertions, or use -Os instead of -O2, that's
still possible by overriding the sdkconfig parameters.
Signed-off-by: Damien George <damien@micropython.org>
To match network_lan.c and network_ppp.c, and make it clear what code is
specifically for WLAN support.
Also provide a configuration option MICROPY_PY_NETWORK_WLAN which can be
used to fully disable network.WLAN (it's enabled by default).
Signed-off-by: Damien George <damien@micropython.org>
To do this the board must define MICROPY_BOARD_STARTUP, set
MICROPY_SOURCE_BOARD then define the new start-up code.
For example, in mpconfigboard.h:
#define MICROPY_BOARD_STARTUP board_startup
void board_startup(void);
in mpconfigboard.cmake:
set(MICROPY_SOURCE_BOARD
${MICROPY_BOARD_DIR}/board.c
)
and in a new board.c file in the board directory:
#include "py/mpconfig.h"
void board_startup(void) {
boardctrl_startup();
// extra custom startup
}
This follows stm32's boardctrl facilities.
Signed-off-by: Damien George <damien@micropython.org>
Because vPortCleanUpTCB is called by the FreeRTOS idle task, and it checks
thread, but didn't check the thread_mutex.
And if thread is not NULL, but thread_mutex not ready then it will crash
with an error when calling mp_thread_mutex_lock(&thread_mutex, 1).
As suggested by @dpgeorge, move the thread = &thread_entry0 line to the end
of mp_thread_init().
Signed-off-by: leo chung <gewalalb@gmail.com>
This callback allows detecting if there is a USB host connected to the CDC
or not, in which case the stdout_tx should skip CDC TX writing and
flushing or the system will block.
Fixes issue #7820.
This commit allows using all the available PWM timers (up to 8) and
channels (up to 16), without affecting the PWM API.
If a new frequency is set, first it checks if another timer is using the
same frequency. If yes, then it uses this timer, otherwise, it creates a
new one. If all timers are used, the user should set an already used
frequency, or de-init a channel.
This work is based on #6276 and #3608.
This commit refactors machine.PWM and creates extmod/machine_pwm.c. The
esp8266, esp32 and rp2 ports all use this and provide implementations of
the required PWM functionality. This helps to reduce code duplication and
keep the same Python API across ports.
This commit does not make any functional changes.
Signed-off-by: Damien George <damien@micropython.org>
The zephyr port doesn't support SoftI2C so it's not enabled, and the legacy
I2C constructor check can be removed.
Signed-off-by: Damien George <damien@micropython.org>
To keep things neat and tidy, we ensure that each file has 1 and only 1
newline at the end of each file.
Signed-off-by: David Lechner <david@pybricks.com>
Add a new board type for ESP32-C3 revision 3 and up that implement the USB
serial/JTAG port on pin 18 and 19. This variant uses the USB serial for
programming and console, leaving the UART free.
- Pins 18 and 19 are correctly reserved for this variant. Also pins 14-17
are reserved for flash for any ESP32-C3 so they can't be reconfigured
anymore to crash the system.
- Added usb_serial_jtag.c and .h to implement this interface.
- Interface was tested to work correctly together with webrepl.
- Interface was tested to work correctly when sending and receiving
large files with ampy.
- Disconnecting terminal or USB will not hang the system when it's
trying to print.
Reverse operations are supported on stm32 and rp2, and esp32 has enough
space to also enable inplace operations, to make it complete.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
This enables optional support for the hardware UART to use the RTS and/or
CTS pins for flow control.
The new "flow" constructor keyword specifies a bitmask of RTS and/or CTS.
This matches the interface used by machine.UART on stm32 and rp2.
Previously on ESP32 it was possible to specify which pins to use for the
RTS and CTS signals, but hardware flow control was never functional: CTS
was not checked before transmitting bytes, and RTS was always driven high
(signalling no buffer space available). With this patch, CTS and RTS both
operate as expected.
This also includes an update to the machine.UART documentation.
Signed-off-by: Will Sowerbutts <will@sowerbutts.com>
This helps the OS switch to and give other threads processing time during
the sleep. It also ensures that pending events are handled, even when
sleeping for 0ms.
Fixes issue #5344.
Signed-off-by: Damien George <damien@micropython.org>
Using a 2-item transaction queue instead of 1 allows long transfers to
be executed with the minimum inter-transaction delay. Limit maximum
transaction length to ensure an integer multiple of the SPI `bits`
setting are transferred. Fixes#7511.
This commit adds I2S protocol support for the esp32 and stm32 ports, via
a new machine.I2S class. It builds on the stm32 work of blmorris, #1361.
Features include:
- a consistent I2S API across the esp32 and stm32 ports
- I2S configurations supported:
- master transmit and master receive
- 16-bit and 32-bit sample sizes
- mono and stereo formats
- sampling frequency
- 3 modes of operation:
- blocking
- non-blocking with callback
- uasyncio
- internal ring buffer size can be tuned
- documentation for Pyboards and esp32-based boards
- tested on the following development boards:
- Pyboard D SF2W
- Pyboard V1.1
- ESP32 with SPIRAM
- ESP32
Signed-off-by: Mike Teachman <mike.teachman@gmail.com>
This change allows specification of the idle level and TX carrier output
level (through changed initialisation API), and more flexible specification
of pulses for write_pulses.
This is a breaking change for the esp32.RMT constructor API. Previous code
of this form:
esp32.RMT(..., carrier_duty_percent=D, carrier_freq=F)
will now raise an exception and should be changed to:
esp32.RMT(..., tx_carrier=(F, D, 1))
When looping, now disable the TX interrupt after calling rmt_write_items()
function to handle change in IDF behaviour (since v4.1). Also check length
of pulses to ensure it fits hardware limit.
Fixes issue #7403.
Dynamically generate/loaded native code (eg from @micropython.native or
native .mpy files) needs to be able allocate from IRAM, and the memory
protection feature must be disabled for that to work. Disabling it is
needed to get native code working on ESP32-S2 and -C3.
Signed-off-by: Damien George <damien@micropython.org>
Damien George
Emil Kondayan
Michael O'Cleirigh
IhorNehrutsa
ubi de feo
marcidy
Sean Coates
jason
Jonathan Hogg
Simon Baatz
MikeTeachman
Jim Mussared
Tomas Vanek
Seon Rozenblum
Magnus von Wachenfeldt
Mike Causer
leo chung
Stewart Bonnick
patrick
David Lechner
Patrick Van Oosterwijck
Will Sowerbutts
Michael Weiss