Tested on PYBV10 and PYBD_SF6, with MBOOT_FSLOAD enabled and programming
new firmware from a .dfu.gz file stored on the SD card.
Signed-off-by: Damien George <damien@micropython.org>
If enabled via MBOOT_ADDRESS_SPACE_64BIT (it's disabled by default) then
read addresses will be 64-bit.
Signed-off-by: Damien George <damien@micropython.org>
Even if MBOOT_FSLOAD is disabled, mboot should still check for 0x70ad0080
so it can immediately return to the application if this feature is not
enabled. Otherwise mboot will get stuck in DFU mode.
Signed-off-by: Damien George <damien@micropython.org>
According to the C standard the free(void *ptr) function: if ptr is a null
pointer, no action occurs.
Signed-off-by: Peter Züger <zueger.peter@icloud.com>
If MBOOT_BOARD_ENTRY_INIT is defined by a board then that function must now
make sure system clocks are configured, eg by calling mboot_entry_init().
Signed-off-by: Damien George <damien@micropython.org>
If a board wants to customise the clocks it can define the following:
MBOOT_CLK_PLLM
MBOOT_CLK_PLLN
MBOOT_CLK_PLLP
MBOOT_CLK_PLLQ
MBOOT_CLK_PLLR (only needed on STM32H7)
MBOOT_FLASH_LATENCY
MBOOT_CLK_AHB_DIV
MBOOT_CLK_APB1_DIV
MBOOT_CLK_APB2_DIV
MBOOT_CLK_APB3_DIV (only needed on STM32H7)
MBOOT_CLK_APB4_DIV (only needed on STM32H7)
Signed-off-by: Damien George <damien@micropython.org>
The default stm32lib remains lib/stm32lib, but it can now be easily
overriden at build time by specifying STM32LIB_DIR, or STM32LIB_CMSIS_DIR
and STM32LIB_HAL_DIR.
Signed-off-by: Damien George <damien@micropython.org>
This also fixes a possible race condition when exiting initialisation mode:
reading then writing to ISR (via ISR &= ~RTC_ISR_INIT) will clear any flags
that were set by the hardware between the read and the write. The correct
way to clear just the INIT bit is to just do a single write via ISR =
~RTC_ISR_INIT, which will not clear any other flags (they must be written
to 0 to clear), and that is exactly what LL_RTC_DisableInitMode does.
Signed-off-by: Damien George <damien@micropython.org>
And don't assert on the sector number in sector_erase, so it can support
erasing arbitrary sectors.
Signed-off-by: Damien George <damien@micropython.org>
The inclusion of `umachine` in the list of built-in modules is now done
centrally in py/objmodule.c. Enabling MICROPY_PY_MACHINE will include this
module.
As part of this, all ports now have `umachine` as the core module name
(previously some had only `machine` as the name).
Signed-off-by: Damien George <damien@micropython.org>
This commit adds support for the STM32G4 series of MCUs, and a board
definition for NUCLEO_G474RE. This board has the REPL on LPUART1 which is
connected to the on-board ST-link USB-UART.
It's needed at least on F4 because this file overrides the weak function
HAL_RCC_DeInit() from hal_rcc.c.
Signed-off-by: Damien George <damien@micropython.org>
PLL3-Q is more reliable than PLL1-Q for the USB clock source when entering
mboot from various reset states (eg power on vs MCU reset). (It was found
that if the main application used PLL3-Q then sometimes the USB clock
source would stay stuck on PLL3-Q and not switch to PLL1-Q after a reset.)
Other related changes:
- SystemCoreClockUpdate() should be called on H7 because the calculation
can be involved in some cases.
- __set_PRIMASK(0) should be called because on H7 the built-in ST DFU
bootloader exits with IRQs disabled.
Signed-off-by: Damien George <damien@micropython.org>
H7 MCUs have ECC and writes do not go through to SRAM until 64-bits have
been written (on another location is written). So use 64-bit writes for
the bootloader-state variable so it is committed before the system reset.
As part of this change, the lower byte of the bootloader address in
BL_STATE must now be the magic number 0x5a5 for the state to be valid
(previously this was 0x000 which is not as robust).
Signed-off-by: Damien George <damien@micropython.org>
The original code used a independent state with regards to the interrupt.
During heavy bus error conditions the internal state could become
out-of-sync with the interrupts.
Further explanation: during the development of an application using CAN
communication, a interrupt-run-away was found in some situations. It was
found that the error interrupt triggered (Warning, Passive or Bus-Off, all
triggered it) the run-away. The only recovery was a reset.
Two problems were found:
- the error interrupt is enabled but not cleared in the interrupt routine;
- an internal variable 'State' that was used to track the message received
state (empty, new, full, overflow) that was not directly related to
interrupt that indicated the state.
In this commit these issues are fixed by adding more values for the
interrupt reason (warning, passive, bus off) and clearing the error
interrupts, and making the internal state directly dependent on the
interrupt state for received messages.
Furthermore, introducing the FIFO1 in the CAN receive stage, another issue
existed. Even if the messages are received into the FIFO1 (by selecting
message filtering for FIFO0 and FIFO1), the interrupt firing was indicating
FIFO0 Rx. The configuration of the interrupts for this is now also fixed.
The CAN peripheral has 2 interrupt lines going into the NVIC controller.
The assignment of the interrupt reasons to these 2 interrupt lines was
missing. Now the reception of FIFO1 messages triggers the second interrupt
line. Other interrupts (Rx FIFO0 and bus error) are assigned to the first
interrupt line.
Tested on a Nucleo-G474, and also checked the HAL function to work with the
H7 family.
The keyword "af" has been deprecated for some time and "alt" should be used
instead (but "af" still works).
Signed-off-by: Damien George <damien@micropython.org>
So that a board can access other HAL_RCC functions if it needs them (this
was not possible previously by just adding hal_rcc.c to the src list for a
board because it would clash with the custom HAL_RCC_GetHCLKFreq function).
Signed-off-by: Damien George <damien@micropython.org>
This adds MBEDTLS_MD_SHA1 to the list of default hashes for TLS 1.2
handshake signatures. Although SHA-1 is weak, this option is turned on in
the default mbedtls configuration file, and allows better compatibility
with older servers. In particular it allows an stm32-mbedtls-based client
to connect to an axtls-based client (eg default unix port and esp8266).
Signed-off-by: Damien George <damien@micropython.org>
This is needed because these ports allocate mbedtls data on the MicroPython
heap, and SSL socket objects must be fully cleaned up when they are garbage
collected, to free this memory allocated by mbedtls. As part of this,
gc_sweep_all() will now ensure that the MP_STATE_PORT(mbedtls_memory)
linked-list is fully deallocated on soft reset.
Signed-off-by: Damien George <damien@micropython.org>
If MICROPY_PY_SYS_PATH_ARGV_DEFAULTS is enabled (which it is by default)
then sys.path and sys.argv will be initialised and populated with default
values. This keeps all bare-metal ports aligned.
Signed-off-by: Damien George <damien@micropython.org>
Frozen modules will be searched preferentially, but gives the user the
ability to override this behavior.
This matches the previous behavior where "" was implicitly the frozen
search path, but the frozen list was checked before the filesystem.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
The current ST HAL does not support reading the extended CSD so cannot
correctly detect the capacity of high-capacity cards. As a workaround, the
capacity can be forced via the MICROPY_HW_MMCARD_LOG_BLOCK_NBR config
option.
Signed-off-by: Damien George <damien@micropython.org>
These were commented correctly by their colour, but in the wrong order with
respect to the PCB silkscreen.
Fixes issue #8054.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
Instead of board pins, so that pins which have only the CPU specified in
pins.csv can still be used with mp_hal_pin_config_alt_static().
Signed-off-by: Damien George <damien@micropython.org>
A board can now define the following linker symbols to configure its flash
storage layout:
_micropy_hw_internal_flash_storage_start
_micropy_hw_internal_flash_storage_end
_micropy_hw_internal_flash_storage_ram_cache_start
_micropy_hw_internal_flash_storage_ram_cache_end
And optionally have a second flash segment by configuring
MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE_SEGMENT2 to 1 and defining:
_micropy_hw_internal_flash_storage2_start
_micropy_hw_internal_flash_storage2_end
Signed-off-by: Damien George <damien@micropython.org>
This reduces code size and code duplication, and fixes `pyb.usb_mode()` so
that it now returns the correct string when in multi-VCP mode (before, it
would return None when in one of these modes).
Signed-off-by: Damien George <damien@micropython.org>
This is to make the builds for all nucleo/discovery boards uniform, so they
can be treated the same by the auto build scripts.
The CI script is updated to explicitly enable mboot and packing, to test
these features.
Signed-off-by: Damien George <damien@micropython.org>
This prevents SPI4/5 from being used if SDIO and CYW43 are enabled, because
the DMA for the SDIO is used on an IRQ and must be exclusivly available for
use by the SDIO peripheral.
Signed-off-by: Damien George <damien@micropython.org>
Because DMA2 may be in use by other peripherals, eg SPI1.
On PYBD-SF6 it's possible to trigger a bug in the existing code by turning
on WLAN and connecting to an AP, pinging the IP address from a PC and
running the following code on the PYBD:
def spi_test(s):
while 1:
s.write('test')
s.read(4)
spi_test(machine.SPI(1,100000000))
This will eventually fail with `OSError: [Errno 110] ETIMEDOUT` because
DMA2 was turned off by the CYW43 driver during the SPI1 transfer.
This commit fixes the bug by removing the code that explicitly disables
DMA2. Instead DMA2 will be automatically disabled after an inactivity
timeout, see commit a96afae90f
Signed-off-by: Damien George <damien@micropython.org>
Quail (https://www.mikroe.com/quail, PID: MIKROE-1793) is based on an
STM32F427VI CPU, featuring 2048 kB of Flash memory and 192 kB of RAM. An
on-board Cypress S25FL164K adds 8 MB of SPI Flash.
Quail has 4 mikroBUS(TM) sockets for Mikroe click(TM) board connectivity,
along with 24 screw terminals for connecting additional electronics and two
USB ports (one for programming, the other for external mass storage).
4 UARTs, 2 SPIs and 1 I2C bus are available for communication.
Signed-off-by: Lorenzo Cappelletti <lorenzo.cappelletti@gmail.com>
Don't force the 'HAL' string to be part of the platform string because
it doesn't have a sensible meaning for all possible platforms, and
swap it with the PLATFORM_ARCH string so the strings which most platforms
have come first.
Although the pyboard has only 4 LEDs, there are some boards that (may) have
more. This commit adds 2 more LEDs to the led.c file that if defined in
the board-specific config file will be compiled in.
Eliminate noise data from being sent to the I2S peripheral when the
transmitted sample stream is stopped.
Signed-off-by: Mike Teachman <mike.teachman@gmail.com>
This is an stm32-specific feature that's accessed via the pyb module, so
not something that will be widely enabled.
Signed-off-by: Damien George <damien@micropython.org>
This commit is a no-op change. Future improvements can come from making
individual boards use CORE or BASIC.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
Prior to this commit IRQs on STM32F4 could be lost because SR is cleared by
reading SR then reading DR. For example, if both RXNE and IDLE IRQs were
active upon entry to the IRQ handler, then IDLE is lost because the code
that handles RXNE comes first and accidentally clears SR (by reading SR
then DR to get the incoming character).
This commit fixes this problem by making the IRQ handler more atomic in the
following operations:
- get current IRQ status flags
- deal with RX character
- clear remaining status flags
- call user handler
On the STM32F4 it's very hard to get this right because the only way to
clear IRQ status flags is to read SR then DR, but the read of DR may read
some data which should remain in the register until the user wants to read
it. And it won't work to cache the read because RTS/CTS flow control will
then not work. So instead the new code disables interrupts if the DR is
full and waits for the user to read it before reenabling the interrupts.
Fixes issue mentioned in #4599 and #6082.
Signed-off-by: Damien George <damien@micropython.org>
This will be used by https://micropython.org/download/ to generate the
full listing of boards and firmware files.
Optionally supports a board.md for additional customisation of the
download page, as well as deploy.md for flashing instructions.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
Ensures consistent behaviour and resolves the D-Cache bug (the "exhaustive"
argument being lost due to cache being turned off) when O0 is used.
The changes in this commit are:
- Change -O0 to -Os because "gcc is considered broken at -O0" according to
https://github.com/ARM-software/CMSIS_5/issues/620#issuecomment-550235656
- Use volatile for mem_base so the compiler doesn't optimise away reads or
writes to the SDRAM, which is being tested.
- Use DSB to prevent any other compiler optimisations that would change the
testing logic.
- Use alternating pattern/antipattern in exhaustive test to catch more
hardware/configuration errors.
Implementation adapted by @andrewleech, taken directly from investigation
by @iabdalkader and @dpgeorge.
See #7841 and #7869 for further discussion.
The H743 has equal sized pages of 128k, which means the filesystem doesn't
need to be near the beginning. This commit moves the filesystem to the
very end of flash, and extends it to 512k (4 pages).
Signed-off-by: Damien George <damien@micropython.org>
Damien George
iabdalkader
Andrew Leech
Peter Züger
Christophe Priouzeau
Peter D. Gray
Herwin Grobben
Matt Trentini
Jim Mussared
David Michieli
Frédéric Pierson
Peter Boin
Lorenzo Cappelletti
stijn
Matt van de Werken
MikeTeachman
Mike Causer
roland van straten
Ned Konz