The RT1176 has two cores, but the actual firmware supports only the CM7.
There are currently no good plans on how to use the CM4.
The actual MIMXRT1170_EVK board is on par with the existing MIMXRT boards,
with the following extensions:
- Use 64 MB RAM for the heap.
- Support both LAN interfaces as LAN(0) and LAN(1), with LAN(1)
being the 1GB interface.
The dual LAN port interface can eventually be adapted as well for the
RT1062 MCU.
This work was done in collaboration with @alphaFred.
This commit adds support for machine.I2S on the mimxrt port. The I2S API
is consistent with the existing stm32, esp32, and rp2 implementations.
I2S features:
- controller transmit and controller receive
- 16-bit and 32-bit sample sizes
- mono and stereo formats
- sampling frequencies from 8kHz to 48kHz
- 3 modes of operation:
- blocking
- non-blocking with callback
- uasyncio
- configurable internal buffer
- optional MCK
Tested with the following development boards:
- MIMXRT1010_EVK, MIMXRT1015_EVK, MIMXRT1020_EVK, MIMXRT1050_EVK
- Teensy 4.0, Teensy 4.1
- Olimex RT1010
- Seeed ARCH MIX
Tested with the following I2S hardware peripherals:
- UDA1334
- GY-SPH0645LM4H
- WM8960 codec on board the MIMXRT boards and separate breakout board
- INMP441
- PCM5102
- SGTL5000 on the Teensy audio shield
Signed-off-by: Mike Teachman <mike.teachman@gmail.com>
Using the keyword argument cs=nnn in the constructor. The cs1
pin has to be defined in mpconfigboard.h.
Note: Only a few boards have the CS1 pin exposed to the connectors.
This commit implements 10/100 Mbit Ethernet support in the mimxrt port.
The following boards are configured without ETH network:
- MIMXRT1010_EVK
- Teensy 4.0
The following boards are configured with ETH network:
- MIMXRT1020_EVK
- MIMXRT1050_EVK
- MIMXRT1060_EVK
- MIMXRT1064_EVK
- Teensy 4.1
Ethernet support tested with TEENSY 4.1, MIMRTX1020_EVK and MIMXRT1050_EVK.
Build tested with Teensy 4.0 and MIMXRT1010_EVK to be still working.
Compiles and builds properly for MIMXRT1060_EVK and MIMXRT1064_EVK, but not
tested lacking suitable boards.
Tested functions are:
- ping works bothway
- simple UDP transfer works bothway
- ntptime works
- the ftp server works
- secure socker works
- telnet and webrepl works
The MAC address is 0x02 plus 5 bytes from the manifacturing info field,
which can be considered as unique per device.
Some boards do not wire the RESET and INT pin of the PHY transceiver. For
operation, these are not required. If they are defined, they will be used.
- Moves definition of BOARD_FLASH_SIZE and other header files related to
flash configuration into the Makefile.
- Adds board specific clock_config.h.
- Adds board.h, pin_mux.h, and peripherals.h as they are
required by NXP MCU SDK in order to use our own clock_config.h.
- Renames board specific FlexSPI configuration files.
- Updates flash frequency of MIMXRT1020_EVK
- Creates separated flash_config files for QSPI NOR and
QSPI Hyper flash.
- Unifies VFS start address to be @ 1M for 1010 and 1020 boards.
- Unifies 1050EVK boards
- Adds support to both NOR and HyperFlash on boards with
both capabilities.
- Adds automatic FlexRAM initialization to start-up code based on
linker script and NXP HAL.
- Applies code formatting to all files in mimxrt port.
With this change the flash configuration is restructured and
organized. This simplifies the configuration process and
provides a better overview of each board's settings. With the integration
of clock_config.h, board.h, pin_mux.h, and peripherals.h we gain better
control of the settings and clock configurations. Furthermore the
implementation of an explicit FlexRAM setup improves the system
performance and allows for performance tuning.
Signed-off-by: Philipp Ebensberger
- Configures `PLL2->PFD0` with **198MHz** as base clock of
`USDHCx` peripheral.
- Adds guards for SDCard related files via `MICROPY_PY_MACHINE_SDCARD`
- Adds creation of pin defines for SDCard to make-pins.py
- Adds new configuration option for SDCard peripheral pinout
to mpconfigport.h
- Adds interrupt handling support instead of polling
- Adds support for `ADMA2` powered data transfer
- Configures SDCard to run in HS (high-speed mode) with **50MHz** only!
SDCard support is optional and requires `USDHC` peripheral.
Thus this driver is not available on `MIMXRT1010_EVK`.
SDCard support is enabled by setting `MICROPY_PY_MACHINE_SDCARD = 1`
in mpconfigboard.mk.
Signed-off-by: Philipp Ebensberger
Hyperflash is used by the MIMXRT1050_EVKB, MIMXRT1060_EVK and
MIMXRT1064_EVK boards.
This commit includes:
- add support for Hyperflash
- modify MIMXRT1060_EVK and MIMXRT1064_EVK to change from QSPI to
hyperflash.
- minor incidental changes to other boards so they still build
Note: Erasing a sector on the hyperflash is slow. It takes about a second,
which seems too long, but matches the data sheet.
This class supports SPI bus controller mode, with blocking transfers.
SPI device numbers start at 0, to comply with the pinout of the Teensy
boards. With the configured clock frequency the fastest baud rate is
33MHz. For messages longer 16 bytes DMA is used. The class uses the
existing framework with extmod/machine_spi.c.
Extended driver options:
- drive=n with n being between 1 and 6 or PIN.POWER_1 to PIN.POWER_6.
Since the pins used by the SPI are fixed, no Pin settings can be made.
Thus the drive option is added allowing to control ringing and crosstalk
on the connection.
- gap_ns=nnnnn is the time between sent data items in a frame given in ns.
Default is 2 clock cycles.
The implementation uses the LPUARTx devices. Up to 8 UARTs can be used,
given that the pins are accessible. E.g. 8 on Teensy 4.1, 5 on
MIMXRT1020_EVK.
For Tennsy 4.0 and 4.1 the UART numbers are as printed on the pinout 1..N.
The MIMXRT10xx-EVK boards have only one UART named, which gets the number
1. All other UART are assigned to different Pins:
MIMXRT1010-EVK:
D0/D1 UART 1
D6/D7 UART 2
A0/D4 UART 3
MIMXRT1020-EVK:
D0/D1 UART 1
D6/D9 UART 2
D10/D12 UART 3
D14/D15 UART 4
A0/A1 UART 5
MIMXRT1050-EVK, MIMXRT1060-EVK, MIMXRT1064-EVK:
D0/D1 UART 1
D7/D6 UART 2
D8/D9 UART 3
A1/A0 UART 4
robert-hh
David Lechner
MikeTeachman
Philipp Ebensberger