151 lines
6.5 KiB
C
151 lines
6.5 KiB
C
/*
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* Copyright 2019 NXP.
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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// Based on tinyusb/hw/bsp/teensy_40/evkmimxrt1010_flexspi_nor_config.c
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#include BOARD_FLASH_CONFIG_HEADER_H
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/* Component ID definition, used by tools. */
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#ifndef FSL_COMPONENT_ID
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#define FSL_COMPONENT_ID "platform.drivers.xip_board"
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#endif
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/*******************************************************************************
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* Code
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******************************************************************************/
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#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
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#if defined(__ARMCC_VERSION) || defined(__GNUC__)
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__attribute__((section(".boot_hdr.conf")))
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#elif defined(__ICCARM__)
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#pragma location = ".boot_hdr.conf"
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#endif
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#ifndef MICROPY_HW_FLASH_DQS
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#define MICROPY_HW_FLASH_DQS kFlexSPIReadSampleClk_LoopbackFromDqsPad
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#endif
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#ifndef MICROPY_HW_FLASH_CLK
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#define MICROPY_HW_FLASH_CLK kFlexSpiSerialClk_100MHz
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#endif
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const flexspi_nor_config_t qspiflash_config = {
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.memConfig =
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{
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.tag = FLEXSPI_CFG_BLK_TAG,
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.version = FLEXSPI_CFG_BLK_VERSION,
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.readSampleClkSrc = MICROPY_HW_FLASH_DQS,
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.csHoldTime = 3u,
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.csSetupTime = 3u,
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.busyOffset = FLASH_BUSY_STATUS_OFFSET, // Status bit 0 indicates busy.
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.busyBitPolarity = FLASH_BUSY_STATUS_POL, // Busy when the bit is 1.
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.deviceModeCfgEnable = 1u,
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.deviceModeType = kDeviceConfigCmdType_QuadEnable,
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.deviceModeSeq = {
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.seqId = 4u,
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.seqNum = 1u,
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},
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.deviceModeArg = 0x40,
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// Enable DDR mode, Wordaddassable, Safe configuration, Differential clock
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.deviceType = kFlexSpiDeviceType_SerialNOR,
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.sflashPadType = kSerialFlash_4Pads,
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.serialClkFreq = MICROPY_HW_FLASH_CLK,
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.sflashA1Size = MICROPY_HW_FLASH_SIZE,
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.lookupTable =
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{
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// 0 Read LUTs 0 -> 0
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FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
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FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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// 1 Read status register -> 1
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FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x01),
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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// 2 Fast read quad mode - SDR
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FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x6B, RADDR_SDR, FLEXSPI_1PAD, 0x18),
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FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x08, READ_SDR, FLEXSPI_4PAD, 0x04),
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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// 3 Write Enable -> 3
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FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP, FLEXSPI_1PAD, 0),
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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// 4 Read extend parameters
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FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x81, READ_SDR, FLEXSPI_1PAD, 0x04),
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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// 5 Erase Sector -> 5
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FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20, RADDR_SDR, FLEXSPI_1PAD, 24),
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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// 6 Write Status Reg
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FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x01, WRITE_SDR, FLEXSPI_1PAD, 0x04),
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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// 7 Page Program - quad mode (-> 9)
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FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x32, RADDR_SDR, FLEXSPI_1PAD, 0x18),
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FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_4PAD, 0x04, STOP, FLEXSPI_1PAD, 0),
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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// 8 Read ID
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FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x90, DUMMY_SDR, FLEXSPI_1PAD, 24),
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FLEXSPI_LUT_SEQ(READ_SDR, FLEXSPI_1PAD, 0x00, 0, 0, 0),
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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// 9 Page Program - single mode -> 9
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FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x02, RADDR_SDR, FLEXSPI_1PAD, 24),
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FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0, 0, 0, 0),
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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// 10 Enter QPI mode
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FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x35, STOP, FLEXSPI_1PAD, 0),
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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// 11 Erase Chip
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FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x60, STOP, FLEXSPI_1PAD, 0),
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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// 12 Exit QPI mode
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FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_4PAD, 0xF5, STOP, FLEXSPI_1PAD, 0),
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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// 13 Erase Block (32k) -> 13
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FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x52, RADDR_SDR, FLEXSPI_1PAD, 24),
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
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},
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},
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.pageSize = 256u,
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.sectorSize = 4u * 1024u,
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.blockSize = 32u * 1024u,
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.isUniformBlockSize = false,
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// .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz,
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};
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#endif /* XIP_BOOT_HEADER_ENABLE */
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