102 lines
3.4 KiB
C
102 lines
3.4 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2018 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "i2cslave.h"
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#if defined(STM32F4)
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void i2c_slave_init_helper(i2c_slave_t *i2c, int addr) {
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i2c->CR2 = I2C_CR2_ITBUFEN | I2C_CR2_ITEVTEN | 4 << I2C_CR2_FREQ_Pos;
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i2c->OAR1 = 1 << 14 | addr << 1;
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i2c->OAR2 = 0;
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i2c->CR1 = I2C_CR1_ACK | I2C_CR1_PE;
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}
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void i2c_slave_ev_irq_handler(i2c_slave_t *i2c) {
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uint32_t sr1 = i2c->SR1;
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if (sr1 & I2C_SR1_ADDR) {
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// Address matched
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// Read of SR1, SR2 needed to clear ADDR bit
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sr1 = i2c->SR1;
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uint32_t sr2 = i2c->SR2;
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i2c_slave_process_addr_match(i2c, (sr2 >> I2C_SR2_TRA_Pos) & 1);
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}
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if (sr1 & I2C_SR1_TXE) {
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i2c->DR = i2c_slave_process_tx_byte(i2c);
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}
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if (sr1 & I2C_SR1_RXNE) {
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i2c_slave_process_rx_byte(i2c, i2c->DR);
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}
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if (sr1 & I2C_SR1_STOPF) {
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// STOPF only set at end of RX mode (in TX mode AF is set on NACK)
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// Read of SR1, write CR1 needed to clear STOPF bit
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sr1 = i2c->SR1;
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i2c->CR1 &= ~I2C_CR1_ACK;
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i2c_slave_process_rx_end(i2c);
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i2c->CR1 |= I2C_CR1_ACK;
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}
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}
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#elif defined(STM32F7) || defined(STM32H7) || defined(STM32WB)
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void i2c_slave_init_helper(i2c_slave_t *i2c, int addr) {
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i2c->CR1 = I2C_CR1_STOPIE | I2C_CR1_ADDRIE | I2C_CR1_RXIE | I2C_CR1_TXIE;
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i2c->CR2 = 0;
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i2c->OAR1 = I2C_OAR1_OA1EN | addr << 1;
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i2c->OAR2 = 0;
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i2c->CR1 |= I2C_CR1_PE;
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}
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void i2c_slave_ev_irq_handler(i2c_slave_t *i2c) {
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uint32_t isr = i2c->ISR;
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if (isr & I2C_ISR_ADDR) {
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// Address matched
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// Set TXE so that TXDR is flushed and ready for the first byte
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i2c->ISR = I2C_ISR_TXE;
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i2c->ICR = I2C_ICR_ADDRCF;
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i2c_slave_process_addr_match(i2c, (i2c->ISR >> I2C_ISR_DIR_Pos) & 1);
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}
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if (isr & I2C_ISR_TXIS) {
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i2c->TXDR = i2c_slave_process_tx_byte(i2c);
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}
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if (isr & I2C_ISR_RXNE) {
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i2c_slave_process_rx_byte(i2c, i2c->RXDR);
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}
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if (isr & I2C_ISR_STOPF) {
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// STOPF only set for STOP condition, not a repeated START
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i2c->ICR = I2C_ICR_STOPCF;
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i2c->OAR1 &= ~I2C_OAR1_OA1EN;
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if (i2c->ISR & I2C_ISR_DIR) {
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i2c_slave_process_tx_end(i2c);
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} else {
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i2c_slave_process_rx_end(i2c);
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}
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i2c->OAR1 |= I2C_OAR1_OA1EN;
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}
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}
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#endif
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