422 lines
16 KiB
C
422 lines
16 KiB
C
//*****************************************************************************
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// startup_gcc.c
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//
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// Startup code for use with GCC.
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//
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// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
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//
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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//*****************************************************************************
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#include <stdint.h>
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#include "inc/hw_nvic.h"
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#include "inc/hw_types.h"
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#include "fault_registers.h"
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//*****************************************************************************
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//
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// The following are constructs created by the linker, indicating where the
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// the "data" and "bss" segments reside in memory. The initializers for the
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// for the "data" segment resides immediately following the "text" segment.
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//
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//*****************************************************************************
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extern uint32_t _data;
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extern uint32_t _edata;
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extern uint32_t _bss;
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extern uint32_t _ebss;
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extern uint32_t _estack;
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//*****************************************************************************
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//
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// Forward declaration of the default fault handlers.
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//
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//*****************************************************************************
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#ifndef BOOTLOADER
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__attribute__ ((section (".boot")))
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#endif
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void ResetISR(void);
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#ifdef DEBUG
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static void NmiSR(void) __attribute__( ( naked ) );
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static void FaultISR( void ) __attribute__( ( naked ) );
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void HardFault_HandlerC(uint32_t *pulFaultStackAddress);
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static void BusFaultHandler(void) __attribute__( ( naked ) );
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#endif
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static void IntDefaultHandler(void) __attribute__( ( naked ) );
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//*****************************************************************************
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//
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// External declaration for the freeRTOS handlers
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//
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//*****************************************************************************
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#ifdef USE_FREERTOS
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extern void vPortSVCHandler(void);
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extern void xPortPendSVHandler(void);
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extern void xPortSysTickHandler(void);
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#endif
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//*****************************************************************************
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//
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// The entry point for the application.
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//
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//*****************************************************************************
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extern int main(void);
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//*****************************************************************************
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//
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// The vector table. Note that the proper constructs must be placed on this to
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// ensure that it ends up at physical address 0x0000.0000.
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//
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//*****************************************************************************
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__attribute__ ((section(".intvecs")))
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void (* const g_pfnVectors[256])(void) =
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{
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(void (*)(void))((uint32_t)&_estack), // The initial stack pointer
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ResetISR, // The reset handler
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#ifdef DEBUG
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NmiSR, // The NMI handler
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FaultISR, // The hard fault handler
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#else
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IntDefaultHandler, // The NMI handler
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IntDefaultHandler, // The hard fault handler
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#endif
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IntDefaultHandler, // The MPU fault handler
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#ifdef DEBUG
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BusFaultHandler, // The bus fault handler
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#else
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IntDefaultHandler, // The bus fault handler
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#endif
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IntDefaultHandler, // The usage fault handler
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0, // Reserved
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0, // Reserved
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0, // Reserved
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0, // Reserved
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#ifdef USE_FREERTOS
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vPortSVCHandler, // SVCall handler
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#else
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IntDefaultHandler, // SVCall handler
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#endif
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IntDefaultHandler, // Debug monitor handler
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0, // Reserved
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#ifdef USE_FREERTOS
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xPortPendSVHandler, // The PendSV handler
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xPortSysTickHandler, // The SysTick handler
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#else
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IntDefaultHandler, // The PendSV handler
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IntDefaultHandler, // The SysTick handler
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#endif
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IntDefaultHandler, // GPIO Port A
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IntDefaultHandler, // GPIO Port B
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IntDefaultHandler, // GPIO Port C
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IntDefaultHandler, // GPIO Port D
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0, // Reserved
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IntDefaultHandler, // UART0 Rx and Tx
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IntDefaultHandler, // UART1 Rx and Tx
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0, // Reserved
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IntDefaultHandler, // I2C0 Master and Slave
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0,0,0,0,0, // Reserved
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IntDefaultHandler, // ADC Channel 0
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IntDefaultHandler, // ADC Channel 1
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IntDefaultHandler, // ADC Channel 2
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IntDefaultHandler, // ADC Channel 3
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IntDefaultHandler, // Watchdog Timer
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IntDefaultHandler, // Timer 0 subtimer A
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IntDefaultHandler, // Timer 0 subtimer B
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IntDefaultHandler, // Timer 1 subtimer A
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IntDefaultHandler, // Timer 1 subtimer B
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IntDefaultHandler, // Timer 2 subtimer A
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IntDefaultHandler, // Timer 2 subtimer B
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0,0,0,0, // Reserved
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IntDefaultHandler, // Flash
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0,0,0,0,0, // Reserved
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IntDefaultHandler, // Timer 3 subtimer A
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IntDefaultHandler, // Timer 3 subtimer B
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0,0,0,0,0,0,0,0,0, // Reserved
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IntDefaultHandler, // uDMA Software Transfer
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IntDefaultHandler, // uDMA Error
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0,0,0,0,0,0,0,0,0,0, // Reserved
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0,0,0,0,0,0,0,0,0,0, // Reserved
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0,0,0,0,0,0,0,0,0,0, // Reserved
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0,0,0,0,0,0,0,0,0,0, // Reserved
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0,0,0,0,0,0,0,0,0,0, // Reserved
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0,0,0,0,0,0,0,0,0,0, // Reserved
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0,0,0,0,0,0,0,0,0,0, // Reserved
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0,0,0,0,0,0,0,0,0,0, // Reserved
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0,0,0,0,0,0,0,0,0,0, // Reserved
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0,0,0,0,0,0,0,0,0,0, // Reserved
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IntDefaultHandler, // SHA
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0,0, // Reserved
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IntDefaultHandler, // AES
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0, // Reserved
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IntDefaultHandler, // DES
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0,0,0,0,0, // Reserved
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IntDefaultHandler, // SDHost
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0, // Reserved
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IntDefaultHandler, // I2S
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0, // Reserved
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IntDefaultHandler, // Camera
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0,0,0,0,0,0,0, // Reserved
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IntDefaultHandler, // NWP to APPS Interrupt
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IntDefaultHandler, // Power, Reset and Clock module
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0,0, // Reserved
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IntDefaultHandler, // Shared SPI
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IntDefaultHandler, // Generic SPI
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IntDefaultHandler, // Link SPI
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0,0,0,0,0,0,0,0,0,0, // Reserved
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0,0,0,0,0,0,0,0,0,0, // Reserved
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0,0,0,0,0,0,0,0,0,0, // Reserved
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0,0,0,0,0,0,0,0,0,0, // Reserved
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0,0,0,0,0,0,0,0,0,0, // Reserved
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0,0,0,0,0,0,0,0,0,0, // Reserved
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0,0 // Reserved
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};
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//*****************************************************************************
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//
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// This is the code that gets called when the processor first starts execution
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// following a reset event. Only the absolutely necessary set is performed,
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// after which the application supplied entry() routine is called. Any fancy
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// actions (such as making decisions based on the reset cause register, and
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// resetting the bits in that register) are left solely in the hands of the
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// application.
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//
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//*****************************************************************************
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void ResetISR(void)
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{
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#if defined(DEBUG) && !defined(BOOTLOADER)
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{
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//
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// Fill the main stack with a known value so that
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// we can measure the main stack high water mark
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//
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__asm volatile
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(
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"ldr r0, =_stack \n"
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"ldr r1, =_estack \n"
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"mov r2, #0x55555555 \n"
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".thumb_func \n"
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"fill_loop: \n"
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"cmp r0, r1 \n"
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"it lt \n"
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"strlt r2, [r0], #4 \n"
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"blt fill_loop \n"
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);
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}
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#endif
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{
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// Get the initial stack pointer location from the vector table
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// and write this value to the msp register
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__asm volatile
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(
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"ldr r0, =_text \n"
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"ldr r0, [r0] \n"
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"msr msp, r0 \n"
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);
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}
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{
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//
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// Zero fill the bss segment.
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//
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__asm volatile
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(
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"ldr r0, =_bss \n"
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"ldr r1, =_ebss \n"
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"mov r2, #0 \n"
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".thumb_func \n"
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"zero_loop: \n"
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"cmp r0, r1 \n"
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"it lt \n"
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"strlt r2, [r0], #4 \n"
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"blt zero_loop \n"
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);
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}
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{
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//
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// Call the application's entry point.
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//
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main();
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}
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}
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#ifdef DEBUG
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//*****************************************************************************
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//
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// This is the code that gets called when the processor receives a NMI. This
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// simply enters an infinite loop, preserving the system state for examination
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// by a debugger.
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//
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//*****************************************************************************
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static void NmiSR(void)
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{
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// Break into the debugger
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__asm volatile ("bkpt #0 \n");
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//
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// Enter an infinite loop.
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//
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for ( ; ; )
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{
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}
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}
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//*****************************************************************************
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//
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// This is the code that gets called when the processor receives a hard fault
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// interrupt. This simply enters an infinite loop, preserving the system state
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// for examination by a debugger.
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//
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//*****************************************************************************
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static void FaultISR(void)
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{
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/*
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* Get the appropriate stack pointer, depending on our mode,
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* and use it as the parameter to the C handler. This function
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* will never return
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*/
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__asm volatile
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(
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"movs r0, #4 \n"
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"mov r1, lr \n"
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"tst r0, r1 \n"
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"beq _msp \n"
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"mrs r0, psp \n"
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"b HardFault_HandlerC \n"
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"_msp: \n"
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"mrs r0, msp \n"
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"b HardFault_HandlerC \n"
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) ;
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}
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//***********************************************************************************
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// HardFaultHandler_C:
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// This is called from the FaultISR with a pointer the Fault stack
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// as the parameter. We can then read the values from the stack and place them
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// into local variables for ease of reading.
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// We then read the various Fault Status and Address Registers to help decode
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// cause of the fault.
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// The function ends with a BKPT instruction to force control back into the debugger
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//***********************************************************************************
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void HardFault_HandlerC(uint32_t *pulFaultStackAddress)
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{
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volatile uint32_t r0 ;
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volatile uint32_t r1 ;
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volatile uint32_t r2 ;
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volatile uint32_t r3 ;
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volatile uint32_t r12 ;
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volatile uint32_t lr ;
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volatile uint32_t pc ;
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volatile uint32_t psr ;
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volatile _CFSR_t _CFSR ;
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volatile _HFSR_t _HFSR ;
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volatile uint32_t _BFAR ;
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r0 = pulFaultStackAddress[0];
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r1 = pulFaultStackAddress[1];
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r2 = pulFaultStackAddress[2];
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r3 = pulFaultStackAddress[3];
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r12 = pulFaultStackAddress[4];
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lr = pulFaultStackAddress[5];
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pc = pulFaultStackAddress[6];
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psr = pulFaultStackAddress[7];
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// Configurable Fault Status Register
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// Consists of MMSR, BFSR and UFSR
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_CFSR = (*((volatile _CFSR_t *)(0xE000ED28)));
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// Hard Fault Status Register
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_HFSR = (*((volatile _HFSR_t *)(0xE000ED2C)));
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// Bus Fault Address Register
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_BFAR = (*((volatile uint32_t *)(0xE000ED38)));
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// Break into the debugger
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__asm volatile ("bkpt #0 \n");
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for ( ; ; )
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{
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// Keep the compiler happy
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(void)r0, (void)r1, (void)r2, (void)r3, (void)r12, (void)lr, (void)pc, (void)psr;
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(void)_CFSR, (void)_HFSR, (void)_BFAR;
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}
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}
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//*****************************************************************************
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//
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// This is the code that gets called when the processor receives an unexpected
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// interrupt. This simply enters an infinite loop, preserving the system state
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// for examination by a debugger.
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//
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//*****************************************************************************
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static void BusFaultHandler(void)
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{
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// Break into the debugger
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__asm volatile ("bkpt #0 \n");
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//
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// Enter an infinite loop.
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//
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for ( ; ; )
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{
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}
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}
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#endif
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//*****************************************************************************
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//
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// This is the code that gets called when the processor receives an unexpected
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// interrupt. This simply enters an infinite loop, preserving the system state
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// for examination by a debugger.
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//
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//*****************************************************************************
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static void IntDefaultHandler(void)
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{
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#ifdef DEBUG
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// Break into the debugger
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__asm volatile ("bkpt #0 \n");
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#endif
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//
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// Enter an infinite loop.
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//
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for ( ; ; )
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{
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}
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}
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